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| author | Adam Buchbinder <adam.buchbinder@gmail.com> | 2009-12-11 16:35:39 -0500 |
|---|---|---|
| committer | Jiri Kosina <jkosina@suse.cz> | 2010-02-04 11:55:45 +0100 |
| commit | c41b20e721ea4f6f20f66a66e7f0c3c97a2ca9c2 (patch) | |
| tree | 92cd1b2b1cdb871530bb07bbbcbfeaffe1170830 /drivers/gpu | |
| parent | a089377f29d3af0f62f3bdc6db0c5042513fc3f3 (diff) | |
Fix misspellings of "truly" in comments.
Some comments misspell "truly"; this fixes them. No code changes.
Signed-off-by: Adam Buchbinder <adam.buchbinder@gmail.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_state.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_state.c b/drivers/gpu/drm/radeon/radeon_state.c index 067167cb39c..1982a87386a 100644 --- a/drivers/gpu/drm/radeon/radeon_state.c +++ b/drivers/gpu/drm/radeon/radeon_state.c @@ -1065,7 +1065,7 @@ static void radeon_cp_dispatch_clear(struct drm_device * dev, /* judging by the first tile offset needed, could possibly directly address/clear 4x4 tiles instead of 8x2 * 4x4 macro tiles, though would still need clear mask for - right/bottom if truely 4x4 granularity is desired ? */ + right/bottom if truly 4x4 granularity is desired ? */ OUT_RING(tileoffset * 16); /* the number of tiles to clear */ OUT_RING(nrtilesx + 1); |