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authorMichael S. Tsirkin <mst@mellanox.co.il>2007-02-10 23:17:26 +0200
committerRoland Dreier <rolandd@cisco.com>2007-02-12 16:16:29 -0800
commit1d1f19cfce7687b557cebdc41bf8a5eeba8a9882 (patch)
tree3e9aa12df4777242a7607dd580d0c36945b8f634 /drivers/infiniband/hw/cxgb3
parentc7d204e8fdf02f88d91707213f473805bcfb977b (diff)
IB/mthca: Give reserved MTTs a separate cache line
MTTs are allocated in non-cache-coherent memory, so we must give reserved MTTs their own cache line, to prevent both device and CPU from writing into the same cache line at the same time. Signed-off-by: Michael S. Tsirkin <mst@mellanox.co.il> Signed-off-by: Roland Dreier <rolandd@cisco.com>
Diffstat (limited to 'drivers/infiniband/hw/cxgb3')
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