diff options
| author | Andy Green <andy@openmoko.com> | 2008-11-19 17:09:48 +0000 |
|---|---|---|
| committer | Andy Green <agreen@pads.home.warmcat.com> | 2008-11-19 17:09:48 +0000 |
| commit | 09527e6587b77680bc774de42ed6ee2106b22a11 (patch) | |
| tree | 2158d671f7c7f2707e9326b0cec211a022bd5cfd /drivers/mfd/glamo/glamo-core.c | |
| parent | b732ba26602e131b9849ad171080e6871b4faa06 (diff) | |
fix-pcf50633-kill-white-splash-of-death-on-suspend.patch
mach-gta02 meddles with the regulator platform struct after
it is defined, leading to LCM power getting lost in suspend
despite I set it to be left up. Fixing this finally removes
the incredibly stubborn white LCM on suspend "flash".
This is also going to be implicated in Sean McNeil's
experience of monochromatic LCM after resume, which was
previously attacked by resetting and re-initing the LCM
from scratch.
In addition, I realized that we take down core_1v3 in
pcf50633 suspend action, this is happening near the
start of suspend, so we are in a meta-race to finish
suspend in a controlled way before the caps on core_1v3
run out (I only saw 23.3uF total). If it's true, this
is where the weirdo sensitivity to timing during
suspend is coming from.
Therefore in this patch we also remove sleeps and
dev_info() etc (which have to flush on serial console)
from the pc50633 isr workqueue if we are in pcf50633
driver suspend state 1, ie, suspending... because we
don't have time for it.
Signed-off-by: Andy Green <andy@openmoko.com>
Diffstat (limited to 'drivers/mfd/glamo/glamo-core.c')
| -rw-r--r-- | drivers/mfd/glamo/glamo-core.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/mfd/glamo/glamo-core.c b/drivers/mfd/glamo/glamo-core.c index 3edbfa820d2..d4b526d41fa 100644 --- a/drivers/mfd/glamo/glamo-core.c +++ b/drivers/mfd/glamo/glamo-core.c @@ -848,6 +848,7 @@ static void glamo_power(struct glamo_core *glamo, ARRAY_SIZE(glamo_resume_script), 0); break; + case GLAMO_POWER_STANDBY: /* enable memory self-refresh */ __reg_set_bit_mask(glamo, GLAMO_REG_MEM_DRAM1, @@ -859,6 +860,7 @@ static void glamo_power(struct glamo_core *glamo, __reg_set_bit_mask(glamo, GLAMO_REG_PLL_GEN3, 0x2000, 0xffff); __reg_set_bit_mask(glamo, GLAMO_REG_DFT_GEN5, 0x0001, 0xffff); break; + case GLAMO_POWER_SUSPEND: __reg_set_bit_mask(glamo, GLAMO_REG_MEM_DRAM2, GLAMO_MEM_DRAM2_DEEP_PWRDOWN, 0xffff); |