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authormokopatches <mokopatches@openmoko.org>2008-11-19 17:03:14 +0000
committerwarmcat <andy@warmcat.com>2008-11-19 17:03:14 +0000
commit66dc9f9d0164aee9df0a637f01e8d88bbf3d893f (patch)
treecab08beb2929c78ad3f95e1f3b4b6daaf2262b38 /drivers/mfd/glamo/glamo-core.h
parent3622d39f2cb0a85ef890cc02c5d11a0c0a00978f (diff)
smedia-glamo.patch
[ FIXME: include/asm-arm/arch-s3c2410/irqs.h shouldn't contain device-specific changes. ] This is a Linux kernel driver for the Smedia Glamo336x / Glamo337x multi-function peripheral device. Signed-off-by: Harald Welte <laforge@openmoko.org>
Diffstat (limited to 'drivers/mfd/glamo/glamo-core.h')
-rw-r--r--drivers/mfd/glamo/glamo-core.h91
1 files changed, 91 insertions, 0 deletions
diff --git a/drivers/mfd/glamo/glamo-core.h b/drivers/mfd/glamo/glamo-core.h
new file mode 100644
index 00000000000..cf89f032500
--- /dev/null
+++ b/drivers/mfd/glamo/glamo-core.h
@@ -0,0 +1,91 @@
+#ifndef __GLAMO_CORE_H
+#define __GLAMO_CORE_H
+
+#include <asm/system.h>
+
+
+/* for the time being, we put the on-screen framebuffer into the lowest
+ * VRAM space. This should make the code easily compatible with the various
+ * 2MB/4MB/8MB variants of the Smedia chips */
+#define GLAMO_OFFSET_VRAM 0x800000
+#define GLAMO_OFFSET_FB (GLAMO_OFFSET_VRAM)
+
+/* we only allocate the minimum possible size for the framebuffer to make
+ * sure we have sufficient memory for other functions of the chip */
+//#define GLAMO_FB_SIZE (640*480*4) /* == 0x12c000 */
+#define GLAMO_INTERNAL_RAM_SIZE 0x800000
+#define GLAMO_MMC_BUFFER_SIZE (64 * 1024)
+#define GLAMO_FB_SIZE (GLAMO_INTERNAL_RAM_SIZE - GLAMO_MMC_BUFFER_SIZE)
+
+
+struct glamo_core {
+ int irq;
+ int irq_works; /* 0 means PCB does not support Glamo IRQ */
+ struct resource *mem;
+ struct resource *mem_core;
+ void __iomem *base;
+ struct platform_device *pdev;
+ struct glamofb_platform_data *pdata;
+ u_int16_t type;
+ u_int16_t revision;
+ spinlock_t lock;
+};
+
+struct glamo_script {
+ u_int16_t reg;
+ u_int16_t val;
+};
+
+int glamo_run_script(struct glamo_core *glamo,
+ struct glamo_script *script, int len, int may_sleep);
+
+enum glamo_engine {
+ GLAMO_ENGINE_CAPTURE,
+ GLAMO_ENGINE_ISP,
+ GLAMO_ENGINE_JPEG,
+ GLAMO_ENGINE_MPEG_ENC,
+ GLAMO_ENGINE_MPEG_DEC,
+ GLAMO_ENGINE_LCD,
+ GLAMO_ENGINE_CMDQ,
+ GLAMO_ENGINE_2D,
+ GLAMO_ENGINE_3D,
+ GLAMO_ENGINE_MMC,
+ GLAMO_ENGINE_MICROP0,
+ GLAMO_ENGINE_RISC,
+ GLAMO_ENGINE_MICROP1_MPEG_ENC,
+ GLAMO_ENGINE_MICROP1_MPEG_DEC,
+#if 0
+ GLAMO_ENGINE_H264_DEC,
+ GLAMO_ENGINE_RISC1,
+ GLAMO_ENGINE_SPI,
+#endif
+ __NUM_GLAMO_ENGINES
+};
+
+struct glamo_mci_pdata {
+ struct glamo_core * pglamo;
+ unsigned int gpio_detect;
+ unsigned int gpio_wprotect;
+ unsigned long ocr_avail;
+ void (*glamo_set_mci_power)(unsigned char power_mode,
+ unsigned short vdd);
+ int (*glamo_irq_is_wired)(void);
+};
+
+
+static inline void glamo_reg_access_delay(void)
+{
+ int n;
+
+ for (n = 0; n != 2; n++)
+ nop();
+}
+
+
+int glamo_engine_enable(struct glamo_core *glamo, enum glamo_engine engine);
+int glamo_engine_disable(struct glamo_core *glamo, enum glamo_engine engine);
+void glamo_engine_reset(struct glamo_core *glamo, enum glamo_engine engine);
+int glamo_engine_reclock(struct glamo_core *glamo,
+ enum glamo_engine engine, int ps);
+
+#endif /* __GLAMO_CORE_H */