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authorThomas White <taw@bitwiz.org.uk>2009-07-11 23:24:49 +0100
committerThomas White <taw@bitwiz.org.uk>2009-07-11 23:24:49 +0100
commit5b85050a8f1e7db530f803627ba6371ca9c0ba9b (patch)
treefefceb5b85f1b268ac7aef68491e5034bea2a09f /drivers/mfd/glamo
parent59c7e1e25087e77f35b2ebcf916ba3b70c4647dc (diff)
De-bodge pixel clocks
.. or re-bodge them, depending on your perspective. This makes mode->clock contain a value in Hz, in line with the KMS convention. This is at the expense of more calculations when generating the mode from the mach_info and when setting the mode. Signed-off-by: Thomas White <taw@bitwiz.org.uk>
Diffstat (limited to 'drivers/mfd/glamo')
-rw-r--r--drivers/mfd/glamo/glamo-display.c11
1 files changed, 8 insertions, 3 deletions
diff --git a/drivers/mfd/glamo/glamo-display.c b/drivers/mfd/glamo/glamo-display.c
index ceffb18331c..93f056dce43 100644
--- a/drivers/mfd/glamo/glamo-display.c
+++ b/drivers/mfd/glamo/glamo-display.c
@@ -310,6 +310,7 @@ static void glamo_crtc_mode_set(struct drm_crtc *crtc,
struct glamodrm_handle *gdrm;
struct glamo_crtc *gcrtc;
int retr_start, retr_end, disp_start, disp_end;
+ int ps;
printk(KERN_CRIT "glamo_crtc_mode_set\n");
@@ -318,8 +319,11 @@ static void glamo_crtc_mode_set(struct drm_crtc *crtc,
gdrm = gcrtc->gdrm; /* Here it is! */
glamo_lcd_cmd_mode(gdrm, 1);
- glamo_engine_reclock(gdrm->glamo_core, GLAMO_ENGINE_LCD, mode->clock);
- gdrm->saved_clock = mode->clock;
+ ps = mode->clock / 1000; /* Hz -> kHz */
+ ps = 1000000000UL / ps; /* kHz -> ps */
+ printk(KERN_INFO "[glamo-drm] Reclocking LCD engine to %i ps\n", ps);
+ glamo_engine_reclock(gdrm->glamo_core, GLAMO_ENGINE_LCD, ps);
+ gdrm->saved_clock = ps;
reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_WIDTH,
GLAMO_LCD_WIDTH_MASK, mode->hdisplay);
@@ -453,7 +457,8 @@ static int glamo_connector_get_modes(struct drm_connector *connector)
mode->type = DRM_MODE_TYPE_DEFAULT | DRM_MODE_TYPE_PREFERRED;
/* Convert framebuffer timings into KMS timings */
- mode->clock = 1000000 / mach_info->pixclock; /* ps -> Hz */
+ mode->clock = 1000000000UL / mach_info->pixclock; /* ps -> kHz */
+ mode->clock *= 1000; /* kHz -> Hz */
mode->hdisplay = mach_info->xres.defval;
mode->hsync_start = mach_info->right_margin + mode->hdisplay;
mode->hsync_end = mode->hsync_start + mach_info->hsync_len;