diff options
| author | Ben Hutchings <bhutchings@solarflare.com> | 2009-10-23 08:31:20 +0000 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2009-10-24 04:27:07 -0700 |
| commit | 63f1988419ccaa544d1d31aadc1dd309f6471ffe (patch) | |
| tree | d973e7c103b9453063d02c8895f629c4ca692a33 /drivers/net/sfc/falcon.c | |
| parent | 6d51d307509f98f070688b4bff1d0f7462c4d3ec (diff) | |
sfc: Move all TX DMA length limiting into tx.c
Replace the duplicated logic in efx_enqueue_skb() and
efx_tx_queue_insert() with an inline function, efx_max_tx_len().
Remove the failed attempt at abstracting hardware-specifics and put
all the magic numbers in efx_max_tx_len().
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/sfc/falcon.c')
| -rw-r--r-- | drivers/net/sfc/falcon.c | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/drivers/net/sfc/falcon.c b/drivers/net/sfc/falcon.c index 47507b67ba8..34b475e9b29 100644 --- a/drivers/net/sfc/falcon.c +++ b/drivers/net/sfc/falcon.c @@ -127,9 +127,6 @@ MODULE_PARM_DESC(rx_xon_thresh_bytes, "RX fifo XON threshold"); ************************************************************************** */ -/* TX DMA length mask (13-bit) */ -#define FALCON_TX_DMA_MASK (4096 - 1) - /* Size and alignment of special buffers (4KB) */ #define FALCON_BUF_SIZE 4096 @@ -3146,8 +3143,6 @@ struct efx_nic_type falcon_a_nic_type = { .evq_ptr_tbl_base = FR_AA_EVQ_PTR_TBL_KER, .evq_rptr_tbl_base = FR_AA_EVQ_RPTR_KER, .max_dma_mask = DMA_BIT_MASK(FSF_AZ_TX_KER_BUF_ADDR_WIDTH), - .tx_dma_mask = FALCON_TX_DMA_MASK, - .bug5391_mask = 0xf, .rx_buffer_padding = 0x24, .max_interrupt_mode = EFX_INT_MODE_MSI, .phys_addr_channels = 4, @@ -3167,8 +3162,6 @@ struct efx_nic_type falcon_b_nic_type = { .evq_ptr_tbl_base = FR_BZ_EVQ_PTR_TBL, .evq_rptr_tbl_base = FR_BZ_EVQ_RPTR, .max_dma_mask = DMA_BIT_MASK(FSF_AZ_TX_KER_BUF_ADDR_WIDTH), - .tx_dma_mask = FALCON_TX_DMA_MASK, - .bug5391_mask = 0, .rx_buffer_padding = 0, .max_interrupt_mode = EFX_INT_MODE_MSIX, .phys_addr_channels = 32, /* Hardware limit is 64, but the legacy |