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authorMichael Barkowski <michael.barkowski@freescale.com>2007-04-13 01:26:15 -0500
committerJeff Garzik <jeff@garzik.org>2007-04-28 11:01:04 -0400
commit7563907eb8aad8f15b6a39fa6d863c091d83ef48 (patch)
tree6fc5b8f2f5c0bd7845cefba8352cad7b2b84deda /drivers/net/ucc_geth.h
parent702ff12ce7e9643084232a8d50b0b1eec26026ae (diff)
ucc_geth: Fix interrupt coalescing size and alignment
The rx interrupt coalescing table alignment was "guessed" to be 4, but should be 64. The size should be 8 * number of queues + 4. Verified in the MPC8323E manual. Signed-off-by: Michael Barkowski <Michael.Barkowski@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/net/ucc_geth.h')
-rw-r--r--drivers/net/ucc_geth.h3
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/net/ucc_geth.h b/drivers/net/ucc_geth.h
index 7cf3dbc9fd4..a29e1c3ca4b 100644
--- a/drivers/net/ucc_geth.h
+++ b/drivers/net/ucc_geth.h
@@ -867,8 +867,7 @@ struct ucc_geth_hardware_statistics {
#define UCC_GETH_SCHEDULER_ALIGNMENT 4 /* This is a guess */
#define UCC_GETH_TX_STATISTICS_ALIGNMENT 4 /* This is a guess */
#define UCC_GETH_RX_STATISTICS_ALIGNMENT 4 /* This is a guess */
-#define UCC_GETH_RX_INTERRUPT_COALESCING_ALIGNMENT 4 /* This is a
- guess */
+#define UCC_GETH_RX_INTERRUPT_COALESCING_ALIGNMENT 64
#define UCC_GETH_RX_BD_QUEUES_ALIGNMENT 8 /* This is a guess */
#define UCC_GETH_RX_PREFETCHED_BDS_ALIGNMENT 128 /* This is a guess */
#define UCC_GETH_RX_EXTENDED_FILTERING_GLOBAL_PARAMETERS_ALIGNMENT 4 /* This