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authorStephen Hemminger <shemminger@linux-foundation.org>2007-08-21 14:34:02 -0700
committerJeff Garzik <jeff@garzik.org>2007-08-25 02:31:06 -0400
commitb23457737f073eaf5a7b797c2a195f83633e003d (patch)
tree780b7c20dfab64d68a5cad47a96ce96bfd1724f1 /drivers/net
parentc46ac9463fbdee41723dd9fd108b2c1ffd30615f (diff)
sky2: clear PCI power control reg at startup
Make sure PCI register for PHY power gets cleared on boot, and make sure to avoid any PCI posting problems. Signed-off-by: Stephen Hemminger <shemminger@linux-foundation.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/net')
-rw-r--r--drivers/net/sky2.c7
1 files changed, 6 insertions, 1 deletions
diff --git a/drivers/net/sky2.c b/drivers/net/sky2.c
index 75759243639..33ba3486389 100644
--- a/drivers/net/sky2.c
+++ b/drivers/net/sky2.c
@@ -219,9 +219,12 @@ static void sky2_power_on(struct sky2_hw *hw)
else
sky2_write8(hw, B2_Y2_CLK_GATE, 0);
- if (hw->chip_id == CHIP_ID_YUKON_EC_U || hw->chip_id == CHIP_ID_YUKON_EX) {
+ if (hw->chip_id == CHIP_ID_YUKON_EC_U ||
+ hw->chip_id == CHIP_ID_YUKON_EX) {
u32 reg;
+ sky2_pci_write32(hw, PCI_DEV_REG3, 0);
+
reg = sky2_pci_read32(hw, PCI_DEV_REG4);
/* set all bits to 0 except bits 15..12 and 8 */
reg &= P_ASPM_CONTROL_MSK;
@@ -238,6 +241,8 @@ static void sky2_power_on(struct sky2_hw *hw)
reg = sky2_read32(hw, B2_GP_IO);
reg |= GLB_GPIO_STAT_RACE_DIS;
sky2_write32(hw, B2_GP_IO, reg);
+
+ sky2_read32(hw, B2_GP_IO);
}
}