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authorRoland Dreier <rolandd@cisco.com>2007-10-09 19:59:06 -0700
committerRoland Dreier <rolandd@cisco.com>2007-10-09 19:59:06 -0700
commitd7dc3ccbe4dd1d37950da0138079e61d5be06ca9 (patch)
tree6391db1b61ae23c34c351b617803d31dc9255804 /drivers/net
parentca6de177acef8f2c7c3901ea583a263364ca7bbb (diff)
IB/mlx4: Fix up SRQ limit_watermark endianness
mlx4_srq_query() returns a big-endian 16-bit value through an int *, which screws up sparse checking. Fix this so that a CPU-endian value is returned. Signed-off-by: Roland Dreier <rolandd@cisco.com>
Diffstat (limited to 'drivers/net')
-rw-r--r--drivers/net/mlx4/srq.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/net/mlx4/srq.c b/drivers/net/mlx4/srq.c
index b061c86d683..31b255a3291 100644
--- a/drivers/net/mlx4/srq.c
+++ b/drivers/net/mlx4/srq.c
@@ -227,7 +227,7 @@ int mlx4_srq_query(struct mlx4_dev *dev, struct mlx4_srq *srq, int *limit_waterm
err = mlx4_QUERY_SRQ(dev, mailbox, srq->srqn);
if (err)
goto err_out;
- *limit_watermark = srq_context->limit_watermark;
+ *limit_watermark = be16_to_cpu(srq_context->limit_watermark);
err_out:
mlx4_free_cmd_mailbox(dev, mailbox);