diff options
author | Paul Walmsley <paul@pwsan.com> | 2008-07-03 12:24:45 +0300 |
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committer | Tony Lindgren <tony@atomide.com> | 2008-07-03 12:24:45 +0300 |
commit | 542313cc98e72d026d2df86f515699dfaface460 (patch) | |
tree | 94bc87268a67cd1fff2d63cf48761f137384607d /drivers/pci/pcie | |
parent | 097c584cd48844d9ef8402bdc6ab49e7e2135f31 (diff) |
ARM: OMAP2: Clock: Add OMAP3 DPLL autoidle functions
This patch adds support for DPLL autoidle control to the OMAP3 clock
framework. These functions will be used by the noncore DPLL enable
and disable code - this is because, according to the CDP code, the
DPLL autoidle status must be saved and restored across DPLL
lock/bypass/off transitions.
N.B.: the CORE DPLL (DPLL3) has three autoidle mode options, rather
than just two. This code currently does not support the third option,
low-power bypass autoidle.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'drivers/pci/pcie')
0 files changed, 0 insertions, 0 deletions