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authorDavid Brownell <dbrownell@users.sourceforge.net>2009-03-13 17:54:54 -0700
committerLiam Girdwood <lrg@slimlogic.co.uk>2009-03-31 09:56:28 +0100
commit52914eaa49bf732b091dbf5467ce4c7507c2d32a (patch)
treeaaa1b1f305e6c556320c89cfaaa8b47fea89fc29 /drivers/regulator
parentcd94b5053081963614f6ad77b9b66a7968056c84 (diff)
twl4030-regulator: expose VPLL2
Add VPLL2 to the set of twl4030-family regulators exposed for use by various drivers. It's commonly used to power the digital video outputs (e.g. LCD or DVI displays) on OMAP3 systems. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk>
Diffstat (limited to 'drivers/regulator')
-rw-r--r--drivers/regulator/twl4030-regulator.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/regulator/twl4030-regulator.c b/drivers/regulator/twl4030-regulator.c
index 49c41fc60aa..f3ec98c83e9 100644
--- a/drivers/regulator/twl4030-regulator.c
+++ b/drivers/regulator/twl4030-regulator.c
@@ -396,8 +396,8 @@ static struct twlreg_info twl4030_regs[] = {
TWL_ADJUSTABLE_LDO(VMMC2, 0x2b, 6),
/*
TWL_ADJUSTABLE_LDO(VPLL1, 0x2f, 7),
- TWL_ADJUSTABLE_LDO(VPLL2, 0x33, 8),
*/
+ TWL_ADJUSTABLE_LDO(VPLL2, 0x33, 8),
TWL_ADJUSTABLE_LDO(VSIM, 0x37, 9),
TWL_ADJUSTABLE_LDO(VDAC, 0x3b, 10),
/*