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authorAndrew Vasquez <andrew.vasquez@qlogic.com>2006-06-23 16:10:39 -0700
committerJames Bottomley <jejb@mulgrave.il.steeleye.com>2006-06-26 16:21:55 -0500
commitd4c760c2119fca982f335d83ff9095479c5d6737 (patch)
tree63aad21ecfd0deb720e1367df4e87035cf6fc435 /drivers/scsi
parent395e0808fad28b08b982dd9f299fe4723e7c579b (diff)
[SCSI] qla2xxx: Add NVRAM 'Disable Serdes' bit support.
The host section of ISP24xx NVRAMs contain a new bit which allows a user to selectively disable ports of an HBA. These ports (hosts) will not be presented to the midlayer. Signed-off-by: Andrew Vasquez <andrew.vasquez@qlogic.com> Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
Diffstat (limited to 'drivers/scsi')
-rw-r--r--drivers/scsi/qla2xxx/qla_def.h1
-rw-r--r--drivers/scsi/qla2xxx/qla_fw.h2
-rw-r--r--drivers/scsi/qla2xxx/qla_init.c13
3 files changed, 15 insertions, 1 deletions
diff --git a/drivers/scsi/qla2xxx/qla_def.h b/drivers/scsi/qla2xxx/qla_def.h
index 653e22e490a..dfcd3a2dd7c 100644
--- a/drivers/scsi/qla2xxx/qla_def.h
+++ b/drivers/scsi/qla2xxx/qla_def.h
@@ -2044,6 +2044,7 @@ typedef struct scsi_qla_host {
uint32_t enable_led_scheme :1;
uint32_t msi_enabled :1;
uint32_t msix_enabled :1;
+ uint32_t disable_serdes :1;
} flags;
atomic_t loop_state;
diff --git a/drivers/scsi/qla2xxx/qla_fw.h b/drivers/scsi/qla2xxx/qla_fw.h
index 3af478663be..af023f51fe7 100644
--- a/drivers/scsi/qla2xxx/qla_fw.h
+++ b/drivers/scsi/qla2xxx/qla_fw.h
@@ -141,7 +141,7 @@ struct nvram_24xx {
* BIT 2 = Enable Memory Map BIOS
* BIT 3 = Enable Selectable Boot
* BIT 4 = Disable RISC code load
- * BIT 5 =
+ * BIT 5 = Disable Serdes
* BIT 6 =
* BIT 7 =
*
diff --git a/drivers/scsi/qla2xxx/qla_init.c b/drivers/scsi/qla2xxx/qla_init.c
index 880de6f380e..2ccdd848bcf 100644
--- a/drivers/scsi/qla2xxx/qla_init.c
+++ b/drivers/scsi/qla2xxx/qla_init.c
@@ -89,6 +89,17 @@ qla2x00_initialize_adapter(scsi_qla_host_t *ha)
ha->isp_ops.nvram_config(ha);
+ if (ha->flags.disable_serdes) {
+ /* Mask HBA via NVRAM settings? */
+ qla_printk(KERN_INFO, ha, "Masking HBA WWPN "
+ "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n",
+ ha->port_name[0], ha->port_name[1],
+ ha->port_name[2], ha->port_name[3],
+ ha->port_name[4], ha->port_name[5],
+ ha->port_name[6], ha->port_name[7]);
+ return QLA_FUNCTION_FAILED;
+ }
+
qla_printk(KERN_INFO, ha, "Verifying loaded RISC code...\n");
retry = 10;
@@ -1639,6 +1650,7 @@ qla2x00_nvram_config(scsi_qla_host_t *ha)
ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
+ ha->flags.disable_serdes = 0;
ha->operating_mode =
(icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
@@ -3450,6 +3462,7 @@ qla24xx_nvram_config(scsi_qla_host_t *ha)
ha->flags.enable_lip_full_login = 1;
ha->flags.enable_target_reset = 1;
ha->flags.enable_led_scheme = 0;
+ ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
(BIT_6 | BIT_5 | BIT_4)) >> 4;