diff options
| author | Albert Lee <albertcc@tw.ibm.com> | 2005-11-16 17:06:18 +0800 |
|---|---|---|
| committer | Jeff Garzik <jgarzik@pobox.com> | 2005-11-16 07:59:22 -0500 |
| commit | 75b1f2f865c6e6c6c04e2779750192b8d3d504e8 (patch) | |
| tree | 9e95f56cc033943f26c21c61377cb7e8ed0d8b4b /drivers/scsi | |
| parent | d10cb35a876c72b4b6711a366e341a1e4d8aa709 (diff) | |
[PATCH] libata: honor the transfer cycle time speficied by the EIDE device
The following code segment is not functional because the transfer cycle time speficied by
the EIDE device is later overwritten by ata_timing_quantize():
/*
* If the drive is an EIDE drive, it can tell us it needs extended
* PIO/MW_DMA cycle timing.
*/
if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
memset(&p, 0, sizeof(p));
(snip)
ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
<== uninitialized "t" is used here
}
/*
* Convert the timing to bus clock counts.
*/
ata_timing_quantize(s, t, T, UT); <== t is overwritten by quantized s
The patch has been submitted for ide-timing.h before:
http://marc.theaimsgroup.com/?l=linux-ide&m=110820013425454&w=2
Resubmitted for libata.
Changes:
- Minor fix to honor the following transfer cycle time speficied by the device
- id[65]: Minimum Multiword DMA transfer cycle time per word
- id[67]: Minimum PIO transfer cycle time without flow control
- id[68]: Minimum PIO transfer cycle time with IORDY
Signed-off-by: Albert Lee <albertcc@tw.ibm.com>
=======
Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
Diffstat (limited to 'drivers/scsi')
| -rw-r--r-- | drivers/scsi/libata-core.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/scsi/libata-core.c b/drivers/scsi/libata-core.c index ba1eb8b38e0..bb604dfbdef 100644 --- a/drivers/scsi/libata-core.c +++ b/drivers/scsi/libata-core.c @@ -1570,11 +1570,13 @@ int ata_timing_compute(struct ata_device *adev, unsigned short speed, /* * Find the mode. - */ + */ if (!(s = ata_timing_find_mode(speed))) return -EINVAL; + memcpy(t, s, sizeof(*s)); + /* * If the drive is an EIDE drive, it can tell us it needs extended * PIO/MW_DMA cycle timing. @@ -1595,7 +1597,7 @@ int ata_timing_compute(struct ata_device *adev, unsigned short speed, * Convert the timing to bus clock counts. */ - ata_timing_quantize(s, t, T, UT); + ata_timing_quantize(t, t, T, UT); /* * Even in DMA/UDMA modes we still use PIO access for IDENTIFY, S.M.A.R.T |