diff options
author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2008-12-13 09:12:51 +0000 |
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committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-12-13 09:12:51 +0000 |
commit | 72aaf09fda49f5919d98d65d35e5179f3acb0497 (patch) | |
tree | 5fd25748f7f5640f8ee8efb86ddca88d12840791 /drivers/video/aty/radeon_accel.c | |
parent | 67fbc2312312095acc2f19a0b601bac10f84cf9d (diff) | |
parent | 58c2467355ed3154a12ee49d8f8236547145c9d3 (diff) |
Merge git://git.marvell.com/orion into devel
Diffstat (limited to 'drivers/video/aty/radeon_accel.c')
-rw-r--r-- | drivers/video/aty/radeon_accel.c | 21 |
1 files changed, 12 insertions, 9 deletions
diff --git a/drivers/video/aty/radeon_accel.c b/drivers/video/aty/radeon_accel.c index 8718f7349d6..a547e5d4c8b 100644 --- a/drivers/video/aty/radeon_accel.c +++ b/drivers/video/aty/radeon_accel.c @@ -174,12 +174,12 @@ static void radeonfb_prim_imageblit(struct radeonfb_info *rinfo, const struct fb_image *image, u32 fg, u32 bg) { - unsigned int src_bytes, dwords; + unsigned int dwords; u32 *bits; radeonfb_set_creg(rinfo, DP_GUI_MASTER_CNTL, &rinfo->dp_gui_mc_cache, rinfo->dp_gui_mc_base | - GMC_BRUSH_NONE | + GMC_BRUSH_NONE | GMC_DST_CLIP_LEAVE | GMC_SRC_DATATYPE_MONO_FG_BG | ROP3_S | GMC_BYTE_ORDER_MSB_TO_LSB | @@ -189,9 +189,6 @@ static void radeonfb_prim_imageblit(struct radeonfb_info *rinfo, radeonfb_set_creg(rinfo, DP_SRC_FRGD_CLR, &rinfo->dp_src_fg_cache, fg); radeonfb_set_creg(rinfo, DP_SRC_BKGD_CLR, &rinfo->dp_src_bg_cache, bg); - radeon_fifo_wait(rinfo, 1); - OUTREG(DST_Y_X, (image->dy << 16) | image->dx); - /* Ensure the dst cache is flushed and the engine idle before * issuing the operation. * @@ -205,13 +202,19 @@ static void radeonfb_prim_imageblit(struct radeonfb_info *rinfo, /* X here pads width to a multiple of 32 and uses the clipper to * adjust the result. Is that really necessary ? Things seem to - * work ok for me without that and the doco doesn't seem to imply + * work ok for me without that and the doco doesn't seem to imply] * there is such a restriction. */ - OUTREG(DST_WIDTH_HEIGHT, (image->width << 16) | image->height); + radeon_fifo_wait(rinfo, 4); + OUTREG(SC_TOP_LEFT, (image->dy << 16) | image->dx); + OUTREG(SC_BOTTOM_RIGHT, ((image->dy + image->height) << 16) | + (image->dx + image->width)); + OUTREG(DST_Y_X, (image->dy << 16) | image->dx); + + OUTREG(DST_HEIGHT_WIDTH, (image->height << 16) | ((image->width + 31) & ~31)); - src_bytes = (((image->width * image->depth) + 7) / 8) * image->height; - dwords = (src_bytes + 3) / 4; + dwords = (image->width + 31) >> 5; + dwords *= image->height; bits = (u32*)(image->data); while(dwords >= 8) { |