diff options
| author | Krzysztof Halasa <khc@pm.waw.pl> | 2007-10-16 01:29:31 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-10-16 09:43:19 -0700 |
| commit | 689c9568f54747c13f287ae53956281e7cd810fa (patch) | |
| tree | 1ab59495fc6e5203e7814cb927fd7ddd079d5c81 /drivers/video/intelfb/intelfbhw.h | |
| parent | 53ee1b5bbf937be29862ae8b3ea13af444af1f36 (diff) | |
Intel FB: whitespace, bracket and other clean-ups
Intel FB: whitespace, bracket and other clean-ups
Signed-off-by: Krzysztof Halasa <khc@pm.waw.pl>
Cc: "Antonino A. Daplas" <adaplas@pol.net>
Cc: <sylvain.meyer@worldonline.fr>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/video/intelfb/intelfbhw.h')
| -rw-r--r-- | drivers/video/intelfb/intelfbhw.h | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/drivers/video/intelfb/intelfbhw.h b/drivers/video/intelfb/intelfbhw.h index cfcd5374948..1a4df251b54 100644 --- a/drivers/video/intelfb/intelfbhw.h +++ b/drivers/video/intelfb/intelfbhw.h @@ -83,7 +83,7 @@ */ #define RING_MIN_FREE 64 -#define IPEHR 0x2088 +#define IPEHR 0x2088 #define INSTDONE 0x2090 #define PRI_RING_EMPTY 1 @@ -128,9 +128,9 @@ #define GPIOA 0x5010 #define GPIOB 0x5014 -#define GPIOC 0x5018 // this may be external DDC on i830 -#define GPIOD 0x501C // this is DVO DDC -#define GPIOE 0x5020 // this is DVO i2C +#define GPIOC 0x5018 /* this may be external DDC on i830 */ +#define GPIOD 0x501C /* this is DVO DDC */ +#define GPIOE 0x5020 /* this is DVO i2C */ #define GPIOF 0x5024 /* PLL registers */ @@ -269,8 +269,8 @@ #define PORT_ENABLE (1 << 31) #define PORT_PIPE_SELECT_SHIFT 30 #define PORT_TV_FLAGS_MASK 0xFF -#define PORT_TV_FLAGS 0xC4 // ripped from my BIOS - // to understand and correct +#define PORT_TV_FLAGS 0xC4 /* ripped from my BIOS + to understand and correct */ #define DVOA_SRCDIM 0x61124 #define DVOB_SRCDIM 0x61144 @@ -369,7 +369,7 @@ #define DISPPLANE_8BPP (0x2<<26) #define DISPPLANE_15_16BPP (0x4<<26) #define DISPPLANE_16BPP (0x5<<26) -#define DISPPLANE_32BPP_NO_ALPHA (0x6<<26) +#define DISPPLANE_32BPP_NO_ALPHA (0x6<<26) #define DISPPLANE_32BPP (0x7<<26) #define DISPPLANE_STEREO_ENABLE (1<<25) #define DISPPLANE_STEREO_DISABLE 0 |