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authorHaavard Skinnemoen <haavard.skinnemoen@atmel.com>2008-09-30 13:55:33 +0200
committerDavid Woodhouse <David.Woodhouse@intel.com>2008-10-18 12:53:15 +0100
commitbe8f78b8e8b5bcafc19ac85b815e98049aa86314 (patch)
treeb0dc5f12b267365743faa23130b7534c59f05966 /drivers
parentaaf7ea20000436df3cbb397ccb734ad1e2e5164d (diff)
[MTD] [NOR] AT49BV6416 has swapped erase regions
The CFI information read from AT49BV6416 lists the erase regions in the wrong order, causing problems when trying to erase or update the first or last 64KiB block. Work around this by inverting the "top boot" flag, which will effectively reverse the order of the erase regions. This chip is obsolete, but it's used in some existing designs. Signed-off-by: HÃ¥vard Skinnemoen <haavard.skinnemoen@atmel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/mtd/chips/cfi_cmdset_0002.c16
1 files changed, 12 insertions, 4 deletions
diff --git a/drivers/mtd/chips/cfi_cmdset_0002.c b/drivers/mtd/chips/cfi_cmdset_0002.c
index db16b7b0723..3e6f5d8609e 100644
--- a/drivers/mtd/chips/cfi_cmdset_0002.c
+++ b/drivers/mtd/chips/cfi_cmdset_0002.c
@@ -213,10 +213,18 @@ static void fixup_convert_atmel_pri(struct mtd_info *mtd, void *param)
if (atmel_pri.Features & 0x02)
extp->EraseSuspend = 2;
- if (atmel_pri.BottomBoot)
- extp->TopBottom = 2;
- else
- extp->TopBottom = 3;
+ /* Some chips got it backwards... */
+ if (cfi->id == AT49BV6416) {
+ if (atmel_pri.BottomBoot)
+ extp->TopBottom = 3;
+ else
+ extp->TopBottom = 2;
+ } else {
+ if (atmel_pri.BottomBoot)
+ extp->TopBottom = 2;
+ else
+ extp->TopBottom = 3;
+ }
/* burst write mode not supported */
cfi->cfiq->BufWriteTimeoutTyp = 0;