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authorBruce Allan <bruce.w.allan@intel.com>2006-10-24 14:45:58 -0700
committerAuke Kok <juke-jan.h.kok@intel.com>2006-10-24 14:45:58 -0700
commit225a5dbd68f5271b7425f2f783ae64a1f6863b51 (patch)
treea582841e2679f0955f3c02d8abe96d2252375c78 /drivers
parentdc1f71f6b30c258704885cd488582eb3d68b3e8e (diff)
e1000: FIX: fix wrong txdctl threshold bitmasks
Threshold bitmasks for prefetch, host and writeback were clearing bits that they were not supposed to. The leftmost 2 bits in the byte for each threshold are reserved. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/e1000/e1000_hw.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/net/e1000/e1000_hw.h b/drivers/net/e1000/e1000_hw.h
index 112447fd8bf..449a60303e0 100644
--- a/drivers/net/e1000/e1000_hw.h
+++ b/drivers/net/e1000/e1000_hw.h
@@ -1961,9 +1961,9 @@ struct e1000_hw {
#define E1000_RXDCTL_GRAN 0x01000000 /* RXDCTL Granularity */
/* Transmit Descriptor Control */
-#define E1000_TXDCTL_PTHRESH 0x000000FF /* TXDCTL Prefetch Threshold */
-#define E1000_TXDCTL_HTHRESH 0x0000FF00 /* TXDCTL Host Threshold */
-#define E1000_TXDCTL_WTHRESH 0x00FF0000 /* TXDCTL Writeback Threshold */
+#define E1000_TXDCTL_PTHRESH 0x0000003F /* TXDCTL Prefetch Threshold */
+#define E1000_TXDCTL_HTHRESH 0x00003F00 /* TXDCTL Host Threshold */
+#define E1000_TXDCTL_WTHRESH 0x003F0000 /* TXDCTL Writeback Threshold */
#define E1000_TXDCTL_GRAN 0x01000000 /* TXDCTL Granularity */
#define E1000_TXDCTL_LWTHRESH 0xFE000000 /* TXDCTL Low Threshold */
#define E1000_TXDCTL_FULL_TX_DESC_WB 0x01010000 /* GRAN=1, WTHRESH=1 */