diff options
| author | Senthil Balasubramanian <senthilkumar@atheros.com> | 2009-09-17 09:28:21 +0530 |
|---|---|---|
| committer | John W. Linville <linville@tuxdriver.com> | 2009-09-23 11:35:52 -0400 |
| commit | d865ca6c147552a1c38161e2e262c4ab59e762d6 (patch) | |
| tree | 9017954e64712795781af5f2513843039350fa46 /drivers | |
| parent | 42abfbee23bf86e2c74d569b7ddd040d29782c5a (diff) | |
ath9k: Fix bug in chain handling
* This patch fixes a bug in calculating the scaled
power for three chain chipsets.
* Also, a delay is needed after setting DAC low-power mode in
TOP1 RF register (Top Level Register Bits).
Signed-off-by: Senthil Balasubramanian <senthilkumar@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/net/wireless/ath/ath9k/eeprom_def.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/net/wireless/ath/ath9k/eeprom_def.c b/drivers/net/wireless/ath/ath9k/eeprom_def.c index ae7fb5dcb26..4071fc91da0 100644 --- a/drivers/net/wireless/ath/ath9k/eeprom_def.c +++ b/drivers/net/wireless/ath/ath9k/eeprom_def.c @@ -509,6 +509,8 @@ static void ath9k_hw_def_set_board_values(struct ath_hw *ah, REG_RMW_FIELD(ah, AR_AN_TOP1, AR_AN_TOP1_DACIPMODE, eep->baseEepHeader.dacLpMode); + udelay(100); + REG_RMW_FIELD(ah, AR_PHY_FRAME_CTL, AR_PHY_FRAME_CTL_TX_CLIP, pModal->miscBits >> 2); @@ -902,7 +904,7 @@ static void ath9k_hw_set_def_power_per_rate_table(struct ath_hw *ah, u16 powerLimit) { #define REDUCE_SCALED_POWER_BY_TWO_CHAIN 6 /* 10*log10(2)*2 */ -#define REDUCE_SCALED_POWER_BY_THREE_CHAIN 10 /* 10*log10(3)*2 */ +#define REDUCE_SCALED_POWER_BY_THREE_CHAIN 9 /* 10*log10(3)*2 */ struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah); struct ar5416_eeprom_def *pEepData = &ah->eeprom.def; |