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authorBen Dooks <ben-linux@fluff.org>2008-05-22 16:36:45 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-07-03 16:36:03 +0100
commit05a78966395c5a115be3d38f6eb82efc94ee45b0 (patch)
tree24a9fbd42ba74d37d2a17c0193df27e37aad3e5c /drivers
parent543cf4cb3fe6f6cae3651ba918b9c56200b257d0 (diff)
[ARM] 5050/1: S3C2410: Cleanup header on S3C2410 serial driver
Remove the changelog which should really be found in the version control system. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/serial/s3c2410.c35
1 files changed, 4 insertions, 31 deletions
diff --git a/drivers/serial/s3c2410.c b/drivers/serial/s3c2410.c
index 2b6a013639e..c32cf93d7a4 100644
--- a/drivers/serial/s3c2410.c
+++ b/drivers/serial/s3c2410.c
@@ -1,36 +1,9 @@
-/*
- * linux/drivers/serial/s3c2410.c
- *
- * Driver for onboard UARTs on the Samsung S3C24XX
- *
- * Based on drivers/char/serial.c and drivers/char/21285.c
- *
- * Ben Dooks, (c) 2003-2005 Simtec Electronics
- * http://www.simtec.co.uk/products/SWLINUX/
- *
- * Changelog:
- *
- * 22-Jul-2004 BJD Finished off device rewrite
- *
- * 21-Jul-2004 BJD Thanks to <herbet@13thfloor.at> for pointing out
- * problems with baud rate and loss of IR settings. Update
- * to add configuration via platform_device structure
- *
- * 28-Sep-2004 BJD Re-write for the following items
- * - S3C2410 and S3C2440 serial support
- * - Power Management support
- * - Fix console via IrDA devices
- * - SysReq (Herbert Pötzl)
- * - Break character handling (Herbert Pötzl)
- * - spin-lock initialisation (Dimitry Andric)
- * - added clock control
- * - updated init code to use platform_device info
- *
- * 06-Mar-2005 BJD Add s3c2440 fclk clock source
+/* linux/drivers/serial/s3c2410.c
*
- * 09-Mar-2005 BJD Add s3c2400 support
+ * Driver for Samsung SoC onboard UARTs.
*
- * 10-Mar-2005 LCVR Changed S3C2410_VA_UART to S3C24XX_VA_UART
+ * Ben Dooks, Copyright (c) 2003-2005 Simtec Electronics
+ * http://armlinux.simtec.co.uk/
*/
/* Note on 2440 fclk clock source handling