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authorBrice Goglin <brice@myri.com>2007-03-21 19:45:18 +0100
committerJeff Garzik <jeff@garzik.org>2007-03-23 01:48:34 -0400
commitaafa70eb56edd1cd5332c978bf9b5e224373c980 (patch)
tree3eb8e198f279e411c0735758f36900d9ed5723d4 /drivers
parentd57ab6fdde30816581f7b0a4fe3c015b3f41f9ca (diff)
myri10ge: Serverworks HT2100 provides aligned PCIe completion
[PATCH 1/4] myri10ge: Serverworks HT2100 provides aligned PCIe completion Use the regular firmware on Serverworks HT2100 PCIe ports since this chipset provides aligned PCIe completion. Signed-off-by: Brice Goglin <brice@myri.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/myri10ge/myri10ge.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/net/myri10ge/myri10ge.c b/drivers/net/myri10ge/myri10ge.c
index ac02b3b60f9..e7f9c088ebb 100644
--- a/drivers/net/myri10ge/myri10ge.c
+++ b/drivers/net/myri10ge/myri10ge.c
@@ -2483,6 +2483,8 @@ static void myri10ge_enable_ecrc(struct myri10ge_priv *mgp)
#define PCI_DEVICE_ID_INTEL_E5000_PCIE23 0x25f7
#define PCI_DEVICE_ID_INTEL_E5000_PCIE47 0x25fa
+#define PCI_DEVICE_ID_SERVERWORKS_HT2100_PCIE_FIRST 0x140
+#define PCI_DEVICE_ID_SERVERWORKS_HT2100_PCIE_LAST 0x142
static void myri10ge_select_firmware(struct myri10ge_priv *mgp)
{
@@ -2514,6 +2516,12 @@ static void myri10ge_select_firmware(struct myri10ge_priv *mgp)
((bridge->vendor == PCI_VENDOR_ID_SERVERWORKS
&& bridge->device ==
PCI_DEVICE_ID_SERVERWORKS_HT2000_PCIE)
+ /* ServerWorks HT2100 */
+ || (bridge->vendor == PCI_VENDOR_ID_SERVERWORKS
+ && bridge->device >=
+ PCI_DEVICE_ID_SERVERWORKS_HT2100_PCIE_FIRST
+ && bridge->device <=
+ PCI_DEVICE_ID_SERVERWORKS_HT2100_PCIE_LAST)
/* All Intel E5000 PCIE ports */
|| (bridge->vendor == PCI_VENDOR_ID_INTEL
&& bridge->device >=