diff options
author | Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> | 2006-09-26 15:27:56 -0700 |
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committer | Tony Luck <tony.luck@intel.com> | 2006-09-26 15:27:56 -0700 |
commit | ddb4f0df0424d174567a011a176782ffa4202071 (patch) | |
tree | 81eeb2f18b3a4a295c87673493c2b113c6cf9393 /fs/udf/fsync.c | |
parent | b29e7132b5a9f2496beed37beef7ba4d010afb2c (diff) |
[IA64] CMC/CPE: Reverse the order of fetching log and checking poll threshold
This patch reverses the order of fetching log from SAL and
checking poll threshold. This will fix following trivial issues:
- If SAL_GET_SATE_INFO is unbelievably slow (due to huge system
or just its silly implementation) and if it takes more than
1/5 sec, CMCI/CPEI will never switch to CMCP/CPEP.
- Assuming terrible flood of interrupt (continuous corrected
errors let all CPUs enter to handler at once and bind them
in it), CPUs will be serialized by IA64_LOG_LOCK(*).
Now we check the poll threshold after the lock and log fetch,
so we need to call SAL_GET_STATE_INFO (num_online_cpus() + 4)
times in the worst case.
if we can check the threshold before the lock, we can shut up
interrupts quickly without waiting preceding log fetches, and
the number of times will be reduced to (num_online_cpus()) in
the same situation.
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'fs/udf/fsync.c')
0 files changed, 0 insertions, 0 deletions