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authorStephane Eranian <eranian@hpl.hp.com>2007-05-02 19:27:05 +0200
committerAndi Kleen <andi@basil.nowhere.org>2007-05-02 19:27:05 +0200
commit405e494d91bac85cc992f55ad434b0f325e399a5 (patch)
tree2af37f5ad441730e7ebc0846d09a9402d21c3fc9 /fs/xfs/xfs_dir2_block.h
parentbf8696ed6dfa561198b4736deaf11ab68dcc4845 (diff)
[PATCH] x86-64: x86_64 make NMI use PERFCTR1 for architectural perfmon (take 2)
Hello, This patch against 2.6.20-git14 makes the NMI watchdog use PERFSEL1/PERFCTR1 instead of PERFSEL0/PERFCTR0 on processors supporting Intel architectural perfmon, such as Intel Core 2. Although all PMU events can work on both counters, the Precise Event-Based Sampling (PEBS) requires that the event be in PERFCTR0 to work correctly (see section 18.14.4.1 in the IA32 SDM Vol 3b). This versions has 3 chunks compared to previous where we had missed on check. Changelog: - make the x86-64 NMI watchdog use PERFSEL1/PERFCTR1 instead of PERFSEL0/PERFCTR0 on processors supporting the Intel architectural perfmon (e.g. Core 2 Duo). This allows PEBS to work when the NMI watchdog is active. signed-off-by: stephane eranian <eranian@hpl.hp.com> Signed-off-by: Andi Kleen <ak@suse.de>
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