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authorJeff Garzik <jgarzik@pobox.com>2005-10-28 12:29:23 -0400
committerJeff Garzik <jgarzik@pobox.com>2005-10-28 12:29:23 -0400
commit7a9f8f93d2dad38f30fbc79d8a1e6517373aa4b6 (patch)
tree9116e5bde860d00685c5b6eee7be5ba9899aabb9 /include/asm-arm/arch-ixp4xx
parent972c26bdd6b58e7534473c4f7928584578cf43f4 (diff)
parent5fadd053d9bb4345ec6f405d24db4e7eb49cf81e (diff)
Merge branch 'master'
Diffstat (limited to 'include/asm-arm/arch-ixp4xx')
-rw-r--r--include/asm-arm/arch-ixp4xx/entry-macro.S9
-rw-r--r--include/asm-arm/arch-ixp4xx/hardware.h2
2 files changed, 6 insertions, 5 deletions
diff --git a/include/asm-arm/arch-ixp4xx/entry-macro.S b/include/asm-arm/arch-ixp4xx/entry-macro.S
index 455da64832d..323b0bc4a39 100644
--- a/include/asm-arm/arch-ixp4xx/entry-macro.S
+++ b/include/asm-arm/arch-ixp4xx/entry-macro.S
@@ -15,25 +15,26 @@
ldr \irqstat, =(IXP4XX_INTC_BASE_VIRT+IXP4XX_ICIP_OFFSET)
ldr \irqstat, [\irqstat] @ get interrupts
cmp \irqstat, #0
- beq 1001f
+ beq 1001f @ upper IRQ?
clz \irqnr, \irqstat
mov \base, #31
- subs \irqnr, \base, \irqnr
+ sub \irqnr, \base, \irqnr
+ b 1002f @ lower IRQ being
+ @ handled
1001:
/*
* IXP465 has an upper IRQ status register
*/
#if defined(CONFIG_CPU_IXP46X)
- bne 1002f
ldr \irqstat, =(IXP4XX_INTC_BASE_VIRT+IXP4XX_ICIP2_OFFSET)
ldr \irqstat, [\irqstat] @ get upper interrupts
mov \irqnr, #63
clz \irqstat, \irqstat
cmp \irqstat, #32
subne \irqnr, \irqnr, \irqstat
-1002:
#endif
+1002:
.endm
diff --git a/include/asm-arm/arch-ixp4xx/hardware.h b/include/asm-arm/arch-ixp4xx/hardware.h
index 4ac964b9078..55d85eea8c1 100644
--- a/include/asm-arm/arch-ixp4xx/hardware.h
+++ b/include/asm-arm/arch-ixp4xx/hardware.h
@@ -27,7 +27,7 @@
#define pcibios_assign_all_busses() 1
-#if defined(CONFIG_CPU_IXP465) && !defined(__ASSEMBLY__)
+#if defined(CONFIG_CPU_IXP46X) && !defined(__ASSEMBLY__)
extern unsigned int processor_id;
#define cpu_is_ixp465() ((processor_id & 0xffffffc0) == 0x69054200)
#else