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authorStefan Schmidt <stefan@datenfreihafen.org>2008-07-09 08:07:29 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-07-10 13:44:54 +0100
commit390d452fa1d912b6e76744a34777d7390ab1fa1c (patch)
treed6123f10232f1af542f62c357082393ba71090aa /include/asm-arm
parentc1450f156fda8921a55e3f4fe596274278010f31 (diff)
[ARM] 5163/1: pxa27x_udc: Allow choosing the bits in UP2OCR_SEOS
Allow choosing the bits in UP2OCR_SEOS. Signed-off-by: Daniel Ribeiro <drwyrm@gmail.com> Acked-by: Eric Miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm')
-rw-r--r--include/asm-arm/arch-pxa/pxa27x-udc.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/asm-arm/arch-pxa/pxa27x-udc.h b/include/asm-arm/arch-pxa/pxa27x-udc.h
index bc1cf7d0773..ab1443f8bd8 100644
--- a/include/asm-arm/arch-pxa/pxa27x-udc.h
+++ b/include/asm-arm/arch-pxa/pxa27x-udc.h
@@ -97,7 +97,7 @@
#define UP2OCR_IDON (1 << 10) /* OTG ID Read Enable */
#define UP2OCR_HXS (1 << 16) /* Host Port 2 Transceiver Output Select */
#define UP2OCR_HXOE (1 << 17) /* Host Port 2 Transceiver Output Enable */
-#define UP2OCR_SEOS (1 << 24) /* Single-Ended Output Select */
+#define UP2OCR_SEOS(x) ((x & 7) << 24) /* Single-Ended Output Select */
#define UDCCSN(x) __REG2(0x40600100, (x) << 2)
#define UDCCSR0 __REG(0x40600100) /* UDC Control/Status register - Endpoint 0 */