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authorGraf Yang <graf.yang@analog.com>2008-04-25 03:09:15 +0800
committerBryan Wu <cooloney@kernel.org>2008-04-25 03:09:15 +0800
commit5be36d22b28f01e5074f78b29aa6128da0a53641 (patch)
tree1fda8bcb0680eda6a826fc3753ee8c9f52a2c75b /include/asm-blackfin/mach-bf537/blackfin.h
parent37b6972ad8fb08d438fd600888aff212b1b193b0 (diff)
[Blackfin] arch: add Blackfin on-chip SIR IrDA driver support
- add platform device resources in board files - add new bfin_sir.h to each machines Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'include/asm-blackfin/mach-bf537/blackfin.h')
-rw-r--r--include/asm-blackfin/mach-bf537/blackfin.h15
1 files changed, 15 insertions, 0 deletions
diff --git a/include/asm-blackfin/mach-bf537/blackfin.h b/include/asm-blackfin/mach-bf537/blackfin.h
index 4f10ee0ae10..cffc786b2a2 100644
--- a/include/asm-blackfin/mach-bf537/blackfin.h
+++ b/include/asm-blackfin/mach-bf537/blackfin.h
@@ -136,6 +136,21 @@
#define bfin_write_UART_GCTL(val) bfin_write_UART0_GCTL(val)
#define BFIN_UART_GCTL UART0_GCTL
+#define BFIN_UART_NR_PORTS 2
+
+#define OFFSET_THR 0x00 /* Transmit Holding register */
+#define OFFSET_RBR 0x00 /* Receive Buffer register */
+#define OFFSET_DLL 0x00 /* Divisor Latch (Low-Byte) */
+#define OFFSET_IER 0x04 /* Interrupt Enable Register */
+#define OFFSET_DLH 0x04 /* Divisor Latch (High-Byte) */
+#define OFFSET_IIR 0x08 /* Interrupt Identification Register */
+#define OFFSET_LCR 0x0C /* Line Control Register */
+#define OFFSET_MCR 0x10 /* Modem Control Register */
+#define OFFSET_LSR 0x14 /* Line Status Register */
+#define OFFSET_MSR 0x18 /* Modem Status Register */
+#define OFFSET_SCR 0x1C /* SCR Scratch Register */
+#define OFFSET_GCTL 0x24 /* Global Control Register */
+
/* DPMC*/
#define bfin_read_STOPCK_OFF() bfin_read_STOPCK()
#define bfin_write_STOPCK_OFF(val) bfin_write_STOPCK(val)