diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2008-05-19 16:33:29 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-05-19 16:33:29 -0700 |
commit | 754cdd4aba225b74dcc35cc384aeb0c42b505e8b (patch) | |
tree | 8647f635336748667d68e68940dec1fcf88d51dd /include/asm-blackfin/mach-bf561/dma.h | |
parent | db07b02304d0d70bf8273abc93d94e4c8d2f9cec (diff) | |
parent | 460ed2ea04da012e5575eb357a47a7f6407767de (diff) |
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/blackfin-2.6
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/blackfin-2.6:
Blackfin SPORTS UART Driver: converting BFIN->BLACKFIN
Blackfin serial driver: add extra IRQ flag for 8250 serial driver
8250 Serial Driver: Added support for 8250-class UARTs in HV Sistemas H8606 board
Blackfin arch: Fix bug - USB fails to build for BF524/BF526
Blackfin arch: update boards defconfig files
Blackfin arch: IO Port functions to read/write unalligned memory
Blackfin arch: enable a choice to provide 4M DMA memory
Blackfin arch: cleanup the icplb/dcplb multiple hit checks
Blackfin arch: Add workaround to read edge triggered GPIOs
Blackfin arch: Sync channel defines with struct dma_register dma_io_base_addr.
Blackfin arch: Check for Anomaly 05000182
[Blackfin] arch: rename bf5xx-flash to bfin-async-flash
[Blackfin] arch: Blackfin checksum annotations
Diffstat (limited to 'include/asm-blackfin/mach-bf561/dma.h')
-rw-r--r-- | include/asm-blackfin/mach-bf561/dma.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/include/asm-blackfin/mach-bf561/dma.h b/include/asm-blackfin/mach-bf561/dma.h index 21d982003e7..8bc46cd89a0 100644 --- a/include/asm-blackfin/mach-bf561/dma.h +++ b/include/asm-blackfin/mach-bf561/dma.h @@ -25,11 +25,11 @@ #define CH_MEM_STREAM1_SRC 27 /* RX */ #define CH_MEM_STREAM2_DEST 28 #define CH_MEM_STREAM2_SRC 29 -#define CH_MEM_STREAM3_SRC 30 -#define CH_MEM_STREAM3_DEST 31 +#define CH_MEM_STREAM3_DEST 30 +#define CH_MEM_STREAM3_SRC 31 #define CH_IMEM_STREAM0_DEST 32 #define CH_IMEM_STREAM0_SRC 33 -#define CH_IMEM_STREAM1_SRC 34 -#define CH_IMEM_STREAM1_DEST 35 +#define CH_IMEM_STREAM1_DEST 34 +#define CH_IMEM_STREAM1_SRC 35 #endif |