diff options
| author | Linus Torvalds <torvalds@g5.osdl.org> | 2006-10-02 08:18:43 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-10-02 08:18:43 -0700 |
| commit | 12dce6263d43daeb4e16fa4eb964c1c99fa4fa2e (patch) | |
| tree | e70a514e5fec67be191e12eba508db8ced967a4b /include/asm-mips/galileo-boards/ev96100.h | |
| parent | 3f2e05e90e0846c42626e3d272454f26be34a1bc (diff) | |
| parent | 04b314b2c3732bb5aa752fdbb3076de16decdab6 (diff) | |
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
[MIPS] Remove unused galileo-boars header files
[MIPS] Rename SERIAL_PORT_DEFNS for EV64120
[MIPS] Add UART IRQ number for EV64120
[MIPS] Remove excite_flash.c
[MIPS] Update i8259 resources.
[MIPS] Make unwind_stack() can dig into interrupted context
[MIPS] Stacktrace build-fix and improvement
[MIPS] QEMU: Add support for little endian mips
[MIPS] Remove __flush_icache_page
[MIPS] lockdep: update defconfigs
[MIPS] lockdep: Add STACKTRACE_SUPPORT and enable LOCKDEP_SUPPORT
[MIPS] lockdep: fix TRACE_IRQFLAGS_SUPPORT
Diffstat (limited to 'include/asm-mips/galileo-boards/ev96100.h')
| -rw-r--r-- | include/asm-mips/galileo-boards/ev96100.h | 55 |
1 files changed, 0 insertions, 55 deletions
diff --git a/include/asm-mips/galileo-boards/ev96100.h b/include/asm-mips/galileo-boards/ev96100.h deleted file mode 100644 index 070dfd84a8e..00000000000 --- a/include/asm-mips/galileo-boards/ev96100.h +++ /dev/null @@ -1,55 +0,0 @@ -/* - * - */ -#ifndef _MIPS_EV96100_H -#define _MIPS_EV96100_H - -#include <asm/addrspace.h> - -/* - * GT64120 config space base address - */ -#define GT64120_BASE (KSEG1ADDR(0x14000000)) -#define MIPS_GT_BASE GT64120_BASE - -/* - * PCI Bus allocation - */ -#define GT_PCI_MEM_BASE 0x12000000UL -#define GT_PCI_MEM_SIZE 0x02000000UL -#define GT_PCI_IO_BASE 0x10000000UL -#define GT_PCI_IO_SIZE 0x02000000UL -#define GT_ISA_IO_BASE PCI_IO_BASE - -/* - * Duart I/O ports. - */ -#define EV96100_COM1_BASE_ADDR (0xBD000000 + 0x20) -#define EV96100_COM2_BASE_ADDR (0xBD000000 + 0x00) - - -/* - * EV96100 interrupt controller register base. - */ -#define EV96100_ICTRL_REGS_BASE (KSEG1ADDR(0x1f000000)) - -/* - * EV96100 UART register base. - */ -#define EV96100_UART0_REGS_BASE EV96100_COM1_BASE_ADDR -#define EV96100_UART1_REGS_BASE EV96100_COM2_BASE_ADDR -#define EV96100_BASE_BAUD ( 3686400 / 16 ) - - -/* - * Because of an error/peculiarity in the Galileo chip, we need to swap the - * bytes when running bigendian. - */ -#define __GT_READ(ofs) \ - (*(volatile u32 *)(GT64120_BASE+(ofs))) -#define __GT_WRITE(ofs, data) \ - do { *(volatile u32 *)(GT64120_BASE+(ofs)) = (data); } while (0) -#define GT_READ(ofs) le32_to_cpu(__GT_READ(ofs)) -#define GT_WRITE(ofs, data) __GT_WRITE(ofs, cpu_to_le32(data)) - -#endif /* !(_MIPS_EV96100_H) */ |