diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2008-06-16 10:22:31 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-06-16 10:22:31 -0700 |
| commit | 626a16c16e13e4afaba382bfc0354a3555f5231c (patch) | |
| tree | 7a0a0c1f8e19b18c98757a076a4a03f294b75d10 /include/asm-mips/gic.h | |
| parent | e53d6a152793a38aa334d6f7a4850642ae45cedc (diff) | |
| parent | dab8c6deaf1d654d09c3de8bd4c286d424df255a (diff) | |
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
[MIPS] Au1200: MMC resource size off by one
[MIPS] TANBAC: Update defconfig
[MIPS] Vr41xx: Initialize PCI io_map_base
[MIPS] Malta: Always compile MTD platform device registration code.
[MIPS] Malta: Fix build errors for 64-bit kernels
[MIPS] Lasat: sysctl fixup
[MIPS] Fix buggy use of kmap_coherent.
[MIPS] Lasat: bring back from the dead
[MIPS] vpe_id is required for VSMP and SMTC builds
[MIPS] Export smp_call_function and smp_call_function_single.
[MIPS] Bring the SWARM defconfig up to date
[MIPS] Sibyte: Build RTC support as an object
[MIPS] Fix the fix for divide by zero error in build_{clear,copy}_page
[MIPS] Fix build for PNX platforms.
[MIPS] Add RM200 with R5000 CPU to known ARC machines
[MIPS] Better load address for big endian SNI RM
[MIPS] SB1250: Initialize io_map_base
[MIPS] Alchemy: Add au1500 reserved interrupt
[MIPS] Export empty_zero_page for sake of the ext4 module.
Diffstat (limited to 'include/asm-mips/gic.h')
| -rw-r--r-- | include/asm-mips/gic.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/include/asm-mips/gic.h b/include/asm-mips/gic.h index 3a492f225f0..954807d9d66 100644 --- a/include/asm-mips/gic.h +++ b/include/asm-mips/gic.h @@ -24,8 +24,8 @@ #define MSK(n) ((1 << (n)) - 1) #define REG32(addr) (*(volatile unsigned int *) (addr)) -#define REG(base, offs) REG32((unsigned int)(base) + offs##_##OFS) -#define REGP(base, phys) REG32((unsigned int)(base) + (phys)) +#define REG(base, offs) REG32((unsigned long)(base) + offs##_##OFS) +#define REGP(base, phys) REG32((unsigned long)(base) + (phys)) /* Accessors */ #define GIC_REG(segment, offset) \ |