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authorJeff Garzik <jgarzik@pobox.com>2005-11-18 13:23:21 -0500
committerJeff Garzik <jgarzik@pobox.com>2005-11-18 13:23:21 -0500
commit638cbac8de9b57345a9446e107b6aebc10b58970 (patch)
treee445fe3a1b8ad718d7ee770ed1c7a43e3eb5a611 /include/asm-mips/mach-pb1x00/pb1550.h
parentf055408957750cf759162c364c2a4dfe19765844 (diff)
parentfc71fe40d2bedcc57d3406bf2050481f8b3441b6 (diff)
Merge branch 'master'
Diffstat (limited to 'include/asm-mips/mach-pb1x00/pb1550.h')
-rw-r--r--include/asm-mips/mach-pb1x00/pb1550.h7
1 files changed, 7 insertions, 0 deletions
diff --git a/include/asm-mips/mach-pb1x00/pb1550.h b/include/asm-mips/mach-pb1x00/pb1550.h
index 431d6088ea9..9578ead11e8 100644
--- a/include/asm-mips/mach-pb1x00/pb1550.h
+++ b/include/asm-mips/mach-pb1x00/pb1550.h
@@ -166,4 +166,11 @@ static BCSR * const bcsr = (BCSR *)BCSR_PHYS_ADDR;
((NAND_T_SU & 0xF) << NAND_T_SU_SHIFT) | \
((NAND_T_WH & 0xF) << NAND_T_WH_SHIFT)
+#define NAND_CS 1
+
+/* should be done by yamon */
+#define NAND_STCFG 0x00400005 /* 8-bit NAND */
+#define NAND_STTIME 0x00007774 /* valid for 396MHz SD=2 only */
+#define NAND_STADDR 0x12000FFF /* physical address 0x20000000 */
+
#endif /* __ASM_PB1550_H */