aboutsummaryrefslogtreecommitdiff
path: root/include/asm-mips/mach-rc32434/war.h
diff options
context:
space:
mode:
authorIngo Molnar <mingo@elte.hu>2008-10-02 10:21:26 +0200
committerIngo Molnar <mingo@elte.hu>2008-10-02 10:21:26 +0200
commitd6d5aeb661fc14655c417f3582ae7ec52985d2a8 (patch)
tree5e168da05cb28d10b5accc74718428cfd5527201 /include/asm-mips/mach-rc32434/war.h
parent7e6e178ab1548c8d894a77593e757acf4510b8ba (diff)
parent94aca1dac6f6d21f4b07e4864baf7768cabcc6e7 (diff)
Merge commit 'v2.6.27-rc8' into genirq
Diffstat (limited to 'include/asm-mips/mach-rc32434/war.h')
-rw-r--r--include/asm-mips/mach-rc32434/war.h25
1 files changed, 25 insertions, 0 deletions
diff --git a/include/asm-mips/mach-rc32434/war.h b/include/asm-mips/mach-rc32434/war.h
new file mode 100644
index 00000000000..3ddf187e98a
--- /dev/null
+++ b/include/asm-mips/mach-rc32434/war.h
@@ -0,0 +1,25 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
+ */
+#ifndef __ASM_MIPS_MACH_MIPS_WAR_H
+#define __ASM_MIPS_MACH_MIPS_WAR_H
+
+#define R4600_V1_INDEX_ICACHEOP_WAR 0
+#define R4600_V1_HIT_CACHEOP_WAR 0
+#define R4600_V2_HIT_CACHEOP_WAR 0
+#define R5432_CP0_INTERRUPT_WAR 0
+#define BCM1250_M3_WAR 0
+#define SIBYTE_1956_WAR 0
+#define MIPS4K_ICACHE_REFILL_WAR 1
+#define MIPS_CACHE_SYNC_WAR 0
+#define TX49XX_ICACHE_INDEX_INV_WAR 0
+#define RM9000_CDEX_SMP_WAR 0
+#define ICACHE_REFILLS_WORKAROUND_WAR 0
+#define R10000_LLSC_WAR 0
+#define MIPS34K_MISSED_ITLB_WAR 0
+
+#endif /* __ASM_MIPS_MACH_MIPS_WAR_H */