diff options
| author | Chris Dearman <chris@mips.com> | 2007-05-08 14:05:39 +0100 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2007-05-11 14:28:31 +0100 |
| commit | d725cf3818b12a17d78b87a2de19e8eec17126ae (patch) | |
| tree | 9d200020488b886201771bd6516c63ef43397baa /include/asm-mips/mips-boards/malta.h | |
| parent | ef300e42234eac066b193c871714203d999b481c (diff) | |
[MIPS] MT: Reenable EIC support and add support for SOCit SC.
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/mips-boards/malta.h')
| -rw-r--r-- | include/asm-mips/mips-boards/malta.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/include/asm-mips/mips-boards/malta.h b/include/asm-mips/mips-boards/malta.h index b0ba3c5a921..eec91001bb6 100644 --- a/include/asm-mips/mips-boards/malta.h +++ b/include/asm-mips/mips-boards/malta.h @@ -25,6 +25,10 @@ #include <asm/mips-boards/msc01_pci.h> #include <asm/gt64120.h> +/* Mips interrupt controller found in SOCit variations */ +#define MIPS_MSC01_IC_REG_BASE 0x1bc40000 +#define MIPS_SOCITSC_IC_REG_BASE 0x1ffa0000 + /* * Malta I/O ports base address for the Galileo GT64120 and Algorithmics * Bonito system controllers. |