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| author | Jeff Garzik <jgarzik@pobox.com> | 2005-11-18 11:44:17 -0500 |
|---|---|---|
| committer | Jeff Garzik <jgarzik@pobox.com> | 2005-11-18 11:44:17 -0500 |
| commit | f333b3f111e9db76109e304df8ee777ace7fbf86 (patch) | |
| tree | ce9a74a7327020c48c80d278e1db5f12552f0fb0 /include/asm-mips/mips-boards/seadint.h | |
| parent | f4256e301d9800b1e0276404cb01b3ac85b51067 (diff) | |
| parent | 79bfb0a98fdc73ed6a18469cef245cbf50a1d8bb (diff) | |
Merge branch 'upstream'
Diffstat (limited to 'include/asm-mips/mips-boards/seadint.h')
| -rw-r--r-- | include/asm-mips/mips-boards/seadint.h | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/include/asm-mips/mips-boards/seadint.h b/include/asm-mips/mips-boards/seadint.h index c3dcfcb928b..365c2a3c64f 100644 --- a/include/asm-mips/mips-boards/seadint.h +++ b/include/asm-mips/mips-boards/seadint.h @@ -20,9 +20,14 @@ #ifndef _MIPS_SEADINT_H #define _MIPS_SEADINT_H -#define SEADINT_UART0 2 -#define SEADINT_UART1 3 +/* + * Interrupts 0..7 are used for SEAD CPU interrupts + */ +#define MIPSCPU_INT_BASE 0 + +#define MIPSCPU_INT_UART0 2 +#define MIPSCPU_INT_UART1 3 -extern void seadint_init(void); +#define MIPSCPU_INT_CPUCTR 7 #endif /* !(_MIPS_SEADINT_H) */ |