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authorThomas Bogendoerfer <tsbogend@alpha.franken.de>2007-06-20 23:36:47 +0200
committerRalf Baechle <ralf@linux-mips.org>2007-07-10 17:33:03 +0100
commit06cf5583fd9ac782cf34996cdabb48afdf478e37 (patch)
tree45e27ae328e9e3f021a29cc8e8b95d3bef618255 /include/asm-mips
parent68bc00e31143ad8bfa435425e0a11e9b3998911d (diff)
[MIPS] SNI RM updates
- use RTC_CLASS instead of GEN_RTC - get rid of ds1216 in favour of a RTC_CLASS driver - use correct console device for older RM400 - use physical addresses for 82596 device - use 128 byte L1 cache line size (this is needed because most of the SNI caches are using 128 L2 cache lines) Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips')
-rw-r--r--include/asm-mips/sni.h3
1 files changed, 0 insertions, 3 deletions
diff --git a/include/asm-mips/sni.h b/include/asm-mips/sni.h
index f257509b914..ddaf36a1e38 100644
--- a/include/asm-mips/sni.h
+++ b/include/asm-mips/sni.h
@@ -146,9 +146,6 @@ extern unsigned int sni_brd_type;
#define SNI_A20R_IRQ_BASE MIPS_CPU_IRQ_BASE
#define SNI_A20R_IRQ_TIMER (SNI_A20R_IRQ_BASE+5)
-#define SNI_DS1216_A20R_BASE 0xbc081ffc
-#define SNI_DS1216_RM200_BASE 0xbcd41ffc
-
#define SNI_PCIT_INT_REG 0xbfff000c
#define SNI_PCIT_INT_START 24