diff options
| author | Ingo Molnar <mingo@elte.hu> | 2009-05-08 10:50:00 +0200 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2009-05-08 10:50:00 +0200 |
| commit | f066a155334642b8a206eec625b1925d88c48aeb (patch) | |
| tree | cb12975e60b70d1dae3b7397bab955de78a4d01e /include/asm-mn10300/proc-mn103e010/cache.h | |
| parent | e7c064889606aab3569669078c69b87b2c527e72 (diff) | |
| parent | 33df4db04a79660150e1948e3296eeb451ac121b (diff) | |
Merge branch 'x86/urgent' into x86/xen
Conflicts:
arch/frv/include/asm/pgtable.h
arch/x86/include/asm/required-features.h
arch/x86/xen/mmu.c
Merge reason: x86/xen was on a .29 base still, move it to a fresher
branch and pick up Xen fixes as well, plus resolve
conflicts
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'include/asm-mn10300/proc-mn103e010/cache.h')
| -rw-r--r-- | include/asm-mn10300/proc-mn103e010/cache.h | 33 |
1 files changed, 0 insertions, 33 deletions
diff --git a/include/asm-mn10300/proc-mn103e010/cache.h b/include/asm-mn10300/proc-mn103e010/cache.h deleted file mode 100644 index bdc1f9a59b4..00000000000 --- a/include/asm-mn10300/proc-mn103e010/cache.h +++ /dev/null @@ -1,33 +0,0 @@ -/* MN103E010 Cache specification - * - * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved. - * Written by David Howells (dhowells@redhat.com) - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public Licence - * as published by the Free Software Foundation; either version - * 2 of the Licence, or (at your option) any later version. - */ -#ifndef _ASM_PROC_CACHE_H -#define _ASM_PROC_CACHE_H - -/* L1 cache */ - -#define L1_CACHE_NWAYS 4 /* number of ways in caches */ -#define L1_CACHE_NENTRIES 256 /* number of entries in each way */ -#define L1_CACHE_BYTES 16 /* bytes per entry */ -#define L1_CACHE_SHIFT 4 /* shift for bytes per entry */ -#define L1_CACHE_WAYDISP 0x1000 /* displacement of one way from the next */ - -#define L1_CACHE_TAG_VALID 0x00000001 /* cache tag valid bit */ -#define L1_CACHE_TAG_DIRTY 0x00000008 /* data cache tag dirty bit */ -#define L1_CACHE_TAG_ENTRY 0x00000ff0 /* cache tag entry address mask */ -#define L1_CACHE_TAG_ADDRESS 0xfffff000 /* cache tag line address mask */ - -/* - * specification of the interval between interrupt checking intervals whilst - * managing the cache with the interrupts disabled - */ -#define MN10300_DCACHE_INV_RANGE_INTR_LOG2_INTERVAL 4 - -#endif /* _ASM_PROC_CACHE_H */ |