diff options
| author | Ingo Molnar <mingo@elte.hu> | 2008-10-24 12:48:46 +0200 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2008-10-24 12:48:46 +0200 |
| commit | 8c82a17e9c924c0e9f13e75e4c2f6bca19a4b516 (patch) | |
| tree | d535f46a917e14e90deccb29ad00aac016ad18dd /include/asm-parisc/prefetch.h | |
| parent | 4ce72a2c063a7fa8e42a9435440ae3364115a58d (diff) | |
| parent | 57f8f7b60db6f1ed2c6918ab9230c4623a9dbe37 (diff) | |
Merge commit 'v2.6.28-rc1' into sched/urgent
Diffstat (limited to 'include/asm-parisc/prefetch.h')
| -rw-r--r-- | include/asm-parisc/prefetch.h | 39 |
1 files changed, 0 insertions, 39 deletions
diff --git a/include/asm-parisc/prefetch.h b/include/asm-parisc/prefetch.h deleted file mode 100644 index c5edc60c059..00000000000 --- a/include/asm-parisc/prefetch.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * include/asm-parisc/prefetch.h - * - * PA 2.0 defines data prefetch instructions on page 6-11 of the Kane book. - * In addition, many implementations do hardware prefetching of both - * instructions and data. - * - * PA7300LC (page 14-4 of the ERS) also implements prefetching by a load - * to gr0 but not in a way that Linux can use. If the load would cause an - * interruption (eg due to prefetching 0), it is suppressed on PA2.0 - * processors, but not on 7300LC. - * - */ - -#ifndef __ASM_PARISC_PREFETCH_H -#define __ASM_PARISC_PREFETCH_H - -#ifndef __ASSEMBLY__ -#ifdef CONFIG_PREFETCH - -#define ARCH_HAS_PREFETCH -static inline void prefetch(const void *addr) -{ - __asm__("ldw 0(%0), %%r0" : : "r" (addr)); -} - -/* LDD is a PA2.0 addition. */ -#ifdef CONFIG_PA20 -#define ARCH_HAS_PREFETCHW -static inline void prefetchw(const void *addr) -{ - __asm__("ldd 0(%0), %%r0" : : "r" (addr)); -} -#endif /* CONFIG_PA20 */ - -#endif /* CONFIG_PREFETCH */ -#endif /* __ASSEMBLY__ */ - -#endif /* __ASM_PARISC_PROCESSOR_H */ |