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authorLinus Torvalds <torvalds@g5.osdl.org>2006-10-25 20:20:03 -0700
committerLinus Torvalds <torvalds@g5.osdl.org>2006-10-25 20:20:03 -0700
commit8483ca3c99559027a3741af7f56f6b36887f7fd5 (patch)
tree4c09e045467c4dd174508ffd9b55a857ee139869 /include/asm-powerpc/cputable.h
parentede847c406054ba2a1ef2d165d3fd9f8e2b8d1bc (diff)
parent190a24f5605d95b786c92280bf7a51ebef43f29f (diff)
Merge branch 'merge' of master.kernel.org:/pub/scm/linux/kernel/git/paulus/powerpc
* 'merge' of master.kernel.org:/pub/scm/linux/kernel/git/paulus/powerpc: [POWERPC] Make sure __cpu_preinit_ppc970 gets called on 970GX processors [POWERPC] Fix CHRP platforms with only 8259 [POWERPC] IPIC: Fix spinlock recursion in set_irq_handler [POWERPC] Fix the UCC rx/tx clock of QE [POWERPC] cell: update defconfig [POWERPC] spufs: fix another off-by-one bug in spufs_mbox_read [POWERPC] spufs: fix signal2 file to report signal2 [POWERPC] Fix device_is_compatible() const warning [POWERPC] Cell timebase bug workaround [POWERPC] Support feature fixups in modules [POWERPC] Support feature fixups in vdso's [POWERPC] Support nested cpu feature sections [POWERPC] Consolidate feature fixup code [POWERPC] Fix hang in start_ldr if _end or _edata is unaligned [POWERPC] Fix spelling errors in ucc_fast.c and ucc_slow.c [POWERPC] Don't require execute perms on wrapper when building zImage.initrd [POWERPC] Add 970GX cputable entry [POWERPC] Fix build breakage with CONFIG_PPC32 [POWERPC] Fix compiler warning message on get_property call [POWERPC] Simplify stolen time calculation
Diffstat (limited to 'include/asm-powerpc/cputable.h')
-rw-r--r--include/asm-powerpc/cputable.h37
1 files changed, 12 insertions, 25 deletions
diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h
index 12707ab9dc9..a9a40149a7c 100644
--- a/include/asm-powerpc/cputable.h
+++ b/include/asm-powerpc/cputable.h
@@ -89,8 +89,11 @@ struct cpu_spec {
extern struct cpu_spec *cur_cpu_spec;
-extern void identify_cpu(unsigned long offset, unsigned long cpu);
-extern void do_cpu_ftr_fixups(unsigned long offset);
+extern unsigned int __start___ftr_fixup, __stop___ftr_fixup;
+
+extern struct cpu_spec *identify_cpu(unsigned long offset);
+extern void do_feature_fixups(unsigned long value, void *fixup_start,
+ void *fixup_end);
#endif /* __ASSEMBLY__ */
@@ -144,6 +147,7 @@ extern void do_cpu_ftr_fixups(unsigned long offset);
#define CPU_FTR_CI_LARGE_PAGE LONG_ASM_CONST(0x0000100000000000)
#define CPU_FTR_PAUSE_ZERO LONG_ASM_CONST(0x0000200000000000)
#define CPU_FTR_PURR LONG_ASM_CONST(0x0000400000000000)
+#define CPU_FTR_CELL_TB_BUG LONG_ASM_CONST(0x0000800000000000)
#ifndef __ASSEMBLY__
@@ -332,7 +336,7 @@ extern void do_cpu_ftr_fixups(unsigned long offset);
#define CPU_FTRS_CELL (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \
CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \
- CPU_FTR_PAUSE_ZERO | CPU_FTR_CI_LARGE_PAGE)
+ CPU_FTR_PAUSE_ZERO | CPU_FTR_CI_LARGE_PAGE | CPU_FTR_CELL_TB_BUG)
#define CPU_FTRS_PA6T (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \
CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | \
CPU_FTR_ALTIVEC_COMP | CPU_FTR_CI_LARGE_PAGE | \
@@ -431,29 +435,12 @@ static inline int cpu_has_feature(unsigned long feature)
#ifdef __ASSEMBLY__
-#define BEGIN_FTR_SECTION 98:
-
-#ifndef __powerpc64__
+#define BEGIN_FTR_SECTION_NESTED(label) label:
+#define BEGIN_FTR_SECTION BEGIN_FTR_SECTION_NESTED(97)
+#define END_FTR_SECTION_NESTED(msk, val, label) \
+ MAKE_FTR_SECTION_ENTRY(msk, val, label, __ftr_fixup)
#define END_FTR_SECTION(msk, val) \
-99: \
- .section __ftr_fixup,"a"; \
- .align 2; \
- .long msk; \
- .long val; \
- .long 98b; \
- .long 99b; \
- .previous
-#else /* __powerpc64__ */
-#define END_FTR_SECTION(msk, val) \
-99: \
- .section __ftr_fixup,"a"; \
- .align 3; \
- .llong msk; \
- .llong val; \
- .llong 98b; \
- .llong 99b; \
- .previous
-#endif /* __powerpc64__ */
+ END_FTR_SECTION_NESTED(msk, val, 97)
#define END_FTR_SECTION_IFSET(msk) END_FTR_SECTION((msk), (msk))
#define END_FTR_SECTION_IFCLR(msk) END_FTR_SECTION((msk), 0)