diff options
| author | Paul Mackerras <paulus@samba.org> | 2005-10-28 22:48:08 +1000 |
|---|---|---|
| committer | Paul Mackerras <paulus@samba.org> | 2005-10-28 22:48:08 +1000 |
| commit | c032524f0ddea5fcc3a2cece0d4a61f37e5ca9cd (patch) | |
| tree | c4ece990e6083cfedc640a06f908bfe33fd344bd /include/asm-powerpc | |
| parent | d73e0c99f5c45e7b86d38725a4ff49f6746f5353 (diff) | |
powerpc: Make single-stepping emulation (mostly) usable on 32-bit
The sc instruction emulation can't be done the same way on 32-bit
as 64-bit yet, but this should work OK.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'include/asm-powerpc')
| -rw-r--r-- | include/asm-powerpc/reg.h | 8 | ||||
| -rw-r--r-- | include/asm-powerpc/sstep.h | 26 |
2 files changed, 34 insertions, 0 deletions
diff --git a/include/asm-powerpc/reg.h b/include/asm-powerpc/reg.h index 68058d72d8d..bfb45a4523d 100644 --- a/include/asm-powerpc/reg.h +++ b/include/asm-powerpc/reg.h @@ -51,9 +51,17 @@ #define __MASK(X) (1UL<<(X)) #endif +#ifdef CONFIG_PPC64 #define MSR_SF __MASK(MSR_SF_LG) /* Enable 64 bit mode */ #define MSR_ISF __MASK(MSR_ISF_LG) /* Interrupt 64b mode valid on 630 */ #define MSR_HV __MASK(MSR_HV_LG) /* Hypervisor state */ +#else +/* so tests for these bits fail on 32-bit */ +#define MSR_SF 0 +#define MSR_ISF 0 +#define MSR_HV 0 +#endif + #define MSR_VEC __MASK(MSR_VEC_LG) /* Enable AltiVec */ #define MSR_POW __MASK(MSR_POW_LG) /* Enable Power Management */ #define MSR_WE __MASK(MSR_WE_LG) /* Wait State Enable */ diff --git a/include/asm-powerpc/sstep.h b/include/asm-powerpc/sstep.h new file mode 100644 index 00000000000..630a9889c07 --- /dev/null +++ b/include/asm-powerpc/sstep.h @@ -0,0 +1,26 @@ +/* + * Copyright (C) 2004 Paul Mackerras <paulus@au.ibm.com>, IBM + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ + +struct pt_regs; + +/* + * We don't allow single-stepping an mtmsrd that would clear + * MSR_RI, since that would make the exception unrecoverable. + * Since we need to single-step to proceed from a breakpoint, + * we don't allow putting a breakpoint on an mtmsrd instruction. + * Similarly we don't allow breakpoints on rfid instructions. + * These macros tell us if an instruction is a mtmsrd or rfid. + * Note that IS_MTMSRD returns true for both an mtmsr (32-bit) + * and an mtmsrd (64-bit). + */ +#define IS_MTMSRD(instr) (((instr) & 0xfc0007be) == 0x7c000124) +#define IS_RFID(instr) (((instr) & 0xfc0007fe) == 0x4c000024) + +/* Emulate instructions that cause a transfer of control. */ +extern int emulate_step(struct pt_regs *regs, unsigned int instr); |