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authorJesse Brandeburg <jesse.brandeburg@intel.com>2006-08-16 13:47:25 -0700
committerAuke Kok <juke-jan.h.kok@intel.com>2006-08-16 13:47:25 -0700
commit3ae84d9269592a1284892c93597a604a894f1102 (patch)
treee6bb8f5adf7b944ff21b25b0a4586529efceeefb /include/asm-um/sections.h
parent0fe198a5e10229b269624a18bbd390001a8d3476 (diff)
ixgb: fix cache miss due to miscalculation
Reduce writeback threshold by 1. We were instructing the hardware to wait until the 17th descriptor which went over the cache line limit. Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: Auke Kok <auke.jan.h.kok@intel.com>
Diffstat (limited to 'include/asm-um/sections.h')
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