diff options
| author | Ingo Molnar <mingo@elte.hu> | 2008-10-10 19:50:00 +0200 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2008-10-11 20:17:36 +0200 |
| commit | d84705969f898f294bc3fc32eca33580f14105bd (patch) | |
| tree | c59c7e835820c6bfb5a957f70e58fee1699a6b38 /include/asm-x86/ipi.h | |
| parent | 725c25819e4a0dafdcf42a5f31bc569341919c7c (diff) | |
| parent | 11494547b1754c4f3bd7f707ab869e2adf54d52f (diff) | |
Merge branch 'x86/apic' into x86-v28-for-linus-phase4-B
Conflicts:
arch/x86/kernel/apic_32.c
arch/x86/kernel/apic_64.c
arch/x86/kernel/setup.c
drivers/pci/intel-iommu.c
include/asm-x86/cpufeature.h
include/asm-x86/dma-mapping.h
Diffstat (limited to 'include/asm-x86/ipi.h')
| -rw-r--r-- | include/asm-x86/ipi.h | 16 |
1 files changed, 11 insertions, 5 deletions
diff --git a/include/asm-x86/ipi.h b/include/asm-x86/ipi.h index c1b22679751..30a692cfaff 100644 --- a/include/asm-x86/ipi.h +++ b/include/asm-x86/ipi.h @@ -49,6 +49,12 @@ static inline int __prepare_ICR2(unsigned int mask) return SET_APIC_DEST_FIELD(mask); } +static inline void __xapic_wait_icr_idle(void) +{ + while (native_apic_mem_read(APIC_ICR) & APIC_ICR_BUSY) + cpu_relax(); +} + static inline void __send_IPI_shortcut(unsigned int shortcut, int vector, unsigned int dest) { @@ -64,7 +70,7 @@ static inline void __send_IPI_shortcut(unsigned int shortcut, int vector, /* * Wait for idle. */ - apic_wait_icr_idle(); + __xapic_wait_icr_idle(); /* * No need to touch the target chip field @@ -74,7 +80,7 @@ static inline void __send_IPI_shortcut(unsigned int shortcut, int vector, /* * Send the IPI. The write to APIC_ICR fires this off. */ - apic_write(APIC_ICR, cfg); + native_apic_mem_write(APIC_ICR, cfg); } /* @@ -92,13 +98,13 @@ static inline void __send_IPI_dest_field(unsigned int mask, int vector, if (unlikely(vector == NMI_VECTOR)) safe_apic_wait_icr_idle(); else - apic_wait_icr_idle(); + __xapic_wait_icr_idle(); /* * prepare target chip field */ cfg = __prepare_ICR2(mask); - apic_write(APIC_ICR2, cfg); + native_apic_mem_write(APIC_ICR2, cfg); /* * program the ICR @@ -108,7 +114,7 @@ static inline void __send_IPI_dest_field(unsigned int mask, int vector, /* * Send the IPI. The write to APIC_ICR fires this off. */ - apic_write(APIC_ICR, cfg); + native_apic_mem_write(APIC_ICR, cfg); } static inline void send_IPI_mask_sequence(cpumask_t mask, int vector) |