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authorScott Wood <scottwood@freescale.com>2007-06-25 14:50:41 -0500
committerKumar Gala <galak@kernel.crashing.org>2007-10-03 20:36:36 -0500
commit7401685242fbcbf4b0660726372c77a88c4af17d (patch)
tree71b814468d705c2c48184161c38a0295c832239d /include/asm-x86_64/msgbuf.h
parent663edbd2640447dc43840568cd5701e6c9878d63 (diff)
[POWERPC] 8xx: Work around CPU15 erratum.
The CPU15 erratum on MPC8xx chips can cause incorrect code execution under certain circumstances, where there is a conditional or indirect branch in the last word of a page, with a target in the last cache line of the next page. This patch implements one of the suggested workarounds, by forcing a TLB miss whenever execution crosses a page boundary. This is done by invalidating the pages before and after the one being loaded into the TLB in the ITLB miss handler. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'include/asm-x86_64/msgbuf.h')
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