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author | Hyok S. Choi <hyok.choi@samsung.com> | 2006-09-26 17:38:32 +0900 |
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committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2006-09-27 17:39:19 +0100 |
commit | f37f46eb1c0bd0b11c34ef06c7365658be989d80 (patch) | |
tree | 1790995456cafc852899927140e5dd7523463fdb /include/asm-xtensa/tlbflush.h | |
parent | d60674eb5d961b2421db16cc373dc163f38cc105 (diff) |
[ARM] nommu: add ARM946E-S core support
This patch adds ARM946E-S core support which has typically 8KB I&D cache.
It has a MPU and supports ARMv5TE instruction set.
Because the ARM946E-S core can be synthesizable with various cache size,
CONFIG_CPU_DCACHE_SIZE is defined for vendor specific configurations.
Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-xtensa/tlbflush.h')
0 files changed, 0 insertions, 0 deletions