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authorDavid S. Miller <davem@sunset.davemloft.net>2006-02-05 20:47:26 -0800
committerDavid S. Miller <davem@sunset.davemloft.net>2006-03-20 01:11:47 -0800
commit6e02493a7f33ac89e698b980a657d77ab2749eaf (patch)
treefcb6a17c2222a1aa601faf95a50a92b7a7a9224a /include/asm-xtensa
parentd619d7f11670f5b1cfca30e6645e44c8a6014820 (diff)
[SPARC64]: Fill dead cycles on trap entry with real work.
As we save trap state onto the stack, the store buffer fills up mid-way through and we stall for several cycles as the store buffer trickles out to the L2 cache. Meanwhile we can do some privileged register reads and other calculations, essentially for free. Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/asm-xtensa')
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