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authorLennert Buytenhek <buytenh@wantstofly.org>2008-03-27 14:51:40 -0400
committerNicolas Pitre <nico@marvell.com>2008-03-27 14:51:40 -0400
commitabc0197d7a74e51a1581ce9971d7c2c0f2adadaf (patch)
tree45d8acf4a401fd3eac32413161da657328b5ea94 /include
parent01eb569823792ab83b2810fcb31fa38560b08951 (diff)
plat-orion: share PCIe handling code
Split off Orion PCIe handling code into plat-orion/. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Reviewed-by: Tzachi Perelstein <tzachi@marvell.com> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Nicolas Pitre <nico@marvell.com>
Diffstat (limited to 'include')
-rw-r--r--include/asm-arm/plat-orion/pcie.h31
1 files changed, 31 insertions, 0 deletions
diff --git a/include/asm-arm/plat-orion/pcie.h b/include/asm-arm/plat-orion/pcie.h
new file mode 100644
index 00000000000..6434ac685d2
--- /dev/null
+++ b/include/asm-arm/plat-orion/pcie.h
@@ -0,0 +1,31 @@
+/*
+ * include/asm-arm/plat-orion/pcie.h
+ *
+ * Marvell Orion SoC PCIe handling.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#ifndef __ASM_PLAT_ORION_PCIE_H
+#define __ASM_PLAT_ORION_PCIE_H
+
+u32 orion_pcie_dev_id(void __iomem *base);
+u32 orion_pcie_rev(void __iomem *base);
+int orion_pcie_link_up(void __iomem *base);
+int orion_pcie_get_local_bus_nr(void __iomem *base);
+void orion_pcie_set_local_bus_nr(void __iomem *base, int nr);
+void orion_pcie_setup(void __iomem *base,
+ struct mbus_dram_target_info *dram);
+int orion_pcie_rd_conf(void __iomem *base, struct pci_bus *bus,
+ u32 devfn, int where, int size, u32 *val);
+int orion_pcie_rd_conf_tlp(void __iomem *base, struct pci_bus *bus,
+ u32 devfn, int where, int size, u32 *val);
+int orion_pcie_rd_conf_wa(void __iomem *wa_base, struct pci_bus *bus,
+ u32 devfn, int where, int size, u32 *val);
+int orion_pcie_wr_conf(void __iomem *base, struct pci_bus *bus,
+ u32 devfn, int where, int size, u32 val);
+
+
+#endif