aboutsummaryrefslogtreecommitdiff
path: root/include
diff options
context:
space:
mode:
authorSylvain Munaut <tnt@246tNt.com>2007-09-16 20:53:26 +1000
committerGrant Likely <grant.likely@secretlab.ca>2007-10-16 17:09:27 -0600
commit07e6e93136ca61f071c819c69e1ec5bff9fda46f (patch)
treef5dd88f6cc7842d40b9abbd7e8f7f3ac323e9b98 /include
parent1088a20998a1091b22b42cf3dc2f5f1be4faaead (diff)
[POWERPC] mpc52xx: Update mpc52xx_psc structure with B revision changes
On the mpc5200b the ccr register is 32 bits wide while on the mpc5200 it's only 16 bits. It's up to the driver to use the correct format depending on the chip it's running on. The 5200b also offers some more registers & status in AC97 mode. Again, if not running on a 5200b the driver should not use those. Signed-off-by: Sylvain Munaut <tnt@246tNt.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Diffstat (limited to 'include')
-rw-r--r--include/asm-ppc/mpc52xx_psc.h10
1 files changed, 8 insertions, 2 deletions
diff --git a/include/asm-ppc/mpc52xx_psc.h b/include/asm-ppc/mpc52xx_psc.h
index 9d850b2b20b..c82b8d49a7d 100644
--- a/include/asm-ppc/mpc52xx_psc.h
+++ b/include/asm-ppc/mpc52xx_psc.h
@@ -28,6 +28,10 @@
#define MPC52xx_PSC_MAXNUM 6
/* Programmable Serial Controller (PSC) status register bits */
+#define MPC52xx_PSC_SR_UNEX_RX 0x0001
+#define MPC52xx_PSC_SR_DATA_VAL 0x0002
+#define MPC52xx_PSC_SR_DATA_OVR 0x0004
+#define MPC52xx_PSC_SR_CMDSEND 0x0008
#define MPC52xx_PSC_SR_CDE 0x0080
#define MPC52xx_PSC_SR_RXRDY 0x0100
#define MPC52xx_PSC_SR_RXFULL 0x0200
@@ -132,8 +136,10 @@ struct mpc52xx_psc {
u8 reserved5[3];
u8 ctlr; /* PSC + 0x1c */
u8 reserved6[3];
- u16 ccr; /* PSC + 0x20 */
- u8 reserved7[14];
+ u32 ccr; /* PSC + 0x20 */
+ u32 ac97_slots; /* PSC + 0x24 */
+ u32 ac97_cmd; /* PSC + 0x28 */
+ u32 ac97_data; /* PSC + 0x2c */
u8 ivr; /* PSC + 0x30 */
u8 reserved8[3];
u8 ip; /* PSC + 0x34 */