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authorStefan Schmidt <stefan@datenfreihafen.org>2008-06-12 07:07:22 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-06-12 20:49:38 +0100
commit3692fd0aaef489b063518b5999c702bada5b6e22 (patch)
tree5e5c842ca760c74b109580a64263982964adc8d3 /include
parent62cfcf4f467733a8dc218691c791804a148da887 (diff)
[ARM] 5091/1: Add missing bitfield include to regs-lcd.h
Macros like Fld() or FShft used in regs-lcd.h are defined in bitfield.h, but the latter is not included. Also fix one whitespace issue while being there. Signed-off-by: Antonio Ospite <ao2@openezx.org> Signed-off-by: Stefan Schmidt <stefan@datenfreihafen.org> Acked-by: Eric Miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include')
-rw-r--r--include/asm-arm/arch-pxa/regs-lcd.h5
1 files changed, 4 insertions, 1 deletions
diff --git a/include/asm-arm/arch-pxa/regs-lcd.h b/include/asm-arm/arch-pxa/regs-lcd.h
index f762493f514..3ba464c913a 100644
--- a/include/asm-arm/arch-pxa/regs-lcd.h
+++ b/include/asm-arm/arch-pxa/regs-lcd.h
@@ -1,5 +1,8 @@
#ifndef __ASM_ARCH_REGS_LCD_H
#define __ASM_ARCH_REGS_LCD_H
+
+#include <asm/arch/bitfield.h>
+
/*
* LCD Controller Registers and Bits Definitions
*/
@@ -69,7 +72,7 @@
#define LCCR0_QDM (1 << 11) /* LCD Quick Disable mask */
#define LCCR0_PDD (0xff << 12) /* Palette DMA request delay */
#define LCCR0_PDD_S 12
-#define LCCR0_BM (1 << 20) /* Branch mask */
+#define LCCR0_BM (1 << 20) /* Branch mask */
#define LCCR0_OUM (1 << 21) /* Output FIFO underrun mask */
#define LCCR0_LCDT (1 << 22) /* LCD panel type */
#define LCCR0_RDSTM (1 << 23) /* Read status interrupt mask */