diff options
| author | Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 2006-10-01 19:35:28 +0900 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2006-10-01 23:16:59 +0100 |
| commit | 998ec2901aea9f412d2dc3e29a3c20f377793916 (patch) | |
| tree | cb6a15e7445b5ac018342b17f9d39cda03f0a8fd /include | |
| parent | b00f3774f2e073d399ffbd0475337466938e9273 (diff) | |
[MIPS] Add UART IRQ number for EV64120
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/asm-mips/mach-ev64120/mach-gt64120.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/asm-mips/mach-ev64120/mach-gt64120.h b/include/asm-mips/mach-ev64120/mach-gt64120.h index 13b1443a7a6..7e272ce57ea 100644 --- a/include/asm-mips/mach-ev64120/mach-gt64120.h +++ b/include/asm-mips/mach-ev64120/mach-gt64120.h @@ -42,6 +42,7 @@ extern unsigned long gt64120_base; #define EV64120_UART0_REGS_BASE (KSEG1ADDR(EV64120_COM1_BASE_ADDR)) #define EV64120_UART1_REGS_BASE (KSEG1ADDR(EV64120_COM2_BASE_ADDR)) #define EV64120_BASE_BAUD ( 3686400 / 16 ) +#define EV64120_UART_IRQ 6 /* * PCI interrupts will come in on either the INTA or INTD interrups lines, |