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authorKevin D. Kissell <kevink@mips.com>2007-07-12 16:21:08 +0100
committerRalf Baechle <ralf@linux-mips.org>2007-07-12 17:41:17 +0100
commit0db34215c7e0ef618e7b29fbf271194ca5434f8e (patch)
tree261d8cd77fad2d661157ee5e5bde8e3fdc8c96b9 /include
parentbd0765098bf22eb8b1319f649a4c3301b40ec04c (diff)
[MIPS] SMTC: Interrupt mask backstop hack
To support multiple TC microthreads acting as "CPUs" within a VPE, VPE-wide interrupt mask bits must be specially manipulated during interrupt handling. To support legacy drivers and interrupt controller management code, SMTC has a "backstop" to track and if necessary restore the interrupt mask. This has some performance impact on interrupt service overhead. Disable it only if you know what you are doing. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include')
-rw-r--r--include/asm-mips/irq.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/asm-mips/irq.h b/include/asm-mips/irq.h
index 3ca6a076124..97102ebc54b 100644
--- a/include/asm-mips/irq.h
+++ b/include/asm-mips/irq.h
@@ -24,7 +24,7 @@ static inline int irq_canonicalize(int irq)
#define irq_canonicalize(irq) (irq) /* Sane hardware, sane code ... */
#endif
-#ifdef CONFIG_MIPS_MT_SMTC
+#ifdef CONFIG_MIPS_MT_SMTC_IM_BACKSTOP
/*
* Clear interrupt mask handling "backstop" if irq_hwmask
* entry so indicates. This implies that the ack() or end()