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authorLinus Torvalds <torvalds@woody.linux-foundation.org>2007-07-28 19:33:04 -0700
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-07-28 19:33:04 -0700
commit7b5573769f26a23518b33a64ec129d2833564877 (patch)
tree697674b1d2bf12541fc745baa8ef8d9e6faf8888 /include
parent8e8ef2971b0fd6dcf1a66014fb74b41938eecb4e (diff)
parent27b92bdbd589cf3f59244bf5e848e7be254a2e4c (diff)
Merge branch 'for-linus' of master.kernel.org:/pub/scm/linux/kernel/git/cooloney/blackfin-2.6
* 'for-linus' of master.kernel.org:/pub/scm/linux/kernel/git/cooloney/blackfin-2.6: Input Serio: Blackfin doesnt support I8042 - make sure it doesnt get selected Blackfin arch: add BF54x I2C/TWI TWI0 driver support Blackfin On-Chip RTC driver update for supporting BF54x Blackfin Ethernet MAC driver: fix bug Report returned -ENOMEM upwards (in case L1/uncached memory alloc fails) Blackfin arch: add error message when IRQ no available Blackfin arch: Initialize the exception vectors early in the boot process Blackfin arch: fix a compiling warning about dma-mapping Blackfin arch: switch to using proper defines this time THREAD_SIZE and PAGE_SIZE instead of just PAGE_SIZE everywhere Blackfin arch: fix bug which unaligns the init thread's stack and causes the current macro to fail. Blackfin arch: Load P0 before storing through it Blackfin arch: fix KGDB bug, dont forget last parameter. Blackfin arch: add selections for BF544 and BF542 Blackfin arch: use bfin_read_SWRST() now that BF561 provides it Blackfin arch: setup aliases for some core Core A MMRs
Diffstat (limited to 'include')
-rw-r--r--include/asm-blackfin/bfin-global.h1
-rw-r--r--include/asm-blackfin/mach-bf548/cdefBF54x_base.h33
-rw-r--r--include/asm-blackfin/mach-bf548/irq.h1
-rw-r--r--include/asm-blackfin/mach-bf561/cdefBF561.h6
-rw-r--r--include/asm-blackfin/mach-bf561/defBF561.h4
-rw-r--r--include/asm-blackfin/thread_info.h12
6 files changed, 51 insertions, 6 deletions
diff --git a/include/asm-blackfin/bfin-global.h b/include/asm-blackfin/bfin-global.h
index c4d6cbbf96d..a970781a0f9 100644
--- a/include/asm-blackfin/bfin-global.h
+++ b/include/asm-blackfin/bfin-global.h
@@ -61,6 +61,7 @@ extern void bfin_dcache_init(void);
extern int read_iloc(void);
extern int bfin_console_init(void);
extern asmlinkage void lower_to_irq14(void);
+extern void init_exception_vectors(void);
extern void init_dma(void);
extern void program_IAR(void);
extern void evt14_softirq(void);
diff --git a/include/asm-blackfin/mach-bf548/cdefBF54x_base.h b/include/asm-blackfin/mach-bf548/cdefBF54x_base.h
index 98d35a92911..cdf29e75ea5 100644
--- a/include/asm-blackfin/mach-bf548/cdefBF54x_base.h
+++ b/include/asm-blackfin/mach-bf548/cdefBF54x_base.h
@@ -242,6 +242,39 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
#define bfin_read_TWI0_RCV_DATA16() bfin_read16(TWI0_RCV_DATA16)
#define bfin_write_TWI0_RCV_DATA16(val) bfin_write16(TWI0_RCV_DATA16, val)
+#define bfin_read_TWI_CLKDIV() bfin_read16(TWI0_CLKDIV)
+#define bfin_write_TWI_CLKDIV(val) bfin_write16(TWI0_CLKDIV, val)
+#define bfin_read_TWI_CONTROL() bfin_read16(TWI0_CONTROL)
+#define bfin_write_TWI_CONTROL(val) bfin_write16(TWI0_CONTROL, val)
+#define bfin_read_TWI_SLAVE_CTRL() bfin_read16(TWI0_SLAVE_CTRL)
+#define bfin_write_TWI_SLAVE_CTRL(val) bfin_write16(TWI0_SLAVE_CTRL, val)
+#define bfin_read_TWI_SLAVE_STAT() bfin_read16(TWI0_SLAVE_STAT)
+#define bfin_write_TWI_SLAVE_STAT(val) bfin_write16(TWI0_SLAVE_STAT, val)
+#define bfin_read_TWI_SLAVE_ADDR() bfin_read16(TWI0_SLAVE_ADDR)
+#define bfin_write_TWI_SLAVE_ADDR(val) bfin_write16(TWI0_SLAVE_ADDR, val)
+#define bfin_read_TWI_MASTER_CTL() bfin_read16(TWI0_MASTER_CTRL)
+#define bfin_write_TWI_MASTER_CTL(val) bfin_write16(TWI0_MASTER_CTRL, val)
+#define bfin_read_TWI_MASTER_STAT() bfin_read16(TWI0_MASTER_STAT)
+#define bfin_write_TWI_MASTER_STAT(val) bfin_write16(TWI0_MASTER_STAT, val)
+#define bfin_read_TWI_MASTER_ADDR() bfin_read16(TWI0_MASTER_ADDR)
+#define bfin_write_TWI_MASTER_ADDR(val) bfin_write16(TWI0_MASTER_ADDR, val)
+#define bfin_read_TWI_INT_STAT() bfin_read16(TWI0_INT_STAT)
+#define bfin_write_TWI_INT_STAT(val) bfin_write16(TWI0_INT_STAT, val)
+#define bfin_read_TWI_INT_MASK() bfin_read16(TWI0_INT_MASK)
+#define bfin_write_TWI_INT_MASK(val) bfin_write16(TWI0_INT_MASK, val)
+#define bfin_read_TWI_FIFO_CTL() bfin_read16(TWI0_FIFO_CTRL)
+#define bfin_write_TWI_FIFO_CTL(val) bfin_write16(TWI0_FIFO_CTRL, val)
+#define bfin_read_TWI_FIFO_STAT() bfin_read16(TWI0_FIFO_STAT)
+#define bfin_write_TWI_FIFO_STAT(val) bfin_write16(TWI0_FIFO_STAT, val)
+#define bfin_read_TWI_XMT_DATA8() bfin_read16(TWI0_XMT_DATA8)
+#define bfin_write_TWI_XMT_DATA8(val) bfin_write16(TWI0_XMT_DATA8, val)
+#define bfin_read_TWI_XMT_DATA16() bfin_read16(TWI0_XMT_DATA16)
+#define bfin_write_TWI_XMT_DATA16(val) bfin_write16(TWI0_XMT_DATA16, val)
+#define bfin_read_TWI_RCV_DATA8() bfin_read16(TWI0_RCV_DATA8)
+#define bfin_write_TWI_RCV_DATA8(val) bfin_write16(TWI0_RCV_DATA8, val)
+#define bfin_read_TWI_RCV_DATA16() bfin_read16(TWI0_RCV_DATA16)
+#define bfin_write_TWI_RCV_DATA16(val) bfin_write16(TWI0_RCV_DATA16, val)
+
/* SPORT0 is not defined in the shared file because it is not available on the ADSP-BF542 and ADSP-BF544 bfin_read_()rocessors */
/* SPORT1 Registers */
diff --git a/include/asm-blackfin/mach-bf548/irq.h b/include/asm-blackfin/mach-bf548/irq.h
index 0b3325bb1ff..e548d3cd81e 100644
--- a/include/asm-blackfin/mach-bf548/irq.h
+++ b/include/asm-blackfin/mach-bf548/irq.h
@@ -112,6 +112,7 @@ Events (highest priority) EMU 0
#define IRQ_ATAPI_TX BFIN_IRQ(44) /* ATAPI TX (DMA11) Interrupt */
#define IRQ_TWI0 BFIN_IRQ(45) /* TWI0 Interrupt */
#define IRQ_TWI1 BFIN_IRQ(46) /* TWI1 Interrupt */
+#define IRQ_TWI IRQ_TWI0 /* TWI Interrupt */
#define IRQ_CAN0_RX BFIN_IRQ(47) /* CAN0 Receive Interrupt */
#define IRQ_CAN0_TX BFIN_IRQ(48) /* CAN0 Transmit Interrupt */
#define IRQ_MDMAS2 BFIN_IRQ(49) /* MDMA Stream 2 Interrupt */
diff --git a/include/asm-blackfin/mach-bf561/cdefBF561.h b/include/asm-blackfin/mach-bf561/cdefBF561.h
index 1a8ec9e4692..6e87ab269ff 100644
--- a/include/asm-blackfin/mach-bf561/cdefBF561.h
+++ b/include/asm-blackfin/mach-bf561/cdefBF561.h
@@ -81,6 +81,12 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
#define bfin_write_PLL_LOCKCNT(val) bfin_write16(PLL_LOCKCNT,val)
#define bfin_read_CHIPID() bfin_read32(CHIPID)
+/* For MMR's that are reserved on Core B, set up defines to better integrate with other ports */
+#define bfin_read_SWRST() bfin_read_SICA_SWRST()
+#define bfin_write_SWRST() bfin_write_SICA_SWRST()
+#define bfin_read_SYSCR() bfin_read_SICA_SYSCR()
+#define bfin_write_SYSCR() bfin_write_SICA_SYSCR()
+
/* System Reset and Interrupt Controller registers for core A (0xFFC0 0100-0xFFC0 01FF) */
#define bfin_read_SICA_SWRST() bfin_read16(SICA_SWRST)
#define bfin_write_SICA_SWRST(val) bfin_write16(SICA_SWRST,val)
diff --git a/include/asm-blackfin/mach-bf561/defBF561.h b/include/asm-blackfin/mach-bf561/defBF561.h
index 89150ecb909..0f2dc6e6335 100644
--- a/include/asm-blackfin/mach-bf561/defBF561.h
+++ b/include/asm-blackfin/mach-bf561/defBF561.h
@@ -52,6 +52,10 @@
#define PLL_LOCKCNT 0xFFC00010 /* PLL Lock Count register (16-bit) */
#define CHIPID 0xFFC00014 /* Chip ID Register */
+/* For MMR's that are reserved on Core B, set up defines to better integrate with other ports */
+#define SWRST SICA_SWRST
+#define SYSCR SICA_SYSCR
+
/* System Reset and Interrupt Controller registers for core A (0xFFC0 0100-0xFFC0 01FF) */
#define SICA_SWRST 0xFFC00100 /* Software Reset register */
#define SICA_SYSCR 0xFFC00104 /* System Reset Configuration register */
diff --git a/include/asm-blackfin/thread_info.h b/include/asm-blackfin/thread_info.h
index fa8f08cf283..34d3c2eec94 100644
--- a/include/asm-blackfin/thread_info.h
+++ b/include/asm-blackfin/thread_info.h
@@ -39,6 +39,11 @@
*/
#define ALIGN_PAGE_MASK 0xffffe000
+/*
+ * Size of kernel stack for each process. This must be a power of 2...
+ */
+#define THREAD_SIZE 8192 /* 2 pages */
+
#ifndef __ASSEMBLY__
typedef unsigned long mm_segment_t;
@@ -76,11 +81,6 @@ struct thread_info {
#define init_thread_info (init_thread_union.thread_info)
#define init_stack (init_thread_union.stack)
-/*
- * Size of kernel stack for each process. This must be a power of 2...
- */
-#define THREAD_SIZE 8192 /* 2 pages */
-
/* How to get the thread information struct from C */
static inline struct thread_info *current_thread_info(void)
@@ -94,7 +94,7 @@ static inline struct thread_info *current_thread_info(void)
struct thread_info *ti;
__asm__("%0 = sp;": "=&d"(ti):
);
- return (struct thread_info *)((long)ti & ~8191UL);
+ return (struct thread_info *)((long)ti & ~((long)THREAD_SIZE-1));
}
/* thread information allocation */