diff options
| author | David Woodhouse <dwmw2@infradead.org> | 2007-01-18 10:34:51 +1100 |
|---|---|---|
| committer | David Woodhouse <dwmw2@infradead.org> | 2007-01-18 10:34:51 +1100 |
| commit | 9cdf083f981b8d37b3212400a359368661385099 (patch) | |
| tree | aa15a6a08ad87e650dea40fb59b3180bef0d345b /include | |
| parent | e499e01d234a31d59679b7b1e1cf628d917ba49a (diff) | |
| parent | a8b3485287731978899ced11f24628c927890e78 (diff) | |
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
Diffstat (limited to 'include')
1059 files changed, 21787 insertions, 19654 deletions
diff --git a/include/acpi/acconfig.h b/include/acpi/acconfig.h index 9e6c23c360b..ebc1f697615 100644 --- a/include/acpi/acconfig.h +++ b/include/acpi/acconfig.h @@ -105,7 +105,7 @@ /* Maximum object reference count (detects object deletion issues) */ -#define ACPI_MAX_REFERENCE_COUNT 0x800 +#define ACPI_MAX_REFERENCE_COUNT 0x1000 /* Size of cached memory mapping for system memory operation region */ diff --git a/include/acpi/acpi_bus.h b/include/acpi/acpi_bus.h index f338e40bd54..fdd10953b2b 100644 --- a/include/acpi/acpi_bus.h +++ b/include/acpi/acpi_bus.h @@ -357,7 +357,7 @@ struct device *acpi_get_physical_device(acpi_handle); /* helper */ acpi_handle acpi_get_child(acpi_handle, acpi_integer); acpi_handle acpi_get_pci_rootbridge_handle(unsigned int, unsigned int); -#define DEVICE_ACPI_HANDLE(dev) ((acpi_handle)((dev)->firmware_data)) +#define DEVICE_ACPI_HANDLE(dev) ((acpi_handle)((dev)->archdata.acpi_handle)) #endif /* CONFIG_ACPI */ diff --git a/include/acpi/acpixf.h b/include/acpi/acpixf.h index 049e9aa1b86..81458767a90 100644 --- a/include/acpi/acpixf.h +++ b/include/acpi/acpixf.h @@ -97,11 +97,12 @@ acpi_find_root_pointer(u32 flags, struct acpi_pointer *rsdp_address); acpi_status acpi_load_tables(void); -#ifdef ACPI_FUTURE_USAGE acpi_status acpi_load_table(struct acpi_table_header *table_ptr); -acpi_status acpi_unload_table(acpi_table_type table_type); +acpi_status acpi_unload_table_id(acpi_table_type table_type, acpi_owner_id id); +#ifdef ACPI_FUTURE_USAGE +acpi_status acpi_unload_table(acpi_table_type table_type); acpi_status acpi_get_table_header(acpi_table_type table_type, u32 instance, struct acpi_table_header *out_table_header); @@ -180,6 +181,8 @@ acpi_get_next_object(acpi_object_type type, acpi_status acpi_get_type(acpi_handle object, acpi_object_type * out_type); +acpi_status acpi_get_id(acpi_handle object, acpi_owner_id * out_type); + acpi_status acpi_get_parent(acpi_handle object, acpi_handle * out_handle); /* diff --git a/include/acpi/platform/aclinux.h b/include/acpi/platform/aclinux.h index 47faf27913a..7f1e92930b6 100644 --- a/include/acpi/platform/aclinux.h +++ b/include/acpi/platform/aclinux.h @@ -64,7 +64,7 @@ /* Host-dependent types and defines */ #define ACPI_MACHINE_WIDTH BITS_PER_LONG -#define acpi_cache_t kmem_cache_t +#define acpi_cache_t struct kmem_cache #define acpi_spinlock spinlock_t * #define ACPI_EXPORT_SYMBOL(symbol) EXPORT_SYMBOL(symbol); #define strtoul simple_strtoul diff --git a/include/asm-alpha/cacheflush.h b/include/asm-alpha/cacheflush.h index 805640b4107..b686cc7fc44 100644 --- a/include/asm-alpha/cacheflush.h +++ b/include/asm-alpha/cacheflush.h @@ -6,6 +6,7 @@ /* Caches aren't brain-dead on the Alpha. */ #define flush_cache_all() do { } while (0) #define flush_cache_mm(mm) do { } while (0) +#define flush_cache_dup_mm(mm) do { } while (0) #define flush_cache_range(vma, start, end) do { } while (0) #define flush_cache_page(vma, vmaddr, pfn) do { } while (0) #define flush_dcache_page(page) do { } while (0) diff --git a/include/asm-alpha/checksum.h b/include/asm-alpha/checksum.h index a5c9f08447f..d3854bbf0a9 100644 --- a/include/asm-alpha/checksum.h +++ b/include/asm-alpha/checksum.h @@ -7,21 +7,20 @@ * This is a version of ip_compute_csum() optimized for IP headers, * which always checksum on 4 octet boundaries. */ -extern unsigned short ip_fast_csum(unsigned char * iph, unsigned int ihl); +extern __sum16 ip_fast_csum(const void *iph, unsigned int ihl); /* * computes the checksum of the TCP/UDP pseudo-header * returns a 16-bit checksum, already complemented */ -extern unsigned short int csum_tcpudp_magic(unsigned long saddr, - unsigned long daddr, +extern __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr, unsigned short len, unsigned short proto, - unsigned int sum); + __wsum sum); -unsigned int csum_tcpudp_nofold(unsigned long saddr, unsigned long daddr, +__wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len, unsigned short proto, - unsigned int sum); + __wsum sum); /* * computes the checksum of a memory block at buff, length len, @@ -35,7 +34,7 @@ unsigned int csum_tcpudp_nofold(unsigned long saddr, unsigned long daddr, * * it's best to have buff aligned on a 32-bit boundary */ -extern unsigned int csum_partial(const unsigned char * buff, int len, unsigned int sum); +extern __wsum csum_partial(const void *buff, int len, __wsum sum); /* * the same as csum_partial, but copies from src while it @@ -44,9 +43,9 @@ extern unsigned int csum_partial(const unsigned char * buff, int len, unsigned i * here even more important to align src and dst on a 32-bit (or even * better 64-bit) boundary */ -unsigned int csum_partial_copy_from_user(const char __user *src, char *dst, int len, unsigned int sum, int *errp); +__wsum csum_partial_copy_from_user(const void __user *src, void *dst, int len, __wsum sum, int *errp); -unsigned int csum_partial_copy_nocheck(const char *src, char *dst, int len, unsigned int sum); +__wsum csum_partial_copy_nocheck(const void *src, void *dst, int len, __wsum sum); /* @@ -54,24 +53,23 @@ unsigned int csum_partial_copy_nocheck(const char *src, char *dst, int len, unsi * in icmp.c */ -extern unsigned short ip_compute_csum(unsigned char * buff, int len); +extern __sum16 ip_compute_csum(const void *buff, int len); /* * Fold a partial checksum without adding pseudo headers */ -static inline unsigned short csum_fold(unsigned int sum) +static inline __sum16 csum_fold(__wsum csum) { + u32 sum = (__force u32)csum; sum = (sum & 0xffff) + (sum >> 16); sum = (sum & 0xffff) + (sum >> 16); - return ~sum; + return (__force __sum16)~sum; } #define _HAVE_ARCH_IPV6_CSUM -extern unsigned short int csum_ipv6_magic(struct in6_addr *saddr, - struct in6_addr *daddr, - __u32 len, - unsigned short proto, - unsigned int sum); - +extern __sum16 csum_ipv6_magic(const struct in6_addr *saddr, + const struct in6_addr *daddr, + __u32 len, unsigned short proto, + __wsum sum); #endif diff --git a/include/asm-alpha/device.h b/include/asm-alpha/device.h new file mode 100644 index 00000000000..d8f9872b0e2 --- /dev/null +++ b/include/asm-alpha/device.h @@ -0,0 +1,7 @@ +/* + * Arch specific extensions to struct device + * + * This file is released under the GPLv2 + */ +#include <asm-generic/device.h> + diff --git a/include/asm-alpha/dma-mapping.h b/include/asm-alpha/dma-mapping.h index b9ff4d8cb33..57e09f5e342 100644 --- a/include/asm-alpha/dma-mapping.h +++ b/include/asm-alpha/dma-mapping.h @@ -51,7 +51,7 @@ int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) -#define dma_is_consistent(dev) (1) +#define dma_is_consistent(d, h) (1) int dma_set_mask(struct device *dev, u64 mask); @@ -60,7 +60,7 @@ int dma_set_mask(struct device *dev, u64 mask); #define dma_sync_single_range(dev, addr, off, size, dir) do { } while (0) #define dma_sync_sg_for_cpu(dev, sg, nents, dir) do { } while (0) #define dma_sync_sg_for_device(dev, sg, nents, dir) do { } while (0) -#define dma_cache_sync(va, size, dir) do { } while (0) +#define dma_cache_sync(dev, va, size, dir) do { } while (0) #define dma_get_cache_alignment() L1_CACHE_BYTES diff --git a/include/asm-alpha/posix_types.h b/include/asm-alpha/posix_types.h index c78c04a94f4..db167413300 100644 --- a/include/asm-alpha/posix_types.h +++ b/include/asm-alpha/posix_types.h @@ -49,7 +49,7 @@ typedef unsigned int __kernel_old_dev_t; #define __FD_CLR(d, set) ((set)->fds_bits[__FDELT(d)] &= ~__FDMASK(d)) #define __FD_ISSET(d, set) (((set)->fds_bits[__FDELT(d)] & __FDMASK(d)) != 0) #define __FD_ZERO(set) \ - ((void) memset ((__ptr_t) (set), 0, sizeof (__kernel_fd_set))) + ((void) memset ((void *) (set), 0, sizeof (__kernel_fd_set))) #else /* __GNUC__ */ diff --git a/include/asm-alpha/termbits.h b/include/asm-alpha/termbits.h index 5541101b58a..ad854a4a3af 100644 --- a/include/asm-alpha/termbits.h +++ b/include/asm-alpha/termbits.h @@ -25,6 +25,19 @@ struct termios { speed_t c_ospeed; /* output speed */ }; +/* Alpha has matching termios and ktermios */ + +struct ktermios { + tcflag_t c_iflag; /* input mode flags */ + tcflag_t c_oflag; /* output mode flags */ + tcflag_t c_cflag; /* control mode flags */ + tcflag_t c_lflag; /* local mode flags */ + cc_t c_cc[NCCS]; /* control characters */ + cc_t c_line; /* line discipline (== c_cc[19]) */ + speed_t c_ispeed; /* input speed */ + speed_t c_ospeed; /* output speed */ +}; + /* c_cc characters */ #define VEOF 0 #define VEOL 1 diff --git a/include/asm-alpha/unistd.h b/include/asm-alpha/unistd.h index 2cabbd465c0..84313d14e78 100644 --- a/include/asm-alpha/unistd.h +++ b/include/asm-alpha/unistd.h @@ -387,188 +387,6 @@ #define NR_SYSCALLS 447 -#if defined(__GNUC__) - -#define _syscall_return(type) \ - return (_sc_err ? errno = _sc_ret, _sc_ret = -1L : 0), (type) _sc_ret - -#define _syscall_clobbers \ - "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", \ - "$22", "$23", "$24", "$25", "$27", "$28" \ - -#define _syscall0(type, name) \ -type name(void) \ -{ \ - long _sc_ret, _sc_err; \ - { \ - register long _sc_0 __asm__("$0"); \ - register long _sc_19 __asm__("$19"); \ - \ - _sc_0 = __NR_##name; \ - __asm__("callsys # %0 %1 %2" \ - : "=r"(_sc_0), "=r"(_sc_19) \ - : "0"(_sc_0) \ - : _syscall_clobbers); \ - _sc_ret = _sc_0, _sc_err = _sc_19; \ - } \ - _syscall_return(type); \ -} - -#define _syscall1(type,name,type1,arg1) \ -type name(type1 arg1) \ -{ \ - long _sc_ret, _sc_err; \ - { \ - register long _sc_0 __asm__("$0"); \ - register long _sc_16 __asm__("$16"); \ - register long _sc_19 __asm__("$19"); \ - \ - _sc_0 = __NR_##name; \ - _sc_16 = (long) (arg1); \ - __asm__("callsys # %0 %1 %2 %3" \ - : "=r"(_sc_0), "=r"(_sc_19) \ - : "0"(_sc_0), "r"(_sc_16) \ - : _syscall_clobbers); \ - _sc_ret = _sc_0, _sc_err = _sc_19; \ - } \ - _syscall_return(type); \ -} - -#define _syscall2(type,name,type1,arg1,type2,arg2) \ -type name(type1 arg1,type2 arg2) \ -{ \ - long _sc_ret, _sc_err; \ - { \ - register long _sc_0 __asm__("$0"); \ - register long _sc_16 __asm__("$16"); \ - register long _sc_17 __asm__("$17"); \ - register long _sc_19 __asm__("$19"); \ - \ - _sc_0 = __NR_##name; \ - _sc_16 = (long) (arg1); \ - _sc_17 = (long) (arg2); \ - __asm__("callsys # %0 %1 %2 %3 %4" \ - : "=r"(_sc_0), "=r"(_sc_19) \ - : "0"(_sc_0), "r"(_sc_16), "r"(_sc_17) \ - : _syscall_clobbers); \ - _sc_ret = _sc_0, _sc_err = _sc_19; \ - } \ - _syscall_return(type); \ -} - -#define _syscall3(type,name,type1,arg1,type2,arg2,type3,arg3) \ -type name(type1 arg1,type2 arg2,type3 arg3) \ -{ \ - long _sc_ret, _sc_err; \ - { \ - register long _sc_0 __asm__("$0"); \ - register long _sc_16 __asm__("$16"); \ - register long _sc_17 __asm__("$17"); \ - register long _sc_18 __asm__("$18"); \ - register long _sc_19 __asm__("$19"); \ - \ - _sc_0 = __NR_##name; \ - _sc_16 = (long) (arg1); \ - _sc_17 = (long) (arg2); \ - _sc_18 = (long) (arg3); \ - __asm__("callsys # %0 %1 %2 %3 %4 %5" \ - : "=r"(_sc_0), "=r"(_sc_19) \ - : "0"(_sc_0), "r"(_sc_16), "r"(_sc_17), \ - "r"(_sc_18) \ - : _syscall_clobbers); \ - _sc_ret = _sc_0, _sc_err = _sc_19; \ - } \ - _syscall_return(type); \ -} - -#define _syscall4(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4) \ -type name (type1 arg1, type2 arg2, type3 arg3, type4 arg4) \ -{ \ - long _sc_ret, _sc_err; \ - { \ - register long _sc_0 __asm__("$0"); \ - register long _sc_16 __asm__("$16"); \ - register long _sc_17 __asm__("$17"); \ - register long _sc_18 __asm__("$18"); \ - register long _sc_19 __asm__("$19"); \ - \ - _sc_0 = __NR_##name; \ - _sc_16 = (long) (arg1); \ - _sc_17 = (long) (arg2); \ - _sc_18 = (long) (arg3); \ - _sc_19 = (long) (arg4); \ - __asm__("callsys # %0 %1 %2 %3 %4 %5 %6" \ - : "=r"(_sc_0), "=r"(_sc_19) \ - : "0"(_sc_0), "r"(_sc_16), "r"(_sc_17), \ - "r"(_sc_18), "1"(_sc_19) \ - : _syscall_clobbers); \ - _sc_ret = _sc_0, _sc_err = _sc_19; \ - } \ - _syscall_return(type); \ -} - -#define _syscall5(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4, \ - type5,arg5) \ -type name (type1 arg1,type2 arg2,type3 arg3,type4 arg4,type5 arg5) \ -{ \ - long _sc_ret, _sc_err; \ - { \ - register long _sc_0 __asm__("$0"); \ - register long _sc_16 __asm__("$16"); \ - register long _sc_17 __asm__("$17"); \ - register long _sc_18 __asm__("$18"); \ - register long _sc_19 __asm__("$19"); \ - register long _sc_20 __asm__("$20"); \ - \ - _sc_0 = __NR_##name; \ - _sc_16 = (long) (arg1); \ - _sc_17 = (long) (arg2); \ - _sc_18 = (long) (arg3); \ - _sc_19 = (long) (arg4); \ - _sc_20 = (long) (arg5); \ - __asm__("callsys # %0 %1 %2 %3 %4 %5 %6 %7" \ - : "=r"(_sc_0), "=r"(_sc_19) \ - : "0"(_sc_0), "r"(_sc_16), "r"(_sc_17), \ - "r"(_sc_18), "1"(_sc_19), "r"(_sc_20) \ - : _syscall_clobbers); \ - _sc_ret = _sc_0, _sc_err = _sc_19; \ - } \ - _syscall_return(type); \ -} - -#define _syscall6(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4, \ - type5,arg5,type6,arg6) \ -type name (type1 arg1,type2 arg2,type3 arg3,type4 arg4,type5 arg5, type6 arg6)\ -{ \ - long _sc_ret, _sc_err; \ - { \ - register long _sc_0 __asm__("$0"); \ - register long _sc_16 __asm__("$16"); \ - register long _sc_17 __asm__("$17"); \ - register long _sc_18 __asm__("$18"); \ - register long _sc_19 __asm__("$19"); \ - register long _sc_20 __asm__("$20"); \ - register long _sc_21 __asm__("$21"); \ - \ - _sc_0 = __NR_##name; \ - _sc_16 = (long) (arg1); \ - _sc_17 = (long) (arg2); \ - _sc_18 = (long) (arg3); \ - _sc_19 = (long) (arg4); \ - _sc_20 = (long) (arg5); \ - _sc_21 = (long) (arg6); \ - __asm__("callsys # %0 %1 %2 %3 %4 %5 %6 %7 %8" \ - : "=r"(_sc_0), "=r"(_sc_19) \ - : "0"(_sc_0), "r"(_sc_16), "r"(_sc_17), \ - "r"(_sc_18), "1"(_sc_19), "r"(_sc_20), "r"(_sc_21) \ - : _syscall_clobbers); \ - _sc_ret = _sc_0, _sc_err = _sc_19; \ - } \ - _syscall_return(type); \ -} - -#endif /* __GNUC__ */ - #define __ARCH_WANT_IPC_PARSE_VERSION #define __ARCH_WANT_OLD_READDIR #define __ARCH_WANT_STAT64 diff --git a/include/asm-arm/arch-aaec2000/memory.h b/include/asm-arm/arch-aaec2000/memory.h index 24b51cccde8..9eceb414892 100644 --- a/include/asm-arm/arch-aaec2000/memory.h +++ b/include/asm-arm/arch-aaec2000/memory.h @@ -17,8 +17,6 @@ #define __virt_to_bus(x) __virt_to_phys(x) #define __bus_to_virt(x) __phys_to_virt(x) -#ifdef CONFIG_DISCONTIGMEM - /* * The nodes are the followings: * @@ -27,42 +25,6 @@ * node 2: 0xf800.0000 - 0xfbff.ffff * node 3: 0xfc00.0000 - 0xffff.ffff */ - -/* - * Given a kernel address, find the home node of the underlying memory. - */ -#define KVADDR_TO_NID(addr) \ - (((unsigned long)(addr) - PAGE_OFFSET) >> NODE_MAX_MEM_SHIFT) - -/* - * Given a page frame number, convert it to a node id. - */ -#define PFN_TO_NID(pfn) \ - (((pfn) - PHYS_PFN_OFFSET) >> (NODE_MAX_MEM_SHIFT - PAGE_SHIFT)) - -/* - * Given a kaddr, ADDR_TO_MAPBASE finds the owning node of the memory - * and return the mem_map of that node. - */ -#define ADDR_TO_MAPBASE(kaddr) NODE_MEM_MAP(KVADDR_TO_NID(kaddr)) - -/* - * Given a page frame number, find the owning node of the memory - * and return the mem_map of that node. - */ -#define PFN_TO_MAPBASE(pfn) NODE_MEM_MAP(PFN_TO_NID(pfn)) - -/* - * Given a kaddr, LOCAL_MEM_MAP finds the owning node of the memory - * and returns the index corresponding to the appropriate page in the - * node's mem_map. - */ -#define LOCAL_MAP_NR(addr) \ - (((unsigned long)(addr) & (NODE_MAX_MEM_SIZE - 1)) >> PAGE_SHIFT) - -#define NODE_MAX_MEM_SHIFT 26 -#define NODE_MAX_MEM_SIZE (1 << NODE_MAX_MEM_SHIFT) - -#endif /* CONFIG_DISCONTIGMEM */ +#define NODE_MEM_SIZE_BITS 26 #endif /* __ASM_ARCH_MEMORY_H */ diff --git a/include/asm-arm/arch-at91rm9200/at91_aic.h b/include/asm-arm/arch-at91rm9200/at91_aic.h new file mode 100644 index 00000000000..267e69812e2 --- /dev/null +++ b/include/asm-arm/arch-at91rm9200/at91_aic.h @@ -0,0 +1,53 @@ +/* + * include/asm-arm/arch-at91rm9200/at91_aic.h + * + * Copyright (C) 2005 Ivan Kokshaysky + * Copyright (C) SAN People + * + * Advanced Interrupt Controller (AIC) - System peripherals registers. + * Based on AT91RM9200 datasheet revision E. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef AT91_AIC_H +#define AT91_AIC_H + +#define AT91_AIC_SMR(n) (AT91_AIC + ((n) * 4)) /* Source Mode Registers 0-31 */ +#define AT91_AIC_PRIOR (7 << 0) /* Priority Level */ +#define AT91_AIC_SRCTYPE (3 << 5) /* Interrupt Source Type */ +#define AT91_AIC_SRCTYPE_LOW (0 << 5) +#define AT91_AIC_SRCTYPE_FALLING (1 << 5) +#define AT91_AIC_SRCTYPE_HIGH (2 << 5) +#define AT91_AIC_SRCTYPE_RISING (3 << 5) + +#define AT91_AIC_SVR(n) (AT91_AIC + 0x80 + ((n) * 4)) /* Source Vector Registers 0-31 */ +#define AT91_AIC_IVR (AT91_AIC + 0x100) /* Interrupt Vector Register */ +#define AT91_AIC_FVR (AT91_AIC + 0x104) /* Fast Interrupt Vector Register */ +#define AT91_AIC_ISR (AT91_AIC + 0x108) /* Interrupt Status Register */ +#define AT91_AIC_IRQID (0x1f << 0) /* Current Interrupt Identifier */ + +#define AT91_AIC_IPR (AT91_AIC + 0x10c) /* Interrupt Pending Register */ +#define AT91_AIC_IMR (AT91_AIC + 0x110) /* Interrupt Mask Register */ +#define AT91_AIC_CISR (AT91_AIC + 0x114) /* Core Interrupt Status Register */ +#define AT91_AIC_NFIQ (1 << 0) /* nFIQ Status */ +#define AT91_AIC_NIRQ (1 << 1) /* nIRQ Status */ + +#define AT91_AIC_IECR (AT91_AIC + 0x120) /* Interrupt Enable Command Register */ +#define AT91_AIC_IDCR (AT91_AIC + 0x124) /* Interrupt Disable Command Register */ +#define AT91_AIC_ICCR (AT91_AIC + 0x128) /* Interrupt Clear Command Register */ +#define AT91_AIC_ISCR (AT91_AIC + 0x12c) /* Interrupt Set Command Register */ +#define AT91_AIC_EOICR (AT91_AIC + 0x130) /* End of Interrupt Command Register */ +#define AT91_AIC_SPU (AT91_AIC + 0x134) /* Spurious Interrupt Vector Register */ +#define AT91_AIC_DCR (AT91_AIC + 0x138) /* Debug Control Register */ +#define AT91_AIC_DCR_PROT (1 << 0) /* Protection Mode */ +#define AT91_AIC_DCR_GMSK (1 << 1) /* General Mask */ + +#define AT91_AIC_FFER (AT91_AIC + 0x140) /* Fast Forcing Enable Register [SAM9 only] */ +#define AT91_AIC_FFDR (AT91_AIC + 0x144) /* Fast Forcing Disable Register [SAM9 only] */ +#define AT91_AIC_FFSR (AT91_AIC + 0x148) /* Fast Forcing Status Register [SAM9 only] */ + +#endif diff --git a/include/asm-arm/arch-at91rm9200/at91_dbgu.h b/include/asm-arm/arch-at91rm9200/at91_dbgu.h new file mode 100644 index 00000000000..e4b8b27acfc --- /dev/null +++ b/include/asm-arm/arch-at91rm9200/at91_dbgu.h @@ -0,0 +1,45 @@ +/* + * include/asm-arm/arch-at91rm9200/at91_dbgu.h + * + * Copyright (C) 2005 Ivan Kokshaysky + * Copyright (C) SAN People + * + * Debug Unit (DBGU) - System peripherals registers. + * Based on AT91RM9200 datasheet revision E. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef AT91_DBGU_H +#define AT91_DBGU_H + +#define AT91_DBGU_CR (AT91_DBGU + 0x00) /* Control Register */ +#define AT91_DBGU_MR (AT91_DBGU + 0x04) /* Mode Register */ +#define AT91_DBGU_IER (AT91_DBGU + 0x08) /* Interrupt Enable Register */ +#define AT91_DBGU_TXRDY (1 << 1) /* Transmitter Ready */ +#define AT91_DBGU_TXEMPTY (1 << 9) /* Transmitter Empty */ +#define AT91_DBGU_IDR (AT91_DBGU + 0x0c) /* Interrupt Disable Register */ +#define AT91_DBGU_IMR (AT91_DBGU + 0x10) /* Interrupt Mask Register */ +#define AT91_DBGU_SR (AT91_DBGU + 0x14) /* Status Register */ +#define AT91_DBGU_RHR (AT91_DBGU + 0x18) /* Receiver Holding Register */ +#define AT91_DBGU_THR (AT91_DBGU + 0x1c) /* Transmitter Holding Register */ +#define AT91_DBGU_BRGR (AT91_DBGU + 0x20) /* Baud Rate Generator Register */ + +#define AT91_DBGU_CIDR (AT91_DBGU + 0x40) /* Chip ID Register */ +#define AT91_DBGU_EXID (AT91_DBGU + 0x44) /* Chip ID Extension Register */ +#define AT91_CIDR_VERSION (0x1f << 0) /* Version of the Device */ +#define AT91_CIDR_EPROC (7 << 5) /* Embedded Processor */ +#define AT91_CIDR_NVPSIZ (0xf << 8) /* Nonvolatile Program Memory Size */ +#define AT91_CIDR_NVPSIZ2 (0xf << 12) /* Second Nonvolatile Program Memory Size */ +#define AT91_CIDR_SRAMSIZ (0xf << 16) /* Internal SRAM Size */ +#define AT91_CIDR_ARCH (0xff << 20) /* Architecture Identifier */ +#define AT91_CIDR_NVPTYP (7 << 28) /* Nonvolatile Program Memory Type */ +#define AT91_CIDR_EXT (1 << 31) /* Extension Flag */ + +#define AT91_DBGU_FNR (AT91_DBGU + 0x48) /* Force NTRST Register [SAM9 only] */ +#define AT91_DBGU_FNTRST (1 << 0) /* Force NTRST */ + +#endif diff --git a/include/asm-arm/arch-at91rm9200/at91_ecc.h b/include/asm-arm/arch-at91rm9200/at91_ecc.h new file mode 100644 index 00000000000..fddf256a98d --- /dev/null +++ b/include/asm-arm/arch-at91rm9200/at91_ecc.h @@ -0,0 +1,38 @@ +/* + * include/asm-arm/arch-at91rm9200/at91_ecc.h + * + * Error Corrected Code Controller (ECC) - System peripherals regsters. + * Based on AT91SAM9260 datasheet revision B. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#ifndef AT91_ECC_H +#define AT91_ECC_H + +#define AT91_ECC_CR (AT91_ECC + 0x00) /* Control register */ +#define AT91_ECC_RST (1 << 0) /* Reset parity */ + +#define AT91_ECC_MR (AT91_ECC + 0x04) /* Mode register */ +#define AT91_ECC_PAGESIZE (3 << 0) /* Page Size */ +#define AT91_ECC_PAGESIZE_528 (0) +#define AT91_ECC_PAGESIZE_1056 (1) +#define AT91_ECC_PAGESIZE_2112 (2) +#define AT91_ECC_PAGESIZE_4224 (3) + +#define AT91_ECC_SR (AT91_ECC + 0x08) /* Status register */ +#define AT91_ECC_RECERR (1 << 0) /* Recoverable Error */ +#define AT91_ECC_ECCERR (1 << 1) /* ECC Single Bit Error */ +#define AT91_ECC_MULERR (1 << 2) /* Multiple Errors */ + +#define AT91_ECC_PR (AT91_ECC + 0x0c) /* Parity register */ +#define AT91_ECC_BITADDR (0xf << 0) /* Bit Error Address */ +#define AT91_ECC_WORDADDR (0xfff << 4) /* Word Error Address */ + +#define AT91_ECC_NPR (AT91_ECC + 0x10) /* NParity register */ +#define AT91_ECC_NPARITY (0xffff << 0) /* NParity */ + +#endif diff --git a/include/asm-arm/arch-at91rm9200/at91_lcdc.h b/include/asm-arm/arch-at91rm9200/at91_lcdc.h new file mode 100644 index 00000000000..9cbfcdd3c47 --- /dev/null +++ b/include/asm-arm/arch-at91rm9200/at91_lcdc.h @@ -0,0 +1,148 @@ +/* + * include/asm-arm/arch-at91rm9200/at91_lcdc.h + * + * LCD Controller (LCDC). + * Based on AT91SAM9261 datasheet revision E. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef AT91_LCDC_H +#define AT91_LCDC_H + +#define AT91_LCDC_DMABADDR1 0x00 /* DMA Base Address Register 1 */ +#define AT91_LCDC_DMABADDR2 0x04 /* DMA Base Address Register 2 */ +#define AT91_LCDC_DMAFRMPT1 0x08 /* DMA Frame Pointer Register 1 */ +#define AT91_LCDC_DMAFRMPT2 0x0c /* DMA Frame Pointer Register 2 */ +#define AT91_LCDC_DMAFRMADD1 0x10 /* DMA Frame Address Register 1 */ +#define AT91_LCDC_DMAFRMADD2 0x14 /* DMA Frame Address Register 2 */ + +#define AT91_LCDC_DMAFRMCFG 0x18 /* DMA Frame Configuration Register */ +#define AT91_LCDC_FRSIZE (0x7fffff << 0) /* Frame Size */ +#define AT91_LCDC_BLENGTH (0x7f << 24) /* Burst Length */ + +#define AT91_LCDC_DMACON 0x1c /* DMA Control Register */ +#define AT91_LCDC_DMAEN (0x1 << 0) /* DMA Enable */ +#define AT91_LCDC_DMARST (0x1 << 1) /* DMA Reset */ +#define AT91_LCDC_DMABUSY (0x1 << 2) /* DMA Busy */ + +#define AT91_LCDC_LCDCON1 0x0800 /* LCD Control Register 1 */ +#define AT91_LCDC_BYPASS (1 << 0) /* Bypass lcd_dotck divider */ +#define AT91_LCDC_CLKVAL (0x1ff << 12) /* Clock Divider */ +#define AT91_LCDC_LINCNT (0x7ff << 21) /* Line Counter */ + +#define AT91_LCDC_LCDCON2 0x0804 /* LCD Control Register 2 */ +#define AT91_LCDC_DISTYPE (3 << 0) /* Display Type */ +#define AT91_LCDC_DISTYPE_STNMONO (0 << 0) +#define AT91_LCDC_DISTYPE_STNCOLOR (1 << 0) +#define AT91_LCDC_DISTYPE_TFT (2 << 0) +#define AT91_LCDC_SCANMOD (1 << 2) /* Scan Mode */ +#define AT91_LCDC_SCANMOD_SINGLE (0 << 2) +#define AT91_LCDC_SCANMOD_DUAL (1 << 2) +#define AT91_LCDC_IFWIDTH (3 << 3) /*Interface Width */ +#define AT91_LCDC_IFWIDTH_4 (0 << 3) +#define AT91_LCDC_IFWIDTH_8 (1 << 3) +#define AT91_LCDC_IFWIDTH_16 (2 << 3) +#define AT91_LCDC_PIXELSIZE (7 << 5) /* Bits per pixel */ +#define AT91_LCDC_PIXELSIZE_1 (0 << 5) +#define AT91_LCDC_PIXELSIZE_2 (1 << 5) +#define AT91_LCDC_PIXELSIZE_4 (2 << 5) +#define AT91_LCDC_PIXELSIZE_8 (3 << 5) +#define AT91_LCDC_PIXELSIZE_16 (4 << 5) +#define AT91_LCDC_PIXELSIZE_24 (5 << 5) +#define AT91_LCDC_INVVD (1 << 8) /* LCD Data polarity */ +#define AT91_LCDC_INVVD_NORMAL (0 << 8) +#define AT91_LCDC_INVVD_INVERTED (1 << 8) +#define AT91_LCDC_INVFRAME (1 << 9 ) /* LCD VSync polarity */ +#define AT91_LCDC_INVFRAME_NORMAL (0 << 9) +#define AT91_LCDC_INVFRAME_INVERTED (1 << 9) +#define AT91_LCDC_INVLINE (1 << 10) /* LCD HSync polarity */ +#define AT91_LCDC_INVLINE_NORMAL (0 << 10) +#define AT91_LCDC_INVLINE_INVERTED (1 << 10) +#define AT91_LCDC_INVCLK (1 << 11) /* LCD dotclk polarity */ +#define AT91_LCDC_INVCLK_NORMAL (0 << 11) +#define AT91_LCDC_INVCLK_INVERTED (1 << 11) +#define AT91_LCDC_INVDVAL (1 << 12) /* LCD dval polarity */ +#define AT91_LCDC_INVDVAL_NORMAL (0 << 12) +#define AT91_LCDC_INVDVAL_INVERTED (1 << 12) +#define AT91_LCDC_CLKMOD (1 << 15) /* LCD dotclk mode */ +#define AT91_LCDC_CLKMOD_ACTIVEDISPLAY (0 << 15) +#define AT91_LCDC_CLKMOD_ALWAYSACTIVE (1 << 15) +#define AT91_LCDC_MEMOR (1 << 31) /* Memory Ordering Format */ +#define AT91_LCDC_MEMOR_BIG (0 << 31) +#define AT91_LCDC_MEMOR_LITTLE (1 << 31) + +#define AT91_LCDC_TIM1 0x0808 /* LCD Timing Register 1 */ +#define AT91_LCDC_VFP (0xff << 0) /* Vertical Front Porch */ +#define AT91_LCDC_VBP (0xff << 8) /* Vertical Back Porch */ +#define AT91_LCDC_VPW (0x3f << 16) /* Vertical Synchronization Pulse Width */ +#define AT91_LCDC_VHDLY (0xf << 24) /* Vertical to Horizontal Delay */ + +#define AT91_LCDC_TIM2 0x080c /* LCD Timing Register 2 */ +#define AT91_LCDC_HBP (0xff << 0) /* Horizontal Back Porch */ +#define AT91_LCDC_HPW (0x3f << 8) /* Horizontal Synchronization Pulse Width */ +#define AT91_LCDC_HFP (0x7ff << 21) /* Horizontal Front Porch */ + +#define AT91_LCDC_LCDFRMCFG 0x0810 /* LCD Frame Configuration Register */ +#define AT91_LCDC_LINEVAL (0x7ff << 0) /* Vertical Size of LCD Module */ +#define AT91_LCDC_HOZVAL (0x7ff << 21) /* Horizontal Size of LCD Module */ + +#define AT91_LCDC_FIFO 0x0814 /* LCD FIFO Register */ +#define AT91_LCDC_FIFOTH (0xffff) /* FIFO Threshold */ + +#define AT91_LCDC_DP1_2 0x081c /* Dithering Pattern DP1_2 Register */ +#define AT91_LCDC_DP4_7 0x0820 /* Dithering Pattern DP4_7 Register */ +#define AT91_LCDC_DP3_5 0x0824 /* Dithering Pattern DP3_5 Register */ +#define AT91_LCDC_DP2_3 0x0828 /* Dithering Pattern DP2_3 Register */ +#define AT91_LCDC_DP5_7 0x082c /* Dithering Pattern DP5_7 Register */ +#define AT91_LCDC_DP3_4 0x0830 /* Dithering Pattern DP3_4 Register */ +#define AT91_LCDC_DP4_5 0x0834 /* Dithering Pattern DP4_5 Register */ +#define AT91_LCDC_DP6_7 0x0838 /* Dithering Pattern DP6_7 Register */ +#define AT91_LCDC_DP1_2_VAL (0xff) +#define AT91_LCDC_DP4_7_VAL (0xfffffff) +#define AT91_LCDC_DP3_5_VAL (0xfffff) +#define AT91_LCDC_DP2_3_VAL (0xfff) +#define AT91_LCDC_DP5_7_VAL (0xfffffff) +#define AT91_LCDC_DP3_4_VAL (0xffff) +#define AT91_LCDC_DP4_5_VAL (0xfffff) +#define AT91_LCDC_DP6_7_VAL (0xfffffff) + +#define AT91_LCDC_PWRCON 0x083c /* Power Control Register */ +#define AT91_LCDC_PWR (1 << 0) /* LCD Module Power Control */ +#define AT91_LCDC_GUARDT (0x7f << 1) /* Delay in Frame Period */ +#define AT91_LCDC_BUSY (1 << 31) /* LCD Busy */ + +#define AT91_LCDC_CONTRAST_CTR 0x0840 /* Contrast Control Register */ +#define AT91_LCDC_PS (3 << 0) /* Contrast Counter Prescaler */ +#define AT91_LCDC_PS_DIV1 (0 << 0) +#define AT91_LCDC_PS_DIV2 (1 << 0) +#define AT91_LCDC_PS_DIV4 (2 << 0) +#define AT91_LCDC_PS_DIV8 (3 << 0) +#define AT91_LCDC_POL (1 << 2) /* Polarity of output Pulse */ +#define AT91_LCDC_POL_NEGATIVE (0 << 2) +#define AT91_LCDC_POL_POSITIVE (1 << 2) +#define AT91_LCDC_ENA (1 << 3) /* PWM generator Control */ +#define AT91_LCDC_ENA_PWMDISABLE (0 << 3) +#define AT91_LCDC_ENA_PWMENABLE (1 << 3) + +#define AT91_LCDC_CONTRAST_VAL 0x0844 /* Contrast Value Register */ +#define AT91_LCDC_CVAL (0xff) /* PWM compare value */ + +#define AT91_LCDC_IER 0x0848 /* Interrupt Enable Register */ +#define AT91_LCDC_IDR 0x084c /* Interrupt Disable Register */ +#define AT91_LCDC_IMR 0x0850 /* Interrupt Mask Register */ +#define AT91_LCDC_ISR 0x0854 /* Interrupt Enable Register */ +#define AT91_LCDC_ICR 0x0858 /* Interrupt Clear Register */ +#define AT91_LCDC_LNI (1 << 0) /* Line Interrupt */ +#define AT91_LCDC_LSTLNI (1 << 1) /* Last Line Interrupt */ +#define AT91_LCDC_EOFI (1 << 2) /* DMA End Of Frame Interrupt */ +#define AT91_LCDC_UFLWI (1 << 4) /* FIFO Underflow Interrupt */ +#define AT91_LCDC_OWRI (1 << 5) /* FIFO Overwrite Interrupt */ +#define AT91_LCDC_MERI (1 << 6) /* DMA Memory Error Interrupt */ + +#define AT91_LCDC_LUT_(n) (0x0c00 + ((n)*4)) /* Palette Entry 0..255 */ + +#endif diff --git a/include/asm-arm/arch-at91rm9200/at91rm9200_mci.h b/include/asm-arm/arch-at91rm9200/at91_mci.h index f28636d61e3..9a552cb743c 100644 --- a/include/asm-arm/arch-at91rm9200/at91rm9200_mci.h +++ b/include/asm-arm/arch-at91rm9200/at91_mci.h @@ -1,11 +1,11 @@ /* - * include/asm-arm/arch-at91rm9200/at91rm9200_mci.h + * include/asm-arm/arch-at91rm9200/at91_mci.h * * Copyright (C) 2005 Ivan Kokshaysky * Copyright (C) SAN People * * MultiMedia Card Interface (MCI) registers. - * Based on AT91RM9200 datasheet revision E. + * Based on AT91RM9200 datasheet revision F. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -13,8 +13,8 @@ * (at your option) any later version. */ -#ifndef AT91RM9200_MCI_H -#define AT91RM9200_MCI_H +#ifndef AT91_MCI_H +#define AT91_MCI_H #define AT91_MCI_CR 0x00 /* Control Register */ #define AT91_MCI_MCIEN (1 << 0) /* Multi-Media Interface Enable */ @@ -25,10 +25,10 @@ #define AT91_MCI_MR 0x04 /* Mode Register */ #define AT91_MCI_CLKDIV (0xff << 0) /* Clock Divider */ -#define AT91_MCI_PWSDIV (3 << 8) /* Power Saving Divider */ +#define AT91_MCI_PWSDIV (7 << 8) /* Power Saving Divider */ #define AT91_MCI_PDCPADV (1 << 14) /* PDC Padding Value */ #define AT91_MCI_PDCMODE (1 << 15) /* PDC-orientated Mode */ -#define AT91_MCI_BLKLEN (0xfff << 18) /* Data Block Length */ +#define AT91_MCI_BLKLEN (0xfff << 18) /* Data Block Length */ #define AT91_MCI_DTOR 0x08 /* Data Timeout Register */ #define AT91_MCI_DTOCYC (0xf << 0) /* Data Timeout Cycle Number */ @@ -43,8 +43,8 @@ #define AT91_MCI_DTOMUL_1M (7 << 4) #define AT91_MCI_SDCR 0x0c /* SD Card Register */ -#define AT91_MCI_SDCSEL (0xf << 0) /* SD Card Selector */ -#define AT91_MCI_SDCBUS (1 << 7) /* 1-bit or 4-bit bus */ +#define AT91_MCI_SDCSEL (3 << 0) /* SD Card Selector */ +#define AT91_MCI_SDCBUS (1 << 7) /* 1-bit or 4-bit bus */ #define AT91_MCI_ARGR 0x10 /* Argument Register */ @@ -78,18 +78,20 @@ #define AT91_MCI_SR 0x40 /* Status Register */ #define AT91_MCI_CMDRDY (1 << 0) /* Command Ready */ -#define AT91_MCI_RXRDY (1 << 1) /* Receiver Ready */ +#define AT91_MCI_RXRDY (1 << 1) /* Receiver Ready */ #define AT91_MCI_TXRDY (1 << 2) /* Transmit Ready */ #define AT91_MCI_BLKE (1 << 3) /* Data Block Ended */ #define AT91_MCI_DTIP (1 << 4) /* Data Transfer in Progress */ #define AT91_MCI_NOTBUSY (1 << 5) /* Data Not Busy */ #define AT91_MCI_ENDRX (1 << 6) /* End of RX Buffer */ #define AT91_MCI_ENDTX (1 << 7) /* End fo TX Buffer */ +#define AT91_MCI_SDIOIRQA (1 << 8) /* SDIO Interrupt for Slot A */ +#define At91_MCI_SDIOIRQB (1 << 9) /* SDIO Interrupt for Slot B [AT91RM9200 only] */ #define AT91_MCI_RXBUFF (1 << 14) /* RX Buffer Full */ #define AT91_MCI_TXBUFE (1 << 15) /* TX Buffer Empty */ -#define AT91_MCI_RINDE (1 << 16) /* Response Index Error */ +#define AT91_MCI_RINDE (1 << 16) /* Response Index Error */ #define AT91_MCI_RDIRE (1 << 17) /* Response Direction Error */ -#define AT91_MCI_RCRCE (1 << 18) /* Response CRC Error */ +#define AT91_MCI_RCRCE (1 << 18) /* Response CRC Error */ #define AT91_MCI_RENDE (1 << 19) /* Response End Bit Error */ #define AT91_MCI_RTOE (1 << 20) /* Reponse Time-out Error */ #define AT91_MCI_DCRCE (1 << 21) /* Data CRC Error */ diff --git a/include/asm-arm/arch-at91rm9200/at91rm9200_pdc.h b/include/asm-arm/arch-at91rm9200/at91_pdc.h index ce1150d4438..79d6e02fa45 100644 --- a/include/asm-arm/arch-at91rm9200/at91rm9200_pdc.h +++ b/include/asm-arm/arch-at91rm9200/at91_pdc.h @@ -1,5 +1,5 @@ /* - * include/asm-arm/arch-at91rm9200/at91rm9200_pdc.h + * include/asm-arm/arch-at91rm9200/at91_pdc.h * * Copyright (C) 2005 Ivan Kokshaysky * Copyright (C) SAN People @@ -13,8 +13,8 @@ * (at your option) any later version. */ -#ifndef AT91RM9200_PDC_H -#define AT91RM9200_PDC_H +#ifndef AT91_PDC_H +#define AT91_PDC_H #define AT91_PDC_RPR 0x100 /* Receive Pointer Register */ #define AT91_PDC_RCR 0x104 /* Receive Counter Register */ diff --git a/include/asm-arm/arch-at91rm9200/at91_pio.h b/include/asm-arm/arch-at91rm9200/at91_pio.h new file mode 100644 index 00000000000..680eaa1f591 --- /dev/null +++ b/include/asm-arm/arch-at91rm9200/at91_pio.h @@ -0,0 +1,49 @@ +/* + * include/asm-arm/arch-at91rm9200/at91_pio.h + * + * Copyright (C) 2005 Ivan Kokshaysky + * Copyright (C) SAN People + * + * Parallel I/O Controller (PIO) - System peripherals registers. + * Based on AT91RM9200 datasheet revision E. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef AT91_PIO_H +#define AT91_PIO_H + +#define PIO_PER 0x00 /* Enable Register */ +#define PIO_PDR 0x04 /* Disable Register */ +#define PIO_PSR 0x08 /* Status Register */ +#define PIO_OER 0x10 /* Output Enable Register */ +#define PIO_ODR 0x14 /* Output Disable Register */ +#define PIO_OSR 0x18 /* Output Status Register */ +#define PIO_IFER 0x20 /* Glitch Input Filter Enable */ +#define PIO_IFDR 0x24 /* Glitch Input Filter Disable */ +#define PIO_IFSR 0x28 /* Glitch Input Filter Status */ +#define PIO_SODR 0x30 /* Set Output Data Register */ +#define PIO_CODR 0x34 /* Clear Output Data Register */ +#define PIO_ODSR 0x38 /* Output Data Status Register */ +#define PIO_PDSR 0x3c /* Pin Data Status Register */ +#define PIO_IER 0x40 /* Interrupt Enable Register */ +#define PIO_IDR 0x44 /* Interrupt Disable Register */ +#define PIO_IMR 0x48 /* Interrupt Mask Register */ +#define PIO_ISR 0x4c /* Interrupt Status Register */ +#define PIO_MDER 0x50 /* Multi-driver Enable Register */ +#define PIO_MDDR 0x54 /* Multi-driver Disable Register */ +#define PIO_MDSR 0x58 /* Multi-driver Status Register */ +#define PIO_PUDR 0x60 /* Pull-up Disable Register */ +#define PIO_PUER 0x64 /* Pull-up Enable Register */ +#define PIO_PUSR 0x68 /* Pull-up Status Register */ +#define PIO_ASR 0x70 /* Peripheral A Select Register */ +#define PIO_BSR 0x74 /* Peripheral B Select Register */ +#define PIO_ABSR 0x78 /* AB Status Register */ +#define PIO_OWER 0xa0 /* Output Write Enable Register */ +#define PIO_OWDR 0xa4 /* Output Write Disable Register */ +#define PIO_OWSR 0xa8 /* Output Write Status Register */ + +#endif diff --git a/include/asm-arm/arch-at91rm9200/at91_pit.h b/include/asm-arm/arch-at91rm9200/at91_pit.h new file mode 100644 index 00000000000..4a30d009c58 --- /dev/null +++ b/include/asm-arm/arch-at91rm9200/at91_pit.h @@ -0,0 +1,29 @@ +/* + * include/asm-arm/arch-at91rm9200/at91_pit.h + * + * Periodic Interval Timer (PIT) - System peripherals regsters. + * Based on AT91SAM9261 datasheet revision D. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef AT91_PIT_H +#define AT91_PIT_H + +#define AT91_PIT_MR (AT91_PIT + 0x00) /* Mode Register */ +#define AT91_PIT_PITIEN (1 << 25) /* Timer Interrupt Enable */ +#define AT91_PIT_PITEN (1 << 24) /* Timer Enabled */ +#define AT91_PIT_PIV (0xfffff) /* Periodic Interval Value */ + +#define AT91_PIT_SR (AT91_PIT + 0x04) /* Status Register */ +#define AT91_PIT_PITS (1 << 0) /* Timer Status */ + +#define AT91_PIT_PIVR (AT91_PIT + 0x08) /* Periodic Interval Value Register */ +#define AT91_PIT_PIIR (AT91_PIT + 0x0c) /* Periodic Interval Image Register */ +#define AT91_PIT_PICNT (0xfff << 20) /* Interval Counter */ +#define AT91_PIT_CPIV (0xfffff) /* Inverval Value */ + +#endif diff --git a/include/asm-arm/arch-at91rm9200/at91_pmc.h b/include/asm-arm/arch-at91rm9200/at91_pmc.h new file mode 100644 index 00000000000..de8c3da74a0 --- /dev/null +++ b/include/asm-arm/arch-at91rm9200/at91_pmc.h @@ -0,0 +1,92 @@ +/* + * include/asm-arm/arch-at91rm9200/at91_pmc.h + * + * Copyright (C) 2005 Ivan Kokshaysky + * Copyright (C) SAN People + * + * Power Management Controller (PMC) - System peripherals registers. + * Based on AT91RM9200 datasheet revision E. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef AT91_PMC_H +#define AT91_PMC_H + +#define AT91_PMC_SCER (AT91_PMC + 0x00) /* System Clock Enable Register */ +#define AT91_PMC_SCDR (AT91_PMC + 0x04) /* System Clock Disable Register */ + +#define AT91_PMC_SCSR (AT91_PMC + 0x08) /* System Clock Status Register */ +#define AT91_PMC_PCK (1 << 0) /* Processor Clock */ +#define AT91RM9200_PMC_UDP (1 << 1) /* USB Devcice Port Clock [AT91RM9200 only] */ +#define AT91RM9200_PMC_MCKUDP (1 << 2) /* USB Device Port Master Clock Automatic Disable on Suspend [AT91RM9200 only] */ +#define AT91RM9200_PMC_UHP (1 << 4) /* USB Host Port Clock [AT91RM9200 only] */ +#define AT91SAM926x_PMC_UHP (1 << 6) /* USB Host Port Clock [AT91SAM926x only] */ +#define AT91SAM926x_PMC_UDP (1 << 7) /* USB Devcice Port Clock [AT91SAM926x only] */ +#define AT91_PMC_PCK0 (1 << 8) /* Programmable Clock 0 */ +#define AT91_PMC_PCK1 (1 << 9) /* Programmable Clock 1 */ +#define AT91_PMC_PCK2 (1 << 10) /* Programmable Clock 2 */ +#define AT91_PMC_PCK3 (1 << 11) /* Programmable Clock 3 */ +#define AT91_PMC_HCK0 (1 << 16) /* AHB Clock (USB host) [AT91SAM9261 only] */ +#define AT91_PMC_HCK1 (1 << 17) /* AHB Clock (LCD) [AT91SAM9261 only] */ + +#define AT91_PMC_PCER (AT91_PMC + 0x10) /* Peripheral Clock Enable Register */ +#define AT91_PMC_PCDR (AT91_PMC + 0x14) /* Peripheral Clock Disable Register */ +#define AT91_PMC_PCSR (AT91_PMC + 0x18) /* Peripheral Clock Status Register */ + +#define AT91_CKGR_MOR (AT91_PMC + 0x20) /* Main Oscillator Register */ +#define AT91_PMC_MOSCEN (1 << 0) /* Main Oscillator Enable */ +#define AT91_PMC_OSCBYPASS (1 << 1) /* Oscillator Bypass [AT91SAM926x only] */ +#define AT91_PMC_OSCOUNT (0xff << 8) /* Main Oscillator Start-up Time */ + +#define AT91_CKGR_MCFR (AT91_PMC + 0x24) /* Main Clock Frequency Register */ +#define AT91_PMC_MAINF (0xffff << 0) /* Main Clock Frequency */ +#define AT91_PMC_MAINRDY (1 << 16) /* Main Clock Ready */ + +#define AT91_CKGR_PLLAR (AT91_PMC + 0x28) /* PLL A Register */ +#define AT91_CKGR_PLLBR (AT91_PMC + 0x2c) /* PLL B Register */ +#define AT91_PMC_DIV (0xff << 0) /* Divider */ +#define AT91_PMC_PLLCOUNT (0x3f << 8) /* PLL Counter */ +#define AT91_PMC_OUT (3 << 14) /* PLL Clock Frequency Range */ +#define AT91_PMC_MUL (0x7ff << 16) /* PLL Multiplier */ +#define AT91_PMC_USB96M (1 << 28) /* Divider by 2 Enable (PLLB only) */ + +#define AT91_PMC_MCKR (AT91_PMC + 0x30) /* Master Clock Register */ +#define AT91_PMC_CSS (3 << 0) /* Master Clock Selection */ +#define AT91_PMC_CSS_SLOW (0 << 0) +#define AT91_PMC_CSS_MAIN (1 << 0) +#define AT91_PMC_CSS_PLLA (2 << 0) +#define AT91_PMC_CSS_PLLB (3 << 0) +#define AT91_PMC_PRES (7 << 2) /* Master Clock Prescaler */ +#define AT91_PMC_PRES_1 (0 << 2) +#define AT91_PMC_PRES_2 (1 << 2) +#define AT91_PMC_PRES_4 (2 << 2) +#define AT91_PMC_PRES_8 (3 << 2) +#define AT91_PMC_PRES_16 (4 << 2) +#define AT91_PMC_PRES_32 (5 << 2) +#define AT91_PMC_PRES_64 (6 << 2) +#define AT91_PMC_MDIV (3 << 8) /* Master Clock Division */ +#define AT91_PMC_MDIV_1 (0 << 8) +#define AT91_PMC_MDIV_2 (1 << 8) +#define AT91_PMC_MDIV_3 (2 << 8) +#define AT91_PMC_MDIV_4 (3 << 8) + +#define AT91_PMC_PCKR(n) (AT91_PMC + 0x40 + ((n) * 4)) /* Programmable Clock 0-3 Registers */ + +#define AT91_PMC_IER (AT91_PMC + 0x60) /* Interrupt Enable Register */ +#define AT91_PMC_IDR (AT91_PMC + 0x64) /* Interrupt Disable Register */ +#define AT91_PMC_SR (AT91_PMC + 0x68) /* Status Register */ +#define AT91_PMC_MOSCS (1 << 0) /* MOSCS Flag */ +#define AT91_PMC_LOCKA (1 << 1) /* PLLA Lock */ +#define AT91_PMC_LOCKB (1 << 2) /* PLLB Lock */ +#define AT91_PMC_MCKRDY (1 << 3) /* Master Clock */ +#define AT91_PMC_PCK0RDY (1 << 8) /* Programmable Clock 0 */ +#define AT91_PMC_PCK1RDY (1 << 9) /* Programmable Clock 1 */ +#define AT91_PMC_PCK2RDY (1 << 10) /* Programmable Clock 2 */ +#define AT91_PMC_PCK3RDY (1 << 11) /* Programmable Clock 3 */ +#define AT91_PMC_IMR (AT91_PMC + 0x6c) /* Interrupt Mask Register */ + +#endif diff --git a/include/asm-arm/arch-at91rm9200/at91_rstc.h b/include/asm-arm/arch-at91rm9200/at91_rstc.h new file mode 100644 index 00000000000..ccdc52da973 --- /dev/null +++ b/include/asm-arm/arch-at91rm9200/at91_rstc.h @@ -0,0 +1,39 @@ +/* + * include/asm-arm/arch-at91rm9200/at91_rstc.h + * + * Reset Controller (RSTC) - System peripherals regsters. + * Based on AT91SAM9261 datasheet revision D. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef AT91_RSTC_H +#define AT91_RSTC_H + +#define AT91_RSTC_CR (AT91_RSTC + 0x00) /* Reset Controller Control Register */ +#define AT91_RSTC_PROCRST (1 << 0) /* Processor Reset */ +#define AT91_RSTC_PERRST (1 << 2) /* Peripheral Reset */ +#define AT91_RSTC_EXTRST (1 << 3) /* External Reset */ +#define AT01_RSTC_KEY (0xff << 24) /* KEY Password */ + +#define AT91_RSTC_SR (AT91_RSTC + 0x04) /* Reset Controller Status Register */ +#define AT91_RSTC_URSTS (1 << 0) /* User Reset Status */ +#define AT91_RSTC_RSTTYP (7 << 8) /* Reset Type */ +#define AT91_RSTC_RSTTYP_GENERAL (0 << 8) +#define AT91_RSTC_RSTTYP_WAKEUP (1 << 8) +#define AT91_RSTC_RSTTYP_WATCHDOG (2 << 8) +#define AT91_RSTC_RSTTYP_SOFTWARE (3 << 8) +#define AT91_RSTC_RSTTYP_USER (4 << 8) +#define AT91_RSTC_NRSTL (1 << 16) /* NRST Pin Level */ +#define AT91_RSTC_SRCMP (1 << 17) /* Software Reset Command in Progress */ + +#define AT91_RSTC_MR (AT91_RSTC + 0x08) /* Reset Controller Mode Register */ +#define AT91_RSTC_URSTEN (1 << 0) /* User Reset Enable */ +#define AT91_RSTC_URSTIEN (1 << 4) /* User Reset Interrupt Enable */ +#define AT91_RSTC_ERSTL (0xf << 8) /* External Reset Length */ +#define AT91_RSTC_KEY (0xff << 24) /* KEY Password */ + +#endif diff --git a/include/asm-arm/arch-at91rm9200/at91_rtc.h b/include/asm-arm/arch-at91rm9200/at91_rtc.h new file mode 100644 index 00000000000..6e5065d5626 --- /dev/null +++ b/include/asm-arm/arch-at91rm9200/at91_rtc.h @@ -0,0 +1,75 @@ +/* + * include/asm-arm/arch-at91rm9200/at91_rtc.h + * + * Copyright (C) 2005 Ivan Kokshaysky + * Copyright (C) SAN People + * + * Real Time Clock (RTC) - System peripheral registers. + * Based on AT91RM9200 datasheet revision E. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef AT91_RTC_H +#define AT91_RTC_H + +#define AT91_RTC_CR (AT91_RTC + 0x00) /* Control Register */ +#define AT91_RTC_UPDTIM (1 << 0) /* Update Request Time Register */ +#define AT91_RTC_UPDCAL (1 << 1) /* Update Request Calendar Register */ +#define AT91_RTC_TIMEVSEL (3 << 8) /* Time Event Selection */ +#define AT91_RTC_TIMEVSEL_MINUTE (0 << 8) +#define AT91_RTC_TIMEVSEL_HOUR (1 << 8) +#define AT91_RTC_TIMEVSEL_DAY24 (2 << 8) +#define AT91_RTC_TIMEVSEL_DAY12 (3 << 8) +#define AT91_RTC_CALEVSEL (3 << 16) /* Calendar Event Selection */ +#define AT91_RTC_CALEVSEL_WEEK (0 << 16) +#define AT91_RTC_CALEVSEL_MONTH (1 << 16) +#define AT91_RTC_CALEVSEL_YEAR (2 << 16) + +#define AT91_RTC_MR (AT91_RTC + 0x04) /* Mode Register */ +#define AT91_RTC_HRMOD (1 << 0) /* 12/24 Hour Mode */ + +#define AT91_RTC_TIMR (AT91_RTC + 0x08) /* Time Register */ +#define AT91_RTC_SEC (0x7f << 0) /* Current Second */ +#define AT91_RTC_MIN (0x7f << 8) /* Current Minute */ +#define AT91_RTC_HOUR (0x3f << 16) /* Current Hour */ +#define AT91_RTC_AMPM (1 << 22) /* Ante Meridiem Post Meridiem Indicator */ + +#define AT91_RTC_CALR (AT91_RTC + 0x0c) /* Calendar Register */ +#define AT91_RTC_CENT (0x7f << 0) /* Current Century */ +#define AT91_RTC_YEAR (0xff << 8) /* Current Year */ +#define AT91_RTC_MONTH (0x1f << 16) /* Current Month */ +#define AT91_RTC_DAY (7 << 21) /* Current Day */ +#define AT91_RTC_DATE (0x3f << 24) /* Current Date */ + +#define AT91_RTC_TIMALR (AT91_RTC + 0x10) /* Time Alarm Register */ +#define AT91_RTC_SECEN (1 << 7) /* Second Alarm Enable */ +#define AT91_RTC_MINEN (1 << 15) /* Minute Alarm Enable */ +#define AT91_RTC_HOUREN (1 << 23) /* Hour Alarm Enable */ + +#define AT91_RTC_CALALR (AT91_RTC + 0x14) /* Calendar Alarm Register */ +#define AT91_RTC_MTHEN (1 << 23) /* Month Alarm Enable */ +#define AT91_RTC_DATEEN (1 << 31) /* Date Alarm Enable */ + +#define AT91_RTC_SR (AT91_RTC + 0x18) /* Status Register */ +#define AT91_RTC_ACKUPD (1 << 0) /* Acknowledge for Update */ +#define AT91_RTC_ALARM (1 << 1) /* Alarm Flag */ +#define AT91_RTC_SECEV (1 << 2) /* Second Event */ +#define AT91_RTC_TIMEV (1 << 3) /* Time Event */ +#define AT91_RTC_CALEV (1 << 4) /* Calendar Event */ + +#define AT91_RTC_SCCR (AT91_RTC + 0x1c) /* Status Clear Command Register */ +#define AT91_RTC_IER (AT91_RTC + 0x20) /* Interrupt Enable Register */ +#define AT91_RTC_IDR (AT91_RTC + 0x24) /* Interrupt Disable Register */ +#define AT91_RTC_IMR (AT91_RTC + 0x28) /* Interrupt Mask Register */ + +#define AT91_RTC_VER (AT91_RTC + 0x2c) /* Valid Entry Register */ +#define AT91_RTC_NVTIM (1 << 0) /* Non valid Time */ +#define AT91_RTC_NVCAL (1 << 1) /* Non valid Calendar */ +#define AT91_RTC_NVTIMALR (1 << 2) /* Non valid Time Alarm */ +#define AT91_RTC_NVCALALR (1 << 3) /* Non valid Calendar Alarm */ + +#endif diff --git a/include/asm-arm/arch-at91rm9200/at91_rtt.h b/include/asm-arm/arch-at91rm9200/at91_rtt.h new file mode 100644 index 00000000000..c6751ba3ccc --- /dev/null +++ b/include/asm-arm/arch-at91rm9200/at91_rtt.h @@ -0,0 +1,32 @@ +/* + * include/asm-arm/arch-at91rm9200/at91_rtt.h + * + * Real-time Timer (RTT) - System peripherals regsters. + * Based on AT91SAM9261 datasheet revision D. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef AT91_RTT_H +#define AT91_RTT_H + +#define AT91_RTT_MR (AT91_RTT + 0x00) /* Real-time Mode Register */ +#define AT91_RTT_RTPRES (0xffff << 0) /* Real-time Timer Prescaler Value */ +#define AT91_RTT_ALMIEN (1 << 16) /* Alarm Interrupt Enable */ +#define AT91_RTT_RTTINCIEN (1 << 17) /* Real Time Timer Increment Interrupt Enable */ +#define AT91_RTT_RTTRST (1 << 18) /* Real Time Timer Restart */ + +#define AT91_RTT_AR (AT91_RTT + 0x04) /* Real-time Alarm Register */ +#define AT91_RTT_ALMV (0xffffffff) /* Alarm Value */ + +#define AT91_RTT_VR (AT91_RTT + 0x08) /* Real-time Value Register */ +#define AT91_RTT_CRTV (0xffffffff) /* Current Real-time Value */ + +#define AT91_RTT_SR (AT91_RTT + 0x0c) /* Real-time Status Register */ +#define AT91_RTT_ALMS (1 << 0) /* Real-time Alarm Status */ +#define AT91_RTT_RTTINC (1 << 1) /* Real-time Timer Increment */ + +#endif diff --git a/include/asm-arm/arch-at91rm9200/at91_shdwc.h b/include/asm-arm/arch-at91rm9200/at91_shdwc.h new file mode 100644 index 00000000000..0439250553c --- /dev/null +++ b/include/asm-arm/arch-at91rm9200/at91_shdwc.h @@ -0,0 +1,33 @@ +/* + * include/asm-arm/arch-at91rm9200/at91_shdwc.h + * + * Shutdown Controller (SHDWC) - System peripherals regsters. + * Based on AT91SAM9261 datasheet revision D. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef AT91_SHDWC_H +#define AT91_SHDWC_H + +#define AT91_SHDW_CR (AT91_SHDWC + 0x00) /* Shut Down Control Register */ +#define AT91_SHDW_SHDW (1 << 0) /* Processor Reset */ +#define AT91_SHDW_KEY (0xff << 24) /* KEY Password */ + +#define AT91_SHDW_MR (AT91_SHDWC + 0x04) /* Shut Down Mode Register */ +#define AT91_SHDW_WKMODE0 (3 << 0) /* Wake-up 0 Mode Selection */ +#define AT91_SHDW_WKMODE0_NONE 0 +#define AT91_SHDW_WKMODE0_HIGH 1 +#define AT91_SHDW_WKMODE0_LOW 2 +#define AT91_SHDW_WKMODE0_ANYLEVEL 3 +#define AT91_SHDW_CPTWK0 (0xf << 4) /* Counter On Wake Up 0 */ +#define AT91_SHDW_RTTWKEN (1 << 16) /* Real Time Timer Wake-up Enable */ + +#define AT91_SHDW_SR (AT91_SHDWC + 0x08) /* Shut Down Status Register */ +#define AT91_SHDW_WAKEUP0 (1 << 0) /* Wake-up 0 Status */ +#define AT91_SHDW_RTTWK (1 << 16) /* Real-time Timer Wake-up */ + +#endif diff --git a/include/asm-arm/arch-at91rm9200/at91rm9200_spi.h b/include/asm-arm/arch-at91rm9200/at91_spi.h index bff5ea45f60..bec48ca89bb 100644 --- a/include/asm-arm/arch-at91rm9200/at91rm9200_spi.h +++ b/include/asm-arm/arch-at91rm9200/at91_spi.h @@ -1,5 +1,5 @@ /* - * include/asm-arm/arch-at91rm9200/at91rm9200_spi.h + * include/asm-arm/arch-at91rm9200/at91_spi.h * * Copyright (C) 2005 Ivan Kokshaysky * Copyright (C) SAN People @@ -13,8 +13,8 @@ * (at your option) any later version. */ -#ifndef AT91RM9200_SPI_H -#define AT91RM9200_SPI_H +#ifndef AT91_SPI_H +#define AT91_SPI_H #define AT91_SPI_CR 0x00 /* Control Register */ #define AT91_SPI_SPIEN (1 << 0) /* SPI Enable */ @@ -28,7 +28,7 @@ #define AT91_SPI_PS_FIXED (0 << 1) #define AT91_SPI_PS_VARIABLE (1 << 1) #define AT91_SPI_PCSDEC (1 << 2) /* Chip Select Decode */ -#define AT91_SPI_DIV32 (1 << 3) /* Clock Selection */ +#define AT91_SPI_DIV32 (1 << 3) /* Clock Selection [AT91RM9200 only] */ #define AT91_SPI_MODFDIS (1 << 4) /* Mode Fault Detection */ #define AT91_SPI_LLB (1 << 7) /* Local Loopback Enable */ #define AT91_SPI_PCS (0xf << 16) /* Peripheral Chip Select */ diff --git a/include/asm-arm/arch-at91rm9200/at91rm9200_ssc.h b/include/asm-arm/arch-at91rm9200/at91_ssc.h index ac880227147..694bcaa8f7c 100644 --- a/include/asm-arm/arch-at91rm9200/at91rm9200_ssc.h +++ b/include/asm-arm/arch-at91rm9200/at91_ssc.h @@ -1,5 +1,5 @@ /* - * include/asm-arm/arch-at91rm9200/at91rm9200_ssc.h + * include/asm-arm/arch-at91rm9200/at91_ssc.h * * Copyright (C) SAN People * @@ -12,8 +12,8 @@ * (at your option) any later version. */ -#ifndef AT91RM9200_SSC_H -#define AT91RM9200_SSC_H +#ifndef AT91_SSC_H +#define AT91_SSC_H #define AT91_SSC_CR 0x00 /* Control Register */ #define AT91_SSC_RXEN (1 << 0) /* Receive Enable */ @@ -36,6 +36,10 @@ #define AT91_SSC_CKI (1 << 5) /* Clock Inversion */ #define AT91_SSC_CKI_FALLING (0 << 5) #define AT91_SSC_CK_RISING (1 << 5) +#define AT91_SSC_CKG (1 << 6) /* Receive Clock Gating Selection [AT91SAM9261 only] */ +#define AT91_SSC_CKG_NONE (0 << 6) +#define AT91_SSC_CKG_RFLOW (1 << 6) +#define AT91_SSC_CKG_RFHIGH (2 << 6) #define AT91_SSC_START (0xf << 8) /* Start Selection */ #define AT91_SSC_START_CONTINUOUS (0 << 8) #define AT91_SSC_START_TX_RX (1 << 8) @@ -45,6 +49,7 @@ #define AT91_SSC_START_RISING_RF (5 << 8) #define AT91_SSC_START_LEVEL_RF (6 << 8) #define AT91_SSC_START_EDGE_RF (7 << 8) +#define AT91_SSC_STOP (1 << 12) /* Receive Stop Selection [AT91SAM9261 only] */ #define AT91_SSC_STTDLY (0xff << 16) /* Start Delay */ #define AT91_SSC_PERIOD (0xff << 24) /* Period Divider Selection */ @@ -75,6 +80,9 @@ #define AT91_SSC_RSHR 0x30 /* Receive Sync Holding Register */ #define AT91_SSC_TSHR 0x34 /* Transmit Sync Holding Register */ +#define AT91_SSC_RC0R 0x38 /* Receive Compare 0 Register [AT91SAM9261 only] */ +#define AT91_SSC_RC1R 0x3c /* Receive Compare 1 Register [AT91SAM9261 only] */ + #define AT91_SSC_SR 0x40 /* Status Register */ #define AT91_SSC_TXRDY (1 << 0) /* Transmit Ready */ #define AT91_SSC_TXEMPTY (1 << 1) /* Transmit Empty */ @@ -84,6 +92,8 @@ #define AT91_SSC_OVRUN (1 << 5) /* Receive Overrun */ #define AT91_SSC_ENDRX (1 << 6) /* End of Reception */ #define AT91_SSC_RXBUFF (1 << 7) /* Receive Buffer Full */ +#define AT91_SSC_CP0 (1 << 8) /* Compare 0 [AT91SAM9261 only] */ +#define AT91_SSC_CP1 (1 << 9) /* Compare 1 [AT91SAM9261 only] */ #define AT91_SSC_TXSYN (1 << 10) /* Transmit Sync */ #define AT91_SSC_RXSYN (1 << 11) /* Receive Sync */ #define AT91_SSC_TXENA (1 << 16) /* Transmit Enable */ diff --git a/include/asm-arm/arch-at91rm9200/at91_st.h b/include/asm-arm/arch-at91rm9200/at91_st.h new file mode 100644 index 00000000000..2432ddfc6c4 --- /dev/null +++ b/include/asm-arm/arch-at91rm9200/at91_st.h @@ -0,0 +1,49 @@ +/* + * include/asm-arm/arch-at91rm9200/at91_st.h + * + * Copyright (C) 2005 Ivan Kokshaysky + * Copyright (C) SAN People + * + * System Timer (ST) - System peripherals registers. + * Based on AT91RM9200 datasheet revision E. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef AT91_ST_H +#define AT91_ST_H + +#define AT91_ST_CR (AT91_ST + 0x00) /* Control Register */ +#define AT91_ST_WDRST (1 << 0) /* Watchdog Timer Restart */ + +#define AT91_ST_PIMR (AT91_ST + 0x04) /* Period Interval Mode Register */ +#define AT91_ST_PIV (0xffff << 0) /* Period Interval Value */ + +#define AT91_ST_WDMR (AT91_ST + 0x08) /* Watchdog Mode Register */ +#define AT91_ST_WDV (0xffff << 0) /* Watchdog Counter Value */ +#define AT91_ST_RSTEN (1 << 16) /* Reset Enable */ +#define AT91_ST_EXTEN (1 << 17) /* External Signal Assertion Enable */ + +#define AT91_ST_RTMR (AT91_ST + 0x0c) /* Real-time Mode Register */ +#define AT91_ST_RTPRES (0xffff << 0) /* Real-time Prescalar Value */ + +#define AT91_ST_SR (AT91_ST + 0x10) /* Status Register */ +#define AT91_ST_PITS (1 << 0) /* Period Interval Timer Status */ +#define AT91_ST_WDOVF (1 << 1) /* Watchdog Overflow */ +#define AT91_ST_RTTINC (1 << 2) /* Real-time Timer Increment */ +#define AT91_ST_ALMS (1 << 3) /* Alarm Status */ + +#define AT91_ST_IER (AT91_ST + 0x14) /* Interrupt Enable Register */ +#define AT91_ST_IDR (AT91_ST + 0x18) /* Interrupt Disable Register */ +#define AT91_ST_IMR (AT91_ST + 0x1c) /* Interrupt Mask Register */ + +#define AT91_ST_RTAR (AT91_ST + 0x20) /* Real-time Alarm Register */ +#define AT91_ST_ALMV (0xfffff << 0) /* Alarm Value */ + +#define AT91_ST_CRTR (AT91_ST + 0x24) /* Current Real-time Register */ +#define AT91_ST_CRTV (0xfffff << 0) /* Current Real-Time Value */ + +#endif diff --git a/include/asm-arm/arch-at91rm9200/at91rm9200_tc.h b/include/asm-arm/arch-at91rm9200/at91_tc.h index f4da752bb0c..8d06eb078e1 100644 --- a/include/asm-arm/arch-at91rm9200/at91rm9200_tc.h +++ b/include/asm-arm/arch-at91rm9200/at91_tc.h @@ -1,5 +1,5 @@ /* - * include/asm-arm/arch-at91rm9200/at91rm9200_tc.h + * include/asm-arm/arch-at91rm9200/at91_tc.h * * Copyright (C) SAN People * @@ -12,8 +12,8 @@ * (at your option) any later version. */ -#ifndef AT91RM9200_TC_H -#define AT91RM9200_TC_H +#ifndef AT91_TC_H +#define AT91_TC_H #define AT91_TC_BCR 0xc0 /* TC Block Control Register */ #define AT91_TC_SYNC (1 << 0) /* Synchro Command */ diff --git a/include/asm-arm/arch-at91rm9200/at91rm9200_twi.h b/include/asm-arm/arch-at91rm9200/at91_twi.h index 93547d7482b..cda914f1e74 100644 --- a/include/asm-arm/arch-at91rm9200/at91rm9200_twi.h +++ b/include/asm-arm/arch-at91rm9200/at91_twi.h @@ -1,5 +1,5 @@ /* - * include/asm-arm/arch-at91rm9200/at91rm9200_twi.h + * include/asm-arm/arch-at91rm9200/at91_twi.h * * Copyright (C) 2005 Ivan Kokshaysky * Copyright (C) SAN People @@ -13,8 +13,8 @@ * (at your option) any later version. */ -#ifndef AT91RM9200_TWI_H -#define AT91RM9200_TWI_H +#ifndef AT91_TWI_H +#define AT91_TWI_H #define AT91_TWI_CR 0x00 /* Control Register */ #define AT91_TWI_START (1 << 0) /* Send a Start Condition */ @@ -43,8 +43,8 @@ #define AT91_TWI_TXCOMP (1 << 0) /* Transmission Complete */ #define AT91_TWI_RXRDY (1 << 1) /* Receive Holding Register Ready */ #define AT91_TWI_TXRDY (1 << 2) /* Transmit Holding Register Ready */ -#define AT91_TWI_OVRE (1 << 6) /* Overrun Error */ -#define AT91_TWI_UNRE (1 << 7) /* Underrun Error */ +#define AT91_TWI_OVRE (1 << 6) /* Overrun Error [AT91RM9200 only] */ +#define AT91_TWI_UNRE (1 << 7) /* Underrun Error [AT91RM9200 only] */ #define AT91_TWI_NACK (1 << 8) /* Not Acknowledged */ #define AT91_TWI_IER 0x24 /* Interrupt Enable Register */ diff --git a/include/asm-arm/arch-at91rm9200/at91_wdt.h b/include/asm-arm/arch-at91rm9200/at91_wdt.h new file mode 100644 index 00000000000..ac63e775772 --- /dev/null +++ b/include/asm-arm/arch-at91rm9200/at91_wdt.h @@ -0,0 +1,34 @@ +/* + * include/asm-arm/arch-at91rm9200/at91_wdt.h + * + * Watchdog Timer (WDT) - System peripherals regsters. + * Based on AT91SAM9261 datasheet revision D. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef AT91_WDT_H +#define AT91_WDT_H + +#define AT91_WDT_CR (AT91_WDT + 0x00) /* Watchdog Control Register */ +#define AT91_WDT_WDRSTT (1 << 0) /* Restart */ +#define AT91_WDT_KEY (0xff << 24) /* KEY Password */ + +#define AT91_WDT_MR (AT91_WDT + 0x04) /* Watchdog Mode Register */ +#define AT91_WDT_WDV (0xfff << 0) /* Counter Value */ +#define AT91_WDT_WDFIEN (1 << 12) /* Fault Interrupt Enable */ +#define AT91_WDT_WDRSTEN (1 << 13) /* Reset Processor */ +#define AT91_WDT_WDRPROC (1 << 14) /* Timer Restart */ +#define AT91_WDT_WDDIS (1 << 15) /* Watchdog Disable */ +#define AT91_WDT_WDD (0xfff << 16) /* Delta Value */ +#define AT91_WDT_WDDBGHLT (1 << 28) /* Debug Halt */ +#define AT91_WDT_WDIDLEHLT (1 << 29) /* Idle Halt */ + +#define AT91_WDT_SR (AT91_WDT + 0x08) /* Watchdog Status Register */ +#define AT91_WDT_WDUNF (1 << 0) /* Watchdog Underflow */ +#define AT91_WDT_WDERR (1 << 1) /* Watchdog Error */ + +#endif diff --git a/include/asm-arm/arch-at91rm9200/at91rm9200.h b/include/asm-arm/arch-at91rm9200/at91rm9200.h index a5a86b1ff88..4d51177efdd 100644 --- a/include/asm-arm/arch-at91rm9200/at91rm9200.h +++ b/include/asm-arm/arch-at91rm9200/at91rm9200.h @@ -80,6 +80,22 @@ /* + * System Peripherals (offset from AT91_BASE_SYS) + */ +#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) /* Advanced Interrupt Controller */ +#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) /* Debug Unit */ +#define AT91_PIOA (0xfffff400 - AT91_BASE_SYS) /* PIO Controller A */ +#define AT91_PIOB (0xfffff600 - AT91_BASE_SYS) /* PIO Controller B */ +#define AT91_PIOC (0xfffff800 - AT91_BASE_SYS) /* PIO Controller C */ +#define AT91_PIOD (0xfffffa00 - AT91_BASE_SYS) /* PIO Controller D */ +#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) /* Power Management Controller */ +#define AT91_ST (0xfffffd00 - AT91_BASE_SYS) /* System Timer */ +#define AT91_RTC (0xfffffe00 - AT91_BASE_SYS) /* Real-Time Clock */ +#define AT91_MC (0xffffff00 - AT91_BASE_SYS) /* Memory Controllers */ + +#define AT91_MATRIX 0 /* not supported */ + +/* * Internal Memory. */ #define AT91RM9200_ROM_BASE 0x00100000 /* Internal ROM base address */ diff --git a/include/asm-arm/arch-at91rm9200/at91rm9200_mc.h b/include/asm-arm/arch-at91rm9200/at91rm9200_mc.h new file mode 100644 index 00000000000..0c0d81480b3 --- /dev/null +++ b/include/asm-arm/arch-at91rm9200/at91rm9200_mc.h @@ -0,0 +1,160 @@ +/* + * include/asm-arm/arch-at91rm9200/at91rm9200_mc.h + * + * Copyright (C) 2005 Ivan Kokshaysky + * Copyright (C) SAN People + * + * Memory Controllers (MC, EBI, SMC, SDRAMC, BFC) - System peripherals registers. + * Based on AT91RM9200 datasheet revision E. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef AT91RM9200_MC_H +#define AT91RM9200_MC_H + +/* Memory Controller */ +#define AT91_MC_RCR (AT91_MC + 0x00) /* MC Remap Control Register */ +#define AT91_MC_RCB (1 << 0) /* Remap Command Bit */ + +#define AT91_MC_ASR (AT91_MC + 0x04) /* MC Abort Status Register */ +#define AT91_MC_UNADD (1 << 0) /* Undefined Address Abort Status */ +#define AT91_MC_MISADD (1 << 1) /* Misaligned Address Abort Status */ +#define AT91_MC_ABTSZ (3 << 8) /* Abort Size Status */ +#define AT91_MC_ABTSZ_BYTE (0 << 8) +#define AT91_MC_ABTSZ_HALFWORD (1 << 8) +#define AT91_MC_ABTSZ_WORD (2 << 8) +#define AT91_MC_ABTTYP (3 << 10) /* Abort Type Status */ +#define AT91_MC_ABTTYP_DATAREAD (0 << 10) +#define AT91_MC_ABTTYP_DATAWRITE (1 << 10) +#define AT91_MC_ABTTYP_FETCH (2 << 10) +#define AT91_MC_MST0 (1 << 16) /* ARM920T Abort Source */ +#define AT91_MC_MST1 (1 << 17) /* PDC Abort Source */ +#define AT91_MC_MST2 (1 << 18) /* UHP Abort Source */ +#define AT91_MC_MST3 (1 << 19) /* EMAC Abort Source */ +#define AT91_MC_SVMST0 (1 << 24) /* Saved ARM920T Abort Source */ +#define AT91_MC_SVMST1 (1 << 25) /* Saved PDC Abort Source */ +#define AT91_MC_SVMST2 (1 << 26) /* Saved UHP Abort Source */ +#define AT91_MC_SVMST3 (1 << 27) /* Saved EMAC Abort Source */ + +#define AT91_MC_AASR (AT91_MC + 0x08) /* MC Abort Address Status Register */ + +#define AT91_MC_MPR (AT91_MC + 0x0c) /* MC Master Priority Register */ +#define AT91_MPR_MSTP0 (7 << 0) /* ARM920T Priority */ +#define AT91_MPR_MSTP1 (7 << 4) /* PDC Priority */ +#define AT91_MPR_MSTP2 (7 << 8) /* UHP Priority */ +#define AT91_MPR_MSTP3 (7 << 12) /* EMAC Priority */ + +/* External Bus Interface (EBI) registers */ +#define AT91_EBI_CSA (AT91_MC + 0x60) /* Chip Select Assignment Register */ +#define AT91_EBI_CS0A (1 << 0) /* Chip Select 0 Assignment */ +#define AT91_EBI_CS0A_SMC (0 << 0) +#define AT91_EBI_CS0A_BFC (1 << 0) +#define AT91_EBI_CS1A (1 << 1) /* Chip Select 1 Assignment */ +#define AT91_EBI_CS1A_SMC (0 << 1) +#define AT91_EBI_CS1A_SDRAMC (1 << 1) +#define AT91_EBI_CS3A (1 << 3) /* Chip Select 2 Assignment */ +#define AT91_EBI_CS3A_SMC (0 << 3) +#define AT91_EBI_CS3A_SMC_SMARTMEDIA (1 << 3) +#define AT91_EBI_CS4A (1 << 4) /* Chip Select 3 Assignment */ +#define AT91_EBI_CS4A_SMC (0 << 4) +#define AT91_EBI_CS4A_SMC_COMPACTFLASH (1 << 4) +#define AT91_EBI_CFGR (AT91_MC + 0x64) /* Configuration Register */ +#define AT91_EBI_DBPUC (1 << 0) /* Data Bus Pull-Up Configuration */ + +/* Static Memory Controller (SMC) registers */ +#define AT91_SMC_CSR(n) (AT91_MC + 0x70 + ((n) * 4))/* SMC Chip Select Register */ +#define AT91_SMC_NWS (0x7f << 0) /* Number of Wait States */ +#define AT91_SMC_NWS_(x) ((x) << 0) +#define AT91_SMC_WSEN (1 << 7) /* Wait State Enable */ +#define AT91_SMC_TDF (0xf << 8) /* Data Float Time */ +#define AT91_SMC_TDF_(x) ((x) << 8) +#define AT91_SMC_BAT (1 << 12) /* Byte Access Type */ +#define AT91_SMC_DBW (3 << 13) /* Data Bus Width */ +#define AT91_SMC_DBW_16 (1 << 13) +#define AT91_SMC_DBW_8 (2 << 13) +#define AT91_SMC_DPR (1 << 15) /* Data Read Protocol */ +#define AT91_SMC_ACSS (3 << 16) /* Address to Chip Select Setup */ +#define AT91_SMC_ACSS_STD (0 << 16) +#define AT91_SMC_ACSS_1 (1 << 16) +#define AT91_SMC_ACSS_2 (2 << 16) +#define AT91_SMC_ACSS_3 (3 << 16) +#define AT91_SMC_RWSETUP (7 << 24) /* Read & Write Signal Time Setup */ +#define AT91_SMC_RWSETUP_(x) ((x) << 24) +#define AT91_SMC_RWHOLD (7 << 28) /* Read & Write Signal Hold Time */ +#define AT91_SMC_RWHOLD_(x) ((x) << 28) + +/* SDRAM Controller registers */ +#define AT91_SDRAMC_MR (AT91_MC + 0x90) /* Mode Register */ +#define AT91_SDRAMC_MODE (0xf << 0) /* Command Mode */ +#define AT91_SDRAMC_MODE_NORMAL (0 << 0) +#define AT91_SDRAMC_MODE_NOP (1 << 0) +#define AT91_SDRAMC_MODE_PRECHARGE (2 << 0) +#define AT91_SDRAMC_MODE_LMR (3 << 0) +#define AT91_SDRAMC_MODE_REFRESH (4 << 0) +#define AT91_SDRAMC_DBW (1 << 4) /* Data Bus Width */ +#define AT91_SDRAMC_DBW_32 (0 << 4) +#define AT91_SDRAMC_DBW_16 (1 << 4) + +#define AT91_SDRAMC_TR (AT91_MC + 0x94) /* Refresh Timer Register */ +#define AT91_SDRAMC_COUNT (0xfff << 0) /* Refresh Timer Count */ + +#define AT91_SDRAMC_CR (AT91_MC + 0x98) /* Configuration Register */ +#define AT91_SDRAMC_NC (3 << 0) /* Number of Column Bits */ +#define AT91_SDRAMC_NC_8 (0 << 0) +#define AT91_SDRAMC_NC_9 (1 << 0) +#define AT91_SDRAMC_NC_10 (2 << 0) +#define AT91_SDRAMC_NC_11 (3 << 0) +#define AT91_SDRAMC_NR (3 << 2) /* Number of Row Bits */ +#define AT91_SDRAMC_NR_11 (0 << 2) +#define AT91_SDRAMC_NR_12 (1 << 2) +#define AT91_SDRAMC_NR_13 (2 << 2) +#define AT91_SDRAMC_NB (1 << 4) /* Number of Banks */ +#define AT91_SDRAMC_NB_2 (0 << 4) +#define AT91_SDRAMC_NB_4 (1 << 4) +#define AT91_SDRAMC_CAS (3 << 5) /* CAS Latency */ +#define AT91_SDRAMC_CAS_2 (2 << 5) +#define AT91_SDRAMC_TWR (0xf << 7) /* Write Recovery Delay */ +#define AT91_SDRAMC_TRC (0xf << 11) /* Row Cycle Delay */ +#define AT91_SDRAMC_TRP (0xf << 15) /* Row Precharge Delay */ +#define AT91_SDRAMC_TRCD (0xf << 19) /* Row to Column Delay */ +#define AT91_SDRAMC_TRAS (0xf << 23) /* Active to Precharge Delay */ +#define AT91_SDRAMC_TXSR (0xf << 27) /* Exit Self Refresh to Active Delay */ + +#define AT91_SDRAMC_SRR (AT91_MC + 0x9c) /* Self Refresh Register */ +#define AT91_SDRAMC_LPR (AT91_MC + 0xa0) /* Low Power Register */ +#define AT91_SDRAMC_IER (AT91_MC + 0xa4) /* Interrupt Enable Register */ +#define AT91_SDRAMC_IDR (AT91_MC + 0xa8) /* Interrupt Disable Register */ +#define AT91_SDRAMC_IMR (AT91_MC + 0xac) /* Interrupt Mask Register */ +#define AT91_SDRAMC_ISR (AT91_MC + 0xb0) /* Interrupt Status Register */ + +/* Burst Flash Controller register */ +#define AT91_BFC_MR (AT91_MC + 0xc0) /* Mode Register */ +#define AT91_BFC_BFCOM (3 << 0) /* Burst Flash Controller Operating Mode */ +#define AT91_BFC_BFCOM_DISABLED (0 << 0) +#define AT91_BFC_BFCOM_ASYNC (1 << 0) +#define AT91_BFC_BFCOM_BURST (2 << 0) +#define AT91_BFC_BFCC (3 << 2) /* Burst Flash Controller Clock */ +#define AT91_BFC_BFCC_MCK (1 << 2) +#define AT91_BFC_BFCC_DIV2 (2 << 2) +#define AT91_BFC_BFCC_DIV4 (3 << 2) +#define AT91_BFC_AVL (0xf << 4) /* Address Valid Latency */ +#define AT91_BFC_PAGES (7 << 8) /* Page Size */ +#define AT91_BFC_PAGES_NO_PAGE (0 << 8) +#define AT91_BFC_PAGES_16 (1 << 8) +#define AT91_BFC_PAGES_32 (2 << 8) +#define AT91_BFC_PAGES_64 (3 << 8) +#define AT91_BFC_PAGES_128 (4 << 8) +#define AT91_BFC_PAGES_256 (5 << 8) +#define AT91_BFC_PAGES_512 (6 << 8) +#define AT91_BFC_PAGES_1024 (7 << 8) +#define AT91_BFC_OEL (3 << 12) /* Output Enable Latency */ +#define AT91_BFC_BAAEN (1 << 16) /* Burst Address Advance Enable */ +#define AT91_BFC_BFOEH (1 << 17) /* Burst Flash Output Enable Handling */ +#define AT91_BFC_MUXEN (1 << 18) /* Multiplexed Bus Enable */ +#define AT91_BFC_RDYEN (1 << 19) /* Ready Enable Mode */ + +#endif diff --git a/include/asm-arm/arch-at91rm9200/at91rm9200_sys.h b/include/asm-arm/arch-at91rm9200/at91rm9200_sys.h deleted file mode 100644 index 73693fea76a..00000000000 --- a/include/asm-arm/arch-at91rm9200/at91rm9200_sys.h +++ /dev/null @@ -1,438 +0,0 @@ -/* - * include/asm-arm/arch-at91rm9200/at91rm9200_sys.h - * - * Copyright (C) 2005 Ivan Kokshaysky - * Copyright (C) SAN People - * - * System peripherals registers. - * Based on AT91RM9200 datasheet revision E. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91RM9200_SYS_H -#define AT91RM9200_SYS_H - -/* - * Advanced Interrupt Controller. - */ -#define AT91_AIC 0x000 - -#define AT91_AIC_SMR(n) (AT91_AIC + ((n) * 4)) /* Source Mode Registers 0-31 */ -#define AT91_AIC_PRIOR (7 << 0) /* Priority Level */ -#define AT91_AIC_SRCTYPE (3 << 5) /* Interrupt Source Type */ -#define AT91_AIC_SRCTYPE_LOW (0 << 5) -#define AT91_AIC_SRCTYPE_FALLING (1 << 5) -#define AT91_AIC_SRCTYPE_HIGH (2 << 5) -#define AT91_AIC_SRCTYPE_RISING (3 << 5) - -#define AT91_AIC_SVR(n) (AT91_AIC + 0x80 + ((n) * 4)) /* Source Vector Registers 0-31 */ -#define AT91_AIC_IVR (AT91_AIC + 0x100) /* Interrupt Vector Register */ -#define AT91_AIC_FVR (AT91_AIC + 0x104) /* Fast Interrupt Vector Register */ -#define AT91_AIC_ISR (AT91_AIC + 0x108) /* Interrupt Status Register */ -#define AT91_AIC_IRQID (0x1f << 0) /* Current Interrupt Identifier */ - -#define AT91_AIC_IPR (AT91_AIC + 0x10c) /* Interrupt Pending Register */ -#define AT91_AIC_IMR (AT91_AIC + 0x110) /* Interrupt Mask Register */ -#define AT91_AIC_CISR (AT91_AIC + 0x114) /* Core Interrupt Status Register */ -#define AT91_AIC_NFIQ (1 << 0) /* nFIQ Status */ -#define AT91_AIC_NIRQ (1 << 1) /* nIRQ Status */ - -#define AT91_AIC_IECR (AT91_AIC + 0x120) /* Interrupt Enable Command Register */ -#define AT91_AIC_IDCR (AT91_AIC + 0x124) /* Interrupt Disable Command Register */ -#define AT91_AIC_ICCR (AT91_AIC + 0x128) /* Interrupt Clear Command Register */ -#define AT91_AIC_ISCR (AT91_AIC + 0x12c) /* Interrupt Set Command Register */ -#define AT91_AIC_EOICR (AT91_AIC + 0x130) /* End of Interrupt Command Register */ -#define AT91_AIC_SPU (AT91_AIC + 0x134) /* Spurious Interrupt Vector Register */ -#define AT91_AIC_DCR (AT91_AIC + 0x138) /* Debug Control Register */ -#define AT91_AIC_DCR_PROT (1 << 0) /* Protection Mode */ -#define AT91_AIC_DCR_GMSK (1 << 1) /* General Mask */ - - -/* - * Debug Unit. - */ -#define AT91_DBGU 0x200 - -#define AT91_DBGU_CR (AT91_DBGU + 0x00) /* Control Register */ -#define AT91_DBGU_MR (AT91_DBGU + 0x04) /* Mode Register */ -#define AT91_DBGU_IER (AT91_DBGU + 0x08) /* Interrupt Enable Register */ -#define AT91_DBGU_TXRDY (1 << 1) /* Transmitter Ready */ -#define AT91_DBGU_TXEMPTY (1 << 9) /* Transmitter Empty */ -#define AT91_DBGU_IDR (AT91_DBGU + 0x0c) /* Interrupt Disable Register */ -#define AT91_DBGU_IMR (AT91_DBGU + 0x10) /* Interrupt Mask Register */ -#define AT91_DBGU_SR (AT91_DBGU + 0x14) /* Status Register */ -#define AT91_DBGU_RHR (AT91_DBGU + 0x18) /* Receiver Holding Register */ -#define AT91_DBGU_THR (AT91_DBGU + 0x1c) /* Transmitter Holding Register */ -#define AT91_DBGU_BRGR (AT91_DBGU + 0x20) /* Baud Rate Generator Register */ - -#define AT91_DBGU_CIDR (AT91_DBGU + 0x40) /* Chip ID Register */ -#define AT91_DBGU_EXID (AT91_DBGU + 0x44) /* Chip ID Extension Register */ -#define AT91_CIDR_VERSION (0x1f << 0) /* Version of the Device */ -#define AT91_CIDR_EPROC (7 << 5) /* Embedded Processor */ -#define AT91_CIDR_NVPSIZ (0xf << 8) /* Nonvolatile Program Memory Size */ -#define AT91_CIDR_NVPSIZ2 (0xf << 12) /* Second Nonvolatile Program Memory Size */ -#define AT91_CIDR_SRAMSIZ (0xf << 16) /* Internal SRAM Size */ -#define AT91_CIDR_ARCH (0xff << 20) /* Architecture Identifier */ -#define AT91_CIDR_NVPTYP (7 << 28) /* Nonvolatile Program Memory Type */ -#define AT91_CIDR_EXT (1 << 31) /* Extension Flag */ - -#define AT91_AIC_FFER (AT91_AIC + 0x140) /* Fast Forcing Enable Register [SAM9 only] */ -#define AT91_AIC_FFDR (AT91_AIC + 0x144) /* Fast Forcing Disable Register [SAM9 only] */ -#define AT91_AIC_FFSR (AT91_AIC + 0x148) /* Fast Forcing Status Register [SAM9 only] */ - -/* - * PIO Controllers. - */ -#define AT91_PIOA 0x400 -#define AT91_PIOB 0x600 -#define AT91_PIOC 0x800 -#define AT91_PIOD 0xa00 - -#define PIO_PER 0x00 /* Enable Register */ -#define PIO_PDR 0x04 /* Disable Register */ -#define PIO_PSR 0x08 /* Status Register */ -#define PIO_OER 0x10 /* Output Enable Register */ -#define PIO_ODR 0x14 /* Output Disable Register */ -#define PIO_OSR 0x18 /* Output Status Register */ -#define PIO_IFER 0x20 /* Glitch Input Filter Enable */ -#define PIO_IFDR 0x24 /* Glitch Input Filter Disable */ -#define PIO_IFSR 0x28 /* Glitch Input Filter Status */ -#define PIO_SODR 0x30 /* Set Output Data Register */ -#define PIO_CODR 0x34 /* Clear Output Data Register */ -#define PIO_ODSR 0x38 /* Output Data Status Register */ -#define PIO_PDSR 0x3c /* Pin Data Status Register */ -#define PIO_IER 0x40 /* Interrupt Enable Register */ -#define PIO_IDR 0x44 /* Interrupt Disable Register */ -#define PIO_IMR 0x48 /* Interrupt Mask Register */ -#define PIO_ISR 0x4c /* Interrupt Status Register */ -#define PIO_MDER 0x50 /* Multi-driver Enable Register */ -#define PIO_MDDR 0x54 /* Multi-driver Disable Register */ -#define PIO_MDSR 0x58 /* Multi-driver Status Register */ -#define PIO_PUDR 0x60 /* Pull-up Disable Register */ -#define PIO_PUER 0x64 /* Pull-up Enable Register */ -#define PIO_PUSR 0x68 /* Pull-up Status Register */ -#define PIO_ASR 0x70 /* Peripheral A Select Register */ -#define PIO_BSR 0x74 /* Peripheral B Select Register */ -#define PIO_ABSR 0x78 /* AB Status Register */ -#define PIO_OWER 0xa0 /* Output Write Enable Register */ -#define PIO_OWDR 0xa4 /* Output Write Disable Register */ -#define PIO_OWSR 0xa8 /* Output Write Status Register */ - -#define AT91_PIO_P(n) (1 << (n)) - - -/* - * Power Management Controller. - */ -#define AT91_PMC 0xc00 - -#define AT91_PMC_SCER (AT91_PMC + 0x00) /* System Clock Enable Register */ -#define AT91_PMC_SCDR (AT91_PMC + 0x04) /* System Clock Disable Register */ - -#define AT91_PMC_SCSR (AT91_PMC + 0x08) /* System Clock Status Register */ -#define AT91_PMC_PCK (1 << 0) /* Processor Clock */ -#define AT91_PMC_UDP (1 << 1) /* USB Devcice Port Clock */ -#define AT91_PMC_MCKUDP (1 << 2) /* USB Device Port Master Clock Automatic Disable on Suspend */ -#define AT91_PMC_UHP (1 << 4) /* USB Host Port Clock */ -#define AT91_PMC_PCK0 (1 << 8) /* Programmable Clock 0 */ -#define AT91_PMC_PCK1 (1 << 9) /* Programmable Clock 1 */ -#define AT91_PMC_PCK2 (1 << 10) /* Programmable Clock 2 */ -#define AT91_PMC_PCK3 (1 << 11) /* Programmable Clock 3 */ - -#define AT91_PMC_PCER (AT91_PMC + 0x10) /* Peripheral Clock Enable Register */ -#define AT91_PMC_PCDR (AT91_PMC + 0x14) /* Peripheral Clock Disable Register */ -#define AT91_PMC_PCSR (AT91_PMC + 0x18) /* Peripheral Clock Status Register */ - -#define AT91_CKGR_MOR (AT91_PMC + 0x20) /* Main Oscillator Register */ -#define AT91_PMC_MOSCEN (1 << 0) /* Main Oscillator Enable */ -#define AT91_PMC_OSCOUNT (0xff << 8) /* Main Oscillator Start-up Time */ - -#define AT91_CKGR_MCFR (AT91_PMC + 0x24) /* Main Clock Frequency Register */ -#define AT91_PMC_MAINF (0xffff << 0) /* Main Clock Frequency */ -#define AT91_PMC_MAINRDY (1 << 16) /* Main Clock Ready */ - -#define AT91_CKGR_PLLAR (AT91_PMC + 0x28) /* PLL A Register */ -#define AT91_CKGR_PLLBR (AT91_PMC + 0x2c) /* PLL B Register */ -#define AT91_PMC_DIV (0xff << 0) /* Divider */ -#define AT91_PMC_PLLCOUNT (0x3f << 8) /* PLL Counter */ -#define AT91_PMC_OUT (3 << 14) /* PLL Clock Frequency Range */ -#define AT91_PMC_MUL (0x7ff << 16) /* PLL Multiplier */ -#define AT91_PMC_USB96M (1 << 28) /* Divider by 2 Enable (PLLB only) */ - -#define AT91_PMC_MCKR (AT91_PMC + 0x30) /* Master Clock Register */ -#define AT91_PMC_CSS (3 << 0) /* Master Clock Selection */ -#define AT91_PMC_CSS_SLOW (0 << 0) -#define AT91_PMC_CSS_MAIN (1 << 0) -#define AT91_PMC_CSS_PLLA (2 << 0) -#define AT91_PMC_CSS_PLLB (3 << 0) -#define AT91_PMC_PRES (7 << 2) /* Master Clock Prescaler */ -#define AT91_PMC_PRES_1 (0 << 2) -#define AT91_PMC_PRES_2 (1 << 2) -#define AT91_PMC_PRES_4 (2 << 2) -#define AT91_PMC_PRES_8 (3 << 2) -#define AT91_PMC_PRES_16 (4 << 2) -#define AT91_PMC_PRES_32 (5 << 2) -#define AT91_PMC_PRES_64 (6 << 2) -#define AT91_PMC_MDIV (3 << 8) /* Master Clock Division */ -#define AT91_PMC_MDIV_1 (0 << 8) -#define AT91_PMC_MDIV_2 (1 << 8) -#define AT91_PMC_MDIV_3 (2 << 8) -#define AT91_PMC_MDIV_4 (3 << 8) - -#define AT91_PMC_PCKR(n) (AT91_PMC + 0x40 + ((n) * 4)) /* Programmable Clock 0-3 Registers */ - -#define AT91_PMC_IER (AT91_PMC + 0x60) /* Interrupt Enable Register */ -#define AT91_PMC_IDR (AT91_PMC + 0x64) /* Interrupt Disable Register */ -#define AT91_PMC_SR (AT91_PMC + 0x68) /* Status Register */ -#define AT91_PMC_MOSCS (1 << 0) /* MOSCS Flag */ -#define AT91_PMC_LOCKA (1 << 1) /* PLLA Lock */ -#define AT91_PMC_LOCKB (1 << 2) /* PLLB Lock */ -#define AT91_PMC_MCKRDY (1 << 3) /* Master Clock */ -#define AT91_PMC_PCK0RDY (1 << 8) /* Programmable Clock 0 */ -#define AT91_PMC_PCK1RDY (1 << 9) /* Programmable Clock 1 */ -#define AT91_PMC_PCK2RDY (1 << 10) /* Programmable Clock 2 */ -#define AT91_PMC_PCK3RDY (1 << 11) /* Programmable Clock 3 */ -#define AT91_PMC_IMR (AT91_PMC + 0x6c) /* Interrupt Mask Register */ - - -/* - * System Timer. - */ -#define AT91_ST 0xd00 - -#define AT91_ST_CR (AT91_ST + 0x00) /* Control Register */ -#define AT91_ST_WDRST (1 << 0) /* Watchdog Timer Restart */ -#define AT91_ST_PIMR (AT91_ST + 0x04) /* Period Interval Mode Register */ -#define AT91_ST_PIV (0xffff << 0) /* Period Interval Value */ -#define AT91_ST_WDMR (AT91_ST + 0x08) /* Watchdog Mode Register */ -#define AT91_ST_WDV (0xffff << 0) /* Watchdog Counter Value */ -#define AT91_ST_RSTEN (1 << 16) /* Reset Enable */ -#define AT91_ST_EXTEN (1 << 17) /* External Signal Assertion Enable */ -#define AT91_ST_RTMR (AT91_ST + 0x0c) /* Real-time Mode Register */ -#define AT91_ST_RTPRES (0xffff << 0) /* Real-time Prescalar Value */ -#define AT91_ST_SR (AT91_ST + 0x10) /* Status Register */ -#define AT91_ST_PITS (1 << 0) /* Period Interval Timer Status */ -#define AT91_ST_WDOVF (1 << 1) /* Watchdog Overflow */ -#define AT91_ST_RTTINC (1 << 2) /* Real-time Timer Increment */ -#define AT91_ST_ALMS (1 << 3) /* Alarm Status */ -#define AT91_ST_IER (AT91_ST + 0x14) /* Interrupt Enable Register */ -#define AT91_ST_IDR (AT91_ST + 0x18) /* Interrupt Disable Register */ -#define AT91_ST_IMR (AT91_ST + 0x1c) /* Interrupt Mask Register */ -#define AT91_ST_RTAR (AT91_ST + 0x20) /* Real-time Alarm Register */ -#define AT91_ST_ALMV (0xfffff << 0) /* Alarm Value */ -#define AT91_ST_CRTR (AT91_ST + 0x24) /* Current Real-time Register */ -#define AT91_ST_CRTV (0xfffff << 0) /* Current Real-Time Value */ - - -/* - * Real-time Clock. - */ -#define AT91_RTC 0xe00 - -#define AT91_RTC_CR (AT91_RTC + 0x00) /* Control Register */ -#define AT91_RTC_UPDTIM (1 << 0) /* Update Request Time Register */ -#define AT91_RTC_UPDCAL (1 << 1) /* Update Request Calendar Register */ -#define AT91_RTC_TIMEVSEL (3 << 8) /* Time Event Selection */ -#define AT91_RTC_TIMEVSEL_MINUTE (0 << 8) -#define AT91_RTC_TIMEVSEL_HOUR (1 << 8) -#define AT91_RTC_TIMEVSEL_DAY24 (2 << 8) -#define AT91_RTC_TIMEVSEL_DAY12 (3 << 8) -#define AT91_RTC_CALEVSEL (3 << 16) /* Calendar Event Selection */ -#define AT91_RTC_CALEVSEL_WEEK (0 << 16) -#define AT91_RTC_CALEVSEL_MONTH (1 << 16) -#define AT91_RTC_CALEVSEL_YEAR (2 << 16) - -#define AT91_RTC_MR (AT91_RTC + 0x04) /* Mode Register */ -#define AT91_RTC_HRMOD (1 << 0) /* 12/24 Hour Mode */ - -#define AT91_RTC_TIMR (AT91_RTC + 0x08) /* Time Register */ -#define AT91_RTC_SEC (0x7f << 0) /* Current Second */ -#define AT91_RTC_MIN (0x7f << 8) /* Current Minute */ -#define AT91_RTC_HOUR (0x3f << 16) /* Current Hour */ -#define AT91_RTC_AMPM (1 << 22) /* Ante Meridiem Post Meridiem Indicator */ - -#define AT91_RTC_CALR (AT91_RTC + 0x0c) /* Calendar Register */ -#define AT91_RTC_CENT (0x7f << 0) /* Current Century */ -#define AT91_RTC_YEAR (0xff << 8) /* Current Year */ -#define AT91_RTC_MONTH (0x1f << 16) /* Current Month */ -#define AT91_RTC_DAY (7 << 21) /* Current Day */ -#define AT91_RTC_DATE (0x3f << 24) /* Current Date */ - -#define AT91_RTC_TIMALR (AT91_RTC + 0x10) /* Time Alarm Register */ -#define AT91_RTC_SECEN (1 << 7) /* Second Alarm Enable */ -#define AT91_RTC_MINEN (1 << 15) /* Minute Alarm Enable */ -#define AT91_RTC_HOUREN (1 << 23) /* Hour Alarm Enable */ - -#define AT91_RTC_CALALR (AT91_RTC + 0x14) /* Calendar Alarm Register */ -#define AT91_RTC_MTHEN (1 << 23) /* Month Alarm Enable */ -#define AT91_RTC_DATEEN (1 << 31) /* Date Alarm Enable */ - -#define AT91_RTC_SR (AT91_RTC + 0x18) /* Status Register */ -#define AT91_RTC_ACKUPD (1 << 0) /* Acknowledge for Update */ -#define AT91_RTC_ALARM (1 << 1) /* Alarm Flag */ -#define AT91_RTC_SECEV (1 << 2) /* Second Event */ -#define AT91_RTC_TIMEV (1 << 3) /* Time Event */ -#define AT91_RTC_CALEV (1 << 4) /* Calendar Event */ - -#define AT91_RTC_SCCR (AT91_RTC + 0x1c) /* Status Clear Command Register */ -#define AT91_RTC_IER (AT91_RTC + 0x20) /* Interrupt Enable Register */ -#define AT91_RTC_IDR (AT91_RTC + 0x24) /* Interrupt Disable Register */ -#define AT91_RTC_IMR (AT91_RTC + 0x28) /* Interrupt Mask Register */ - -#define AT91_RTC_VER (AT91_RTC + 0x2c) /* Valid Entry Register */ -#define AT91_RTC_NVTIM (1 << 0) /* Non valid Time */ -#define AT91_RTC_NVCAL (1 << 1) /* Non valid Calendar */ -#define AT91_RTC_NVTIMALR (1 << 2) /* Non valid Time Alarm */ -#define AT91_RTC_NVCALALR (1 << 3) /* Non valid Calendar Alarm */ - - -/* - * Memory Controller. - */ -#define AT91_MC 0xf00 - -#define AT91_MC_RCR (AT91_MC + 0x00) /* MC Remap Control Register */ -#define AT91_MC_RCB (1 << 0) /* Remap Command Bit */ - -#define AT91_MC_ASR (AT91_MC + 0x04) /* MC Abort Status Register */ -#define AT91_MC_UNADD (1 << 0) /* Undefined Address Abort Status */ -#define AT91_MC_MISADD (1 << 1) /* Misaligned Address Abort Status */ -#define AT91_MC_ABTSZ (3 << 8) /* Abort Size Status */ -#define AT91_MC_ABTSZ_BYTE (0 << 8) -#define AT91_MC_ABTSZ_HALFWORD (1 << 8) -#define AT91_MC_ABTSZ_WORD (2 << 8) -#define AT91_MC_ABTTYP (3 << 10) /* Abort Type Status */ -#define AT91_MC_ABTTYP_DATAREAD (0 << 10) -#define AT91_MC_ABTTYP_DATAWRITE (1 << 10) -#define AT91_MC_ABTTYP_FETCH (2 << 10) -#define AT91_MC_MST0 (1 << 16) /* ARM920T Abort Source */ -#define AT91_MC_MST1 (1 << 17) /* PDC Abort Source */ -#define AT91_MC_MST2 (1 << 18) /* UHP Abort Source */ -#define AT91_MC_MST3 (1 << 19) /* EMAC Abort Source */ -#define AT91_MC_SVMST0 (1 << 24) /* Saved ARM920T Abort Source */ -#define AT91_MC_SVMST1 (1 << 25) /* Saved PDC Abort Source */ -#define AT91_MC_SVMST2 (1 << 26) /* Saved UHP Abort Source */ -#define AT91_MC_SVMST3 (1 << 27) /* Saved EMAC Abort Source */ - -#define AT91_MC_AASR (AT91_MC + 0x08) /* MC Abort Address Status Register */ - -#define AT91_MC_MPR (AT91_MC + 0x0c) /* MC Master Priority Register */ -#define AT91_MPR_MSTP0 (7 << 0) /* ARM920T Priority */ -#define AT91_MPR_MSTP1 (7 << 4) /* PDC Priority */ -#define AT91_MPR_MSTP2 (7 << 8) /* UHP Priority */ -#define AT91_MPR_MSTP3 (7 << 12) /* EMAC Priority */ - -/* External Bus Interface (EBI) registers */ -#define AT91_EBI_CSA (AT91_MC + 0x60) /* Chip Select Assignment Register */ -#define AT91_EBI_CS0A (1 << 0) /* Chip Select 0 Assignment */ -#define AT91_EBI_CS0A_SMC (0 << 0) -#define AT91_EBI_CS0A_BFC (1 << 0) -#define AT91_EBI_CS1A (1 << 1) /* Chip Select 1 Assignment */ -#define AT91_EBI_CS1A_SMC (0 << 1) -#define AT91_EBI_CS1A_SDRAMC (1 << 1) -#define AT91_EBI_CS3A (1 << 3) /* Chip Select 2 Assignment */ -#define AT91_EBI_CS3A_SMC (0 << 3) -#define AT91_EBI_CS3A_SMC_SMARTMEDIA (1 << 3) -#define AT91_EBI_CS4A (1 << 4) /* Chip Select 3 Assignment */ -#define AT91_EBI_CS4A_SMC (0 << 4) -#define AT91_EBI_CS4A_SMC_COMPACTFLASH (1 << 4) -#define AT91_EBI_CFGR (AT91_MC + 0x64) /* Configuration Register */ -#define AT91_EBI_DBPUC (1 << 0) /* Data Bus Pull-Up Configuration */ - -/* Static Memory Controller (SMC) registers */ -#define AT91_SMC_CSR(n) (AT91_MC + 0x70 + ((n) * 4))/* SMC Chip Select Register */ -#define AT91_SMC_NWS (0x7f << 0) /* Number of Wait States */ -#define AT91_SMC_NWS_(x) ((x) << 0) -#define AT91_SMC_WSEN (1 << 7) /* Wait State Enable */ -#define AT91_SMC_TDF (0xf << 8) /* Data Float Time */ -#define AT91_SMC_TDF_(x) ((x) << 8) -#define AT91_SMC_BAT (1 << 12) /* Byte Access Type */ -#define AT91_SMC_DBW (3 << 13) /* Data Bus Width */ -#define AT91_SMC_DBW_16 (1 << 13) -#define AT91_SMC_DBW_8 (2 << 13) -#define AT91_SMC_DPR (1 << 15) /* Data Read Protocol */ -#define AT91_SMC_ACSS (3 << 16) /* Address to Chip Select Setup */ -#define AT91_SMC_ACSS_STD (0 << 16) -#define AT91_SMC_ACSS_1 (1 << 16) -#define AT91_SMC_ACSS_2 (2 << 16) -#define AT91_SMC_ACSS_3 (3 << 16) -#define AT91_SMC_RWSETUP (7 << 24) /* Read & Write Signal Time Setup */ -#define AT91_SMC_RWSETUP_(x) ((x) << 24) -#define AT91_SMC_RWHOLD (7 << 28) /* Read & Write Signal Hold Time */ -#define AT91_SMC_RWHOLD_(x) ((x) << 28) - -/* SDRAM Controller registers */ -#define AT91_SDRAMC_MR (AT91_MC + 0x90) /* Mode Register */ -#define AT91_SDRAMC_MODE (0xf << 0) /* Command Mode */ -#define AT91_SDRAMC_MODE_NORMAL (0 << 0) -#define AT91_SDRAMC_MODE_NOP (1 << 0) -#define AT91_SDRAMC_MODE_PRECHARGE (2 << 0) -#define AT91_SDRAMC_MODE_LMR (3 << 0) -#define AT91_SDRAMC_MODE_REFRESH (4 << 0) -#define AT91_SDRAMC_DBW (1 << 4) /* Data Bus Width */ -#define AT91_SDRAMC_DBW_32 (0 << 4) -#define AT91_SDRAMC_DBW_16 (1 << 4) - -#define AT91_SDRAMC_TR (AT91_MC + 0x94) /* Refresh Timer Register */ -#define AT91_SDRAMC_COUNT (0xfff << 0) /* Refresh Timer Count */ - -#define AT91_SDRAMC_CR (AT91_MC + 0x98) /* Configuration Register */ -#define AT91_SDRAMC_NC (3 << 0) /* Number of Column Bits */ -#define AT91_SDRAMC_NC_8 (0 << 0) -#define AT91_SDRAMC_NC_9 (1 << 0) -#define AT91_SDRAMC_NC_10 (2 << 0) -#define AT91_SDRAMC_NC_11 (3 << 0) -#define AT91_SDRAMC_NR (3 << 2) /* Number of Row Bits */ -#define AT91_SDRAMC_NR_11 (0 << 2) -#define AT91_SDRAMC_NR_12 (1 << 2) -#define AT91_SDRAMC_NR_13 (2 << 2) -#define AT91_SDRAMC_NB (1 << 4) /* Number of Banks */ -#define AT91_SDRAMC_NB_2 (0 << 4) -#define AT91_SDRAMC_NB_4 (1 << 4) -#define AT91_SDRAMC_CAS (3 << 5) /* CAS Latency */ -#define AT91_SDRAMC_CAS_2 (2 << 5) -#define AT91_SDRAMC_TWR (0xf << 7) /* Write Recovery Delay */ -#define AT91_SDRAMC_TRC (0xf << 11) /* Row Cycle Delay */ -#define AT91_SDRAMC_TRP (0xf << 15) /* Row Precharge Delay */ -#define AT91_SDRAMC_TRCD (0xf << 19) /* Row to Column Delay */ -#define AT91_SDRAMC_TRAS (0xf << 23) /* Active to Precharge Delay */ -#define AT91_SDRAMC_TXSR (0xf << 27) /* Exit Self Refresh to Active Delay */ - -#define AT91_SDRAMC_SRR (AT91_MC + 0x9c) /* Self Refresh Register */ -#define AT91_SDRAMC_LPR (AT91_MC + 0xa0) /* Low Power Register */ -#define AT91_SDRAMC_IER (AT91_MC + 0xa4) /* Interrupt Enable Register */ -#define AT91_SDRAMC_IDR (AT91_MC + 0xa8) /* Interrupt Disable Register */ -#define AT91_SDRAMC_IMR (AT91_MC + 0xac) /* Interrupt Mask Register */ -#define AT91_SDRAMC_ISR (AT91_MC + 0xb0) /* Interrupt Status Register */ - -/* Burst Flash Controller register */ -#define AT91_BFC_MR (AT91_MC + 0xc0) /* Mode Register */ -#define AT91_BFC_BFCOM (3 << 0) /* Burst Flash Controller Operating Mode */ -#define AT91_BFC_BFCOM_DISABLED (0 << 0) -#define AT91_BFC_BFCOM_ASYNC (1 << 0) -#define AT91_BFC_BFCOM_BURST (2 << 0) -#define AT91_BFC_BFCC (3 << 2) /* Burst Flash Controller Clock */ -#define AT91_BFC_BFCC_MCK (1 << 2) -#define AT91_BFC_BFCC_DIV2 (2 << 2) -#define AT91_BFC_BFCC_DIV4 (3 << 2) -#define AT91_BFC_AVL (0xf << 4) /* Address Valid Latency */ -#define AT91_BFC_PAGES (7 << 8) /* Page Size */ -#define AT91_BFC_PAGES_NO_PAGE (0 << 8) -#define AT91_BFC_PAGES_16 (1 << 8) -#define AT91_BFC_PAGES_32 (2 << 8) -#define AT91_BFC_PAGES_64 (3 << 8) -#define AT91_BFC_PAGES_128 (4 << 8) -#define AT91_BFC_PAGES_256 (5 << 8) -#define AT91_BFC_PAGES_512 (6 << 8) -#define AT91_BFC_PAGES_1024 (7 << 8) -#define AT91_BFC_OEL (3 << 12) /* Output Enable Latency */ -#define AT91_BFC_BAAEN (1 << 16) /* Burst Address Advance Enable */ -#define AT91_BFC_BFOEH (1 << 17) /* Burst Flash Output Enable Handling */ -#define AT91_BFC_MUXEN (1 << 18) /* Multiplexed Bus Enable */ -#define AT91_BFC_RDYEN (1 << 19) /* Ready Enable Mode */ - -#endif diff --git a/include/asm-arm/arch-at91rm9200/at91rm9200_udp.h b/include/asm-arm/arch-at91rm9200/at91rm9200_udp.h deleted file mode 100644 index 951e3f61cef..00000000000 --- a/include/asm-arm/arch-at91rm9200/at91rm9200_udp.h +++ /dev/null @@ -1,77 +0,0 @@ -/* - * include/asm-arm/arch-at91rm9200/at91rm9200_udp.h - * - * Copyright (C) 2005 Ivan Kokshaysky - * Copyright (C) SAN People - * - * USB Device Port (UDP) registers. - * Based on AT91RM9200 datasheet revision E. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91RM9200_UDP_H -#define AT91RM9200_UDP_H - -#define AT91_UDP_FRM_NUM 0x00 /* Frame Number Register */ -#define AT91_UDP_NUM (0x7ff << 0) /* Frame Number */ -#define AT91_UDP_FRM_ERR (1 << 16) /* Frame Error */ -#define AT91_UDP_FRM_OK (1 << 17) /* Frame OK */ - -#define AT91_UDP_GLB_STAT 0x04 /* Global State Register */ -#define AT91_UDP_FADDEN (1 << 0) /* Function Address Enable */ -#define AT91_UDP_CONFG (1 << 1) /* Configured */ -#define AT91_UDP_ESR (1 << 2) /* Enable Send Resume */ -#define AT91_UDP_RSMINPR (1 << 3) /* Resume has been sent */ -#define AT91_UDP_RMWUPE (1 << 4) /* Remote Wake Up Enable */ - -#define AT91_UDP_FADDR 0x08 /* Function Address Register */ -#define AT91_UDP_FADD (0x7f << 0) /* Function Address Value */ -#define AT91_UDP_FEN (1 << 8) /* Function Enable */ - -#define AT91_UDP_IER 0x10 /* Interrupt Enable Register */ -#define AT91_UDP_IDR 0x14 /* Interrupt Disable Register */ -#define AT91_UDP_IMR 0x18 /* Interrupt Mask Register */ - -#define AT91_UDP_ISR 0x1c /* Interrupt Status Register */ -#define AT91_UDP_EP(n) (1 << (n)) /* Endpoint Interrupt Status */ -#define AT91_UDP_RXSUSP (1 << 8) /* USB Suspend Interrupt Status */ -#define AT91_UDP_RXRSM (1 << 9) /* USB Resume Interrupt Status */ -#define AT91_UDP_EXTRSM (1 << 10) /* External Resume Interrupt Status */ -#define AT91_UDP_SOFINT (1 << 11) /* Start of Frame Interrupt Status */ -#define AT91_UDP_ENDBUSRES (1 << 12) /* End of Bus Reset Interrpt Status */ -#define AT91_UDP_WAKEUP (1 << 13) /* USB Wakeup Interrupt Status */ - -#define AT91_UDP_ICR 0x20 /* Interrupt Clear Register */ -#define AT91_UDP_RST_EP 0x28 /* Reset Endpoint Register */ - -#define AT91_UDP_CSR(n) (0x30 + ((n) * 4)) /* Endpoint Control/Status Registers 0-7 */ -#define AT91_UDP_TXCOMP (1 << 0) /* Generates IN packet with data previously written in DPR */ -#define AT91_UDP_RX_DATA_BK0 (1 << 1) /* Receive Data Bank 0 */ -#define AT91_UDP_RXSETUP (1 << 2) /* Send STALL to the host */ -#define AT91_UDP_STALLSENT (1 << 3) /* Stall Sent / Isochronous error (Isochronous endpoints) */ -#define AT91_UDP_TXPKTRDY (1 << 4) /* Transmit Packet Ready */ -#define AT91_UDP_FORCESTALL (1 << 5) /* Force Stall */ -#define AT91_UDP_RX_DATA_BK1 (1 << 6) /* Receive Data Bank 1 */ -#define AT91_UDP_DIR (1 << 7) /* Transfer Direction */ -#define AT91_UDP_EPTYPE (7 << 8) /* Endpoint Type */ -#define AT91_UDP_EPTYPE_CTRL (0 << 8) -#define AT91_UDP_EPTYPE_ISO_OUT (1 << 8) -#define AT91_UDP_EPTYPE_BULK_OUT (2 << 8) -#define AT91_UDP_EPTYPE_INT_OUT (3 << 8) -#define AT91_UDP_EPTYPE_ISO_IN (5 << 8) -#define AT91_UDP_EPTYPE_BULK_IN (6 << 8) -#define AT91_UDP_EPTYPE_INT_IN (7 << 8) -#define AT91_UDP_DTGLE (1 << 11) /* Data Toggle */ -#define AT91_UDP_EPEDS (1 << 15) /* Endpoint Enable/Disable */ -#define AT91_UDP_RXBYTECNT (0x7ff << 16) /* Number of bytes in FIFO */ - -#define AT91_UDP_FDR(n) (0x50 + ((n) * 4)) /* Endpoint FIFO Data Registers 0-7 */ - -#define AT91_UDP_TXVC 0x74 /* Transceiver Control Register */ -#define AT91_UDP_TXVC_TXVDIS (1 << 8) /* Transceiver Disable */ - -#endif diff --git a/include/asm-arm/arch-at91rm9200/at91sam9260.h b/include/asm-arm/arch-at91rm9200/at91sam9260.h new file mode 100644 index 00000000000..46f4dd65c03 --- /dev/null +++ b/include/asm-arm/arch-at91rm9200/at91sam9260.h @@ -0,0 +1,125 @@ +/* + * include/asm-arm/arch-at91rm9200/at91sam9260.h + * + * (C) 2006 Andrew Victor + * + * Common definitions. + * Based on AT91SAM9260 datasheet revision A (Preliminary). + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef AT91SAM9260_H +#define AT91SAM9260_H + +/* + * Peripheral identifiers/interrupts. + */ +#define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */ +#define AT91_ID_SYS 1 /* System Peripherals */ +#define AT91SAM9260_ID_PIOA 2 /* Parallel IO Controller A */ +#define AT91SAM9260_ID_PIOB 3 /* Parallel IO Controller B */ +#define AT91SAM9260_ID_PIOC 4 /* Parallel IO Controller C */ +#define AT91SAM9260_ID_ADC 5 /* Analog-to-Digital Converter */ +#define AT91SAM9260_ID_US0 6 /* USART 0 */ +#define AT91SAM9260_ID_US1 7 /* USART 1 */ +#define AT91SAM9260_ID_US2 8 /* USART 2 */ +#define AT91SAM9260_ID_MCI 9 /* Multimedia Card Interface */ +#define AT91SAM9260_ID_UDP 10 /* USB Device Port */ +#define AT91SAM9260_ID_TWI 11 /* Two-Wire Interface */ +#define AT91SAM9260_ID_SPI0 12 /* Serial Peripheral Interface 0 */ +#define AT91SAM9260_ID_SPI1 13 /* Serial Peripheral Interface 1 */ +#define AT91SAM9260_ID_SSC 14 /* Serial Synchronous Controller */ +#define AT91SAM9260_ID_TC0 17 /* Timer Counter 0 */ +#define AT91SAM9260_ID_TC1 18 /* Timer Counter 1 */ +#define AT91SAM9260_ID_TC2 19 /* Timer Counter 2 */ +#define AT91SAM9260_ID_UHP 20 /* USB Host port */ +#define AT91SAM9260_ID_EMAC 21 /* Ethernet */ +#define AT91SAM9260_ID_ISI 22 /* Image Sensor Interface */ +#define AT91SAM9260_ID_US3 23 /* USART 3 */ +#define AT91SAM9260_ID_US4 24 /* USART 4 */ +#define AT91SAM9260_ID_US5 25 /* USART 5 */ +#define AT91SAM9260_ID_TC3 26 /* Timer Counter 3 */ +#define AT91SAM9260_ID_TC4 27 /* Timer Counter 4 */ +#define AT91SAM9260_ID_TC5 28 /* Timer Counter 5 */ +#define AT91SAM9260_ID_IRQ0 29 /* Advanced Interrupt Controller (IRQ0) */ +#define AT91SAM9260_ID_IRQ1 30 /* Advanced Interrupt Controller (IRQ1) */ +#define AT91SAM9260_ID_IRQ2 31 /* Advanced Interrupt Controller (IRQ2) */ + + +/* + * User Peripheral physical base addresses. + */ +#define AT91SAM9260_BASE_TCB0 0xfffa0000 +#define AT91SAM9260_BASE_TC0 0xfffa0000 +#define AT91SAM9260_BASE_TC1 0xfffa0040 +#define AT91SAM9260_BASE_TC2 0xfffa0080 +#define AT91SAM9260_BASE_UDP 0xfffa4000 +#define AT91SAM9260_BASE_MCI 0xfffa8000 +#define AT91SAM9260_BASE_TWI 0xfffac000 +#define AT91SAM9260_BASE_US0 0xfffb0000 +#define AT91SAM9260_BASE_US1 0xfffb4000 +#define AT91SAM9260_BASE_US2 0xfffb8000 +#define AT91SAM9260_BASE_SSC 0xfffbc000 +#define AT91SAM9260_BASE_ISI 0xfffc0000 +#define AT91SAM9260_BASE_EMAC 0xfffc4000 +#define AT91SAM9260_BASE_SPI0 0xfffc8000 +#define AT91SAM9260_BASE_SPI1 0xfffcc000 +#define AT91SAM9260_BASE_US3 0xfffd0000 +#define AT91SAM9260_BASE_US4 0xfffd4000 +#define AT91SAM9260_BASE_US5 0xfffd8000 +#define AT91SAM9260_BASE_TCB1 0xfffdc000 +#define AT91SAM9260_BASE_TC3 0xfffdc000 +#define AT91SAM9260_BASE_TC4 0xfffdc040 +#define AT91SAM9260_BASE_TC5 0xfffdc080 +#define AT91SAM9260_BASE_ADC 0xfffe0000 +#define AT91_BASE_SYS 0xffffe800 + +/* + * System Peripherals (offset from AT91_BASE_SYS) + */ +#define AT91_ECC (0xffffe800 - AT91_BASE_SYS) +#define AT91_SDRAMC (0xffffea00 - AT91_BASE_SYS) +#define AT91_SMC (0xffffec00 - AT91_BASE_SYS) +#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) +#define AT91_CCFG (0xffffef10 - AT91_BASE_SYS) +#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) +#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) +#define AT91_PIOA (0xfffff400 - AT91_BASE_SYS) +#define AT91_PIOB (0xfffff600 - AT91_BASE_SYS) +#define AT91_PIOC (0xfffff800 - AT91_BASE_SYS) +#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) +#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) +#define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) +#define AT91_RTT (0xfffffd20 - AT91_BASE_SYS) +#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) +#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) +#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS) + + +/* + * Internal Memory. + */ +#define AT91SAM9260_ROM_BASE 0x00100000 /* Internal ROM base address */ +#define AT91SAM9260_ROM_SIZE SZ_32K /* Internal ROM size (32Kb) */ + +#define AT91SAM9260_SRAM0_BASE 0x00200000 /* Internal SRAM 0 base address */ +#define AT91SAM9260_SRAM0_SIZE SZ_4K /* Internal SRAM 0 size (4Kb) */ +#define AT91SAM9260_SRAM1_BASE 0x00300000 /* Internal SRAM 1 base address */ +#define AT91SAM9260_SRAM1_SIZE SZ_4K /* Internal SRAM 1 size (4Kb) */ + +#define AT91SAM9260_UHP_BASE 0x00500000 /* USB Host controller */ + +#if 0 +/* + * PIO pin definitions (peripheral A/B multiplexing). + */ + +// TODO: Add + +#endif + +#endif diff --git a/include/asm-arm/arch-at91rm9200/at91sam9260_matrix.h b/include/asm-arm/arch-at91rm9200/at91sam9260_matrix.h new file mode 100644 index 00000000000..746d973705b --- /dev/null +++ b/include/asm-arm/arch-at91rm9200/at91sam9260_matrix.h @@ -0,0 +1,78 @@ +/* + * include/asm-arm/arch-at91rm9200/at91sam9260_matrix.h + * + * Memory Controllers (MATRIX, EBI) - System peripherals registers. + * Based on AT91SAM9260 datasheet revision B. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef AT91SAM9260_MATRIX_H +#define AT91SAM9260_MATRIX_H + +#define AT91_MATRIX_MCFG0 (AT91_MATRIX + 0x00) /* Master Configuration Register 0 */ +#define AT91_MATRIX_MCFG1 (AT91_MATRIX + 0x04) /* Master Configuration Register 1 */ +#define AT91_MATRIX_MCFG2 (AT91_MATRIX + 0x08) /* Master Configuration Register 2 */ +#define AT91_MATRIX_MCFG3 (AT91_MATRIX + 0x0C) /* Master Configuration Register 3 */ +#define AT91_MATRIX_MCFG4 (AT91_MATRIX + 0x10) /* Master Configuration Register 4 */ +#define AT91_MATRIX_MCFG5 (AT91_MATRIX + 0x04) /* Master Configuration Register 5 */ +#define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */ +#define AT91_MATRIX_ULBT_INFINITE (0 << 0) +#define AT91_MATRIX_ULBT_SINGLE (1 << 0) +#define AT91_MATRIX_ULBT_FOUR (2 << 0) +#define AT91_MATRIX_ULBT_EIGHT (3 << 0) +#define AT91_MATRIX_ULBT_SIXTEEN (4 << 0) + +#define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x40) /* Slave Configuration Register 0 */ +#define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x44) /* Slave Configuration Register 1 */ +#define AT91_MATRIX_SCFG2 (AT91_MATRIX + 0x48) /* Slave Configuration Register 2 */ +#define AT91_MATRIX_SCFG3 (AT91_MATRIX + 0x4C) /* Slave Configuration Register 3 */ +#define AT91_MATRIX_SCFG4 (AT91_MATRIX + 0x50) /* Slave Configuration Register 4 */ +#define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */ +#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */ +#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) +#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16) +#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16) +#define AT91_MATRIX_FIXED_DEFMSTR (7 << 18) /* Fixed Index of Default Master */ +#define AT91_MATRIX_ARBT (3 << 24) /* Arbitration Type */ +#define AT91_MATRIX_ARBT_ROUND_ROBIN (0 << 24) +#define AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24) + +#define AT91_MATRIX_PRAS0 (AT91_MATRIX + 0x80) /* Priority Register A for Slave 0 */ +#define AT91_MATRIX_PRAS1 (AT91_MATRIX + 0x88) /* Priority Register A for Slave 1 */ +#define AT91_MATRIX_PRAS2 (AT91_MATRIX + 0x90) /* Priority Register A for Slave 2 */ +#define AT91_MATRIX_PRAS3 (AT91_MATRIX + 0x98) /* Priority Register A for Slave 3 */ +#define AT91_MATRIX_PRAS4 (AT91_MATRIX + 0xA0) /* Priority Register A for Slave 4 */ +#define AT91_MATRIX_M0PR (3 << 0) /* Master 0 Priority */ +#define AT91_MATRIX_M1PR (3 << 4) /* Master 1 Priority */ +#define AT91_MATRIX_M2PR (3 << 8) /* Master 2 Priority */ +#define AT91_MATRIX_M3PR (3 << 12) /* Master 3 Priority */ +#define AT91_MATRIX_M4PR (3 << 16) /* Master 4 Priority */ +#define AT91_MATRIX_M5PR (3 << 20) /* Master 5 Priority */ + +#define AT91_MATRIX_MRCR (AT91_MATRIX + 0x100) /* Master Remap Control Register */ +#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ +#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ + +#define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x11C) /* EBI Chip Select Assignment Register */ +#define AT91_MATRIX_CS1A (1 << 1) /* Chip Select 1 Assignment */ +#define AT91_MATRIX_CS1A_SMC (0 << 1) +#define AT91_MATRIX_CS1A_SDRAMC (1 << 1) +#define AT91_MATRIX_CS3A (1 << 3) /* Chip Select 3 Assignment */ +#define AT91_MATRIX_CS3A_SMC (0 << 3) +#define AT91_MATRIX_CS3A_SMC_SMARTMEDIA (1 << 3) +#define AT91_MATRIX_CS4A (1 << 4) /* Chip Select 4 Assignment */ +#define AT91_MATRIX_CS4A_SMC (0 << 4) +#define AT91_MATRIX_CS4A_SMC_CF1 (1 << 4) +#define AT91_MATRIX_CS5A (1 << 5 ) /* Chip Select 5 Assignment */ +#define AT91_MATRIX_CS5A_SMC (0 << 5) +#define AT91_MATRIX_CS5A_SMC_CF2 (1 << 5) +#define AT91_MATRIX_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */ +#define AT91_MATRIX_VDDIOMSEL (1 << 16) /* Memory voltage selection */ +#define AT91_MATRIX_VDDIOMSEL_1_8V (0 << 16) +#define AT91_MATRIX_VDDIOMSEL_3_3V (1 << 16) + +#endif diff --git a/include/asm-arm/arch-at91rm9200/at91sam9261.h b/include/asm-arm/arch-at91rm9200/at91sam9261.h new file mode 100644 index 00000000000..8d39672d5b8 --- /dev/null +++ b/include/asm-arm/arch-at91rm9200/at91sam9261.h @@ -0,0 +1,292 @@ +/* + * include/asm-arm/arch-at91rm9200/at91sam9261.h + * + * Copyright (C) SAN People + * + * Common definitions. + * Based on AT91SAM9261 datasheet revision E. (Preliminary) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef AT91SAM9261_H +#define AT91SAM9261_H + +/* + * Peripheral identifiers/interrupts. + */ +#define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */ +#define AT91_ID_SYS 1 /* System Peripherals */ +#define AT91SAM9261_ID_PIOA 2 /* Parallel IO Controller A */ +#define AT91SAM9261_ID_PIOB 3 /* Parallel IO Controller B */ +#define AT91SAM9261_ID_PIOC 4 /* Parallel IO Controller C */ +#define AT91SAM9261_ID_US0 6 /* USART 0 */ +#define AT91SAM9261_ID_US1 7 /* USART 1 */ +#define AT91SAM9261_ID_US2 8 /* USART 2 */ +#define AT91SAM9261_ID_MCI 9 /* Multimedia Card Interface */ +#define AT91SAM9261_ID_UDP 10 /* USB Device Port */ +#define AT91SAM9261_ID_TWI 11 /* Two-Wire Interface */ +#define AT91SAM9261_ID_SPI0 12 /* Serial Peripheral Interface 0 */ +#define AT91SAM9261_ID_SPI1 13 /* Serial Peripheral Interface 1 */ +#define AT91SAM9261_ID_SSC0 14 /* Serial Synchronous Controller 0 */ +#define AT91SAM9261_ID_SSC1 15 /* Serial Synchronous Controller 1 */ +#define AT91SAM9261_ID_SSC2 16 /* Serial Synchronous Controller 2 */ +#define AT91SAM9261_ID_TC0 17 /* Timer Counter 0 */ +#define AT91SAM9261_ID_TC1 18 /* Timer Counter 1 */ +#define AT91SAM9261_ID_TC2 19 /* Timer Counter 2 */ +#define AT91SAM9261_ID_UHP 20 /* USB Host port */ +#define AT91SAM9261_ID_LCDC 21 /* LDC Controller */ +#define AT91SAM9261_ID_IRQ0 29 /* Advanced Interrupt Controller (IRQ0) */ +#define AT91SAM9261_ID_IRQ1 30 /* Advanced Interrupt Controller (IRQ1) */ +#define AT91SAM9261_ID_IRQ2 31 /* Advanced Interrupt Controller (IRQ2) */ + + +/* + * User Peripheral physical base addresses. + */ +#define AT91SAM9261_BASE_TCB0 0xfffa0000 +#define AT91SAM9261_BASE_TC0 0xfffa0000 +#define AT91SAM9261_BASE_TC1 0xfffa0040 +#define AT91SAM9261_BASE_TC2 0xfffa0080 +#define AT91SAM9261_BASE_UDP 0xfffa4000 +#define AT91SAM9261_BASE_MCI 0xfffa8000 +#define AT91SAM9261_BASE_TWI 0xfffac000 +#define AT91SAM9261_BASE_US0 0xfffb0000 +#define AT91SAM9261_BASE_US1 0xfffb4000 +#define AT91SAM9261_BASE_US2 0xfffb8000 +#define AT91SAM9261_BASE_SSC0 0xfffbc000 +#define AT91SAM9261_BASE_SSC1 0xfffc0000 +#define AT91SAM9261_BASE_SSC2 0xfffc4000 +#define AT91SAM9261_BASE_SPI0 0xfffc8000 +#define AT91SAM9261_BASE_SPI1 0xfffcc000 +#define AT91_BASE_SYS 0xffffea00 + + +/* + * System Peripherals (offset from AT91_BASE_SYS) + */ +#define AT91_SDRAMC (0xffffea00 - AT91_BASE_SYS) +#define AT91_SMC (0xffffec00 - AT91_BASE_SYS) +#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) +#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) +#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) +#define AT91_PIOA (0xfffff400 - AT91_BASE_SYS) +#define AT91_PIOB (0xfffff600 - AT91_BASE_SYS) +#define AT91_PIOC (0xfffff800 - AT91_BASE_SYS) +#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) +#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) +#define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) +#define AT91_RTT (0xfffffd20 - AT91_BASE_SYS) +#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) +#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) +#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS) + + +/* + * Internal Memory. + */ +#define AT91SAM9261_SRAM_BASE 0x00300000 /* Internal SRAM base address */ +#define AT91SAM9261_SRAM_SIZE 0x00028000 /* Internal SRAM size (160Kb) */ + +#define AT91SAM9261_ROM_BASE 0x00400000 /* Internal ROM base address */ +#define AT91SAM9261_ROM_SIZE SZ_32K /* Internal ROM size (32Kb) */ + +#define AT91SAM9261_UHP_BASE 0x00500000 /* USB Host controller */ +#define AT91SAM9261_LCDC_BASE 0x00600000 /* LDC controller */ + + +#if 0 +/* + * PIO pin definitions (peripheral A/B multiplexing). + */ +#define AT91_PA0_SPI0_MISO (1 << 0) /* A: SPI0 Master In Slave */ +#define AT91_PA0_MCDA0 (1 << 0) /* B: Multimedia Card A Data 0 */ +#define AT91_PA1_SPI0_MOSI (1 << 1) /* A: SPI0 Master Out Slave */ +#define AT91_PA1_MCCDA (1 << 1) /* B: Multimedia Card A Command */ +#define AT91_PA2_SPI0_SPCK (1 << 2) /* A: SPI0 Serial Clock */ +#define AT91_PA2_MCCK (1 << 2) /* B: Multimedia Card Clock */ +#define AT91_PA3_SPI0_NPCS0 (1 << 3) /* A: SPI0 Peripheral Chip Select 0 */ +#define AT91_PA4_SPI0_NPCS1 (1 << 4) /* A: SPI0 Peripheral Chip Select 1 */ +#define AT91_PA4_MCDA1 (1 << 4) /* B: Multimedia Card A Data 1 */ +#define AT91_PA5_SPI0_NPCS2 (1 << 5) /* A: SPI0 Peripheral Chip Select 2 */ +#define AT91_PA5_MCDA2 (1 << 5) /* B: Multimedia Card A Data 2 */ +#define AT91_PA6_SPI0_NPCS3 (1 << 6) /* A: SPI0 Peripheral Chip Select 3 */ +#define AT91_PA6_MCDA3 (1 << 6) /* B: Multimedia Card A Data 3 */ +#define AT91_PA7_TWD (1 << 7) /* A: TWI Two-wire Serial Data */ +#define AT91_PA7_PCK0 (1 << 7) /* B: PMC Programmable clock Output 0 */ +#define AT91_PA8_TWCK (1 << 8) /* A: TWI Two-wire Serial Clock */ +#define AT91_PA8_PCK1 (1 << 8) /* B: PMC Programmable clock Output 1 */ +#define AT91_PA9_DRXD (1 << 9) /* A: DBGU Debug Receive Data */ +#define AT91_PA9_PCK2 (1 << 9) /* B: PMC Programmable clock Output 2 */ +#define AT91_PA10_DTXD (1 << 10) /* A: DBGU Debug Transmit Data */ +#define AT91_PA10_PCK3 (1 << 10) /* B: PMC Programmable clock Output 3 */ +#define AT91_PA11_TSYNC (1 << 11) /* A: Trace Synchronization Signal */ +#define AT91_PA11_SCK1 (1 << 11) /* B: USART1 Serial Clock */ +#define AT91_PA12_TCLK (1 << 12) /* A: Trace Clock */ +#define AT91_PA12_RTS1 (1 << 12) /* B: USART1 Ready To Send */ +#define AT91_PA13_TPS0 (1 << 13) /* A: Trace ARM Pipeline Status 0 */ +#define AT91_PA13_CTS1 (1 << 13) /* B: USART1 Clear To Send */ +#define AT91_PA14_TPS1 (1 << 14) /* A: Trace ARM Pipeline Status 1 */ +#define AT91_PA14_SCK2 (1 << 14) /* B: USART2 Serial Clock */ +#define AT91_PA15_TPS2 (1 << 15) /* A: Trace ARM Pipeline Status 2 */ +#define AT91_PA15_RTS2 (1 << 15) /* B: USART2 Ready To Send */ +#define AT91_PA16_TPK0 (1 << 16) /* A: Trace Packet Port 0 */ +#define AT91_PA16_CTS2 (1 << 16) /* B: USART2 Clear To Send */ +#define AT91_PA17_TPK1 (1 << 17) /* A: Trace Packet Port 1 */ +#define AT91_PA17_TF1 (1 << 17) /* B: SSC1 Transmit Frame Sync */ +#define AT91_PA18_TPK2 (1 << 18) /* A: Trace Packet Port 2 */ +#define AT91_PA18_TK1 (1 << 18) /* B: SSC1 Transmit Clock */ +#define AT91_PA19_TPK3 (1 << 19) /* A: Trace Packet Port 3 */ +#define AT91_PA19_TD1 (1 << 19) /* B: SSC1 Transmit Data */ +#define AT91_PA20_TPK4 (1 << 20) /* A: Trace Packet Port 4 */ +#define AT91_PA20_RD1 (1 << 20) /* B: SSC1 Receive Data */ +#define AT91_PA21_TPK5 (1 << 21) /* A: Trace Packet Port 5 */ +#define AT91_PA21_RK1 (1 << 21) /* B: SSC1 Receive Clock */ +#define AT91_PA22_TPK6 (1 << 22) /* A: Trace Packet Port 6 */ +#define AT91_PA22_RF1 (1 << 22) /* B: SSC1 Receive Frame Sync */ +#define AT91_PA23_TPK7 (1 << 23) /* A: Trace Packet Port 7 */ +#define AT91_PA23_RTS0 (1 << 23) /* B: USART0 Ready To Send */ +#define AT91_PA24_TPK8 (1 << 24) /* A: Trace Packet Port 8 */ +#define AT91_PA24_SPI1_NPCS1 (1 << 24) /* B: SPI1 Peripheral Chip Select 1 */ +#define AT91_PA25_TPK9 (1 << 25) /* A: Trace Packet Port 9 */ +#define AT91_PA25_SPI1_NPCS2 (1 << 25) /* B: SPI1 Peripheral Chip Select 2 */ +#define AT91_PA26_TPK10 (1 << 26) /* A: Trace Packet Port 10 */ +#define AT91_PA26_SPI1_NPCS3 (1 << 26) /* B: SPI1 Peripheral Chip Select 3 */ +#define AT91_PA27_TPK11 (1 << 27) /* A: Trace Packet Port 11 */ +#define AT91_PA27_SPI0_NPCS1 (1 << 27) /* B: SPI0 Peripheral Chip Select 1 */ +#define AT91_PA28_TPK12 (1 << 28) /* A: Trace Packet Port 12 */ +#define AT91_PA28_SPI0_NPCS2 (1 << 28) /* B: SPI0 Peripheral Chip Select 2 */ +#define AT91_PA29_TPK13 (1 << 29) /* A: Trace Packet Port 13 */ +#define AT91_PA29_SPI0_NPCS3 (1 << 29) /* B: SPI0 Peripheral Chip Select 3 */ +#define AT91_PA30_TPK14 (1 << 30) /* A: Trace Packet Port 14 */ +#define AT91_PA30_A23 (1 << 30) /* B: Address Bus bit 23 */ +#define AT91_PA31_TPK15 (1 << 31) /* A: Trace Packet Port 15 */ +#define AT91_PA31_A24 (1 << 31) /* B: Address Bus bit 24 */ + +#define AT91_PB0_LCDVSYNC (1 << 0) /* A: LCD Vertical Synchronization */ +#define AT91_PB1_LCDHSYNC (1 << 1) /* A: LCD Horizontal Synchronization */ +#define AT91_PB2_LCDDOTCK (1 << 2) /* A: LCD Dot Clock */ +#define AT91_PB2_PCK0 (1 << 2) /* B: PMC Programmable clock Output 0 */ +#define AT91_PB3_LCDDEN (1 << 3) /* A: LCD Data Enable */ +#define AT91_PB4_LCDCC (1 << 4) /* A: LCD Contrast Control */ +#define AT91_PB4_LCDD2 (1 << 4) /* B: LCD Data Bus Bit 2 */ +#define AT91_PB5_LCDD0 (1 << 5) /* A: LCD Data Bus Bit 0 */ +#define AT91_PB5_LCDD3 (1 << 5) /* B: LCD Data Bus Bit 3 */ +#define AT91_PB6_LCDD1 (1 << 6) /* A: LCD Data Bus Bit 1 */ +#define AT91_PB6_LCDD4 (1 << 6) /* B: LCD Data Bus Bit 4 */ +#define AT91_PB7_LCDD2 (1 << 7) /* A: LCD Data Bus Bit 2 */ +#define AT91_PB7_LCDD5 (1 << 7) /* B: LCD Data Bus Bit 5 */ +#define AT91_PB8_LCDD3 (1 << 8) /* A: LCD Data Bus Bit 3 */ +#define AT91_PB8_LCDD6 (1 << 8) /* B: LCD Data Bus Bit 6 */ +#define AT91_PB9_LCDD4 (1 << 9) /* A: LCD Data Bus Bit 4 */ +#define AT91_PB9_LCDD7 (1 << 9) /* B: LCD Data Bus Bit 7 */ +#define AT91_PB10_LCDD5 (1 << 10) /* A: LCD Data Bus Bit 5 */ +#define AT91_PB10_LCDD10 (1 << 10) /* B: LCD Data Bus Bit 10 */ +#define AT91_PB11_LCDD6 (1 << 11) /* A: LCD Data Bus Bit 6 */ +#define AT91_PB11_LCDD11 (1 << 11) /* B: LCD Data Bus Bit 11 */ +#define AT91_PB12_LCDD7 (1 << 12) /* A: LCD Data Bus Bit 7 */ +#define AT91_PB12_LCDD12 (1 << 12) /* B: LCD Data Bus Bit 12 */ +#define AT91_PB13_LCDD8 (1 << 13) /* A: LCD Data Bus Bit 8 */ +#define AT91_PB13_LCDD13 (1 << 13) /* B: LCD Data Bus Bit 13 */ +#define AT91_PB14_LCDD9 (1 << 14) /* A: LCD Data Bus Bit 9 */ +#define AT91_PB14_LCDD14 (1 << 14) /* B: LCD Data Bus Bit 14 */ +#define AT91_PB15_LCDD10 (1 << 15) /* A: LCD Data Bus Bit 10 */ +#define AT91_PB15_LCDD15 (1 << 15) /* B: LCD Data Bus Bit 15 */ +#define AT91_PB16_LCDD11 (1 << 16) /* A: LCD Data Bus Bit 11 */ +#define AT91_PB16_LCDD19 (1 << 16) /* B: LCD Data Bus Bit 19 */ +#define AT91_PB17_LCDD12 (1 << 17) /* A: LCD Data Bus Bit 12 */ +#define AT91_PB17_LCDD20 (1 << 17) /* B: LCD Data Bus Bit 20 */ +#define AT91_PB18_LCDD13 (1 << 18) /* A: LCD Data Bus Bit 13 */ +#define AT91_PB18_LCDD21 (1 << 18) /* B: LCD Data Bus Bit 21 */ +#define AT91_PB19_LCDD14 (1 << 19) /* A: LCD Data Bus Bit 14 */ +#define AT91_PB19_LCDD22 (1 << 19) /* B: LCD Data Bus Bit 22 */ +#define AT91_PB20_LCDD15 (1 << 20) /* A: LCD Data Bus Bit 15 */ +#define AT91_PB20_LCDD23 (1 << 20) /* B: LCD Data Bus Bit 23 */ +#define AT91_PB21_TF0 (1 << 21) /* A: SSC0 Transmit Frame Sync */ +#define AT91_PB21_LCDD16 (1 << 21) /* B: LCD Data Bus Bit 16 */ +#define AT91_PB22_TK0 (1 << 22) /* A: SSC0 Transmit Clock */ +#define AT91_PB22_LCDD17 (1 << 22) /* B: LCD Data Bus Bit 17 */ +#define AT91_PB23_TD0 (1 << 23) /* A: SSC0 Transmit Data */ +#define AT91_PB23_LCDD18 (1 << 23) /* B: LCD Data Bus Bit 18 */ +#define AT91_PB24_RD0 (1 << 24) /* A: SSC0 Receive Data */ +#define AT91_PB24_LCDD19 (1 << 24) /* B: LCD Data Bus Bit 19 */ +#define AT91_PB25_RK0 (1 << 25) /* A: SSC0 Receive Clock */ +#define AT91_PB25_LCDD20 (1 << 25) /* B: LCD Data Bus Bit 20 */ +#define AT91_PB26_RF0 (1 << 26) /* A: SSC0 Receive Frame Sync */ +#define AT91_PB26_LCDD21 (1 << 26) /* B: LCD Data Bus Bit 21 */ +#define AT91_PB27_SPI1_NPCS1 (1 << 27) /* A: SPI1 Peripheral Chip Select 1 */ +#define AT91_PB27_LCDD22 (1 << 27) /* B: LCD Data Bus Bit 22 */ +#define AT91_PB28_SPI1_NPCS0 (1 << 28) /* A: SPI1 Peripheral Chip Select 0 */ +#define AT91_PB28_LCDD23 (1 << 28) /* B: LCD Data Bus Bit 23 */ +#define AT91_PB29_SPI1_SPCK (1 << 29) /* A: SPI1 Serial Clock */ +#define AT91_PB29_IRQ2 (1 << 29) /* B: Interrupt input 2 */ +#define AT91_PB30_SPI1_MISO (1 << 30) /* A: SPI1 Master In Slave */ +#define AT91_PB30_IRQ1 (1 << 30) /* B: Interrupt input 1 */ +#define AT91_PB31_SPI1_MOSI (1 << 31) /* A: SPI1 Master Out Slave */ +#define AT91_PB31_PCK2 (1 << 31) /* B: PMC Programmable clock Output 2 */ + +#define AT91_PC0_SMOE (1 << 0) /* A: SmartMedia Output Enable */ +#define AT91_PC0_NCS6 (1 << 0) /* B: Chip Select 6 */ +#define AT91_PC1_SMWE (1 << 1) /* A: SmartMedia Write Enable */ +#define AT91_PC1_NCS7 (1 << 1) /* B: Chip Select 7 */ +#define AT91_PC2_NWAIT (1 << 2) /* A: NWAIT */ +#define AT91_PC2_IRQ0 (1 << 2) /* B: Interrupt input 0 */ +#define AT91_PC3_A25_CFRNW (1 << 3) /* A: Address Bus[25] / Compact Flash Read Not Write */ +#define AT91_PC4_NCS4_CFCS0 (1 << 4) /* A: Chip Select 4 / CompactFlash Chip Select 0 */ +#define AT91_PC5_NCS5_CFCS1 (1 << 5) /* A: Chip Select 5 / CompactFlash Chip Select 1 */ +#define AT91_PC6_CFCE1 (1 << 6) /* A: CompactFlash Chip Enable 1 */ +#define AT91_PC7_CFCE2 (1 << 7) /* A: CompactFlash Chip Enable 2 */ +#define AT91_PC8_TXD0 (1 << 8) /* A: USART0 Transmit Data */ +#define AT91_PC8_PCK2 (1 << 8) /* B: PMC Programmable clock Output 2 */ +#define AT91_PC9_RXD0 (1 << 9) /* A: USART0 Receive Data */ +#define AT91_PC9_PCK3 (1 << 9) /* B: PMC Programmable clock Output 3 */ +#define AT91_PC10_RTS0 (1 << 10) /* A: USART0 Ready To Send */ +#define AT91_PC10_SCK0 (1 << 10) /* B: USART0 Serial Clock */ +#define AT91_PC11_CTS0 (1 << 11) /* A: USART0 Clear To Send */ +#define AT91_PC11_FIQ (1 << 11) /* B: AIC Fast Interrupt Input */ +#define AT91_PC12_TXD1 (1 << 12) /* A: USART1 Transmit Data */ +#define AT91_PC12_NCS6 (1 << 12) /* B: Chip Select 6 */ +#define AT91_PC13_RXD1 (1 << 13) /* A: USART1 Receive Data */ +#define AT91_PC13_NCS7 (1 << 13) /* B: Chip Select 7 */ +#define AT91_PC14_TXD2 (1 << 14) /* A: USART2 Transmit Data */ +#define AT91_PC14_SPI1_NPCS2 (1 << 14) /* B: SPI1 Peripheral Chip Select 2 */ +#define AT91_PC15_RXD2 (1 << 15) /* A: USART2 Receive Data */ +#define AT91_PC15_SPI1_NPCS3 (1 << 15) /* B: SPI1 Peripheral Chip Select 3 */ +#define AT91_PC16_D16 (1 << 16) /* A: Data Bus [16] */ +#define AT91_PC16_TCLK0 (1 << 16) /* B: Timer Counter 0 external clock input */ +#define AT91_PC17_D17 (1 << 17) /* A: Data Bus [17] */ +#define AT91_PC17_TCLK1 (1 << 17) /* B: Timer Counter 1 external clock input */ +#define AT91_PC18_D18 (1 << 18) /* A: Data Bus [18] */ +#define AT91_PC18_TCLK2 (1 << 18) /* B: Timer Counter 2 external clock input */ +#define AT91_PC19_D19 (1 << 19) /* A: Data Bus [19] */ +#define AT91_PC19_TIOA0 (1 << 19) /* B: Timer Counter 0 Multipurpose Timer I/O Pin A */ +#define AT91_PC20_D20 (1 << 20) /* A: Data Bus [20] */ +#define AT91_PC20_TIOB0 (1 << 20) /* B: Timer Counter 0 Multipurpose Timer I/O Pin B */ +#define AT91_PC21_D21 (1 << 21) /* A: Data Bus [21] */ +#define AT91_PC21_TIOA1 (1 << 21) /* B: Timer Counter 1 Multipurpose Timer I/O Pin A */ +#define AT91_PC22_D22 (1 << 22) /* A: Data Bus [22] */ +#define AT91_PC22_TIOB1 (1 << 22) /* B: Timer Counter 1 Multipurpose Timer I/O Pin B */ +#define AT91_PC23_D23 (1 << 23) /* A: Data Bus [23] */ +#define AT91_PC23_TIOA2 (1 << 23) /* B: Timer Counter 2 Multipurpose Timer I/O Pin A */ +#define AT91_PC24_D24 (1 << 24) /* A: Data Bus [24] */ +#define AT91_PC24_TIOB2 (1 << 24) /* B: Timer Counter 2 Multipurpose Timer I/O Pin B */ +#define AT91_PC25_D25 (1 << 25) /* A: Data Bus [25] */ +#define AT91_PC25_TF2 (1 << 25) /* B: SSC2 Transmit Frame Sync */ +#define AT91_PC26_D26 (1 << 26) /* A: Data Bus [26] */ +#define AT91_PC26_TK2 (1 << 26) /* B: SSC2 Transmit Clock */ +#define AT91_PC27_D27 (1 << 27) /* A: Data Bus [27] */ +#define AT91_PC27_TD2 (1 << 27) /* B: SSC2 Transmit Data */ +#define AT91_PC28_D28 (1 << 28) /* A: Data Bus [28] */ +#define AT91_PC28_RD2 (1 << 28) /* B: SSC2 Receive Data */ +#define AT91_PC29_D29 (1 << 29) /* A: Data Bus [29] */ +#define AT91_PC29_RK2 (1 << 29) /* B: SSC2 Receive Clock */ +#define AT91_PC30_D30 (1 << 30) /* A: Data Bus [30] */ +#define AT91_PC30_RF2 (1 << 30) /* B: SSC2 Receive Frame Sync */ +#define AT91_PC31_D31 (1 << 31) /* A: Data Bus [31] */ +#define AT91_PC31_PCK1 (1 << 31) /* B: PMC Programmable clock Output 1 */ +#endif + +#endif diff --git a/include/asm-arm/arch-at91rm9200/at91sam9261_matrix.h b/include/asm-arm/arch-at91rm9200/at91sam9261_matrix.h new file mode 100644 index 00000000000..270a5dcdf1c --- /dev/null +++ b/include/asm-arm/arch-at91rm9200/at91sam9261_matrix.h @@ -0,0 +1,62 @@ +/* + * include/asm-arm/arch-at91rm9200/at91sam9261_matrix.h + * + * Memory Controllers (MATRIX, EBI) - System peripherals registers. + * Based on AT91SAM9261 datasheet revision D. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef AT91SAM9261_MATRIX_H +#define AT91SAM9261_MATRIX_H + +#define AT91_MATRIX_MCFG (AT91_MATRIX + 0x00) /* Master Configuration Register */ +#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ +#define AT01_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ + +#define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x04) /* Slave Configuration Register 0 */ +#define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x08) /* Slave Configuration Register 1 */ +#define AT91_MATRIX_SCFG2 (AT91_MATRIX + 0x0C) /* Slave Configuration Register 2 */ +#define AT91_MATRIX_SCFG3 (AT91_MATRIX + 0x10) /* Slave Configuration Register 3 */ +#define AT91_MATRIX_SCFG4 (AT91_MATRIX + 0x14) /* Slave Configuration Register 4 */ +#define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */ +#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */ +#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) +#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16) +#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16) +#define AT91_MATRIX_FIXED_DEFMSTR (7 << 18) /* Fixed Index of Default Master */ + +#define AT91_MATRIX_TCR (AT91_MATRIX + 0x24) /* TCM Configuration Register */ +#define AT91_MATRIX_ITCM_SIZE (0xf << 0) /* Size of ITCM enabled memory block */ +#define AT91_MATRIX_ITCM_0 (0 << 0) +#define AT91_MATRIX_ITCM_16 (5 << 0) +#define AT91_MATRIX_ITCM_32 (6 << 0) +#define AT91_MATRIX_ITCM_64 (7 << 0) +#define AT91_MATRIX_DTCM_SIZE (0xf << 4) /* Size of DTCM enabled memory block */ +#define AT91_MATRIX_DTCM_0 (0 << 4) +#define AT91_MATRIX_DTCM_16 (5 << 4) +#define AT91_MATRIX_DTCM_32 (6 << 4) +#define AT91_MATRIX_DTCM_64 (7 << 4) + +#define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x30) /* EBI Chip Select Assignment Register */ +#define AT91_MATRIX_CS1A (1 << 1) /* Chip Select 1 Assignment */ +#define AT91_MATRIX_CS1A_SMC (0 << 1) +#define AT91_MATRIX_CS1A_SDRAMC (1 << 1) +#define AT91_MATRIX_CS3A (1 << 3) /* Chip Select 3 Assignment */ +#define AT91_MATRIX_CS3A_SMC (0 << 3) +#define AT91_MATRIX_CS3A_SMC_SMARTMEDIA (1 << 3) +#define AT91_MATRIX_CS4A (1 << 4) /* Chip Select 4 Assignment */ +#define AT91_MATRIX_CS4A_SMC (0 << 4) +#define AT91_MATRIX_CS4A_SMC_CF1 (1 << 4) +#define AT91_MATRIX_CS5A (1 << 5) /* Chip Select 5 Assignment */ +#define AT91_MATRIX_CS5A_SMC (0 << 5) +#define AT91_MATRIX_CS5A_SMC_CF2 (1 << 5) +#define AT91_MATRIX_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */ + +#define AT91_MATRIX_USBPUCR (AT91_MATRIX + 0x34) /* USB Pad Pull-Up Control Register */ +#define AT91_MATRIX_USBPUCR_PUON (1 << 30) /* USB Device PAD Pull-up Enable */ + +#endif diff --git a/include/asm-arm/arch-at91rm9200/at91sam926x_mc.h b/include/asm-arm/arch-at91rm9200/at91sam926x_mc.h new file mode 100644 index 00000000000..7d94968b5d5 --- /dev/null +++ b/include/asm-arm/arch-at91rm9200/at91sam926x_mc.h @@ -0,0 +1,134 @@ +/* + * include/asm-arm/arch-at91rm9200/at91sam926x_mc.h + * + * Memory Controllers (SMC, SDRAMC) - System peripherals registers. + * Based on AT91SAM9261 datasheet revision D. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef AT91SAM926x_MC_H +#define AT91SAM926x_MC_H + +/* SDRAM Controller (SDRAMC) registers */ +#define AT91_SDRAMC_MR (AT91_SDRAMC + 0x00) /* SDRAM Controller Mode Register */ +#define AT91_SDRAMC_MODE (0xf << 0) /* Command Mode */ +#define AT91_SDRAMC_MODE_NORMAL 0 +#define AT91_SDRAMC_MODE_NOP 1 +#define AT91_SDRAMC_MODE_PRECHARGE 2 +#define AT91_SDRAMC_MODE_LMR 3 +#define AT91_SDRAMC_MODE_REFRESH 4 +#define AT91_SDRAMC_MODE_EXT_LMR 5 +#define AT91_SDRAMC_MODE_DEEP 6 + +#define AT91_SDRAMC_TR (AT91_SDRAMC + 0x04) /* SDRAM Controller Refresh Timer Register */ +#define AT91_SDRAMC_COUNT (0xfff << 0) /* Refresh Timer Counter */ + +#define AT91_SDRAMC_CR (AT91_SDRAMC + 0x08) /* SDRAM Controller Configuration Register */ +#define AT91_SDRAMC_NC (3 << 0) /* Number of Column Bits */ +#define AT91_SDRAMC_NC_8 (0 << 0) +#define AT91_SDRAMC_NC_9 (1 << 0) +#define AT91_SDRAMC_NC_10 (2 << 0) +#define AT91_SDRAMC_NC_11 (3 << 0) +#define AT91_SDRAMC_NR (3 << 2) /* Number of Row Bits */ +#define AT91_SDRAMC_NR_11 (0 << 2) +#define AT91_SDRAMC_NR_12 (1 << 2) +#define AT91_SDRAMC_NR_13 (2 << 2) +#define AT91_SDRAMC_NB (1 << 4) /* Number of Banks */ +#define AT91_SDRAMC_NB_2 (0 << 4) +#define AT91_SDRAMC_NB_4 (1 << 4) +#define AT91_SDRAMC_CAS (3 << 5) /* CAS Latency */ +#define AT91_SDRAMC_CAS_1 (1 << 5) +#define AT91_SDRAMC_CAS_2 (2 << 5) +#define AT91_SDRAMC_CAS_3 (3 << 5) +#define AT91_SDRAMC_DBW (1 << 7) /* Data Bus Width */ +#define AT91_SDRAMC_DBW_32 (0 << 7) +#define AT91_SDRAMC_DBW_16 (1 << 7) +#define AT91_SDRAMC_TWR (0xf << 8) /* Write Recovery Delay */ +#define AT91_SDRAMC_TRC (0xf << 12) /* Row Cycle Delay */ +#define AT91_SDRAMC_TRP (0xf << 16) /* Row Precharge Delay */ +#define AT91_SDRAMC_TRCD (0xf << 20) /* Row to Column Delay */ +#define AT91_SDRAMC_TRAS (0xf << 24) /* Active to Precharge Delay */ +#define AT91_SDRAMC_TXSR (0xf << 28) /* Exit Self Refresh to Active Delay */ + +#define AT91_SDRAMC_LPR (AT91_SDRAMC + 0x10) /* SDRAM Controller Low Power Register */ +#define AT91_SDRAMC_LPCB (3 << 0) /* Low-power Configurations */ +#define AT91_SDRAMC_LPCB_DISABLE 0 +#define AT91_SDRAMC_LPCB_SELF_REFRESH 1 +#define AT91_SDRAMC_LPCB_POWER_DOWN 2 +#define AT91_SDRAMC_LPCB_DEEP_POWER_DOWN 3 +#define AT91_SDRAMC_PASR (7 << 4) /* Partial Array Self Refresh */ +#define AT91_SDRAMC_TCSR (3 << 8) /* Temperature Compensated Self Refresh */ +#define AT91_SDRAMC_DS (3 << 10) /* Drive Strenght */ +#define AT91_SDRAMC_TIMEOUT (3 << 12) /* Time to define when Low Power Mode is enabled */ +#define AT91_SDRAMC_TIMEOUT_0_CLK_CYCLES (0 << 12) +#define AT91_SDRAMC_TIMEOUT_64_CLK_CYCLES (1 << 12) +#define AT91_SDRAMC_TIMEOUT_128_CLK_CYCLES (2 << 12) + +#define AT91_SDRAMC_IER (AT91_SDRAMC + 0x14) /* SDRAM Controller Interrupt Enable Register */ +#define AT91_SDRAMC_IDR (AT91_SDRAMC + 0x18) /* SDRAM Controller Interrupt Disable Register */ +#define AT91_SDRAMC_IMR (AT91_SDRAMC + 0x1C) /* SDRAM Controller Interrupt Mask Register */ +#define AT91_SDRAMC_ISR (AT91_SDRAMC + 0x20) /* SDRAM Controller Interrupt Status Register */ +#define AT91_SDRAMC_RES (1 << 0) /* Refresh Error Status */ + +#define AT91_SDRAMC_MDR (AT91_SDRAMC + 0x24) /* SDRAM Memory Device Register */ +#define AT91_SDRAMC_MD (3 << 0) /* Memory Device Type */ +#define AT91_SDRAMC_MD_SDRAM 0 +#define AT91_SDRAMC_MD_LOW_POWER_SDRAM 1 + + +/* Static Memory Controller (SMC) registers */ +#define AT91_SMC_SETUP(n) (AT91_SMC + 0x00 + ((n)*0x10)) /* Setup Register for CS n */ +#define AT91_SMC_NWESETUP (0x3f << 0) /* NWE Setup Length */ +#define AT91_SMC_NWESETUP_(x) ((x) << 0) +#define AT91_SMC_NCS_WRSETUP (0x3f << 8) /* NCS Setup Length in Write Access */ +#define AT91_SMC_NCS_WRSETUP_(x) ((x) << 8) +#define AT91_SMC_NRDSETUP (0x3f << 16) /* NRD Setup Length */ +#define AT91_SMC_NRDSETUP_(x) ((x) << 16) +#define AT91_SMC_NCS_RDSETUP (0x3f << 24) /* NCS Setup Length in Read Access */ +#define AT91_SMC_NCS_RDSETUP_(x) ((x) << 24) + +#define AT91_SMC_PULSE(n) (AT91_SMC + 0x04 + ((n)*0x10)) /* Pulse Register for CS n */ +#define AT91_SMC_NWEPULSE (0x7f << 0) /* NWE Pulse Length */ +#define AT91_SMC_NWEPULSE_(x) ((x) << 0) +#define AT91_SMC_NCS_WRPULSE (0x7f << 8) /* NCS Pulse Length in Write Access */ +#define AT91_SMC_NCS_WRPULSE_(x)((x) << 8) +#define AT91_SMC_NRDPULSE (0x7f << 16) /* NRD Pulse Length */ +#define AT91_SMC_NRDPULSE_(x) ((x) << 16) +#define AT91_SMC_NCS_RDPULSE (0x7f << 24) /* NCS Pulse Length in Read Access */ +#define AT91_SMC_NCS_RDPULSE_(x)((x) << 24) + +#define AT91_SMC_CYCLE(n) (AT91_SMC + 0x08 + ((n)*0x10)) /* Cycle Register for CS n */ +#define AT91_SMC_NWECYCLE (0x1ff << 0 ) /* Total Write Cycle Length */ +#define AT91_SMC_NWECYCLE_(x) ((x) << 0) +#define AT91_SMC_NRDCYCLE (0x1ff << 16) /* Total Read Cycle Length */ +#define AT91_SMC_NRDCYCLE_(x) ((x) << 16) + +#define AT91_SMC_MODE(n) (AT91_SMC + 0x0c + ((n)*0x10)) /* Mode Register for CS n */ +#define AT91_SMC_READMODE (1 << 0) /* Read Mode */ +#define AT91_SMC_WRITEMODE (1 << 1) /* Write Mode */ +#define AT91_SMC_EXNWMODE (3 << 5) /* NWAIT Mode */ +#define AT91_SMC_EXNWMODE_DISABLE (0 << 5) +#define AT91_SMC_EXNWMODE_FROZEN (2 << 5) +#define AT91_SMC_EXNWMODE_READY (3 << 5) +#define AT91_SMC_BAT (1 << 8) /* Byte Access Type */ +#define AT91_SMC_BAT_SELECT (0 << 8) +#define AT91_SMC_BAT_WRITE (1 << 8) +#define AT91_SMC_DBW (3 << 12) /* Data Bus Width */ +#define AT91_SMC_DBW_8 (0 << 12) +#define AT91_SMC_DBW_16 (1 << 12) +#define AT91_SMC_DBW_32 (2 << 12) +#define AT91_SMC_TDF (0xf << 16) /* Data Float Time. */ +#define AT91_SMC_TDF_(x) ((x) << 16) +#define AT91_SMC_TDFMODE (1 << 20) /* TDF Optimization - Enabled */ +#define AT91_SMC_PMEN (1 << 24) /* Page Mode Enabled */ +#define AT91_SMC_PS (3 << 28) /* Page Size */ +#define AT91_SMC_PS_4 (0 << 28) +#define AT91_SMC_PS_8 (1 << 28) +#define AT91_SMC_PS_16 (2 << 28) +#define AT91_SMC_PS_32 (3 << 28) + +#endif diff --git a/include/asm-arm/arch-at91rm9200/board.h b/include/asm-arm/arch-at91rm9200/board.h index 3cc9aec80f9..768e0fc6aa2 100644 --- a/include/asm-arm/arch-at91rm9200/board.h +++ b/include/asm-arm/arch-at91rm9200/board.h @@ -48,13 +48,14 @@ struct at91_cf_data { u8 det_pin; /* Card detect */ u8 vcc_pin; /* power switching */ u8 rst_pin; /* card reset */ + u8 chipselect; /* EBI Chip Select number */ }; extern void __init at91_add_device_cf(struct at91_cf_data *data); /* MMC / SD */ struct at91_mmc_data { u8 det_pin; /* card detect IRQ */ - unsigned is_b:1; /* uses B side (vs A) */ + unsigned slot_b:1; /* uses Slot B */ unsigned wire4:1; /* (SD) supports DAT0..DAT3 */ u8 wp_pin; /* (SD) writeprotect detect */ u8 vcc_pin; /* power switching (high == on) */ @@ -81,7 +82,8 @@ struct at91_nand_data { u8 rdy_pin; /* ready/busy */ u8 ale; /* address line number connected to ALE */ u8 cle; /* address line number connected to CLE */ - struct mtd_partition* (*partition_info)(int, int*); + u8 bus_width_16; /* buswidth is 16 bit */ + struct mtd_partition* (*partition_info)(int, int*); }; extern void __init at91_add_device_nand(struct at91_nand_data *data); diff --git a/include/asm-arm/arch-at91rm9200/cpu.h b/include/asm-arm/arch-at91rm9200/cpu.h new file mode 100644 index 00000000000..6f8d09b0869 --- /dev/null +++ b/include/asm-arm/arch-at91rm9200/cpu.h @@ -0,0 +1,49 @@ +/* + * include/asm-arm/arch-at91rm9200/cpu.h + * + * Copyright (C) 2006 SAN People + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + */ + +#ifndef __ASM_ARCH_CPU_H +#define __ASM_ARCH_CPU_H + +#include <asm/hardware.h> +#include <asm/arch/at91_dbgu.h> + + +#define ARCH_ID_AT91RM9200 0x09290780 +#define ARCH_ID_AT91SAM9260 0x019803a0 +#define ARCH_ID_AT91SAM9261 0x019703a0 + + +static inline unsigned long at91_cpu_identify(void) +{ + return (at91_sys_read(AT91_DBGU_CIDR) & ~AT91_CIDR_VERSION); +} + + +#ifdef CONFIG_ARCH_AT91RM9200 +#define cpu_is_at91rm9200() (at91_cpu_identify() == ARCH_ID_AT91RM9200) +#else +#define cpu_is_at91rm9200() (0) +#endif + +#ifdef CONFIG_ARCH_AT91SAM9260 +#define cpu_is_at91sam9260() (at91_cpu_identify() == ARCH_ID_AT91SAM9260) +#else +#define cpu_is_at91sam9260() (0) +#endif + +#ifdef CONFIG_ARCH_AT91SAM9261 +#define cpu_is_at91sam9261() (at91_cpu_identify() == ARCH_ID_AT91SAM9261) +#else +#define cpu_is_at91sam9261() (0) +#endif + +#endif diff --git a/include/asm-arm/arch-at91rm9200/debug-macro.S b/include/asm-arm/arch-at91rm9200/debug-macro.S index f496b54c4c3..85cdadf2663 100644 --- a/include/asm-arm/arch-at91rm9200/debug-macro.S +++ b/include/asm-arm/arch-at91rm9200/debug-macro.S @@ -12,6 +12,7 @@ */ #include <asm/hardware.h> +#include <asm/arch/at91_dbgu.h> .macro addruart,rx mrc p15, 0, \rx, c1, c0 diff --git a/include/asm-arm/arch-at91rm9200/entry-macro.S b/include/asm-arm/arch-at91rm9200/entry-macro.S index 61a326e9490..57248a79647 100644 --- a/include/asm-arm/arch-at91rm9200/entry-macro.S +++ b/include/asm-arm/arch-at91rm9200/entry-macro.S @@ -11,6 +11,7 @@ */ #include <asm/hardware.h> +#include <asm/arch/at91_aic.h> .macro disable_fiq .endm diff --git a/include/asm-arm/arch-at91rm9200/hardware.h b/include/asm-arm/arch-at91rm9200/hardware.h index 9ca4cc9c0b2..9ea5bfe0632 100644 --- a/include/asm-arm/arch-at91rm9200/hardware.h +++ b/include/asm-arm/arch-at91rm9200/hardware.h @@ -16,8 +16,16 @@ #include <asm/sizes.h> +#if defined(CONFIG_ARCH_AT91RM9200) #include <asm/arch/at91rm9200.h> -#include <asm/arch/at91rm9200_sys.h> +#elif defined(CONFIG_ARCH_AT91SAM9260) +#include <asm/arch/at91sam9260.h> +#elif defined(CONFIG_ARCH_AT91SAM9261) +#include <asm/arch/at91sam9261.h> +#else +#error "Unsupported AT91 processor" +#endif + /* * Remap the peripherals from address 0xFFFA0000 .. 0xFFFFFFFF @@ -34,29 +42,27 @@ * Virtual to Physical Address mapping for IO devices. */ #define AT91_VA_BASE_SYS AT91_IO_P2V(AT91_BASE_SYS) -#define AT91_VA_BASE_SPI AT91_IO_P2V(AT91RM9200_BASE_SPI) #define AT91_VA_BASE_EMAC AT91_IO_P2V(AT91RM9200_BASE_EMAC) -#define AT91_VA_BASE_TWI AT91_IO_P2V(AT91RM9200_BASE_TWI) -#define AT91_VA_BASE_MCI AT91_IO_P2V(AT91RM9200_BASE_MCI) -#define AT91_VA_BASE_UDP AT91_IO_P2V(AT91RM9200_BASE_UDP) /* Internal SRAM is mapped below the IO devices */ -#define AT91_SRAM_VIRT_BASE (AT91_IO_VIRT_BASE - AT91RM9200_SRAM_SIZE) +#define AT91_SRAM_MAX SZ_1M +#define AT91_VIRT_BASE (AT91_IO_VIRT_BASE - AT91_SRAM_MAX) /* Serial ports */ -#define ATMEL_MAX_UART 5 /* 4 USART3's and one DBGU port */ - -/* FLASH */ -#define AT91_FLASH_BASE 0x10000000 /* NCS0: Flash physical base address */ +#define ATMEL_MAX_UART 7 /* 6 USART3's and one DBGU port (SAM9260) */ + +/* External Memory Map */ +#define AT91_CHIPSELECT_0 0x10000000 +#define AT91_CHIPSELECT_1 0x20000000 +#define AT91_CHIPSELECT_2 0x30000000 +#define AT91_CHIPSELECT_3 0x40000000 +#define AT91_CHIPSELECT_4 0x50000000 +#define AT91_CHIPSELECT_5 0x60000000 +#define AT91_CHIPSELECT_6 0x70000000 +#define AT91_CHIPSELECT_7 0x80000000 /* SDRAM */ -#define AT91_SDRAM_BASE 0x20000000 /* NCS1: SDRAM physical base address */ - -/* SmartMedia */ -#define AT91_SMARTMEDIA_BASE 0x40000000 /* NCS3: Smartmedia physical base address */ - -/* Compact Flash */ -#define AT91_CF_BASE 0x50000000 /* NCS4-NCS6: Compact Flash physical base address */ +#define AT91_SDRAM_BASE AT91_CHIPSELECT_1 /* Clocks */ #define AT91_SLOW_CLOCK 32768 /* slow clock */ diff --git a/include/asm-arm/arch-at91rm9200/irqs.h b/include/asm-arm/arch-at91rm9200/irqs.h index 763cb96c418..c0679eaefaf 100644 --- a/include/asm-arm/arch-at91rm9200/irqs.h +++ b/include/asm-arm/arch-at91rm9200/irqs.h @@ -21,6 +21,8 @@ #ifndef __ASM_ARCH_IRQS_H #define __ASM_ARCH_IRQS_H +#include <asm/arch/at91_aic.h> + #define NR_AIC_IRQS 32 diff --git a/include/asm-arm/arch-at91rm9200/system.h b/include/asm-arm/arch-at91rm9200/system.h index 8a2ff472e4c..9c67130603b 100644 --- a/include/asm-arm/arch-at91rm9200/system.h +++ b/include/asm-arm/arch-at91rm9200/system.h @@ -22,6 +22,8 @@ #define __ASM_ARCH_SYSTEM_H #include <asm/hardware.h> +#include <asm/arch/at91_st.h> +#include <asm/arch/at91_dbgu.h> static inline void arch_idle(void) { @@ -39,21 +41,13 @@ static inline void arch_idle(void) cpu_do_idle(); } -static inline void arch_reset(char mode) -{ - /* - * Perform a hardware reset with the use of the Watchdog timer. - */ - at91_sys_write(AT91_ST_WDMR, AT91_ST_RSTEN | AT91_ST_EXTEN | 1); - at91_sys_write(AT91_ST_CR, AT91_ST_WDRST); -} - -#define ARCH_ID_AT91RM9200 0x09200080 -#define ARCH_ID_AT91SAM9261 0x019000a0 +void (*at91_arch_reset)(void); -static inline unsigned long arch_identify(void) +static inline void arch_reset(char mode) { - return at91_sys_read(AT91_DBGU_CIDR) & (AT91_CIDR_EPROC | AT91_CIDR_ARCH); + /* call the CPU-specific reset function */ + if (at91_arch_reset) + (at91_arch_reset)(); } #endif diff --git a/include/asm-arm/arch-at91rm9200/timex.h b/include/asm-arm/arch-at91rm9200/timex.h index 88687cefe6e..faeca45a8d4 100644 --- a/include/asm-arm/arch-at91rm9200/timex.h +++ b/include/asm-arm/arch-at91rm9200/timex.h @@ -23,6 +23,15 @@ #include <asm/hardware.h> +#if defined(CONFIG_ARCH_AT91RM9200) + #define CLOCK_TICK_RATE (AT91_SLOW_CLOCK) +#elif defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9261) + +#define AT91SAM9_MASTER_CLOCK 99300000 +#define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16) + +#endif + #endif diff --git a/include/asm-arm/arch-at91rm9200/uncompress.h b/include/asm-arm/arch-at91rm9200/uncompress.h index ec7811ab0a5..34b4b93fa01 100644 --- a/include/asm-arm/arch-at91rm9200/uncompress.h +++ b/include/asm-arm/arch-at91rm9200/uncompress.h @@ -22,11 +22,11 @@ #define __ASM_ARCH_UNCOMPRESS_H #include <asm/hardware.h> +#include <asm/arch/at91_dbgu.h> /* * The following code assumes the serial port has already been - * initialized by the bootloader. We search for the first enabled - * port in the most probable order. If you didn't setup a port in + * initialized by the bootloader. If you didn't setup a port in * your bootloader then nothing will appear (which might be desired). * * This does not append a newline diff --git a/include/asm-arm/arch-at91rm9200/vmalloc.h b/include/asm-arm/arch-at91rm9200/vmalloc.h index 4c367eb57f4..0a23b8c562b 100644 --- a/include/asm-arm/arch-at91rm9200/vmalloc.h +++ b/include/asm-arm/arch-at91rm9200/vmalloc.h @@ -21,6 +21,6 @@ #ifndef __ASM_ARCH_VMALLOC_H #define __ASM_ARCH_VMALLOC_H -#define VMALLOC_END (AT91_SRAM_VIRT_BASE & PGDIR_MASK) +#define VMALLOC_END (AT91_VIRT_BASE & PGDIR_MASK) #endif diff --git a/include/asm-arm/arch-clps711x/memory.h b/include/asm-arm/arch-clps711x/memory.h index c6e8dcf674d..42768cc8bfb 100644 --- a/include/asm-arm/arch-clps711x/memory.h +++ b/include/asm-arm/arch-clps711x/memory.h @@ -62,7 +62,15 @@ * memory bank. For those systems, simply undefine CONFIG_DISCONTIGMEM. */ -#ifdef CONFIG_DISCONTIGMEM +/* + * The PS7211 allows up to 256MB max per DRAM bank, but the EDB7211 + * uses only one of the two banks (bank #1). However, even within + * bank #1, memory is discontiguous. + * + * The EDB7211 has two 8MB DRAM areas with 8MB of empty space between + * them, so we use 24 for the node max shift to get 16MB node sizes. + */ + /* * Because of the wide memory address space between physical RAM banks on the * SA1100, it's much more convenient to use Linux's NUMA support to implement @@ -80,48 +88,7 @@ * node 2: 0xd0000000 - 0xd7ffffff * node 3: 0xd8000000 - 0xdfffffff */ - -/* - * Given a kernel address, find the home node of the underlying memory. - */ -#define KVADDR_TO_NID(addr) \ - (((unsigned long)(addr) - PAGE_OFFSET) >> NODE_MAX_MEM_SHIFT) - -/* - * Given a page frame number, convert it to a node id. - */ -#define PFN_TO_NID(pfn) \ - (((pfn) - PHYS_PFN_OFFSET) >> (NODE_MAX_MEM_SHIFT - PAGE_SHIFT)) - -/* - * Given a kaddr, ADDR_TO_MAPBASE finds the owning node of the memory - * and returns the mem_map of that node. - */ -#define ADDR_TO_MAPBASE(kaddr) \ - NODE_MEM_MAP(KVADDR_TO_NID((unsigned long)(kaddr))) - -#define PFN_TO_MAPBASE(pfn) NODE_MEM_MAP(PFN_TO_NID(pfn)) - -/* - * Given a kaddr, LOCAL_MAR_NR finds the owning node of the memory - * and returns the index corresponding to the appropriate page in the - * node's mem_map. - */ -#define LOCAL_MAP_NR(addr) \ - (((unsigned long)(addr) & (NODE_MAX_MEM_SIZE - 1)) >> PAGE_SHIFT) - -/* - * The PS7211 allows up to 256MB max per DRAM bank, but the EDB7211 - * uses only one of the two banks (bank #1). However, even within - * bank #1, memory is discontiguous. - * - * The EDB7211 has two 8MB DRAM areas with 8MB of empty space between - * them, so we use 24 for the node max shift to get 16MB node sizes. - */ -#define NODE_MAX_MEM_SHIFT 24 -#define NODE_MAX_MEM_SIZE (1<<NODE_MAX_MEM_SHIFT) - -#endif /* CONFIG_DISCONTIGMEM */ +#define NODE_MEM_SIZE_BITS 24 #endif diff --git a/include/asm-arm/arch-ep93xx/irqs.h b/include/asm-arm/arch-ep93xx/irqs.h index 9a42f5de9e5..ae532e304bf 100644 --- a/include/asm-arm/arch-ep93xx/irqs.h +++ b/include/asm-arm/arch-ep93xx/irqs.h @@ -22,9 +22,9 @@ #define IRQ_EP93XX_DMAM2P9 16 #define IRQ_EP93XX_DMAM2M0 17 #define IRQ_EP93XX_DMAM2M1 18 -#define IRQ_EP93XX_GPIO0MUX 20 -#define IRQ_EP93XX_GPIO1MUX 21 -#define IRQ_EP93XX_GPIO2MUX 22 +#define IRQ_EP93XX_GPIO0MUX 19 +#define IRQ_EP93XX_GPIO1MUX 20 +#define IRQ_EP93XX_GPIO2MUX 21 #define IRQ_EP93XX_GPIO3MUX 22 #define IRQ_EP93XX_UART1RX 23 #define IRQ_EP93XX_UART1TX 24 diff --git a/include/asm-arm/arch-imx/imx-regs.h b/include/asm-arm/arch-imx/imx-regs.h index a6912b3d867..e56a4e247d6 100644 --- a/include/asm-arm/arch-imx/imx-regs.h +++ b/include/asm-arm/arch-imx/imx-regs.h @@ -41,7 +41,13 @@ /* PLL registers */ #define CSCR __REG(IMX_PLL_BASE) /* Clock Source Control Register */ -#define CSCR_SYSTEM_SEL (1<<16) +#define CSCR_SPLL_RESTART (1<<22) +#define CSCR_MPLL_RESTART (1<<21) +#define CSCR_SYSTEM_SEL (1<<16) +#define CSCR_BCLK_DIV (0xf<<10) +#define CSCR_MPU_PRESC (1<<15) +#define CSCR_SPEN (1<<1) +#define CSCR_MPEN (1<<0) #define MPCTL0 __REG(IMX_PLL_BASE + 0x4) /* MCU PLL Control Register 0 */ #define MPCTL1 __REG(IMX_PLL_BASE + 0x8) /* MCU PLL and System Clock Register 1 */ @@ -49,8 +55,6 @@ #define SPCTL1 __REG(IMX_PLL_BASE + 0x10) /* System PLL Control Register 1 */ #define PCDR __REG(IMX_PLL_BASE + 0x20) /* Peripheral Clock Divider Register */ -#define CSCR_MPLL_RESTART (1<<21) - /* * GPIO Module and I/O Multiplexer * x = 0..3 for reg_A, reg_B, reg_C, reg_D diff --git a/include/asm-arm/arch-imx/timex.h b/include/asm-arm/arch-imx/timex.h index 8c91674706b..e22ba789546 100644 --- a/include/asm-arm/arch-imx/timex.h +++ b/include/asm-arm/arch-imx/timex.h @@ -21,7 +21,6 @@ #ifndef __ASM_ARCH_TIMEX_H #define __ASM_ARCH_TIMEX_H -#include <asm/hardware.h> -#define CLOCK_TICK_RATE (CLK32) +#define CLOCK_TICK_RATE (16000000) #endif diff --git a/include/asm-arm/arch-iop13xx/debug-macro.S b/include/asm-arm/arch-iop13xx/debug-macro.S new file mode 100644 index 00000000000..788b4e386c1 --- /dev/null +++ b/include/asm-arm/arch-iop13xx/debug-macro.S @@ -0,0 +1,26 @@ +/* + * include/asm-arm/arch-iop13xx/debug-macro.S + * + * Debugging macro include header + * + * Copyright (C) 1994-1999 Russell King + * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + + .macro addruart, rx + mrc p15, 0, \rx, c1, c0 + tst \rx, #1 @ mmu enabled? + moveq \rx, #0xff000000 @ physical + orreq \rx, \rx, #0x00d80000 + movne \rx, #0xfe000000 @ virtual + orrne \rx, \rx, #0x00e80000 + orr \rx, \rx, #0x00002300 + orr \rx, \rx, #0x00000040 + .endm + +#define UART_SHIFT 2 +#include <asm/hardware/debug-8250.S> diff --git a/include/asm-arm/arch-iop13xx/dma.h b/include/asm-arm/arch-iop13xx/dma.h new file mode 100644 index 00000000000..2e15da53ff7 --- /dev/null +++ b/include/asm-arm/arch-iop13xx/dma.h @@ -0,0 +1,3 @@ +#ifndef _IOP13XX_DMA_H +#define _IOP13XX_DMA_H_ +#endif diff --git a/include/asm-arm/arch-iop13xx/entry-macro.S b/include/asm-arm/arch-iop13xx/entry-macro.S new file mode 100644 index 00000000000..94c50283dc5 --- /dev/null +++ b/include/asm-arm/arch-iop13xx/entry-macro.S @@ -0,0 +1,39 @@ +/* + * iop13xx low level irq macros + * Copyright (c) 2005-2006, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., 59 Temple + * Place - Suite 330, Boston, MA 02111-1307 USA. + * + */ + .macro disable_fiq + .endm + + /* + * Note: a 1-cycle window exists where iintvec will return the value + * of iintbase, so we explicitly check for "bad zeros" + */ + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp + mrc p15, 0, \tmp, c15, c1, 0 + orr \tmp, \tmp, #(1 << 6) + mcr p15, 0, \tmp, c15, c1, 0 @ Enable cp6 access + + mrc p6, 0, \irqnr, c3, c2, 0 @ Read IINTVEC + cmp \irqnr, #0 + mrceq p6, 0, \irqnr, c3, c2, 0 @ Re-read on potentially bad zero + adds \irqstat, \irqnr, #1 @ Check for 0xffffffff + movne \irqnr, \irqnr, lsr #2 @ Convert to irqnr + + biceq \tmp, \tmp, #(1 << 6) + mcreq p15, 0, \tmp, c15, c1, 0 @ Disable cp6 access if no more interrupts + .endm diff --git a/include/asm-arm/arch-iop13xx/hardware.h b/include/asm-arm/arch-iop13xx/hardware.h new file mode 100644 index 00000000000..8e1d5628984 --- /dev/null +++ b/include/asm-arm/arch-iop13xx/hardware.h @@ -0,0 +1,28 @@ +#ifndef __ASM_ARCH_HARDWARE_H +#define __ASM_ARCH_HARDWARE_H +#include <asm/types.h> + +#define pcibios_assign_all_busses() 1 + +#ifndef __ASSEMBLY__ +extern unsigned long iop13xx_pcibios_min_io; +extern unsigned long iop13xx_pcibios_min_mem; +extern u16 iop13xx_dev_id(void); +extern void iop13xx_set_atu_mmr_bases(void); +#endif + +#define PCIBIOS_MIN_IO (iop13xx_pcibios_min_io) +#define PCIBIOS_MIN_MEM (iop13xx_pcibios_min_mem) + +/* + * Generic chipset bits + * + */ +#include "iop13xx.h" + +/* + * Board specific bits + */ +#include "iq81340.h" + +#endif /* _ASM_ARCH_HARDWARE_H */ diff --git a/include/asm-arm/arch-iop13xx/io.h b/include/asm-arm/arch-iop13xx/io.h new file mode 100644 index 00000000000..5a7bdb52660 --- /dev/null +++ b/include/asm-arm/arch-iop13xx/io.h @@ -0,0 +1,42 @@ +/* + * iop13xx custom ioremap implementation + * Copyright (c) 2005-2006, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., 59 Temple + * Place - Suite 330, Boston, MA 02111-1307 USA. + * + */ +#ifndef __ASM_ARM_ARCH_IO_H +#define __ASM_ARM_ARCH_IO_H + +#define IO_SPACE_LIMIT 0xffffffff + +#define __io(a) __iop13xx_io(a) +#define __mem_pci(a) (a) +#define __mem_isa(a) (a) + +extern void __iomem * __iop13xx_io(unsigned long io_addr); +extern void __iomem * __ioremap(unsigned long, size_t, unsigned long); +extern void __iomem *__iop13xx_ioremap(unsigned long cookie, size_t size, + unsigned long flags); +extern void __iop13xx_iounmap(void __iomem *addr); + +extern u32 iop13xx_atue_mem_base; +extern u32 iop13xx_atux_mem_base; +extern size_t iop13xx_atue_mem_size; +extern size_t iop13xx_atux_mem_size; + +#define __arch_ioremap(a, s, f) __iop13xx_ioremap(a, s, f) +#define __arch_iounmap(a) __iop13xx_iounmap(a) + +#endif diff --git a/include/asm-arm/arch-iop13xx/iop13xx.h b/include/asm-arm/arch-iop13xx/iop13xx.h new file mode 100644 index 00000000000..a88522a0ff8 --- /dev/null +++ b/include/asm-arm/arch-iop13xx/iop13xx.h @@ -0,0 +1,492 @@ +#ifndef _IOP13XX_HW_H_ +#define _IOP13XX_HW_H_ + +#ifndef __ASSEMBLY__ +/* The ATU offsets can change based on the strapping */ +extern u32 iop13xx_atux_pmmr_offset; +extern u32 iop13xx_atue_pmmr_offset; +void iop13xx_init_irq(void); +void iop13xx_map_io(void); +void iop13xx_platform_init(void); +void iop13xx_init_irq(void); +void iop13xx_init_time(unsigned long tickrate); +unsigned long iop13xx_gettimeoffset(void); + +/* handle cp6 access + * to do: handle access in entry-armv5.S and unify with + * the iop3xx implementation + * note: use iop13xx_cp6_enable_irq_save and iop13xx_cp6_irq_restore (irq.h) + * when interrupts are enabled + */ +static inline unsigned long iop13xx_cp6_save(void) +{ + u32 temp, cp_flags; + + asm volatile ( + "mrc p15, 0, %1, c15, c1, 0\n\t" + "orr %0, %1, #(1 << 6)\n\t" + "mcr p15, 0, %0, c15, c1, 0\n\t" + : "=r" (temp), "=r"(cp_flags)); + + return cp_flags; +} + +static inline void iop13xx_cp6_restore(unsigned long cp_flags) +{ + asm volatile ( + "mcr p15, 0, %0, c15, c1, 0\n\t" + : : "r" (cp_flags) ); +} + +/* CPUID CP6 R0 Page 0 */ +static inline int iop13xx_cpu_id(void) +{ + int id; + asm volatile("mrc p6, 0, %0, c0, c0, 0":"=r" (id)); + return id; +} + +#endif + +/* + * IOP13XX I/O and Mem space regions for PCI autoconfiguration + */ +#define IOP13XX_MAX_RAM_SIZE 0x80000000UL /* 2GB */ +#define IOP13XX_PCI_OFFSET IOP13XX_MAX_RAM_SIZE + +/* PCI MAP + * 0x0000.0000 - 0x8000.0000 1:1 mapping with Physical RAM + * 0x8000.0000 - 0x8800.0000 PCIX/PCIE memory window (128MB) +*/ +#define IOP13XX_PCIX_IO_WINDOW_SIZE 0x10000UL +#define IOP13XX_PCIX_LOWER_IO_PA 0xfffb0000UL +#define IOP13XX_PCIX_LOWER_IO_VA 0xfec60000UL +#define IOP13XX_PCIX_LOWER_IO_BA 0x0fff0000UL +#define IOP13XX_PCIX_UPPER_IO_PA (IOP13XX_PCIX_LOWER_IO_PA +\ + IOP13XX_PCIX_IO_WINDOW_SIZE - 1) +#define IOP13XX_PCIX_UPPER_IO_VA (IOP13XX_PCIX_LOWER_IO_VA +\ + IOP13XX_PCIX_IO_WINDOW_SIZE - 1) +#define IOP13XX_PCIX_IO_OFFSET (IOP13XX_PCIX_LOWER_IO_VA -\ + IOP13XX_PCIX_LOWER_IO_BA) +#define IOP13XX_PCIX_IO_PHYS_TO_VIRT(addr) (u32) ((u32) addr -\ + (IOP13XX_PCIX_LOWER_IO_PA\ + - IOP13XX_PCIX_LOWER_IO_VA)) + +#define IOP13XX_PCIX_MEM_PHYS_OFFSET 0x100000000ULL +#define IOP13XX_PCIX_MEM_WINDOW_SIZE 0x3a000000UL +#define IOP13XX_PCIX_LOWER_MEM_BA (PHYS_OFFSET + IOP13XX_PCI_OFFSET) +#define IOP13XX_PCIX_LOWER_MEM_PA (IOP13XX_PCIX_MEM_PHYS_OFFSET +\ + IOP13XX_PCIX_LOWER_MEM_BA) +#define IOP13XX_PCIX_UPPER_MEM_PA (IOP13XX_PCIX_LOWER_MEM_PA +\ + IOP13XX_PCIX_MEM_WINDOW_SIZE - 1) +#define IOP13XX_PCIX_UPPER_MEM_BA (IOP13XX_PCIX_LOWER_MEM_BA +\ + IOP13XX_PCIX_MEM_WINDOW_SIZE - 1) + +#define IOP13XX_PCIX_MEM_COOKIE 0x80000000UL +#define IOP13XX_PCIX_LOWER_MEM_RA IOP13XX_PCIX_MEM_COOKIE +#define IOP13XX_PCIX_UPPER_MEM_RA (IOP13XX_PCIX_LOWER_MEM_RA +\ + IOP13XX_PCIX_MEM_WINDOW_SIZE - 1) +#define IOP13XX_PCIX_MEM_OFFSET (IOP13XX_PCIX_MEM_COOKIE -\ + IOP13XX_PCIX_LOWER_MEM_BA) + +/* PCI-E ranges */ +#define IOP13XX_PCIE_IO_WINDOW_SIZE 0x10000UL +#define IOP13XX_PCIE_LOWER_IO_PA 0xfffd0000UL +#define IOP13XX_PCIE_LOWER_IO_VA 0xfed70000UL +#define IOP13XX_PCIE_LOWER_IO_BA 0x0fff0000UL +#define IOP13XX_PCIE_UPPER_IO_PA (IOP13XX_PCIE_LOWER_IO_PA +\ + IOP13XX_PCIE_IO_WINDOW_SIZE - 1) +#define IOP13XX_PCIE_UPPER_IO_VA (IOP13XX_PCIE_LOWER_IO_VA +\ + IOP13XX_PCIE_IO_WINDOW_SIZE - 1) +#define IOP13XX_PCIE_UPPER_IO_BA (IOP13XX_PCIE_LOWER_IO_BA +\ + IOP13XX_PCIE_IO_WINDOW_SIZE - 1) +#define IOP13XX_PCIE_IO_OFFSET (IOP13XX_PCIE_LOWER_IO_VA -\ + IOP13XX_PCIE_LOWER_IO_BA) +#define IOP13XX_PCIE_IO_PHYS_TO_VIRT(addr) (u32) ((u32) addr -\ + (IOP13XX_PCIE_LOWER_IO_PA\ + - IOP13XX_PCIE_LOWER_IO_VA)) + +#define IOP13XX_PCIE_MEM_PHYS_OFFSET 0x200000000ULL +#define IOP13XX_PCIE_MEM_WINDOW_SIZE 0x3a000000UL +#define IOP13XX_PCIE_LOWER_MEM_BA (PHYS_OFFSET + IOP13XX_PCI_OFFSET) +#define IOP13XX_PCIE_LOWER_MEM_PA (IOP13XX_PCIE_MEM_PHYS_OFFSET +\ + IOP13XX_PCIE_LOWER_MEM_BA) +#define IOP13XX_PCIE_UPPER_MEM_PA (IOP13XX_PCIE_LOWER_MEM_PA +\ + IOP13XX_PCIE_MEM_WINDOW_SIZE - 1) +#define IOP13XX_PCIE_UPPER_MEM_BA (IOP13XX_PCIE_LOWER_MEM_BA +\ + IOP13XX_PCIE_MEM_WINDOW_SIZE - 1) + +/* All 0xc000.0000 - 0xfdff.ffff addresses belong to PCIe */ +#define IOP13XX_PCIE_MEM_COOKIE 0xc0000000UL +#define IOP13XX_PCIE_LOWER_MEM_RA IOP13XX_PCIE_MEM_COOKIE +#define IOP13XX_PCIE_UPPER_MEM_RA (IOP13XX_PCIE_LOWER_MEM_RA +\ + IOP13XX_PCIE_MEM_WINDOW_SIZE - 1) +#define IOP13XX_PCIE_MEM_OFFSET (IOP13XX_PCIE_MEM_COOKIE -\ + IOP13XX_PCIE_LOWER_MEM_BA) + +/* PBI Ranges */ +#define IOP13XX_PBI_LOWER_MEM_PA 0xf0000000UL +#define IOP13XX_PBI_MEM_WINDOW_SIZE 0x04000000UL +#define IOP13XX_PBI_MEM_COOKIE 0xfa000000UL +#define IOP13XX_PBI_LOWER_MEM_RA IOP13XX_PBI_MEM_COOKIE +#define IOP13XX_PBI_UPPER_MEM_RA (IOP13XX_PBI_LOWER_MEM_RA +\ + IOP13XX_PBI_MEM_WINDOW_SIZE - 1) + +/* + * IOP13XX chipset registers + */ +#define IOP13XX_PMMR_PHYS_MEM_BASE 0xffd80000UL /* PMMR phys. address */ +#define IOP13XX_PMMR_VIRT_MEM_BASE 0xfee80000UL /* PMMR phys. address */ +#define IOP13XX_PMMR_MEM_WINDOW_SIZE 0x80000 +#define IOP13XX_PMMR_UPPER_MEM_VA (IOP13XX_PMMR_VIRT_MEM_BASE +\ + IOP13XX_PMMR_MEM_WINDOW_SIZE - 1) +#define IOP13XX_PMMR_UPPER_MEM_PA (IOP13XX_PMMR_PHYS_MEM_BASE +\ + IOP13XX_PMMR_MEM_WINDOW_SIZE - 1) +#define IOP13XX_PMMR_VIRT_TO_PHYS(addr) (u32) ((u32) addr +\ + (IOP13XX_PMMR_PHYS_MEM_BASE\ + - IOP13XX_PMMR_VIRT_MEM_BASE)) +#define IOP13XX_PMMR_PHYS_TO_VIRT(addr) (u32) ((u32) addr -\ + (IOP13XX_PMMR_PHYS_MEM_BASE\ + - IOP13XX_PMMR_VIRT_MEM_BASE)) +#define IOP13XX_REG_ADDR32(reg) (IOP13XX_PMMR_VIRT_MEM_BASE + (reg)) +#define IOP13XX_REG_ADDR16(reg) (IOP13XX_PMMR_VIRT_MEM_BASE + (reg)) +#define IOP13XX_REG_ADDR8(reg) (IOP13XX_PMMR_VIRT_MEM_BASE + (reg)) +#define IOP13XX_REG_ADDR32_PHYS(reg) (IOP13XX_PMMR_PHYS_MEM_BASE + (reg)) +#define IOP13XX_REG_ADDR16_PHYS(reg) (IOP13XX_PMMR_PHYS_MEM_BASE + (reg)) +#define IOP13XX_REG_ADDR8_PHYS(reg) (IOP13XX_PMMR_PHYS_MEM_BASE + (reg)) +#define IOP13XX_PMMR_SIZE 0x00080000 + +/*=================== Defines for Platform Devices =====================*/ +#define IOP13XX_UART0_PHYS (IOP13XX_PMMR_PHYS_MEM_BASE | 0x00002300) +#define IOP13XX_UART1_PHYS (IOP13XX_PMMR_PHYS_MEM_BASE | 0x00002340) +#define IOP13XX_UART0_VIRT (IOP13XX_PMMR_VIRT_MEM_BASE | 0x00002300) +#define IOP13XX_UART1_VIRT (IOP13XX_PMMR_VIRT_MEM_BASE | 0x00002340) + +#define IOP13XX_I2C0_PHYS (IOP13XX_PMMR_PHYS_MEM_BASE | 0x00002500) +#define IOP13XX_I2C1_PHYS (IOP13XX_PMMR_PHYS_MEM_BASE | 0x00002520) +#define IOP13XX_I2C2_PHYS (IOP13XX_PMMR_PHYS_MEM_BASE | 0x00002540) +#define IOP13XX_I2C0_VIRT (IOP13XX_PMMR_VIRT_MEM_BASE | 0x00002500) +#define IOP13XX_I2C1_VIRT (IOP13XX_PMMR_VIRT_MEM_BASE | 0x00002520) +#define IOP13XX_I2C2_VIRT (IOP13XX_PMMR_VIRT_MEM_BASE | 0x00002540) + +/* ATU selection flags */ +/* IOP13XX_INIT_ATU_DEFAULT = Rely on CONFIG_IOP13XX_ATU* */ +#define IOP13XX_INIT_ATU_DEFAULT (0) +#define IOP13XX_INIT_ATU_ATUX (1 << 0) +#define IOP13XX_INIT_ATU_ATUE (1 << 1) +#define IOP13XX_INIT_ATU_NONE (1 << 2) + +/* UART selection flags */ +/* IOP13XX_INIT_UART_DEFAULT = Rely on CONFIG_IOP13XX_UART* */ +#define IOP13XX_INIT_UART_DEFAULT (0) +#define IOP13XX_INIT_UART_0 (1 << 0) +#define IOP13XX_INIT_UART_1 (1 << 1) + +/* I2C selection flags */ +/* IOP13XX_INIT_I2C_DEFAULT = Rely on CONFIG_IOP13XX_I2C* */ +#define IOP13XX_INIT_I2C_DEFAULT (0) +#define IOP13XX_INIT_I2C_0 (1 << 0) +#define IOP13XX_INIT_I2C_1 (1 << 1) +#define IOP13XX_INIT_I2C_2 (1 << 2) + +#define IQ81340_NUM_UART 2 +#define IQ81340_NUM_I2C 3 +#define IQ81340_NUM_PHYS_MAP_FLASH 1 +#define IQ81340_MAX_PLAT_DEVICES (IQ81340_NUM_UART +\ + IQ81340_NUM_I2C +\ + IQ81340_NUM_PHYS_MAP_FLASH) + +/*========================== PMMR offsets for key registers ============*/ +#define IOP13XX_ATU0_PMMR_OFFSET 0x00048000 +#define IOP13XX_ATU1_PMMR_OFFSET 0x0004c000 +#define IOP13XX_ATU2_PMMR_OFFSET 0x0004d000 +#define IOP13XX_ADMA0_PMMR_OFFSET 0x00000000 +#define IOP13XX_ADMA1_PMMR_OFFSET 0x00000200 +#define IOP13XX_ADMA2_PMMR_OFFSET 0x00000400 +#define IOP13XX_PBI_PMMR_OFFSET 0x00001580 +#define IOP13XX_ESSR0_PMMR_OFFSET 0x00002188 +#define IOP13XX_ESSR0 IOP13XX_REG_ADDR32(0x00002188) + +#define IOP13XX_ESSR0_IFACE_MASK 0x00004000 /* Interface PCI-X / PCI-E */ +#define IOP13XX_CONTROLLER_ONLY (1 << 14) +#define IOP13XX_INTERFACE_SEL_PCIX (1 << 15) + +#define IOP13XX_PMON_PMMR_OFFSET 0x0001A000 +#define IOP13XX_PMON_BASE (IOP13XX_PMMR_VIRT_MEM_BASE +\ + IOP13XX_PMON_PMMR_OFFSET) +#define IOP13XX_PMON_PHYSBASE (IOP13XX_PMMR_PHYS_MEM_BASE +\ + IOP13XX_PMON_PMMR_OFFSET) + +#define IOP13XX_PMON_CMD0 (IOP13XX_PMON_BASE + 0x0) +#define IOP13XX_PMON_EVR0 (IOP13XX_PMON_BASE + 0x4) +#define IOP13XX_PMON_STS0 (IOP13XX_PMON_BASE + 0x8) +#define IOP13XX_PMON_DATA0 (IOP13XX_PMON_BASE + 0xC) + +#define IOP13XX_PMON_CMD3 (IOP13XX_PMON_BASE + 0x30) +#define IOP13XX_PMON_EVR3 (IOP13XX_PMON_BASE + 0x34) +#define IOP13XX_PMON_STS3 (IOP13XX_PMON_BASE + 0x38) +#define IOP13XX_PMON_DATA3 (IOP13XX_PMON_BASE + 0x3C) + +#define IOP13XX_PMON_CMD7 (IOP13XX_PMON_BASE + 0x70) +#define IOP13XX_PMON_EVR7 (IOP13XX_PMON_BASE + 0x74) +#define IOP13XX_PMON_STS7 (IOP13XX_PMON_BASE + 0x78) +#define IOP13XX_PMON_DATA7 (IOP13XX_PMON_BASE + 0x7C) + +#define IOP13XX_PMONEN (IOP13XX_PMMR_VIRT_MEM_BASE + 0x4E040) +#define IOP13XX_PMONSTAT (IOP13XX_PMMR_VIRT_MEM_BASE + 0x4E044) + +/*================================ATU===================================*/ +#define IOP13XX_ATUX_OFFSET(ofs) IOP13XX_REG_ADDR32(\ + iop13xx_atux_pmmr_offset + (ofs)) + +#define IOP13XX_ATUX_DID IOP13XX_REG_ADDR16(\ + iop13xx_atux_pmmr_offset + 0x2) + +#define IOP13XX_ATUX_ATUCMD IOP13XX_REG_ADDR16(\ + iop13xx_atux_pmmr_offset + 0x4) +#define IOP13XX_ATUX_ATUSR IOP13XX_REG_ADDR16(\ + iop13xx_atux_pmmr_offset + 0x6) + +#define IOP13XX_ATUX_IABAR0 IOP13XX_ATUX_OFFSET(0x10) +#define IOP13XX_ATUX_IAUBAR0 IOP13XX_ATUX_OFFSET(0x14) +#define IOP13XX_ATUX_IABAR1 IOP13XX_ATUX_OFFSET(0x18) +#define IOP13XX_ATUX_IAUBAR1 IOP13XX_ATUX_OFFSET(0x1c) +#define IOP13XX_ATUX_IABAR2 IOP13XX_ATUX_OFFSET(0x20) +#define IOP13XX_ATUX_IAUBAR2 IOP13XX_ATUX_OFFSET(0x24) +#define IOP13XX_ATUX_IALR0 IOP13XX_ATUX_OFFSET(0x40) +#define IOP13XX_ATUX_IATVR0 IOP13XX_ATUX_OFFSET(0x44) +#define IOP13XX_ATUX_IAUTVR0 IOP13XX_ATUX_OFFSET(0x48) +#define IOP13XX_ATUX_IALR1 IOP13XX_ATUX_OFFSET(0x4c) +#define IOP13XX_ATUX_IATVR1 IOP13XX_ATUX_OFFSET(0x50) +#define IOP13XX_ATUX_IAUTVR1 IOP13XX_ATUX_OFFSET(0x54) +#define IOP13XX_ATUX_IALR2 IOP13XX_ATUX_OFFSET(0x58) +#define IOP13XX_ATUX_IATVR2 IOP13XX_ATUX_OFFSET(0x5c) +#define IOP13XX_ATUX_IAUTVR2 IOP13XX_ATUX_OFFSET(0x60) +#define IOP13XX_ATUX_ATUCR IOP13XX_ATUX_OFFSET(0x70) +#define IOP13XX_ATUX_PCSR IOP13XX_ATUX_OFFSET(0x74) +#define IOP13XX_ATUX_ATUISR IOP13XX_ATUX_OFFSET(0x78) +#define IOP13XX_ATUX_PCIXSR IOP13XX_ATUX_OFFSET(0xD4) +#define IOP13XX_ATUX_IABAR3 IOP13XX_ATUX_OFFSET(0x200) +#define IOP13XX_ATUX_IAUBAR3 IOP13XX_ATUX_OFFSET(0x204) +#define IOP13XX_ATUX_IALR3 IOP13XX_ATUX_OFFSET(0x208) +#define IOP13XX_ATUX_IATVR3 IOP13XX_ATUX_OFFSET(0x20c) +#define IOP13XX_ATUX_IAUTVR3 IOP13XX_ATUX_OFFSET(0x210) + +#define IOP13XX_ATUX_OIOBAR IOP13XX_ATUX_OFFSET(0x300) +#define IOP13XX_ATUX_OIOWTVR IOP13XX_ATUX_OFFSET(0x304) +#define IOP13XX_ATUX_OUMBAR0 IOP13XX_ATUX_OFFSET(0x308) +#define IOP13XX_ATUX_OUMWTVR0 IOP13XX_ATUX_OFFSET(0x30c) +#define IOP13XX_ATUX_OUMBAR1 IOP13XX_ATUX_OFFSET(0x310) +#define IOP13XX_ATUX_OUMWTVR1 IOP13XX_ATUX_OFFSET(0x314) +#define IOP13XX_ATUX_OUMBAR2 IOP13XX_ATUX_OFFSET(0x318) +#define IOP13XX_ATUX_OUMWTVR2 IOP13XX_ATUX_OFFSET(0x31c) +#define IOP13XX_ATUX_OUMBAR3 IOP13XX_ATUX_OFFSET(0x320) +#define IOP13XX_ATUX_OUMWTVR3 IOP13XX_ATUX_OFFSET(0x324) +#define IOP13XX_ATUX_OUDMABAR IOP13XX_ATUX_OFFSET(0x328) +#define IOP13XX_ATUX_OUMSIBAR IOP13XX_ATUX_OFFSET(0x32c) +#define IOP13XX_ATUX_OCCAR IOP13XX_ATUX_OFFSET(0x330) +#define IOP13XX_ATUX_OCCDR IOP13XX_ATUX_OFFSET(0x334) + +#define IOP13XX_ATUX_ATUCR_OUT_EN (1 << 1) +#define IOP13XX_ATUX_PCSR_CENTRAL_RES (1 << 25) +#define IOP13XX_ATUX_PCSR_P_RSTOUT (1 << 21) +#define IOP13XX_ATUX_PCSR_OUT_Q_BUSY (1 << 15) +#define IOP13XX_ATUX_PCSR_IN_Q_BUSY (1 << 14) +#define IOP13XX_ATUX_PCSR_FREQ_OFFSET (16) + +#define IOP13XX_ATUX_STAT_PCI_IFACE_ERR (1 << 18) +#define IOP13XX_ATUX_STAT_VPD_ADDR (1 << 17) +#define IOP13XX_ATUX_STAT_INT_PAR_ERR (1 << 16) +#define IOP13XX_ATUX_STAT_CFG_WRITE (1 << 15) +#define IOP13XX_ATUX_STAT_ERR_COR (1 << 14) +#define IOP13XX_ATUX_STAT_TX_SCEM (1 << 13) +#define IOP13XX_ATUX_STAT_REC_SCEM (1 << 12) +#define IOP13XX_ATUX_STAT_POWER_TRAN (1 << 11) +#define IOP13XX_ATUX_STAT_TX_SERR (1 << 10) +#define IOP13XX_ATUX_STAT_DET_PAR_ERR (1 << 9 ) +#define IOP13XX_ATUX_STAT_BIST (1 << 8 ) +#define IOP13XX_ATUX_STAT_INT_REC_MABORT (1 << 7 ) +#define IOP13XX_ATUX_STAT_REC_SERR (1 << 4 ) +#define IOP13XX_ATUX_STAT_EXT_REC_MABORT (1 << 3 ) +#define IOP13XX_ATUX_STAT_EXT_REC_TABORT (1 << 2 ) +#define IOP13XX_ATUX_STAT_EXT_SIG_TABORT (1 << 1 ) +#define IOP13XX_ATUX_STAT_MASTER_DATA_PAR (1 << 0 ) + +#define IOP13XX_ATUX_PCIXSR_BUS_NUM (8) +#define IOP13XX_ATUX_PCIXSR_DEV_NUM (3) +#define IOP13XX_ATUX_PCIXSR_FUNC_NUM (0) + +#define IOP13XX_ATUX_IALR_DISABLE 0x00000001 +#define IOP13XX_ATUX_OUMBAR_ENABLE 0x80000000 + +#define IOP13XX_ATUE_OFFSET(ofs) IOP13XX_REG_ADDR32(\ + iop13xx_atue_pmmr_offset + (ofs)) + +#define IOP13XX_ATUE_DID IOP13XX_REG_ADDR16(\ + iop13xx_atue_pmmr_offset + 0x2) +#define IOP13XX_ATUE_ATUCMD IOP13XX_REG_ADDR16(\ + iop13xx_atue_pmmr_offset + 0x4) +#define IOP13XX_ATUE_ATUSR IOP13XX_REG_ADDR16(\ + iop13xx_atue_pmmr_offset + 0x6) + +#define IOP13XX_ATUE_IABAR0 IOP13XX_ATUE_OFFSET(0x10) +#define IOP13XX_ATUE_IAUBAR0 IOP13XX_ATUE_OFFSET(0x14) +#define IOP13XX_ATUE_IABAR1 IOP13XX_ATUE_OFFSET(0x18) +#define IOP13XX_ATUE_IAUBAR1 IOP13XX_ATUE_OFFSET(0x1c) +#define IOP13XX_ATUE_IABAR2 IOP13XX_ATUE_OFFSET(0x20) +#define IOP13XX_ATUE_IAUBAR2 IOP13XX_ATUE_OFFSET(0x24) +#define IOP13XX_ATUE_IALR0 IOP13XX_ATUE_OFFSET(0x40) +#define IOP13XX_ATUE_IATVR0 IOP13XX_ATUE_OFFSET(0x44) +#define IOP13XX_ATUE_IAUTVR0 IOP13XX_ATUE_OFFSET(0x48) +#define IOP13XX_ATUE_IALR1 IOP13XX_ATUE_OFFSET(0x4c) +#define IOP13XX_ATUE_IATVR1 IOP13XX_ATUE_OFFSET(0x50) +#define IOP13XX_ATUE_IAUTVR1 IOP13XX_ATUE_OFFSET(0x54) +#define IOP13XX_ATUE_IALR2 IOP13XX_ATUE_OFFSET(0x58) +#define IOP13XX_ATUE_IATVR2 IOP13XX_ATUE_OFFSET(0x5c) +#define IOP13XX_ATUE_IAUTVR2 IOP13XX_ATUE_OFFSET(0x60) +#define IOP13XX_ATUE_PE_LSTS IOP13XX_REG_ADDR16(\ + iop13xx_atue_pmmr_offset + 0xe2) +#define IOP13XX_ATUE_OIOWTVR IOP13XX_ATUE_OFFSET(0x304) +#define IOP13XX_ATUE_OUMBAR0 IOP13XX_ATUE_OFFSET(0x308) +#define IOP13XX_ATUE_OUMWTVR0 IOP13XX_ATUE_OFFSET(0x30c) +#define IOP13XX_ATUE_OUMBAR1 IOP13XX_ATUE_OFFSET(0x310) +#define IOP13XX_ATUE_OUMWTVR1 IOP13XX_ATUE_OFFSET(0x314) +#define IOP13XX_ATUE_OUMBAR2 IOP13XX_ATUE_OFFSET(0x318) +#define IOP13XX_ATUE_OUMWTVR2 IOP13XX_ATUE_OFFSET(0x31c) +#define IOP13XX_ATUE_OUMBAR3 IOP13XX_ATUE_OFFSET(0x320) +#define IOP13XX_ATUE_OUMWTVR3 IOP13XX_ATUE_OFFSET(0x324) + +#define IOP13XX_ATUE_ATUCR IOP13XX_ATUE_OFFSET(0x70) +#define IOP13XX_ATUE_PCSR IOP13XX_ATUE_OFFSET(0x74) +#define IOP13XX_ATUE_ATUISR IOP13XX_ATUE_OFFSET(0x78) +#define IOP13XX_ATUE_OIOBAR IOP13XX_ATUE_OFFSET(0x300) +#define IOP13XX_ATUE_OCCAR IOP13XX_ATUE_OFFSET(0x32c) +#define IOP13XX_ATUE_OCCDR IOP13XX_ATUE_OFFSET(0x330) + +#define IOP13XX_ATUE_PIE_STS IOP13XX_ATUE_OFFSET(0x384) +#define IOP13XX_ATUE_PIE_MSK IOP13XX_ATUE_OFFSET(0x388) + +#define IOP13XX_ATUE_ATUCR_IVM (1 << 6) +#define IOP13XX_ATUE_ATUCR_OUT_EN (1 << 1) +#define IOP13XX_ATUE_OCCAR_BUS_NUM (24) +#define IOP13XX_ATUE_OCCAR_DEV_NUM (19) +#define IOP13XX_ATUE_OCCAR_FUNC_NUM (16) +#define IOP13XX_ATUE_OCCAR_EXT_REG (8) +#define IOP13XX_ATUE_OCCAR_REG (2) + +#define IOP13XX_ATUE_PCSR_BUS_NUM (24) +#define IOP13XX_ATUE_PCSR_DEV_NUM (19) +#define IOP13XX_ATUE_PCSR_FUNC_NUM (16) +#define IOP13XX_ATUE_PCSR_OUT_Q_BUSY (1 << 15) +#define IOP13XX_ATUE_PCSR_IN_Q_BUSY (1 << 14) +#define IOP13XX_ATUE_PCSR_END_POINT (1 << 13) +#define IOP13XX_ATUE_PCSR_LLRB_BUSY (1 << 12) + +#define IOP13XX_ATUE_PCSR_BUS_NUM_MASK (0xff) +#define IOP13XX_ATUE_PCSR_DEV_NUM_MASK (0x1f) +#define IOP13XX_ATUE_PCSR_FUNC_NUM_MASK (0x7) + +#define IOP13XX_ATUE_PCSR_CORE_RESET (8) +#define IOP13XX_ATUE_PCSR_FUNC_NUM (16) + +#define IOP13XX_ATUE_LSTS_TRAINING (1 << 11) +#define IOP13XX_ATUE_STAT_SLOT_PWR_MSG (1 << 28) +#define IOP13XX_ATUE_STAT_PME (1 << 27) +#define IOP13XX_ATUE_STAT_HOT_PLUG_MSG (1 << 26) +#define IOP13XX_ATUE_STAT_IVM (1 << 25) +#define IOP13XX_ATUE_STAT_BIST (1 << 24) +#define IOP13XX_ATUE_STAT_CFG_WRITE (1 << 18) +#define IOP13XX_ATUE_STAT_VPD_ADDR (1 << 17) +#define IOP13XX_ATUE_STAT_POWER_TRAN (1 << 16) +#define IOP13XX_ATUE_STAT_HALT_ON_ERROR (1 << 13) +#define IOP13XX_ATUE_STAT_ROOT_SYS_ERR (1 << 12) +#define IOP13XX_ATUE_STAT_ROOT_ERR_MSG (1 << 11) +#define IOP13XX_ATUE_STAT_PCI_IFACE_ERR (1 << 10) +#define IOP13XX_ATUE_STAT_ERR_COR (1 << 9 ) +#define IOP13XX_ATUE_STAT_ERR_UNCOR (1 << 8 ) +#define IOP13XX_ATUE_STAT_CRS (1 << 7 ) +#define IOP13XX_ATUE_STAT_LNK_DWN (1 << 6 ) +#define IOP13XX_ATUE_STAT_INT_REC_MABORT (1 << 5 ) +#define IOP13XX_ATUE_STAT_DET_PAR_ERR (1 << 4 ) +#define IOP13XX_ATUE_STAT_EXT_REC_MABORT (1 << 3 ) +#define IOP13XX_ATUE_STAT_SIG_TABORT (1 << 2 ) +#define IOP13XX_ATUE_STAT_EXT_REC_TABORT (1 << 1 ) +#define IOP13XX_ATUE_STAT_MASTER_DATA_PAR (1 << 0 ) + +#define IOP13XX_ATUE_ESTAT_REC_UNSUPPORTED_COMP_REQ (1 << 31) +#define IOP13XX_ATUE_ESTAT_REC_COMPLETER_ABORT (1 << 30) +#define IOP13XX_ATUE_ESTAT_TX_POISONED_TLP (1 << 29) +#define IOP13XX_ATUE_ESTAT_TX_PAR_ERR (1 << 28) +#define IOP13XX_ATUE_ESTAT_REC_UNSUPPORTED_REQ (1 << 20) +#define IOP13XX_ATUE_ESTAT_REC_ECRC_ERR (1 << 19) +#define IOP13XX_ATUE_ESTAT_REC_MALFORMED_TLP (1 << 18) +#define IOP13XX_ATUE_ESTAT_TX_RECEIVER_OVERFLOW (1 << 17) +#define IOP13XX_ATUE_ESTAT_REC_UNEXPECTED_COMP (1 << 16) +#define IOP13XX_ATUE_ESTAT_INT_COMP_ABORT (1 << 15) +#define IOP13XX_ATUE_ESTAT_COMP_TIMEOUT (1 << 14) +#define IOP13XX_ATUE_ESTAT_FLOW_CONTROL_ERR (1 << 13) +#define IOP13XX_ATUE_ESTAT_REC_POISONED_TLP (1 << 12) +#define IOP13XX_ATUE_ESTAT_DATA_LNK_ERR (1 << 4 ) +#define IOP13XX_ATUE_ESTAT_TRAINING_ERR (1 << 0 ) + +#define IOP13XX_ATUE_IALR_DISABLE (0x00000001) +#define IOP13XX_ATUE_OUMBAR_ENABLE (0x80000000) +#define IOP13XX_ATU_OUMBAR_FUNC_NUM (28) +#define IOP13XX_ATU_OUMBAR_FUNC_NUM_MASK (0x7) +/*=======================================================================*/ + +/*==============================ADMA UNITS===============================*/ +#define IOP13XX_ADMA_PHYS_BASE(chan) IOP13XX_REG_ADDR32_PHYS((chan << 9)) +#define IOP13XX_ADMA_UPPER_PA(chan) (IOP13XX_ADMA_PHYS_BASE(chan) + 0xc0) +#define IOP13XX_ADMA_OFFSET(chan, ofs) IOP13XX_REG_ADDR32((chan << 9) + (ofs)) + +#define IOP13XX_ADMA_ACCR(chan) IOP13XX_ADMA_OFFSET(chan, 0x0) +#define IOP13XX_ADMA_ACSR(chan) IOP13XX_ADMA_OFFSET(chan, 0x4) +#define IOP13XX_ADMA_ADAR(chan) IOP13XX_ADMA_OFFSET(chan, 0x8) +#define IOP13XX_ADMA_IIPCR(chan) IOP13XX_ADMA_OFFSET(chan, 0x18) +#define IOP13XX_ADMA_IIPAR(chan) IOP13XX_ADMA_OFFSET(chan, 0x1c) +#define IOP13XX_ADMA_IIPUAR(chan) IOP13XX_ADMA_OFFSET(chan, 0x20) +#define IOP13XX_ADMA_ANDAR(chan) IOP13XX_ADMA_OFFSET(chan, 0x24) +#define IOP13XX_ADMA_ADCR(chan) IOP13XX_ADMA_OFFSET(chan, 0x28) +#define IOP13XX_ADMA_CARMD(chan) IOP13XX_ADMA_OFFSET(chan, 0x2c) +#define IOP13XX_ADMA_ABCR(chan) IOP13XX_ADMA_OFFSET(chan, 0x30) +#define IOP13XX_ADMA_DLADR(chan) IOP13XX_ADMA_OFFSET(chan, 0x34) +#define IOP13XX_ADMA_DUADR(chan) IOP13XX_ADMA_OFFSET(chan, 0x38) +#define IOP13XX_ADMA_SLAR(src, chan) IOP13XX_ADMA_OFFSET(chan, 0x3c + (src <<3)) +#define IOP13XX_ADMA_SUAR(src, chan) IOP13XX_ADMA_OFFSET(chan, 0x40 + (src <<3)) + +/*==============================XSI BRIDGE===============================*/ +#define IOP13XX_XBG_BECSR IOP13XX_REG_ADDR32(0x178c) +#define IOP13XX_XBG_BERAR IOP13XX_REG_ADDR32(0x1790) +#define IOP13XX_XBG_BERUAR IOP13XX_REG_ADDR32(0x1794) +#define is_atue_occdr_error(x) ((__raw_readl(IOP13XX_XBG_BERAR) == \ + IOP13XX_PMMR_VIRT_TO_PHYS(\ + IOP13XX_ATUE_OCCDR))\ + && (__raw_readl(IOP13XX_XBG_BECSR) & 1)) +#define is_atux_occdr_error(x) ((__raw_readl(IOP13XX_XBG_BERAR) == \ + IOP13XX_PMMR_VIRT_TO_PHYS(\ + IOP13XX_ATUX_OCCDR))\ + && (__raw_readl(IOP13XX_XBG_BECSR) & 1)) +/*=======================================================================*/ + +#define IOP13XX_PBI_OFFSET(ofs) IOP13XX_REG_ADDR32(IOP13XX_PBI_PMMR_OFFSET +\ + (ofs)) + +#define IOP13XX_PBI_CR IOP13XX_PBI_OFFSET(0x0) +#define IOP13XX_PBI_SR IOP13XX_PBI_OFFSET(0x4) +#define IOP13XX_PBI_BAR0 IOP13XX_PBI_OFFSET(0x8) +#define IOP13XX_PBI_LR0 IOP13XX_PBI_OFFSET(0xc) +#define IOP13XX_PBI_BAR1 IOP13XX_PBI_OFFSET(0x10) +#define IOP13XX_PBI_LR1 IOP13XX_PBI_OFFSET(0x14) + +#define IOP13XX_TMR_TC 0x01 +#define IOP13XX_TMR_EN 0x02 +#define IOP13XX_TMR_RELOAD 0x04 +#define IOP13XX_TMR_PRIVILEGED 0x08 + +#define IOP13XX_TMR_RATIO_1_1 0x00 +#define IOP13XX_TMR_RATIO_4_1 0x10 +#define IOP13XX_TMR_RATIO_8_1 0x20 +#define IOP13XX_TMR_RATIO_16_1 0x30 + +#endif /* _IOP13XX_HW_H_ */ diff --git a/include/asm-arm/arch-iop13xx/iq81340.h b/include/asm-arm/arch-iop13xx/iq81340.h new file mode 100644 index 00000000000..ba2cf931e9c --- /dev/null +++ b/include/asm-arm/arch-iop13xx/iq81340.h @@ -0,0 +1,28 @@ +#ifndef _IQ81340_H_ +#define _IQ81340_H_ + +#define IQ81340_PCE_BAR0 IOP13XX_PBI_LOWER_MEM_RA +#define IQ81340_PCE_BAR1 (IQ81340_PCE_BAR0 + 0x02000000) + +#define IQ81340_FLASHBASE IQ81340_PCE_BAR0 /* Flash */ + +#define IQ81340_PCE_BAR1_OFFSET(a) (IQ81340_PCE_BAR1 + (a)) + +#define IQ81340_PRD_CODE IQ81340_PCE_BAR1_OFFSET(0) +#define IQ81340_BRD_STEP IQ81340_PCE_BAR1_OFFSET(0x10000) +#define IQ81340_CPLD_REV IQ81340_PCE_BAR1_OFFSET(0x20000) +#define IQ81340_LED IQ81340_PCE_BAR1_OFFSET(0x30000) +#define IQ81340_LHEX IQ81340_PCE_BAR1_OFFSET(0x40000) +#define IQ81340_RHEX IQ81340_PCE_BAR1_OFFSET(0x50000) +#define IQ81340_BUZZER IQ81340_PCE_BAR1_OFFSET(0x60000) +#define IQ81340_32K_NVRAM IQ81340_PCE_BAR1_OFFSET(0x70000) +#define IQ81340_256K_NVRAM IQ81340_PCE_BAR1_OFFSET(0x80000) +#define IQ81340_ROTARY_SW IQ81340_PCE_BAR1_OFFSET(0xd0000) +#define IQ81340_BATT_STAT IQ81340_PCE_BAR1_OFFSET(0xf0000) +#define IQ81340_CMP_FLSH IQ81340_PCE_BAR1_OFFSET(0x1000000) /* 16MB */ + +#define PBI_CF_IDE_BASE (IQ81340_CMP_FLSH) +#define PBI_CF_BAR_ADDR (IOP13XX_PBI_BAR1) + + +#endif /* _IQ81340_H_ */ diff --git a/include/asm-arm/arch-iop13xx/irqs.h b/include/asm-arm/arch-iop13xx/irqs.h new file mode 100644 index 00000000000..442e35a4035 --- /dev/null +++ b/include/asm-arm/arch-iop13xx/irqs.h @@ -0,0 +1,207 @@ +#ifndef _IOP13XX_IRQS_H_ +#define _IOP13XX_IRQS_H_ + +#ifndef __ASSEMBLER__ +#include <linux/types.h> +#include <asm/system.h> /* local_irq_save */ +#include <asm/arch/iop13xx.h> /* iop13xx_cp6_* */ + +/* INTPND0 CP6 R0 Page 3 + */ +static inline u32 read_intpnd_0(void) +{ + u32 val; + asm volatile("mrc p6, 0, %0, c0, c3, 0":"=r" (val)); + return val; +} + +/* INTPND1 CP6 R1 Page 3 + */ +static inline u32 read_intpnd_1(void) +{ + u32 val; + asm volatile("mrc p6, 0, %0, c1, c3, 0":"=r" (val)); + return val; +} + +/* INTPND2 CP6 R2 Page 3 + */ +static inline u32 read_intpnd_2(void) +{ + u32 val; + asm volatile("mrc p6, 0, %0, c2, c3, 0":"=r" (val)); + return val; +} + +/* INTPND3 CP6 R3 Page 3 + */ +static inline u32 read_intpnd_3(void) +{ + u32 val; + asm volatile("mrc p6, 0, %0, c3, c3, 0":"=r" (val)); + return val; +} + +static inline void +iop13xx_cp6_enable_irq_save(unsigned long *cp_flags, unsigned long *irq_flags) +{ + local_irq_save(*irq_flags); + *cp_flags = iop13xx_cp6_save(); +} + +static inline void +iop13xx_cp6_irq_restore(unsigned long *cp_flags, + unsigned long *irq_flags) +{ + iop13xx_cp6_restore(*cp_flags); + local_irq_restore(*irq_flags); +} +#endif + +#define INTBASE 0 +#define INTSIZE_4 1 + +/* + * iop34x chipset interrupts + */ +#define IOP13XX_IRQ(x) (IOP13XX_IRQ_OFS + (x)) + +/* + * On IRQ or FIQ register + */ +#define IRQ_IOP13XX_ADMA0_EOT (0) +#define IRQ_IOP13XX_ADMA0_EOC (1) +#define IRQ_IOP13XX_ADMA1_EOT (2) +#define IRQ_IOP13XX_ADMA1_EOC (3) +#define IRQ_IOP13XX_ADMA2_EOT (4) +#define IRQ_IOP13XX_ADMA2_EOC (5) +#define IRQ_IOP134_WATCHDOG (6) +#define IRQ_IOP13XX_RSVD_7 (7) +#define IRQ_IOP13XX_TIMER0 (8) +#define IRQ_IOP13XX_TIMER1 (9) +#define IRQ_IOP13XX_I2C_0 (10) +#define IRQ_IOP13XX_I2C_1 (11) +#define IRQ_IOP13XX_MSG (12) +#define IRQ_IOP13XX_MSGIBQ (13) +#define IRQ_IOP13XX_ATU_IM (14) +#define IRQ_IOP13XX_ATU_BIST (15) +#define IRQ_IOP13XX_PPMU (16) +#define IRQ_IOP13XX_COREPMU (17) +#define IRQ_IOP13XX_CORECACHE (18) +#define IRQ_IOP13XX_RSVD_19 (19) +#define IRQ_IOP13XX_RSVD_20 (20) +#define IRQ_IOP13XX_RSVD_21 (21) +#define IRQ_IOP13XX_RSVD_22 (22) +#define IRQ_IOP13XX_RSVD_23 (23) +#define IRQ_IOP13XX_XINT0 (24) +#define IRQ_IOP13XX_XINT1 (25) +#define IRQ_IOP13XX_XINT2 (26) +#define IRQ_IOP13XX_XINT3 (27) +#define IRQ_IOP13XX_XINT4 (28) +#define IRQ_IOP13XX_XINT5 (29) +#define IRQ_IOP13XX_XINT6 (30) +#define IRQ_IOP13XX_XINT7 (31) + /* IINTSRC1 bit */ +#define IRQ_IOP13XX_XINT8 (32) /* 0 */ +#define IRQ_IOP13XX_XINT9 (33) /* 1 */ +#define IRQ_IOP13XX_XINT10 (34) /* 2 */ +#define IRQ_IOP13XX_XINT11 (35) /* 3 */ +#define IRQ_IOP13XX_XINT12 (36) /* 4 */ +#define IRQ_IOP13XX_XINT13 (37) /* 5 */ +#define IRQ_IOP13XX_XINT14 (38) /* 6 */ +#define IRQ_IOP13XX_XINT15 (39) /* 7 */ +#define IRQ_IOP13XX_RSVD_40 (40) /* 8 */ +#define IRQ_IOP13XX_RSVD_41 (41) /* 9 */ +#define IRQ_IOP13XX_RSVD_42 (42) /* 10 */ +#define IRQ_IOP13XX_RSVD_43 (43) /* 11 */ +#define IRQ_IOP13XX_RSVD_44 (44) /* 12 */ +#define IRQ_IOP13XX_RSVD_45 (45) /* 13 */ +#define IRQ_IOP13XX_RSVD_46 (46) /* 14 */ +#define IRQ_IOP13XX_RSVD_47 (47) /* 15 */ +#define IRQ_IOP13XX_RSVD_48 (48) /* 16 */ +#define IRQ_IOP13XX_RSVD_49 (49) /* 17 */ +#define IRQ_IOP13XX_RSVD_50 (50) /* 18 */ +#define IRQ_IOP13XX_UART0 (51) /* 19 */ +#define IRQ_IOP13XX_UART1 (52) /* 20 */ +#define IRQ_IOP13XX_PBIE (53) /* 21 */ +#define IRQ_IOP13XX_ATU_CRW (54) /* 22 */ +#define IRQ_IOP13XX_ATU_ERR (55) /* 23 */ +#define IRQ_IOP13XX_MCU_ERR (56) /* 24 */ +#define IRQ_IOP13XX_ADMA0_ERR (57) /* 25 */ +#define IRQ_IOP13XX_ADMA1_ERR (58) /* 26 */ +#define IRQ_IOP13XX_ADMA2_ERR (59) /* 27 */ +#define IRQ_IOP13XX_RSVD_60 (60) /* 28 */ +#define IRQ_IOP13XX_RSVD_61 (61) /* 29 */ +#define IRQ_IOP13XX_MSG_ERR (62) /* 30 */ +#define IRQ_IOP13XX_RSVD_63 (63) /* 31 */ + /* IINTSRC2 bit */ +#define IRQ_IOP13XX_INTERPROC (64) /* 0 */ +#define IRQ_IOP13XX_RSVD_65 (65) /* 1 */ +#define IRQ_IOP13XX_RSVD_66 (66) /* 2 */ +#define IRQ_IOP13XX_RSVD_67 (67) /* 3 */ +#define IRQ_IOP13XX_RSVD_68 (68) /* 4 */ +#define IRQ_IOP13XX_RSVD_69 (69) /* 5 */ +#define IRQ_IOP13XX_RSVD_70 (70) /* 6 */ +#define IRQ_IOP13XX_RSVD_71 (71) /* 7 */ +#define IRQ_IOP13XX_RSVD_72 (72) /* 8 */ +#define IRQ_IOP13XX_RSVD_73 (73) /* 9 */ +#define IRQ_IOP13XX_RSVD_74 (74) /* 10 */ +#define IRQ_IOP13XX_RSVD_75 (75) /* 11 */ +#define IRQ_IOP13XX_RSVD_76 (76) /* 12 */ +#define IRQ_IOP13XX_RSVD_77 (77) /* 13 */ +#define IRQ_IOP13XX_RSVD_78 (78) /* 14 */ +#define IRQ_IOP13XX_RSVD_79 (79) /* 15 */ +#define IRQ_IOP13XX_RSVD_80 (80) /* 16 */ +#define IRQ_IOP13XX_RSVD_81 (81) /* 17 */ +#define IRQ_IOP13XX_RSVD_82 (82) /* 18 */ +#define IRQ_IOP13XX_RSVD_83 (83) /* 19 */ +#define IRQ_IOP13XX_RSVD_84 (84) /* 20 */ +#define IRQ_IOP13XX_RSVD_85 (85) /* 21 */ +#define IRQ_IOP13XX_RSVD_86 (86) /* 22 */ +#define IRQ_IOP13XX_RSVD_87 (87) /* 23 */ +#define IRQ_IOP13XX_RSVD_88 (88) /* 24 */ +#define IRQ_IOP13XX_RSVD_89 (89) /* 25 */ +#define IRQ_IOP13XX_RSVD_90 (90) /* 26 */ +#define IRQ_IOP13XX_RSVD_91 (91) /* 27 */ +#define IRQ_IOP13XX_RSVD_92 (92) /* 28 */ +#define IRQ_IOP13XX_RSVD_93 (93) /* 29 */ +#define IRQ_IOP13XX_SIB_ERR (94) /* 30 */ +#define IRQ_IOP13XX_SRAM_ERR (95) /* 31 */ + /* IINTSRC3 bit */ +#define IRQ_IOP13XX_I2C_2 (96) /* 0 */ +#define IRQ_IOP13XX_ATUE_BIST (97) /* 1 */ +#define IRQ_IOP13XX_ATUE_CRW (98) /* 2 */ +#define IRQ_IOP13XX_ATUE_ERR (99) /* 3 */ +#define IRQ_IOP13XX_IMU (100) /* 4 */ +#define IRQ_IOP13XX_RSVD_101 (101) /* 5 */ +#define IRQ_IOP13XX_RSVD_102 (102) /* 6 */ +#define IRQ_IOP13XX_TPMI0_OUT (103) /* 7 */ +#define IRQ_IOP13XX_TPMI1_OUT (104) /* 8 */ +#define IRQ_IOP13XX_TPMI2_OUT (105) /* 9 */ +#define IRQ_IOP13XX_TPMI3_OUT (106) /* 10 */ +#define IRQ_IOP13XX_ATUE_IMA (107) /* 11 */ +#define IRQ_IOP13XX_ATUE_IMB (108) /* 12 */ +#define IRQ_IOP13XX_ATUE_IMC (109) /* 13 */ +#define IRQ_IOP13XX_ATUE_IMD (110) /* 14 */ +#define IRQ_IOP13XX_MU_MSI_TB (111) /* 15 */ +#define IRQ_IOP13XX_RSVD_112 (112) /* 16 */ +#define IRQ_IOP13XX_RSVD_113 (113) /* 17 */ +#define IRQ_IOP13XX_RSVD_114 (114) /* 18 */ +#define IRQ_IOP13XX_RSVD_115 (115) /* 19 */ +#define IRQ_IOP13XX_RSVD_116 (116) /* 20 */ +#define IRQ_IOP13XX_RSVD_117 (117) /* 21 */ +#define IRQ_IOP13XX_RSVD_118 (118) /* 22 */ +#define IRQ_IOP13XX_RSVD_119 (119) /* 23 */ +#define IRQ_IOP13XX_RSVD_120 (120) /* 24 */ +#define IRQ_IOP13XX_RSVD_121 (121) /* 25 */ +#define IRQ_IOP13XX_RSVD_122 (122) /* 26 */ +#define IRQ_IOP13XX_RSVD_123 (123) /* 27 */ +#define IRQ_IOP13XX_RSVD_124 (124) /* 28 */ +#define IRQ_IOP13XX_RSVD_125 (125) /* 29 */ +#define IRQ_IOP13XX_RSVD_126 (126) /* 30 */ +#define IRQ_IOP13XX_HPI (127) /* 31 */ + +#define NR_IOP13XX_IRQS (IRQ_IOP13XX_HPI + 1) +#define NR_IRQS NR_IOP13XX_IRQS + +#endif /* _IOP13XX_IRQ_H_ */ diff --git a/include/asm-arm/arch-iop13xx/memory.h b/include/asm-arm/arch-iop13xx/memory.h new file mode 100644 index 00000000000..031a0fa78ef --- /dev/null +++ b/include/asm-arm/arch-iop13xx/memory.h @@ -0,0 +1,64 @@ +#ifndef __ASM_ARCH_MEMORY_H +#define __ASM_ARCH_MEMORY_H + +#include <asm/arch/hardware.h> + +/* + * Physical DRAM offset. + */ +#define PHYS_OFFSET UL(0x00000000) +#define TASK_SIZE UL(0x3f000000) +#define PAGE_OFFSET UL(0x40000000) +#define TASK_UNMAPPED_BASE ((TASK_SIZE + 0x01000000) / 3) + +#ifndef __ASSEMBLY__ + +#if defined(CONFIG_ARCH_IOP13XX) +#define IOP13XX_PMMR_V_START (IOP13XX_PMMR_VIRT_MEM_BASE) +#define IOP13XX_PMMR_V_END (IOP13XX_PMMR_VIRT_MEM_BASE + IOP13XX_PMMR_SIZE) +#define IOP13XX_PMMR_P_START (IOP13XX_PMMR_PHYS_MEM_BASE) +#define IOP13XX_PMMR_P_END (IOP13XX_PMMR_PHYS_MEM_BASE + IOP13XX_PMMR_SIZE) + +/* + * Virtual view <-> PCI DMA view memory address translations + * virt_to_bus: Used to translate the virtual address to an + * address suitable to be passed to set_dma_addr + * bus_to_virt: Used to convert an address for DMA operations + * to an address that the kernel can use. + */ + +/* RAM has 1:1 mapping on the PCIe/x Busses */ +#define __virt_to_bus(x) (__virt_to_phys(x)) +#define __bus_to_virt(x) (__phys_to_virt(x)) + +#define virt_to_lbus(x) \ +(( ((void*)(x) >= (void*)IOP13XX_PMMR_V_START) && \ +((void*)(x) < (void*)IOP13XX_PMMR_V_END) ) ? \ +((x) - IOP13XX_PMMR_VIRT_MEM_BASE + IOP13XX_PMMR_PHYS_MEM_BASE) : \ +((x) - PAGE_OFFSET + PHYS_OFFSET)) + +#define lbus_to_virt(x) \ +(( ((x) >= IOP13XX_PMMR_P_START) && ((x) < IOP13XX_PMMR_P_END) ) ? \ +((x) - IOP13XX_PMMR_PHYS_MEM_BASE + IOP13XX_PMMR_VIRT_MEM_BASE ) : \ +((x) - PHYS_OFFSET + PAGE_OFFSET)) + +/* Device is an lbus device if it is on the platform bus of the IOP13XX */ +#define is_lbus_device(dev) (dev &&\ + (strncmp(dev->bus->name, "platform", 8) == 0)) + +#define __arch_page_to_dma(dev, page) \ +({is_lbus_device(dev) ? (dma_addr_t)virt_to_lbus(page_address(page)) : \ +(dma_addr_t)__virt_to_bus(page_address(page));}) + +#define __arch_dma_to_virt(dev, addr) \ +({is_lbus_device(dev) ? lbus_to_virt(addr) : __bus_to_virt(addr);}) + +#define __arch_virt_to_dma(dev, addr) \ +({is_lbus_device(dev) ? virt_to_lbus(addr) : __virt_to_bus(addr);}) + +#endif /* CONFIG_ARCH_IOP13XX */ +#endif /* !ASSEMBLY */ + +#define PFN_TO_NID(addr) (0) + +#endif diff --git a/include/asm-arm/arch-iop13xx/pci.h b/include/asm-arm/arch-iop13xx/pci.h new file mode 100644 index 00000000000..4041f30d4cd --- /dev/null +++ b/include/asm-arm/arch-iop13xx/pci.h @@ -0,0 +1,57 @@ +#ifndef _IOP13XX_PCI_H_ +#define _IOP13XX_PCI_H_ +#include <asm/arch/irqs.h> +#include <asm/io.h> + +struct pci_sys_data; +struct hw_pci; +int iop13xx_pci_setup(int nr, struct pci_sys_data *sys); +struct pci_bus *iop13xx_scan_bus(int nr, struct pci_sys_data *); +void iop13xx_atu_select(struct hw_pci *plat_pci); +void iop13xx_pci_init(void); +void iop13xx_map_pci_memory(void); + +#define IOP_PCI_STATUS_ERROR (PCI_STATUS_PARITY | \ + PCI_STATUS_SIG_TARGET_ABORT | \ + PCI_STATUS_REC_TARGET_ABORT | \ + PCI_STATUS_REC_TARGET_ABORT | \ + PCI_STATUS_REC_MASTER_ABORT | \ + PCI_STATUS_SIG_SYSTEM_ERROR | \ + PCI_STATUS_DETECTED_PARITY) + +#define IOP13XX_ATUE_ATUISR_ERROR (IOP13XX_ATUE_STAT_HALT_ON_ERROR | \ + IOP13XX_ATUE_STAT_ROOT_SYS_ERR | \ + IOP13XX_ATUE_STAT_PCI_IFACE_ERR | \ + IOP13XX_ATUE_STAT_ERR_COR | \ + IOP13XX_ATUE_STAT_ERR_UNCOR | \ + IOP13XX_ATUE_STAT_CRS | \ + IOP13XX_ATUE_STAT_DET_PAR_ERR | \ + IOP13XX_ATUE_STAT_EXT_REC_MABORT | \ + IOP13XX_ATUE_STAT_SIG_TABORT | \ + IOP13XX_ATUE_STAT_EXT_REC_TABORT | \ + IOP13XX_ATUE_STAT_MASTER_DATA_PAR) + +#define IOP13XX_ATUX_ATUISR_ERROR (IOP13XX_ATUX_STAT_TX_SCEM | \ + IOP13XX_ATUX_STAT_REC_SCEM | \ + IOP13XX_ATUX_STAT_TX_SERR | \ + IOP13XX_ATUX_STAT_DET_PAR_ERR | \ + IOP13XX_ATUX_STAT_INT_REC_MABORT | \ + IOP13XX_ATUX_STAT_REC_SERR | \ + IOP13XX_ATUX_STAT_EXT_REC_MABORT | \ + IOP13XX_ATUX_STAT_EXT_REC_TABORT | \ + IOP13XX_ATUX_STAT_EXT_SIG_TABORT | \ + IOP13XX_ATUX_STAT_MASTER_DATA_PAR) + +/* PCI interrupts + */ +#define ATUX_INTA IRQ_IOP13XX_XINT0 +#define ATUX_INTB IRQ_IOP13XX_XINT1 +#define ATUX_INTC IRQ_IOP13XX_XINT2 +#define ATUX_INTD IRQ_IOP13XX_XINT3 + +#define ATUE_INTA IRQ_IOP13XX_ATUE_IMA +#define ATUE_INTB IRQ_IOP13XX_ATUE_IMB +#define ATUE_INTC IRQ_IOP13XX_ATUE_IMC +#define ATUE_INTD IRQ_IOP13XX_ATUE_IMD + +#endif /* _IOP13XX_PCI_H_ */ diff --git a/include/asm-arm/arch-iop13xx/system.h b/include/asm-arm/arch-iop13xx/system.h new file mode 100644 index 00000000000..ee3a62530af --- /dev/null +++ b/include/asm-arm/arch-iop13xx/system.h @@ -0,0 +1,59 @@ +/* + * linux/include/asm-arm/arch-iop13xx/system.h + * + * Copyright (C) 2004 Intel Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include <asm/arch/iop13xx.h> +static inline void arch_idle(void) +{ + cpu_do_idle(); +} + +/* WDTCR CP6 R7 Page 9 */ +static inline u32 read_wdtcr(void) +{ + u32 val; + asm volatile("mrc p6, 0, %0, c7, c9, 0":"=r" (val)); + return val; +} +static inline void write_wdtcr(u32 val) +{ + asm volatile("mcr p6, 0, %0, c7, c9, 0"::"r" (val)); +} + +/* WDTSR CP6 R8 Page 9 */ +static inline u32 read_wdtsr(void) +{ + u32 val; + asm volatile("mrc p6, 0, %0, c8, c9, 0":"=r" (val)); + return val; +} +static inline void write_wdtsr(u32 val) +{ + asm volatile("mcr p6, 0, %0, c8, c9, 0"::"r" (val)); +} + +#define IOP13XX_WDTCR_EN_ARM 0x1e1e1e1e +#define IOP13XX_WDTCR_EN 0xe1e1e1e1 +#define IOP13XX_WDTCR_DIS_ARM 0x1f1f1f1f +#define IOP13XX_WDTCR_DIS 0xf1f1f1f1 +#define IOP13XX_WDTSR_WRITE_EN (1 << 31) +#define IOP13XX_WDTCR_IB_RESET (1 << 0) +static inline void arch_reset(char mode) +{ + /* + * Reset the internal bus (warning both cores are reset) + */ + u32 cp_flags = iop13xx_cp6_save(); + write_wdtcr(IOP13XX_WDTCR_EN_ARM); + write_wdtcr(IOP13XX_WDTCR_EN); + write_wdtsr(IOP13XX_WDTSR_WRITE_EN | IOP13XX_WDTCR_IB_RESET); + write_wdtcr(0x1000); + iop13xx_cp6_restore(cp_flags); + + for(;;); +} diff --git a/include/asm-arm/arch-iop13xx/timex.h b/include/asm-arm/arch-iop13xx/timex.h new file mode 100644 index 00000000000..f0c51dd97ed --- /dev/null +++ b/include/asm-arm/arch-iop13xx/timex.h @@ -0,0 +1,3 @@ +#include <asm/hardware.h> + +#define CLOCK_TICK_RATE (100 * HZ) diff --git a/include/asm-arm/arch-iop13xx/uncompress.h b/include/asm-arm/arch-iop13xx/uncompress.h new file mode 100644 index 00000000000..b9525d59b7a --- /dev/null +++ b/include/asm-arm/arch-iop13xx/uncompress.h @@ -0,0 +1,24 @@ +#include <asm/types.h> +#include <linux/serial_reg.h> +#include <asm/hardware.h> +#include <asm/processor.h> + +#define UART_BASE ((volatile u32 *)IOP13XX_UART1_PHYS) +#define TX_DONE (UART_LSR_TEMT | UART_LSR_THRE) + +static inline void putc(char c) +{ + while ((UART_BASE[UART_LSR] & TX_DONE) != TX_DONE) + cpu_relax(); + UART_BASE[UART_TX] = c; +} + +static inline void flush(void) +{ +} + +/* + * nothing to do + */ +#define arch_decomp_setup() +#define arch_decomp_wdog() diff --git a/include/asm-arm/arch-iop13xx/vmalloc.h b/include/asm-arm/arch-iop13xx/vmalloc.h new file mode 100644 index 00000000000..c5345674034 --- /dev/null +++ b/include/asm-arm/arch-iop13xx/vmalloc.h @@ -0,0 +1,4 @@ +#ifndef _VMALLOC_H_ +#define _VMALLOC_H_ +#define VMALLOC_END 0xfa000000UL +#endif diff --git a/include/asm-arm/arch-iop32x/iop32x.h b/include/asm-arm/arch-iop32x/iop32x.h index 4bbd85f3ed2..2e9469047eb 100644 --- a/include/asm-arm/arch-iop32x/iop32x.h +++ b/include/asm-arm/arch-iop32x/iop32x.h @@ -19,7 +19,7 @@ * Peripherals that are shared between the iop32x and iop33x but * located at different addresses. */ -#define IOP3XX_GPIO_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07c0 + (reg)) +#define IOP3XX_GPIO_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07c4 + (reg)) #define IOP3XX_TIMER_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07e0 + (reg)) #include <asm/hardware/iop3xx.h> diff --git a/include/asm-arm/arch-ixp23xx/memory.h b/include/asm-arm/arch-ixp23xx/memory.h index c85fc06a043..6d859d742d7 100644 --- a/include/asm-arm/arch-ixp23xx/memory.h +++ b/include/asm-arm/arch-ixp23xx/memory.h @@ -41,21 +41,7 @@ data = *((volatile int *)IXP23XX_PCI_SDRAM_BAR); \ __phys_to_virt((((b - (data & 0xfffffff0)) + 0x00000000))); }) -/* - * Coherency support. Only supported on A2 CPUs or on A1 - * systems that have the cache coherency workaround. - */ -static inline int __ixp23xx_arch_is_coherent(void) -{ - extern unsigned int processor_id; - - if (((processor_id & 15) >= 4) || machine_is_roadrunner()) - return 1; - - return 0; -} - -#define arch_is_coherent() __ixp23xx_arch_is_coherent() +#define arch_is_coherent() 1 #endif diff --git a/include/asm-arm/arch-ixp4xx/nslu2.h b/include/asm-arm/arch-ixp4xx/nslu2.h index 4281838873e..6b437f7c995 100644 --- a/include/asm-arm/arch-ixp4xx/nslu2.h +++ b/include/asm-arm/arch-ixp4xx/nslu2.h @@ -76,6 +76,7 @@ #define NSLU2_GPIO_BUZZ 4 #define NSLU2_BZ_BM (1L << NSLU2_GPIO_BUZZ) + /* LEDs */ #define NSLU2_LED_RED NSLU2_GPIO0 @@ -84,8 +85,8 @@ #define NSLU2_LED_RED_BM (1L << NSLU2_LED_RED) #define NSLU2_LED_GRN_BM (1L << NSLU2_LED_GRN) -#define NSLU2_LED_DISK1 NSLU2_GPIO2 -#define NSLU2_LED_DISK2 NSLU2_GPIO3 +#define NSLU2_LED_DISK1 NSLU2_GPIO3 +#define NSLU2_LED_DISK2 NSLU2_GPIO2 #define NSLU2_LED_DISK1_BM (1L << NSLU2_GPIO2) #define NSLU2_LED_DISK2_BM (1L << NSLU2_GPIO3) diff --git a/include/asm-arm/arch-ixp4xx/platform.h b/include/asm-arm/arch-ixp4xx/platform.h index 8d10a918769..ab194e5f665 100644 --- a/include/asm-arm/arch-ixp4xx/platform.h +++ b/include/asm-arm/arch-ixp4xx/platform.h @@ -86,6 +86,19 @@ struct ixp4xx_i2c_pins { unsigned long scl_pin; }; +/* + * This structure provide a means for the board setup code + * to give information to th pata_ixp4xx driver. It is + * passed as platform_data. + */ +struct ixp4xx_pata_data { + volatile u32 *cs0_cfg; + volatile u32 *cs1_cfg; + unsigned long cs0_bits; + unsigned long cs1_bits; + void __iomem *cs0; + void __iomem *cs1; +}; struct sys_timer; diff --git a/include/asm-arm/arch-ixp4xx/udc.h b/include/asm-arm/arch-ixp4xx/udc.h new file mode 100644 index 00000000000..dbdec36ff0d --- /dev/null +++ b/include/asm-arm/arch-ixp4xx/udc.h @@ -0,0 +1,8 @@ +/* + * linux/include/asm-arm/arch-ixp4xx/udc.h + * + */ +#include <asm/mach/udc_pxa2xx.h> + +extern void ixp4xx_set_udc_info(struct pxa2xx_udc_mach_info *info); + diff --git a/include/asm-arm/arch-l7200/io.h b/include/asm-arm/arch-l7200/io.h index d744d97c18a..645dbdfb390 100644 --- a/include/asm-arm/arch-l7200/io.h +++ b/include/asm-arm/arch-l7200/io.h @@ -17,59 +17,11 @@ /* * There are not real ISA nor PCI buses, so we fake it. */ -#define __io_pci(a) ((void __iomem *)(PCIO_BASE + (a))) -#define __mem_pci(a) (a) - -#define __ioaddr(p) __io_pci(p) - -/* - * Generic virtual read/write - */ -#define __arch_getb(a) (*(volatile unsigned char *)(a)) -#define __arch_getl(a) (*(volatile unsigned int *)(a)) - -static inline unsigned int __arch_getw(unsigned long a) -{ - unsigned int value; - __asm__ __volatile__("ldrh %0, [%1, #0] @ getw" - : "=&r" (value) - : "r" (a) : "cc"); - return value; -} - -#define __arch_putb(v,a) (*(volatile unsigned char *)(a) = (v)) -#define __arch_putl(v,a) (*(volatile unsigned int *)(a) = (v)) - -static inline void __arch_putw(unsigned int value, unsigned long a) +static inline void __iomem *__io(unsigned long addr) { - __asm__ __volatile__("strh %0, [%1, #0] @ putw" - : : "r" (value), "r" (a) : "cc"); + return (void __iomem *)addr; } - -/* - * Translated address IO functions - * - * IO address has already been translated to a virtual address - */ -#define outb_t(v,p) (*(volatile unsigned char *)(p) = (v)) -#define inb_t(p) (*(volatile unsigned char *)(p)) -#define outw_t(v,p) (*(volatile unsigned int *)(p) = (v)) -#define inw_t(p) (*(volatile unsigned int *)(p)) -#define outl_t(v,p) (*(volatile unsigned long *)(p) = (v)) -#define inl_t(p) (*(volatile unsigned long *)(p)) - -/* - * FIXME - These are to allow for linking. On all the other - * ARM platforms, the entire IO space is contiguous. - * The 7200 has three separate IO spaces. The below - * macros will eventually become more involved. Use - * with caution and don't be surprised by kernel oopses!!! - */ -#define inb(p) inb_t(p) -#define inw(p) inw_t(p) -#define inl(p) inl_t(p) -#define outb(v,p) outb_t(v,p) -#define outw(v,p) outw_t(v,p) -#define outl(v,p) outl_t(v,p) +#define __io(a) __io(a) +#define __mem_pci(a) (a) #endif diff --git a/include/asm-arm/arch-lh7a40x/memory.h b/include/asm-arm/arch-lh7a40x/memory.h index 9f1a58cbf40..9b0c8012e71 100644 --- a/include/asm-arm/arch-lh7a40x/memory.h +++ b/include/asm-arm/arch-lh7a40x/memory.h @@ -58,18 +58,6 @@ #endif /* - * Given a kaddr, ADDR_TO_MAPBASE finds the owning node of the memory - * and return the mem_map of that node. - */ -# define ADDR_TO_MAPBASE(kaddr) NODE_MEM_MAP(KVADDR_TO_NID(kaddr)) - -/* - * Given a page frame number, find the owning node of the memory - * and return the mem_map of that node. - */ -# define PFN_TO_MAPBASE(pfn) NODE_MEM_MAP(PFN_TO_NID(pfn)) - -/* * Given a kaddr, LOCAL_MEM_MAP finds the owning node of the memory * and returns the index corresponding to the appropriate page in the * node's mem_map. diff --git a/include/asm-arm/arch-omap/irda.h b/include/asm-arm/arch-omap/irda.h index 805ae3575e4..345a649ec83 100644 --- a/include/asm-arm/arch-omap/irda.h +++ b/include/asm-arm/arch-omap/irda.h @@ -24,7 +24,7 @@ struct omap_irda_config { /* Very specific to the needs of some platforms (h3,h4) * having calls which can sleep in irda_set_speed. */ - struct work_struct gpio_expa; + struct delayed_work gpio_expa; int rx_channel; int tx_channel; unsigned long dest_start; diff --git a/include/asm-arm/arch-pnx4008/i2c.h b/include/asm-arm/arch-pnx4008/i2c.h new file mode 100644 index 00000000000..92e8d65006f --- /dev/null +++ b/include/asm-arm/arch-pnx4008/i2c.h @@ -0,0 +1,67 @@ +/* + * PNX4008-specific tweaks for I2C IP3204 block + * + * Author: Vitaly Wool <vwool@ru.mvista.com> + * + * 2005 (c) MontaVista Software, Inc. This file is licensed under + * the terms of the GNU General Public License version 2. This program + * is licensed "as is" without any warranty of any kind, whether express + * or implied. + */ + +#ifndef __ASM_ARCH_I2C_H__ +#define __ASM_ARCH_I2C_H__ + +#include <linux/pm.h> +#include <linux/platform_device.h> + +enum { + mstatus_tdi = 0x00000001, + mstatus_afi = 0x00000002, + mstatus_nai = 0x00000004, + mstatus_drmi = 0x00000008, + mstatus_active = 0x00000020, + mstatus_scl = 0x00000040, + mstatus_sda = 0x00000080, + mstatus_rff = 0x00000100, + mstatus_rfe = 0x00000200, + mstatus_tff = 0x00000400, + mstatus_tfe = 0x00000800, +}; + +enum { + mcntrl_tdie = 0x00000001, + mcntrl_afie = 0x00000002, + mcntrl_naie = 0x00000004, + mcntrl_drmie = 0x00000008, + mcntrl_daie = 0x00000020, + mcntrl_rffie = 0x00000040, + mcntrl_tffie = 0x00000080, + mcntrl_reset = 0x00000100, + mcntrl_cdbmode = 0x00000400, +}; + +enum { + rw_bit = 1 << 0, + start_bit = 1 << 8, + stop_bit = 1 << 9, +}; + +#define I2C_REG_RX(a) ((a)->ioaddr) /* Rx FIFO reg (RO) */ +#define I2C_REG_TX(a) ((a)->ioaddr) /* Tx FIFO reg (WO) */ +#define I2C_REG_STS(a) ((a)->ioaddr + 0x04) /* Status reg (RO) */ +#define I2C_REG_CTL(a) ((a)->ioaddr + 0x08) /* Ctl reg */ +#define I2C_REG_CKL(a) ((a)->ioaddr + 0x0c) /* Clock divider low */ +#define I2C_REG_CKH(a) ((a)->ioaddr + 0x10) /* Clock divider high */ +#define I2C_REG_ADR(a) ((a)->ioaddr + 0x14) /* I2C address */ +#define I2C_REG_RFL(a) ((a)->ioaddr + 0x18) /* Rx FIFO level (RO) */ +#define I2C_REG_TFL(a) ((a)->ioaddr + 0x1c) /* Tx FIFO level (RO) */ +#define I2C_REG_RXB(a) ((a)->ioaddr + 0x20) /* Num of bytes Rx-ed (RO) */ +#define I2C_REG_TXB(a) ((a)->ioaddr + 0x24) /* Num of bytes Tx-ed (RO) */ +#define I2C_REG_TXS(a) ((a)->ioaddr + 0x28) /* Tx slave FIFO (RO) */ +#define I2C_REG_STFL(a) ((a)->ioaddr + 0x2c) /* Tx slave FIFO level (RO) */ + +#define HCLK_MHZ 13 +#define I2C_CHIP_NAME "PNX4008-I2C" + +#endif /* __ASM_ARCH_I2C_H___ */ diff --git a/include/asm-arm/arch-pxa/memory.h b/include/asm-arm/arch-pxa/memory.h index eaf6d43939e..e17f9881faf 100644 --- a/include/asm-arm/arch-pxa/memory.h +++ b/include/asm-arm/arch-pxa/memory.h @@ -27,7 +27,6 @@ #define __virt_to_bus(x) __virt_to_phys(x) #define __bus_to_virt(x) __phys_to_virt(x) -#ifdef CONFIG_DISCONTIGMEM /* * The nodes are matched with the physical SDRAM banks as follows: * @@ -35,38 +34,9 @@ * node 1: 0xa4000000-0xa7ffffff --> 0xc4000000-0xc7ffffff * node 2: 0xa8000000-0xabffffff --> 0xc8000000-0xcbffffff * node 3: 0xac000000-0xafffffff --> 0xcc000000-0xcfffffff + * + * This needs a node mem size of 26 bits. */ - -/* - * Given a kernel address, find the home node of the underlying memory. - */ -#define KVADDR_TO_NID(addr) (((unsigned long)(addr) - PAGE_OFFSET) >> 26) - -/* - * Given a page frame number, convert it to a node id. - */ -#define PFN_TO_NID(pfn) (((pfn) - PHYS_PFN_OFFSET) >> (26 - PAGE_SHIFT)) - -/* - * Given a kaddr, ADDR_TO_MAPBASE finds the owning node of the memory - * and returns the mem_map of that node. - */ -#define ADDR_TO_MAPBASE(kaddr) NODE_MEM_MAP(KVADDR_TO_NID(kaddr)) - -/* - * Given a page frame number, find the owning node of the memory - * and returns the mem_map of that node. - */ -#define PFN_TO_MAPBASE(pfn) NODE_MEM_MAP(PFN_TO_NID(pfn)) - -/* - * Given a kaddr, LOCAL_MEM_MAP finds the owning node of the memory - * and returns the index corresponding to the appropriate page in the - * node's mem_map. - */ -#define LOCAL_MAP_NR(addr) \ - (((unsigned long)(addr) & 0x03ffffff) >> PAGE_SHIFT) - -#endif +#define NODE_MEM_SIZE_BITS 26 #endif diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h index cff752f3523..e24f6b6c79a 100644 --- a/include/asm-arm/arch-pxa/pxa-regs.h +++ b/include/asm-arm/arch-pxa/pxa-regs.h @@ -99,7 +99,7 @@ #define DCSR_SETCMPST (1 << 25) /* Set Descriptor Compare Status */ #define DCSR_CLRCMPST (1 << 24) /* Clear Descriptor Compare Status */ #define DCSR_CMPST (1 << 10) /* The Descriptor Compare Status */ -#define DCSR_ENRINTR (1 << 9) /* The end of Receive */ +#define DCSR_EORINTR (1 << 9) /* The end of Receive */ #endif #define DCSR_REQPEND (1 << 8) /* Request Pending (read-only) */ #define DCSR_STOPSTATE (1 << 3) /* Stop State (read-only) */ @@ -803,12 +803,11 @@ #define UDCISR0 __REG(0x4060000C) /* UDC Interrupt Status Register 0 */ #define UDCISR1 __REG(0x40600010) /* UDC Interrupt Status Register 1 */ #define UDCISR_INT(n,intr) (((intr) & 0x03) << (((n) & 0x0F) * 2)) -#define UDCISR1_IECC (1 << 31) /* IntEn - Configuration Change */ -#define UDCISR1_IESOF (1 << 30) /* IntEn - Start of Frame */ -#define UDCISR1_IERU (1 << 29) /* IntEn - Resume */ -#define UDCISR1_IESU (1 << 28) /* IntEn - Suspend */ -#define UDCISR1_IERS (1 << 27) /* IntEn - Reset */ - +#define UDCISR1_IRCC (1 << 31) /* IntReq - Configuration Change */ +#define UDCISR1_IRSOF (1 << 30) /* IntReq - Start of Frame */ +#define UDCISR1_IRRU (1 << 29) /* IntReq - Resume */ +#define UDCISR1_IRSU (1 << 28) /* IntReq - Suspend */ +#define UDCISR1_IRRS (1 << 27) /* IntReq - Reset */ #define UDCFNR __REG(0x40600014) /* UDC Frame Number Register */ #define UDCOTGICR __REG(0x40600018) /* UDC On-The-Go interrupt control */ @@ -1627,7 +1626,7 @@ #define SSCR0_RIM (1 << 22) /* Receive FIFO overrrun interrupt mask */ #define SSCR0_TUM (1 << 23) /* Transmit FIFO underrun interrupt mask */ #define SSCR0_FRDC (0x07000000) /* Frame rate divider control (mask) */ -#define SSCR0_SlotsPerFrm(x) ((x) - 1) /* Time slots per frame [1..8] */ +#define SSCR0_SlotsPerFrm(x) (((x) - 1) << 24) /* Time slots per frame [1..8] */ #define SSCR0_ADC (1 << 30) /* Audio clock select */ #define SSCR0_MOD (1 << 31) /* Mode (normal or network) */ #endif @@ -1656,6 +1655,7 @@ #define SSCR0_EDSS (1 << 20) /* Extended Data Size Select */ /* extra bits in PXA255, PXA26x and PXA27x SSP ports */ +#define SSCR0_TISSP (1 << 4) /* TI Sync Serial Protocol */ #define SSCR0_PSP (3 << 4) /* PSP - Programmable Serial Protocol */ #define SSCR1_TTELP (1 << 31) /* TXD Tristate Enable Last Phase */ #define SSCR1_TTE (1 << 30) /* TXD Tristate Enable */ diff --git a/include/asm-arm/arch-pxa/pxa2xx_spi.h b/include/asm-arm/arch-pxa/pxa2xx_spi.h index 915590c391c..acc7ec7a84a 100644 --- a/include/asm-arm/arch-pxa/pxa2xx_spi.h +++ b/include/asm-arm/arch-pxa/pxa2xx_spi.h @@ -27,16 +27,13 @@ #define SSP1_SerClkDiv(x) (((CLOCK_SPEED_HZ/2/(x+1))<<8)&0x0000ff00) #define SSP2_SerClkDiv(x) (((CLOCK_SPEED_HZ/(x+1))<<8)&0x000fff00) #define SSP3_SerClkDiv(x) (((CLOCK_SPEED_HZ/(x+1))<<8)&0x000fff00) -#define SSP_TIMEOUT_SCALE (2712) #elif defined(CONFIG_PXA27x) #define CLOCK_SPEED_HZ 13000000 #define SSP1_SerClkDiv(x) (((CLOCK_SPEED_HZ/(x+1))<<8)&0x000fff00) #define SSP2_SerClkDiv(x) (((CLOCK_SPEED_HZ/(x+1))<<8)&0x000fff00) #define SSP3_SerClkDiv(x) (((CLOCK_SPEED_HZ/(x+1))<<8)&0x000fff00) -#define SSP_TIMEOUT_SCALE (769) #endif -#define SSP_TIMEOUT(x) ((x*10000)/SSP_TIMEOUT_SCALE) #define SSP1_VIRT ((void *)(io_p2v(__PREG(SSCR0_P(1))))) #define SSP2_VIRT ((void *)(io_p2v(__PREG(SSCR0_P(2))))) #define SSP3_VIRT ((void *)(io_p2v(__PREG(SSCR0_P(3))))) @@ -63,7 +60,7 @@ struct pxa2xx_spi_chip { u8 tx_threshold; u8 rx_threshold; u8 dma_burst_size; - u32 timeout_microsecs; + u32 timeout; u8 enable_loopback; void (*cs_control)(u32 command); }; diff --git a/include/asm-arm/arch-s3c2410/anubis-cpld.h b/include/asm-arm/arch-s3c2410/anubis-cpld.h index 40e8e270d33..dcebf6d6190 100644 --- a/include/asm-arm/arch-s3c2410/anubis-cpld.h +++ b/include/asm-arm/arch-s3c2410/anubis-cpld.h @@ -1,6 +1,6 @@ /* linux/include/asm-arm/arch-s3c2410/anubis-cpld.h * - * (c) 2005 Simtec Electronics + * Copyright (c) 2005 Simtec Electronics * http://www.simtec.co.uk/products/ * Ben Dooks <ben@simtec.co.uk> * diff --git a/include/asm-arm/arch-s3c2410/anubis-irq.h b/include/asm-arm/arch-s3c2410/anubis-irq.h index 4b5f423779d..cd77a70d45c 100644 --- a/include/asm-arm/arch-s3c2410/anubis-irq.h +++ b/include/asm-arm/arch-s3c2410/anubis-irq.h @@ -1,6 +1,6 @@ /* linux/include/asm-arm/arch-s3c2410/anubis-irq.h * - * (c) 2005 Simtec Electronics + * Copyright (c) 2005 Simtec Electronics * http://www.simtec.co.uk/products/ * Ben Dooks <ben@simtec.co.uk> * diff --git a/include/asm-arm/arch-s3c2410/anubis-map.h b/include/asm-arm/arch-s3c2410/anubis-map.h index 058a2104b03..ab076de4a0d 100644 --- a/include/asm-arm/arch-s3c2410/anubis-map.h +++ b/include/asm-arm/arch-s3c2410/anubis-map.h @@ -1,6 +1,6 @@ /* linux/include/asm-arm/arch-s3c2410/anubis-map.h * - * (c) 2005 Simtec Electronics + * Copyright (c) 2005 Simtec Electronics * http://www.simtec.co.uk/products/ * Ben Dooks <ben@simtec.co.uk> * diff --git a/include/asm-arm/arch-s3c2410/audio.h b/include/asm-arm/arch-s3c2410/audio.h index 7e0222276c9..65e0acffa1a 100644 --- a/include/asm-arm/arch-s3c2410/audio.h +++ b/include/asm-arm/arch-s3c2410/audio.h @@ -1,6 +1,6 @@ /* linux/include/asm-arm/arch-s3c2410/audio.h * - * (c) 2004-2005 Simtec Electronics + * Copyright (c) 2004-2005 Simtec Electronics * http://www.simtec.co.uk/products/SWLINUX/ * Ben Dooks <ben@simtec.co.uk> * diff --git a/include/asm-arm/arch-s3c2410/bast-cpld.h b/include/asm-arm/arch-s3c2410/bast-cpld.h index 8969cffe83f..034d2c5a47c 100644 --- a/include/asm-arm/arch-s3c2410/bast-cpld.h +++ b/include/asm-arm/arch-s3c2410/bast-cpld.h @@ -1,7 +1,7 @@ /* linux/include/asm-arm/arch-s3c2410/bast-cpld.h * - * (c) 2003,2004 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> + * Copyright (c) 2003,2004 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> * * BAST - CPLD control constants * diff --git a/include/asm-arm/arch-s3c2410/bast-irq.h b/include/asm-arm/arch-s3c2410/bast-irq.h index 15ffa66f501..726c0466f85 100644 --- a/include/asm-arm/arch-s3c2410/bast-irq.h +++ b/include/asm-arm/arch-s3c2410/bast-irq.h @@ -1,7 +1,7 @@ /* linux/include/asm-arm/arch-s3c2410/bast-irq.h * - * (c) 2003,2004 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> + * Copyright (c) 2003,2004 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> * * Machine BAST - IRQ Number definitions * diff --git a/include/asm-arm/arch-s3c2410/bast-map.h b/include/asm-arm/arch-s3c2410/bast-map.h index 727cef84c70..86ac1c108db 100644 --- a/include/asm-arm/arch-s3c2410/bast-map.h +++ b/include/asm-arm/arch-s3c2410/bast-map.h @@ -1,7 +1,7 @@ /* linux/include/asm-arm/arch-s3c2410/bast-map.h * - * (c) 2003,2004 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> + * Copyright (c) 2003,2004 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> * * Machine BAST - Memory map definitions * diff --git a/include/asm-arm/arch-s3c2410/bast-pmu.h b/include/asm-arm/arch-s3c2410/bast-pmu.h index 82836027f00..37a11fe54a7 100644 --- a/include/asm-arm/arch-s3c2410/bast-pmu.h +++ b/include/asm-arm/arch-s3c2410/bast-pmu.h @@ -1,6 +1,6 @@ /* linux/include/asm-arm/arch-s3c2410/bast-pmu.h * - * (c) 2003,2004 Simtec Electronics + * Copyright (c) 2003,2004 Simtec Electronics * Ben Dooks <ben@simtec.co.uk> * Vincent Sanders <vince@simtec.co.uk> * diff --git a/include/asm-arm/arch-s3c2410/dma.h b/include/asm-arm/arch-s3c2410/dma.h index 7ac22483697..58ffa7ba3c8 100644 --- a/include/asm-arm/arch-s3c2410/dma.h +++ b/include/asm-arm/arch-s3c2410/dma.h @@ -14,7 +14,7 @@ #define __ASM_ARCH_DMA_H __FILE__ #include <linux/sysdev.h> -#include "hardware.h" +#include <asm/hardware.h> /* * This is the maximum DMA address(physical address) that can be DMAd to. diff --git a/include/asm-arm/arch-s3c2410/entry-macro.S b/include/asm-arm/arch-s3c2410/entry-macro.S index e09a6b8ec15..1eb4e6b8d24 100644 --- a/include/asm-arm/arch-s3c2410/entry-macro.S +++ b/include/asm-arm/arch-s3c2410/entry-macro.S @@ -20,7 +20,7 @@ #define INTOFFSET (0x14) #include <asm/hardware.h> -#include <asm/arch/irqs.h> +#include <asm/irq.h> .macro get_irqnr_and_base, irqnr, irqstat, base, tmp diff --git a/include/asm-arm/arch-s3c2410/fb.h b/include/asm-arm/arch-s3c2410/fb.h index 90894214cac..93a58e7862b 100644 --- a/include/asm-arm/arch-s3c2410/fb.h +++ b/include/asm-arm/arch-s3c2410/fb.h @@ -31,6 +31,9 @@ struct s3c2410fb_hw { struct s3c2410fb_mach_info { unsigned char fixed_syncs; /* do not update sync/border */ + /* LCD types */ + int type; + /* Screen size */ int width; int height; diff --git a/include/asm-arm/arch-s3c2410/h1940-latch.h b/include/asm-arm/arch-s3c2410/h1940-latch.h index c5802411f43..c3de5ab102e 100644 --- a/include/asm-arm/arch-s3c2410/h1940-latch.h +++ b/include/asm-arm/arch-s3c2410/h1940-latch.h @@ -1,6 +1,6 @@ /* linux/include/asm-arm/arch-s3c2410/h1940-latch.h * - * (c) 2005 Simtec Electronics + * Copyright (c) 2005 Simtec Electronics * http://armlinux.simtec.co.uk/ * Ben Dooks <ben@simtec.co.uk> * @@ -16,7 +16,7 @@ #ifndef __ASSEMBLY__ -#define H1940_LATCH ((void __iomem *)0xF8000000) +#define H1940_LATCH ((void __force __iomem *)0xF8000000) #else #define H1940_LATCH 0xF8000000 #endif diff --git a/include/asm-arm/arch-s3c2410/h1940.h b/include/asm-arm/arch-s3c2410/h1940.h new file mode 100644 index 00000000000..6135592e60f --- /dev/null +++ b/include/asm-arm/arch-s3c2410/h1940.h @@ -0,0 +1,21 @@ +/* linux/include/asm-arm/arch-s3c2410/h1940.h + * + * Copyright 2006 Ben Dooks <ben-linux@fluff.org> + * + * H1940 definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_H1940_H +#define __ASM_ARCH_H1940_H + +#define H1940_SUSPEND_CHECKSUM (0x30003ff8) +#define H1940_SUSPEND_RESUMEAT (0x30081000) +#define H1940_SUSPEND_CHECK (0x30080000) + +extern void h1940_pm_return(void); + +#endif /* __ASM_ARCH_H1940_H */ diff --git a/include/asm-arm/arch-s3c2410/hardware.h b/include/asm-arm/arch-s3c2410/hardware.h index 871f8af09b8..6dadf58ff98 100644 --- a/include/asm-arm/arch-s3c2410/hardware.h +++ b/include/asm-arm/arch-s3c2410/hardware.h @@ -1,7 +1,7 @@ /* linux/include/asm-arm/arch-s3c2410/hardware.h * - * (c) 2003 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> + * Copyright (c) 2003 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> * * S3C2410 - hardware * @@ -13,6 +13,10 @@ #ifndef __ASM_ARCH_HARDWARE_H #define __ASM_ARCH_HARDWARE_H +#ifndef __ASM_HARDWARE_H +#error "Do not include this directly, instead #include <asm/hardware.h>" +#endif + #ifndef __ASSEMBLY__ /* external functions for GPIO support diff --git a/include/asm-arm/arch-s3c2410/iic.h b/include/asm-arm/arch-s3c2410/iic.h index ed3d6c7bf6d..71211c8b538 100644 --- a/include/asm-arm/arch-s3c2410/iic.h +++ b/include/asm-arm/arch-s3c2410/iic.h @@ -1,6 +1,6 @@ /* linux/include/asm-arm/arch-s3c2410/iic.h * - * (c) 2004 Simtec Electronics + * Copyright (c) 2004 Simtec Electronics * Ben Dooks <ben@simtec.co.uk> * * S3C2410 - I2C Controller platfrom_device info diff --git a/include/asm-arm/arch-s3c2410/irqs.h b/include/asm-arm/arch-s3c2410/irqs.h index 39a69829d16..4b7cff456c4 100644 --- a/include/asm-arm/arch-s3c2410/irqs.h +++ b/include/asm-arm/arch-s3c2410/irqs.h @@ -12,6 +12,9 @@ #ifndef __ASM_ARCH_IRQS_H #define __ASM_ARCH_IRQS_H __FILE__ +#ifndef __ASM_ARM_IRQ_H +#error "Do not include this directly, instead #include <asm/irq.h>" +#endif /* we keep the first set of CPU IRQs out of the range of * the ISA space, so that the PC104 has them to itself diff --git a/include/asm-arm/arch-s3c2410/leds-gpio.h b/include/asm-arm/arch-s3c2410/leds-gpio.h index f07ed040622..800846ebddb 100644 --- a/include/asm-arm/arch-s3c2410/leds-gpio.h +++ b/include/asm-arm/arch-s3c2410/leds-gpio.h @@ -1,6 +1,6 @@ /* linux/include/asm-arm/arch-s3c2410/leds-gpio.h * - * (c) 2006 Simtec Electronics + * Copyright (c) 2006 Simtec Electronics * http://armlinux.simtec.co.uk/ * Ben Dooks <ben@simtec.co.uk> * diff --git a/include/asm-arm/arch-s3c2410/map.h b/include/asm-arm/arch-s3c2410/map.h index 7895042d176..4505aefbad1 100644 --- a/include/asm-arm/arch-s3c2410/map.h +++ b/include/asm-arm/arch-s3c2410/map.h @@ -1,7 +1,7 @@ /* linux/include/asm-arm/arch-s3c2410/map.h * - * (c) 2003 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> + * Copyright (c) 2003 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> * * S3C2410 - Memory map definitions * @@ -25,7 +25,7 @@ */ #ifndef __ASSEMBLY__ -#define S3C2410_ADDR(x) ((void __iomem *)0xF0000000 + (x)) +#define S3C2410_ADDR(x) ((void __iomem __force *)0xF0000000 + (x)) #else #define S3C2410_ADDR(x) (0xF0000000 + (x)) #endif @@ -47,73 +47,65 @@ #define S3C24XX_SZ_MEMCTRL SZ_1M /* USB host controller */ -#define S3C24XX_VA_USBHOST S3C2410_ADDR(0x00200000) #define S3C2400_PA_USBHOST (0x14200000) #define S3C2410_PA_USBHOST (0x49000000) #define S3C24XX_SZ_USBHOST SZ_1M /* DMA controller */ -#define S3C24XX_VA_DMA S3C2410_ADDR(0x00300000) #define S3C2400_PA_DMA (0x14600000) #define S3C2410_PA_DMA (0x4B000000) #define S3C24XX_SZ_DMA SZ_1M /* Clock and Power management */ -#define S3C24XX_VA_CLKPWR S3C2410_ADDR(0x00400000) +#define S3C24XX_VA_CLKPWR S3C2410_ADDR(0x00200000) #define S3C2400_PA_CLKPWR (0x14800000) #define S3C2410_PA_CLKPWR (0x4C000000) #define S3C24XX_SZ_CLKPWR SZ_1M /* LCD controller */ -#define S3C24XX_VA_LCD S3C2410_ADDR(0x00600000) +#define S3C24XX_VA_LCD S3C2410_ADDR(0x00300000) #define S3C2400_PA_LCD (0x14A00000) #define S3C2410_PA_LCD (0x4D000000) #define S3C24XX_SZ_LCD SZ_1M /* NAND flash controller */ -#define S3C24XX_VA_NAND S3C2410_ADDR(0x00700000) #define S3C2410_PA_NAND (0x4E000000) #define S3C24XX_SZ_NAND SZ_1M /* MMC controller - available on the S3C2400 */ -#define S3C2400_VA_MMC S3C2400_ADDR(0x00700000) #define S3C2400_PA_MMC (0x15A00000) #define S3C2400_SZ_MMC SZ_1M /* UARTs */ -#define S3C24XX_VA_UART S3C2410_ADDR(0x00800000) +#define S3C24XX_VA_UART S3C2410_ADDR(0x00400000) #define S3C2400_PA_UART (0x15000000) #define S3C2410_PA_UART (0x50000000) #define S3C24XX_SZ_UART SZ_1M /* Timers */ -#define S3C24XX_VA_TIMER S3C2410_ADDR(0x00900000) +#define S3C24XX_VA_TIMER S3C2410_ADDR(0x00500000) #define S3C2400_PA_TIMER (0x15100000) #define S3C2410_PA_TIMER (0x51000000) #define S3C24XX_SZ_TIMER SZ_1M /* USB Device port */ -#define S3C24XX_VA_USBDEV S3C2410_ADDR(0x00A00000) +#define S3C24XX_VA_USBDEV S3C2410_ADDR(0x00600000) #define S3C2400_PA_USBDEV (0x15200140) #define S3C2410_PA_USBDEV (0x52000000) #define S3C24XX_SZ_USBDEV SZ_1M /* Watchdog */ -#define S3C24XX_VA_WATCHDOG S3C2410_ADDR(0x00B00000) +#define S3C24XX_VA_WATCHDOG S3C2410_ADDR(0x00700000) #define S3C2400_PA_WATCHDOG (0x15300000) #define S3C2410_PA_WATCHDOG (0x53000000) #define S3C24XX_SZ_WATCHDOG SZ_1M /* IIC hardware controller */ -#define S3C24XX_VA_IIC S3C2410_ADDR(0x00C00000) #define S3C2400_PA_IIC (0x15400000) #define S3C2410_PA_IIC (0x54000000) #define S3C24XX_SZ_IIC SZ_1M -#define VA_IIC_BASE (S3C24XX_VA_IIC) - /* IIS controller */ -#define S3C24XX_VA_IIS S3C2410_ADDR(0x00D00000) #define S3C2400_PA_IIS (0x15508000) #define S3C2410_PA_IIS (0x55000000) #define S3C24XX_SZ_IIS SZ_1M @@ -134,25 +126,21 @@ #define S3C24XX_SZ_GPIO SZ_1M /* RTC */ -#define S3C24XX_VA_RTC S3C2410_ADDR(0x00F00000) #define S3C2400_PA_RTC (0x15700040) #define S3C2410_PA_RTC (0x57000000) #define S3C24XX_SZ_RTC SZ_1M /* ADC */ -#define S3C24XX_VA_ADC S3C2410_ADDR(0x01000000) #define S3C2400_PA_ADC (0x15800000) #define S3C2410_PA_ADC (0x58000000) #define S3C24XX_SZ_ADC SZ_1M /* SPI */ -#define S3C24XX_VA_SPI S3C2410_ADDR(0x01100000) #define S3C2400_PA_SPI (0x15900000) #define S3C2410_PA_SPI (0x59000000) #define S3C24XX_SZ_SPI SZ_1M /* SDI */ -#define S3C24XX_VA_SDI S3C2410_ADDR(0x01200000) #define S3C2410_PA_SDI (0x5A000000) #define S3C24XX_SZ_SDI SZ_1M diff --git a/include/asm-arm/arch-s3c2410/nand.h b/include/asm-arm/arch-s3c2410/nand.h index e350ae2acfc..8816f7f9cee 100644 --- a/include/asm-arm/arch-s3c2410/nand.h +++ b/include/asm-arm/arch-s3c2410/nand.h @@ -1,7 +1,7 @@ /* linux/include/asm-arm/arch-s3c2410/nand.h * - * (c) 2004 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> + * Copyright (c) 2004 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> * * S3C2410 - NAND device controller platfrom_device info * diff --git a/include/asm-arm/arch-s3c2410/osiris-cpld.h b/include/asm-arm/arch-s3c2410/osiris-cpld.h index e9d1ae1f354..3b6498468d6 100644 --- a/include/asm-arm/arch-s3c2410/osiris-cpld.h +++ b/include/asm-arm/arch-s3c2410/osiris-cpld.h @@ -1,6 +1,6 @@ /* linux/include/asm-arm/arch-s3c2410/osiris-cpld.h * - * (c) 2005 Simtec Electronics + * Copyright (c) 2005 Simtec Electronics * http://www.simtec.co.uk/products/ * Ben Dooks <ben@simtec.co.uk> * diff --git a/include/asm-arm/arch-s3c2410/regs-serial.h b/include/asm-arm/arch-s3c2410/regs-serial.h index 19c77da9c3f..46f52401d13 100644 --- a/include/asm-arm/arch-s3c2410/regs-serial.h +++ b/include/asm-arm/arch-s3c2410/regs-serial.h @@ -197,7 +197,7 @@ struct s3c2410_uartcfg { unsigned char hwport; /* hardware port number */ unsigned char unused; unsigned short flags; - unsigned long uart_flags; /* default uart flags */ + upf_t uart_flags; /* default uart flags */ unsigned long ucon; /* value of ucon for port */ unsigned long ulcon; /* value of ulcon for port */ diff --git a/include/asm-arm/arch-s3c2410/regs-udc.h b/include/asm-arm/arch-s3c2410/regs-udc.h index 487861d5b49..3c8354619b6 100644 --- a/include/asm-arm/arch-s3c2410/regs-udc.h +++ b/include/asm-arm/arch-s3c2410/regs-udc.h @@ -11,8 +11,7 @@ #ifndef __ASM_ARCH_REGS_UDC_H #define __ASM_ARCH_REGS_UDC_H - -#define S3C2410_USBDREG(x) ((x) + S3C24XX_VA_USBDEV) +#define S3C2410_USBDREG(x) (x) #define S3C2410_UDC_FUNC_ADDR_REG S3C2410_USBDREG(0x0140) #define S3C2410_UDC_PWR_REG S3C2410_USBDREG(0x0144) @@ -136,8 +135,8 @@ #define S3C2410_UDC_OCSR2_ISO (1<<6) // R/W #define S3C2410_UDC_OCSR2_DMAIEN (1<<5) // R/W -#define S3C2410_UDC_SETIX(x) \ - __raw_writel(S3C2410_UDC_INDEX_ ## x, S3C2410_UDC_INDEX_REG); +#define S3C2410_UDC_SETIX(base,x) \ + writel(S3C2410_UDC_INDEX_ ## x, base+S3C2410_UDC_INDEX_REG); #define S3C2410_UDC_EP0_CSR_OPKRDY (1<<0) diff --git a/include/asm-arm/arch-s3c2410/system.h b/include/asm-arm/arch-s3c2410/system.h index 718246d8595..ecf250db45f 100644 --- a/include/asm-arm/arch-s3c2410/system.h +++ b/include/asm-arm/arch-s3c2410/system.h @@ -1,7 +1,7 @@ /* linux/include/asm-arm/arch-s3c2410/system.h * - * (c) 2003 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> + * Copyright (c) 2003 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> * * S3C2410 - System function defines and includes * @@ -71,7 +71,7 @@ arch_reset(char mode) /* set the watchdog to go and reset... */ __raw_writel(S3C2410_WTCON_ENABLE|S3C2410_WTCON_DIV16|S3C2410_WTCON_RSTEN | - S3C2410_WTCON_PRESCALE(0x80), S3C2410_WTCON); + S3C2410_WTCON_PRESCALE(0x20), S3C2410_WTCON); /* wait for reset to assert... */ mdelay(5000); diff --git a/include/asm-arm/arch-s3c2410/timex.h b/include/asm-arm/arch-s3c2410/timex.h index 703c337c561..c16a99c5a59 100644 --- a/include/asm-arm/arch-s3c2410/timex.h +++ b/include/asm-arm/arch-s3c2410/timex.h @@ -1,7 +1,7 @@ /* linux/include/asm-arm/arch-s3c2410/timex.h * - * (c) 2003-2005 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> + * Copyright (c) 2003-2005 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> * * S3C2410 - time parameters * diff --git a/include/asm-arm/arch-s3c2410/uncompress.h b/include/asm-arm/arch-s3c2410/uncompress.h index 81b3e91c56a..dcb2cef38f5 100644 --- a/include/asm-arm/arch-s3c2410/uncompress.h +++ b/include/asm-arm/arch-s3c2410/uncompress.h @@ -1,7 +1,7 @@ /* linux/include/asm-arm/arch-s3c2410/uncompress.h * - * (c) 2003 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> + * Copyright (c) 2003 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> * * S3C2410 - uncompress code * @@ -13,6 +13,7 @@ #ifndef __ASM_ARCH_UNCOMPRESS_H #define __ASM_ARCH_UNCOMPRESS_H +typedef unsigned int upf_t; /* cannot include linux/serial_core.h */ /* defines for UART registers */ #include "asm/arch/regs-serial.h" diff --git a/include/asm-arm/arch-s3c2410/usb-control.h b/include/asm-arm/arch-s3c2410/usb-control.h index 35723569a17..5bfa376e33d 100644 --- a/include/asm-arm/arch-s3c2410/usb-control.h +++ b/include/asm-arm/arch-s3c2410/usb-control.h @@ -1,7 +1,7 @@ /* linux/include/asm-arm/arch-s3c2410/usb-control.h * - * (c) 2004 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> + * Copyright (c) 2004 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> * * S3C2410 - usb port information * diff --git a/include/asm-arm/arch-s3c2410/vr1000-cpld.h b/include/asm-arm/arch-s3c2410/vr1000-cpld.h index a341b1e1bd9..0557b0a5ab1 100644 --- a/include/asm-arm/arch-s3c2410/vr1000-cpld.h +++ b/include/asm-arm/arch-s3c2410/vr1000-cpld.h @@ -1,7 +1,7 @@ /* linux/include/asm-arm/arch-s3c2410/vr1000-cpld.h * - * (c) 2003 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> + * Copyright (c) 2003 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> * * VR1000 - CPLD control constants * diff --git a/include/asm-arm/arch-s3c2410/vr1000-irq.h b/include/asm-arm/arch-s3c2410/vr1000-irq.h index c39a0ffa670..890937083c6 100644 --- a/include/asm-arm/arch-s3c2410/vr1000-irq.h +++ b/include/asm-arm/arch-s3c2410/vr1000-irq.h @@ -1,7 +1,7 @@ /* linux/include/asm-arm/arch-s3c2410/vr1000-irq.h * - * (c) 2003,2004 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> + * Copyright (c) 2003,2004 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> * * Machine VR1000 - IRQ Number definitions * diff --git a/include/asm-arm/arch-s3c2410/vr1000-map.h b/include/asm-arm/arch-s3c2410/vr1000-map.h index 1fe4db36c83..92a56a724a8 100644 --- a/include/asm-arm/arch-s3c2410/vr1000-map.h +++ b/include/asm-arm/arch-s3c2410/vr1000-map.h @@ -1,7 +1,7 @@ /* linux/include/asm-arm/arch-s3c2410/vr1000-map.h * - * (c) 2003-2005 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> + * Copyright (c) 2003-2005 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> * * Machine VR1000 - Memory map definitions * diff --git a/include/asm-arm/arch-sa1100/jornada720.h b/include/asm-arm/arch-sa1100/jornada720.h deleted file mode 100644 index 3f37ca07806..00000000000 --- a/include/asm-arm/arch-sa1100/jornada720.h +++ /dev/null @@ -1,42 +0,0 @@ -/* - * linux/include/asm-arm/arch-sa1100/jornada720.h - * - * Created 2000/11/29 by John Ankcorn <jca@lcs.mit.edu> - * - * This file contains the hardware specific definitions for HP Jornada 720 - * - */ - -#ifndef __ASM_ARCH_HARDWARE_H -#error "include <asm/hardware.h> instead" -#endif - -#define SA1111_BASE (0x40000000) - -#define GPIO_JORNADA720_KEYBOARD GPIO_GPIO(0) -#define GPIO_JORNADA720_MOUSE GPIO_GPIO(9) - -#define GPIO_JORNADA720_KEYBOARD_IRQ IRQ_GPIO0 -#define GPIO_JORNADA720_MOUSE_IRQ IRQ_GPIO9 - -/* MCU COMMANDS */ -#define MCU_GetBatteryData 0xc0 -#define MCU_GetScanKeyCode 0x90 -#define MCU_GetTouchSamples 0xa0 -#define MCU_GetContrast 0xD0 -#define MCU_SetContrast 0xD1 -#define MCU_GetBrightness 0xD2 -#define MCU_SetBrightness 0xD3 -#define MCU_ContrastOff 0xD8 -#define MCU_BrightnessOff 0xD9 -#define MCU_PWMOFF 0xDF -#define MCU_TxDummy 0x11 -#define MCU_ErrorCode 0x00 - -#ifndef __ASSEMBLY__ - -void jornada720_mcu_init(void); -void jornada_contrast(int arg_contrast); -void jornada720_battery(void); -int jornada720_getkey(unsigned char *data, int size); -#endif diff --git a/include/asm-arm/arch-sa1100/memory.h b/include/asm-arm/arch-sa1100/memory.h index 1ff172dc8e3..0e907fc6d42 100644 --- a/include/asm-arm/arch-sa1100/memory.h +++ b/include/asm-arm/arch-sa1100/memory.h @@ -39,7 +39,6 @@ void sa1111_adjust_zones(int node, unsigned long *size, unsigned long *holes); #define __virt_to_bus(x) __virt_to_phys(x) #define __bus_to_virt(x) __phys_to_virt(x) -#ifdef CONFIG_DISCONTIGMEM /* * Because of the wide memory address space between physical RAM banks on the * SA1100, it's much convenient to use Linux's NUMA support to implement our @@ -57,38 +56,7 @@ void sa1111_adjust_zones(int node, unsigned long *size, unsigned long *holes); * node 2: 0xd0000000 - 0xd7ffffff * node 3: 0xd8000000 - 0xdfffffff */ - -/* - * Given a kernel address, find the home node of the underlying memory. - */ -#define KVADDR_TO_NID(addr) (((unsigned long)(addr) - PAGE_OFFSET) >> 27) - -/* - * Given a page frame number, convert it to a node id. - */ -#define PFN_TO_NID(pfn) (((pfn) - PHYS_PFN_OFFSET) >> (27 - PAGE_SHIFT)) - -/* - * Given a kaddr, ADDR_TO_MAPBASE finds the owning node of the memory - * and return the mem_map of that node. - */ -#define ADDR_TO_MAPBASE(kaddr) NODE_MEM_MAP(KVADDR_TO_NID(kaddr)) - -/* - * Given a page frame number, find the owning node of the memory - * and return the mem_map of that node. - */ -#define PFN_TO_MAPBASE(pfn) NODE_MEM_MAP(PFN_TO_NID(pfn)) - -/* - * Given a kaddr, LOCAL_MEM_MAP finds the owning node of the memory - * and returns the index corresponding to the appropriate page in the - * node's mem_map. - */ -#define LOCAL_MAP_NR(addr) \ - (((unsigned long)(addr) & 0x07ffffff) >> PAGE_SHIFT) - -#endif +#define NODE_MEM_SIZE_BITS 27 /* * Cache flushing area - SA1100 zero bank diff --git a/include/asm-arm/bug.h b/include/asm-arm/bug.h index 0e36fd5d87d..7b62351f097 100644 --- a/include/asm-arm/bug.h +++ b/include/asm-arm/bug.h @@ -4,10 +4,10 @@ #ifdef CONFIG_BUG #ifdef CONFIG_DEBUG_BUGVERBOSE -extern void __bug(const char *file, int line, void *data) __attribute__((noreturn)); +extern void __bug(const char *file, int line) __attribute__((noreturn)); /* give file/line information */ -#define BUG() __bug(__FILE__, __LINE__, NULL) +#define BUG() __bug(__FILE__, __LINE__) #else diff --git a/include/asm-arm/cacheflush.h b/include/asm-arm/cacheflush.h index f0845646aac..5f531ea0305 100644 --- a/include/asm-arm/cacheflush.h +++ b/include/asm-arm/cacheflush.h @@ -319,6 +319,8 @@ extern void flush_ptrace_access(struct vm_area_struct *vma, struct page *page, unsigned long len, int write); #endif +#define flush_cache_dup_mm(mm) flush_cache_mm(mm) + /* * flush_cache_user_range is used when we want to ensure that the * Harvard caches are synchronised for the user space address range. @@ -353,6 +355,18 @@ extern void flush_ptrace_access(struct vm_area_struct *vma, struct page *page, */ extern void flush_dcache_page(struct page *); +extern void __flush_dcache_page(struct address_space *mapping, struct page *page); + +#define ARCH_HAS_FLUSH_ANON_PAGE +static inline void flush_anon_page(struct vm_area_struct *vma, + struct page *page, unsigned long vmaddr) +{ + extern void __flush_anon_page(struct vm_area_struct *vma, + struct page *, unsigned long); + if (PageAnon(page)) + __flush_anon_page(vma, page, vmaddr); +} + #define flush_dcache_mmap_lock(mapping) \ write_lock_irq(&(mapping)->tree_lock) #define flush_dcache_mmap_unlock(mapping) \ diff --git a/include/asm-arm/checksum.h b/include/asm-arm/checksum.h index 747bdd31a74..8c0bb5bb14e 100644 --- a/include/asm-arm/checksum.h +++ b/include/asm-arm/checksum.h @@ -23,7 +23,7 @@ * * it's best to have buff aligned on a 32-bit boundary */ -unsigned int csum_partial(const unsigned char * buff, int len, unsigned int sum); +__wsum csum_partial(const void *buff, int len, __wsum sum); /* * the same as csum_partial, but copies from src while it @@ -33,26 +33,18 @@ unsigned int csum_partial(const unsigned char * buff, int len, unsigned int sum) * better 64-bit) boundary */ -unsigned int -csum_partial_copy_nocheck(const char *src, char *dst, int len, int sum); +__wsum +csum_partial_copy_nocheck(const void *src, void *dst, int len, __wsum sum); -unsigned int -csum_partial_copy_from_user(const char __user *src, char *dst, int len, int sum, int *err_ptr); - -/* - * This is the old (and unsafe) way of doing checksums, a warning message will - * be printed if it is used and an exception occurs. - * - * this functions should go away after some time. - */ -#define csum_partial_copy(src,dst,len,sum) csum_partial_copy_nocheck(src,dst,len,sum) +__wsum +csum_partial_copy_from_user(const void __user *src, void *dst, int len, __wsum sum, int *err_ptr); /* * This is a version of ip_compute_csum() optimized for IP headers, * which always checksum on 4 octet boundaries. */ -static inline unsigned short -ip_fast_csum(unsigned char * iph, unsigned int ihl) +static inline __sum16 +ip_fast_csum(const void *iph, unsigned int ihl) { unsigned int sum, tmp1; @@ -78,14 +70,13 @@ ip_fast_csum(unsigned char * iph, unsigned int ihl) : "=r" (sum), "=r" (iph), "=r" (ihl), "=r" (tmp1) : "1" (iph), "2" (ihl) : "cc", "memory"); - return sum; + return (__force __sum16)sum; } /* * Fold a partial checksum without adding pseudo headers */ -static inline unsigned int -csum_fold(unsigned int sum) +static inline __sum16 csum_fold(__wsum sum) { __asm__( "adds %0, %1, %1, lsl #16 @ csum_fold \n\ @@ -93,21 +84,25 @@ csum_fold(unsigned int sum) : "=r" (sum) : "r" (sum) : "cc"); - return (~sum) >> 16; + return (__force __sum16)(~(__force u32)sum >> 16); } -static inline unsigned int -csum_tcpudp_nofold(unsigned long saddr, unsigned long daddr, unsigned short len, - unsigned int proto, unsigned int sum) +static inline __wsum +csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len, + unsigned short proto, __wsum sum) { __asm__( "adds %0, %1, %2 @ csum_tcpudp_nofold \n\ - adcs %0, %0, %3 \n\ - adcs %0, %0, %4 \n\ - adcs %0, %0, %5 \n\ + adcs %0, %0, %3 \n" +#ifdef __ARMEB__ + "adcs %0, %0, %4 \n" +#else + "adcs %0, %0, %4, lsl #8 \n" +#endif + "adcs %0, %0, %5 \n\ adc %0, %0, #0" : "=&r"(sum) - : "r" (sum), "r" (daddr), "r" (saddr), "r" (ntohs(len)), "Ir" (ntohs(proto)) + : "r" (sum), "r" (daddr), "r" (saddr), "r" (len), "Ir" (htons(proto)) : "cc"); return sum; } @@ -115,23 +110,27 @@ csum_tcpudp_nofold(unsigned long saddr, unsigned long daddr, unsigned short len, * computes the checksum of the TCP/UDP pseudo-header * returns a 16-bit checksum, already complemented */ -static inline unsigned short int -csum_tcpudp_magic(unsigned long saddr, unsigned long daddr, unsigned short len, - unsigned int proto, unsigned int sum) +static inline __sum16 +csum_tcpudp_magic(__be32 saddr, __be32 daddr, unsigned short len, + unsigned short proto, __wsum sum) { __asm__( "adds %0, %1, %2 @ csum_tcpudp_magic \n\ - adcs %0, %0, %3 \n\ - adcs %0, %0, %4 \n\ - adcs %0, %0, %5 \n\ + adcs %0, %0, %3 \n" +#ifdef __ARMEB__ + "adcs %0, %0, %4 \n" +#else + "adcs %0, %0, %4, lsl #8 \n" +#endif + "adcs %0, %0, %5 \n\ adc %0, %0, #0 \n\ adds %0, %0, %0, lsl #16 \n\ addcs %0, %0, #0x10000 \n\ mvn %0, %0" : "=&r"(sum) - : "r" (sum), "r" (daddr), "r" (saddr), "r" (ntohs(len)), "Ir" (ntohs(proto)) + : "r" (sum), "r" (daddr), "r" (saddr), "r" (len), "Ir" (htons(proto)) : "cc"); - return sum >> 16; + return (__force __sum16)((__force u32)sum >> 16); } @@ -139,20 +138,20 @@ csum_tcpudp_magic(unsigned long saddr, unsigned long daddr, unsigned short len, * this routine is used for miscellaneous IP-like checksums, mainly * in icmp.c */ -static inline unsigned short -ip_compute_csum(unsigned char * buff, int len) +static inline __sum16 +ip_compute_csum(const void *buff, int len) { return csum_fold(csum_partial(buff, len, 0)); } #define _HAVE_ARCH_IPV6_CSUM -extern unsigned long -__csum_ipv6_magic(struct in6_addr *saddr, struct in6_addr *daddr, __u32 len, - __u32 proto, unsigned int sum); +extern __wsum +__csum_ipv6_magic(const struct in6_addr *saddr, const struct in6_addr *daddr, __be32 len, + __be32 proto, __wsum sum); -static inline unsigned short int -csum_ipv6_magic(struct in6_addr *saddr, struct in6_addr *daddr, __u32 len, - unsigned short proto, unsigned int sum) +static inline __sum16 +csum_ipv6_magic(const struct in6_addr *saddr, const struct in6_addr *daddr, __u32 len, + unsigned short proto, __wsum sum) { return csum_fold(__csum_ipv6_magic(saddr, daddr, htonl(len), htonl(proto), sum)); diff --git a/include/asm-arm/cnt32_to_63.h b/include/asm-arm/cnt32_to_63.h new file mode 100644 index 00000000000..480c873fa74 --- /dev/null +++ b/include/asm-arm/cnt32_to_63.h @@ -0,0 +1,78 @@ +/* + * include/asm/cnt32_to_63.h -- extend a 32-bit counter to 63 bits + * + * Author: Nicolas Pitre + * Created: December 3, 2006 + * Copyright: MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + */ + +#ifndef __INCLUDE_CNT32_TO_63_H__ +#define __INCLUDE_CNT32_TO_63_H__ + +#include <linux/compiler.h> +#include <asm/types.h> +#include <asm/byteorder.h> + +/* + * Prototype: u64 cnt32_to_63(u32 cnt) + * Many hardware clock counters are only 32 bits wide and therefore have + * a relatively short period making wrap-arounds rather frequent. This + * is a problem when implementing sched_clock() for example, where a 64-bit + * non-wrapping monotonic value is expected to be returned. + * + * To overcome that limitation, let's extend a 32-bit counter to 63 bits + * in a completely lock free fashion. Bits 0 to 31 of the clock are provided + * by the hardware while bits 32 to 62 are stored in memory. The top bit in + * memory is used to synchronize with the hardware clock half-period. When + * the top bit of both counters (hardware and in memory) differ then the + * memory is updated with a new value, incrementing it when the hardware + * counter wraps around. + * + * Because a word store in memory is atomic then the incremented value will + * always be in synch with the top bit indicating to any potential concurrent + * reader if the value in memory is up to date or not with regards to the + * needed increment. And any race in updating the value in memory is harmless + * as the same value would simply be stored more than once. + * + * The only restriction for the algorithm to work properly is that this + * code must be executed at least once per each half period of the 32-bit + * counter to properly update the state bit in memory. This is usually not a + * problem in practice, but if it is then a kernel timer could be scheduled + * to manage for this code to be executed often enough. + * + * Note that the top bit (bit 63) in the returned value should be considered + * as garbage. It is not cleared here because callers are likely to use a + * multiplier on the returned value which can get rid of the top bit + * implicitly by making the multiplier even, therefore saving on a runtime + * clear-bit instruction. Otherwise caller must remember to clear the top + * bit explicitly. + */ + +/* this is used only to give gcc a clue about good code generation */ +typedef union { + struct { +#if defined(__LITTLE_ENDIAN) + u32 lo, hi; +#elif defined(__BIG_ENDIAN) + u32 hi, lo; +#endif + }; + u64 val; +} cnt32_to_63_t; + +#define cnt32_to_63(cnt_lo) \ +({ \ + static volatile u32 __m_cnt_hi = 0; \ + cnt32_to_63_t __x; \ + __x.hi = __m_cnt_hi; \ + __x.lo = (cnt_lo); \ + if (unlikely((s32)(__x.hi ^ __x.lo) < 0)) \ + __m_cnt_hi = __x.hi = (__x.hi ^ 0x80000000) + (__x.hi >> 31); \ + __x.val; \ +}) + +#endif diff --git a/include/asm-arm/cpu-multi32.h b/include/asm-arm/cpu-multi32.h index 4679f63688e..715e18a4add 100644 --- a/include/asm-arm/cpu-multi32.h +++ b/include/asm-arm/cpu-multi32.h @@ -50,9 +50,10 @@ extern struct processor { */ void (*switch_mm)(unsigned long pgd_phys, struct mm_struct *mm); /* - * Set a PTE + * Set a possibly extended PTE. Non-extended PTEs should + * ignore 'ext'. */ - void (*set_pte)(pte_t *ptep, pte_t pte); + void (*set_pte_ext)(pte_t *ptep, pte_t pte, unsigned int ext); } processor; #define cpu_proc_init() processor._proc_init() @@ -60,5 +61,5 @@ extern struct processor { #define cpu_reset(addr) processor.reset(addr) #define cpu_do_idle() processor._do_idle() #define cpu_dcache_clean_area(addr,sz) processor.dcache_clean_area(addr,sz) -#define cpu_set_pte(ptep, pte) processor.set_pte(ptep, pte) +#define cpu_set_pte_ext(ptep,pte,ext) processor.set_pte_ext(ptep,pte,ext) #define cpu_do_switch_mm(pgd,mm) processor.switch_mm(pgd,mm) diff --git a/include/asm-arm/cpu-single.h b/include/asm-arm/cpu-single.h index 6723e67244f..0b120ee3609 100644 --- a/include/asm-arm/cpu-single.h +++ b/include/asm-arm/cpu-single.h @@ -28,7 +28,7 @@ #define cpu_do_idle __cpu_fn(CPU_NAME,_do_idle) #define cpu_dcache_clean_area __cpu_fn(CPU_NAME,_dcache_clean_area) #define cpu_do_switch_mm __cpu_fn(CPU_NAME,_switch_mm) -#define cpu_set_pte __cpu_fn(CPU_NAME,_set_pte) +#define cpu_set_pte_ext __cpu_fn(CPU_NAME,_set_pte_ext) #include <asm/page.h> @@ -40,5 +40,5 @@ extern void cpu_proc_fin(void); extern int cpu_do_idle(void); extern void cpu_dcache_clean_area(void *, int); extern void cpu_do_switch_mm(unsigned long pgd_phys, struct mm_struct *mm); -extern void cpu_set_pte(pte_t *ptep, pte_t pte); +extern void cpu_set_pte_ext(pte_t *ptep, pte_t pte, unsigned int ext); extern void cpu_reset(unsigned long addr) __attribute__((noreturn)); diff --git a/include/asm-arm/device.h b/include/asm-arm/device.h new file mode 100644 index 00000000000..d8f9872b0e2 --- /dev/null +++ b/include/asm-arm/device.h @@ -0,0 +1,7 @@ +/* + * Arch specific extensions to struct device + * + * This file is released under the GPLv2 + */ +#include <asm-generic/device.h> + diff --git a/include/asm-arm/div64.h b/include/asm-arm/div64.h index 3682616804c..37e0a96e878 100644 --- a/include/asm-arm/div64.h +++ b/include/asm-arm/div64.h @@ -27,7 +27,7 @@ #define __xh "r1" #endif -#define do_div(n,base) \ +#define __do_div_asm(n, base) \ ({ \ register unsigned int __base asm("r4") = base; \ register unsigned long long __n asm("r0") = n; \ @@ -45,4 +45,182 @@ __rem; \ }) +#if __GNUC__ < 4 + +/* + * gcc versions earlier than 4.0 are simply too problematic for the + * optimized implementation below. First there is gcc PR 15089 that + * tend to trig on more complex constructs, spurious .global __udivsi3 + * are inserted even if none of those symbols are referenced in the + * generated code, and those gcc versions are not able to do constant + * propagation on long long values anyway. + */ +#define do_div(n, base) __do_div_asm(n, base) + +#elif __GNUC__ >= 4 + +#include <asm/bug.h> + +/* + * If the divisor happens to be constant, we determine the appropriate + * inverse at compile time to turn the division into a few inline + * multiplications instead which is much faster. And yet only if compiling + * for ARMv4 or higher (we need umull/umlal) and if the gcc version is + * sufficiently recent to perform proper long long constant propagation. + * (It is unfortunate that gcc doesn't perform all this internally.) + */ +#define do_div(n, base) \ +({ \ + unsigned int __r, __b = (base); \ + if (!__builtin_constant_p(__b) || __b == 0 || \ + (__LINUX_ARM_ARCH__ < 4 && (__b & (__b - 1)) != 0)) { \ + /* non-constant divisor (or zero): slow path */ \ + __r = __do_div_asm(n, __b); \ + } else if ((__b & (__b - 1)) == 0) { \ + /* Trivial: __b is constant and a power of 2 */ \ + /* gcc does the right thing with this code. */ \ + __r = n; \ + __r &= (__b - 1); \ + n /= __b; \ + } else { \ + /* Multiply by inverse of __b: n/b = n*(p/b)/p */ \ + /* We rely on the fact that most of this code gets */ \ + /* optimized away at compile time due to constant */ \ + /* propagation and only a couple inline assembly */ \ + /* instructions should remain. Better avoid any */ \ + /* code construct that might prevent that. */ \ + unsigned long long __res, __x, __t, __m, __n = n; \ + unsigned int __c, __p, __z = 0; \ + /* preserve low part of n for reminder computation */ \ + __r = __n; \ + /* determine number of bits to represent __b */ \ + __p = 1 << __div64_fls(__b); \ + /* compute __m = ((__p << 64) + __b - 1) / __b */ \ + __m = (~0ULL / __b) * __p; \ + __m += (((~0ULL % __b + 1) * __p) + __b - 1) / __b; \ + /* compute __res = __m*(~0ULL/__b*__b-1)/(__p << 64) */ \ + __x = ~0ULL / __b * __b - 1; \ + __res = (__m & 0xffffffff) * (__x & 0xffffffff); \ + __res >>= 32; \ + __res += (__m & 0xffffffff) * (__x >> 32); \ + __t = __res; \ + __res += (__x & 0xffffffff) * (__m >> 32); \ + __t = (__res < __t) ? (1ULL << 32) : 0; \ + __res = (__res >> 32) + __t; \ + __res += (__m >> 32) * (__x >> 32); \ + __res /= __p; \ + /* Now sanitize and optimize what we've got. */ \ + if (~0ULL % (__b / (__b & -__b)) == 0) { \ + /* those cases can be simplified with: */ \ + __n /= (__b & -__b); \ + __m = ~0ULL / (__b / (__b & -__b)); \ + __p = 1; \ + __c = 1; \ + } else if (__res != __x / __b) { \ + /* We can't get away without a correction */ \ + /* to compensate for bit truncation errors. */ \ + /* To avoid it we'd need an additional bit */ \ + /* to represent __m which would overflow it. */ \ + /* Instead we do m=p/b and n/b=(n*m+m)/p. */ \ + __c = 1; \ + /* Compute __m = (__p << 64) / __b */ \ + __m = (~0ULL / __b) * __p; \ + __m += ((~0ULL % __b + 1) * __p) / __b; \ + } else { \ + /* Reduce __m/__p, and try to clear bit 31 */ \ + /* of __m when possible otherwise that'll */ \ + /* need extra overflow handling later. */ \ + unsigned int __bits = -(__m & -__m); \ + __bits |= __m >> 32; \ + __bits = (~__bits) << 1; \ + /* If __bits == 0 then setting bit 31 is */ \ + /* unavoidable. Simply apply the maximum */ \ + /* possible reduction in that case. */ \ + /* Otherwise the MSB of __bits indicates the */ \ + /* best reduction we should apply. */ \ + if (!__bits) { \ + __p /= (__m & -__m); \ + __m /= (__m & -__m); \ + } else { \ + __p >>= __div64_fls(__bits); \ + __m >>= __div64_fls(__bits); \ + } \ + /* No correction needed. */ \ + __c = 0; \ + } \ + /* Now we have a combination of 2 conditions: */ \ + /* 1) whether or not we need a correction (__c), and */ \ + /* 2) whether or not there might be an overflow in */ \ + /* the cross product (__m & ((1<<63) | (1<<31))) */ \ + /* Select the best insn combination to perform the */ \ + /* actual __m * __n / (__p << 64) operation. */ \ + if (!__c) { \ + asm ( "umull %Q0, %R0, %1, %Q2\n\t" \ + "mov %Q0, #0" \ + : "=&r" (__res) \ + : "r" (__m), "r" (__n) \ + : "cc" ); \ + } else if (!(__m & ((1ULL << 63) | (1ULL << 31)))) { \ + __res = __m; \ + asm ( "umlal %Q0, %R0, %Q1, %Q2\n\t" \ + "mov %Q0, #0" \ + : "+r" (__res) \ + : "r" (__m), "r" (__n) \ + : "cc" ); \ + } else { \ + asm ( "umull %Q0, %R0, %Q1, %Q2\n\t" \ + "cmn %Q0, %Q1\n\t" \ + "adcs %R0, %R0, %R1\n\t" \ + "adc %Q0, %3, #0" \ + : "=&r" (__res) \ + : "r" (__m), "r" (__n), "r" (__z) \ + : "cc" ); \ + } \ + if (!(__m & ((1ULL << 63) | (1ULL << 31)))) { \ + asm ( "umlal %R0, %Q0, %R1, %Q2\n\t" \ + "umlal %R0, %Q0, %Q1, %R2\n\t" \ + "mov %R0, #0\n\t" \ + "umlal %Q0, %R0, %R1, %R2" \ + : "+r" (__res) \ + : "r" (__m), "r" (__n) \ + : "cc" ); \ + } else { \ + asm ( "umlal %R0, %Q0, %R2, %Q3\n\t" \ + "umlal %R0, %1, %Q2, %R3\n\t" \ + "mov %R0, #0\n\t" \ + "adds %Q0, %1, %Q0\n\t" \ + "adc %R0, %R0, #0\n\t" \ + "umlal %Q0, %R0, %R2, %R3" \ + : "+r" (__res), "+r" (__z) \ + : "r" (__m), "r" (__n) \ + : "cc" ); \ + } \ + __res /= __p; \ + /* The reminder can be computed with 32-bit regs */ \ + /* only, and gcc is good at that. */ \ + { \ + unsigned int __res0 = __res; \ + unsigned int __b0 = __b; \ + __r -= __res0 * __b0; \ + } \ + /* BUG_ON(__r >= __b || __res * __b + __r != n); */ \ + n = __res; \ + } \ + __r; \ +}) + +/* our own fls implementation to make sure constant propagation is fine */ +#define __div64_fls(bits) \ +({ \ + unsigned int __left = (bits), __nr = 0; \ + if (__left & 0xffff0000) __nr += 16, __left >>= 16; \ + if (__left & 0x0000ff00) __nr += 8, __left >>= 8; \ + if (__left & 0x000000f0) __nr += 4, __left >>= 4; \ + if (__left & 0x0000000c) __nr += 2, __left >>= 2; \ + if (__left & 0x00000002) __nr += 1; \ + __nr; \ +}) + +#endif + #endif diff --git a/include/asm-arm/dma-mapping.h b/include/asm-arm/dma-mapping.h index 666617711c8..9bc46b486af 100644 --- a/include/asm-arm/dma-mapping.h +++ b/include/asm-arm/dma-mapping.h @@ -48,7 +48,7 @@ static inline int dma_get_cache_alignment(void) return 32; } -static inline int dma_is_consistent(dma_addr_t handle) +static inline int dma_is_consistent(struct device *dev, dma_addr_t handle) { return !!arch_is_coherent(); } diff --git a/include/asm-arm/elf.h b/include/asm-arm/elf.h index 17f0c656d27..3679a8a8922 100644 --- a/include/asm-arm/elf.h +++ b/include/asm-arm/elf.h @@ -1,17 +1,22 @@ #ifndef __ASMARM_ELF_H #define __ASMARM_ELF_H - +#ifndef __ASSEMBLY__ /* * ELF register definitions.. */ - #include <asm/ptrace.h> #include <asm/user.h> typedef unsigned long elf_greg_t; typedef unsigned long elf_freg_t[3]; +#define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t)) +typedef elf_greg_t elf_gregset_t[ELF_NGREG]; + +typedef struct user_fp elf_fpregset_t; +#endif + #define EM_ARM 40 #define EF_ARM_APCS26 0x08 #define EF_ARM_SOFT_FLOAT 0x200 @@ -23,11 +28,6 @@ typedef unsigned long elf_freg_t[3]; #define R_ARM_CALL 28 #define R_ARM_JUMP24 29 -#define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t)) -typedef elf_greg_t elf_gregset_t[ELF_NGREG]; - -typedef struct user_fp elf_fpregset_t; - /* * These are used to set parameters in the core dumps. */ @@ -39,97 +39,100 @@ typedef struct user_fp elf_fpregset_t; #endif #define ELF_ARCH EM_ARM -#ifdef __KERNEL__ -#include <asm/procinfo.h> - /* - * This is used to ensure we don't load something for the wrong architecture. + * HWCAP flags - for elf_hwcap (in kernel) and AT_HWCAP */ -#define elf_check_arch(x) ( ((x)->e_machine == EM_ARM) && (ELF_PROC_OK((x))) ) - -#define USE_ELF_CORE_DUMP -#define ELF_EXEC_PAGESIZE 4096 - -/* This is the location that an ET_DYN program is loaded if exec'ed. Typical - use of this is to invoke "./ld.so someprog" to test out a new version of - the loader. We need to make sure that it is out of the way of the program - that it will "exec", and that there is sufficient room for the brk. */ - -#define ELF_ET_DYN_BASE (2 * TASK_SIZE / 3) - -/* When the program starts, a1 contains a pointer to a function to be - registered with atexit, as per the SVR4 ABI. A value of 0 means we - have no such handler. */ -#define ELF_PLAT_INIT(_r, load_addr) (_r)->ARM_r0 = 0 - -/* This yields a mask that user programs can use to figure out what - instruction set this cpu supports. */ +#define HWCAP_SWP 1 +#define HWCAP_HALF 2 +#define HWCAP_THUMB 4 +#define HWCAP_26BIT 8 /* Play it safe */ +#define HWCAP_FAST_MULT 16 +#define HWCAP_FPA 32 +#define HWCAP_VFP 64 +#define HWCAP_EDSP 128 +#define HWCAP_JAVA 256 +#define HWCAP_IWMMXT 512 +#define HWCAP_CRUNCH 1024 +#ifdef __KERNEL__ +#ifndef __ASSEMBLY__ +/* + * This yields a mask that user programs can use to figure out what + * instruction set this cpu supports. + */ #define ELF_HWCAP (elf_hwcap) +extern unsigned int elf_hwcap; -/* This yields a string that ld.so will use to load implementation - specific libraries for optimization. This is more specific in - intent than poking at uname or /proc/cpuinfo. */ - -/* For now we just provide a fairly general string that describes the - processor family. This could be made more specific later if someone - implemented optimisations that require it. 26-bit CPUs give you - "v1l" for ARM2 (no SWP) and "v2l" for anything else (ARM1 isn't - supported). 32-bit CPUs give you "v3[lb]" for anything based on an - ARM6 or ARM7 core and "armv4[lb]" for anything based on a StrongARM-1 - core. */ - +/* + * This yields a string that ld.so will use to load implementation + * specific libraries for optimization. This is more specific in + * intent than poking at uname or /proc/cpuinfo. + * + * For now we just provide a fairly general string that describes the + * processor family. This could be made more specific later if someone + * implemented optimisations that require it. 26-bit CPUs give you + * "v1l" for ARM2 (no SWP) and "v2l" for anything else (ARM1 isn't + * supported). 32-bit CPUs give you "v3[lb]" for anything based on an + * ARM6 or ARM7 core and "armv4[lb]" for anything based on a StrongARM-1 + * core. + */ #define ELF_PLATFORM_SIZE 8 -extern char elf_platform[]; #define ELF_PLATFORM (elf_platform) +extern char elf_platform[]; +#endif + +/* + * This is used to ensure we don't load something for the wrong architecture. + */ +#define elf_check_arch(x) ((x)->e_machine == EM_ARM && ELF_PROC_OK(x)) + /* * 32-bit code is always OK. Some cpus can do 26-bit, some can't. */ #define ELF_PROC_OK(x) (ELF_THUMB_OK(x) && ELF_26BIT_OK(x)) #define ELF_THUMB_OK(x) \ - (( (elf_hwcap & HWCAP_THUMB) && ((x)->e_entry & 1) == 1) || \ + ((elf_hwcap & HWCAP_THUMB && ((x)->e_entry & 1) == 1) || \ ((x)->e_entry & 3) == 0) #define ELF_26BIT_OK(x) \ - (( (elf_hwcap & HWCAP_26BIT) && (x)->e_flags & EF_ARM_APCS26) || \ + ((elf_hwcap & HWCAP_26BIT && (x)->e_flags & EF_ARM_APCS26) || \ ((x)->e_flags & EF_ARM_APCS26) == 0) -#ifndef CONFIG_IWMMXT +#define USE_ELF_CORE_DUMP +#define ELF_EXEC_PAGESIZE 4096 -/* Old NetWinder binaries were compiled in such a way that the iBCS - heuristic always trips on them. Until these binaries become uncommon - enough not to care, don't trust the `ibcs' flag here. In any case - there is no other ELF system currently supported by iBCS. - @@ Could print a warning message to encourage users to upgrade. */ -#define SET_PERSONALITY(ex,ibcs2) \ - set_personality(((ex).e_flags&EF_ARM_APCS26 ?PER_LINUX :PER_LINUX_32BIT)) +/* This is the location that an ET_DYN program is loaded if exec'ed. Typical + use of this is to invoke "./ld.so someprog" to test out a new version of + the loader. We need to make sure that it is out of the way of the program + that it will "exec", and that there is sufficient room for the brk. */ -#else +#define ELF_ET_DYN_BASE (2 * TASK_SIZE / 3) + +/* When the program starts, a1 contains a pointer to a function to be + registered with atexit, as per the SVR4 ABI. A value of 0 means we + have no such handler. */ +#define ELF_PLAT_INIT(_r, load_addr) (_r)->ARM_r0 = 0 /* - * All iWMMXt capable CPUs don't support 26-bit mode. Yet they can run - * legacy binaries which used to contain FPA11 floating point instructions - * that have always been emulated by the kernel. PFA11 and iWMMXt overlap - * on coprocessor 1 space though. We therefore must decide if given task - * is allowed to use CP 0 and 1 for iWMMXt, or if they should be blocked - * at all times for the prefetch exception handler to catch FPA11 opcodes - * and emulate them. The best indication to discriminate those two cases - * is the SOFT_FLOAT flag in the ELF header. + * Since the FPA coprocessor uses CP1 and CP2, and iWMMXt uses CP0 + * and CP1, we only enable access to the iWMMXt coprocessor if the + * binary is EABI or softfloat (and thus, guaranteed not to use + * FPA instructions.) */ - -#define SET_PERSONALITY(ex,ibcs2) \ -do { \ - set_personality(PER_LINUX_32BIT); \ - if (((ex).e_flags & EF_ARM_EABI_MASK) || \ - ((ex).e_flags & EF_ARM_SOFT_FLOAT)) \ - set_thread_flag(TIF_USING_IWMMXT); \ - else \ - clear_thread_flag(TIF_USING_IWMMXT); \ -} while (0) - -#endif +#define SET_PERSONALITY(ex, ibcs2) \ + do { \ + if ((ex).e_flags & EF_ARM_APCS26) { \ + set_personality(PER_LINUX); \ + } else { \ + set_personality(PER_LINUX_32BIT); \ + if (elf_hwcap & HWCAP_IWMMXT && (ex).e_flags & (EF_ARM_EABI_MASK | EF_ARM_SOFT_FLOAT)) \ + set_thread_flag(TIF_USING_IWMMXT); \ + else \ + clear_thread_flag(TIF_USING_IWMMXT); \ + } \ + } while (0) #endif diff --git a/include/asm-arm/flat.h b/include/asm-arm/flat.h index 96694647858..16f5375e57b 100644 --- a/include/asm-arm/flat.h +++ b/include/asm-arm/flat.h @@ -5,7 +5,9 @@ #ifndef __ARM_FLAT_H__ #define __ARM_FLAT_H__ -#define flat_stack_align(sp) /* nothing needed */ +/* An odd number of words will be pushed after this alignment, so + deliberately misalign the value. */ +#define flat_stack_align(sp) sp = (void *)(((unsigned long)(sp) - 4) | 4) #define flat_argvp_envp_on_stack() 1 #define flat_old_ram_flag(flags) (flags) #define flat_reloc_valid(reloc, size) ((reloc) <= (size)) diff --git a/include/asm-arm/hardware/iop3xx.h b/include/asm-arm/hardware/iop3xx.h index 1018a7486ab..13ac8a4cd01 100644 --- a/include/asm-arm/hardware/iop3xx.h +++ b/include/asm-arm/hardware/iop3xx.h @@ -168,9 +168,9 @@ extern void gpio_line_set(int line, int value); #define IOP3XX_PERCR0 (volatile u32 *)IOP3XX_REG_ADDR(0x0710) /* General Purpose I/O */ -#define IOP3XX_GPOE (volatile u32 *)IOP3XX_GPIO_REG(0x0004) -#define IOP3XX_GPID (volatile u32 *)IOP3XX_GPIO_REG(0x0008) -#define IOP3XX_GPOD (volatile u32 *)IOP3XX_GPIO_REG(0x000c) +#define IOP3XX_GPOE (volatile u32 *)IOP3XX_GPIO_REG(0x0000) +#define IOP3XX_GPID (volatile u32 *)IOP3XX_GPIO_REG(0x0004) +#define IOP3XX_GPOD (volatile u32 *)IOP3XX_GPIO_REG(0x0008) /* Timers */ #define IOP3XX_TU_TMR0 (volatile u32 *)IOP3XX_TIMER_REG(0x0000) diff --git a/include/asm-arm/io.h b/include/asm-arm/io.h index ae999fd5dc6..288f76b166d 100644 --- a/include/asm-arm/io.h +++ b/include/asm-arm/io.h @@ -75,14 +75,6 @@ extern void __readwrite_bug(const char *fn); */ #include <asm/arch/io.h> -#ifdef __io_pci -#warning machine class uses buggy __io_pci -#endif -#if defined(__arch_putb) || defined(__arch_putw) || defined(__arch_putl) || \ - defined(__arch_getb) || defined(__arch_getw) || defined(__arch_getl) -#warning machine class uses old __arch_putw or __arch_getw -#endif - /* * IO port access primitives * ------------------------- diff --git a/include/asm-arm/irq.h b/include/asm-arm/irq.h index 283af50a16c..1b882a255e3 100644 --- a/include/asm-arm/irq.h +++ b/include/asm-arm/irq.h @@ -19,7 +19,6 @@ #define NO_IRQ ((unsigned int)(-1)) #endif -struct irqaction; /* * Migration helpers @@ -37,6 +36,10 @@ struct irqaction; #define IRQT_HIGH (__IRQT_HIGHLVL) #define IRQT_PROBE IRQ_TYPE_PROBE +#ifndef __ASSEMBLY__ +struct irqaction; extern void migrate_irqs(void); #endif +#endif + diff --git a/include/asm-arm/mach/irq.h b/include/asm-arm/mach/irq.h index 0e017ecf209..eb0bfba6570 100644 --- a/include/asm-arm/mach/irq.h +++ b/include/asm-arm/mach/irq.h @@ -22,12 +22,6 @@ extern void init_FIQ(void); extern int show_fiq_list(struct seq_file *, void *); /* - * Function wrappers - */ -#define set_irq_chipdata(irq, d) set_irq_chip_data(irq, d) -#define get_irq_chipdata(irq) get_irq_chip_data(irq) - -/* * Obsolete inline function for calling irq descriptor handlers. */ static inline void desc_handle_irq(unsigned int irq, struct irq_desc *desc) @@ -44,12 +38,6 @@ void set_irq_flags(unsigned int irq, unsigned int flags); /* * This is for easy migration, but should be changed in the source */ -#define do_level_IRQ handle_level_irq -#define do_edge_IRQ handle_edge_irq -#define do_simple_IRQ handle_simple_irq -#define irqdesc irq_desc -#define irqchip irq_chip - #define do_bad_IRQ(irq,desc) \ do { \ spin_lock(&desc->lock); \ diff --git a/include/asm-arm/memory.h b/include/asm-arm/memory.h index 91d536c215d..d9bfb39adab 100644 --- a/include/asm-arm/memory.h +++ b/include/asm-arm/memory.h @@ -215,6 +215,7 @@ static inline __deprecated void *bus_to_virt(unsigned long x) * virt_addr_valid(k) indicates whether a virtual address is valid */ #ifndef CONFIG_DISCONTIGMEM + #define ARCH_PFN_OFFSET PHYS_PFN_OFFSET #define pfn_valid(pfn) ((pfn) >= PHYS_PFN_OFFSET && (pfn) < (PHYS_PFN_OFFSET + max_mapnr)) @@ -230,6 +231,7 @@ static inline __deprecated void *bus_to_virt(unsigned long x) * around in memory. */ #include <linux/numa.h> + #define arch_pfn_to_nid(pfn) PFN_TO_NID(pfn) #define arch_local_page_offset(pfn, nid) LOCAL_MAP_NR((pfn) << PAGE_SHIFT) @@ -256,6 +258,43 @@ static inline __deprecated void *bus_to_virt(unsigned long x) */ #define PHYS_TO_NID(addr) PFN_TO_NID((addr) >> PAGE_SHIFT) +/* + * Given a kaddr, ADDR_TO_MAPBASE finds the owning node of the memory + * and returns the mem_map of that node. + */ +#define ADDR_TO_MAPBASE(kaddr) NODE_MEM_MAP(KVADDR_TO_NID(kaddr)) + +/* + * Given a page frame number, find the owning node of the memory + * and returns the mem_map of that node. + */ +#define PFN_TO_MAPBASE(pfn) NODE_MEM_MAP(PFN_TO_NID(pfn)) + +#ifdef NODE_MEM_SIZE_BITS +#define NODE_MEM_SIZE_MASK ((1 << NODE_MEM_SIZE_BITS) - 1) + +/* + * Given a kernel address, find the home node of the underlying memory. + */ +#define KVADDR_TO_NID(addr) \ + (((unsigned long)(addr) - PAGE_OFFSET) >> NODE_MEM_SIZE_BITS) + +/* + * Given a page frame number, convert it to a node id. + */ +#define PFN_TO_NID(pfn) \ + (((pfn) - PHYS_PFN_OFFSET) >> (NODE_MEM_SIZE_BITS - PAGE_SHIFT)) + +/* + * Given a kaddr, LOCAL_MEM_MAP finds the owning node of the memory + * and returns the index corresponding to the appropriate page in the + * node's mem_map. + */ +#define LOCAL_MAP_NR(addr) \ + (((unsigned long)(addr) & NODE_MEM_SIZE_MASK) >> PAGE_SHIFT) + +#endif /* NODE_MEM_SIZE_BITS */ + #endif /* !CONFIG_DISCONTIGMEM */ /* diff --git a/include/asm-arm/pgtable-nommu.h b/include/asm-arm/pgtable-nommu.h index c1b264dff28..7b1c9acdf79 100644 --- a/include/asm-arm/pgtable-nommu.h +++ b/include/asm-arm/pgtable-nommu.h @@ -44,7 +44,6 @@ #define PAGE_READONLY __pgprot(0) #define PAGE_KERNEL __pgprot(0) -//extern void paging_init(struct meminfo *, struct machine_desc *); #define swapper_pg_dir ((pgd_t *) 0) #define __swp_type(x) (0) diff --git a/include/asm-arm/pgtable.h b/include/asm-arm/pgtable.h index ed8cb5963e9..b8cf2d5ec30 100644 --- a/include/asm-arm/pgtable.h +++ b/include/asm-arm/pgtable.h @@ -21,6 +21,7 @@ #include <asm/memory.h> #include <asm/arch/vmalloc.h> +#include <asm/pgtable-hwdef.h> /* * Just any arbitrary offset to the start of the vmalloc VM area: the @@ -169,9 +170,7 @@ extern void __pgd_error(const char *file, int line, unsigned long val); #define L_PTE_WRITE (1 << 5) #define L_PTE_EXEC (1 << 6) #define L_PTE_DIRTY (1 << 7) -#define L_PTE_COHERENT (1 << 9) /* I/O coherent (xsc3) */ -#define L_PTE_SHARED (1 << 10) /* shared between CPUs (v6) */ -#define L_PTE_ASID (1 << 11) /* non-global (use ASID, v6) */ +#define L_PTE_SHARED (1 << 10) /* shared(v6), coherent(xsc3) */ #ifndef __ASSEMBLY__ @@ -229,7 +228,7 @@ extern struct page *empty_zero_page; #define pfn_pte(pfn,prot) (__pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))) #define pte_none(pte) (!pte_val(pte)) -#define pte_clear(mm,addr,ptep) set_pte_at((mm),(addr),(ptep), __pte(0)) +#define pte_clear(mm,addr,ptep) set_pte_ext(ptep, __pte(0), 0) #define pte_page(pte) (pfn_to_page(pte_pfn(pte))) #define pte_offset_kernel(dir,addr) (pmd_page_vaddr(*(dir)) + __pte_index(addr)) #define pte_offset_map(dir,addr) (pmd_page_vaddr(*(dir)) + __pte_index(addr)) @@ -237,8 +236,11 @@ extern struct page *empty_zero_page; #define pte_unmap(pte) do { } while (0) #define pte_unmap_nested(pte) do { } while (0) -#define set_pte(ptep, pte) cpu_set_pte(ptep,pte) -#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval) +#define set_pte_ext(ptep,pte,ext) cpu_set_pte_ext(ptep,pte,ext) + +#define set_pte_at(mm,addr,ptep,pteval) do { \ + set_pte_ext(ptep, pteval, (addr) >= PAGE_OFFSET ? 0 : PTE_EXT_NG); \ + } while (0) /* * The following only work if pte_present() is true. diff --git a/include/asm-arm/processor.h b/include/asm-arm/processor.h index 04f4d34c631..1bbf16182d6 100644 --- a/include/asm-arm/processor.h +++ b/include/asm-arm/processor.h @@ -20,7 +20,6 @@ #ifdef __KERNEL__ #include <asm/ptrace.h> -#include <asm/procinfo.h> #include <asm/types.h> union debug_insn { @@ -104,14 +103,14 @@ extern int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags); #if __LINUX_ARM_ARCH__ >= 5 #define ARCH_HAS_PREFETCH -#define prefetch(ptr) \ - ({ \ - __asm__ __volatile__( \ - "pld\t%0" \ - : \ - : "o" (*(char *)(ptr)) \ - : "cc"); \ - }) +static inline void prefetch(const void *ptr) +{ + __asm__ __volatile__( + "pld\t%0" + : + : "o" (*(char *)ptr) + : "cc"); +} #define ARCH_HAS_PREFETCHW #define prefetchw(ptr) prefetch(ptr) diff --git a/include/asm-arm/procinfo.h b/include/asm-arm/procinfo.h index 91a31adfa8a..4d3c685075e 100644 --- a/include/asm-arm/procinfo.h +++ b/include/asm-arm/procinfo.h @@ -10,7 +10,7 @@ #ifndef __ASM_PROCINFO_H #define __ASM_PROCINFO_H -#ifndef __ASSEMBLY__ +#ifdef __KERNEL__ struct cpu_tlb_fns; struct cpu_user_fns; @@ -42,19 +42,8 @@ struct proc_info_list { struct cpu_cache_fns *cache; }; -extern unsigned int elf_hwcap; - -#endif /* __ASSEMBLY__ */ - -#define HWCAP_SWP 1 -#define HWCAP_HALF 2 -#define HWCAP_THUMB 4 -#define HWCAP_26BIT 8 /* Play it safe */ -#define HWCAP_FAST_MULT 16 -#define HWCAP_FPA 32 -#define HWCAP_VFP 64 -#define HWCAP_EDSP 128 -#define HWCAP_JAVA 256 -#define HWCAP_IWMMXT 512 - +#else /* __KERNEL__ */ +#include <asm/elf.h> +#warning "Please include asm/elf.h instead" +#endif /* __KERNEL__ */ #endif diff --git a/include/asm-arm/setup.h b/include/asm-arm/setup.h index aa4b5782f0c..e5407392afc 100644 --- a/include/asm-arm/setup.h +++ b/include/asm-arm/setup.h @@ -14,55 +14,57 @@ #ifndef __ASMARM_SETUP_H #define __ASMARM_SETUP_H +#include <asm/types.h> + #define COMMAND_LINE_SIZE 1024 /* The list ends with an ATAG_NONE node. */ #define ATAG_NONE 0x00000000 struct tag_header { - u32 size; - u32 tag; + __u32 size; + __u32 tag; }; /* The list must start with an ATAG_CORE node */ #define ATAG_CORE 0x54410001 struct tag_core { - u32 flags; /* bit 0 = read-only */ - u32 pagesize; - u32 rootdev; + __u32 flags; /* bit 0 = read-only */ + __u32 pagesize; + __u32 rootdev; }; /* it is allowed to have multiple ATAG_MEM nodes */ #define ATAG_MEM 0x54410002 struct tag_mem32 { - u32 size; - u32 start; /* physical start address */ + __u32 size; + __u32 start; /* physical start address */ }; /* VGA text type displays */ #define ATAG_VIDEOTEXT 0x54410003 struct tag_videotext { - u8 x; - u8 y; - u16 video_page; - u8 video_mode; - u8 video_cols; - u16 video_ega_bx; - u8 video_lines; - u8 video_isvga; - u16 video_points; + __u8 x; + __u8 y; + __u16 video_page; + __u8 video_mode; + __u8 video_cols; + __u16 video_ega_bx; + __u8 video_lines; + __u8 video_isvga; + __u16 video_points; }; /* describes how the ramdisk will be used in kernel */ #define ATAG_RAMDISK 0x54410004 struct tag_ramdisk { - u32 flags; /* bit 0 = load, bit 1 = prompt */ - u32 size; /* decompressed ramdisk size in _kilo_ bytes */ - u32 start; /* starting block of floppy-based RAM disk image */ + __u32 flags; /* bit 0 = load, bit 1 = prompt */ + __u32 size; /* decompressed ramdisk size in _kilo_ bytes */ + __u32 start; /* starting block of floppy-based RAM disk image */ }; /* describes where the compressed ramdisk image lives (virtual address) */ @@ -76,23 +78,23 @@ struct tag_ramdisk { #define ATAG_INITRD2 0x54420005 struct tag_initrd { - u32 start; /* physical start address */ - u32 size; /* size of compressed ramdisk image in bytes */ + __u32 start; /* physical start address */ + __u32 size; /* size of compressed ramdisk image in bytes */ }; /* board serial number. "64 bits should be enough for everybody" */ #define ATAG_SERIAL 0x54410006 struct tag_serialnr { - u32 low; - u32 high; + __u32 low; + __u32 high; }; /* board revision */ #define ATAG_REVISION 0x54410007 struct tag_revision { - u32 rev; + __u32 rev; }; /* initial values for vesafb-type framebuffers. see struct screen_info @@ -101,20 +103,20 @@ struct tag_revision { #define ATAG_VIDEOLFB 0x54410008 struct tag_videolfb { - u16 lfb_width; - u16 lfb_height; - u16 lfb_depth; - u16 lfb_linelength; - u32 lfb_base; - u32 lfb_size; - u8 red_size; - u8 red_pos; - u8 green_size; - u8 green_pos; - u8 blue_size; - u8 blue_pos; - u8 rsvd_size; - u8 rsvd_pos; + __u16 lfb_width; + __u16 lfb_height; + __u16 lfb_depth; + __u16 lfb_linelength; + __u32 lfb_base; + __u32 lfb_size; + __u8 red_size; + __u8 red_pos; + __u8 green_size; + __u8 green_pos; + __u8 blue_size; + __u8 blue_pos; + __u8 rsvd_size; + __u8 rsvd_pos; }; /* command line: \0 terminated string */ @@ -128,17 +130,17 @@ struct tag_cmdline { #define ATAG_ACORN 0x41000101 struct tag_acorn { - u32 memc_control_reg; - u32 vram_pages; - u8 sounddefault; - u8 adfsdrives; + __u32 memc_control_reg; + __u32 vram_pages; + __u8 sounddefault; + __u8 adfsdrives; }; /* footbridge memory clock, see arch/arm/mach-footbridge/arch.c */ #define ATAG_MEMCLK 0x41000402 struct tag_memclk { - u32 fmemclk; + __u32 fmemclk; }; struct tag { @@ -167,24 +169,26 @@ struct tag { }; struct tagtable { - u32 tag; + __u32 tag; int (*parse)(const struct tag *); }; -#define __tag __attribute_used__ __attribute__((__section__(".taglist.init"))) -#define __tagtable(tag, fn) \ -static struct tagtable __tagtable_##fn __tag = { tag, fn } - #define tag_member_present(tag,member) \ ((unsigned long)(&((struct tag *)0L)->member + 1) \ <= (tag)->hdr.size * 4) -#define tag_next(t) ((struct tag *)((u32 *)(t) + (t)->hdr.size)) +#define tag_next(t) ((struct tag *)((__u32 *)(t) + (t)->hdr.size)) #define tag_size(type) ((sizeof(struct tag_header) + sizeof(struct type)) >> 2) #define for_each_tag(t,base) \ for (t = base; t->hdr.size; t = tag_next(t)) +#ifdef __KERNEL__ + +#define __tag __attribute_used__ __attribute__((__section__(".taglist.init"))) +#define __tagtable(tag, fn) \ +static struct tagtable __tagtable_##fn __tag = { tag, fn } + /* * Memory map description */ @@ -217,4 +221,6 @@ struct early_params { static struct early_params __early_##fn __attribute_used__ \ __attribute__((__section__(".early_param.init"))) = { name, fn } +#endif /* __KERNEL__ */ + #endif diff --git a/include/asm-arm/system.h b/include/asm-arm/system.h index f05fbe31576..aa223fc546a 100644 --- a/include/asm-arm/system.h +++ b/include/asm-arm/system.h @@ -73,6 +73,7 @@ #ifndef __ASSEMBLY__ #include <linux/linkage.h> +#include <linux/irqflags.h> struct thread_info; struct task_struct; @@ -139,23 +140,44 @@ static inline int cpu_is_xsc3(void) #define cpu_is_xscale() 1 #endif -#define set_cr(x) \ - __asm__ __volatile__( \ - "mcr p15, 0, %0, c1, c0, 0 @ set CR" \ - : : "r" (x) : "cc") - -#define get_cr() \ - ({ \ - unsigned int __val; \ - __asm__ __volatile__( \ - "mrc p15, 0, %0, c1, c0, 0 @ get CR" \ - : "=r" (__val) : : "cc"); \ - __val; \ - }) - extern unsigned long cr_no_alignment; /* defined in entry-armv.S */ extern unsigned long cr_alignment; /* defined in entry-armv.S */ +static inline unsigned int get_cr(void) +{ + unsigned int val; + asm("mrc p15, 0, %0, c1, c0, 0 @ get CR" : "=r" (val) : : "cc"); + return val; +} + +static inline void set_cr(unsigned int val) +{ + asm volatile("mcr p15, 0, %0, c1, c0, 0 @ set CR" + : : "r" (val) : "cc"); +} + +#ifndef CONFIG_SMP +extern void adjust_cr(unsigned long mask, unsigned long set); +#endif + +#define CPACC_FULL(n) (3 << (n * 2)) +#define CPACC_SVC(n) (1 << (n * 2)) +#define CPACC_DISABLE(n) (0 << (n * 2)) + +static inline unsigned int get_copro_access(void) +{ + unsigned int val; + asm("mrc p15, 0, %0, c1, c0, 2 @ get copro access" + : "=r" (val) : : "cc"); + return val; +} + +static inline void set_copro_access(unsigned int val) +{ + asm volatile("mcr p15, 0, %0, c1, c0, 2 @ set copro access" + : : "r" (val) : "cc"); +} + #define UDBG_UNDEFINED (1 << 0) #define UDBG_SYSCALL (1 << 1) #define UDBG_BADABORT (1 << 2) @@ -211,8 +233,6 @@ static inline void sched_cacheflush(void) { } -#include <linux/irqflags.h> - #ifdef CONFIG_SMP #define smp_mb() mb() diff --git a/include/asm-arm/termbits.h b/include/asm-arm/termbits.h index bbc6e1d24d3..a3f4fe1742d 100644 --- a/include/asm-arm/termbits.h +++ b/include/asm-arm/termbits.h @@ -15,6 +15,18 @@ struct termios { cc_t c_cc[NCCS]; /* control characters */ }; +struct ktermios { + tcflag_t c_iflag; /* input mode flags */ + tcflag_t c_oflag; /* output mode flags */ + tcflag_t c_cflag; /* control mode flags */ + tcflag_t c_lflag; /* local mode flags */ + cc_t c_line; /* line discipline */ + cc_t c_cc[NCCS]; /* control characters */ + speed_t c_ispeed; /* input speed */ + speed_t c_ospeed; /* output speed */ +}; + + /* c_cc characters */ #define VINTR 0 #define VQUIT 1 diff --git a/include/asm-arm/thread_info.h b/include/asm-arm/thread_info.h index f28b236139e..5014794f9eb 100644 --- a/include/asm-arm/thread_info.h +++ b/include/asm-arm/thread_info.h @@ -94,8 +94,18 @@ static inline struct thread_info *current_thread_info(void) return (struct thread_info *)(sp & ~(THREAD_SIZE - 1)); } -extern struct thread_info *alloc_thread_info(struct task_struct *task); -extern void free_thread_info(struct thread_info *); +/* thread information allocation */ +#ifdef CONFIG_DEBUG_STACK_USAGE +#define alloc_thread_info(tsk) \ + ((struct thread_info *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, \ + THREAD_SIZE_ORDER)) +#else +#define alloc_thread_info(tsk) \ + ((struct thread_info *)__get_free_pages(GFP_KERNEL, THREAD_SIZE_ORDER)) +#endif + +#define free_thread_info(info) \ + free_pages((unsigned long)info, THREAD_SIZE_ORDER); #define thread_saved_pc(tsk) \ ((unsigned long)(pc_pointer(task_thread_info(tsk)->cpu_context.pc))) @@ -137,6 +147,7 @@ extern void iwmmxt_task_switch(struct thread_info *); #define TIF_POLLING_NRFLAG 16 #define TIF_USING_IWMMXT 17 #define TIF_MEMDIE 18 +#define TIF_FREEZE 19 #define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME) #define _TIF_SIGPENDING (1 << TIF_SIGPENDING) @@ -144,6 +155,7 @@ extern void iwmmxt_task_switch(struct thread_info *); #define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE) #define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG) #define _TIF_USING_IWMMXT (1 << TIF_USING_IWMMXT) +#define _TIF_FREEZE (1 << TIF_FREEZE) /* * Change these and you break ASM code in entry-common.S diff --git a/include/asm-arm/unistd.h b/include/asm-arm/unistd.h index 14a87eec5a2..97e7060000c 100644 --- a/include/asm-arm/unistd.h +++ b/include/asm-arm/unistd.h @@ -347,6 +347,31 @@ #define __NR_mbind (__NR_SYSCALL_BASE+319) #define __NR_get_mempolicy (__NR_SYSCALL_BASE+320) #define __NR_set_mempolicy (__NR_SYSCALL_BASE+321) +#define __NR_openat (__NR_SYSCALL_BASE+322) +#define __NR_mkdirat (__NR_SYSCALL_BASE+323) +#define __NR_mknodat (__NR_SYSCALL_BASE+324) +#define __NR_fchownat (__NR_SYSCALL_BASE+325) +#define __NR_futimesat (__NR_SYSCALL_BASE+326) +#define __NR_fstatat64 (__NR_SYSCALL_BASE+327) +#define __NR_unlinkat (__NR_SYSCALL_BASE+328) +#define __NR_renameat (__NR_SYSCALL_BASE+329) +#define __NR_linkat (__NR_SYSCALL_BASE+330) +#define __NR_symlinkat (__NR_SYSCALL_BASE+331) +#define __NR_readlinkat (__NR_SYSCALL_BASE+332) +#define __NR_fchmodat (__NR_SYSCALL_BASE+333) +#define __NR_faccessat (__NR_SYSCALL_BASE+334) + /* 335 for pselect6 */ + /* 336 for ppoll */ +#define __NR_unshare (__NR_SYSCALL_BASE+337) +#define __NR_set_robust_list (__NR_SYSCALL_BASE+338) +#define __NR_get_robust_list (__NR_SYSCALL_BASE+339) +#define __NR_splice (__NR_SYSCALL_BASE+340) +#define __NR_arm_sync_file_range (__NR_SYSCALL_BASE+341) +#define __NR_tee (__NR_SYSCALL_BASE+342) +#define __NR_vmsplice (__NR_SYSCALL_BASE+343) +#define __NR_move_pages (__NR_SYSCALL_BASE+344) +#define __NR_getcpu (__NR_SYSCALL_BASE+345) + /* 346 for epoll_pwait */ /* * The following SWIs are ARM private. @@ -377,156 +402,6 @@ #endif #ifdef __KERNEL__ -#include <linux/err.h> -#include <linux/linkage.h> - -#define __sys2(x) #x -#define __sys1(x) __sys2(x) - -#ifndef __syscall -#if defined(__thumb__) || defined(__ARM_EABI__) -#define __SYS_REG(name) register long __sysreg __asm__("r7") = __NR_##name; -#define __SYS_REG_LIST(regs...) "r" (__sysreg) , ##regs -#define __syscall(name) "swi\t0" -#else -#define __SYS_REG(name) -#define __SYS_REG_LIST(regs...) regs -#define __syscall(name) "swi\t" __sys1(__NR_##name) "" -#endif -#endif - -#define __syscall_return(type, res) \ -do { \ - if ((unsigned long)(res) >= (unsigned long)(-MAX_ERRNO)) { \ - errno = -(res); \ - res = -1; \ - } \ - return (type) (res); \ -} while (0) - -#define _syscall0(type,name) \ -type name(void) { \ - __SYS_REG(name) \ - register long __res_r0 __asm__("r0"); \ - long __res; \ - __asm__ __volatile__ ( \ - __syscall(name) \ - : "=r" (__res_r0) \ - : __SYS_REG_LIST() \ - : "memory" ); \ - __res = __res_r0; \ - __syscall_return(type,__res); \ -} - -#define _syscall1(type,name,type1,arg1) \ -type name(type1 arg1) { \ - __SYS_REG(name) \ - register long __r0 __asm__("r0") = (long)arg1; \ - register long __res_r0 __asm__("r0"); \ - long __res; \ - __asm__ __volatile__ ( \ - __syscall(name) \ - : "=r" (__res_r0) \ - : __SYS_REG_LIST( "0" (__r0) ) \ - : "memory" ); \ - __res = __res_r0; \ - __syscall_return(type,__res); \ -} - -#define _syscall2(type,name,type1,arg1,type2,arg2) \ -type name(type1 arg1,type2 arg2) { \ - __SYS_REG(name) \ - register long __r0 __asm__("r0") = (long)arg1; \ - register long __r1 __asm__("r1") = (long)arg2; \ - register long __res_r0 __asm__("r0"); \ - long __res; \ - __asm__ __volatile__ ( \ - __syscall(name) \ - : "=r" (__res_r0) \ - : __SYS_REG_LIST( "0" (__r0), "r" (__r1) ) \ - : "memory" ); \ - __res = __res_r0; \ - __syscall_return(type,__res); \ -} - - -#define _syscall3(type,name,type1,arg1,type2,arg2,type3,arg3) \ -type name(type1 arg1,type2 arg2,type3 arg3) { \ - __SYS_REG(name) \ - register long __r0 __asm__("r0") = (long)arg1; \ - register long __r1 __asm__("r1") = (long)arg2; \ - register long __r2 __asm__("r2") = (long)arg3; \ - register long __res_r0 __asm__("r0"); \ - long __res; \ - __asm__ __volatile__ ( \ - __syscall(name) \ - : "=r" (__res_r0) \ - : __SYS_REG_LIST( "0" (__r0), "r" (__r1), "r" (__r2) ) \ - : "memory" ); \ - __res = __res_r0; \ - __syscall_return(type,__res); \ -} - - -#define _syscall4(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4)\ -type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4) { \ - __SYS_REG(name) \ - register long __r0 __asm__("r0") = (long)arg1; \ - register long __r1 __asm__("r1") = (long)arg2; \ - register long __r2 __asm__("r2") = (long)arg3; \ - register long __r3 __asm__("r3") = (long)arg4; \ - register long __res_r0 __asm__("r0"); \ - long __res; \ - __asm__ __volatile__ ( \ - __syscall(name) \ - : "=r" (__res_r0) \ - : __SYS_REG_LIST( "0" (__r0), "r" (__r1), "r" (__r2), "r" (__r3) ) \ - : "memory" ); \ - __res = __res_r0; \ - __syscall_return(type,__res); \ -} - - -#define _syscall5(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5) \ -type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) { \ - __SYS_REG(name) \ - register long __r0 __asm__("r0") = (long)arg1; \ - register long __r1 __asm__("r1") = (long)arg2; \ - register long __r2 __asm__("r2") = (long)arg3; \ - register long __r3 __asm__("r3") = (long)arg4; \ - register long __r4 __asm__("r4") = (long)arg5; \ - register long __res_r0 __asm__("r0"); \ - long __res; \ - __asm__ __volatile__ ( \ - __syscall(name) \ - : "=r" (__res_r0) \ - : __SYS_REG_LIST( "0" (__r0), "r" (__r1), "r" (__r2), \ - "r" (__r3), "r" (__r4) ) \ - : "memory" ); \ - __res = __res_r0; \ - __syscall_return(type,__res); \ -} - -#define _syscall6(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5,type6,arg6) \ -type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5, type6 arg6) { \ - __SYS_REG(name) \ - register long __r0 __asm__("r0") = (long)arg1; \ - register long __r1 __asm__("r1") = (long)arg2; \ - register long __r2 __asm__("r2") = (long)arg3; \ - register long __r3 __asm__("r3") = (long)arg4; \ - register long __r4 __asm__("r4") = (long)arg5; \ - register long __r5 __asm__("r5") = (long)arg6; \ - register long __res_r0 __asm__("r0"); \ - long __res; \ - __asm__ __volatile__ ( \ - __syscall(name) \ - : "=r" (__res_r0) \ - : __SYS_REG_LIST( "0" (__r0), "r" (__r1), "r" (__r2), \ - "r" (__r3), "r" (__r4), "r" (__r5) ) \ - : "memory" ); \ - __res = __res_r0; \ - __syscall_return(type,__res); \ -} #define __ARCH_WANT_IPC_PARSE_VERSION #define __ARCH_WANT_STAT64 diff --git a/include/asm-arm26/cacheflush.h b/include/asm-arm26/cacheflush.h index 9c1b9c7f2eb..14ae15b6faa 100644 --- a/include/asm-arm26/cacheflush.h +++ b/include/asm-arm26/cacheflush.h @@ -22,6 +22,7 @@ #define flush_cache_all() do { } while (0) #define flush_cache_mm(mm) do { } while (0) +#define flush_cache_dup_mm(mm) do { } while (0) #define flush_cache_range(vma,start,end) do { } while (0) #define flush_cache_page(vma,vmaddr,pfn) do { } while (0) #define flush_cache_vmap(start, end) do { } while (0) diff --git a/include/asm-arm26/checksum.h b/include/asm-arm26/checksum.h index d4256d5f3a7..f2b4b0a403b 100644 --- a/include/asm-arm26/checksum.h +++ b/include/asm-arm26/checksum.h @@ -23,7 +23,7 @@ * * it's best to have buff aligned on a 32-bit boundary */ -unsigned int csum_partial(const unsigned char * buff, int len, unsigned int sum); +__wsum csum_partial(const void *buff, int len, __wsum sum); /* * the same as csum_partial, but copies from src while it @@ -33,26 +33,18 @@ unsigned int csum_partial(const unsigned char * buff, int len, unsigned int sum) * better 64-bit) boundary */ -unsigned int -csum_partial_copy_nocheck(const char *src, char *dst, int len, int sum); +__wsum +csum_partial_copy_nocheck(const void *src, void *dst, int len, __wsum sum); -unsigned int -csum_partial_copy_from_user(const char __user *src, char *dst, int len, int sum, int *err_ptr); - -/* - * This is the old (and unsafe) way of doing checksums, a warning message will - * be printed if it is used and an exception occurs. - * - * this functions should go away after some time. - */ -#define csum_partial_copy(src,dst,len,sum) csum_partial_copy_nocheck(src,dst,len,sum) +__wsum +csum_partial_copy_from_user(const void __user *src, void *dst, int len, __wsum sum, int *err_ptr); /* * This is a version of ip_compute_csum() optimized for IP headers, * which always checksum on 4 octet boundaries. */ -static inline unsigned short -ip_fast_csum(unsigned char * iph, unsigned int ihl) +static inline __sum16 +ip_fast_csum(const void *iph, unsigned int ihl) { unsigned int sum, tmp1; @@ -78,14 +70,13 @@ ip_fast_csum(unsigned char * iph, unsigned int ihl) : "=r" (sum), "=r" (iph), "=r" (ihl), "=r" (tmp1) : "1" (iph), "2" (ihl) : "cc"); - return sum; + return (__force __sum16)sum; } /* * Fold a partial checksum without adding pseudo headers */ -static inline unsigned int -csum_fold(unsigned int sum) +static inline __sum16 csum_fold(__wsum sum) { __asm__( "adds %0, %1, %1, lsl #16 @ csum_fold \n\ @@ -93,12 +84,12 @@ csum_fold(unsigned int sum) : "=r" (sum) : "r" (sum) : "cc"); - return (~sum) >> 16; + return (__force __sum16)(~(__force u32)sum >> 16); } -static inline unsigned int -csum_tcpudp_nofold(unsigned long saddr, unsigned long daddr, unsigned short len, - unsigned int proto, unsigned int sum) +static inline __wsum +csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len, + unsigned short proto, __wsum sum) { __asm__( "adds %0, %1, %2 @ csum_tcpudp_nofold \n\ @@ -107,7 +98,7 @@ csum_tcpudp_nofold(unsigned long saddr, unsigned long daddr, unsigned short len, adcs %0, %0, %5 \n\ adc %0, %0, #0" : "=&r"(sum) - : "r" (sum), "r" (daddr), "r" (saddr), "r" (ntohs(len)), "Ir" (ntohs(proto)) + : "r" (sum), "r" (daddr), "r" (saddr), "r" (htons(len)), "Ir" (htons(proto)) : "cc"); return sum; } @@ -115,9 +106,9 @@ csum_tcpudp_nofold(unsigned long saddr, unsigned long daddr, unsigned short len, * computes the checksum of the TCP/UDP pseudo-header * returns a 16-bit checksum, already complemented */ -static inline unsigned short int -csum_tcpudp_magic(unsigned long saddr, unsigned long daddr, unsigned short len, - unsigned int proto, unsigned int sum) +static inline __sum16 +csum_tcpudp_magic(__be32 saddr, __be32 daddr, unsigned short len, + unsigned short proto, __wsum sum) { __asm__( "adds %0, %1, %2 @ csum_tcpudp_magic \n\ @@ -129,9 +120,9 @@ csum_tcpudp_magic(unsigned long saddr, unsigned long daddr, unsigned short len, addcs %0, %0, #0x10000 \n\ mvn %0, %0" : "=&r"(sum) - : "r" (sum), "r" (daddr), "r" (saddr), "r" (ntohs(len)), "Ir" (ntohs(proto)) + : "r" (sum), "r" (daddr), "r" (saddr), "r" (htons(len)), "Ir" (htons(proto)) : "cc"); - return sum >> 16; + return (__force __sum16)((__force u32)sum >> 16); } @@ -139,20 +130,20 @@ csum_tcpudp_magic(unsigned long saddr, unsigned long daddr, unsigned short len, * this routine is used for miscellaneous IP-like checksums, mainly * in icmp.c */ -static inline unsigned short -ip_compute_csum(unsigned char * buff, int len) +static inline __sum16 +ip_compute_csum(const void *buff, int len) { return csum_fold(csum_partial(buff, len, 0)); } #define _HAVE_ARCH_IPV6_CSUM -extern unsigned long -__csum_ipv6_magic(struct in6_addr *saddr, struct in6_addr *daddr, __u32 len, - __u32 proto, unsigned int sum); +extern __wsum +__csum_ipv6_magic(const struct in6_addr *saddr, const struct in6_addr *daddr, __be32 len, + __be32 proto, __wsum sum); -static inline unsigned short int -csum_ipv6_magic(struct in6_addr *saddr, struct in6_addr *daddr, __u32 len, - unsigned short proto, unsigned int sum) +static inline __sum16 +csum_ipv6_magic(const struct in6_addr *saddr, const struct in6_addr *daddr, __u32 len, + unsigned short proto, __wsum sum) { return csum_fold(__csum_ipv6_magic(saddr, daddr, htonl(len), htonl(proto), sum)); diff --git a/include/asm-arm26/device.h b/include/asm-arm26/device.h new file mode 100644 index 00000000000..d8f9872b0e2 --- /dev/null +++ b/include/asm-arm26/device.h @@ -0,0 +1,7 @@ +/* + * Arch specific extensions to struct device + * + * This file is released under the GPLv2 + */ +#include <asm-generic/device.h> + diff --git a/include/asm-arm26/pgalloc.h b/include/asm-arm26/pgalloc.h index 6437167b1ff..7725af3ddb4 100644 --- a/include/asm-arm26/pgalloc.h +++ b/include/asm-arm26/pgalloc.h @@ -15,7 +15,7 @@ #include <asm/tlbflush.h> #include <linux/slab.h> -extern kmem_cache_t *pte_cache; +extern struct kmem_cache *pte_cache; static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long addr){ return kmem_cache_alloc(pte_cache, GFP_KERNEL); diff --git a/include/asm-arm26/setup.h b/include/asm-arm26/setup.h index 6348931be65..1a867b4e8d5 100644 --- a/include/asm-arm26/setup.h +++ b/include/asm-arm26/setup.h @@ -16,6 +16,8 @@ #define COMMAND_LINE_SIZE 1024 +#ifdef __KERNEL__ + /* The list ends with an ATAG_NONE node. */ #define ATAG_NONE 0x00000000 @@ -202,4 +204,6 @@ struct meminfo { extern struct meminfo meminfo; +#endif /* __KERNEL__ */ + #endif diff --git a/include/asm-arm26/termbits.h b/include/asm-arm26/termbits.h index bbc6e1d24d3..a3f4fe1742d 100644 --- a/include/asm-arm26/termbits.h +++ b/include/asm-arm26/termbits.h @@ -15,6 +15,18 @@ struct termios { cc_t c_cc[NCCS]; /* control characters */ }; +struct ktermios { + tcflag_t c_iflag; /* input mode flags */ + tcflag_t c_oflag; /* output mode flags */ + tcflag_t c_cflag; /* control mode flags */ + tcflag_t c_lflag; /* local mode flags */ + cc_t c_line; /* line discipline */ + cc_t c_cc[NCCS]; /* control characters */ + speed_t c_ispeed; /* input speed */ + speed_t c_ospeed; /* output speed */ +}; + + /* c_cc characters */ #define VINTR 0 #define VQUIT 1 diff --git a/include/asm-arm26/unistd.h b/include/asm-arm26/unistd.h index 25a5eead85b..4c3b919177e 100644 --- a/include/asm-arm26/unistd.h +++ b/include/asm-arm26/unistd.h @@ -311,139 +311,6 @@ #define __ARM_NR_usr26 (__ARM_NR_BASE+3) #ifdef __KERNEL__ -#include <linux/err.h> -#include <linux/linkage.h> - -#define __sys2(x) #x -#define __sys1(x) __sys2(x) - -#ifndef __syscall -#define __syscall(name) "swi\t" __sys1(__NR_##name) "" -#endif - -#define __syscall_return(type, res) \ -do { \ - if ((unsigned long)(res) >= (unsigned long)-MAX_ERRNO) { \ - errno = -(res); \ - res = -1; \ - } \ - return (type) (res); \ -} while (0) - -#define _syscall0(type,name) \ -type name(void) { \ - register long __res_r0 __asm__("r0"); \ - long __res; \ - __asm__ __volatile__ ( \ - __syscall(name) \ - : "=r" (__res_r0) \ - : \ - : "lr"); \ - __res = __res_r0; \ - __syscall_return(type,__res); \ -} - -#define _syscall1(type,name,type1,arg1) \ -type name(type1 arg1) { \ - register long __r0 __asm__("r0") = (long)arg1; \ - register long __res_r0 __asm__("r0"); \ - long __res; \ - __asm__ __volatile__ ( \ - __syscall(name) \ - : "=r" (__res_r0) \ - : "r" (__r0) \ - : "lr"); \ - __res = __res_r0; \ - __syscall_return(type,__res); \ -} - -#define _syscall2(type,name,type1,arg1,type2,arg2) \ -type name(type1 arg1,type2 arg2) { \ - register long __r0 __asm__("r0") = (long)arg1; \ - register long __r1 __asm__("r1") = (long)arg2; \ - register long __res_r0 __asm__("r0"); \ - long __res; \ - __asm__ __volatile__ ( \ - __syscall(name) \ - : "=r" (__res_r0) \ - : "r" (__r0),"r" (__r1) \ - : "lr"); \ - __res = __res_r0; \ - __syscall_return(type,__res); \ -} - - -#define _syscall3(type,name,type1,arg1,type2,arg2,type3,arg3) \ -type name(type1 arg1,type2 arg2,type3 arg3) { \ - register long __r0 __asm__("r0") = (long)arg1; \ - register long __r1 __asm__("r1") = (long)arg2; \ - register long __r2 __asm__("r2") = (long)arg3; \ - register long __res_r0 __asm__("r0"); \ - long __res; \ - __asm__ __volatile__ ( \ - __syscall(name) \ - : "=r" (__res_r0) \ - : "r" (__r0),"r" (__r1),"r" (__r2) \ - : "lr"); \ - __res = __res_r0; \ - __syscall_return(type,__res); \ -} - - -#define _syscall4(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4)\ -type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4) { \ - register long __r0 __asm__("r0") = (long)arg1; \ - register long __r1 __asm__("r1") = (long)arg2; \ - register long __r2 __asm__("r2") = (long)arg3; \ - register long __r3 __asm__("r3") = (long)arg4; \ - register long __res_r0 __asm__("r0"); \ - long __res; \ - __asm__ __volatile__ ( \ - __syscall(name) \ - : "=r" (__res_r0) \ - : "r" (__r0),"r" (__r1),"r" (__r2),"r" (__r3) \ - : "lr"); \ - __res = __res_r0; \ - __syscall_return(type,__res); \ -} - - -#define _syscall5(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5) \ -type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) { \ - register long __r0 __asm__("r0") = (long)arg1; \ - register long __r1 __asm__("r1") = (long)arg2; \ - register long __r2 __asm__("r2") = (long)arg3; \ - register long __r3 __asm__("r3") = (long)arg4; \ - register long __r4 __asm__("r4") = (long)arg5; \ - register long __res_r0 __asm__("r0"); \ - long __res; \ - __asm__ __volatile__ ( \ - __syscall(name) \ - : "=r" (__res_r0) \ - : "r" (__r0),"r" (__r1),"r" (__r2),"r" (__r3),"r" (__r4) \ - : "lr"); \ - __res = __res_r0; \ - __syscall_return(type,__res); \ -} - -#define _syscall6(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5,type6,arg6) \ -type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5, type6 arg6) { \ - register long __r0 __asm__("r0") = (long)arg1; \ - register long __r1 __asm__("r1") = (long)arg2; \ - register long __r2 __asm__("r2") = (long)arg3; \ - register long __r3 __asm__("r3") = (long)arg4; \ - register long __r4 __asm__("r4") = (long)arg5; \ - register long __r5 __asm__("r5") = (long)arg6; \ - register long __res_r0 __asm__("r0"); \ - long __res; \ - __asm__ __volatile__ ( \ - __syscall(name) \ - : "=r" (__res_r0) \ - : "r" (__r0),"r" (__r1),"r" (__r2),"r" (__r3), "r" (__r4),"r" (__r5) \ - : "lr"); \ - __res = __res_r0; \ - __syscall_return(type,__res); \ -} #define __ARCH_WANT_IPC_PARSE_VERSION #define __ARCH_WANT_OLD_READDIR diff --git a/include/asm-avr32/arch-at32ap/at32ap7000.h b/include/asm-avr32/arch-at32ap/at32ap7000.h new file mode 100644 index 00000000000..ba85e04553d --- /dev/null +++ b/include/asm-avr32/arch-at32ap/at32ap7000.h @@ -0,0 +1,33 @@ +/* + * Pin definitions for AT32AP7000. + * + * Copyright (C) 2006 Atmel Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#ifndef __ASM_ARCH_AT32AP7000_H__ +#define __ASM_ARCH_AT32AP7000_H__ + +#define GPIO_PERIPH_A 0 +#define GPIO_PERIPH_B 1 + +#define NR_GPIO_CONTROLLERS 4 + +/* + * Pin numbers identifying specific GPIO pins on the chip. They can + * also be converted to IRQ numbers by passing them through + * gpio_to_irq(). + */ +#define GPIO_PIOA_BASE (0) +#define GPIO_PIOB_BASE (GPIO_PIOA_BASE + 32) +#define GPIO_PIOC_BASE (GPIO_PIOB_BASE + 32) +#define GPIO_PIOD_BASE (GPIO_PIOC_BASE + 32) + +#define GPIO_PIN_PA(N) (GPIO_PIOA_BASE + (N)) +#define GPIO_PIN_PB(N) (GPIO_PIOB_BASE + (N)) +#define GPIO_PIN_PC(N) (GPIO_PIOC_BASE + (N)) +#define GPIO_PIN_PD(N) (GPIO_PIOD_BASE + (N)) + +#endif /* __ASM_ARCH_AT32AP7000_H__ */ diff --git a/include/asm-avr32/arch-at32ap/at91rm9200_pdc.h b/include/asm-avr32/arch-at32ap/at91_pdc.h index ce1150d4438..79d6e02fa45 100644 --- a/include/asm-avr32/arch-at32ap/at91rm9200_pdc.h +++ b/include/asm-avr32/arch-at32ap/at91_pdc.h @@ -1,5 +1,5 @@ /* - * include/asm-arm/arch-at91rm9200/at91rm9200_pdc.h + * include/asm-arm/arch-at91rm9200/at91_pdc.h * * Copyright (C) 2005 Ivan Kokshaysky * Copyright (C) SAN People @@ -13,8 +13,8 @@ * (at your option) any later version. */ -#ifndef AT91RM9200_PDC_H -#define AT91RM9200_PDC_H +#ifndef AT91_PDC_H +#define AT91_PDC_H #define AT91_PDC_RPR 0x100 /* Receive Pointer Register */ #define AT91_PDC_RCR 0x104 /* Receive Counter Register */ diff --git a/include/asm-avr32/arch-at32ap/board.h b/include/asm-avr32/arch-at32ap/board.h index a39b3e999f1..b120ee030c8 100644 --- a/include/asm-avr32/arch-at32ap/board.h +++ b/include/asm-avr32/arch-at32ap/board.h @@ -21,10 +21,7 @@ void at32_map_usart(unsigned int hw_id, unsigned int line); struct platform_device *at32_add_device_usart(unsigned int id); struct eth_platform_data { - u8 valid; - u8 mii_phy_addr; u8 is_rmii; - u8 hw_addr[6]; }; struct platform_device * at32_add_device_eth(unsigned int id, struct eth_platform_data *data); diff --git a/include/asm-avr32/arch-at32ap/portmux.h b/include/asm-avr32/arch-at32ap/portmux.h index 4d50421262a..83c69057132 100644 --- a/include/asm-avr32/arch-at32ap/portmux.h +++ b/include/asm-avr32/arch-at32ap/portmux.h @@ -7,10 +7,20 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ -#ifndef __ASM_AVR32_AT32_PORTMUX_H__ -#define __ASM_AVR32_AT32_PORTMUX_H__ +#ifndef __ASM_ARCH_PORTMUX_H__ +#define __ASM_ARCH_PORTMUX_H__ -void portmux_set_func(unsigned int portmux_id, unsigned int pin_id, - unsigned int function_id); +/* + * Set up pin multiplexing, called from board init only. + * + * The following flags determine the initial state of the pin. + */ +#define AT32_GPIOF_PULLUP 0x00000001 /* Enable pull-up */ +#define AT32_GPIOF_OUTPUT 0x00000002 /* Enable output driver */ +#define AT32_GPIOF_HIGH 0x00000004 /* Set output high */ + +void at32_select_periph(unsigned int pin, unsigned int periph, + unsigned long flags); +void at32_select_gpio(unsigned int pin, unsigned long flags); -#endif /* __ASM_AVR32_AT32_PORTMUX_H__ */ +#endif /* __ASM_ARCH_PORTMUX_H__ */ diff --git a/include/asm-avr32/cacheflush.h b/include/asm-avr32/cacheflush.h index f1bf1708980..dfaaa88cd41 100644 --- a/include/asm-avr32/cacheflush.h +++ b/include/asm-avr32/cacheflush.h @@ -87,6 +87,7 @@ void invalidate_icache_region(void *start, size_t len); */ #define flush_cache_all() do { } while (0) #define flush_cache_mm(mm) do { } while (0) +#define flush_cache_dup_mm(mm) do { } while (0) #define flush_cache_range(vma, start, end) do { } while (0) #define flush_cache_page(vma, vmaddr, pfn) do { } while (0) #define flush_cache_vmap(start, end) do { } while (0) diff --git a/include/asm-avr32/checksum.h b/include/asm-avr32/checksum.h index 41b7af09edc..af9d53f0f5d 100644 --- a/include/asm-avr32/checksum.h +++ b/include/asm-avr32/checksum.h @@ -20,8 +20,7 @@ * * it's best to have buff aligned on a 32-bit boundary */ -unsigned int csum_partial(const unsigned char * buff, int len, - unsigned int sum); +__wsum csum_partial(const void *buff, int len, __wsum sum); /* * the same as csum_partial, but copies from src while it @@ -30,8 +29,8 @@ unsigned int csum_partial(const unsigned char * buff, int len, * here even more important to align src and dst on a 32-bit (or even * better 64-bit) boundary */ -unsigned int csum_partial_copy_generic(const char *src, char *dst, int len, - int sum, int *src_err_ptr, +__wsum csum_partial_copy_generic(const void *src, void *dst, int len, + __wsum sum, int *src_err_ptr, int *dst_err_ptr); /* @@ -42,17 +41,17 @@ unsigned int csum_partial_copy_generic(const char *src, char *dst, int len, * verify_area(). */ static inline -unsigned int csum_partial_copy_nocheck(const char *src, char *dst, - int len, int sum) +__wsum csum_partial_copy_nocheck(const void *src, void *dst, + int len, __wsum sum) { return csum_partial_copy_generic(src, dst, len, sum, NULL, NULL); } static inline -unsigned int csum_partial_copy_from_user (const char __user *src, char *dst, - int len, int sum, int *err_ptr) +__wsum csum_partial_copy_from_user(const void __user *src, void *dst, + int len, __wsum sum, int *err_ptr) { - return csum_partial_copy_generic((const char __force *)src, dst, len, + return csum_partial_copy_generic((const void __force *)src, dst, len, sum, err_ptr, NULL); } @@ -60,8 +59,7 @@ unsigned int csum_partial_copy_from_user (const char __user *src, char *dst, * This is a version of ip_compute_csum() optimized for IP headers, * which always checksum on 4 octet boundaries. */ -static inline unsigned short ip_fast_csum(unsigned char *iph, - unsigned int ihl) +static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl) { unsigned int sum, tmp; @@ -90,14 +88,14 @@ static inline unsigned short ip_fast_csum(unsigned char *iph, : "=r"(sum), "=r"(iph), "=r"(ihl), "=r"(tmp) : "1"(iph), "2"(ihl) : "memory", "cc"); - return sum; + return (__force __sum16)sum; } /* * Fold a partial checksum */ -static inline unsigned int csum_fold(unsigned int sum) +static inline __sum16 csum_fold(__wsum sum) { unsigned int tmp; @@ -109,21 +107,20 @@ static inline unsigned int csum_fold(unsigned int sum) : "=&r"(sum), "=&r"(tmp) : "0"(sum)); - return ~sum; + return (__force __sum16)~sum; } -static inline unsigned long csum_tcpudp_nofold(unsigned long saddr, - unsigned long daddr, +static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len, unsigned short proto, - unsigned int sum) + __wsum sum) { asm(" add %0, %1\n" " adc %0, %0, %2\n" " adc %0, %0, %3\n" " acr %0" : "=r"(sum) - : "r"(daddr), "r"(saddr), "r"(ntohs(len) | (proto << 16)), + : "r"(daddr), "r"(saddr), "r"(len + proto), "0"(sum) : "cc"); @@ -134,11 +131,10 @@ static inline unsigned long csum_tcpudp_nofold(unsigned long saddr, * computes the checksum of the TCP/UDP pseudo-header * returns a 16-bit checksum, already complemented */ -static inline unsigned short int csum_tcpudp_magic(unsigned long saddr, - unsigned long daddr, +static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr, unsigned short len, unsigned short proto, - unsigned int sum) + __wsum sum) { return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum)); } @@ -148,7 +144,7 @@ static inline unsigned short int csum_tcpudp_magic(unsigned long saddr, * in icmp.c */ -static inline unsigned short ip_compute_csum(unsigned char * buff, int len) +static inline __sum16 ip_compute_csum(const void *buff, int len) { return csum_fold(csum_partial(buff, len, 0)); } diff --git a/include/asm-avr32/device.h b/include/asm-avr32/device.h new file mode 100644 index 00000000000..d8f9872b0e2 --- /dev/null +++ b/include/asm-avr32/device.h @@ -0,0 +1,7 @@ +/* + * Arch specific extensions to struct device + * + * This file is released under the GPLv2 + */ +#include <asm-generic/device.h> + diff --git a/include/asm-avr32/dma-mapping.h b/include/asm-avr32/dma-mapping.h index 4c40cb41cdf..5c01e27f0b4 100644 --- a/include/asm-avr32/dma-mapping.h +++ b/include/asm-avr32/dma-mapping.h @@ -8,7 +8,8 @@ #include <asm/cacheflush.h> #include <asm/io.h> -extern void dma_cache_sync(void *vaddr, size_t size, int direction); +extern void dma_cache_sync(struct device *dev, void *vaddr, size_t size, + int direction); /* * Return whether the given device DMA address mask can be supported @@ -108,7 +109,7 @@ static inline dma_addr_t dma_map_single(struct device *dev, void *cpu_addr, size_t size, enum dma_data_direction direction) { - dma_cache_sync(cpu_addr, size, direction); + dma_cache_sync(dev, cpu_addr, size, direction); return virt_to_bus(cpu_addr); } @@ -210,7 +211,7 @@ dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, sg[i].dma_address = page_to_bus(sg[i].page) + sg[i].offset; virt = page_address(sg[i].page) + sg[i].offset; - dma_cache_sync(virt, sg[i].length, direction); + dma_cache_sync(dev, virt, sg[i].length, direction); } return nents; @@ -255,14 +256,14 @@ static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size, enum dma_data_direction direction) { - dma_cache_sync(bus_to_virt(dma_handle), size, direction); + dma_cache_sync(dev, bus_to_virt(dma_handle), size, direction); } static inline void dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, size_t size, enum dma_data_direction direction) { - dma_cache_sync(bus_to_virt(dma_handle), size, direction); + dma_cache_sync(dev, bus_to_virt(dma_handle), size, direction); } /** @@ -285,7 +286,7 @@ dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int i; for (i = 0; i < nents; i++) { - dma_cache_sync(page_address(sg[i].page) + sg[i].offset, + dma_cache_sync(dev, page_address(sg[i].page) + sg[i].offset, sg[i].length, direction); } } @@ -297,7 +298,7 @@ dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int i; for (i = 0; i < nents; i++) { - dma_cache_sync(page_address(sg[i].page) + sg[i].offset, + dma_cache_sync(dev, page_address(sg[i].page) + sg[i].offset, sg[i].length, direction); } } @@ -307,7 +308,7 @@ dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) -static inline int dma_is_consistent(dma_addr_t dma_addr) +static inline int dma_is_consistent(struct device *dev, dma_addr_t dma_addr) { return 1; } diff --git a/include/asm-avr32/pgalloc.h b/include/asm-avr32/pgalloc.h index 7492cfb92ce..bb82e70cde8 100644 --- a/include/asm-avr32/pgalloc.h +++ b/include/asm-avr32/pgalloc.h @@ -28,7 +28,7 @@ static __inline__ void pmd_populate(struct mm_struct *mm, pmd_t *pmd, static __inline__ pgd_t *pgd_alloc(struct mm_struct *mm) { unsigned int pgd_size = (USER_PTRS_PER_PGD * sizeof(pgd_t)); - pgd_t *pgd = (pgd_t *)kmalloc(pgd_size, GFP_KERNEL); + pgd_t *pgd = kmalloc(pgd_size, GFP_KERNEL); if (pgd) memset(pgd, 0, pgd_size); diff --git a/include/asm-avr32/setup.h b/include/asm-avr32/setup.h index 10193da4113..0a5224245e4 100644 --- a/include/asm-avr32/setup.h +++ b/include/asm-avr32/setup.h @@ -13,6 +13,8 @@ #define COMMAND_LINE_SIZE 256 +#ifdef __KERNEL__ + /* Magic number indicating that a tag table is present */ #define ATAG_MAGIC 0xa2a25441 @@ -138,4 +140,6 @@ void chip_enable_sdram(void); #endif /* !__ASSEMBLY__ */ +#endif /* __KERNEL__ */ + #endif /* __ASM_AVR32_SETUP_H__ */ diff --git a/include/asm-avr32/termbits.h b/include/asm-avr32/termbits.h index 9dc6eacafa3..c215fafdae4 100644 --- a/include/asm-avr32/termbits.h +++ b/include/asm-avr32/termbits.h @@ -17,6 +17,17 @@ struct termios { cc_t c_cc[NCCS]; /* control characters */ }; +struct ktermios { + tcflag_t c_iflag; /* input mode flags */ + tcflag_t c_oflag; /* output mode flags */ + tcflag_t c_cflag; /* control mode flags */ + tcflag_t c_lflag; /* local mode flags */ + cc_t c_line; /* line discipline */ + cc_t c_cc[NCCS]; /* control characters */ + speed_t c_ispeed; /* input speed */ + speed_t c_ospeed; /* output speed */ +}; + /* c_cc characters */ #define VINTR 0 #define VQUIT 1 diff --git a/include/asm-avr32/types.h b/include/asm-avr32/types.h index 3f47db9675a..2bff153a32e 100644 --- a/include/asm-avr32/types.h +++ b/include/asm-avr32/types.h @@ -57,11 +57,6 @@ typedef unsigned long long u64; typedef u32 dma_addr_t; -#ifdef CONFIG_LBD -typedef u64 sector_t; -#define HAVE_SECTOR_T -#endif - #endif /* __ASSEMBLY__ */ #endif /* __KERNEL__ */ diff --git a/include/asm-cris/arch-v10/bitops.h b/include/asm-cris/arch-v10/bitops.h index b73f5396e5a..be85f6de25d 100644 --- a/include/asm-cris/arch-v10/bitops.h +++ b/include/asm-cris/arch-v10/bitops.h @@ -10,7 +10,7 @@ * number. They differ in that the first function also inverts all bits * in the input. */ -extern inline unsigned long cris_swapnwbrlz(unsigned long w) +static inline unsigned long cris_swapnwbrlz(unsigned long w) { /* Let's just say we return the result in the same register as the input. Saying we clobber the input but can return the result @@ -26,7 +26,7 @@ extern inline unsigned long cris_swapnwbrlz(unsigned long w) return res; } -extern inline unsigned long cris_swapwbrlz(unsigned long w) +static inline unsigned long cris_swapwbrlz(unsigned long w) { unsigned res; __asm__ ("swapwbr %0 \n\t" @@ -40,7 +40,7 @@ extern inline unsigned long cris_swapwbrlz(unsigned long w) * ffz = Find First Zero in word. Undefined if no zero exists, * so code should check against ~0UL first.. */ -extern inline unsigned long ffz(unsigned long w) +static inline unsigned long ffz(unsigned long w) { return cris_swapnwbrlz(w); } @@ -51,7 +51,7 @@ extern inline unsigned long ffz(unsigned long w) * * Undefined if no bit exists, so code should check against 0 first. */ -extern inline unsigned long __ffs(unsigned long word) +static inline unsigned long __ffs(unsigned long word) { return cris_swapnwbrlz(~word); } @@ -65,7 +65,7 @@ extern inline unsigned long __ffs(unsigned long word) * differs in spirit from the above ffz (man ffs). */ -extern inline unsigned long kernel_ffs(unsigned long w) +static inline unsigned long kernel_ffs(unsigned long w) { return w ? cris_swapwbrlz (w) + 1 : 0; } diff --git a/include/asm-cris/arch-v10/checksum.h b/include/asm-cris/arch-v10/checksum.h index 633f234f336..b8000c5d7fe 100644 --- a/include/asm-cris/arch-v10/checksum.h +++ b/include/asm-cris/arch-v10/checksum.h @@ -8,11 +8,11 @@ * to split all of those into 16-bit components, then add. */ -static inline unsigned int -csum_tcpudp_nofold(unsigned long saddr, unsigned long daddr, unsigned short len, - unsigned short proto, unsigned int sum) +static inline __wsum +csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len, + unsigned short proto, __wsum sum) { - int res; + __wsum res; __asm__ ("add.d %2, %0\n\t" "ax\n\t" "add.d %3, %0\n\t" @@ -21,7 +21,7 @@ csum_tcpudp_nofold(unsigned long saddr, unsigned long daddr, unsigned short len, "ax\n\t" "addq 0, %0\n" : "=r" (res) - : "0" (sum), "r" (daddr), "r" (saddr), "r" ((ntohs(len) << 16) + (proto << 8))); + : "0" (sum), "r" (daddr), "r" (saddr), "r" ((len + proto) << 8)); return res; } diff --git a/include/asm-cris/arch-v32/checksum.h b/include/asm-cris/arch-v32/checksum.h index 97ef89efea6..e5dcfce6e0d 100644 --- a/include/asm-cris/arch-v32/checksum.h +++ b/include/asm-cris/arch-v32/checksum.h @@ -9,11 +9,11 @@ * checksum. Which means it would be necessary to split all those into * 16-bit components and then add. */ -static inline unsigned int -csum_tcpudp_nofold(unsigned long saddr, unsigned long daddr, - unsigned short len, unsigned short proto, unsigned int sum) +static inline __wsum +csum_tcpudp_nofold(__be32 saddr, __be32 daddr, + unsigned short len, unsigned short proto, __wsum sum) { - int res; + __wsum res; __asm__ __volatile__ ("add.d %2, %0\n\t" "addc %3, %0\n\t" @@ -21,7 +21,7 @@ csum_tcpudp_nofold(unsigned long saddr, unsigned long daddr, "addc 0, %0\n\t" : "=r" (res) : "0" (sum), "r" (daddr), "r" (saddr), \ - "r" ((ntohs(len) << 16) + (proto << 8))); + "r" ((len + proto) << 8)); return res; } diff --git a/include/asm-cris/cacheflush.h b/include/asm-cris/cacheflush.h index 72cc71dffe7..01af2de27c5 100644 --- a/include/asm-cris/cacheflush.h +++ b/include/asm-cris/cacheflush.h @@ -9,6 +9,7 @@ */ #define flush_cache_all() do { } while (0) #define flush_cache_mm(mm) do { } while (0) +#define flush_cache_dup_mm(mm) do { } while (0) #define flush_cache_range(vma, start, end) do { } while (0) #define flush_cache_page(vma, vmaddr, pfn) do { } while (0) #define flush_dcache_page(page) do { } while (0) diff --git a/include/asm-cris/checksum.h b/include/asm-cris/checksum.h index 26a7719bbb8..180dbf2757b 100644 --- a/include/asm-cris/checksum.h +++ b/include/asm-cris/checksum.h @@ -17,7 +17,7 @@ * * it's best to have buff aligned on a 32-bit boundary */ -unsigned int csum_partial(const unsigned char * buff, int len, unsigned int sum); +__wsum csum_partial(const void *buff, int len, __wsum sum); /* * the same as csum_partial, but copies from src while it @@ -27,26 +27,23 @@ unsigned int csum_partial(const unsigned char * buff, int len, unsigned int sum) * better 64-bit) boundary */ -unsigned int csum_partial_copy_nocheck(const char *src, char *dst, - int len, unsigned int sum); +__wsum csum_partial_copy_nocheck(const void *src, void *dst, + int len, __wsum sum); /* * Fold a partial checksum into a word */ -static inline unsigned int csum_fold(unsigned int sum) +static inline __sum16 csum_fold(__wsum csum) { - /* the while loop is unnecessary really, it's always enough with two - iterations */ - - while(sum >> 16) - sum = (sum & 0xffff) + (sum >> 16); /* add in end-around carry */ - - return ~sum; + u32 sum = (__force u32)csum; + sum = (sum & 0xffff) + (sum >> 16); /* add in end-around carry */ + sum = (sum & 0xffff) + (sum >> 16); /* add in end-around carry */ + return (__force __sum16)~sum; } -extern unsigned int csum_partial_copy_from_user(const char *src, char *dst, - int len, unsigned int sum, +extern __wsum csum_partial_copy_from_user(const void __user *src, void *dst, + int len, __wsum sum, int *errptr); /* @@ -55,8 +52,7 @@ extern unsigned int csum_partial_copy_from_user(const char *src, char *dst, * */ -static inline unsigned short ip_fast_csum(unsigned char * iph, - unsigned int ihl) +static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl) { return csum_fold(csum_partial(iph, ihl * 4, 0)); } @@ -66,11 +62,10 @@ static inline unsigned short ip_fast_csum(unsigned char * iph, * returns a 16-bit checksum, already complemented */ -static inline unsigned short int csum_tcpudp_magic(unsigned long saddr, - unsigned long daddr, +static inline __sum16 int csum_tcpudp_magic(__be32 saddr, __be32 daddr, unsigned short len, unsigned short proto, - unsigned int sum) + __wsum sum) { return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum)); } @@ -80,7 +75,8 @@ static inline unsigned short int csum_tcpudp_magic(unsigned long saddr, * in icmp.c */ -static inline unsigned short ip_compute_csum(unsigned char * buff, int len) { +static inline __sum16 ip_compute_csum(const void *buff, int len) +{ return csum_fold (csum_partial(buff, len, 0)); } diff --git a/include/asm-cris/device.h b/include/asm-cris/device.h new file mode 100644 index 00000000000..d8f9872b0e2 --- /dev/null +++ b/include/asm-cris/device.h @@ -0,0 +1,7 @@ +/* + * Arch specific extensions to struct device + * + * This file is released under the GPLv2 + */ +#include <asm-generic/device.h> + diff --git a/include/asm-cris/dma-mapping.h b/include/asm-cris/dma-mapping.h index cbf1a98f012..662cea70152 100644 --- a/include/asm-cris/dma-mapping.h +++ b/include/asm-cris/dma-mapping.h @@ -156,10 +156,10 @@ dma_get_cache_alignment(void) return (1 << INTERNODE_CACHE_SHIFT); } -#define dma_is_consistent(d) (1) +#define dma_is_consistent(d, h) (1) static inline void -dma_cache_sync(void *vaddr, size_t size, +dma_cache_sync(struct device *dev, void *vaddr, size_t size, enum dma_data_direction direction) { } diff --git a/include/asm-cris/semaphore-helper.h b/include/asm-cris/semaphore-helper.h index dbd0f30b85b..a8e1e6cb7cd 100644 --- a/include/asm-cris/semaphore-helper.h +++ b/include/asm-cris/semaphore-helper.h @@ -20,12 +20,12 @@ /* * These two _must_ execute atomically wrt each other. */ -extern inline void wake_one_more(struct semaphore * sem) +static inline void wake_one_more(struct semaphore * sem) { atomic_inc(&sem->waking); } -extern inline int waking_non_zero(struct semaphore *sem) +static inline int waking_non_zero(struct semaphore *sem) { unsigned long flags; int ret = 0; @@ -40,7 +40,7 @@ extern inline int waking_non_zero(struct semaphore *sem) return ret; } -extern inline int waking_non_zero_interruptible(struct semaphore *sem, +static inline int waking_non_zero_interruptible(struct semaphore *sem, struct task_struct *tsk) { int ret = 0; @@ -59,7 +59,7 @@ extern inline int waking_non_zero_interruptible(struct semaphore *sem, return ret; } -extern inline int waking_non_zero_trylock(struct semaphore *sem) +static inline int waking_non_zero_trylock(struct semaphore *sem) { int ret = 1; unsigned long flags; diff --git a/include/asm-cris/termbits.h b/include/asm-cris/termbits.h index be0836d2f28..8d8cec225fe 100644 --- a/include/asm-cris/termbits.h +++ b/include/asm-cris/termbits.h @@ -19,6 +19,17 @@ struct termios { cc_t c_cc[NCCS]; /* control characters */ }; +struct ktermios { + tcflag_t c_iflag; /* input mode flags */ + tcflag_t c_oflag; /* output mode flags */ + tcflag_t c_cflag; /* control mode flags */ + tcflag_t c_lflag; /* local mode flags */ + cc_t c_line; /* line discipline */ + cc_t c_cc[NCCS]; /* control characters */ + speed_t c_ispeed; /* input speed */ + speed_t c_ospeed; /* output speed */ +}; + /* c_cc characters */ #define VINTR 0 #define VQUIT 1 diff --git a/include/asm-frv/bitops.h b/include/asm-frv/bitops.h index 1f70d47148b..f8560edf59f 100644 --- a/include/asm-frv/bitops.h +++ b/include/asm-frv/bitops.h @@ -256,6 +256,50 @@ int __ffs(unsigned long x) return 31 - bit; } +/* + * special slimline version of fls() for calculating ilog2_u32() + * - note: no protection against n == 0 + */ +#define ARCH_HAS_ILOG2_U32 +static inline __attribute__((const)) +int __ilog2_u32(u32 n) +{ + int bit; + asm("scan %1,gr0,%0" : "=r"(bit) : "r"(n)); + return 31 - bit; +} + +/* + * special slimline version of fls64() for calculating ilog2_u64() + * - note: no protection against n == 0 + */ +#define ARCH_HAS_ILOG2_U64 +static inline __attribute__((const)) +int __ilog2_u64(u64 n) +{ + union { + u64 ll; + struct { u32 h, l; }; + } _; + int bit, x, y; + + _.ll = n; + + asm(" subcc %3,gr0,gr0,icc0 \n" + " ckeq icc0,cc4 \n" + " cscan.p %3,gr0,%0 ,cc4,0 \n" + " setlos #63,%1 \n" + " cscan.p %4,gr0,%0 ,cc4,1 \n" + " setlos #31,%2 \n" + " csub.p %1,%0,%0 ,cc4,0 \n" + " csub %2,%0,%0 ,cc4,1 \n" + : "=&r"(bit), "=r"(x), "=r"(y) + : "0r"(_.h), "r"(_.l) + : "icc0", "cc4" + ); + return bit; +} + #include <asm-generic/bitops/sched.h> #include <asm-generic/bitops/hweight.h> diff --git a/include/asm-frv/cacheflush.h b/include/asm-frv/cacheflush.h index eaa5826bc1c..02500405a6f 100644 --- a/include/asm-frv/cacheflush.h +++ b/include/asm-frv/cacheflush.h @@ -20,6 +20,7 @@ */ #define flush_cache_all() do {} while(0) #define flush_cache_mm(mm) do {} while(0) +#define flush_cache_dup_mm(mm) do {} while(0) #define flush_cache_range(mm, start, end) do {} while(0) #define flush_cache_page(vma, vmaddr, pfn) do {} while(0) #define flush_cache_vmap(start, end) do {} while(0) diff --git a/include/asm-frv/checksum.h b/include/asm-frv/checksum.h index 42bf0db2287..9b168985018 100644 --- a/include/asm-frv/checksum.h +++ b/include/asm-frv/checksum.h @@ -26,7 +26,7 @@ * * it's best to have buff aligned on a 32-bit boundary */ -unsigned int csum_partial(const unsigned char * buff, int len, unsigned int sum); +__wsum csum_partial(const void *buff, int len, __wsum sum); /* * the same as csum_partial, but copies from src while it @@ -35,7 +35,7 @@ unsigned int csum_partial(const unsigned char * buff, int len, unsigned int sum) * here even more important to align src and dst on a 32-bit (or even * better 64-bit) boundary */ -unsigned int csum_partial_copy(const char *src, char *dst, int len, int sum); +__wsum csum_partial_copy_nocheck(const void *src, void *dst, int len, __wsum sum); /* * the same as csum_partial_copy, but copies from user space. @@ -43,11 +43,8 @@ unsigned int csum_partial_copy(const char *src, char *dst, int len, int sum); * here even more important to align src and dst on a 32-bit (or even * better 64-bit) boundary */ -extern unsigned int csum_partial_copy_from_user(const char __user *src, char *dst, - int len, int sum, int *csum_err); - -#define csum_partial_copy_nocheck(src, dst, len, sum) \ - csum_partial_copy((src), (dst), (len), (sum)) +extern __wsum csum_partial_copy_from_user(const void __user *src, void *dst, + int len, __wsum sum, int *csum_err); /* * This is a version of ip_compute_csum() optimized for IP headers, @@ -55,7 +52,7 @@ extern unsigned int csum_partial_copy_from_user(const char __user *src, char *ds * */ static inline -unsigned short ip_fast_csum(unsigned char *iph, unsigned int ihl) +__sum16 ip_fast_csum(const void *iph, unsigned int ihl) { unsigned int tmp, inc, sum = 0; @@ -81,13 +78,13 @@ unsigned short ip_fast_csum(unsigned char *iph, unsigned int ihl) : "icc0", "icc1" ); - return ~sum; + return (__force __sum16)~sum; } /* * Fold a partial checksum */ -static inline unsigned int csum_fold(unsigned int sum) +static inline __sum16 csum_fold(__wsum sum) { unsigned int tmp; @@ -100,16 +97,16 @@ static inline unsigned int csum_fold(unsigned int sum) : "0"(sum) ); - return ~sum; + return (__force __sum16)~sum; } /* * computes the checksum of the TCP/UDP pseudo-header * returns a 16-bit checksum, already complemented */ -static inline unsigned int -csum_tcpudp_nofold(unsigned long saddr, unsigned long daddr, unsigned short len, - unsigned short proto, unsigned int sum) +static inline __wsum +csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len, + unsigned short proto, __wsum sum) { asm(" addcc %1,%0,%0,icc0 \n" " addxcc %2,%0,%0,icc0 \n" @@ -122,9 +119,9 @@ csum_tcpudp_nofold(unsigned long saddr, unsigned long daddr, unsigned short len, return sum; } -static inline unsigned short int -csum_tcpudp_magic(unsigned long saddr, unsigned long daddr, unsigned short len, - unsigned short proto, unsigned int sum) +static inline __sum16 +csum_tcpudp_magic(__be32 saddr, __be32 daddr, unsigned short len, + unsigned short proto, __wsum sum) { return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum)); } @@ -133,12 +130,12 @@ csum_tcpudp_magic(unsigned long saddr, unsigned long daddr, unsigned short len, * this routine is used for miscellaneous IP-like checksums, mainly * in icmp.c */ -extern unsigned short ip_compute_csum(const unsigned char * buff, int len); +extern __sum16 ip_compute_csum(const void *buff, int len); #define _HAVE_ARCH_IPV6_CSUM -static inline unsigned short int -csum_ipv6_magic(struct in6_addr *saddr, struct in6_addr *daddr, - __u32 len, unsigned short proto, unsigned int sum) +static inline __sum16 +csum_ipv6_magic(const struct in6_addr *saddr, const struct in6_addr *daddr, + __u32 len, unsigned short proto, __wsum sum) { unsigned long tmp, tmp2; @@ -177,7 +174,7 @@ csum_ipv6_magic(struct in6_addr *saddr, struct in6_addr *daddr, : "icc0" ); - return ~sum; + return (__force __sum16)~sum; } #endif /* _ASM_CHECKSUM_H */ diff --git a/include/asm-frv/device.h b/include/asm-frv/device.h new file mode 100644 index 00000000000..d8f9872b0e2 --- /dev/null +++ b/include/asm-frv/device.h @@ -0,0 +1,7 @@ +/* + * Arch specific extensions to struct device + * + * This file is released under the GPLv2 + */ +#include <asm-generic/device.h> + diff --git a/include/asm-frv/dma-mapping.h b/include/asm-frv/dma-mapping.h index e9fc1d47797..bcb2df68496 100644 --- a/include/asm-frv/dma-mapping.h +++ b/include/asm-frv/dma-mapping.h @@ -172,10 +172,10 @@ int dma_get_cache_alignment(void) return 1 << L1_CACHE_SHIFT; } -#define dma_is_consistent(d) (1) +#define dma_is_consistent(d, h) (1) static inline -void dma_cache_sync(void *vaddr, size_t size, +void dma_cache_sync(struct device *dev, void *vaddr, size_t size, enum dma_data_direction direction) { flush_write_buffers(); diff --git a/include/asm-frv/highmem.h b/include/asm-frv/highmem.h index 0f390f41f81..ff4d6cdeb15 100644 --- a/include/asm-frv/highmem.h +++ b/include/asm-frv/highmem.h @@ -115,7 +115,7 @@ static inline void *kmap_atomic(struct page *page, enum km_type type) { unsigned long paddr; - inc_preempt_count(); + pagefault_disable(); paddr = page_to_phys(page); switch (type) { @@ -170,8 +170,7 @@ static inline void kunmap_atomic(void *kvaddr, enum km_type type) default: BUG(); } - dec_preempt_count(); - preempt_check_resched(); + pagefault_enable(); } #endif /* !__ASSEMBLY__ */ diff --git a/include/asm-frv/param.h b/include/asm-frv/param.h index 168381ebb41..365653b1726 100644 --- a/include/asm-frv/param.h +++ b/include/asm-frv/param.h @@ -18,6 +18,5 @@ #endif #define MAXHOSTNAMELEN 64 /* max length of hostname */ -#define COMMAND_LINE_SIZE 512 #endif /* _ASM_PARAM_H */ diff --git a/include/asm-frv/setup.h b/include/asm-frv/setup.h index 0d293b9a585..afd787ceede 100644 --- a/include/asm-frv/setup.h +++ b/include/asm-frv/setup.h @@ -12,6 +12,10 @@ #ifndef _ASM_SETUP_H #define _ASM_SETUP_H +#define COMMAND_LINE_SIZE 512 + +#ifdef __KERNEL__ + #include <linux/init.h> #ifndef __ASSEMBLY__ @@ -22,4 +26,6 @@ extern unsigned long __initdata num_mappedpages; #endif /* !__ASSEMBLY__ */ +#endif /* __KERNEL__ */ + #endif /* _ASM_SETUP_H */ diff --git a/include/asm-frv/termbits.h b/include/asm-frv/termbits.h index 74f20d6e292..2d6d389cff4 100644 --- a/include/asm-frv/termbits.h +++ b/include/asm-frv/termbits.h @@ -17,6 +17,17 @@ struct termios { cc_t c_cc[NCCS]; /* control characters */ }; +struct ktermios { + tcflag_t c_iflag; /* input mode flags */ + tcflag_t c_oflag; /* output mode flags */ + tcflag_t c_cflag; /* control mode flags */ + tcflag_t c_lflag; /* local mode flags */ + cc_t c_line; /* line discipline */ + cc_t c_cc[NCCS]; /* control characters */ + speed_t c_ispeed; /* input speed */ + speed_t c_ospeed; /* output speed */ +}; + /* c_cc characters */ #define VINTR 0 #define VQUIT 1 diff --git a/include/asm-frv/thread_info.h b/include/asm-frv/thread_info.h index d66c48e6ef1..d881f518e6a 100644 --- a/include/asm-frv/thread_info.h +++ b/include/asm-frv/thread_info.h @@ -116,6 +116,7 @@ register struct thread_info *__current_thread_info asm("gr15"); #define TIF_RESTORE_SIGMASK 6 /* restore signal mask in do_signal() */ #define TIF_POLLING_NRFLAG 16 /* true if poll_idle() is polling TIF_NEED_RESCHED */ #define TIF_MEMDIE 17 /* OOM killer killed process */ +#define TIF_FREEZE 18 /* freezing for suspend */ #define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE) #define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME) @@ -125,6 +126,7 @@ register struct thread_info *__current_thread_info asm("gr15"); #define _TIF_IRET (1 << TIF_IRET) #define _TIF_RESTORE_SIGMASK (1 << TIF_RESTORE_SIGMASK) #define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG) +#define _TIF_FREEZE (1 << TIF_FREEZE) #define _TIF_WORK_MASK 0x0000FFFE /* work to do on interrupt/exception return */ #define _TIF_ALLWORK_MASK 0x0000FFFF /* work to do on any return to u-space */ diff --git a/include/asm-frv/unistd.h b/include/asm-frv/unistd.h index 725e854928c..584c0417ae4 100644 --- a/include/asm-frv/unistd.h +++ b/include/asm-frv/unistd.h @@ -320,125 +320,6 @@ #ifdef __KERNEL__ #define NR_syscalls 310 -#include <linux/err.h> - -/* - * process the return value of a syscall, consigning it to one of two possible fates - * - user-visible error numbers are in the range -1 - -4095: see <asm-frv/errno.h> - */ -#undef __syscall_return -#define __syscall_return(type, res) \ -do { \ - unsigned long __sr2 = (res); \ - if (__builtin_expect(__sr2 >= (unsigned long)(-MAX_ERRNO), 0)) { \ - errno = (-__sr2); \ - __sr2 = ~0UL; \ - } \ - return (type) __sr2; \ -} while (0) - -/* XXX - _foo needs to be __foo, while __NR_bar could be _NR_bar. */ - -#undef _syscall0 -#define _syscall0(type,name) \ -type name(void) \ -{ \ - register unsigned long __scnum __asm__ ("gr7") = (__NR_##name); \ - register unsigned long __sc0 __asm__ ("gr8"); \ - __asm__ __volatile__ ("tira gr0,#0" \ - : "=r" (__sc0) \ - : "r" (__scnum)); \ - __syscall_return(type, __sc0); \ -} - -#undef _syscall1 -#define _syscall1(type,name,type1,arg1) \ -type name(type1 arg1) \ -{ \ - register unsigned long __scnum __asm__ ("gr7") = (__NR_##name); \ - register unsigned long __sc0 __asm__ ("gr8") = (unsigned long) arg1; \ - __asm__ __volatile__ ("tira gr0,#0" \ - : "+r" (__sc0) \ - : "r" (__scnum)); \ - __syscall_return(type, __sc0); \ -} - -#undef _syscall2 -#define _syscall2(type,name,type1,arg1,type2,arg2) \ -type name(type1 arg1,type2 arg2) \ -{ \ - register unsigned long __scnum __asm__ ("gr7") = (__NR_##name); \ - register unsigned long __sc0 __asm__ ("gr8") = (unsigned long) arg1; \ - register unsigned long __sc1 __asm__ ("gr9") = (unsigned long) arg2; \ - __asm__ __volatile__ ("tira gr0,#0" \ - : "+r" (__sc0) \ - : "r" (__scnum), "r" (__sc1)); \ - __syscall_return(type, __sc0); \ -} - -#undef _syscall3 -#define _syscall3(type,name,type1,arg1,type2,arg2,type3,arg3) \ -type name(type1 arg1,type2 arg2,type3 arg3) \ -{ \ - register unsigned long __scnum __asm__ ("gr7") = (__NR_##name); \ - register unsigned long __sc0 __asm__ ("gr8") = (unsigned long) arg1; \ - register unsigned long __sc1 __asm__ ("gr9") = (unsigned long) arg2; \ - register unsigned long __sc2 __asm__ ("gr10") = (unsigned long) arg3; \ - __asm__ __volatile__ ("tira gr0,#0" \ - : "+r" (__sc0) \ - : "r" (__scnum), "r" (__sc1), "r" (__sc2)); \ - __syscall_return(type, __sc0); \ -} - -#undef _syscall4 -#define _syscall4(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4) \ -type name (type1 arg1, type2 arg2, type3 arg3, type4 arg4) \ -{ \ - register unsigned long __scnum __asm__ ("gr7") = (__NR_##name); \ - register unsigned long __sc0 __asm__ ("gr8") = (unsigned long) arg1; \ - register unsigned long __sc1 __asm__ ("gr9") = (unsigned long) arg2; \ - register unsigned long __sc2 __asm__ ("gr10") = (unsigned long) arg3; \ - register unsigned long __sc3 __asm__ ("gr11") = (unsigned long) arg4; \ - __asm__ __volatile__ ("tira gr0,#0" \ - : "+r" (__sc0) \ - : "r" (__scnum), "r" (__sc1), "r" (__sc2), "r" (__sc3)); \ - __syscall_return(type, __sc0); \ -} - -#undef _syscall5 -#define _syscall5(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5) \ -type name (type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) \ -{ \ - register unsigned long __scnum __asm__ ("gr7") = (__NR_##name); \ - register unsigned long __sc0 __asm__ ("gr8") = (unsigned long) arg1; \ - register unsigned long __sc1 __asm__ ("gr9") = (unsigned long) arg2; \ - register unsigned long __sc2 __asm__ ("gr10") = (unsigned long) arg3; \ - register unsigned long __sc3 __asm__ ("gr11") = (unsigned long) arg4; \ - register unsigned long __sc4 __asm__ ("gr12") = (unsigned long) arg5; \ - __asm__ __volatile__ ("tira gr0,#0" \ - : "+r" (__sc0) \ - : "r" (__scnum), "r" (__sc1), "r" (__sc2), \ - "r" (__sc3), "r" (__sc4)); \ - __syscall_return(type, __sc0); \ -} - -#undef _syscall6 -#define _syscall6(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5, type6, arg6) \ -type name (type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5, type6 arg6) \ -{ \ - register unsigned long __scnum __asm__ ("gr7") = (__NR_##name); \ - register unsigned long __sc0 __asm__ ("gr8") = (unsigned long) arg1; \ - register unsigned long __sc1 __asm__ ("gr9") = (unsigned long) arg2; \ - register unsigned long __sc2 __asm__ ("gr10") = (unsigned long) arg3; \ - register unsigned long __sc3 __asm__ ("gr11") = (unsigned long) arg4; \ - register unsigned long __sc4 __asm__ ("gr12") = (unsigned long) arg5; \ - register unsigned long __sc5 __asm__ ("gr13") = (unsigned long) arg6; \ - __asm__ __volatile__ ("tira gr0,#0" \ - : "+r" (__sc0) \ - : "r" (__scnum), "r" (__sc1), "r" (__sc2), \ - "r" (__sc3), "r" (__sc4), "r" (__sc5)); \ - __syscall_return(type, __sc0); \ -} #define __ARCH_WANT_IPC_PARSE_VERSION /* #define __ARCH_WANT_OLD_READDIR */ diff --git a/include/asm-generic/Kbuild b/include/asm-generic/Kbuild index 3c06be38170..fa14f8cd30c 100644 --- a/include/asm-generic/Kbuild +++ b/include/asm-generic/Kbuild @@ -1,4 +1,3 @@ -header-y += atomic.h header-y += errno-base.h header-y += errno.h header-y += fcntl.h diff --git a/include/asm-generic/Kbuild.asm b/include/asm-generic/Kbuild.asm index a84c3d88a18..a37e95fe58d 100644 --- a/include/asm-generic/Kbuild.asm +++ b/include/asm-generic/Kbuild.asm @@ -14,6 +14,7 @@ unifdef-y += posix_types.h unifdef-y += ptrace.h unifdef-y += resource.h unifdef-y += sembuf.h +unifdef-y += setup.h unifdef-y += shmbuf.h unifdef-y += sigcontext.h unifdef-y += siginfo.h diff --git a/include/asm-generic/atomic.h b/include/asm-generic/atomic.h index 42a95d9a064..b7e4a0467cb 100644 --- a/include/asm-generic/atomic.h +++ b/include/asm-generic/atomic.h @@ -66,7 +66,7 @@ static inline void atomic_long_sub(long i, atomic_long_t *l) atomic64_sub(i, v); } -#else +#else /* BITS_PER_LONG == 64 */ typedef atomic_t atomic_long_t; @@ -113,5 +113,6 @@ static inline void atomic_long_sub(long i, atomic_long_t *l) atomic_sub(i, v); } -#endif -#endif +#endif /* BITS_PER_LONG == 64 */ + +#endif /* _ASM_GENERIC_ATOMIC_H */ diff --git a/include/asm-generic/bug.h b/include/asm-generic/bug.h index c92ae0f166f..14fae1fa87d 100644 --- a/include/asm-generic/bug.h +++ b/include/asm-generic/bug.h @@ -4,6 +4,22 @@ #include <linux/compiler.h> #ifdef CONFIG_BUG + +#ifdef CONFIG_GENERIC_BUG +#ifndef __ASSEMBLY__ +struct bug_entry { + unsigned long bug_addr; +#ifdef CONFIG_DEBUG_BUGVERBOSE + const char *file; + unsigned short line; +#endif + unsigned short flags; +}; +#endif /* __ASSEMBLY__ */ + +#define BUGFLAG_WARNING (1<<0) +#endif /* CONFIG_GENERIC_BUG */ + #ifndef HAVE_ARCH_BUG #define BUG() do { \ printk("BUG: failure at %s:%d/%s()!\n", __FILE__, __LINE__, __FUNCTION__); \ @@ -19,7 +35,7 @@ #define WARN_ON(condition) ({ \ typeof(condition) __ret_warn_on = (condition); \ if (unlikely(__ret_warn_on)) { \ - printk("BUG: warning at %s:%d/%s()\n", __FILE__, \ + printk("BUG: at %s:%d %s()\n", __FILE__, \ __LINE__, __FUNCTION__); \ dump_stack(); \ } \ diff --git a/include/asm-generic/device.h b/include/asm-generic/device.h new file mode 100644 index 00000000000..c17c9600f22 --- /dev/null +++ b/include/asm-generic/device.h @@ -0,0 +1,12 @@ +/* + * Arch specific extensions to struct device + * + * This file is released under the GPLv2 + */ +#ifndef _ASM_GENERIC_DEVICE_H +#define _ASM_GENERIC_DEVICE_H + +struct dev_archdata { +}; + +#endif /* _ASM_GENERIC_DEVICE_H */ diff --git a/include/asm-generic/dma-mapping.h b/include/asm-generic/dma-mapping.h index b541e48cc54..783ab9944d7 100644 --- a/include/asm-generic/dma-mapping.h +++ b/include/asm-generic/dma-mapping.h @@ -266,7 +266,7 @@ dma_error(dma_addr_t dma_addr) #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) -#define dma_is_consistent(d) (1) +#define dma_is_consistent(d, h) (1) static inline int dma_get_cache_alignment(void) @@ -295,7 +295,7 @@ dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle, } static inline void -dma_cache_sync(void *vaddr, size_t size, +dma_cache_sync(struct device *dev, void *vaddr, size_t size, enum dma_data_direction direction) { /* could define this in terms of the dma_cache ... operations, diff --git a/include/asm-generic/futex.h b/include/asm-generic/futex.h index df893c16031..f422df0956a 100644 --- a/include/asm-generic/futex.h +++ b/include/asm-generic/futex.h @@ -21,7 +21,7 @@ futex_atomic_op_inuser (int encoded_op, int __user *uaddr) if (! access_ok (VERIFY_WRITE, uaddr, sizeof(int))) return -EFAULT; - inc_preempt_count(); + pagefault_disable(); switch (op) { case FUTEX_OP_SET: @@ -33,7 +33,7 @@ futex_atomic_op_inuser (int encoded_op, int __user *uaddr) ret = -ENOSYS; } - dec_preempt_count(); + pagefault_enable(); if (!ret) { switch (cmp) { diff --git a/include/asm-generic/page.h b/include/asm-generic/page.h index a96b5d986b6..b55052ce233 100644 --- a/include/asm-generic/page.h +++ b/include/asm-generic/page.h @@ -4,21 +4,51 @@ #ifdef __KERNEL__ #ifndef __ASSEMBLY__ -#include <linux/compiler.h> +#include <linux/log2.h> -/* Pure 2^n version of get_order */ -static __inline__ __attribute_const__ int get_order(unsigned long size) +/* + * non-const pure 2^n version of get_order + * - the arch may override these in asm/bitops.h if they can be implemented + * more efficiently than using the arch log2 routines + * - we use the non-const log2() instead if the arch has defined one suitable + */ +#ifndef ARCH_HAS_GET_ORDER +static inline __attribute__((const)) +int __get_order(unsigned long size, int page_shift) { +#if BITS_PER_LONG == 32 && defined(ARCH_HAS_ILOG2_U32) + int order = __ilog2_u32(size) - page_shift; + return order >= 0 ? order : 0; +#elif BITS_PER_LONG == 64 && defined(ARCH_HAS_ILOG2_U64) + int order = __ilog2_u64(size) - page_shift; + return order >= 0 ? order : 0; +#else int order; - size = (size - 1) >> (PAGE_SHIFT - 1); + size = (size - 1) >> (page_shift - 1); order = -1; do { size >>= 1; order++; } while (size); return order; +#endif } +#endif + +/** + * get_order - calculate log2(pages) to hold a block of the specified size + * @n - size + * + * calculate allocation order based on the current page size + * - this can be used to initialise global variables from constant data + */ +#define get_order(n) \ +( \ + __builtin_constant_p(n) ? \ + ((n < (1UL << PAGE_SHIFT)) ? 0 : ilog2(n) - PAGE_SHIFT) : \ + __get_order(n, PAGE_SHIFT) \ + ) #endif /* __ASSEMBLY__ */ #endif /* __KERNEL__ */ diff --git a/include/asm-generic/termios.h b/include/asm-generic/termios.h index 1e58ca39592..3769e6bd63b 100644 --- a/include/asm-generic/termios.h +++ b/include/asm-generic/termios.h @@ -11,7 +11,7 @@ /* * Translate a "termio" structure into a "termios". Ugh. */ -static inline int user_termio_to_kernel_termios(struct termios *termios, +static inline int user_termio_to_kernel_termios(struct ktermios *termios, struct termio __user *termio) { unsigned short tmp; @@ -48,7 +48,7 @@ static inline int user_termio_to_kernel_termios(struct termios *termios, * Translate a "termios" structure into a "termio". Ugh. */ static inline int kernel_termios_to_user_termio(struct termio __user *termio, - struct termios *termios) + struct ktermios *termios) { if (put_user(termios->c_iflag, &termio->c_iflag) < 0 || put_user(termios->c_oflag, &termio->c_oflag) < 0 || diff --git a/include/asm-generic/vmlinux.lds.h b/include/asm-generic/vmlinux.lds.h index e60d6f21fa6..9fcc8d9fbb1 100644 --- a/include/asm-generic/vmlinux.lds.h +++ b/include/asm-generic/vmlinux.lds.h @@ -11,8 +11,8 @@ #define RODATA \ . = ALIGN(4096); \ - __start_rodata = .; \ .rodata : AT(ADDR(.rodata) - LOAD_OFFSET) { \ + VMLINUX_SYMBOL(__start_rodata) = .; \ *(.rodata) *(.rodata.*) \ *(__vermagic) /* Kernel version magic */ \ } \ @@ -35,6 +35,9 @@ VMLINUX_SYMBOL(__start_pci_fixups_enable) = .; \ *(.pci_fixup_enable) \ VMLINUX_SYMBOL(__end_pci_fixups_enable) = .; \ + VMLINUX_SYMBOL(__start_pci_fixups_resume) = .; \ + *(.pci_fixup_resume) \ + VMLINUX_SYMBOL(__end_pci_fixups_resume) = .; \ } \ \ /* RapidIO route ops */ \ @@ -124,12 +127,9 @@ VMLINUX_SYMBOL(__start___param) = .; \ *(__param) \ VMLINUX_SYMBOL(__stop___param) = .; \ + VMLINUX_SYMBOL(__end_rodata) = .; \ } \ \ - /* Unwind data binary search table */ \ - EH_FRAME_HDR \ - \ - __end_rodata = .; \ . = ALIGN(4096); #define SECURITY_INIT \ @@ -161,18 +161,6 @@ *(.kprobes.text) \ VMLINUX_SYMBOL(__kprobes_text_end) = .; -#ifdef CONFIG_STACK_UNWIND - /* Unwind data binary search table */ -#define EH_FRAME_HDR \ - .eh_frame_hdr : AT(ADDR(.eh_frame_hdr) - LOAD_OFFSET) { \ - VMLINUX_SYMBOL(__start_unwind_hdr) = .; \ - *(.eh_frame_hdr) \ - VMLINUX_SYMBOL(__end_unwind_hdr) = .; \ - } -#else -#define EH_FRAME_HDR -#endif - /* DWARF debug sections. Symbols in the DWARF debugging sections are relative to the beginning of the section so we begin them at 0. */ @@ -211,6 +199,14 @@ .stab.indexstr 0 : { *(.stab.indexstr) } \ .comment 0 : { *(.comment) } +#define BUG_TABLE \ + . = ALIGN(8); \ + __bug_table : AT(ADDR(__bug_table) - LOAD_OFFSET) { \ + __start___bug_table = .; \ + *(__bug_table) \ + __stop___bug_table = .; \ + } + #define NOTES \ .notes : { *(.note.*) } :note @@ -227,6 +223,7 @@ *(.initcall4s.init) \ *(.initcall5.init) \ *(.initcall5s.init) \ + *(.initcallrootfs.init) \ *(.initcall6.init) \ *(.initcall6s.init) \ *(.initcall7.init) \ diff --git a/include/asm-h8300/cacheflush.h b/include/asm-h8300/cacheflush.h index 1e4d95bb5ec..71210d141b6 100644 --- a/include/asm-h8300/cacheflush.h +++ b/include/asm-h8300/cacheflush.h @@ -12,6 +12,7 @@ #define flush_cache_all() #define flush_cache_mm(mm) +#define flush_cache_dup_mm(mm) do { } while (0) #define flush_cache_range(vma,a,b) #define flush_cache_page(vma,p,pfn) #define flush_dcache_page(page) diff --git a/include/asm-h8300/checksum.h b/include/asm-h8300/checksum.h index 3051931dd30..98724e12508 100644 --- a/include/asm-h8300/checksum.h +++ b/include/asm-h8300/checksum.h @@ -13,7 +13,7 @@ * * it's best to have buff aligned on a 32-bit boundary */ -unsigned int csum_partial(const unsigned char * buff, int len, unsigned int sum); +__wsum csum_partial(const void *buff, int len, __wsum sum); /* * the same as csum_partial, but copies from src while it @@ -23,7 +23,7 @@ unsigned int csum_partial(const unsigned char * buff, int len, unsigned int sum) * better 64-bit) boundary */ -unsigned int csum_partial_copy(const char *src, char *dst, int len, int sum); +__wsum csum_partial_copy_nocheck(const void *src, void *dst, int len, __wsum sum); /* @@ -33,20 +33,17 @@ unsigned int csum_partial_copy(const char *src, char *dst, int len, int sum); * better 64-bit) boundary */ -extern unsigned int csum_partial_copy_from_user(const char *src, char *dst, - int len, int sum, int *csum_err); +extern __wsum csum_partial_copy_from_user(const void __user *src, void *dst, + int len, __wsum sum, int *csum_err); -#define csum_partial_copy_nocheck(src, dst, len, sum) \ - csum_partial_copy((src), (dst), (len), (sum)) - -unsigned short ip_fast_csum(unsigned char *iph, unsigned int ihl); +__sum16 ip_fast_csum(const void *iph, unsigned int ihl); /* * Fold a partial checksum */ -static inline unsigned int csum_fold(unsigned int sum) +static inline __sum16 csum_fold(__wsum sum) { __asm__("mov.l %0,er0\n\t" "add.w e0,r0\n\t" @@ -58,7 +55,7 @@ static inline unsigned int csum_fold(unsigned int sum) : "=r"(sum) : "0"(sum) : "er0"); - return ~sum; + return (__force __sum16)~sum; } @@ -67,9 +64,9 @@ static inline unsigned int csum_fold(unsigned int sum) * returns a 16-bit checksum, already complemented */ -static inline unsigned int -csum_tcpudp_nofold(unsigned long saddr, unsigned long daddr, unsigned short len, - unsigned short proto, unsigned int sum) +static inline __wsum +csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len, + unsigned short proto, __wsum sum) { __asm__ ("sub.l er0,er0\n\t" "add.l %2,%0\n\t" @@ -88,9 +85,9 @@ csum_tcpudp_nofold(unsigned long saddr, unsigned long daddr, unsigned short len, return sum; } -static inline unsigned short int -csum_tcpudp_magic(unsigned long saddr, unsigned long daddr, unsigned short len, - unsigned short proto, unsigned int sum) +static inline __sum16 +csum_tcpudp_magic(__be32 saddr, __be32 daddr, unsigned short len, + unsigned short proto, __wsum sum) { return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum)); } @@ -100,6 +97,6 @@ csum_tcpudp_magic(unsigned long saddr, unsigned long daddr, unsigned short len, * in icmp.c */ -extern unsigned short ip_compute_csum(const unsigned char * buff, int len); +extern __sum16 ip_compute_csum(const void *buff, int len); #endif /* _H8300_CHECKSUM_H */ diff --git a/include/asm-h8300/delay.h b/include/asm-h8300/delay.h index cbccbbdd640..743beba70f8 100644 --- a/include/asm-h8300/delay.h +++ b/include/asm-h8300/delay.h @@ -9,7 +9,7 @@ * Delay routines, using a pre-computed "loops_per_second" value. */ -extern __inline__ void __delay(unsigned long loops) +static inline void __delay(unsigned long loops) { __asm__ __volatile__ ("1:\n\t" "dec.l #1,%0\n\t" @@ -27,7 +27,7 @@ extern __inline__ void __delay(unsigned long loops) extern unsigned long loops_per_jiffy; -extern __inline__ void udelay(unsigned long usecs) +static inline void udelay(unsigned long usecs) { usecs *= 4295; /* 2**32 / 1000000 */ usecs /= (loops_per_jiffy*HZ); diff --git a/include/asm-h8300/device.h b/include/asm-h8300/device.h new file mode 100644 index 00000000000..d8f9872b0e2 --- /dev/null +++ b/include/asm-h8300/device.h @@ -0,0 +1,7 @@ +/* + * Arch specific extensions to struct device + * + * This file is released under the GPLv2 + */ +#include <asm-generic/device.h> + diff --git a/include/asm-h8300/mmu_context.h b/include/asm-h8300/mmu_context.h index 855721a5dcc..5c165f7bee0 100644 --- a/include/asm-h8300/mmu_context.h +++ b/include/asm-h8300/mmu_context.h @@ -9,7 +9,7 @@ static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) { } -extern inline int +static inline int init_new_context(struct task_struct *tsk, struct mm_struct *mm) { // mm->context = virt_to_phys(mm->pgd); @@ -23,7 +23,7 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, str { } -extern inline void activate_mm(struct mm_struct *prev_mm, +static inline void activate_mm(struct mm_struct *prev_mm, struct mm_struct *next_mm) { } diff --git a/include/asm-h8300/pci.h b/include/asm-h8300/pci.h index 5edad5b70fd..0c771b05fdd 100644 --- a/include/asm-h8300/pci.h +++ b/include/asm-h8300/pci.h @@ -10,12 +10,12 @@ #define pcibios_assign_all_busses() 0 #define pcibios_scan_all_fns(a, b) 0 -extern inline void pcibios_set_master(struct pci_dev *dev) +static inline void pcibios_set_master(struct pci_dev *dev) { /* No special bus mastering setup handling */ } -extern inline void pcibios_penalize_isa_irq(int irq, int active) +static inline void pcibios_penalize_isa_irq(int irq, int active) { /* We don't do dynamic PCI IRQ allocation */ } diff --git a/include/asm-h8300/termbits.h b/include/asm-h8300/termbits.h index fa69ae00eda..6a1f4d3807b 100644 --- a/include/asm-h8300/termbits.h +++ b/include/asm-h8300/termbits.h @@ -17,6 +17,17 @@ struct termios { cc_t c_cc[NCCS]; /* control characters */ }; +struct ktermios { + tcflag_t c_iflag; /* input mode flags */ + tcflag_t c_oflag; /* output mode flags */ + tcflag_t c_cflag; /* control mode flags */ + tcflag_t c_lflag; /* local mode flags */ + cc_t c_line; /* line discipline */ + cc_t c_cc[NCCS]; /* control characters */ + speed_t c_ispeed; /* input speed */ + speed_t c_ospeed; /* output speed */ +}; + /* c_cc characters */ #define VINTR 0 #define VQUIT 1 diff --git a/include/asm-h8300/tlbflush.h b/include/asm-h8300/tlbflush.h index bbdffbeeede..9a2c5c9fd70 100644 --- a/include/asm-h8300/tlbflush.h +++ b/include/asm-h8300/tlbflush.h @@ -47,12 +47,12 @@ static inline void flush_tlb_range(struct mm_struct *mm, BUG(); } -extern inline void flush_tlb_kernel_page(unsigned long addr) +static inline void flush_tlb_kernel_page(unsigned long addr) { BUG(); } -extern inline void flush_tlb_pgtables(struct mm_struct *mm, +static inline void flush_tlb_pgtables(struct mm_struct *mm, unsigned long start, unsigned long end) { BUG(); diff --git a/include/asm-h8300/types.h b/include/asm-h8300/types.h index da2402b8654..2a8b1b2be78 100644 --- a/include/asm-h8300/types.h +++ b/include/asm-h8300/types.h @@ -55,12 +55,6 @@ typedef unsigned long long u64; typedef u32 dma_addr_t; -#define HAVE_SECTOR_T -typedef u64 sector_t; - -#define HAVE_BLKCNT_T -typedef u64 blkcnt_t; - #endif /* __KERNEL__ */ #endif /* __ASSEMBLY__ */ diff --git a/include/asm-h8300/unistd.h b/include/asm-h8300/unistd.h index 747788d629a..7ddd414f8d1 100644 --- a/include/asm-h8300/unistd.h +++ b/include/asm-h8300/unistd.h @@ -295,172 +295,6 @@ #ifdef __KERNEL__ #define NR_syscalls 289 -#include <linux/err.h> - -/* user-visible error numbers are in the range -1 - -MAX_ERRNO: see - <asm-m68k/errno.h> */ - -#define __syscall_return(type, res) \ -do { \ - if ((unsigned long)(res) >= (unsigned long)(-MAX_ERRNO)) { \ - /* avoid using res which is declared to be in register d0; \ - errno might expand to a function call and clobber it. */ \ - int __err = -(res); \ - errno = __err; \ - res = -1; \ - } \ - return (type) (res); \ -} while (0) - -#define _syscall0(type, name) \ -type name(void) \ -{ \ - register long __res __asm__("er0"); \ - __asm__ __volatile__ ("mov.l %1,er0\n\t" \ - "trapa #0\n\t" \ - : "=r" (__res) \ - : "g" (__NR_##name) \ - : "cc", "memory"); \ - __syscall_return(type, __res); \ -} - -#define _syscall1(type, name, atype, a) \ -type name(atype a) \ -{ \ - register long __res __asm__("er0"); \ - register long _a __asm__("er1"); \ - _a = (long)a; \ - __asm__ __volatile__ ("mov.l %1,er0\n\t" \ - "trapa #0\n\t" \ - : "=r" (__res) \ - : "g" (__NR_##name), \ - "g" (_a) \ - : "cc", "memory"); \ - __syscall_return(type, __res); \ -} - -#define _syscall2(type, name, atype, a, btype, b) \ -type name(atype a, btype b) \ -{ \ - register long __res __asm__("er0"); \ - register long _a __asm__("er1"); \ - register long _b __asm__("er2"); \ - _a = (long)a; \ - _b = (long)b; \ - __asm__ __volatile__ ("mov.l %1,er0\n\t" \ - "trapa #0\n\t" \ - : "=r" (__res) \ - : "g" (__NR_##name), \ - "g" (_a), \ - "g" (_b) \ - : "cc", "memory"); \ - __syscall_return(type, __res); \ -} - -#define _syscall3(type, name, atype, a, btype, b, ctype, c) \ -type name(atype a, btype b, ctype c) \ -{ \ - register long __res __asm__("er0"); \ - register long _a __asm__("er1"); \ - register long _b __asm__("er2"); \ - register long _c __asm__("er3"); \ - _a = (long)a; \ - _b = (long)b; \ - _c = (long)c; \ - __asm__ __volatile__ ("mov.l %1,er0\n\t" \ - "trapa #0\n\t" \ - : "=r" (__res) \ - : "g" (__NR_##name), \ - "g" (_a), \ - "g" (_b), \ - "g" (_c) \ - : "cc", "memory"); \ - __syscall_return(type, __res); \ -} - -#define _syscall4(type, name, atype, a, btype, b, \ - ctype, c, dtype, d) \ -type name(atype a, btype b, ctype c, dtype d) \ -{ \ - register long __res __asm__("er0"); \ - register long _a __asm__("er1"); \ - register long _b __asm__("er2"); \ - register long _c __asm__("er3"); \ - register long _d __asm__("er4"); \ - _a = (long)a; \ - _b = (long)b; \ - _c = (long)c; \ - _d = (long)d; \ - __asm__ __volatile__ ("mov.l %1,er0\n\t" \ - "trapa #0\n\t" \ - : "=r" (__res) \ - : "g" (__NR_##name), \ - "g" (_a), \ - "g" (_b), \ - "g" (_c), \ - "g" (_d) \ - : "cc", "memory"); \ - __syscall_return(type, __res); \ -} - -#define _syscall5(type, name, atype, a, btype, b, \ - ctype, c, dtype, d, etype, e) \ -type name(atype a, btype b, ctype c, dtype d, etype e) \ -{ \ - register long __res __asm__("er0"); \ - register long _a __asm__("er1"); \ - register long _b __asm__("er2"); \ - register long _c __asm__("er3"); \ - register long _d __asm__("er4"); \ - register long _e __asm__("er5"); \ - _a = (long)a; \ - _b = (long)b; \ - _c = (long)c; \ - _d = (long)d; \ - _e = (long)e; \ - __asm__ __volatile__ ("mov.l %1,er0\n\t" \ - "trapa #0\n\t" \ - : "=r" (__res) \ - : "g" (__NR_##name), \ - "g" (_a), \ - "g" (_b), \ - "g" (_c), \ - "g" (_d), \ - "g" (_e) \ - : "cc", "memory"); \ - __syscall_return(type, __res); \ -} - -#define _syscall6(type, name, atype, a, btype, b, \ - ctype, c, dtype, d, etype, e, ftype, f) \ -type name(atype a, btype b, ctype c, dtype d, etype e, ftype f) \ -{ \ - register long __res __asm__("er0"); \ - register long _a __asm__("er1"); \ - register long _b __asm__("er2"); \ - register long _c __asm__("er3"); \ - register long _d __asm__("er4"); \ - register long _e __asm__("er5"); \ - register long _f __asm__("er6"); \ - _a = (long)a; \ - _b = (long)b; \ - _c = (long)c; \ - _d = (long)d; \ - _e = (long)e; \ - _f = (long)f; \ - __asm__ __volatile__ ("mov.l %1,er0\n\t" \ - "trapa #0\n\t" \ - : "=r" (__res) \ - : "g" (__NR_##name), \ - "g" (_a), \ - "g" (_b), \ - "g" (_c), \ - "g" (_d), \ - "g" (_e) \ - "g" (_f) \ - : "cc", "memory"); \ - __syscall_return(type, __res); \ -} #define __ARCH_WANT_IPC_PARSE_VERSION #define __ARCH_WANT_OLD_READDIR diff --git a/include/asm-i386/Kbuild b/include/asm-i386/Kbuild index 147e4ac1ebf..5ae93afc67e 100644 --- a/include/asm-i386/Kbuild +++ b/include/asm-i386/Kbuild @@ -7,5 +7,4 @@ header-y += ptrace-abi.h header-y += ucontext.h unifdef-y += mtrr.h -unifdef-y += setup.h unifdef-y += vm86.h diff --git a/include/asm-i386/acpi.h b/include/asm-i386/acpi.h index c80b3a94511..7cfad93edf1 100644 --- a/include/asm-i386/acpi.h +++ b/include/asm-i386/acpi.h @@ -56,30 +56,8 @@ #define ACPI_ENABLE_IRQS() local_irq_enable() #define ACPI_FLUSH_CPU_CACHE() wbinvd() - -static inline int -__acpi_acquire_global_lock (unsigned int *lock) -{ - unsigned int old, new, val; - do { - old = *lock; - new = (((old & ~0x3) + 2) + ((old >> 1) & 0x1)); - val = cmpxchg(lock, old, new); - } while (unlikely (val != old)); - return (new < 3) ? -1 : 0; -} - -static inline int -__acpi_release_global_lock (unsigned int *lock) -{ - unsigned int old, new, val; - do { - old = *lock; - new = old & ~0x3; - val = cmpxchg(lock, old, new); - } while (unlikely (val != old)); - return old & 0x1; -} +int __acpi_acquire_global_lock(unsigned int *lock); +int __acpi_release_global_lock(unsigned int *lock); #define ACPI_ACQUIRE_GLOBAL_LOCK(GLptr, Acq) \ ((Acq) = __acpi_acquire_global_lock((unsigned int *) GLptr)) diff --git a/include/asm-i386/alternative.h b/include/asm-i386/alternative.h index b01a7ec409c..b8fa9557c53 100644 --- a/include/asm-i386/alternative.h +++ b/include/asm-i386/alternative.h @@ -4,7 +4,7 @@ #ifdef __KERNEL__ #include <asm/types.h> - +#include <linux/stddef.h> #include <linux/types.h> struct alt_instr { @@ -118,4 +118,15 @@ static inline void alternatives_smp_switch(int smp) {} #define LOCK_PREFIX "" #endif +struct paravirt_patch; +#ifdef CONFIG_PARAVIRT +void apply_paravirt(struct paravirt_patch *start, struct paravirt_patch *end); +#else +static inline void +apply_paravirt(struct paravirt_patch *start, struct paravirt_patch *end) +{} +#define __start_parainstructions NULL +#define __stop_parainstructions NULL +#endif + #endif /* _I386_ALTERNATIVE_H */ diff --git a/include/asm-i386/apic.h b/include/asm-i386/apic.h index b9529578fc3..41a44319905 100644 --- a/include/asm-i386/apic.h +++ b/include/asm-i386/apic.h @@ -37,18 +37,27 @@ extern void generic_apic_probe(void); /* * Basic functions accessing APICs. */ +#ifdef CONFIG_PARAVIRT +#include <asm/paravirt.h> +#else +#define apic_write native_apic_write +#define apic_write_atomic native_apic_write_atomic +#define apic_read native_apic_read +#endif -static __inline void apic_write(unsigned long reg, unsigned long v) +static __inline fastcall void native_apic_write(unsigned long reg, + unsigned long v) { *((volatile unsigned long *)(APIC_BASE+reg)) = v; } -static __inline void apic_write_atomic(unsigned long reg, unsigned long v) +static __inline fastcall void native_apic_write_atomic(unsigned long reg, + unsigned long v) { xchg((volatile unsigned long *)(APIC_BASE+reg), v); } -static __inline unsigned long apic_read(unsigned long reg) +static __inline fastcall unsigned long native_apic_read(unsigned long reg) { return *((volatile unsigned long *)(APIC_BASE+reg)); } diff --git a/include/asm-i386/atomic.h b/include/asm-i386/atomic.h index 51a16624252..c57441bb290 100644 --- a/include/asm-i386/atomic.h +++ b/include/asm-i386/atomic.h @@ -14,7 +14,7 @@ * on us. We need to use _exactly_ the address the user gave us, * not some alias that contains the same information. */ -typedef struct { volatile int counter; } atomic_t; +typedef struct { int counter; } atomic_t; #define ATOMIC_INIT(i) { (i) } @@ -187,9 +187,9 @@ static __inline__ int atomic_add_return(int i, atomic_t *v) /* Modern 486+ processor */ __i = i; __asm__ __volatile__( - LOCK_PREFIX "xaddl %0, %1;" - :"=r"(i) - :"m"(v->counter), "0"(i)); + LOCK_PREFIX "xaddl %0, %1" + :"+r" (i), "+m" (v->counter) + : : "memory"); return i + __i; #ifdef CONFIG_M386 diff --git a/include/asm-i386/boot.h b/include/asm-i386/boot.h index 96b228e6e79..e7686d0a841 100644 --- a/include/asm-i386/boot.h +++ b/include/asm-i386/boot.h @@ -12,4 +12,9 @@ #define EXTENDED_VGA 0xfffe /* 80x50 mode */ #define ASK_VGA 0xfffd /* ask for it at bootup */ -#endif +/* Physical address where kenrel should be loaded. */ +#define LOAD_PHYSICAL_ADDR ((CONFIG_PHYSICAL_START \ + + (CONFIG_PHYSICAL_ALIGN - 1)) \ + & ~(CONFIG_PHYSICAL_ALIGN - 1)) + +#endif /* _LINUX_BOOT_H */ diff --git a/include/asm-i386/bug.h b/include/asm-i386/bug.h index 8062cdbf258..b0fd78ca261 100644 --- a/include/asm-i386/bug.h +++ b/include/asm-i386/bug.h @@ -4,20 +4,32 @@ /* * Tell the user there is some problem. - * The offending file and line are encoded after the "officially - * undefined" opcode for parsing in the trap handler. + * The offending file and line are encoded encoded in the __bug_table section. */ #ifdef CONFIG_BUG #define HAVE_ARCH_BUG + #ifdef CONFIG_DEBUG_BUGVERBOSE -#define BUG() \ - __asm__ __volatile__( "ud2\n" \ - "\t.word %c0\n" \ - "\t.long %c1\n" \ - : : "i" (__LINE__), "i" (__FILE__)) +#define BUG() \ + do { \ + asm volatile("1:\tud2\n" \ + ".pushsection __bug_table,\"a\"\n" \ + "2:\t.long 1b, %c0\n" \ + "\t.word %c1, 0\n" \ + "\t.org 2b+%c2\n" \ + ".popsection" \ + : : "i" (__FILE__), "i" (__LINE__), \ + "i" (sizeof(struct bug_entry))); \ + for(;;) ; \ + } while(0) + #else -#define BUG() __asm__ __volatile__("ud2\n") +#define BUG() \ + do { \ + asm volatile("ud2"); \ + for(;;) ; \ + } while(0) #endif #endif diff --git a/include/asm-i386/bugs.h b/include/asm-i386/bugs.h index 592ffeeda45..38f1aebbbdb 100644 --- a/include/asm-i386/bugs.h +++ b/include/asm-i386/bugs.h @@ -21,6 +21,7 @@ #include <asm/processor.h> #include <asm/i387.h> #include <asm/msr.h> +#include <asm/paravirt.h> static int __init no_halt(char *s) { @@ -91,6 +92,9 @@ static void __init check_fpu(void) static void __init check_hlt(void) { + if (paravirt_enabled()) + return; + printk(KERN_INFO "Checking 'hlt' instruction... "); if (!boot_cpu_data.hlt_works_ok) { printk("disabled\n"); diff --git a/include/asm-i386/cacheflush.h b/include/asm-i386/cacheflush.h index 7199f7b326f..74e03c8f2e5 100644 --- a/include/asm-i386/cacheflush.h +++ b/include/asm-i386/cacheflush.h @@ -7,6 +7,7 @@ /* Caches aren't brain-dead on the intel. */ #define flush_cache_all() do { } while (0) #define flush_cache_mm(mm) do { } while (0) +#define flush_cache_dup_mm(mm) do { } while (0) #define flush_cache_range(vma, start, end) do { } while (0) #define flush_cache_page(vma, vmaddr, pfn) do { } while (0) #define flush_dcache_page(page) do { } while (0) diff --git a/include/asm-i386/checksum.h b/include/asm-i386/checksum.h index 67d3630c4e8..75194abbe8e 100644 --- a/include/asm-i386/checksum.h +++ b/include/asm-i386/checksum.h @@ -17,7 +17,7 @@ * * it's best to have buff aligned on a 32-bit boundary */ -asmlinkage unsigned int csum_partial(const unsigned char * buff, int len, unsigned int sum); +asmlinkage __wsum csum_partial(const void *buff, int len, __wsum sum); /* * the same as csum_partial, but copies from src while it @@ -27,8 +27,8 @@ asmlinkage unsigned int csum_partial(const unsigned char * buff, int len, unsign * better 64-bit) boundary */ -asmlinkage unsigned int csum_partial_copy_generic(const unsigned char *src, unsigned char *dst, - int len, int sum, int *src_err_ptr, int *dst_err_ptr); +asmlinkage __wsum csum_partial_copy_generic(const void *src, void *dst, + int len, __wsum sum, int *src_err_ptr, int *dst_err_ptr); /* * Note: when you get a NULL pointer exception here this means someone @@ -38,18 +38,18 @@ asmlinkage unsigned int csum_partial_copy_generic(const unsigned char *src, unsi * access_ok(). */ static __inline__ -unsigned int csum_partial_copy_nocheck (const unsigned char *src, unsigned char *dst, - int len, int sum) +__wsum csum_partial_copy_nocheck (const void *src, void *dst, + int len, __wsum sum) { return csum_partial_copy_generic ( src, dst, len, sum, NULL, NULL); } static __inline__ -unsigned int csum_partial_copy_from_user(const unsigned char __user *src, unsigned char *dst, - int len, int sum, int *err_ptr) +__wsum csum_partial_copy_from_user(const void __user *src, void *dst, + int len, __wsum sum, int *err_ptr) { might_sleep(); - return csum_partial_copy_generic((__force unsigned char *)src, dst, + return csum_partial_copy_generic((__force void *)src, dst, len, sum, err_ptr, NULL); } @@ -60,8 +60,7 @@ unsigned int csum_partial_copy_from_user(const unsigned char __user *src, unsign * By Jorge Cwik <jorge@laser.satlink.net>, adapted for linux by * Arnt Gulbrandsen. */ -static inline unsigned short ip_fast_csum(unsigned char * iph, - unsigned int ihl) +static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl) { unsigned int sum; @@ -89,29 +88,29 @@ static inline unsigned short ip_fast_csum(unsigned char * iph, : "=r" (sum), "=r" (iph), "=r" (ihl) : "1" (iph), "2" (ihl) : "memory"); - return(sum); + return (__force __sum16)sum; } /* * Fold a partial checksum */ -static inline unsigned int csum_fold(unsigned int sum) +static inline __sum16 csum_fold(__wsum sum) { __asm__( "addl %1, %0 ;\n" "adcl $0xffff, %0 ;\n" : "=r" (sum) - : "r" (sum << 16), "0" (sum & 0xffff0000) + : "r" ((__force u32)sum << 16), + "0" ((__force u32)sum & 0xffff0000) ); - return (~sum) >> 16; + return (__force __sum16)(~(__force u32)sum >> 16); } -static inline unsigned long csum_tcpudp_nofold(unsigned long saddr, - unsigned long daddr, - unsigned short len, - unsigned short proto, - unsigned int sum) +static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr, + unsigned short len, + unsigned short proto, + __wsum sum) { __asm__( "addl %1, %0 ;\n" @@ -119,7 +118,7 @@ static inline unsigned long csum_tcpudp_nofold(unsigned long saddr, "adcl %3, %0 ;\n" "adcl $0, %0 ;\n" : "=r" (sum) - : "g" (daddr), "g"(saddr), "g"((ntohs(len)<<16)+proto*256), "0"(sum)); + : "g" (daddr), "g"(saddr), "g"((len + proto) << 8), "0"(sum)); return sum; } @@ -127,11 +126,10 @@ static inline unsigned long csum_tcpudp_nofold(unsigned long saddr, * computes the checksum of the TCP/UDP pseudo-header * returns a 16-bit checksum, already complemented */ -static inline unsigned short int csum_tcpudp_magic(unsigned long saddr, - unsigned long daddr, +static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr, unsigned short len, unsigned short proto, - unsigned int sum) + __wsum sum) { return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum)); } @@ -141,17 +139,16 @@ static inline unsigned short int csum_tcpudp_magic(unsigned long saddr, * in icmp.c */ -static inline unsigned short ip_compute_csum(unsigned char * buff, int len) +static inline __sum16 ip_compute_csum(const void *buff, int len) { return csum_fold (csum_partial(buff, len, 0)); } #define _HAVE_ARCH_IPV6_CSUM -static __inline__ unsigned short int csum_ipv6_magic(struct in6_addr *saddr, - struct in6_addr *daddr, - __u32 len, - unsigned short proto, - unsigned int sum) +static __inline__ __sum16 csum_ipv6_magic(const struct in6_addr *saddr, + const struct in6_addr *daddr, + __u32 len, unsigned short proto, + __wsum sum) { __asm__( "addl 0(%1), %0 ;\n" @@ -176,19 +173,19 @@ static __inline__ unsigned short int csum_ipv6_magic(struct in6_addr *saddr, * Copy and checksum to user */ #define HAVE_CSUM_COPY_USER -static __inline__ unsigned int csum_and_copy_to_user(const unsigned char *src, - unsigned char __user *dst, - int len, int sum, +static __inline__ __wsum csum_and_copy_to_user(const void *src, + void __user *dst, + int len, __wsum sum, int *err_ptr) { might_sleep(); if (access_ok(VERIFY_WRITE, dst, len)) - return csum_partial_copy_generic(src, (__force unsigned char *)dst, len, sum, NULL, err_ptr); + return csum_partial_copy_generic(src, (__force void *)dst, len, sum, NULL, err_ptr); if (len) *err_ptr = -EFAULT; - return -1; /* invalid checksum */ + return (__force __wsum)-1; /* invalid checksum */ } #endif diff --git a/include/asm-i386/cpu.h b/include/asm-i386/cpu.h index b1bc7b1b64b..9d914e1e4aa 100644 --- a/include/asm-i386/cpu.h +++ b/include/asm-i386/cpu.h @@ -13,6 +13,9 @@ struct i386_cpu { extern int arch_register_cpu(int num); #ifdef CONFIG_HOTPLUG_CPU extern void arch_unregister_cpu(int); +extern int enable_cpu_hotplug; +#else +#define enable_cpu_hotplug 0 #endif DECLARE_PER_CPU(int, cpu_state); diff --git a/include/asm-i386/cpufeature.h b/include/asm-i386/cpufeature.h index d314ebb3d59..3f92b94e0d7 100644 --- a/include/asm-i386/cpufeature.h +++ b/include/asm-i386/cpufeature.h @@ -31,7 +31,7 @@ #define X86_FEATURE_PSE36 (0*32+17) /* 36-bit PSEs */ #define X86_FEATURE_PN (0*32+18) /* Processor serial number */ #define X86_FEATURE_CLFLSH (0*32+19) /* Supports the CLFLUSH instruction */ -#define X86_FEATURE_DTES (0*32+21) /* Debug Trace Store */ +#define X86_FEATURE_DS (0*32+21) /* Debug Store */ #define X86_FEATURE_ACPI (0*32+22) /* ACPI via MSR */ #define X86_FEATURE_MMX (0*32+23) /* Multimedia Extensions */ #define X86_FEATURE_FXSR (0*32+24) /* FXSAVE and FXRSTOR instructions (fast save and restore */ @@ -73,6 +73,8 @@ #define X86_FEATURE_UP (3*32+ 9) /* smp kernel running on up */ #define X86_FEATURE_FXSAVE_LEAK (3*32+10) /* FXSAVE leaks FOP/FIP/FOP */ #define X86_FEATURE_ARCH_PERFMON (3*32+11) /* Intel Architectural PerfMon */ +#define X86_FEATURE_PEBS (3*32+12) /* Precise-Event Based Sampling */ +#define X86_FEATURE_BTS (3*32+13) /* Branch Trace Store */ /* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */ #define X86_FEATURE_XMM3 (4*32+ 0) /* Streaming SIMD Extensions-3 */ @@ -134,6 +136,10 @@ #define cpu_has_phe_enabled boot_cpu_has(X86_FEATURE_PHE_EN) #define cpu_has_pmm boot_cpu_has(X86_FEATURE_PMM) #define cpu_has_pmm_enabled boot_cpu_has(X86_FEATURE_PMM_EN) +#define cpu_has_ds boot_cpu_has(X86_FEATURE_DS) +#define cpu_has_pebs boot_cpu_has(X86_FEATURE_PEBS) +#define cpu_has_clflush boot_cpu_has(X86_FEATURE_CLFLSH) +#define cpu_has_bts boot_cpu_has(X86_FEATURE_BTS) #endif /* __ASM_I386_CPUFEATURE_H */ diff --git a/include/asm-i386/current.h b/include/asm-i386/current.h index 3cbbecd7901..5252ee0f6d7 100644 --- a/include/asm-i386/current.h +++ b/include/asm-i386/current.h @@ -1,13 +1,14 @@ #ifndef _I386_CURRENT_H #define _I386_CURRENT_H -#include <linux/thread_info.h> +#include <asm/pda.h> +#include <linux/compiler.h> struct task_struct; -static __always_inline struct task_struct * get_current(void) +static __always_inline struct task_struct *get_current(void) { - return current_thread_info()->task; + return read_pda(pcurrent); } #define current get_current() diff --git a/include/asm-i386/delay.h b/include/asm-i386/delay.h index b1c7650dc7b..32d6678d0bb 100644 --- a/include/asm-i386/delay.h +++ b/include/asm-i386/delay.h @@ -7,6 +7,7 @@ * Delay routines calling functions in arch/i386/lib/delay.c */ +/* Undefined functions to get compile-time errors */ extern void __bad_udelay(void); extern void __bad_ndelay(void); @@ -15,13 +16,23 @@ extern void __ndelay(unsigned long nsecs); extern void __const_udelay(unsigned long usecs); extern void __delay(unsigned long loops); +#if defined(CONFIG_PARAVIRT) && !defined(USE_REAL_TIME_DELAY) +#define udelay(n) paravirt_ops.const_udelay((n) * 0x10c7ul) + +#define ndelay(n) paravirt_ops.const_udelay((n) * 5ul) + +#else /* !PARAVIRT || USE_REAL_TIME_DELAY */ + +/* 0x10c7 is 2**32 / 1000000 (rounded up) */ #define udelay(n) (__builtin_constant_p(n) ? \ ((n) > 20000 ? __bad_udelay() : __const_udelay((n) * 0x10c7ul)) : \ __udelay(n)) - + +/* 0x5 is 2**32 / 1000000000 (rounded up) */ #define ndelay(n) (__builtin_constant_p(n) ? \ ((n) > 20000 ? __bad_ndelay() : __const_udelay((n) * 5ul)) : \ __ndelay(n)) +#endif void use_tsc_delay(void); diff --git a/include/asm-i386/desc.h b/include/asm-i386/desc.h index 5874ef119ff..f398cc45644 100644 --- a/include/asm-i386/desc.h +++ b/include/asm-i386/desc.h @@ -4,8 +4,6 @@ #include <asm/ldt.h> #include <asm/segment.h> -#define CPU_16BIT_STACK_SIZE 1024 - #ifndef __ASSEMBLY__ #include <linux/preempt.h> @@ -16,8 +14,6 @@ extern struct desc_struct cpu_gdt_table[GDT_ENTRIES]; -DECLARE_PER_CPU(unsigned char, cpu_16bit_stack[CPU_16BIT_STACK_SIZE]); - struct Xgt_desc_struct { unsigned short size; unsigned long address __attribute__((packed)); @@ -33,11 +29,6 @@ static inline struct desc_struct *get_cpu_gdt_table(unsigned int cpu) return (struct desc_struct *)per_cpu(cpu_gdt_descr, cpu).address; } -/* - * This is the ldt that every process will get unless we need - * something other than this. - */ -extern struct desc_struct default_ldt[]; extern struct desc_struct idt_table[]; extern void set_intr_gate(unsigned int irq, void * addr); @@ -64,8 +55,10 @@ static inline void pack_gate(__u32 *a, __u32 *b, #define DESCTYPE_DPL3 0x60 /* DPL-3 */ #define DESCTYPE_S 0x10 /* !system */ +#ifdef CONFIG_PARAVIRT +#include <asm/paravirt.h> +#else #define load_TR_desc() __asm__ __volatile__("ltr %w0"::"q" (GDT_ENTRY_TSS*8)) -#define load_LDT_desc() __asm__ __volatile__("lldt %w0"::"q" (GDT_ENTRY_LDT*8)) #define load_gdt(dtr) __asm__ __volatile("lgdt %0"::"m" (*dtr)) #define load_idt(dtr) __asm__ __volatile("lidt %0"::"m" (*dtr)) @@ -88,6 +81,10 @@ static inline void load_TLS(struct thread_struct *t, unsigned int cpu) #undef C } +#define write_ldt_entry(dt, entry, a, b) write_dt_entry(dt, entry, a, b) +#define write_gdt_entry(dt, entry, a, b) write_dt_entry(dt, entry, a, b) +#define write_idt_entry(dt, entry, a, b) write_dt_entry(dt, entry, a, b) + static inline void write_dt_entry(void *dt, int entry, __u32 entry_a, __u32 entry_b) { __u32 *lp = (__u32 *)((char *)dt + entry*8); @@ -95,9 +92,25 @@ static inline void write_dt_entry(void *dt, int entry, __u32 entry_a, __u32 entr *(lp+1) = entry_b; } -#define write_ldt_entry(dt, entry, a, b) write_dt_entry(dt, entry, a, b) -#define write_gdt_entry(dt, entry, a, b) write_dt_entry(dt, entry, a, b) -#define write_idt_entry(dt, entry, a, b) write_dt_entry(dt, entry, a, b) +#define set_ldt native_set_ldt +#endif /* CONFIG_PARAVIRT */ + +static inline fastcall void native_set_ldt(const void *addr, + unsigned int entries) +{ + if (likely(entries == 0)) + __asm__ __volatile__("lldt %w0"::"q" (0)); + else { + unsigned cpu = smp_processor_id(); + __u32 a, b; + + pack_descriptor(&a, &b, (unsigned long)addr, + entries * sizeof(struct desc_struct) - 1, + DESCTYPE_LDT, 0); + write_gdt_entry(get_cpu_gdt_table(cpu), GDT_ENTRY_LDT, a, b); + __asm__ __volatile__("lldt %w0"::"q" (GDT_ENTRY_LDT*8)); + } +} static inline void _set_gate(int gate, unsigned int type, void *addr, unsigned short seg) { @@ -115,14 +128,6 @@ static inline void __set_tss_desc(unsigned int cpu, unsigned int entry, const vo write_gdt_entry(get_cpu_gdt_table(cpu), entry, a, b); } -static inline void set_ldt_desc(unsigned int cpu, void *addr, unsigned int entries) -{ - __u32 a, b; - pack_descriptor(&a, &b, (unsigned long)addr, - entries * sizeof(struct desc_struct) - 1, - DESCTYPE_LDT, 0); - write_gdt_entry(get_cpu_gdt_table(cpu), GDT_ENTRY_LDT, a, b); -} #define set_tss_desc(cpu,addr) __set_tss_desc(cpu, GDT_ENTRY_TSS, addr) @@ -153,35 +158,22 @@ static inline void set_ldt_desc(unsigned int cpu, void *addr, unsigned int entri static inline void clear_LDT(void) { - int cpu = get_cpu(); - - set_ldt_desc(cpu, &default_ldt[0], 5); - load_LDT_desc(); - put_cpu(); + set_ldt(NULL, 0); } /* * load one particular LDT into the current CPU */ -static inline void load_LDT_nolock(mm_context_t *pc, int cpu) +static inline void load_LDT_nolock(mm_context_t *pc) { - void *segments = pc->ldt; - int count = pc->size; - - if (likely(!count)) { - segments = &default_ldt[0]; - count = 5; - } - - set_ldt_desc(cpu, segments, count); - load_LDT_desc(); + set_ldt(pc->ldt, pc->size); } static inline void load_LDT(mm_context_t *pc) { - int cpu = get_cpu(); - load_LDT_nolock(pc, cpu); - put_cpu(); + preempt_disable(); + load_LDT_nolock(pc); + preempt_enable(); } static inline unsigned long get_desc_base(unsigned long *desc) @@ -193,6 +185,29 @@ static inline unsigned long get_desc_base(unsigned long *desc) return base; } +#else /* __ASSEMBLY__ */ + +/* + * GET_DESC_BASE reads the descriptor base of the specified segment. + * + * Args: + * idx - descriptor index + * gdt - GDT pointer + * base - 32bit register to which the base will be written + * lo_w - lo word of the "base" register + * lo_b - lo byte of the "base" register + * hi_b - hi byte of the low word of the "base" register + * + * Example: + * GET_DESC_BASE(GDT_ENTRY_ESPFIX_SS, %ebx, %eax, %ax, %al, %ah) + * Will read the base address of GDT_ENTRY_ESPFIX_SS and put it into %eax. + */ +#define GET_DESC_BASE(idx, gdt, base, lo_w, lo_b, hi_b) \ + movb idx*8+4(gdt), lo_b; \ + movb idx*8+7(gdt), hi_b; \ + shll $16, base; \ + movw idx*8+2(gdt), lo_w; + #endif /* !__ASSEMBLY__ */ #endif diff --git a/include/asm-i386/device.h b/include/asm-i386/device.h new file mode 100644 index 00000000000..849604c70e6 --- /dev/null +++ b/include/asm-i386/device.h @@ -0,0 +1,15 @@ +/* + * Arch specific extensions to struct device + * + * This file is released under the GPLv2 + */ +#ifndef _ASM_I386_DEVICE_H +#define _ASM_I386_DEVICE_H + +struct dev_archdata { +#ifdef CONFIG_ACPI + void *acpi_handle; +#endif +}; + +#endif /* _ASM_I386_DEVICE_H */ diff --git a/include/asm-i386/dma-mapping.h b/include/asm-i386/dma-mapping.h index 81999a3ebe7..183eebeebbd 100644 --- a/include/asm-i386/dma-mapping.h +++ b/include/asm-i386/dma-mapping.h @@ -156,10 +156,10 @@ dma_get_cache_alignment(void) return (1 << INTERNODE_CACHE_SHIFT); } -#define dma_is_consistent(d) (1) +#define dma_is_consistent(d, h) (1) static inline void -dma_cache_sync(void *vaddr, size_t size, +dma_cache_sync(struct device *dev, void *vaddr, size_t size, enum dma_data_direction direction) { flush_write_buffers(); diff --git a/include/asm-i386/e820.h b/include/asm-i386/e820.h index f7514fb6e8e..c5b8fc6109d 100644 --- a/include/asm-i386/e820.h +++ b/include/asm-i386/e820.h @@ -38,6 +38,11 @@ extern struct e820map e820; extern int e820_all_mapped(unsigned long start, unsigned long end, unsigned type); +extern void find_max_pfn(void); +extern void register_bootmem_low_pages(unsigned long max_low_pfn); +extern void e820_register_memory(void); +extern void limit_regions(unsigned long long size); +extern void print_memory_map(char *who); #endif/*!__ASSEMBLY__*/ diff --git a/include/asm-i386/elf.h b/include/asm-i386/elf.h index 3a05436f31c..45d21a0c95b 100644 --- a/include/asm-i386/elf.h +++ b/include/asm-i386/elf.h @@ -91,7 +91,7 @@ typedef struct user_fxsr_struct elf_fpxregset_t; pr_reg[7] = regs->xds; \ pr_reg[8] = regs->xes; \ savesegment(fs,pr_reg[9]); \ - savesegment(gs,pr_reg[10]); \ + pr_reg[10] = regs->xgs; \ pr_reg[11] = regs->orig_eax; \ pr_reg[12] = regs->eip; \ pr_reg[13] = regs->xcs; \ diff --git a/include/asm-i386/futex.h b/include/asm-i386/futex.h index 946d97cfea2..438ef0ec710 100644 --- a/include/asm-i386/futex.h +++ b/include/asm-i386/futex.h @@ -56,7 +56,7 @@ futex_atomic_op_inuser (int encoded_op, int __user *uaddr) if (! access_ok (VERIFY_WRITE, uaddr, sizeof(int))) return -EFAULT; - inc_preempt_count(); + pagefault_disable(); if (op == FUTEX_OP_SET) __futex_atomic_op1("xchgl %0, %2", ret, oldval, uaddr, oparg); @@ -88,7 +88,7 @@ futex_atomic_op_inuser (int encoded_op, int __user *uaddr) } } - dec_preempt_count(); + pagefault_enable(); if (!ret) { switch (cmp) { diff --git a/include/asm-i386/genapic.h b/include/asm-i386/genapic.h index 8ffbb0f0745..fd2be593b06 100644 --- a/include/asm-i386/genapic.h +++ b/include/asm-i386/genapic.h @@ -122,6 +122,6 @@ struct genapic { APICFUNC(phys_pkg_id) \ } -extern struct genapic *genapic; +extern struct genapic *genapic, apic_default; #endif diff --git a/include/asm-i386/i387.h b/include/asm-i386/i387.h index bc1d6edae1e..434936c732d 100644 --- a/include/asm-i386/i387.h +++ b/include/asm-i386/i387.h @@ -76,7 +76,9 @@ static inline void __save_init_fpu( struct task_struct *tsk ) #define __unlazy_fpu( tsk ) do { \ if (task_thread_info(tsk)->status & TS_USEDFPU) \ - save_init_fpu( tsk ); \ + save_init_fpu( tsk ); \ + else \ + tsk->fpu_counter = 0; \ } while (0) #define __clear_fpu( tsk ) \ @@ -118,6 +120,7 @@ static inline void save_init_fpu( struct task_struct *tsk ) extern unsigned short get_fpu_cwd( struct task_struct *tsk ); extern unsigned short get_fpu_swd( struct task_struct *tsk ); extern unsigned short get_fpu_mxcsr( struct task_struct *tsk ); +extern asmlinkage void math_state_restore(void); /* * Signal frame handlers... diff --git a/include/asm-i386/ide.h b/include/asm-i386/ide.h index 73465d2892b..0fc240c80f4 100644 --- a/include/asm-i386/ide.h +++ b/include/asm-i386/ide.h @@ -40,13 +40,14 @@ static __inline__ int ide_default_irq(unsigned long base) static __inline__ unsigned long ide_default_io_base(int index) { + struct pci_dev *pdev; /* * If PCI is present then it is not safe to poke around * the other legacy IDE ports. Only 0x1f0 and 0x170 are * defined compatibility mode ports for PCI. A user can * override this using ide= but we must default safe. */ - if (pci_find_device(PCI_ANY_ID, PCI_ANY_ID, NULL) == NULL) { + if ((pdev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, NULL)) == NULL) { switch(index) { case 2: return 0x1e8; case 3: return 0x168; @@ -54,6 +55,7 @@ static __inline__ unsigned long ide_default_io_base(int index) case 5: return 0x160; } } + pci_dev_put(pdev); switch (index) { case 0: return 0x1f0; case 1: return 0x170; diff --git a/include/asm-i386/io.h b/include/asm-i386/io.h index 68df0dc3ab8..86ff5e83be2 100644 --- a/include/asm-i386/io.h +++ b/include/asm-i386/io.h @@ -256,11 +256,11 @@ static inline void flush_write_buffers(void) #endif /* __KERNEL__ */ -#ifdef SLOW_IO_BY_JUMPING -#define __SLOW_DOWN_IO "jmp 1f; 1: jmp 1f; 1:" +#if defined(CONFIG_PARAVIRT) +#include <asm/paravirt.h> #else + #define __SLOW_DOWN_IO "outb %%al,$0x80;" -#endif static inline void slow_down_io(void) { __asm__ __volatile__( @@ -271,6 +271,8 @@ static inline void slow_down_io(void) { : : ); } +#endif + #ifdef CONFIG_X86_NUMAQ extern void *xquad_portio; /* Where the IO area was mapped */ #define XQUAD_PORT_ADDR(port, quad) (xquad_portio + (XQUAD_PORTIO_QUAD*quad) + port) diff --git a/include/asm-i386/irq.h b/include/asm-i386/irq.h index 331726b4112..11761cdaae1 100644 --- a/include/asm-i386/irq.h +++ b/include/asm-i386/irq.h @@ -37,8 +37,13 @@ static __inline__ int irq_canonicalize(int irq) extern int irqbalance_disable(char *str); #endif +extern void quirk_intel_irqbalance(void); + #ifdef CONFIG_HOTPLUG_CPU extern void fixup_irqs(cpumask_t map); #endif +void init_IRQ(void); +void __init native_init_IRQ(void); + #endif /* _ASM_IRQ_H */ diff --git a/include/asm-i386/irq_regs.h b/include/asm-i386/irq_regs.h index 3dd9c0b7027..a1b3f7f594a 100644 --- a/include/asm-i386/irq_regs.h +++ b/include/asm-i386/irq_regs.h @@ -1 +1,27 @@ -#include <asm-generic/irq_regs.h> +/* + * Per-cpu current frame pointer - the location of the last exception frame on + * the stack, stored in the PDA. + * + * Jeremy Fitzhardinge <jeremy@goop.org> + */ +#ifndef _ASM_I386_IRQ_REGS_H +#define _ASM_I386_IRQ_REGS_H + +#include <asm/pda.h> + +static inline struct pt_regs *get_irq_regs(void) +{ + return read_pda(irq_regs); +} + +static inline struct pt_regs *set_irq_regs(struct pt_regs *new_regs) +{ + struct pt_regs *old_regs; + + old_regs = read_pda(irq_regs); + write_pda(irq_regs, new_regs); + + return old_regs; +} + +#endif /* _ASM_I386_IRQ_REGS_H */ diff --git a/include/asm-i386/irqflags.h b/include/asm-i386/irqflags.h index e1bdb97c07f..17b18cf4fe9 100644 --- a/include/asm-i386/irqflags.h +++ b/include/asm-i386/irqflags.h @@ -10,6 +10,9 @@ #ifndef _ASM_IRQFLAGS_H #define _ASM_IRQFLAGS_H +#ifdef CONFIG_PARAVIRT +#include <asm/paravirt.h> +#else #ifndef __ASSEMBLY__ static inline unsigned long __raw_local_save_flags(void) @@ -25,9 +28,6 @@ static inline unsigned long __raw_local_save_flags(void) return flags; } -#define raw_local_save_flags(flags) \ - do { (flags) = __raw_local_save_flags(); } while (0) - static inline void raw_local_irq_restore(unsigned long flags) { __asm__ __volatile__( @@ -66,18 +66,6 @@ static inline void halt(void) __asm__ __volatile__("hlt": : :"memory"); } -static inline int raw_irqs_disabled_flags(unsigned long flags) -{ - return !(flags & (1 << 9)); -} - -static inline int raw_irqs_disabled(void) -{ - unsigned long flags = __raw_local_save_flags(); - - return raw_irqs_disabled_flags(flags); -} - /* * For spinlocks, etc: */ @@ -90,9 +78,33 @@ static inline unsigned long __raw_local_irq_save(void) return flags; } +#else +#define DISABLE_INTERRUPTS(clobbers) cli +#define ENABLE_INTERRUPTS(clobbers) sti +#define ENABLE_INTERRUPTS_SYSEXIT sti; sysexit +#define INTERRUPT_RETURN iret +#define GET_CR0_INTO_EAX movl %cr0, %eax +#endif /* __ASSEMBLY__ */ +#endif /* CONFIG_PARAVIRT */ + +#ifndef __ASSEMBLY__ +#define raw_local_save_flags(flags) \ + do { (flags) = __raw_local_save_flags(); } while (0) + #define raw_local_irq_save(flags) \ do { (flags) = __raw_local_irq_save(); } while (0) +static inline int raw_irqs_disabled_flags(unsigned long flags) +{ + return !(flags & (1 << 9)); +} + +static inline int raw_irqs_disabled(void) +{ + unsigned long flags = __raw_local_save_flags(); + + return raw_irqs_disabled_flags(flags); +} #endif /* __ASSEMBLY__ */ /* diff --git a/include/asm-i386/mach-default/setup_arch.h b/include/asm-i386/mach-default/setup_arch.h index fb42099e7bd..605e3ccb991 100644 --- a/include/asm-i386/mach-default/setup_arch.h +++ b/include/asm-i386/mach-default/setup_arch.h @@ -2,4 +2,6 @@ /* no action for generic */ +#ifndef ARCH_SETUP #define ARCH_SETUP +#endif diff --git a/include/asm-i386/math_emu.h b/include/asm-i386/math_emu.h index 697673b555c..a4b0aa3320e 100644 --- a/include/asm-i386/math_emu.h +++ b/include/asm-i386/math_emu.h @@ -21,6 +21,7 @@ struct info { long ___eax; long ___ds; long ___es; + long ___fs; long ___orig_eax; long ___eip; long ___cs; diff --git a/include/asm-i386/mmu_context.h b/include/asm-i386/mmu_context.h index 62b7bf18409..68ff102d6f5 100644 --- a/include/asm-i386/mmu_context.h +++ b/include/asm-i386/mmu_context.h @@ -44,7 +44,7 @@ static inline void switch_mm(struct mm_struct *prev, * load the LDT, if the LDT is different: */ if (unlikely(prev->context.ldt != next->context.ldt)) - load_LDT_nolock(&next->context, cpu); + load_LDT_nolock(&next->context); } #ifdef CONFIG_SMP else { @@ -56,14 +56,14 @@ static inline void switch_mm(struct mm_struct *prev, * tlb flush IPI delivery. We must reload %cr3. */ load_cr3(next->pgd); - load_LDT_nolock(&next->context, cpu); + load_LDT_nolock(&next->context); } } #endif } -#define deactivate_mm(tsk, mm) \ - asm("movl %0,%%fs ; movl %0,%%gs": :"r" (0)) +#define deactivate_mm(tsk, mm) \ + asm("movl %0,%%fs": :"r" (0)); #define activate_mm(prev, next) \ switch_mm((prev),(next),NULL) diff --git a/include/asm-i386/mmzone.h b/include/asm-i386/mmzone.h index 61b07332200..3503ad66945 100644 --- a/include/asm-i386/mmzone.h +++ b/include/asm-i386/mmzone.h @@ -120,13 +120,26 @@ static inline int pfn_valid(int pfn) __alloc_bootmem_node(NODE_DATA(0), (x), PAGE_SIZE, __pa(MAX_DMA_ADDRESS)) #define alloc_bootmem_low_pages(x) \ __alloc_bootmem_node(NODE_DATA(0), (x), PAGE_SIZE, 0) -#define alloc_bootmem_node(ignore, x) \ - __alloc_bootmem_node(NODE_DATA(0), (x), SMP_CACHE_BYTES, __pa(MAX_DMA_ADDRESS)) -#define alloc_bootmem_pages_node(ignore, x) \ - __alloc_bootmem_node(NODE_DATA(0), (x), PAGE_SIZE, __pa(MAX_DMA_ADDRESS)) -#define alloc_bootmem_low_pages_node(ignore, x) \ - __alloc_bootmem_node(NODE_DATA(0), (x), PAGE_SIZE, 0) - +#define alloc_bootmem_node(pgdat, x) \ +({ \ + struct pglist_data __attribute__ ((unused)) \ + *__alloc_bootmem_node__pgdat = (pgdat); \ + __alloc_bootmem_node(NODE_DATA(0), (x), SMP_CACHE_BYTES, \ + __pa(MAX_DMA_ADDRESS)); \ +}) +#define alloc_bootmem_pages_node(pgdat, x) \ +({ \ + struct pglist_data __attribute__ ((unused)) \ + *__alloc_bootmem_node__pgdat = (pgdat); \ + __alloc_bootmem_node(NODE_DATA(0), (x), PAGE_SIZE, \ + __pa(MAX_DMA_ADDRESS)) \ +}) +#define alloc_bootmem_low_pages_node(pgdat, x) \ +({ \ + struct pglist_data __attribute__ ((unused)) \ + *__alloc_bootmem_node__pgdat = (pgdat); \ + __alloc_bootmem_node(NODE_DATA(0), (x), PAGE_SIZE, 0); \ +}) #endif /* CONFIG_NEED_MULTIPLE_NODES */ #endif /* _ASM_MMZONE_H_ */ diff --git a/include/asm-i386/module.h b/include/asm-i386/module.h index 424661d25bd..02f8f541cbe 100644 --- a/include/asm-i386/module.h +++ b/include/asm-i386/module.h @@ -20,6 +20,8 @@ struct mod_arch_specific #define MODULE_PROC_FAMILY "586TSC " #elif defined CONFIG_M586MMX #define MODULE_PROC_FAMILY "586MMX " +#elif defined CONFIG_MCORE2 +#define MODULE_PROC_FAMILY "CORE2 " #elif defined CONFIG_M686 #define MODULE_PROC_FAMILY "686 " #elif defined CONFIG_MPENTIUMII @@ -60,18 +62,12 @@ struct mod_arch_specific #error unknown processor family #endif -#ifdef CONFIG_REGPARM -#define MODULE_REGPARM "REGPARM " -#else -#define MODULE_REGPARM "" -#endif - #ifdef CONFIG_4KSTACKS #define MODULE_STACKSIZE "4KSTACKS " #else #define MODULE_STACKSIZE "" #endif -#define MODULE_ARCH_VERMAGIC MODULE_PROC_FAMILY MODULE_REGPARM MODULE_STACKSIZE +#define MODULE_ARCH_VERMAGIC MODULE_PROC_FAMILY MODULE_STACKSIZE #endif /* _ASM_I386_MODULE_H */ diff --git a/include/asm-i386/mpspec_def.h b/include/asm-i386/mpspec_def.h index 76feedf85a8..13bafb16e7a 100644 --- a/include/asm-i386/mpspec_def.h +++ b/include/asm-i386/mpspec_def.h @@ -97,7 +97,6 @@ struct mpc_config_bus #define BUSTYPE_TC "TC" #define BUSTYPE_VME "VME" #define BUSTYPE_XPRESS "XPRESS" -#define BUSTYPE_NEC98 "NEC98" struct mpc_config_ioapic { @@ -182,7 +181,6 @@ enum mp_bustype { MP_BUS_EISA, MP_BUS_PCI, MP_BUS_MCA, - MP_BUS_NEC98 }; #endif diff --git a/include/asm-i386/msr.h b/include/asm-i386/msr.h index 62b76cd9695..609a3899475 100644 --- a/include/asm-i386/msr.h +++ b/include/asm-i386/msr.h @@ -1,6 +1,10 @@ #ifndef __ASM_MSR_H #define __ASM_MSR_H +#ifdef CONFIG_PARAVIRT +#include <asm/paravirt.h> +#else + /* * Access to machine-specific registers (available on 586 and better only) * Note: the rd* operations modify the parameters directly (without using @@ -77,6 +81,7 @@ static inline void wrmsrl (unsigned long msr, unsigned long long val) __asm__ __volatile__("rdpmc" \ : "=a" (low), "=d" (high) \ : "c" (counter)) +#endif /* !CONFIG_PARAVIRT */ /* symbolic names for some interesting MSRs */ /* Intel defined MSRs. */ @@ -95,6 +100,8 @@ static inline void wrmsrl (unsigned long msr, unsigned long long val) #define MSR_P6_PERFCTR0 0xc1 #define MSR_P6_PERFCTR1 0xc2 +#define MSR_FSB_FREQ 0xcd + #define MSR_IA32_BBL_CR_CTL 0x119 @@ -125,6 +132,9 @@ static inline void wrmsrl (unsigned long msr, unsigned long long val) #define MSR_IA32_PERF_STATUS 0x198 #define MSR_IA32_PERF_CTL 0x199 +#define MSR_IA32_MPERF 0xE7 +#define MSR_IA32_APERF 0xE8 + #define MSR_IA32_THERM_CONTROL 0x19a #define MSR_IA32_THERM_INTERRUPT 0x19b #define MSR_IA32_THERM_STATUS 0x19c @@ -141,6 +151,10 @@ static inline void wrmsrl (unsigned long msr, unsigned long long val) #define MSR_IA32_MC0_ADDR 0x402 #define MSR_IA32_MC0_MISC 0x403 +#define MSR_IA32_PEBS_ENABLE 0x3f1 +#define MSR_IA32_DS_AREA 0x600 +#define MSR_IA32_PERF_CAPABILITIES 0x345 + /* Pentium IV performance counter MSRs */ #define MSR_P4_BPU_PERFCTR0 0x300 #define MSR_P4_BPU_PERFCTR1 0x301 @@ -284,4 +298,13 @@ static inline void wrmsrl (unsigned long msr, unsigned long long val) #define MSR_TMTA_LRTI_READOUT 0x80868018 #define MSR_TMTA_LRTI_VOLT_MHZ 0x8086801a +/* Intel Core-based CPU performance counters */ +#define MSR_CORE_PERF_FIXED_CTR0 0x309 +#define MSR_CORE_PERF_FIXED_CTR1 0x30a +#define MSR_CORE_PERF_FIXED_CTR2 0x30b +#define MSR_CORE_PERF_FIXED_CTR_CTRL 0x38d +#define MSR_CORE_PERF_GLOBAL_STATUS 0x38e +#define MSR_CORE_PERF_GLOBAL_CTRL 0x38f +#define MSR_CORE_PERF_GLOBAL_OVF_CTRL 0x390 + #endif /* __ASM_MSR_H */ diff --git a/include/asm-i386/nmi.h b/include/asm-i386/nmi.h index 269d315719c..b04333ea6f3 100644 --- a/include/asm-i386/nmi.h +++ b/include/asm-i386/nmi.h @@ -5,6 +5,9 @@ #define ASM_NMI_H #include <linux/pm.h> +#include <asm/irq.h> + +#ifdef ARCH_HAS_NMI_WATCHDOG /** * do_nmi_callback @@ -42,4 +45,9 @@ extern int proc_nmi_enabled(struct ctl_table *, int , struct file *, void __user *, size_t *, loff_t *); extern int unknown_nmi_panic; +void __trigger_all_cpu_backtrace(void); +#define trigger_all_cpu_backtrace() __trigger_all_cpu_backtrace() + +#endif + #endif /* ASM_NMI_H */ diff --git a/include/asm-i386/page.h b/include/asm-i386/page.h index f5bf544c729..fd3f64ace24 100644 --- a/include/asm-i386/page.h +++ b/include/asm-i386/page.h @@ -52,6 +52,7 @@ typedef struct { unsigned long long pgprot; } pgprot_t; #define pte_val(x) ((x).pte_low | ((unsigned long long)(x).pte_high << 32)) #define __pmd(x) ((pmd_t) { (x) } ) #define HPAGE_SHIFT 21 +#include <asm-generic/pgtable-nopud.h> #else typedef struct { unsigned long pte_low; } pte_t; typedef struct { unsigned long pgd; } pgd_t; @@ -59,6 +60,7 @@ typedef struct { unsigned long pgprot; } pgprot_t; #define boot_pte_t pte_t /* or would you rather have a typedef */ #define pte_val(x) ((x).pte_low) #define HPAGE_SHIFT 22 +#include <asm-generic/pgtable-nopmd.h> #endif #define PTE_MASK PAGE_MASK @@ -112,18 +114,18 @@ extern int page_is_ram(unsigned long pagenr); #ifdef __ASSEMBLY__ #define __PAGE_OFFSET CONFIG_PAGE_OFFSET -#define __PHYSICAL_START CONFIG_PHYSICAL_START #else #define __PAGE_OFFSET ((unsigned long)CONFIG_PAGE_OFFSET) -#define __PHYSICAL_START ((unsigned long)CONFIG_PHYSICAL_START) #endif -#define __KERNEL_START (__PAGE_OFFSET + __PHYSICAL_START) #define PAGE_OFFSET ((unsigned long)__PAGE_OFFSET) #define VMALLOC_RESERVE ((unsigned long)__VMALLOC_RESERVE) #define MAXMEM (-__PAGE_OFFSET-__VMALLOC_RESERVE) #define __pa(x) ((unsigned long)(x)-PAGE_OFFSET) +/* __pa_symbol should be used for C visible symbols. + This seems to be the official gcc blessed way to do such arithmetic. */ +#define __pa_symbol(x) __pa(RELOC_HIDE((unsigned long)(x),0)) #define __va(x) ((void *)((unsigned long)(x)+PAGE_OFFSET)) #define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) #ifdef CONFIG_FLATMEM diff --git a/include/asm-i386/param.h b/include/asm-i386/param.h index 745dc5bd0fb..21b32466fcd 100644 --- a/include/asm-i386/param.h +++ b/include/asm-i386/param.h @@ -18,6 +18,5 @@ #endif #define MAXHOSTNAMELEN 64 /* max length of hostname */ -#define COMMAND_LINE_SIZE 256 #endif diff --git a/include/asm-i386/paravirt.h b/include/asm-i386/paravirt.h new file mode 100644 index 00000000000..9f06265065f --- /dev/null +++ b/include/asm-i386/paravirt.h @@ -0,0 +1,505 @@ +#ifndef __ASM_PARAVIRT_H +#define __ASM_PARAVIRT_H +/* Various instructions on x86 need to be replaced for + * para-virtualization: those hooks are defined here. */ +#include <linux/linkage.h> +#include <linux/stringify.h> +#include <asm/page.h> + +#ifdef CONFIG_PARAVIRT +/* These are the most performance critical ops, so we want to be able to patch + * callers */ +#define PARAVIRT_IRQ_DISABLE 0 +#define PARAVIRT_IRQ_ENABLE 1 +#define PARAVIRT_RESTORE_FLAGS 2 +#define PARAVIRT_SAVE_FLAGS 3 +#define PARAVIRT_SAVE_FLAGS_IRQ_DISABLE 4 +#define PARAVIRT_INTERRUPT_RETURN 5 +#define PARAVIRT_STI_SYSEXIT 6 + +/* Bitmask of what can be clobbered: usually at least eax. */ +#define CLBR_NONE 0x0 +#define CLBR_EAX 0x1 +#define CLBR_ECX 0x2 +#define CLBR_EDX 0x4 +#define CLBR_ANY 0x7 + +#ifndef __ASSEMBLY__ +struct thread_struct; +struct Xgt_desc_struct; +struct tss_struct; +struct mm_struct; +struct paravirt_ops +{ + unsigned int kernel_rpl; + int paravirt_enabled; + const char *name; + + /* + * Patch may replace one of the defined code sequences with arbitrary + * code, subject to the same register constraints. This generally + * means the code is not free to clobber any registers other than EAX. + * The patch function should return the number of bytes of code + * generated, as we nop pad the rest in generic code. + */ + unsigned (*patch)(u8 type, u16 clobber, void *firstinsn, unsigned len); + + void (*arch_setup)(void); + char *(*memory_setup)(void); + void (*init_IRQ)(void); + + void (*banner)(void); + + unsigned long (*get_wallclock)(void); + int (*set_wallclock)(unsigned long); + void (*time_init)(void); + + /* All the function pointers here are declared as "fastcall" + so that we get a specific register-based calling + convention. This makes it easier to implement inline + assembler replacements. */ + + void (fastcall *cpuid)(unsigned int *eax, unsigned int *ebx, + unsigned int *ecx, unsigned int *edx); + + unsigned long (fastcall *get_debugreg)(int regno); + void (fastcall *set_debugreg)(int regno, unsigned long value); + + void (fastcall *clts)(void); + + unsigned long (fastcall *read_cr0)(void); + void (fastcall *write_cr0)(unsigned long); + + unsigned long (fastcall *read_cr2)(void); + void (fastcall *write_cr2)(unsigned long); + + unsigned long (fastcall *read_cr3)(void); + void (fastcall *write_cr3)(unsigned long); + + unsigned long (fastcall *read_cr4_safe)(void); + unsigned long (fastcall *read_cr4)(void); + void (fastcall *write_cr4)(unsigned long); + + unsigned long (fastcall *save_fl)(void); + void (fastcall *restore_fl)(unsigned long); + void (fastcall *irq_disable)(void); + void (fastcall *irq_enable)(void); + void (fastcall *safe_halt)(void); + void (fastcall *halt)(void); + void (fastcall *wbinvd)(void); + + /* err = 0/-EFAULT. wrmsr returns 0/-EFAULT. */ + u64 (fastcall *read_msr)(unsigned int msr, int *err); + int (fastcall *write_msr)(unsigned int msr, u64 val); + + u64 (fastcall *read_tsc)(void); + u64 (fastcall *read_pmc)(void); + + void (fastcall *load_tr_desc)(void); + void (fastcall *load_gdt)(const struct Xgt_desc_struct *); + void (fastcall *load_idt)(const struct Xgt_desc_struct *); + void (fastcall *store_gdt)(struct Xgt_desc_struct *); + void (fastcall *store_idt)(struct Xgt_desc_struct *); + void (fastcall *set_ldt)(const void *desc, unsigned entries); + unsigned long (fastcall *store_tr)(void); + void (fastcall *load_tls)(struct thread_struct *t, unsigned int cpu); + void (fastcall *write_ldt_entry)(void *dt, int entrynum, + u32 low, u32 high); + void (fastcall *write_gdt_entry)(void *dt, int entrynum, + u32 low, u32 high); + void (fastcall *write_idt_entry)(void *dt, int entrynum, + u32 low, u32 high); + void (fastcall *load_esp0)(struct tss_struct *tss, + struct thread_struct *thread); + + void (fastcall *set_iopl_mask)(unsigned mask); + + void (fastcall *io_delay)(void); + void (*const_udelay)(unsigned long loops); + +#ifdef CONFIG_X86_LOCAL_APIC + void (fastcall *apic_write)(unsigned long reg, unsigned long v); + void (fastcall *apic_write_atomic)(unsigned long reg, unsigned long v); + unsigned long (fastcall *apic_read)(unsigned long reg); +#endif + + void (fastcall *flush_tlb_user)(void); + void (fastcall *flush_tlb_kernel)(void); + void (fastcall *flush_tlb_single)(u32 addr); + + void (fastcall *set_pte)(pte_t *ptep, pte_t pteval); + void (fastcall *set_pte_at)(struct mm_struct *mm, u32 addr, pte_t *ptep, pte_t pteval); + void (fastcall *set_pmd)(pmd_t *pmdp, pmd_t pmdval); + void (fastcall *pte_update)(struct mm_struct *mm, u32 addr, pte_t *ptep); + void (fastcall *pte_update_defer)(struct mm_struct *mm, u32 addr, pte_t *ptep); +#ifdef CONFIG_X86_PAE + void (fastcall *set_pte_atomic)(pte_t *ptep, pte_t pteval); + void (fastcall *set_pte_present)(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte); + void (fastcall *set_pud)(pud_t *pudp, pud_t pudval); + void (fastcall *pte_clear)(struct mm_struct *mm, unsigned long addr, pte_t *ptep); + void (fastcall *pmd_clear)(pmd_t *pmdp); +#endif + + /* These two are jmp to, not actually called. */ + void (fastcall *irq_enable_sysexit)(void); + void (fastcall *iret)(void); +}; + +/* Mark a paravirt probe function. */ +#define paravirt_probe(fn) \ + static asmlinkage void (*__paravirtprobe_##fn)(void) __attribute_used__ \ + __attribute__((__section__(".paravirtprobe"))) = fn + +extern struct paravirt_ops paravirt_ops; + +#define paravirt_enabled() (paravirt_ops.paravirt_enabled) + +static inline void load_esp0(struct tss_struct *tss, + struct thread_struct *thread) +{ + paravirt_ops.load_esp0(tss, thread); +} + +#define ARCH_SETUP paravirt_ops.arch_setup(); +static inline unsigned long get_wallclock(void) +{ + return paravirt_ops.get_wallclock(); +} + +static inline int set_wallclock(unsigned long nowtime) +{ + return paravirt_ops.set_wallclock(nowtime); +} + +static inline void do_time_init(void) +{ + return paravirt_ops.time_init(); +} + +/* The paravirtualized CPUID instruction. */ +static inline void __cpuid(unsigned int *eax, unsigned int *ebx, + unsigned int *ecx, unsigned int *edx) +{ + paravirt_ops.cpuid(eax, ebx, ecx, edx); +} + +/* + * These special macros can be used to get or set a debugging register + */ +#define get_debugreg(var, reg) var = paravirt_ops.get_debugreg(reg) +#define set_debugreg(val, reg) paravirt_ops.set_debugreg(reg, val) + +#define clts() paravirt_ops.clts() + +#define read_cr0() paravirt_ops.read_cr0() +#define write_cr0(x) paravirt_ops.write_cr0(x) + +#define read_cr2() paravirt_ops.read_cr2() +#define write_cr2(x) paravirt_ops.write_cr2(x) + +#define read_cr3() paravirt_ops.read_cr3() +#define write_cr3(x) paravirt_ops.write_cr3(x) + +#define read_cr4() paravirt_ops.read_cr4() +#define read_cr4_safe(x) paravirt_ops.read_cr4_safe() +#define write_cr4(x) paravirt_ops.write_cr4(x) + +static inline void raw_safe_halt(void) +{ + paravirt_ops.safe_halt(); +} + +static inline void halt(void) +{ + paravirt_ops.safe_halt(); +} +#define wbinvd() paravirt_ops.wbinvd() + +#define get_kernel_rpl() (paravirt_ops.kernel_rpl) + +#define rdmsr(msr,val1,val2) do { \ + int _err; \ + u64 _l = paravirt_ops.read_msr(msr,&_err); \ + val1 = (u32)_l; \ + val2 = _l >> 32; \ +} while(0) + +#define wrmsr(msr,val1,val2) do { \ + u64 _l = ((u64)(val2) << 32) | (val1); \ + paravirt_ops.write_msr((msr), _l); \ +} while(0) + +#define rdmsrl(msr,val) do { \ + int _err; \ + val = paravirt_ops.read_msr((msr),&_err); \ +} while(0) + +#define wrmsrl(msr,val) (paravirt_ops.write_msr((msr),(val))) +#define wrmsr_safe(msr,a,b) ({ \ + u64 _l = ((u64)(b) << 32) | (a); \ + paravirt_ops.write_msr((msr),_l); \ +}) + +/* rdmsr with exception handling */ +#define rdmsr_safe(msr,a,b) ({ \ + int _err; \ + u64 _l = paravirt_ops.read_msr(msr,&_err); \ + (*a) = (u32)_l; \ + (*b) = _l >> 32; \ + _err; }) + +#define rdtsc(low,high) do { \ + u64 _l = paravirt_ops.read_tsc(); \ + low = (u32)_l; \ + high = _l >> 32; \ +} while(0) + +#define rdtscl(low) do { \ + u64 _l = paravirt_ops.read_tsc(); \ + low = (int)_l; \ +} while(0) + +#define rdtscll(val) (val = paravirt_ops.read_tsc()) + +#define write_tsc(val1,val2) wrmsr(0x10, val1, val2) + +#define rdpmc(counter,low,high) do { \ + u64 _l = paravirt_ops.read_pmc(); \ + low = (u32)_l; \ + high = _l >> 32; \ +} while(0) + +#define load_TR_desc() (paravirt_ops.load_tr_desc()) +#define load_gdt(dtr) (paravirt_ops.load_gdt(dtr)) +#define load_idt(dtr) (paravirt_ops.load_idt(dtr)) +#define set_ldt(addr, entries) (paravirt_ops.set_ldt((addr), (entries))) +#define store_gdt(dtr) (paravirt_ops.store_gdt(dtr)) +#define store_idt(dtr) (paravirt_ops.store_idt(dtr)) +#define store_tr(tr) ((tr) = paravirt_ops.store_tr()) +#define load_TLS(t,cpu) (paravirt_ops.load_tls((t),(cpu))) +#define write_ldt_entry(dt, entry, low, high) \ + (paravirt_ops.write_ldt_entry((dt), (entry), (low), (high))) +#define write_gdt_entry(dt, entry, low, high) \ + (paravirt_ops.write_gdt_entry((dt), (entry), (low), (high))) +#define write_idt_entry(dt, entry, low, high) \ + (paravirt_ops.write_idt_entry((dt), (entry), (low), (high))) +#define set_iopl_mask(mask) (paravirt_ops.set_iopl_mask(mask)) + +/* The paravirtualized I/O functions */ +static inline void slow_down_io(void) { + paravirt_ops.io_delay(); +#ifdef REALLY_SLOW_IO + paravirt_ops.io_delay(); + paravirt_ops.io_delay(); + paravirt_ops.io_delay(); +#endif +} + +#ifdef CONFIG_X86_LOCAL_APIC +/* + * Basic functions accessing APICs. + */ +static inline void apic_write(unsigned long reg, unsigned long v) +{ + paravirt_ops.apic_write(reg,v); +} + +static inline void apic_write_atomic(unsigned long reg, unsigned long v) +{ + paravirt_ops.apic_write_atomic(reg,v); +} + +static inline unsigned long apic_read(unsigned long reg) +{ + return paravirt_ops.apic_read(reg); +} +#endif + + +#define __flush_tlb() paravirt_ops.flush_tlb_user() +#define __flush_tlb_global() paravirt_ops.flush_tlb_kernel() +#define __flush_tlb_single(addr) paravirt_ops.flush_tlb_single(addr) + +static inline void set_pte(pte_t *ptep, pte_t pteval) +{ + paravirt_ops.set_pte(ptep, pteval); +} + +static inline void set_pte_at(struct mm_struct *mm, u32 addr, pte_t *ptep, pte_t pteval) +{ + paravirt_ops.set_pte_at(mm, addr, ptep, pteval); +} + +static inline void set_pmd(pmd_t *pmdp, pmd_t pmdval) +{ + paravirt_ops.set_pmd(pmdp, pmdval); +} + +static inline void pte_update(struct mm_struct *mm, u32 addr, pte_t *ptep) +{ + paravirt_ops.pte_update(mm, addr, ptep); +} + +static inline void pte_update_defer(struct mm_struct *mm, u32 addr, pte_t *ptep) +{ + paravirt_ops.pte_update_defer(mm, addr, ptep); +} + +#ifdef CONFIG_X86_PAE +static inline void set_pte_atomic(pte_t *ptep, pte_t pteval) +{ + paravirt_ops.set_pte_atomic(ptep, pteval); +} + +static inline void set_pte_present(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte) +{ + paravirt_ops.set_pte_present(mm, addr, ptep, pte); +} + +static inline void set_pud(pud_t *pudp, pud_t pudval) +{ + paravirt_ops.set_pud(pudp, pudval); +} + +static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) +{ + paravirt_ops.pte_clear(mm, addr, ptep); +} + +static inline void pmd_clear(pmd_t *pmdp) +{ + paravirt_ops.pmd_clear(pmdp); +} +#endif + +/* These all sit in the .parainstructions section to tell us what to patch. */ +struct paravirt_patch { + u8 *instr; /* original instructions */ + u8 instrtype; /* type of this instruction */ + u8 len; /* length of original instruction */ + u16 clobbers; /* what registers you may clobber */ +}; + +#define paravirt_alt(insn_string, typenum, clobber) \ + "771:\n\t" insn_string "\n" "772:\n" \ + ".pushsection .parainstructions,\"a\"\n" \ + " .long 771b\n" \ + " .byte " __stringify(typenum) "\n" \ + " .byte 772b-771b\n" \ + " .short " __stringify(clobber) "\n" \ + ".popsection" + +static inline unsigned long __raw_local_save_flags(void) +{ + unsigned long f; + + __asm__ __volatile__(paravirt_alt( "pushl %%ecx; pushl %%edx;" + "call *%1;" + "popl %%edx; popl %%ecx", + PARAVIRT_SAVE_FLAGS, CLBR_NONE) + : "=a"(f): "m"(paravirt_ops.save_fl) + : "memory", "cc"); + return f; +} + +static inline void raw_local_irq_restore(unsigned long f) +{ + __asm__ __volatile__(paravirt_alt( "pushl %%ecx; pushl %%edx;" + "call *%1;" + "popl %%edx; popl %%ecx", + PARAVIRT_RESTORE_FLAGS, CLBR_EAX) + : "=a"(f) : "m" (paravirt_ops.restore_fl), "0"(f) + : "memory", "cc"); +} + +static inline void raw_local_irq_disable(void) +{ + __asm__ __volatile__(paravirt_alt( "pushl %%ecx; pushl %%edx;" + "call *%0;" + "popl %%edx; popl %%ecx", + PARAVIRT_IRQ_DISABLE, CLBR_EAX) + : : "m" (paravirt_ops.irq_disable) + : "memory", "eax", "cc"); +} + +static inline void raw_local_irq_enable(void) +{ + __asm__ __volatile__(paravirt_alt( "pushl %%ecx; pushl %%edx;" + "call *%0;" + "popl %%edx; popl %%ecx", + PARAVIRT_IRQ_ENABLE, CLBR_EAX) + : : "m" (paravirt_ops.irq_enable) + : "memory", "eax", "cc"); +} + +static inline unsigned long __raw_local_irq_save(void) +{ + unsigned long f; + + __asm__ __volatile__(paravirt_alt( "pushl %%ecx; pushl %%edx;" + "call *%1; pushl %%eax;" + "call *%2; popl %%eax;" + "popl %%edx; popl %%ecx", + PARAVIRT_SAVE_FLAGS_IRQ_DISABLE, + CLBR_NONE) + : "=a"(f) + : "m" (paravirt_ops.save_fl), + "m" (paravirt_ops.irq_disable) + : "memory", "cc"); + return f; +} + +#define CLI_STRING paravirt_alt("pushl %%ecx; pushl %%edx;" \ + "call *paravirt_ops+%c[irq_disable];" \ + "popl %%edx; popl %%ecx", \ + PARAVIRT_IRQ_DISABLE, CLBR_EAX) + +#define STI_STRING paravirt_alt("pushl %%ecx; pushl %%edx;" \ + "call *paravirt_ops+%c[irq_enable];" \ + "popl %%edx; popl %%ecx", \ + PARAVIRT_IRQ_ENABLE, CLBR_EAX) +#define CLI_STI_CLOBBERS , "%eax" +#define CLI_STI_INPUT_ARGS \ + , \ + [irq_disable] "i" (offsetof(struct paravirt_ops, irq_disable)), \ + [irq_enable] "i" (offsetof(struct paravirt_ops, irq_enable)) + +#else /* __ASSEMBLY__ */ + +#define PARA_PATCH(ptype, clobbers, ops) \ +771:; \ + ops; \ +772:; \ + .pushsection .parainstructions,"a"; \ + .long 771b; \ + .byte ptype; \ + .byte 772b-771b; \ + .short clobbers; \ + .popsection + +#define INTERRUPT_RETURN \ + PARA_PATCH(PARAVIRT_INTERRUPT_RETURN, CLBR_ANY, \ + jmp *%cs:paravirt_ops+PARAVIRT_iret) + +#define DISABLE_INTERRUPTS(clobbers) \ + PARA_PATCH(PARAVIRT_IRQ_DISABLE, clobbers, \ + pushl %ecx; pushl %edx; \ + call *paravirt_ops+PARAVIRT_irq_disable; \ + popl %edx; popl %ecx) \ + +#define ENABLE_INTERRUPTS(clobbers) \ + PARA_PATCH(PARAVIRT_IRQ_ENABLE, clobbers, \ + pushl %ecx; pushl %edx; \ + call *%cs:paravirt_ops+PARAVIRT_irq_enable; \ + popl %edx; popl %ecx) + +#define ENABLE_INTERRUPTS_SYSEXIT \ + PARA_PATCH(PARAVIRT_STI_SYSEXIT, CLBR_ANY, \ + jmp *%cs:paravirt_ops+PARAVIRT_irq_enable_sysexit) + +#define GET_CR0_INTO_EAX \ + call *paravirt_ops+PARAVIRT_read_cr0 + +#endif /* __ASSEMBLY__ */ +#endif /* CONFIG_PARAVIRT */ +#endif /* __ASM_PARAVIRT_H */ diff --git a/include/asm-i386/pda.h b/include/asm-i386/pda.h new file mode 100644 index 00000000000..2ba2736aa10 --- /dev/null +++ b/include/asm-i386/pda.h @@ -0,0 +1,100 @@ +/* + Per-processor Data Areas + Jeremy Fitzhardinge <jeremy@goop.org> 2006 + Based on asm-x86_64/pda.h by Andi Kleen. + */ +#ifndef _I386_PDA_H +#define _I386_PDA_H + +#include <linux/stddef.h> +#include <linux/types.h> + +struct i386_pda +{ + struct i386_pda *_pda; /* pointer to self */ + + int cpu_number; + struct task_struct *pcurrent; /* current process */ + struct pt_regs *irq_regs; +}; + +extern struct i386_pda *_cpu_pda[]; + +#define cpu_pda(i) (_cpu_pda[i]) + +#define pda_offset(field) offsetof(struct i386_pda, field) + +extern void __bad_pda_field(void); + +/* This variable is never instantiated. It is only used as a stand-in + for the real per-cpu PDA memory, so that gcc can understand what + memory operations the inline asms() below are performing. This + eliminates the need to make the asms volatile or have memory + clobbers, so gcc can readily analyse them. */ +extern struct i386_pda _proxy_pda; + +#define pda_to_op(op,field,val) \ + do { \ + typedef typeof(_proxy_pda.field) T__; \ + if (0) { T__ tmp__; tmp__ = (val); } \ + switch (sizeof(_proxy_pda.field)) { \ + case 1: \ + asm(op "b %1,%%gs:%c2" \ + : "+m" (_proxy_pda.field) \ + :"ri" ((T__)val), \ + "i"(pda_offset(field))); \ + break; \ + case 2: \ + asm(op "w %1,%%gs:%c2" \ + : "+m" (_proxy_pda.field) \ + :"ri" ((T__)val), \ + "i"(pda_offset(field))); \ + break; \ + case 4: \ + asm(op "l %1,%%gs:%c2" \ + : "+m" (_proxy_pda.field) \ + :"ri" ((T__)val), \ + "i"(pda_offset(field))); \ + break; \ + default: __bad_pda_field(); \ + } \ + } while (0) + +#define pda_from_op(op,field) \ + ({ \ + typeof(_proxy_pda.field) ret__; \ + switch (sizeof(_proxy_pda.field)) { \ + case 1: \ + asm(op "b %%gs:%c1,%0" \ + : "=r" (ret__) \ + : "i" (pda_offset(field)), \ + "m" (_proxy_pda.field)); \ + break; \ + case 2: \ + asm(op "w %%gs:%c1,%0" \ + : "=r" (ret__) \ + : "i" (pda_offset(field)), \ + "m" (_proxy_pda.field)); \ + break; \ + case 4: \ + asm(op "l %%gs:%c1,%0" \ + : "=r" (ret__) \ + : "i" (pda_offset(field)), \ + "m" (_proxy_pda.field)); \ + break; \ + default: __bad_pda_field(); \ + } \ + ret__; }) + +/* Return a pointer to a pda field */ +#define pda_addr(field) \ + ((typeof(_proxy_pda.field) *)((unsigned char *)read_pda(_pda) + \ + pda_offset(field))) + +#define read_pda(field) pda_from_op("mov",field) +#define write_pda(field,val) pda_to_op("mov",field,val) +#define add_pda(field,val) pda_to_op("add",field,val) +#define sub_pda(field,val) pda_to_op("sub",field,val) +#define or_pda(field,val) pda_to_op("or",field,val) + +#endif /* _I386_PDA_H */ diff --git a/include/asm-i386/percpu.h b/include/asm-i386/percpu.h index 5764afa4b6a..510ae1d3486 100644 --- a/include/asm-i386/percpu.h +++ b/include/asm-i386/percpu.h @@ -1,6 +1,31 @@ #ifndef __ARCH_I386_PERCPU__ #define __ARCH_I386_PERCPU__ +#ifndef __ASSEMBLY__ #include <asm-generic/percpu.h> +#else + +/* + * PER_CPU finds an address of a per-cpu variable. + * + * Args: + * var - variable name + * cpu - 32bit register containing the current CPU number + * + * The resulting address is stored in the "cpu" argument. + * + * Example: + * PER_CPU(cpu_gdt_descr, %ebx) + */ +#ifdef CONFIG_SMP +#define PER_CPU(var, cpu) \ + movl __per_cpu_offset(,cpu,4), cpu; \ + addl $per_cpu__/**/var, cpu; +#else /* ! SMP */ +#define PER_CPU(var, cpu) \ + movl $per_cpu__/**/var, cpu; +#endif /* SMP */ + +#endif /* !__ASSEMBLY__ */ #endif /* __ARCH_I386_PERCPU__ */ diff --git a/include/asm-i386/pgtable-2level.h b/include/asm-i386/pgtable-2level.h index 8d8d3b9ecdb..38c3fcc0676 100644 --- a/include/asm-i386/pgtable-2level.h +++ b/include/asm-i386/pgtable-2level.h @@ -1,8 +1,6 @@ #ifndef _I386_PGTABLE_2LEVEL_H #define _I386_PGTABLE_2LEVEL_H -#include <asm-generic/pgtable-nopmd.h> - #define pte_ERROR(e) \ printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, (e).pte_low) #define pgd_ERROR(e) \ @@ -13,17 +11,19 @@ * within a page table are directly modified. Thus, the following * hook is made available. */ +#ifndef CONFIG_PARAVIRT #define set_pte(pteptr, pteval) (*(pteptr) = pteval) #define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval) +#define set_pmd(pmdptr, pmdval) (*(pmdptr) = (pmdval)) +#endif + #define set_pte_atomic(pteptr, pteval) set_pte(pteptr,pteval) #define set_pte_present(mm,addr,ptep,pteval) set_pte_at(mm,addr,ptep,pteval) -#define set_pmd(pmdptr, pmdval) (*(pmdptr) = (pmdval)) #define pte_clear(mm,addr,xp) do { set_pte_at(mm, addr, xp, __pte(0)); } while (0) #define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0) -#define __HAVE_ARCH_PTEP_GET_AND_CLEAR -#define ptep_get_and_clear(mm,addr,xp) __pte(xchg(&(xp)->pte_low, 0)) +#define raw_ptep_get_and_clear(xp) __pte(xchg(&(xp)->pte_low, 0)) #define pte_page(x) pfn_to_page(pte_pfn(x)) #define pte_none(x) (!(x).pte_low) diff --git a/include/asm-i386/pgtable-3level.h b/include/asm-i386/pgtable-3level.h index c2d701ea35b..7a2318f3830 100644 --- a/include/asm-i386/pgtable-3level.h +++ b/include/asm-i386/pgtable-3level.h @@ -1,8 +1,6 @@ #ifndef _I386_PGTABLE_3LEVEL_H #define _I386_PGTABLE_3LEVEL_H -#include <asm-generic/pgtable-nopud.h> - /* * Intel Physical Address Extension (PAE) Mode - three-level page * tables on PPro+ CPUs. @@ -44,6 +42,7 @@ static inline int pte_exec_kernel(pte_t pte) return pte_x(pte); } +#ifndef CONFIG_PARAVIRT /* Rules for using set_pte: the pte being assigned *must* be * either not present or in a state where the hardware will * not attempt to update the pte. In places where this is @@ -81,25 +80,6 @@ static inline void set_pte_present(struct mm_struct *mm, unsigned long addr, pte (*(pudptr) = (pudval)) /* - * Pentium-II erratum A13: in PAE mode we explicitly have to flush - * the TLB via cr3 if the top-level pgd is changed... - * We do not let the generic code free and clear pgd entries due to - * this erratum. - */ -static inline void pud_clear (pud_t * pud) { } - -#define pud_page(pud) \ -((struct page *) __va(pud_val(pud) & PAGE_MASK)) - -#define pud_page_vaddr(pud) \ -((unsigned long) __va(pud_val(pud) & PAGE_MASK)) - - -/* Find an entry in the second-level page table.. */ -#define pmd_offset(pud, address) ((pmd_t *) pud_page(*(pud)) + \ - pmd_index(address)) - -/* * For PTEs and PDEs, we must clear the P-bit first when clearing a page table * entry, so clear the bottom half first and enforce ordering with a compiler * barrier. @@ -118,9 +98,28 @@ static inline void pmd_clear(pmd_t *pmd) smp_wmb(); *(tmp + 1) = 0; } +#endif + +/* + * Pentium-II erratum A13: in PAE mode we explicitly have to flush + * the TLB via cr3 if the top-level pgd is changed... + * We do not let the generic code free and clear pgd entries due to + * this erratum. + */ +static inline void pud_clear (pud_t * pud) { } + +#define pud_page(pud) \ +((struct page *) __va(pud_val(pud) & PAGE_MASK)) + +#define pud_page_vaddr(pud) \ +((unsigned long) __va(pud_val(pud) & PAGE_MASK)) + + +/* Find an entry in the second-level page table.. */ +#define pmd_offset(pud, address) ((pmd_t *) pud_page(*(pud)) + \ + pmd_index(address)) -#define __HAVE_ARCH_PTEP_GET_AND_CLEAR -static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) +static inline pte_t raw_ptep_get_and_clear(pte_t *ptep) { pte_t res; diff --git a/include/asm-i386/pgtable.h b/include/asm-i386/pgtable.h index 7d398f493dd..e6a4723f0eb 100644 --- a/include/asm-i386/pgtable.h +++ b/include/asm-i386/pgtable.h @@ -15,6 +15,7 @@ #include <asm/processor.h> #include <asm/fixmap.h> #include <linux/threads.h> +#include <asm/paravirt.h> #ifndef _I386_BITOPS_H #include <asm/bitops.h> @@ -34,14 +35,14 @@ struct vm_area_struct; #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page)) extern unsigned long empty_zero_page[1024]; extern pgd_t swapper_pg_dir[1024]; -extern kmem_cache_t *pgd_cache; -extern kmem_cache_t *pmd_cache; +extern struct kmem_cache *pgd_cache; +extern struct kmem_cache *pmd_cache; extern spinlock_t pgd_lock; extern struct page *pgd_list; -void pmd_ctor(void *, kmem_cache_t *, unsigned long); -void pgd_ctor(void *, kmem_cache_t *, unsigned long); -void pgd_dtor(void *, kmem_cache_t *, unsigned long); +void pmd_ctor(void *, struct kmem_cache *, unsigned long); +void pgd_ctor(void *, struct kmem_cache *, unsigned long); +void pgd_dtor(void *, struct kmem_cache *, unsigned long); void pgtable_cache_init(void); void paging_init(void); @@ -246,6 +247,7 @@ static inline pte_t pte_mkhuge(pte_t pte) { (pte).pte_low |= _PAGE_PSE; return p # include <asm/pgtable-2level.h> #endif +#ifndef CONFIG_PARAVIRT /* * Rules for using pte_update - it must be called after any PTE update which * has not been done using the set_pte / clear_pte interfaces. It is used by @@ -261,7 +263,7 @@ static inline pte_t pte_mkhuge(pte_t pte) { (pte).pte_low |= _PAGE_PSE; return p */ #define pte_update(mm, addr, ptep) do { } while (0) #define pte_update_defer(mm, addr, ptep) do { } while (0) - +#endif /* * We only update the dirty/accessed state if we set @@ -275,7 +277,7 @@ static inline pte_t pte_mkhuge(pte_t pte) { (pte).pte_low |= _PAGE_PSE; return p do { \ if (dirty) { \ (ptep)->pte_low = (entry).pte_low; \ - pte_update_defer((vma)->vm_mm, (addr), (ptep)); \ + pte_update_defer((vma)->vm_mm, (address), (ptep)); \ flush_tlb_page(vma, address); \ } \ } while (0) @@ -305,7 +307,7 @@ do { \ __dirty = pte_dirty(*(ptep)); \ if (__dirty) { \ clear_bit(_PAGE_BIT_DIRTY, &(ptep)->pte_low); \ - pte_update_defer((vma)->vm_mm, (addr), (ptep)); \ + pte_update_defer((vma)->vm_mm, (address), (ptep)); \ flush_tlb_page(vma, address); \ } \ __dirty; \ @@ -318,12 +320,20 @@ do { \ __young = pte_young(*(ptep)); \ if (__young) { \ clear_bit(_PAGE_BIT_ACCESSED, &(ptep)->pte_low); \ - pte_update_defer((vma)->vm_mm, (addr), (ptep)); \ + pte_update_defer((vma)->vm_mm, (address), (ptep)); \ flush_tlb_page(vma, address); \ } \ __young; \ }) +#define __HAVE_ARCH_PTEP_GET_AND_CLEAR +static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) +{ + pte_t pte = raw_ptep_get_and_clear(ptep); + pte_update(mm, addr, ptep); + return pte; +} + #define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, unsigned long addr, pte_t *ptep, int full) { diff --git a/include/asm-i386/processor.h b/include/asm-i386/processor.h index e0ddca94d50..a52d6544042 100644 --- a/include/asm-i386/processor.h +++ b/include/asm-i386/processor.h @@ -20,6 +20,7 @@ #include <linux/threads.h> #include <asm/percpu.h> #include <linux/cpumask.h> +#include <linux/init.h> /* flag for disabling the tsc */ extern int tsc_disable; @@ -72,6 +73,7 @@ struct cpuinfo_x86 { #endif unsigned char x86_max_cores; /* cpuid returned max cores value */ unsigned char apicid; + unsigned short x86_clflush_size; #ifdef CONFIG_SMP unsigned char booted_cores; /* number of cores as seen by OS */ __u8 phys_proc_id; /* Physical processor id. */ @@ -111,6 +113,8 @@ extern struct cpuinfo_x86 cpu_data[]; extern int cpu_llc_id[NR_CPUS]; extern char ignore_fpu_irq; +void __init cpu_detect(struct cpuinfo_x86 *c); + extern void identify_cpu(struct cpuinfo_x86 *); extern void print_cpu_info(struct cpuinfo_x86 *); extern unsigned int init_intel_cacheinfo(struct cpuinfo_x86 *c); @@ -143,8 +147,8 @@ static inline void detect_ht(struct cpuinfo_x86 *c) {} #define X86_EFLAGS_VIP 0x00100000 /* Virtual Interrupt Pending */ #define X86_EFLAGS_ID 0x00200000 /* CPUID detection flag */ -static inline void __cpuid(unsigned int *eax, unsigned int *ebx, - unsigned int *ecx, unsigned int *edx) +static inline fastcall void native_cpuid(unsigned int *eax, unsigned int *ebx, + unsigned int *ecx, unsigned int *edx) { /* ecx is often an input as well as an output. */ __asm__("cpuid" @@ -155,59 +159,6 @@ static inline void __cpuid(unsigned int *eax, unsigned int *ebx, : "0" (*eax), "2" (*ecx)); } -/* - * Generic CPUID function - * clear %ecx since some cpus (Cyrix MII) do not set or clear %ecx - * resulting in stale register contents being returned. - */ -static inline void cpuid(unsigned int op, unsigned int *eax, unsigned int *ebx, unsigned int *ecx, unsigned int *edx) -{ - *eax = op; - *ecx = 0; - __cpuid(eax, ebx, ecx, edx); -} - -/* Some CPUID calls want 'count' to be placed in ecx */ -static inline void cpuid_count(int op, int count, int *eax, int *ebx, int *ecx, - int *edx) -{ - *eax = op; - *ecx = count; - __cpuid(eax, ebx, ecx, edx); -} - -/* - * CPUID functions returning a single datum - */ -static inline unsigned int cpuid_eax(unsigned int op) -{ - unsigned int eax, ebx, ecx, edx; - - cpuid(op, &eax, &ebx, &ecx, &edx); - return eax; -} -static inline unsigned int cpuid_ebx(unsigned int op) -{ - unsigned int eax, ebx, ecx, edx; - - cpuid(op, &eax, &ebx, &ecx, &edx); - return ebx; -} -static inline unsigned int cpuid_ecx(unsigned int op) -{ - unsigned int eax, ebx, ecx, edx; - - cpuid(op, &eax, &ebx, &ecx, &edx); - return ecx; -} -static inline unsigned int cpuid_edx(unsigned int op) -{ - unsigned int eax, ebx, ecx, edx; - - cpuid(op, &eax, &ebx, &ecx, &edx); - return edx; -} - #define load_cr3(pgdir) write_cr3(__pa(pgdir)) /* @@ -473,6 +424,7 @@ struct thread_struct { .vm86_info = NULL, \ .sysenter_cs = __KERNEL_CS, \ .io_bitmap_ptr = NULL, \ + .gs = __KERNEL_PDA, \ } /* @@ -489,18 +441,9 @@ struct thread_struct { .io_bitmap = { [ 0 ... IO_BITMAP_LONGS] = ~0 }, \ } -static inline void load_esp0(struct tss_struct *tss, struct thread_struct *thread) -{ - tss->esp0 = thread->esp0; - /* This can only happen when SEP is enabled, no need to test "SEP"arately */ - if (unlikely(tss->ss1 != thread->sysenter_cs)) { - tss->ss1 = thread->sysenter_cs; - wrmsr(MSR_IA32_SYSENTER_CS, thread->sysenter_cs, 0); - } -} - #define start_thread(regs, new_eip, new_esp) do { \ - __asm__("movl %0,%%fs ; movl %0,%%gs": :"r" (0)); \ + __asm__("movl %0,%%fs": :"r" (0)); \ + regs->xgs = 0; \ set_fs(USER_DS); \ regs->xds = __USER_DS; \ regs->xes = __USER_DS; \ @@ -510,33 +453,6 @@ static inline void load_esp0(struct tss_struct *tss, struct thread_struct *threa regs->esp = new_esp; \ } while (0) -/* - * These special macros can be used to get or set a debugging register - */ -#define get_debugreg(var, register) \ - __asm__("movl %%db" #register ", %0" \ - :"=r" (var)) -#define set_debugreg(value, register) \ - __asm__("movl %0,%%db" #register \ - : /* no output */ \ - :"r" (value)) - -/* - * Set IOPL bits in EFLAGS from given mask - */ -static inline void set_iopl_mask(unsigned mask) -{ - unsigned int reg; - __asm__ __volatile__ ("pushfl;" - "popl %0;" - "andl %1, %0;" - "orl %2, %0;" - "pushl %0;" - "popfl" - : "=&r" (reg) - : "i" (~X86_EFLAGS_IOPL), "r" (mask)); -} - /* Forward declaration, a strange C thing */ struct task_struct; struct mm_struct; @@ -628,6 +544,105 @@ static inline void rep_nop(void) #define cpu_relax() rep_nop() +#ifdef CONFIG_PARAVIRT +#include <asm/paravirt.h> +#else +#define paravirt_enabled() 0 +#define __cpuid native_cpuid + +static inline void load_esp0(struct tss_struct *tss, struct thread_struct *thread) +{ + tss->esp0 = thread->esp0; + /* This can only happen when SEP is enabled, no need to test "SEP"arately */ + if (unlikely(tss->ss1 != thread->sysenter_cs)) { + tss->ss1 = thread->sysenter_cs; + wrmsr(MSR_IA32_SYSENTER_CS, thread->sysenter_cs, 0); + } +} + +/* + * These special macros can be used to get or set a debugging register + */ +#define get_debugreg(var, register) \ + __asm__("movl %%db" #register ", %0" \ + :"=r" (var)) +#define set_debugreg(value, register) \ + __asm__("movl %0,%%db" #register \ + : /* no output */ \ + :"r" (value)) + +#define set_iopl_mask native_set_iopl_mask +#endif /* CONFIG_PARAVIRT */ + +/* + * Set IOPL bits in EFLAGS from given mask + */ +static fastcall inline void native_set_iopl_mask(unsigned mask) +{ + unsigned int reg; + __asm__ __volatile__ ("pushfl;" + "popl %0;" + "andl %1, %0;" + "orl %2, %0;" + "pushl %0;" + "popfl" + : "=&r" (reg) + : "i" (~X86_EFLAGS_IOPL), "r" (mask)); +} + +/* + * Generic CPUID function + * clear %ecx since some cpus (Cyrix MII) do not set or clear %ecx + * resulting in stale register contents being returned. + */ +static inline void cpuid(unsigned int op, unsigned int *eax, unsigned int *ebx, unsigned int *ecx, unsigned int *edx) +{ + *eax = op; + *ecx = 0; + __cpuid(eax, ebx, ecx, edx); +} + +/* Some CPUID calls want 'count' to be placed in ecx */ +static inline void cpuid_count(int op, int count, int *eax, int *ebx, int *ecx, + int *edx) +{ + *eax = op; + *ecx = count; + __cpuid(eax, ebx, ecx, edx); +} + +/* + * CPUID functions returning a single datum + */ +static inline unsigned int cpuid_eax(unsigned int op) +{ + unsigned int eax, ebx, ecx, edx; + + cpuid(op, &eax, &ebx, &ecx, &edx); + return eax; +} +static inline unsigned int cpuid_ebx(unsigned int op) +{ + unsigned int eax, ebx, ecx, edx; + + cpuid(op, &eax, &ebx, &ecx, &edx); + return ebx; +} +static inline unsigned int cpuid_ecx(unsigned int op) +{ + unsigned int eax, ebx, ecx, edx; + + cpuid(op, &eax, &ebx, &ecx, &edx); + return ecx; +} +static inline unsigned int cpuid_edx(unsigned int op) +{ + unsigned int eax, ebx, ecx, edx; + + cpuid(op, &eax, &ebx, &ecx, &edx); + return edx; +} + /* generic versions from gas */ #define GENERIC_NOP1 ".byte 0x90\n" #define GENERIC_NOP2 ".byte 0x89,0xf6\n" @@ -727,4 +742,7 @@ extern unsigned long boot_option_idle_override; extern void enable_sep_cpu(void); extern int sysenter_setup(void); +extern int init_gdt(int cpu, struct task_struct *idle); +extern void secondary_cpu_init(void); + #endif /* __ASM_I386_PROCESSOR_H */ diff --git a/include/asm-i386/ptrace.h b/include/asm-i386/ptrace.h index d505f501077..bdbc894339b 100644 --- a/include/asm-i386/ptrace.h +++ b/include/asm-i386/ptrace.h @@ -16,6 +16,8 @@ struct pt_regs { long eax; int xds; int xes; + /* int xfs; */ + int xgs; long orig_eax; long eip; int xcs; diff --git a/include/asm-i386/rwsem.h b/include/asm-i386/rwsem.h index bc598d6388e..041906f3c6d 100644 --- a/include/asm-i386/rwsem.h +++ b/include/asm-i386/rwsem.h @@ -75,8 +75,8 @@ struct rw_semaphore { #define __RWSEM_INITIALIZER(name) \ -{ RWSEM_UNLOCKED_VALUE, SPIN_LOCK_UNLOCKED, LIST_HEAD_INIT((name).wait_list) \ - __RWSEM_DEP_MAP_INIT(name) } +{ RWSEM_UNLOCKED_VALUE, __SPIN_LOCK_UNLOCKED((name).wait_lock), \ + LIST_HEAD_INIT((name).wait_list) __RWSEM_DEP_MAP_INIT(name) } #define DECLARE_RWSEM(name) \ struct rw_semaphore name = __RWSEM_INITIALIZER(name) diff --git a/include/asm-i386/segment.h b/include/asm-i386/segment.h index b7ab59685ba..3c796af3377 100644 --- a/include/asm-i386/segment.h +++ b/include/asm-i386/segment.h @@ -39,7 +39,7 @@ * 25 - APM BIOS support * * 26 - ESPFIX small SS - * 27 - unused + * 27 - PDA [ per-cpu private data area ] * 28 - unused * 29 - unused * 30 - unused @@ -74,6 +74,9 @@ #define GDT_ENTRY_ESPFIX_SS (GDT_ENTRY_KERNEL_BASE + 14) #define __ESPFIX_SS (GDT_ENTRY_ESPFIX_SS * 8) +#define GDT_ENTRY_PDA (GDT_ENTRY_KERNEL_BASE + 15) +#define __KERNEL_PDA (GDT_ENTRY_PDA * 8) + #define GDT_ENTRY_DOUBLEFAULT_TSS 31 /* @@ -128,5 +131,7 @@ #define SEGMENT_LDT 0x4 #define SEGMENT_GDT 0x0 +#ifndef CONFIG_PARAVIRT #define get_kernel_rpl() 0 #endif +#endif diff --git a/include/asm-i386/setup.h b/include/asm-i386/setup.h index 2734909eff8..67659dbaf12 100644 --- a/include/asm-i386/setup.h +++ b/include/asm-i386/setup.h @@ -6,6 +6,8 @@ #ifndef _i386_SETUP_H #define _i386_SETUP_H +#define COMMAND_LINE_SIZE 256 + #ifdef __KERNEL__ #include <linux/pfn.h> @@ -14,10 +16,8 @@ */ #define MAXMEM_PFN PFN_DOWN(MAXMEM) #define MAX_NONPAE_PFN (1 << 20) -#endif #define PARAM_SIZE 4096 -#define COMMAND_LINE_SIZE 256 #define OLD_CL_MAGIC_ADDR 0x90020 #define OLD_CL_MAGIC 0xA33F @@ -70,6 +70,7 @@ extern unsigned char boot_params[PARAM_SIZE]; struct e820entry; char * __init machine_specific_memory_setup(void); +char *memory_setup(void); int __init copy_e820_map(struct e820entry * biosmap, int nr_map); int __init sanitize_e820_map(struct e820entry * biosmap, char * pnr_map); @@ -78,4 +79,6 @@ void __init add_memory_region(unsigned long long start, #endif /* __ASSEMBLY__ */ +#endif /* __KERNEL__ */ + #endif /* _i386_SETUP_H */ diff --git a/include/asm-i386/smp.h b/include/asm-i386/smp.h index bd59c1508e7..64fe624c02c 100644 --- a/include/asm-i386/smp.h +++ b/include/asm-i386/smp.h @@ -8,6 +8,7 @@ #include <linux/kernel.h> #include <linux/threads.h> #include <linux/cpumask.h> +#include <asm/pda.h> #endif #ifdef CONFIG_X86_LOCAL_APIC @@ -56,7 +57,7 @@ extern void cpu_uninit(void); * from the initial startup. We map APIC_BASE very early in page_setup(), * so this is correct in the x86 case. */ -#define raw_smp_processor_id() (current_thread_info()->cpu) +#define raw_smp_processor_id() (read_pda(cpu_number)) extern cpumask_t cpu_callout_map; extern cpumask_t cpu_callin_map; diff --git a/include/asm-i386/spinlock.h b/include/asm-i386/spinlock.h index c18b71fae6b..d3bcebed60c 100644 --- a/include/asm-i386/spinlock.h +++ b/include/asm-i386/spinlock.h @@ -7,8 +7,14 @@ #include <asm/processor.h> #include <linux/compiler.h> +#ifdef CONFIG_PARAVIRT +#include <asm/paravirt.h> +#else #define CLI_STRING "cli" #define STI_STRING "sti" +#define CLI_STI_CLOBBERS +#define CLI_STI_INPUT_ARGS +#endif /* CONFIG_PARAVIRT */ /* * Your basic SMP spinlocks, allowing only a single CPU anywhere @@ -53,25 +59,28 @@ static inline void __raw_spin_lock_flags(raw_spinlock_t *lock, unsigned long fla { asm volatile( "\n1:\t" - LOCK_PREFIX " ; decb %0\n\t" + LOCK_PREFIX " ; decb %[slock]\n\t" "jns 5f\n" "2:\t" - "testl $0x200, %1\n\t" + "testl $0x200, %[flags]\n\t" "jz 4f\n\t" STI_STRING "\n" "3:\t" "rep;nop\n\t" - "cmpb $0, %0\n\t" + "cmpb $0, %[slock]\n\t" "jle 3b\n\t" CLI_STRING "\n\t" "jmp 1b\n" "4:\t" "rep;nop\n\t" - "cmpb $0, %0\n\t" + "cmpb $0, %[slock]\n\t" "jg 1b\n\t" "jmp 4b\n" "5:\n\t" - : "+m" (lock->slock) : "r" (flags) : "memory"); + : [slock] "+m" (lock->slock) + : [flags] "r" (flags) + CLI_STI_INPUT_ARGS + : "memory" CLI_STI_CLOBBERS); } #endif diff --git a/include/asm-i386/spinlock_types.h b/include/asm-i386/spinlock_types.h index 59efe849f35..4da9345c150 100644 --- a/include/asm-i386/spinlock_types.h +++ b/include/asm-i386/spinlock_types.h @@ -6,13 +6,13 @@ #endif typedef struct { - volatile unsigned int slock; + unsigned int slock; } raw_spinlock_t; #define __RAW_SPIN_LOCK_UNLOCKED { 1 } typedef struct { - volatile unsigned int lock; + unsigned int lock; } raw_rwlock_t; #define __RAW_RW_LOCK_UNLOCKED { RW_LOCK_BIAS } diff --git a/include/asm-i386/suspend.h b/include/asm-i386/suspend.h index 08be1e5009d..8dbaafe611f 100644 --- a/include/asm-i386/suspend.h +++ b/include/asm-i386/suspend.h @@ -6,29 +6,14 @@ #include <asm/desc.h> #include <asm/i387.h> -static inline int -arch_prepare_suspend(void) -{ - /* If you want to make non-PSE machine work, turn off paging - in swsusp_arch_suspend. swsusp_pg_dir should have identity mapping, so - it could work... */ - if (!cpu_has_pse) { - printk(KERN_ERR "PSE is required for swsusp.\n"); - return -EPERM; - } - return 0; -} +static inline int arch_prepare_suspend(void) { return 0; } /* image of the saved processor state */ struct saved_context { u16 es, fs, gs, ss; unsigned long cr0, cr2, cr3, cr4; - u16 gdt_pad; - u16 gdt_limit; - unsigned long gdt_base; - u16 idt_pad; - u16 idt_limit; - unsigned long idt_base; + struct Xgt_desc_struct gdt; + struct Xgt_desc_struct idt; u16 ldt; u16 tss; unsigned long tr; diff --git a/include/asm-i386/system.h b/include/asm-i386/system.h index a6dabbcd6e6..a6d20d9a1a3 100644 --- a/include/asm-i386/system.h +++ b/include/asm-i386/system.h @@ -88,6 +88,9 @@ __asm__ __volatile__ ("movw %%dx,%1\n\t" \ #define savesegment(seg, value) \ asm volatile("mov %%" #seg ",%0":"=rm" (value)) +#ifdef CONFIG_PARAVIRT +#include <asm/paravirt.h> +#else #define read_cr0() ({ \ unsigned int __dummy; \ __asm__ __volatile__( \ @@ -139,17 +142,18 @@ __asm__ __volatile__ ("movw %%dx,%1\n\t" \ #define write_cr4(x) \ __asm__ __volatile__("movl %0,%%cr4": :"r" (x)) -/* - * Clear and set 'TS' bit respectively - */ +#define wbinvd() \ + __asm__ __volatile__ ("wbinvd": : :"memory") + +/* Clear the 'TS' bit */ #define clts() __asm__ __volatile__ ("clts") +#endif/* CONFIG_PARAVIRT */ + +/* Set the 'TS' bit */ #define stts() write_cr0(8 | read_cr0()) #endif /* __KERNEL__ */ -#define wbinvd() \ - __asm__ __volatile__ ("wbinvd": : :"memory") - static inline unsigned long get_limit(unsigned long segment) { unsigned long __limit; diff --git a/include/asm-i386/termbits.h b/include/asm-i386/termbits.h index 72c10e3190f..12baf1d6343 100644 --- a/include/asm-i386/termbits.h +++ b/include/asm-i386/termbits.h @@ -17,6 +17,17 @@ struct termios { cc_t c_cc[NCCS]; /* control characters */ }; +struct ktermios { + tcflag_t c_iflag; /* input mode flags */ + tcflag_t c_oflag; /* output mode flags */ + tcflag_t c_cflag; /* control mode flags */ + tcflag_t c_lflag; /* local mode flags */ + cc_t c_line; /* line discipline */ + cc_t c_cc[NCCS]; /* control characters */ + speed_t c_ispeed; /* input speed */ + speed_t c_ospeed; /* output speed */ +}; + /* c_cc characters */ #define VINTR 0 #define VQUIT 1 diff --git a/include/asm-i386/thread_info.h b/include/asm-i386/thread_info.h index 54d6d7aea93..4b187bb377b 100644 --- a/include/asm-i386/thread_info.h +++ b/include/asm-i386/thread_info.h @@ -95,15 +95,7 @@ static inline struct thread_info *current_thread_info(void) /* thread information allocation */ #ifdef CONFIG_DEBUG_STACK_USAGE -#define alloc_thread_info(tsk) \ - ({ \ - struct thread_info *ret; \ - \ - ret = kmalloc(THREAD_SIZE, GFP_KERNEL); \ - if (ret) \ - memset(ret, 0, THREAD_SIZE); \ - ret; \ - }) +#define alloc_thread_info(tsk) kzalloc(THREAD_SIZE, GFP_KERNEL) #else #define alloc_thread_info(tsk) kmalloc(THREAD_SIZE, GFP_KERNEL) #endif @@ -142,6 +134,7 @@ static inline struct thread_info *current_thread_info(void) #define TIF_MEMDIE 16 #define TIF_DEBUG 17 /* uses debug registers */ #define TIF_IO_BITMAP 18 /* uses I/O bitmap */ +#define TIF_FREEZE 19 /* is freezing for suspend */ #define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) #define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME) @@ -155,6 +148,7 @@ static inline struct thread_info *current_thread_info(void) #define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK) #define _TIF_DEBUG (1<<TIF_DEBUG) #define _TIF_IO_BITMAP (1<<TIF_IO_BITMAP) +#define _TIF_FREEZE (1<<TIF_FREEZE) /* work to do on interrupt/exception return */ #define _TIF_WORK_MASK \ diff --git a/include/asm-i386/time.h b/include/asm-i386/time.h new file mode 100644 index 00000000000..ea8065af825 --- /dev/null +++ b/include/asm-i386/time.h @@ -0,0 +1,41 @@ +#ifndef _ASMi386_TIME_H +#define _ASMi386_TIME_H + +#include <linux/efi.h> +#include "mach_time.h" + +static inline unsigned long native_get_wallclock(void) +{ + unsigned long retval; + + if (efi_enabled) + retval = efi_get_time(); + else + retval = mach_get_cmos_time(); + + return retval; +} + +static inline int native_set_wallclock(unsigned long nowtime) +{ + int retval; + + if (efi_enabled) + retval = efi_set_rtc_mmss(nowtime); + else + retval = mach_set_rtc_mmss(nowtime); + + return retval; +} + +#ifdef CONFIG_PARAVIRT +#include <asm/paravirt.h> +#else /* !CONFIG_PARAVIRT */ + +#define get_wallclock() native_get_wallclock() +#define set_wallclock(x) native_set_wallclock(x) +#define do_time_init() time_init_hook() + +#endif /* CONFIG_PARAVIRT */ + +#endif diff --git a/include/asm-i386/tlbflush.h b/include/asm-i386/tlbflush.h index 360648b0f2b..4dd82840d53 100644 --- a/include/asm-i386/tlbflush.h +++ b/include/asm-i386/tlbflush.h @@ -4,7 +4,15 @@ #include <linux/mm.h> #include <asm/processor.h> -#define __flush_tlb() \ +#ifdef CONFIG_PARAVIRT +#include <asm/paravirt.h> +#else +#define __flush_tlb() __native_flush_tlb() +#define __flush_tlb_global() __native_flush_tlb_global() +#define __flush_tlb_single(addr) __native_flush_tlb_single(addr) +#endif + +#define __native_flush_tlb() \ do { \ unsigned int tmpreg; \ \ @@ -19,7 +27,7 @@ * Global pages have to be flushed a bit differently. Not a real * performance problem because this does not happen often. */ -#define __flush_tlb_global() \ +#define __native_flush_tlb_global() \ do { \ unsigned int tmpreg, cr4, cr4_orig; \ \ @@ -36,6 +44,9 @@ : "memory"); \ } while (0) +#define __native_flush_tlb_single(addr) \ + __asm__ __volatile__("invlpg (%0)" ::"r" (addr) : "memory") + # define __flush_tlb_all() \ do { \ if (cpu_has_pge) \ @@ -46,9 +57,6 @@ #define cpu_has_invlpg (boot_cpu_data.x86 > 3) -#define __flush_tlb_single(addr) \ - __asm__ __volatile__("invlpg (%0)" ::"r" (addr) : "memory") - #ifdef CONFIG_X86_INVLPG # define __flush_tlb_one(addr) __flush_tlb_single(addr) #else diff --git a/include/asm-i386/topology.h b/include/asm-i386/topology.h index 978d0959613..ac58580ad66 100644 --- a/include/asm-i386/topology.h +++ b/include/asm-i386/topology.h @@ -89,6 +89,7 @@ static inline int node_to_first_cpu(int node) .flags = SD_LOAD_BALANCE \ | SD_BALANCE_EXEC \ | SD_BALANCE_FORK \ + | SD_SERIALIZE \ | SD_WAKE_BALANCE, \ .last_balance = jiffies, \ .balance_interval = 1, \ diff --git a/include/asm-i386/types.h b/include/asm-i386/types.h index 4b4b295ccdb..ad0a55bd782 100644 --- a/include/asm-i386/types.h +++ b/include/asm-i386/types.h @@ -57,16 +57,6 @@ typedef u32 dma_addr_t; #endif typedef u64 dma64_addr_t; -#ifdef CONFIG_LBD -typedef u64 sector_t; -#define HAVE_SECTOR_T -#endif - -#ifdef CONFIG_LSF -typedef u64 blkcnt_t; -#define HAVE_BLKCNT_T -#endif - #endif /* __ASSEMBLY__ */ #endif /* __KERNEL__ */ diff --git a/include/asm-i386/unistd.h b/include/asm-i386/unistd.h index beeeaf6b054..833fa1704ff 100644 --- a/include/asm-i386/unistd.h +++ b/include/asm-i386/unistd.h @@ -329,104 +329,6 @@ #ifdef __KERNEL__ #define NR_syscalls 320 -#include <linux/err.h> - -/* - * user-visible error numbers are in the range -1 - -MAX_ERRNO: see - * <asm-i386/errno.h> - */ -#define __syscall_return(type, res) \ -do { \ - if ((unsigned long)(res) >= (unsigned long)(-MAX_ERRNO)) { \ - errno = -(res); \ - res = -1; \ - } \ - return (type) (res); \ -} while (0) - -/* XXX - _foo needs to be __foo, while __NR_bar could be _NR_bar. */ -#define _syscall0(type,name) \ -type name(void) \ -{ \ -long __res; \ -__asm__ volatile ("int $0x80" \ - : "=a" (__res) \ - : "0" (__NR_##name)); \ -__syscall_return(type,__res); \ -} - -#define _syscall1(type,name,type1,arg1) \ -type name(type1 arg1) \ -{ \ -long __res; \ -__asm__ volatile ("push %%ebx ; movl %2,%%ebx ; int $0x80 ; pop %%ebx" \ - : "=a" (__res) \ - : "0" (__NR_##name),"ri" ((long)(arg1)) : "memory"); \ -__syscall_return(type,__res); \ -} - -#define _syscall2(type,name,type1,arg1,type2,arg2) \ -type name(type1 arg1,type2 arg2) \ -{ \ -long __res; \ -__asm__ volatile ("push %%ebx ; movl %2,%%ebx ; int $0x80 ; pop %%ebx" \ - : "=a" (__res) \ - : "0" (__NR_##name),"ri" ((long)(arg1)),"c" ((long)(arg2)) \ - : "memory"); \ -__syscall_return(type,__res); \ -} - -#define _syscall3(type,name,type1,arg1,type2,arg2,type3,arg3) \ -type name(type1 arg1,type2 arg2,type3 arg3) \ -{ \ -long __res; \ -__asm__ volatile ("push %%ebx ; movl %2,%%ebx ; int $0x80 ; pop %%ebx" \ - : "=a" (__res) \ - : "0" (__NR_##name),"ri" ((long)(arg1)),"c" ((long)(arg2)), \ - "d" ((long)(arg3)) : "memory"); \ -__syscall_return(type,__res); \ -} - -#define _syscall4(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4) \ -type name (type1 arg1, type2 arg2, type3 arg3, type4 arg4) \ -{ \ -long __res; \ -__asm__ volatile ("push %%ebx ; movl %2,%%ebx ; int $0x80 ; pop %%ebx" \ - : "=a" (__res) \ - : "0" (__NR_##name),"ri" ((long)(arg1)),"c" ((long)(arg2)), \ - "d" ((long)(arg3)),"S" ((long)(arg4)) : "memory"); \ -__syscall_return(type,__res); \ -} - -#define _syscall5(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4, \ - type5,arg5) \ -type name (type1 arg1,type2 arg2,type3 arg3,type4 arg4,type5 arg5) \ -{ \ -long __res; \ -__asm__ volatile ("push %%ebx ; movl %2,%%ebx ; movl %1,%%eax ; " \ - "int $0x80 ; pop %%ebx" \ - : "=a" (__res) \ - : "i" (__NR_##name),"ri" ((long)(arg1)),"c" ((long)(arg2)), \ - "d" ((long)(arg3)),"S" ((long)(arg4)),"D" ((long)(arg5)) \ - : "memory"); \ -__syscall_return(type,__res); \ -} - -#define _syscall6(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4, \ - type5,arg5,type6,arg6) \ -type name (type1 arg1,type2 arg2,type3 arg3,type4 arg4,type5 arg5,type6 arg6) \ -{ \ -long __res; \ - struct { long __a1; long __a6; } __s = { (long)arg1, (long)arg6 }; \ -__asm__ volatile ("push %%ebp ; push %%ebx ; movl 4(%2),%%ebp ; " \ - "movl 0(%2),%%ebx ; movl %1,%%eax ; int $0x80 ; " \ - "pop %%ebx ; pop %%ebp" \ - : "=a" (__res) \ - : "i" (__NR_##name),"0" ((long)(&__s)),"c" ((long)(arg2)), \ - "d" ((long)(arg3)),"S" ((long)(arg4)),"D" ((long)(arg5)) \ - : "memory"); \ -__syscall_return(type,__res); \ -} #define __ARCH_WANT_IPC_PARSE_VERSION #define __ARCH_WANT_OLD_READDIR diff --git a/include/asm-i386/unwind.h b/include/asm-i386/unwind.h index 5031d693b89..43c70c3de2f 100644 --- a/include/asm-i386/unwind.h +++ b/include/asm-i386/unwind.h @@ -1,98 +1,6 @@ #ifndef _ASM_I386_UNWIND_H #define _ASM_I386_UNWIND_H -/* - * Copyright (C) 2002-2006 Novell, Inc. - * Jan Beulich <jbeulich@novell.com> - * This code is released under version 2 of the GNU GPL. - */ - -#ifdef CONFIG_STACK_UNWIND - -#include <linux/sched.h> -#include <asm/fixmap.h> -#include <asm/ptrace.h> -#include <asm/uaccess.h> - -struct unwind_frame_info -{ - struct pt_regs regs; - struct task_struct *task; - unsigned call_frame:1; -}; - -#define UNW_PC(frame) (frame)->regs.eip -#define UNW_SP(frame) (frame)->regs.esp -#ifdef CONFIG_FRAME_POINTER -#define UNW_FP(frame) (frame)->regs.ebp -#define FRAME_RETADDR_OFFSET 4 -#define FRAME_LINK_OFFSET 0 -#define STACK_BOTTOM(tsk) STACK_LIMIT((tsk)->thread.esp0) -#define STACK_TOP(tsk) ((tsk)->thread.esp0) -#else -#define UNW_FP(frame) ((void)(frame), 0) -#endif -#define STACK_LIMIT(ptr) (((ptr) - 1) & ~(THREAD_SIZE - 1)) - -#define UNW_REGISTER_INFO \ - PTREGS_INFO(eax), \ - PTREGS_INFO(ecx), \ - PTREGS_INFO(edx), \ - PTREGS_INFO(ebx), \ - PTREGS_INFO(esp), \ - PTREGS_INFO(ebp), \ - PTREGS_INFO(esi), \ - PTREGS_INFO(edi), \ - PTREGS_INFO(eip) - -#define UNW_DEFAULT_RA(raItem, dataAlign) \ - ((raItem).where == Memory && \ - !((raItem).value * (dataAlign) + 4)) - -static inline void arch_unw_init_frame_info(struct unwind_frame_info *info, - /*const*/ struct pt_regs *regs) -{ - if (user_mode_vm(regs)) - info->regs = *regs; - else { - memcpy(&info->regs, regs, offsetof(struct pt_regs, esp)); - info->regs.esp = (unsigned long)®s->esp; - info->regs.xss = __KERNEL_DS; - } -} - -static inline void arch_unw_init_blocked(struct unwind_frame_info *info) -{ - memset(&info->regs, 0, sizeof(info->regs)); - info->regs.eip = info->task->thread.eip; - info->regs.xcs = __KERNEL_CS; - __get_user(info->regs.ebp, (long *)info->task->thread.esp); - info->regs.esp = info->task->thread.esp; - info->regs.xss = __KERNEL_DS; - info->regs.xds = __USER_DS; - info->regs.xes = __USER_DS; -} - -extern asmlinkage int arch_unwind_init_running(struct unwind_frame_info *, - asmlinkage int (*callback)(struct unwind_frame_info *, - void *arg), - void *arg); - -static inline int arch_unw_user_mode(const struct unwind_frame_info *info) -{ -#if 0 /* This can only work when selector register and EFLAGS saves/restores - are properly annotated (and tracked in UNW_REGISTER_INFO). */ - return user_mode_vm(&info->regs); -#else - return info->regs.eip < PAGE_OFFSET - || (info->regs.eip >= __fix_to_virt(FIX_VDSO) - && info->regs.eip < __fix_to_virt(FIX_VDSO) + PAGE_SIZE) - || info->regs.esp < PAGE_OFFSET; -#endif -} - -#else - #define UNW_PC(frame) ((void)(frame), 0) #define UNW_SP(frame) ((void)(frame), 0) #define UNW_FP(frame) ((void)(frame), 0) @@ -102,6 +10,4 @@ static inline int arch_unw_user_mode(const void *info) return 0; } -#endif - #endif /* _ASM_I386_UNWIND_H */ diff --git a/include/asm-i386/vm86.h b/include/asm-i386/vm86.h index 952fd695738..a5edf517b99 100644 --- a/include/asm-i386/vm86.h +++ b/include/asm-i386/vm86.h @@ -145,26 +145,13 @@ struct vm86plus_struct { * at the end of the structure. Look at ptrace.h to see the "normal" * setup. For user space layout see 'struct vm86_regs' above. */ +#include <asm/ptrace.h> struct kernel_vm86_regs { /* * normal regs, with special meaning for the segment descriptors.. */ - long ebx; - long ecx; - long edx; - long esi; - long edi; - long ebp; - long eax; - long __null_ds; - long __null_es; - long orig_eax; - long eip; - unsigned short cs, __csh; - long eflags; - long esp; - unsigned short ss, __ssh; + struct pt_regs pt; /* * these are specific to v86 mode: */ diff --git a/include/asm-ia64/Kbuild b/include/asm-ia64/Kbuild index 15818a18bc5..4a1e48b9f40 100644 --- a/include/asm-ia64/Kbuild +++ b/include/asm-ia64/Kbuild @@ -10,7 +10,6 @@ header-y += intrinsics.h header-y += perfmon_default_smpl.h header-y += ptrace_offsets.h header-y += rse.h -header-y += setup.h header-y += ucontext.h unifdef-y += perfmon.h diff --git a/include/asm-ia64/break.h b/include/asm-ia64/break.h index 8167828edc4..f0340203989 100644 --- a/include/asm-ia64/break.h +++ b/include/asm-ia64/break.h @@ -12,8 +12,8 @@ * OS-specific debug break numbers: */ #define __IA64_BREAK_KDB 0x80100 -#define __IA64_BREAK_KPROBE 0x80200 -#define __IA64_BREAK_JPROBE 0x80300 +#define __IA64_BREAK_KPROBE 0x81000 /* .. 0x81fff */ +#define __IA64_BREAK_JPROBE 0x82000 /* * OS-specific break numbers: diff --git a/include/asm-ia64/cacheflush.h b/include/asm-ia64/cacheflush.h index f2dacb4245e..4906916d715 100644 --- a/include/asm-ia64/cacheflush.h +++ b/include/asm-ia64/cacheflush.h @@ -18,6 +18,7 @@ #define flush_cache_all() do { } while (0) #define flush_cache_mm(mm) do { } while (0) +#define flush_cache_dup_mm(mm) do { } while (0) #define flush_cache_range(vma, start, end) do { } while (0) #define flush_cache_page(vma, vmaddr, pfn) do { } while (0) #define flush_icache_page(vma,page) do { } while (0) diff --git a/include/asm-ia64/checksum.h b/include/asm-ia64/checksum.h index 1f230ff8ea8..2b78582cbd6 100644 --- a/include/asm-ia64/checksum.h +++ b/include/asm-ia64/checksum.h @@ -10,23 +10,21 @@ * This is a version of ip_compute_csum() optimized for IP headers, * which always checksum on 4 octet boundaries. */ -extern unsigned short ip_fast_csum (unsigned char * iph, unsigned int ihl); +extern __sum16 ip_fast_csum(const void *iph, unsigned int ihl); /* * Computes the checksum of the TCP/UDP pseudo-header returns a 16-bit * checksum, already complemented */ -extern unsigned short int csum_tcpudp_magic (unsigned long saddr, - unsigned long daddr, +extern __sum16 csum_tcpudp_magic (__be32 saddr, __be32 daddr, unsigned short len, unsigned short proto, - unsigned int sum); + __wsum sum); -extern unsigned int csum_tcpudp_nofold (unsigned long saddr, - unsigned long daddr, +extern __wsum csum_tcpudp_nofold (__be32 saddr, __be32 daddr, unsigned short len, unsigned short proto, - unsigned int sum); + __wsum sum); /* * Computes the checksum of a memory block at buff, length len, @@ -40,8 +38,7 @@ extern unsigned int csum_tcpudp_nofold (unsigned long saddr, * * it's best to have buff aligned on a 32-bit boundary */ -extern unsigned int csum_partial (const unsigned char * buff, int len, - unsigned int sum); +extern __wsum csum_partial(const void *buff, int len, __wsum sum); /* * Same as csum_partial, but copies from src while it checksums. @@ -49,28 +46,34 @@ extern unsigned int csum_partial (const unsigned char * buff, int len, * Here it is even more important to align src and dst on a 32-bit (or * even better 64-bit) boundary. */ -extern unsigned int csum_partial_copy_from_user (const char *src, char *dst, - int len, unsigned int sum, +extern __wsum csum_partial_copy_from_user(const void __user *src, void *dst, + int len, __wsum sum, int *errp); -extern unsigned int csum_partial_copy_nocheck (const char *src, char *dst, - int len, unsigned int sum); +extern __wsum csum_partial_copy_nocheck(const void *src, void *dst, + int len, __wsum sum); /* * This routine is used for miscellaneous IP-like checksums, mainly in * icmp.c */ -extern unsigned short ip_compute_csum (unsigned char *buff, int len); +extern __sum16 ip_compute_csum(const void *buff, int len); /* * Fold a partial checksum without adding pseudo headers. */ -static inline unsigned short -csum_fold (unsigned int sum) +static inline __sum16 csum_fold(__wsum csum) { + u32 sum = (__force u32)csum; sum = (sum & 0xffff) + (sum >> 16); sum = (sum & 0xffff) + (sum >> 16); - return ~sum; + return (__force __sum16)~sum; } +#define _HAVE_ARCH_IPV6_CSUM 1 +struct in6_addr; +extern unsigned short int csum_ipv6_magic(struct in6_addr *saddr, + struct in6_addr *daddr, __u32 len, unsigned short proto, + unsigned int csum); + #endif /* _ASM_IA64_CHECKSUM_H */ diff --git a/include/asm-ia64/device.h b/include/asm-ia64/device.h new file mode 100644 index 00000000000..3db6daf7f25 --- /dev/null +++ b/include/asm-ia64/device.h @@ -0,0 +1,15 @@ +/* + * Arch specific extensions to struct device + * + * This file is released under the GPLv2 + */ +#ifndef _ASM_IA64_DEVICE_H +#define _ASM_IA64_DEVICE_H + +struct dev_archdata { +#ifdef CONFIG_ACPI + void *acpi_handle; +#endif +}; + +#endif /* _ASM_IA64_DEVICE_H */ diff --git a/include/asm-ia64/dma-mapping.h b/include/asm-ia64/dma-mapping.h index 99a8f8e1218..ebd5887f4b1 100644 --- a/include/asm-ia64/dma-mapping.h +++ b/include/asm-ia64/dma-mapping.h @@ -50,7 +50,8 @@ dma_set_mask (struct device *dev, u64 mask) extern int dma_get_cache_alignment(void); static inline void -dma_cache_sync (void *vaddr, size_t size, enum dma_data_direction dir) +dma_cache_sync (struct device *dev, void *vaddr, size_t size, + enum dma_data_direction dir) { /* * IA-64 is cache-coherent, so this is mostly a no-op. However, we do need to @@ -59,6 +60,6 @@ dma_cache_sync (void *vaddr, size_t size, enum dma_data_direction dir) mb(); } -#define dma_is_consistent(dma_handle) (1) /* all we do is coherent memory... */ +#define dma_is_consistent(d, h) (1) /* all we do is coherent memory... */ #endif /* _ASM_IA64_DMA_MAPPING_H */ diff --git a/include/asm-ia64/futex.h b/include/asm-ia64/futex.h index 07d77f3a8cb..8a98a265413 100644 --- a/include/asm-ia64/futex.h +++ b/include/asm-ia64/futex.h @@ -59,7 +59,7 @@ futex_atomic_op_inuser (int encoded_op, int __user *uaddr) if (! access_ok (VERIFY_WRITE, uaddr, sizeof(int))) return -EFAULT; - inc_preempt_count(); + pagefault_disable(); switch (op) { case FUTEX_OP_SET: @@ -83,7 +83,7 @@ futex_atomic_op_inuser (int encoded_op, int __user *uaddr) ret = -ENOSYS; } - dec_preempt_count(); + pagefault_enable(); if (!ret) { switch (cmp) { diff --git a/include/asm-ia64/io.h b/include/asm-ia64/io.h index 855c30af72a..6311e168cd3 100644 --- a/include/asm-ia64/io.h +++ b/include/asm-ia64/io.h @@ -32,7 +32,7 @@ */ #define IO_SPACE_LIMIT 0xffffffffffffffffUL -#define MAX_IO_SPACES_BITS 4 +#define MAX_IO_SPACES_BITS 8 #define MAX_IO_SPACES (1UL << MAX_IO_SPACES_BITS) #define IO_SPACE_BITS 24 #define IO_SPACE_SIZE (1UL << IO_SPACE_BITS) diff --git a/include/asm-ia64/kexec.h b/include/asm-ia64/kexec.h new file mode 100644 index 00000000000..01c36b00474 --- /dev/null +++ b/include/asm-ia64/kexec.h @@ -0,0 +1,47 @@ +#ifndef _ASM_IA64_KEXEC_H +#define _ASM_IA64_KEXEC_H + + +/* Maximum physical address we can use pages from */ +#define KEXEC_SOURCE_MEMORY_LIMIT (-1UL) +/* Maximum address we can reach in physical address mode */ +#define KEXEC_DESTINATION_MEMORY_LIMIT (-1UL) +/* Maximum address we can use for the control code buffer */ +#define KEXEC_CONTROL_MEMORY_LIMIT TASK_SIZE + +#define KEXEC_CONTROL_CODE_SIZE (8192 + 8192 + 4096) + +/* The native architecture */ +#define KEXEC_ARCH KEXEC_ARCH_IA_64 + +#define MAX_NOTE_BYTES 1024 + +#define kexec_flush_icache_page(page) do { \ + unsigned long page_addr = (unsigned long)page_address(page); \ + flush_icache_range(page_addr, page_addr + PAGE_SIZE); \ + } while(0) + +extern struct kimage *ia64_kimage; +DECLARE_PER_CPU(u64, ia64_mca_pal_base); +const extern unsigned int relocate_new_kernel_size; +extern void relocate_new_kernel(unsigned long, unsigned long, + struct ia64_boot_param *, unsigned long); +static inline void +crash_setup_regs(struct pt_regs *newregs, struct pt_regs *oldregs) +{ +} +extern struct resource efi_memmap_res; +extern struct resource boot_param_res; +extern void kdump_smp_send_stop(void); +extern void kdump_smp_send_init(void); +extern void kexec_disable_iosapic(void); +extern void crash_save_this_cpu(void); +struct rsvd_region; +extern unsigned long kdump_find_rsvd_region(unsigned long size, + struct rsvd_region *rsvd_regions, int n); +extern void kdump_cpu_freeze(struct unw_frame_info *info, void *arg); +extern int kdump_status[]; +extern atomic_t kdump_cpu_freezed; +extern atomic_t kdump_in_progress; + +#endif /* _ASM_IA64_KEXEC_H */ diff --git a/include/asm-ia64/kprobes.h b/include/asm-ia64/kprobes.h index 1b45b71c79b..828ae00e47c 100644 --- a/include/asm-ia64/kprobes.h +++ b/include/asm-ia64/kprobes.h @@ -115,6 +115,7 @@ struct arch_specific_insn { #define INST_FLAG_BREAK_INST 4 unsigned long inst_flag; unsigned short target_br_reg; + unsigned short slot; }; extern int kprobe_exceptions_notify(struct notifier_block *self, diff --git a/include/asm-ia64/machvec.h b/include/asm-ia64/machvec.h index 7ffbddf5306..a3891eb3f21 100644 --- a/include/asm-ia64/machvec.h +++ b/include/asm-ia64/machvec.h @@ -36,6 +36,8 @@ typedef int ia64_mv_pci_legacy_read_t (struct pci_bus *, u16 port, u32 *val, typedef int ia64_mv_pci_legacy_write_t (struct pci_bus *, u16 port, u32 val, u8 size); typedef void ia64_mv_migrate_t(struct task_struct * task); +typedef void ia64_mv_pci_fixup_bus_t (struct pci_bus *); +typedef void ia64_mv_kernel_launch_event_t(void); /* DMA-mapping interface: */ typedef void ia64_mv_dma_init (void); @@ -95,6 +97,11 @@ machvec_noop_task (struct task_struct *task) { } +static inline void +machvec_noop_bus (struct pci_bus *bus) +{ +} + extern void machvec_setup (char **); extern void machvec_timer_interrupt (int, void *); extern void machvec_dma_sync_single (struct device *, dma_addr_t, size_t, int); @@ -159,6 +166,7 @@ extern void machvec_tlb_migrate_finish (struct mm_struct *); # define platform_migrate ia64_mv.migrate # define platform_setup_msi_irq ia64_mv.setup_msi_irq # define platform_teardown_msi_irq ia64_mv.teardown_msi_irq +# define platform_pci_fixup_bus ia64_mv.pci_fixup_bus # endif /* __attribute__((__aligned__(16))) is required to make size of the @@ -210,6 +218,8 @@ struct ia64_machine_vector { ia64_mv_migrate_t *migrate; ia64_mv_setup_msi_irq_t *setup_msi_irq; ia64_mv_teardown_msi_irq_t *teardown_msi_irq; + ia64_mv_pci_fixup_bus_t *pci_fixup_bus; + ia64_mv_kernel_launch_event_t *kernel_launch_event; } __attribute__((__aligned__(16))); /* align attrib? see above comment */ #define MACHVEC_INIT(name) \ @@ -257,6 +267,7 @@ struct ia64_machine_vector { platform_migrate, \ platform_setup_msi_irq, \ platform_teardown_msi_irq, \ + platform_pci_fixup_bus, \ } extern struct ia64_machine_vector ia64_mv; @@ -309,6 +320,9 @@ extern ia64_mv_dma_supported swiotlb_dma_supported; #ifndef platform_tlb_migrate_finish # define platform_tlb_migrate_finish machvec_noop_mm #endif +#ifndef platform_kernel_launch_event +# define platform_kernel_launch_event machvec_noop +#endif #ifndef platform_dma_init # define platform_dma_init swiotlb_init #endif @@ -416,5 +430,8 @@ extern int ia64_pci_legacy_write(struct pci_bus *bus, u16 port, u32 val, u8 size #ifndef platform_teardown_msi_irq # define platform_teardown_msi_irq ((ia64_mv_teardown_msi_irq_t*)NULL) #endif +#ifndef platform_pci_fixup_bus +# define platform_pci_fixup_bus machvec_noop_bus +#endif #endif /* _ASM_IA64_MACHVEC_H */ diff --git a/include/asm-ia64/machvec_sn2.h b/include/asm-ia64/machvec_sn2.h index c54b165b1c1..eaa2fce0fec 100644 --- a/include/asm-ia64/machvec_sn2.h +++ b/include/asm-ia64/machvec_sn2.h @@ -67,8 +67,10 @@ extern ia64_mv_dma_sync_sg_for_device sn_dma_sync_sg_for_device; extern ia64_mv_dma_mapping_error sn_dma_mapping_error; extern ia64_mv_dma_supported sn_dma_supported; extern ia64_mv_migrate_t sn_migrate; +extern ia64_mv_kernel_launch_event_t sn_kernel_launch_event; extern ia64_mv_setup_msi_irq_t sn_setup_msi_irq; extern ia64_mv_teardown_msi_irq_t sn_teardown_msi_irq; +extern ia64_mv_pci_fixup_bus_t sn_pci_fixup_bus; /* @@ -120,6 +122,7 @@ extern ia64_mv_teardown_msi_irq_t sn_teardown_msi_irq; #define platform_dma_mapping_error sn_dma_mapping_error #define platform_dma_supported sn_dma_supported #define platform_migrate sn_migrate +#define platform_kernel_launch_event sn_kernel_launch_event #ifdef CONFIG_PCI_MSI #define platform_setup_msi_irq sn_setup_msi_irq #define platform_teardown_msi_irq sn_teardown_msi_irq @@ -127,6 +130,7 @@ extern ia64_mv_teardown_msi_irq_t sn_teardown_msi_irq; #define platform_setup_msi_irq ((ia64_mv_setup_msi_irq_t*)NULL) #define platform_teardown_msi_irq ((ia64_mv_teardown_msi_irq_t*)NULL) #endif +#define platform_pci_fixup_bus sn_pci_fixup_bus #include <asm/sn/io.h> diff --git a/include/asm-ia64/meminit.h b/include/asm-ia64/meminit.h index c3b1f862e6e..c8df7590108 100644 --- a/include/asm-ia64/meminit.h +++ b/include/asm-ia64/meminit.h @@ -15,11 +15,12 @@ * - initrd (optional) * - command line string * - kernel code & data + * - crash dumping code reserved region * - Kernel memory map built from EFI memory map * * More could be added if necessary */ -#define IA64_MAX_RSVD_REGIONS 6 +#define IA64_MAX_RSVD_REGIONS 7 struct rsvd_region { unsigned long start; /* virtual address of beginning of element */ diff --git a/include/asm-ia64/page.h b/include/asm-ia64/page.h index 947cb72b520..485759ba9e3 100644 --- a/include/asm-ia64/page.h +++ b/include/asm-ia64/page.h @@ -101,7 +101,7 @@ do { \ #ifdef CONFIG_VIRTUAL_MEM_MAP extern int ia64_pfn_valid (unsigned long pfn); -#elif defined(CONFIG_FLATMEM) +#else # define ia64_pfn_valid(pfn) 1 #endif @@ -110,12 +110,11 @@ extern struct page *vmem_map; #ifdef CONFIG_DISCONTIGMEM # define page_to_pfn(page) ((unsigned long) (page - vmem_map)) # define pfn_to_page(pfn) (vmem_map + (pfn)) +#else +# include <asm-generic/memory_model.h> #endif -#endif - -#if defined(CONFIG_FLATMEM) || defined(CONFIG_SPARSEMEM) -/* FLATMEM always configures mem_map (mem_map = vmem_map if necessary) */ -#include <asm-generic/memory_model.h> +#else +# include <asm-generic/memory_model.h> #endif #ifdef CONFIG_FLATMEM diff --git a/include/asm-ia64/pal.h b/include/asm-ia64/pal.h index 4283ddcc25f..bc768153f3c 100644 --- a/include/asm-ia64/pal.h +++ b/include/asm-ia64/pal.h @@ -20,6 +20,8 @@ * 00/05/24 eranian Updated to latest PAL spec, fix structures bugs, added * 00/05/25 eranian Support for stack calls, and static physical calls * 00/06/18 eranian Support for stacked physical calls + * 06/10/26 rja Support for Intel Itanium Architecture Software Developer's + * Manual Rev 2.2 (Jan 2006) */ /* @@ -69,6 +71,8 @@ #define PAL_PREFETCH_VISIBILITY 41 /* Make Processor Prefetches Visible */ #define PAL_LOGICAL_TO_PHYSICAL 42 /* returns information on logical to physical processor mapping */ #define PAL_CACHE_SHARED_INFO 43 /* returns information on caches shared by logical processor */ +#define PAL_GET_HW_POLICY 48 /* Get current hardware resource sharing policy */ +#define PAL_SET_HW_POLICY 49 /* Set current hardware resource sharing policy */ #define PAL_COPY_PAL 256 /* relocate PAL procedures and PAL PMI */ #define PAL_HALT_INFO 257 /* return the low power capabilities of processor */ @@ -80,6 +84,11 @@ #define PAL_SET_PSTATE 263 /* set the P-state */ #define PAL_BRAND_INFO 274 /* Processor branding information */ +#define PAL_GET_PSTATE_TYPE_LASTSET 0 +#define PAL_GET_PSTATE_TYPE_AVGANDRESET 1 +#define PAL_GET_PSTATE_TYPE_AVGNORESET 2 +#define PAL_GET_PSTATE_TYPE_INSTANT 3 + #ifndef __ASSEMBLY__ #include <linux/types.h> @@ -102,6 +111,7 @@ typedef s64 pal_status_t; * cache without sideeffects * and "restrict" was 1 */ +#define PAL_STATUS_REQUIRES_MEMORY (-9) /* Call requires PAL memory buffer */ /* Processor cache level in the heirarchy */ typedef u64 pal_cache_level_t; @@ -456,7 +466,9 @@ typedef struct pal_process_state_info_s { * by the processor */ - reserved2 : 11, + se : 1, /* Shared error. MCA in a + shared structure */ + reserved2 : 10, cc : 1, /* Cache check */ tc : 1, /* TLB check */ bc : 1, /* Bus check */ @@ -487,10 +499,12 @@ typedef struct pal_cache_check_info_s { * error occurred */ wiv : 1, /* Way field valid */ - reserved2 : 10, + reserved2 : 1, + dp : 1, /* Data poisoned on MBE */ + reserved3 : 8, index : 20, /* Cache line index */ - reserved3 : 2, + reserved4 : 2, is : 1, /* instruction set (1 == ia32) */ iv : 1, /* instruction set field valid */ @@ -557,7 +571,7 @@ typedef struct pal_bus_check_info_s { type : 8, /* Bus xaction type*/ sev : 5, /* Bus error severity*/ hier : 2, /* Bus hierarchy level */ - reserved1 : 1, + dp : 1, /* Data poisoned on MBE */ bsi : 8, /* Bus error status * info */ @@ -834,7 +848,9 @@ typedef union pal_bus_features_u { u64 pbf_req_bus_parking : 1; u64 pbf_bus_lock_mask : 1; u64 pbf_enable_half_xfer_rate : 1; - u64 pbf_reserved2 : 22; + u64 pbf_reserved2 : 20; + u64 pbf_enable_shared_line_replace : 1; + u64 pbf_enable_exclusive_line_replace : 1; u64 pbf_disable_xaction_queueing : 1; u64 pbf_disable_resp_err_check : 1; u64 pbf_disable_berr_check : 1; @@ -1077,6 +1093,24 @@ ia64_pal_freq_ratios (struct pal_freq_ratio *proc_ratio, struct pal_freq_ratio * return iprv.status; } +/* + * Get the current hardware resource sharing policy of the processor + */ +static inline s64 +ia64_pal_get_hw_policy (u64 proc_num, u64 *cur_policy, u64 *num_impacted, + u64 *la) +{ + struct ia64_pal_retval iprv; + PAL_CALL(iprv, PAL_GET_HW_POLICY, proc_num, 0, 0); + if (cur_policy) + *cur_policy = iprv.v0; + if (num_impacted) + *num_impacted = iprv.v1; + if (la) + *la = iprv.v2; + return iprv.status; +} + /* Make the processor enter HALT or one of the implementation dependent low * power states where prefetching and execution are suspended and cache and * TLB coherency is not maintained. @@ -1112,10 +1146,10 @@ ia64_pal_halt_info (pal_power_mgmt_info_u_t *power_buf) /* Get the current P-state information */ static inline s64 -ia64_pal_get_pstate (u64 *pstate_index) +ia64_pal_get_pstate (u64 *pstate_index, unsigned long type) { struct ia64_pal_retval iprv; - PAL_CALL_STK(iprv, PAL_GET_PSTATE, 0, 0, 0); + PAL_CALL_STK(iprv, PAL_GET_PSTATE, type, 0, 0); *pstate_index = iprv.v0; return iprv.status; } @@ -1401,6 +1435,17 @@ ia64_pal_rse_info (u64 *num_phys_stacked, pal_hints_u_t *hints) return iprv.status; } +/* + * Set the current hardware resource sharing policy of the processor + */ +static inline s64 +ia64_pal_set_hw_policy (u64 policy) +{ + struct ia64_pal_retval iprv; + PAL_CALL(iprv, PAL_SET_HW_POLICY, policy, 0, 0); + return iprv.status; +} + /* Cause the processor to enter SHUTDOWN state, where prefetching and execution are * suspended, but cause cache and TLB coherency to be maintained. * This is usually called in IA-32 mode. @@ -1524,12 +1569,15 @@ typedef union pal_vm_info_1_u { } pal_vm_info_1_s; } pal_vm_info_1_u_t; +#define PAL_MAX_PURGES 0xFFFF /* all ones is means unlimited */ + typedef union pal_vm_info_2_u { u64 pvi2_val; struct { u64 impl_va_msb : 8, rid_size : 8, - reserved : 48; + max_purges : 16, + reserved : 32; } pal_vm_info_2_s; } pal_vm_info_2_u_t; diff --git a/include/asm-ia64/pci.h b/include/asm-ia64/pci.h index ef616fd4cb1..556f53fa44c 100644 --- a/include/asm-ia64/pci.h +++ b/include/asm-ia64/pci.h @@ -26,16 +26,18 @@ void pcibios_config_init(void); struct pci_dev; /* - * PCI_DMA_BUS_IS_PHYS should be set to 1 if there is _necessarily_ a direct correspondence - * between device bus addresses and CPU physical addresses. Platforms with a hardware I/O - * MMU _must_ turn this off to suppress the bounce buffer handling code in the block and - * network device layers. Platforms with separate bus address spaces _must_ turn this off - * and provide a device DMA mapping implementation that takes care of the necessary + * PCI_DMA_BUS_IS_PHYS should be set to 1 if there is _necessarily_ a direct + * correspondence between device bus addresses and CPU physical addresses. + * Platforms with a hardware I/O MMU _must_ turn this off to suppress the + * bounce buffer handling code in the block and network device layers. + * Platforms with separate bus address spaces _must_ turn this off and provide + * a device DMA mapping implementation that takes care of the necessary * address translation. * - * For now, the ia64 platforms which may have separate/multiple bus address spaces all - * have I/O MMUs which support the merging of physically discontiguous buffers, so we can - * use that as the sole factor to determine the setting of PCI_DMA_BUS_IS_PHYS. + * For now, the ia64 platforms which may have separate/multiple bus address + * spaces all have I/O MMUs which support the merging of physically + * discontiguous buffers, so we can use that as the sole factor to determine + * the setting of PCI_DMA_BUS_IS_PHYS. */ extern unsigned long ia64_max_iommu_merge_mask; #define PCI_DMA_BUS_IS_PHYS (ia64_max_iommu_merge_mask == ~0UL) @@ -52,9 +54,6 @@ pcibios_penalize_isa_irq (int irq, int active) /* We don't do dynamic PCI IRQ allocation */ } -#define HAVE_ARCH_PCI_MWI 1 -extern int pcibios_prep_mwi (struct pci_dev *); - #include <asm-generic/pci-dma-compat.h> /* pci_unmap_{single,page} is not a nop, thus... */ @@ -79,9 +78,6 @@ extern int pcibios_prep_mwi (struct pci_dev *); #define pci_dac_dma_sync_single_for_cpu(dev,dma_addr,len,dir) do { } while (0) #define pci_dac_dma_sync_single_for_device(dev,dma_addr,len,dir) do { mb(); } while (0) -#define sg_dma_len(sg) ((sg)->dma_length) -#define sg_dma_address(sg) ((sg)->dma_address) - #ifdef CONFIG_PCI static inline void pci_dma_burst_advice(struct pci_dev *pdev, enum pci_dma_burst_strategy *strat, diff --git a/include/asm-ia64/pgalloc.h b/include/asm-ia64/pgalloc.h index 9cb68e9b377..393e04c42a2 100644 --- a/include/asm-ia64/pgalloc.h +++ b/include/asm-ia64/pgalloc.h @@ -60,7 +60,7 @@ static inline void *pgtable_quicklist_alloc(void) static inline void pgtable_quicklist_free(void *pgtable_entry) { #ifdef CONFIG_NUMA - unsigned long nid = page_to_nid(virt_to_page(pgtable_entry)); + int nid = page_to_nid(virt_to_page(pgtable_entry)); if (unlikely(nid != numa_node_id())) { free_page((unsigned long)pgtable_entry); diff --git a/include/asm-ia64/posix_types.h b/include/asm-ia64/posix_types.h index adb62272694..17885567b73 100644 --- a/include/asm-ia64/posix_types.h +++ b/include/asm-ia64/posix_types.h @@ -54,7 +54,7 @@ typedef unsigned int __kernel_old_dev_t; #define __FD_CLR(d, set) ((set)->fds_bits[__FDELT(d)] &= ~__FDMASK(d)) #define __FD_ISSET(d, set) (((set)->fds_bits[__FDELT(d)] & __FDMASK(d)) != 0) #define __FD_ZERO(set) \ - ((void) memset ((__ptr_t) (set), 0, sizeof (__kernel_fd_set))) + ((void) memset ((void *) (set), 0, sizeof (__kernel_fd_set))) # else /* !__GNUC__ */ diff --git a/include/asm-ia64/scatterlist.h b/include/asm-ia64/scatterlist.h index 834a189ef18..9dbea8844d5 100644 --- a/include/asm-ia64/scatterlist.h +++ b/include/asm-ia64/scatterlist.h @@ -25,4 +25,7 @@ struct scatterlist { */ #define ISA_DMA_THRESHOLD 0xffffffff +#define sg_dma_len(sg) ((sg)->dma_length) +#define sg_dma_address(sg) ((sg)->dma_address) + #endif /* _ASM_IA64_SCATTERLIST_H */ diff --git a/include/asm-ia64/sn/acpi.h b/include/asm-ia64/sn/acpi.h new file mode 100644 index 00000000000..2850a7ef5e7 --- /dev/null +++ b/include/asm-ia64/sn/acpi.h @@ -0,0 +1,16 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2006 Silicon Graphics, Inc. All rights reserved. + */ + +#ifndef _ASM_IA64_SN_ACPI_H +#define _ASM_IA64_SN_ACPI_H + +#include "acpi/acglobal.h" + +#define SN_ACPI_BASE_SUPPORT() (acpi_gbl_DSDT->oem_revision >= 0x20101) + +#endif /* _ASM_IA64_SN_ACPI_H */ diff --git a/include/asm-ia64/sn/pcidev.h b/include/asm-ia64/sn/pcidev.h index eac3561574b..9fe89a93d88 100644 --- a/include/asm-ia64/sn/pcidev.h +++ b/include/asm-ia64/sn/pcidev.h @@ -3,7 +3,7 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (C) 1992 - 1997, 2000-2005 Silicon Graphics, Inc. All rights reserved. + * Copyright (C) 1992 - 1997, 2000-2006 Silicon Graphics, Inc. All rights reserved. */ #ifndef _ASM_IA64_SN_PCI_PCIDEV_H #define _ASM_IA64_SN_PCI_PCIDEV_H @@ -12,31 +12,29 @@ /* * In ia64, pci_dev->sysdata must be a *pci_controller. To provide access to - * the pcidev_info structs for all devices under a controller, we extend the - * definition of pci_controller, via sn_pci_controller, to include a list - * of pcidev_info. + * the pcidev_info structs for all devices under a controller, we keep a + * list of pcidev_info under pci_controller->platform_data. */ -struct sn_pci_controller { - struct pci_controller pci_controller; +struct sn_platform_data { + void *provider_soft; struct list_head pcidev_info; }; -#define SN_PCI_CONTROLLER(dev) ((struct sn_pci_controller *) dev->sysdata) +#define SN_PLATFORM_DATA(busdev) \ + ((struct sn_platform_data *)(PCI_CONTROLLER(busdev)->platform_data)) #define SN_PCIDEV_INFO(dev) sn_pcidev_info_get(dev) -#define SN_PCIBUS_BUSSOFT_INFO(pci_bus) \ - (struct pcibus_info *)((struct pcibus_bussoft *)(PCI_CONTROLLER((pci_bus))->platform_data)) /* * Given a pci_bus, return the sn pcibus_bussoft struct. Note that * this only works for root busses, not for busses represented by PPB's. */ #define SN_PCIBUS_BUSSOFT(pci_bus) \ - ((struct pcibus_bussoft *)(PCI_CONTROLLER((pci_bus))->platform_data)) + ((struct pcibus_bussoft *)(SN_PLATFORM_DATA(pci_bus)->provider_soft)) #define SN_PCIBUS_BUSSOFT_INFO(pci_bus) \ - (struct pcibus_info *)((struct pcibus_bussoft *)(PCI_CONTROLLER((pci_bus))->platform_data)) + ((struct pcibus_info *)(SN_PLATFORM_DATA(pci_bus)->provider_soft)) /* * Given a struct pci_dev, return the sn pcibus_bussoft struct. Note * that this is not equivalent to SN_PCIBUS_BUSSOFT(pci_dev->bus) due @@ -72,8 +70,6 @@ extern void sn_irq_fixup(struct pci_dev *pci_dev, struct sn_irq_info *sn_irq_info); extern void sn_irq_unfixup(struct pci_dev *pci_dev); extern struct pcidev_info * sn_pcidev_info_get(struct pci_dev *); -extern void sn_pci_controller_fixup(int segment, int busnum, - struct pci_bus *bus); extern void sn_bus_store_sysdata(struct pci_dev *dev); extern void sn_bus_free_sysdata(void); extern void sn_generate_path(struct pci_bus *pci_bus, char *address); diff --git a/include/asm-ia64/sn/sn_feature_sets.h b/include/asm-ia64/sn/sn_feature_sets.h index 30dcfa442e5..bfdc36273ed 100644 --- a/include/asm-ia64/sn/sn_feature_sets.h +++ b/include/asm-ia64/sn/sn_feature_sets.h @@ -44,8 +44,14 @@ extern int sn_prom_feature_available(int id); * Once enabled, a feature cannot be disabled. * * By default, features are disabled unless explicitly enabled. + * + * These defines must be kept in sync with the corresponding + * PROM definitions in feature_sets.h. */ #define OSF_MCA_SLV_TO_OS_INIT_SLV 0 #define OSF_FEAT_LOG_SBES 1 +#define OSF_ACPI_ENABLE 2 +#define OSF_PCISEGMENT_ENABLE 3 + #endif /* _ASM_IA64_SN_FEATURE_SETS_H */ diff --git a/include/asm-ia64/sn/sn_sal.h b/include/asm-ia64/sn/sn_sal.h index ba826b3f75b..2c4004eb5a6 100644 --- a/include/asm-ia64/sn/sn_sal.h +++ b/include/asm-ia64/sn/sn_sal.h @@ -77,6 +77,7 @@ #define SN_SAL_IOIF_GET_WIDGET_DMAFLUSH_LIST 0x02000058 // deprecated #define SN_SAL_IOIF_GET_DEVICE_DMAFLUSH_LIST 0x0200005a +#define SN_SAL_IOIF_INIT 0x0200005f #define SN_SAL_HUB_ERROR_INTERRUPT 0x02000060 #define SN_SAL_BTE_RECOVER 0x02000061 #define SN_SAL_RESERVED_DO_NOT_USE 0x02000062 @@ -87,6 +88,8 @@ #define SN_SAL_INJECT_ERROR 0x02000067 #define SN_SAL_SET_CPU_NUMBER 0x02000068 +#define SN_SAL_KERNEL_LAUNCH_EVENT 0x02000069 + /* * Service-specific constants */ @@ -1154,4 +1157,11 @@ ia64_sn_set_cpu_number(int cpu) SAL_CALL_NOLOCK(rv, SN_SAL_SET_CPU_NUMBER, cpu, 0, 0, 0, 0, 0, 0); return rv.status; } +static inline int +ia64_sn_kernel_launch_event(void) +{ + struct ia64_sal_retval rv; + SAL_CALL_NOLOCK(rv, SN_SAL_KERNEL_LAUNCH_EVENT, 0, 0, 0, 0, 0, 0, 0); + return rv.status; +} #endif /* _ASM_IA64_SN_SN_SAL_H */ diff --git a/include/asm-ia64/sn/xpc.h b/include/asm-ia64/sn/xpc.h index 1d45e1518fb..e52b8508083 100644 --- a/include/asm-ia64/sn/xpc.h +++ b/include/asm-ia64/sn/xpc.h @@ -673,7 +673,7 @@ extern irqreturn_t xpc_notify_IRQ_handler(int, void *); extern void xpc_dropped_IPI_check(struct xpc_partition *); extern void xpc_activate_partition(struct xpc_partition *); extern void xpc_activate_kthreads(struct xpc_channel *, int); -extern void xpc_create_kthreads(struct xpc_channel *, int); +extern void xpc_create_kthreads(struct xpc_channel *, int, int); extern void xpc_disconnect_wait(int); diff --git a/include/asm-ia64/termbits.h b/include/asm-ia64/termbits.h index b9e843f7dc4..4531a511bde 100644 --- a/include/asm-ia64/termbits.h +++ b/include/asm-ia64/termbits.h @@ -26,6 +26,17 @@ struct termios { cc_t c_cc[NCCS]; /* control characters */ }; +struct ktermios { + tcflag_t c_iflag; /* input mode flags */ + tcflag_t c_oflag; /* output mode flags */ + tcflag_t c_cflag; /* control mode flags */ + tcflag_t c_lflag; /* local mode flags */ + cc_t c_line; /* line discipline */ + cc_t c_cc[NCCS]; /* control characters */ + speed_t c_ispeed; /* input speed */ + speed_t c_ospeed; /* output speed */ +}; + /* c_cc characters */ #define VINTR 0 #define VQUIT 1 diff --git a/include/asm-ia64/thread_info.h b/include/asm-ia64/thread_info.h index 8adcde0934c..9b505b25544 100644 --- a/include/asm-ia64/thread_info.h +++ b/include/asm-ia64/thread_info.h @@ -88,6 +88,7 @@ struct thread_info { #define TIF_MEMDIE 17 #define TIF_MCA_INIT 18 /* this task is processing MCA or INIT */ #define TIF_DB_DISABLED 19 /* debug trap disabled for fsyscall */ +#define TIF_FREEZE 20 /* is freezing for suspend */ #define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE) #define _TIF_SYSCALL_AUDIT (1 << TIF_SYSCALL_AUDIT) @@ -98,6 +99,7 @@ struct thread_info { #define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG) #define _TIF_MCA_INIT (1 << TIF_MCA_INIT) #define _TIF_DB_DISABLED (1 << TIF_DB_DISABLED) +#define _TIF_FREEZE (1 << TIF_FREEZE) /* "work to do on user-return" bits */ #define TIF_ALLWORK_MASK (_TIF_NOTIFY_RESUME|_TIF_SIGPENDING|_TIF_NEED_RESCHED|_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT) diff --git a/include/asm-ia64/topology.h b/include/asm-ia64/topology.h index a6e38565ab4..22ed6749557 100644 --- a/include/asm-ia64/topology.h +++ b/include/asm-ia64/topology.h @@ -101,6 +101,7 @@ void build_cpu_to_node_map(void); .flags = SD_LOAD_BALANCE \ | SD_BALANCE_EXEC \ | SD_BALANCE_FORK \ + | SD_SERIALIZE \ | SD_WAKE_BALANCE, \ .last_balance = jiffies, \ .balance_interval = 64, \ diff --git a/include/asm-m32r/cacheflush.h b/include/asm-m32r/cacheflush.h index 8b261b49149..56961a9511b 100644 --- a/include/asm-m32r/cacheflush.h +++ b/include/asm-m32r/cacheflush.h @@ -9,6 +9,7 @@ extern void _flush_cache_copyback_all(void); #if defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104) #define flush_cache_all() do { } while (0) #define flush_cache_mm(mm) do { } while (0) +#define flush_cache_dup_mm(mm) do { } while (0) #define flush_cache_range(vma, start, end) do { } while (0) #define flush_cache_page(vma, vmaddr, pfn) do { } while (0) #define flush_dcache_page(page) do { } while (0) @@ -29,6 +30,7 @@ extern void smp_flush_cache_all(void); #elif defined(CONFIG_CHIP_M32102) #define flush_cache_all() do { } while (0) #define flush_cache_mm(mm) do { } while (0) +#define flush_cache_dup_mm(mm) do { } while (0) #define flush_cache_range(vma, start, end) do { } while (0) #define flush_cache_page(vma, vmaddr, pfn) do { } while (0) #define flush_dcache_page(page) do { } while (0) @@ -41,6 +43,7 @@ extern void smp_flush_cache_all(void); #else #define flush_cache_all() do { } while (0) #define flush_cache_mm(mm) do { } while (0) +#define flush_cache_dup_mm(mm) do { } while (0) #define flush_cache_range(vma, start, end) do { } while (0) #define flush_cache_page(vma, vmaddr, pfn) do { } while (0) #define flush_dcache_page(page) do { } while (0) diff --git a/include/asm-m32r/checksum.h b/include/asm-m32r/checksum.h index 877ebf46e9f..a7a7c4f44ab 100644 --- a/include/asm-m32r/checksum.h +++ b/include/asm-m32r/checksum.h @@ -31,8 +31,7 @@ * * it's best to have buff aligned on a 32-bit boundary */ -asmlinkage unsigned int csum_partial(const unsigned char *buff, - int len, unsigned int sum); +asmlinkage __wsum csum_partial(const void *buff, int len, __wsum sum); /* * The same as csum_partial, but copies from src while it checksums. @@ -40,24 +39,22 @@ asmlinkage unsigned int csum_partial(const unsigned char *buff, * Here even more important to align src and dst on a 32-bit (or even * better 64-bit) boundary */ -extern unsigned int csum_partial_copy_nocheck(const unsigned char *src, - unsigned char *dst, - int len, unsigned int sum); +extern __wsum csum_partial_copy_nocheck(const void *src, void *dst, + int len, __wsum sum); /* * This is a new version of the above that records errors it finds in *errp, * but continues and zeros thre rest of the buffer. */ -extern unsigned int csum_partial_copy_from_user(const unsigned char __user *src, - unsigned char *dst, - int len, unsigned int sum, +extern __wsum csum_partial_copy_from_user(const void __user *src, void *dst, + int len, __wsum sum, int *err_ptr); /* * Fold a partial checksum */ -static inline unsigned int csum_fold(unsigned int sum) +static inline __sum16 csum_fold(__wsum sum) { unsigned long tmpreg; __asm__( @@ -72,16 +69,17 @@ static inline unsigned int csum_fold(unsigned int sum) : "0" (sum) : "cbit" ); - return sum; + return (__force __sum16)sum; } /* * This is a version of ip_compute_csum() optimized for IP headers, * which always checksum on 4 octet boundaries. */ -static inline unsigned short ip_fast_csum(unsigned char * iph, - unsigned int ihl) { - unsigned long sum, tmpreg0, tmpreg1; +static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl) +{ + unsigned long tmpreg0, tmpreg1; + __wsum sum; __asm__ __volatile__( " ld %0, @%1+ \n" @@ -115,16 +113,15 @@ static inline unsigned short ip_fast_csum(unsigned char * iph, return csum_fold(sum); } -static inline unsigned long csum_tcpudp_nofold(unsigned long saddr, - unsigned long daddr, +static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len, unsigned short proto, - unsigned int sum) + __wsum sum) { #if defined(__LITTLE_ENDIAN) - unsigned long len_proto = (ntohs(len)<<16)+proto*256; + unsigned long len_proto = (proto + len) << 8; #else - unsigned long len_proto = (proto<<16)+len; + unsigned long len_proto = proto + len; #endif unsigned long tmpreg; @@ -147,11 +144,10 @@ static inline unsigned long csum_tcpudp_nofold(unsigned long saddr, * computes the checksum of the TCP/UDP pseudo-header * returns a 16-bit checksum, already complemented */ -static inline unsigned short int csum_tcpudp_magic(unsigned long saddr, - unsigned long daddr, +static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr, unsigned short len, unsigned short proto, - unsigned int sum) + __wsum sum) { return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum)); } @@ -161,16 +157,16 @@ static inline unsigned short int csum_tcpudp_magic(unsigned long saddr, * in icmp.c */ -static inline unsigned short ip_compute_csum(unsigned char * buff, int len) { +static inline __sum16 ip_compute_csum(const void *buff, int len) +{ return csum_fold (csum_partial(buff, len, 0)); } #define _HAVE_ARCH_IPV6_CSUM -static inline unsigned short int csum_ipv6_magic(struct in6_addr *saddr, - struct in6_addr *daddr, - __u16 len, - unsigned short proto, - unsigned int sum) +static inline __sum16 csum_ipv6_magic(const struct in6_addr *saddr, + const struct in6_addr *daddr, + __u32 len, unsigned short proto, + __wsum sum) { unsigned long tmpreg0, tmpreg1, tmpreg2, tmpreg3; __asm__( @@ -197,7 +193,7 @@ static inline unsigned short int csum_ipv6_magic(struct in6_addr *saddr, : "=&r" (sum), "=&r" (tmpreg0), "=&r" (tmpreg1), "=&r" (tmpreg2), "=&r" (tmpreg3) : "r" (saddr), "r" (daddr), - "r" (htonl((__u32) (len))), "r" (htonl(proto)), "0" (sum) + "r" (htonl(len)), "r" (htonl(proto)), "0" (sum) : "cbit" ); diff --git a/include/asm-m32r/device.h b/include/asm-m32r/device.h new file mode 100644 index 00000000000..d8f9872b0e2 --- /dev/null +++ b/include/asm-m32r/device.h @@ -0,0 +1,7 @@ +/* + * Arch specific extensions to struct device + * + * This file is released under the GPLv2 + */ +#include <asm-generic/device.h> + diff --git a/include/asm-m32r/ide.h b/include/asm-m32r/ide.h index 219a0f74eff..c82ebe8f250 100644 --- a/include/asm-m32r/ide.h +++ b/include/asm-m32r/ide.h @@ -32,7 +32,8 @@ static __inline__ int ide_default_irq(unsigned long base) { switch (base) { -#if defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_MAPPI2) +#if defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_MAPPI2) \ + || defined(CONFIG_PLAT_OPSPUT) case 0x1f0: return PLD_IRQ_CFIREQ; default: return 0; diff --git a/include/asm-m32r/m32102.h b/include/asm-m32r/m32102.h index a1f0d1fe9eb..52807f8db16 100644 --- a/include/asm-m32r/m32102.h +++ b/include/asm-m32r/m32102.h @@ -104,7 +104,8 @@ #define M32R_MFT5RLD_PORTL (0x0C+M32R_MFT5_OFFSET) /* MFT4 reload */ #define M32R_MFT5CMPRLD_PORTL (0x10+M32R_MFT5_OFFSET) /* MFT4 compare reload */ -#if defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_M32104) +#if (defined(CONFIG_CHIP_M32700) && !defined(CONFIG_PLAT_MAPPI2)) \ + || defined(CONFIG_CHIP_M32104) #define M32R_MFTCR_MFT0MSK (1UL<<31) /* b0 */ #define M32R_MFTCR_MFT1MSK (1UL<<30) /* b1 */ #define M32R_MFTCR_MFT2MSK (1UL<<29) /* b2 */ @@ -117,7 +118,7 @@ #define M32R_MFTCR_MFT3EN (1UL<<20) /* b11 */ #define M32R_MFTCR_MFT4EN (1UL<<19) /* b12 */ #define M32R_MFTCR_MFT5EN (1UL<<18) /* b13 */ -#else /* not CONFIG_CHIP_M32700 && not CONFIG_CHIP_M32104 */ +#else #define M32R_MFTCR_MFT0MSK (1UL<<15) /* b16 */ #define M32R_MFTCR_MFT1MSK (1UL<<14) /* b17 */ #define M32R_MFTCR_MFT2MSK (1UL<<13) /* b18 */ @@ -130,7 +131,7 @@ #define M32R_MFTCR_MFT3EN (1UL<<4) /* b27 */ #define M32R_MFTCR_MFT4EN (1UL<<3) /* b28 */ #define M32R_MFTCR_MFT5EN (1UL<<2) /* b29 */ -#endif /* not CONFIG_CHIP_M32700 && not CONFIG_CHIP_M32104 */ +#endif #define M32R_MFTMOD_CC_MASK (1UL<<15) /* b16 */ #define M32R_MFTMOD_TCCR (1UL<<13) /* b18 */ diff --git a/include/asm-m32r/ptrace.h b/include/asm-m32r/ptrace.h index 2d2a6c97331..632b4ce4269 100644 --- a/include/asm-m32r/ptrace.h +++ b/include/asm-m32r/ptrace.h @@ -33,21 +33,10 @@ #define PT_R15 PT_SP /* processor status and miscellaneous context registers. */ -#if defined(CONFIG_ISA_M32R2) && defined(CONFIG_ISA_DSP_LEVEL2) #define PT_ACC0H 15 #define PT_ACC0L 16 -#define PT_ACC1H 17 -#define PT_ACC1L 18 -#define PT_ACCH PT_ACC0H -#define PT_ACCL PT_ACC0L -#elif defined(CONFIG_ISA_M32R2) || defined(CONFIG_ISA_M32R) -#define PT_ACCH 15 -#define PT_ACCL 16 -#define PT_DUMMY_ACC1H 17 -#define PT_DUMMY_ACC1L 18 -#else -#error unknown isa conifiguration -#endif +#define PT_ACC1H 17 /* ISA_DSP_LEVEL2 only */ +#define PT_ACC1L 18 /* ISA_DSP_LEVEL2 only */ #define PT_PSW 19 #define PT_BPC 20 #define PT_BBPSW 21 @@ -103,19 +92,10 @@ struct pt_regs { long syscall_nr; /* Saved main processor status and miscellaneous context registers. */ -#if defined(CONFIG_ISA_M32R2) && defined(CONFIG_ISA_DSP_LEVEL2) unsigned long acc0h; unsigned long acc0l; - unsigned long acc1h; - unsigned long acc1l; -#elif defined(CONFIG_ISA_M32R2) || defined(CONFIG_ISA_M32R) - unsigned long acch; - unsigned long accl; - unsigned long dummy_acc1h; - unsigned long dummy_acc1l; -#else -#error unknown isa configuration -#endif + unsigned long acc1h; /* ISA_DSP_LEVEL2 only */ + unsigned long acc1l; /* ISA_DSP_LEVEL2 only */ unsigned long psw; unsigned long bpc; /* saved PC for TRAP syscalls */ unsigned long bbpsw; diff --git a/include/asm-m32r/setup.h b/include/asm-m32r/setup.h index 52f4fa29abf..6a0b32202d4 100644 --- a/include/asm-m32r/setup.h +++ b/include/asm-m32r/setup.h @@ -1,6 +1,11 @@ /* * This is set up by the setup-routine at boot-time */ + +#define COMMAND_LINE_SIZE 512 + +#ifdef __KERNEL__ + #define PARAM ((unsigned char *)empty_zero_page) #define MOUNT_ROOT_RDONLY (*(unsigned long *) (PARAM+0x000)) @@ -18,8 +23,6 @@ #define SCREEN_INFO (*(struct screen_info *) (PARAM+0x200)) -#define COMMAND_LINE_SIZE (512) - #define RAMDISK_IMAGE_START_MASK (0x07FF) #define RAMDISK_PROMPT_FLAG (0x8000) #define RAMDISK_LOAD_FLAG (0x4000) @@ -27,3 +30,5 @@ extern unsigned long memory_start; extern unsigned long memory_end; +#endif /* __KERNEL__ */ + diff --git a/include/asm-m32r/sigcontext.h b/include/asm-m32r/sigcontext.h index 73025c0c41a..62537dc4dec 100644 --- a/include/asm-m32r/sigcontext.h +++ b/include/asm-m32r/sigcontext.h @@ -23,19 +23,10 @@ struct sigcontext { unsigned long sc_r12; /* Saved main processor status and miscellaneous context registers. */ -#if defined(CONFIG_ISA_M32R2) && defined(CONFIG_ISA_DSP_LEVEL2) unsigned long sc_acc0h; unsigned long sc_acc0l; - unsigned long sc_acc1h; - unsigned long sc_acc1l; -#elif defined(CONFIG_ISA_M32R2) || defined(CONFIG_ISA_M32R) - unsigned long sc_acch; - unsigned long sc_accl; - unsigned long sc_dummy_acc1h; - unsigned long sc_dummy_acc1l; -#else -#error unknown isa configuration -#endif + unsigned long sc_acc1h; /* ISA_DSP_LEVEL2 only */ + unsigned long sc_acc1l; /* ISA_DSP_LEVEL2 only */ unsigned long sc_psw; unsigned long sc_bpc; /* saved PC for TRAP syscalls */ unsigned long sc_bbpsw; diff --git a/include/asm-m32r/termbits.h b/include/asm-m32r/termbits.h index 5ace3702df7..faf2bd0504c 100644 --- a/include/asm-m32r/termbits.h +++ b/include/asm-m32r/termbits.h @@ -19,6 +19,17 @@ struct termios { cc_t c_cc[NCCS]; /* control characters */ }; +struct ktermios { + tcflag_t c_iflag; /* input mode flags */ + tcflag_t c_oflag; /* output mode flags */ + tcflag_t c_cflag; /* control mode flags */ + tcflag_t c_lflag; /* local mode flags */ + cc_t c_line; /* line discipline */ + cc_t c_cc[NCCS]; /* control characters */ + speed_t c_ispeed; /* input speed */ + speed_t c_ospeed; /* output speed */ +}; + /* c_cc characters */ #define VINTR 0 #define VQUIT 1 diff --git a/include/asm-m32r/unistd.h b/include/asm-m32r/unistd.h index 95aa34298d8..5b66bd3c6ed 100644 --- a/include/asm-m32r/unistd.h +++ b/include/asm-m32r/unistd.h @@ -296,117 +296,6 @@ #ifdef __KERNEL__ #define NR_syscalls 285 -#include <linux/err.h> - -/* user-visible error numbers are in the range -1 - -MAX_ERRNO: see - * <asm-m32r/errno.h> - */ - -#include <asm/syscall.h> /* SYSCALL_* */ - -#define __syscall_return(type, res) \ -do { \ - if ((unsigned long)(res) >= (unsigned long)(-MAX_ERRNO)) { \ - /* Avoid using "res" which is declared to be in register r0; \ - errno might expand to a function call and clobber it. */ \ - int __err = -(res); \ - errno = __err; \ - res = -1; \ - } \ - return (type) (res); \ -} while (0) - -#define _syscall0(type,name) \ -type name(void) \ -{ \ -register long __scno __asm__ ("r7") = __NR_##name; \ -register long __res __asm__("r0"); \ -__asm__ __volatile__ (\ - "trap #" SYSCALL_VECTOR "|| nop"\ - : "=r" (__res) \ - : "r" (__scno) \ - : "memory"); \ -__syscall_return(type,__res); \ -} - -#define _syscall1(type,name,type1,arg1) \ -type name(type1 arg1) \ -{ \ -register long __scno __asm__ ("r7") = __NR_##name; \ -register long __res __asm__ ("r0") = (long)(arg1); \ -__asm__ __volatile__ (\ - "trap #" SYSCALL_VECTOR "|| nop"\ - : "=r" (__res) \ - : "r" (__scno), "0" (__res) \ - : "memory"); \ -__syscall_return(type,__res); \ -} - -#define _syscall2(type,name,type1,arg1,type2,arg2) \ -type name(type1 arg1,type2 arg2) \ -{ \ -register long __scno __asm__ ("r7") = __NR_##name; \ -register long __arg2 __asm__ ("r1") = (long)(arg2); \ -register long __res __asm__ ("r0") = (long)(arg1); \ -__asm__ __volatile__ (\ - "trap #" SYSCALL_VECTOR "|| nop"\ - : "=r" (__res) \ - : "r" (__scno), "0" (__res), "r" (__arg2) \ - : "memory"); \ -__syscall_return(type,__res); \ -} - -#define _syscall3(type,name,type1,arg1,type2,arg2,type3,arg3) \ -type name(type1 arg1,type2 arg2,type3 arg3) \ -{ \ -register long __scno __asm__ ("r7") = __NR_##name; \ -register long __arg3 __asm__ ("r2") = (long)(arg3); \ -register long __arg2 __asm__ ("r1") = (long)(arg2); \ -register long __res __asm__ ("r0") = (long)(arg1); \ -__asm__ __volatile__ (\ - "trap #" SYSCALL_VECTOR "|| nop"\ - : "=r" (__res) \ - : "r" (__scno), "0" (__res), "r" (__arg2), \ - "r" (__arg3) \ - : "memory"); \ -__syscall_return(type,__res); \ -} - -#define _syscall4(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4) \ -type name(type1 arg1,type2 arg2,type3 arg3,type4 arg4) \ -{ \ -register long __scno __asm__ ("r7") = __NR_##name; \ -register long __arg4 __asm__ ("r3") = (long)(arg4); \ -register long __arg3 __asm__ ("r2") = (long)(arg3); \ -register long __arg2 __asm__ ("r1") = (long)(arg2); \ -register long __res __asm__ ("r0") = (long)(arg1); \ -__asm__ __volatile__ (\ - "trap #" SYSCALL_VECTOR "|| nop"\ - : "=r" (__res) \ - : "r" (__scno), "0" (__res), "r" (__arg2), \ - "r" (__arg3), "r" (__arg4) \ - : "memory"); \ -__syscall_return(type,__res); \ -} - -#define _syscall5(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4, \ - type5,arg5) \ -type name(type1 arg1,type2 arg2,type3 arg3,type4 arg4,type5 arg5) \ -{ \ -register long __scno __asm__ ("r7") = __NR_##name; \ -register long __arg5 __asm__ ("r4") = (long)(arg5); \ -register long __arg4 __asm__ ("r3") = (long)(arg4); \ -register long __arg3 __asm__ ("r2") = (long)(arg3); \ -register long __arg2 __asm__ ("r1") = (long)(arg2); \ -register long __res __asm__ ("r0") = (long)(arg1); \ -__asm__ __volatile__ (\ - "trap #" SYSCALL_VECTOR "|| nop"\ - : "=r" (__res) \ - : "r" (__scno), "0" (__res), "r" (__arg2), \ - "r" (__arg3), "r" (__arg4), "r" (__arg5) \ - : "memory"); \ -__syscall_return(type,__res); \ -} #define __ARCH_WANT_IPC_PARSE_VERSION #define __ARCH_WANT_STAT64 diff --git a/include/asm-m68k/cacheflush.h b/include/asm-m68k/cacheflush.h index 24d3ff44913..16bf375fdbe 100644 --- a/include/asm-m68k/cacheflush.h +++ b/include/asm-m68k/cacheflush.h @@ -89,6 +89,8 @@ static inline void flush_cache_mm(struct mm_struct *mm) __flush_cache_030(); } +#define flush_cache_dup_mm(mm) flush_cache_mm(mm) + /* flush_cache_range/flush_cache_page must be macros to avoid a dependency on linux/mm.h, which includes this file... */ static inline void flush_cache_range(struct vm_area_struct *vma, diff --git a/include/asm-m68k/checksum.h b/include/asm-m68k/checksum.h index 17280ef719f..494f9aec37e 100644 --- a/include/asm-m68k/checksum.h +++ b/include/asm-m68k/checksum.h @@ -15,7 +15,7 @@ * * it's best to have buff aligned on a 32-bit boundary */ -unsigned int csum_partial(const unsigned char * buff, int len, unsigned int sum); +__wsum csum_partial(const void *buff, int len, __wsum sum); /* * the same as csum_partial, but copies from src while it @@ -25,22 +25,21 @@ unsigned int csum_partial(const unsigned char * buff, int len, unsigned int sum) * better 64-bit) boundary */ -extern unsigned int csum_partial_copy_from_user(const unsigned char __user *src, - unsigned char *dst, - int len, int sum, +extern __wsum csum_partial_copy_from_user(const void __user *src, + void *dst, + int len, __wsum sum, int *csum_err); -extern unsigned int csum_partial_copy_nocheck(const unsigned char *src, - unsigned char *dst, int len, - int sum); +extern __wsum csum_partial_copy_nocheck(const void *src, + void *dst, int len, + __wsum sum); /* * This is a version of ip_compute_csum() optimized for IP headers, * which always checksum on 4 octet boundaries. * */ -static inline unsigned short -ip_fast_csum(unsigned char *iph, unsigned int ihl) +static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl) { unsigned int sum = 0; unsigned long tmp; @@ -58,29 +57,29 @@ ip_fast_csum(unsigned char *iph, unsigned int ihl) : "=d" (sum), "=&a" (iph), "=&d" (ihl), "=&d" (tmp) : "0" (sum), "1" (iph), "2" (ihl) : "memory"); - return ~sum; + return (__force __sum16)~sum; } /* * Fold a partial checksum */ -static inline unsigned int csum_fold(unsigned int sum) +static inline __sum16 csum_fold(__wsum sum) { - unsigned int tmp = sum; + unsigned int tmp = (__force u32)sum; __asm__("swap %1\n\t" "addw %1, %0\n\t" "clrw %1\n\t" "addxw %1, %0" : "=&d" (sum), "=&d" (tmp) : "0" (sum), "1" (tmp)); - return ~sum; + return (__force __sum16)~sum; } -static inline unsigned int -csum_tcpudp_nofold(unsigned long saddr, unsigned long daddr, unsigned short len, - unsigned short proto, unsigned int sum) +static inline __wsum +csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len, + unsigned short proto, __wsum sum) { __asm__ ("addl %2,%0\n\t" "addxl %3,%0\n\t" @@ -98,9 +97,9 @@ csum_tcpudp_nofold(unsigned long saddr, unsigned long daddr, unsigned short len, * computes the checksum of the TCP/UDP pseudo-header * returns a 16-bit checksum, already complemented */ -static inline unsigned short int -csum_tcpudp_magic(unsigned long saddr, unsigned long daddr, unsigned short len, - unsigned short proto, unsigned int sum) +static inline __sum16 +csum_tcpudp_magic(__be32 saddr, __be32 daddr, unsigned short len, + unsigned short proto, __wsum sum) { return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum)); } @@ -110,16 +109,15 @@ csum_tcpudp_magic(unsigned long saddr, unsigned long daddr, unsigned short len, * in icmp.c */ -static inline unsigned short -ip_compute_csum(unsigned char * buff, int len) +static inline __sum16 ip_compute_csum(const void *buff, int len) { return csum_fold (csum_partial(buff, len, 0)); } #define _HAVE_ARCH_IPV6_CSUM -static __inline__ unsigned short int -csum_ipv6_magic(struct in6_addr *saddr, struct in6_addr *daddr, - __u32 len, unsigned short proto, unsigned int sum) +static __inline__ __sum16 +csum_ipv6_magic(const struct in6_addr *saddr, const struct in6_addr *daddr, + __u32 len, unsigned short proto, __wsum sum) { register unsigned long tmp; __asm__("addl %2@,%0\n\t" diff --git a/include/asm-m68k/device.h b/include/asm-m68k/device.h new file mode 100644 index 00000000000..d8f9872b0e2 --- /dev/null +++ b/include/asm-m68k/device.h @@ -0,0 +1,7 @@ +/* + * Arch specific extensions to struct device + * + * This file is released under the GPLv2 + */ +#include <asm-generic/device.h> + diff --git a/include/asm-m68k/dma-mapping.h b/include/asm-m68k/dma-mapping.h index d90d841d3df..00259ed6fc9 100644 --- a/include/asm-m68k/dma-mapping.h +++ b/include/asm-m68k/dma-mapping.h @@ -21,7 +21,7 @@ static inline int dma_get_cache_alignment(void) return 1 << L1_CACHE_SHIFT; } -static inline int dma_is_consistent(dma_addr_t dma_addr) +static inline int dma_is_consistent(struct device *dev, dma_addr_t dma_addr) { return 0; } @@ -41,7 +41,7 @@ static inline void dma_free_noncoherent(struct device *dev, size_t size, { dma_free_coherent(dev, size, addr, handle); } -static inline void dma_cache_sync(void *vaddr, size_t size, +static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size, enum dma_data_direction dir) { /* we use coherent allocation, so not much to do here. */ diff --git a/include/asm-m68k/setup.h b/include/asm-m68k/setup.h index 7facc9a46e7..2a8853cd655 100644 --- a/include/asm-m68k/setup.h +++ b/include/asm-m68k/setup.h @@ -41,8 +41,12 @@ #define MACH_Q40 10 #define MACH_SUN3X 11 +#define COMMAND_LINE_SIZE 256 + #ifdef __KERNEL__ +#define CL_SIZE COMMAND_LINE_SIZE + #ifndef __ASSEMBLY__ extern unsigned long m68k_machtype; #endif /* !__ASSEMBLY__ */ @@ -355,8 +359,6 @@ extern int m68k_is040or060; */ #define NUM_MEMINFO 4 -#define CL_SIZE 256 -#define COMMAND_LINE_SIZE CL_SIZE #ifndef __ASSEMBLY__ struct mem_info { diff --git a/include/asm-m68k/sun3-head.h b/include/asm-m68k/sun3-head.h index f799d95bad5..e74f384e269 100644 --- a/include/asm-m68k/sun3-head.h +++ b/include/asm-m68k/sun3-head.h @@ -4,7 +4,6 @@ #define KERNBASE 0xE000000 /* First address the kernel will eventually be */ #define LOAD_ADDR 0x4000 /* prom jumps to us here unless this is elf /boot */ -#define BI_START (KERNBASE + 0x3000) /* beginning of the bootinfo records */ #define FC_CONTROL 3 #define FC_SUPERD 5 #define FC_CPU 7 diff --git a/include/asm-m68k/sun3ints.h b/include/asm-m68k/sun3ints.h index de91fa071b9..309d6e6a137 100644 --- a/include/asm-m68k/sun3ints.h +++ b/include/asm-m68k/sun3ints.h @@ -16,6 +16,7 @@ #include <asm/intersil.h> #include <asm/oplib.h> #include <asm/traps.h> +#include <asm/irq.h> #define SUN3_INT_VECS 192 diff --git a/include/asm-m68k/swim_iop.h b/include/asm-m68k/swim_iop.h deleted file mode 100644 index f29b67876b0..00000000000 --- a/include/asm-m68k/swim_iop.h +++ /dev/null @@ -1,221 +0,0 @@ -/* - * SWIM access through the IOP - * Written by Joshua M. Thompson - */ - -/* IOP number and channel number for the SWIM */ - -#define SWIM_IOP IOP_NUM_ISM -#define SWIM_CHAN 1 - -/* Command code: */ - -#define CMD_INIT 0x01 /* Initialize */ -#define CMD_SHUTDOWN 0x02 /* Shutdown */ -#define CMD_START_POLL 0x03 /* Start insert/eject polling */ -#define CMD_STOP_POLL 0x04 /* Stop insert/eject polling */ -#define CMD_SETHFSTAG 0x05 /* Set HFS tag buffer address */ -#define CMD_STATUS 0x06 /* Status */ -#define CMD_EJECT 0x07 /* Eject */ -#define CMD_FORMAT 0x08 /* Format */ -#define CMD_FORMAT_VERIFY 0x09 /* Format and Verify */ -#define CMD_WRITE 0x0A /* Write */ -#define CMD_READ 0x0B /* Read */ -#define CMD_READ_VERIFY 0x0C /* Read and Verify */ -#define CMD_CACHE_CTRL 0x0D /* Cache control */ -#define CMD_TAGBUFF_CTRL 0x0E /* Tag buffer control */ -#define CMD_GET_ICON 0x0F /* Get Icon */ - -/* Drive types: */ - -/* note: apple sez DRV_FDHD is 4, but I get back a type */ -/* of 5 when I do a drive status check on my FDHD */ - -#define DRV_NONE 0 /* No drive */ -#define DRV_UNKNOWN 1 /* Unspecified drive */ -#define DRV_400K 2 /* 400K */ -#define DRV_800K 3 /* 400K/800K */ -#define DRV_FDHD 5 /* 400K/800K/720K/1440K */ -#define DRV_HD20 7 /* Apple HD20 */ - -/* Format types: */ - -#define FMT_HD20 0x0001 /* Apple HD20 */ -#define FMT_400K 0x0002 /* 400K (GCR) */ -#define FMT_800K 0x0004 /* 800K (GCR) */ -#define FMT_720K 0x0008 /* 720K (MFM) */ -#define FMT_1440K 0x0010 /* 1.44M (MFM) */ - -#define FMD_KIND_400K 1 -#define FMD_KIND_800K 2 -#define FMD_KIND_720K 3 -#define FMD_KIND_1440K 1 - -/* Icon Flags: */ - -#define ICON_MEDIA 0x01 /* Have IOP supply media icon */ -#define ICON_DRIVE 0x01 /* Have IOP supply drive icon */ - -/* Error codes: */ - -#define gcrOnMFMErr -400 /* GCR (400/800K) on HD media */ -#define verErr -84 /* verify failed */ -#define fmt2Err -83 /* can't get enough sync during format */ -#define fmt1Err -82 /* can't find sector 0 after track format */ -#define sectNFErr -81 /* can't find sector */ -#define seekErr -80 /* drive error during seek */ -#define spdAdjErr -79 /* can't set drive speed */ -#define twoSideErr -78 /* drive is single-sided */ -#define initIWMErr -77 /* error during initialization */ -#define tk0badErr -76 /* track zero is bad */ -#define cantStepErr -75 /* drive error during step */ -#define wrUnderrun -74 /* write underrun occurred */ -#define badDBtSlp -73 /* bad data bitslip marks */ -#define badDCksum -72 /* bad data checksum */ -#define noDtaMkErr -71 /* can't find data mark */ -#define badBtSlpErr -70 /* bad address bitslip marks */ -#define badCksmErr -69 /* bad address-mark checksum */ -#define dataVerErr -68 /* read-verify failed */ -#define noAdrMkErr -67 /* can't find an address mark */ -#define noNybErr -66 /* no nybbles? disk is probably degaussed */ -#define offLinErr -65 /* no disk in drive */ -#define noDriveErr -64 /* drive isn't connected */ -#define nsDrvErr -56 /* no such drive */ -#define paramErr -50 /* bad positioning information */ -#define wPrErr -44 /* write protected */ -#define openErr -23 /* already initialized */ - -#ifndef __ASSEMBLY__ - -struct swim_drvstatus { - __u16 curr_track; /* Current track number */ - __u8 write_prot; /* 0x80 if disk is write protected */ - __u8 disk_in_drive; /* 0x01 or 0x02 if a disk is in the drive */ - __u8 installed; /* 0x01 if drive installed, 0xFF if not */ - __u8 num_sides; /* 0x80 if two-sided format supported */ - __u8 two_sided; /* 0xff if two-sided format diskette */ - __u8 new_interface; /* 0x00 if old 400K drive, 0xFF if newer */ - __u16 errors; /* Disk error count */ - struct { /* 32 bits */ - __u16 reserved; - __u16 :4; - __u16 external:1; /* Drive is external */ - __u16 scsi:1; /* Drive is a SCSI drive */ - __u16 fixed:1; /* Drive has fixed media */ - __u16 secondary:1; /* Drive is secondary drive */ - __u8 type; /* Drive type */ - } info; - __u8 mfm_drive; /* 0xFF if this is an FDHD drive */ - __u8 mfm_disk; /* 0xFF if 720K/1440K (MFM) disk */ - __u8 mfm_format; /* 0x00 if 720K, 0xFF if 1440K */ - __u8 ctlr_type; /* 0x00 if IWM, 0xFF if SWIM */ - __u16 curr_format; /* Current format type */ - __u16 allowed_fmt; /* Allowed format types */ - __u32 num_blocks; /* Number of blocks on disk */ - __u8 icon_flags; /* Icon flags */ - __u8 unusued; -}; - -/* Commands issued from the host to the IOP: */ - -struct swimcmd_init { - __u8 code; /* CMD_INIT */ - __u8 unusued; - __u16 error; - __u8 drives[28]; /* drive type list */ -}; - -struct swimcmd_startpoll { - __u8 code; /* CMD_START_POLL */ - __u8 unusued; - __u16 error; -}; - -struct swimcmd_sethfstag { - __u8 code; /* CMD_SETHFSTAG */ - __u8 unusued; - __u16 error; - caddr_t tagbuf; /* HFS tag buffer address */ -}; - -struct swimcmd_status { - __u8 code; /* CMD_STATUS */ - __u8 drive_num; - __u16 error; - struct swim_drvstatus status; -}; - -struct swimcmd_eject { - __u8 code; /* CMD_EJECT */ - __u8 drive_num; - __u16 error; - struct swim_drvstatus status; -}; - -struct swimcmd_format { - __u8 code; /* CMD_FORMAT */ - __u8 drive_num; - __u16 error; - union { - struct { - __u16 fmt; /* format kind */ - __u8 hdrbyte; /* fmt byte for hdr (0=default) */ - __u8 interleave; /* interleave (0 = default) */ - caddr_t databuf; /* sector data buff (0=default */ - caddr_t tagbuf; /* tag data buffer (0=default) */ - } f; - struct swim_drvstatus status; - } p; -}; - -struct swimcmd_fmtverify { - __u8 code; /* CMD_FORMAT_VERIFY */ - __u8 drive_num; - __u16 error; -}; - -struct swimcmd_rw { - __u8 code; /* CMD_READ, CMD_WRITE or CMD_READ_VERIFY */ - __u8 drive_num; - __u16 error; - caddr_t buffer; /* R/W buffer address */ - __u32 first_block; /* Starting block */ - __u32 num_blocks; /* Number of blocks */ - __u8 tag[12]; /* tag data */ -}; - -struct swimcmd_cachectl { - __u8 code; /* CMD_CACHE_CTRL */ - __u8 unused; - __u16 error; - __u8 enable; /* Nonzero to enable cache */ - __u8 install; /* +1 = install, -1 = remove, 0 = neither */ -}; - -struct swimcmd_tagbufctl { - __u8 code; /* CMD_TAGBUFF_CTRL */ - __u8 unused; - __u16 error; - caddr_t buf; /* buffer address or 0 to disable */ -}; - -struct swimcmd_geticon { - __u8 code; /* CMD_GET_ICON */ - __u8 drive_num; - __u16 error; - caddr_t buffer; /* Nuffer address */ - __u16 kind; /* 0 = media icon, 1 = drive icon */ - __u16 unused; - __u16 max_bytes; /* maximum byte count */ -}; - -/* Messages from the SWIM IOP to the host CPU: */ - -struct swimmsg_status { - __u8 code; /* 1 = insert, 2 = eject, 3 = status changed */ - __u8 drive_num; - __u16 error; - struct swim_drvstatus status; -}; - -#endif /* __ASSEMBLY__ */ diff --git a/include/asm-m68k/termbits.h b/include/asm-m68k/termbits.h index e9eec3eb071..a194092240f 100644 --- a/include/asm-m68k/termbits.h +++ b/include/asm-m68k/termbits.h @@ -17,6 +17,17 @@ struct termios { cc_t c_cc[NCCS]; /* control characters */ }; +struct ktermios { + tcflag_t c_iflag; /* input mode flags */ + tcflag_t c_oflag; /* output mode flags */ + tcflag_t c_cflag; /* control mode flags */ + tcflag_t c_lflag; /* local mode flags */ + cc_t c_line; /* line discipline */ + cc_t c_cc[NCCS]; /* control characters */ + speed_t c_ispeed; /* input speed */ + speed_t c_ospeed; /* output speed */ +}; + /* c_cc characters */ #define VINTR 0 #define VQUIT 1 diff --git a/include/asm-m68k/unistd.h b/include/asm-m68k/unistd.h index ad4348058c6..fdbb60e6a0d 100644 --- a/include/asm-m68k/unistd.h +++ b/include/asm-m68k/unistd.h @@ -317,103 +317,6 @@ #ifdef __KERNEL__ #define NR_syscalls 311 -#include <linux/err.h> - -/* user-visible error numbers are in the range -1 - -MAX_ERRNO: see - <asm-m68k/errno.h> */ - -#define __syscall_return(type, res) \ -do { \ - if ((unsigned long)(res) >= (unsigned long)(-MAX_ERRNO)) { \ - /* avoid using res which is declared to be in register d0; \ - errno might expand to a function call and clobber it. */ \ - int __err = -(res); \ - errno = __err; \ - res = -1; \ - } \ - return (type) (res); \ -} while (0) - -#define _syscall0(type,name) \ -type name(void) \ -{ \ -register long __res __asm__ ("%d0") = __NR_##name; \ -__asm__ __volatile__ ("trap #0" \ - : "+d" (__res) ); \ -__syscall_return(type,__res); \ -} - -#define _syscall1(type,name,atype,a) \ -type name(atype a) \ -{ \ -register long __res __asm__ ("%d0") = __NR_##name; \ -register long __a __asm__ ("%d1") = (long)(a); \ -__asm__ __volatile__ ("trap #0" \ - : "+d" (__res) \ - : "d" (__a) ); \ -__syscall_return(type,__res); \ -} - -#define _syscall2(type,name,atype,a,btype,b) \ -type name(atype a,btype b) \ -{ \ -register long __res __asm__ ("%d0") = __NR_##name; \ -register long __a __asm__ ("%d1") = (long)(a); \ -register long __b __asm__ ("%d2") = (long)(b); \ -__asm__ __volatile__ ("trap #0" \ - : "+d" (__res) \ - : "d" (__a), "d" (__b) \ - ); \ -__syscall_return(type,__res); \ -} - -#define _syscall3(type,name,atype,a,btype,b,ctype,c) \ -type name(atype a,btype b,ctype c) \ -{ \ -register long __res __asm__ ("%d0") = __NR_##name; \ -register long __a __asm__ ("%d1") = (long)(a); \ -register long __b __asm__ ("%d2") = (long)(b); \ -register long __c __asm__ ("%d3") = (long)(c); \ -__asm__ __volatile__ ("trap #0" \ - : "+d" (__res) \ - : "d" (__a), "d" (__b), \ - "d" (__c) \ - ); \ -__syscall_return(type,__res); \ -} - -#define _syscall4(type,name,atype,a,btype,b,ctype,c,dtype,d) \ -type name (atype a, btype b, ctype c, dtype d) \ -{ \ -register long __res __asm__ ("%d0") = __NR_##name; \ -register long __a __asm__ ("%d1") = (long)(a); \ -register long __b __asm__ ("%d2") = (long)(b); \ -register long __c __asm__ ("%d3") = (long)(c); \ -register long __d __asm__ ("%d4") = (long)(d); \ -__asm__ __volatile__ ("trap #0" \ - : "+d" (__res) \ - : "d" (__a), "d" (__b), \ - "d" (__c), "d" (__d) \ - ); \ -__syscall_return(type,__res); \ -} - -#define _syscall5(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e) \ -type name (atype a,btype b,ctype c,dtype d,etype e) \ -{ \ -register long __res __asm__ ("%d0") = __NR_##name; \ -register long __a __asm__ ("%d1") = (long)(a); \ -register long __b __asm__ ("%d2") = (long)(b); \ -register long __c __asm__ ("%d3") = (long)(c); \ -register long __d __asm__ ("%d4") = (long)(d); \ -register long __e __asm__ ("%d5") = (long)(e); \ -__asm__ __volatile__ ("trap #0" \ - : "+d" (__res) \ - : "d" (__a), "d" (__b), \ - "d" (__c), "d" (__d), "d" (__e) \ - ); \ -__syscall_return(type,__res); \ -} #define __ARCH_WANT_IPC_PARSE_VERSION #define __ARCH_WANT_OLD_READDIR diff --git a/include/asm-m68knommu/cacheflush.h b/include/asm-m68knommu/cacheflush.h index c3aadf3b0d8..163dcb1a968 100644 --- a/include/asm-m68knommu/cacheflush.h +++ b/include/asm-m68knommu/cacheflush.h @@ -8,6 +8,7 @@ #define flush_cache_all() __flush_cache_all() #define flush_cache_mm(mm) do { } while (0) +#define flush_cache_dup_mm(mm) do { } while (0) #define flush_cache_range(vma, start, end) __flush_cache_all() #define flush_cache_page(vma, vmaddr) do { } while (0) #define flush_dcache_range(start,len) __flush_cache_all() diff --git a/include/asm-m68knommu/checksum.h b/include/asm-m68knommu/checksum.h index 294ec7583ac..81883482ffb 100644 --- a/include/asm-m68knommu/checksum.h +++ b/include/asm-m68knommu/checksum.h @@ -15,7 +15,7 @@ * * it's best to have buff aligned on a 32-bit boundary */ -unsigned int csum_partial(const unsigned char * buff, int len, unsigned int sum); +__wsum csum_partial(const void *buff, int len, __wsum sum); /* * the same as csum_partial, but copies from src while it @@ -25,8 +25,8 @@ unsigned int csum_partial(const unsigned char * buff, int len, unsigned int sum) * better 64-bit) boundary */ -unsigned int csum_partial_copy(const unsigned char *src, unsigned char *dst, - int len, int sum); +__wsum csum_partial_copy_nocheck(const void *src, void *dst, + int len, __wsum sum); /* @@ -36,33 +36,31 @@ unsigned int csum_partial_copy(const unsigned char *src, unsigned char *dst, * better 64-bit) boundary */ -extern unsigned int csum_partial_copy_from_user(const unsigned char *src, - unsigned char *dst, int len, int sum, int *csum_err); +extern __wsum csum_partial_copy_from_user(const void __user *src, + void *dst, int len, __wsum sum, int *csum_err); -#define csum_partial_copy_nocheck(src, dst, len, sum) \ - csum_partial_copy((src), (dst), (len), (sum)) - -unsigned short ip_fast_csum(unsigned char *iph, unsigned int ihl); +__sum16 ip_fast_csum(const void *iph, unsigned int ihl); /* * Fold a partial checksum */ -static inline unsigned int csum_fold(unsigned int sum) +static inline __sum16 csum_fold(__wsum sum) { + unsigned int tmp = (__force u32)sum; #ifdef CONFIG_COLDFIRE - sum = (sum & 0xffff) + (sum >> 16); - sum = (sum & 0xffff) + (sum >> 16); + tmp = (tmp & 0xffff) + (tmp >> 16); + tmp = (tmp & 0xffff) + (tmp >> 16); + return (__force __sum16)~tmp; #else - unsigned int tmp = sum; __asm__("swap %1\n\t" "addw %1, %0\n\t" "clrw %1\n\t" "addxw %1, %0" : "=&d" (sum), "=&d" (tmp) : "0" (sum), "1" (sum)); + return (__force __sum16)~sum; #endif - return ~sum; } @@ -71,9 +69,9 @@ static inline unsigned int csum_fold(unsigned int sum) * returns a 16-bit checksum, already complemented */ -static inline unsigned int -csum_tcpudp_nofold(unsigned long saddr, unsigned long daddr, unsigned short len, - unsigned short proto, unsigned int sum) +static inline __wsum +csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len, + unsigned short proto, __wsum sum) { __asm__ ("addl %1,%0\n\t" "addxl %4,%0\n\t" @@ -86,9 +84,9 @@ csum_tcpudp_nofold(unsigned long saddr, unsigned long daddr, unsigned short len, return sum; } -static inline unsigned short int -csum_tcpudp_magic(unsigned long saddr, unsigned long daddr, unsigned short len, - unsigned short proto, unsigned int sum) +static inline __sum16 +csum_tcpudp_magic(__be32 saddr, __be32 daddr, unsigned short len, + unsigned short proto, __wsum sum) { return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum)); } @@ -98,12 +96,12 @@ csum_tcpudp_magic(unsigned long saddr, unsigned long daddr, unsigned short len, * in icmp.c */ -extern unsigned short ip_compute_csum(const unsigned char * buff, int len); +extern __sum16 ip_compute_csum(const void *buff, int len); #define _HAVE_ARCH_IPV6_CSUM -static __inline__ unsigned short int -csum_ipv6_magic(struct in6_addr *saddr, struct in6_addr *daddr, - __u32 len, unsigned short proto, unsigned int sum) +static __inline__ __sum16 +csum_ipv6_magic(const struct in6_addr *saddr, const struct in6_addr *daddr, + __u32 len, unsigned short proto, __wsum sum) { register unsigned long tmp; __asm__("addl %2@,%0\n\t" diff --git a/include/asm-m68knommu/device.h b/include/asm-m68knommu/device.h new file mode 100644 index 00000000000..d8f9872b0e2 --- /dev/null +++ b/include/asm-m68knommu/device.h @@ -0,0 +1,7 @@ +/* + * Arch specific extensions to struct device + * + * This file is released under the GPLv2 + */ +#include <asm-generic/device.h> + diff --git a/include/asm-m68knommu/dma-mapping.h b/include/asm-m68knommu/dma-mapping.h index 5622b855a57..6aeab18e58b 100644 --- a/include/asm-m68knommu/dma-mapping.h +++ b/include/asm-m68knommu/dma-mapping.h @@ -1,9 +1,10 @@ #ifndef _M68KNOMMU_DMA_MAPPING_H #define _M68KNOMMU_DMA_MAPPING_H - #ifdef CONFIG_PCI #include <asm-generic/dma-mapping.h> +#else +#include <asm-generic/dma-mapping-broken.h> #endif #endif /* _M68KNOMMU_DMA_MAPPING_H */ diff --git a/include/asm-m68knommu/irq.h b/include/asm-m68knommu/irq.h index 45e7a2fd168..7b8f874f842 100644 --- a/include/asm-m68knommu/irq.h +++ b/include/asm-m68knommu/irq.h @@ -86,5 +86,6 @@ extern void (*mach_disable_irq)(unsigned int); #define enable_irq(x) do { } while (0) #define disable_irq(x) do { } while (0) #define disable_irq_nosync(x) disable_irq(x) +#define irq_canonicalize(irq) (irq) #endif /* _M68K_IRQ_H_ */ diff --git a/include/asm-m68knommu/m520xsim.h b/include/asm-m68knommu/m520xsim.h index 1dac22ea95b..49d016e6391 100644 --- a/include/asm-m68knommu/m520xsim.h +++ b/include/asm-m68knommu/m520xsim.h @@ -31,6 +31,16 @@ #define MCFINT_QSPI 31 /* Interrupt number for QSPI */ #define MCFINT_PIT1 4 /* Interrupt number for PIT1 (PIT0 in processor) */ +/* + * SDRAM configuration registers. + */ +#define MCFSIM_SDMR 0x000a8000 /* SDRAM Mode/Extended Mode Register */ +#define MCFSIM_SDCR 0x000a8004 /* SDRAM Control Register */ +#define MCFSIM_SDCFG1 0x000a8008 /* SDRAM Configuration Register 1 */ +#define MCFSIM_SDCFG2 0x000a800c /* SDRAM Configuration Register 2 */ +#define MCFSIM_SDCS0 0x000a8110 /* SDRAM Chip Select 0 Configuration */ +#define MCFSIM_SDCS1 0x000a8114 /* SDRAM Chip Select 1 Configuration */ + #define MCF_GPIO_PAR_UART (0xA4036) #define MCF_GPIO_PAR_FECI2C (0xA4033) @@ -47,7 +57,7 @@ #define ICR_INTRCONF 0x05 #define MCFPIT_IMR MCFINTC_IMRL -#define MCFPIT_IMR_IBIT (1 << MCFINT_PIT1) +#define MCFPIT_IMR_IBIT (1 << MCFINT_PIT1) /****************************************************************************/ #endif /* m520xsim_h */ diff --git a/include/asm-m68knommu/mcfmbus.h b/include/asm-m68knommu/mcfmbus.h index 13df9d41bd1..319899c47a2 100644 --- a/include/asm-m68knommu/mcfmbus.h +++ b/include/asm-m68knommu/mcfmbus.h @@ -37,7 +37,7 @@ #define MCFMBUS_MFDR_MBC(a) ((a)&0x3F) /*M-Bus Clock*/ /* -* Define bit flags in Controll Register +* Define bit flags in Control Register */ #define MCFMBUS_MBCR_MEN (0x80) /* M-Bus Enable */ diff --git a/include/asm-m68knommu/rtc.h b/include/asm-m68knommu/rtc.h new file mode 100644 index 00000000000..eaf18ec83c8 --- /dev/null +++ b/include/asm-m68knommu/rtc.h @@ -0,0 +1 @@ +#include <asm-m68k/rtc.h> diff --git a/include/asm-m68knommu/scatterlist.h b/include/asm-m68knommu/scatterlist.h index 12309b181d2..2085d6ff878 100644 --- a/include/asm-m68knommu/scatterlist.h +++ b/include/asm-m68knommu/scatterlist.h @@ -10,7 +10,7 @@ struct scatterlist { unsigned int length; }; -#define sg_address(sg) (page_address((sg)->page) + (sg)->offset +#define sg_address(sg) (page_address((sg)->page) + (sg)->offset) #define sg_dma_address(sg) ((sg)->dma_address) #define sg_dma_len(sg) ((sg)->length) diff --git a/include/asm-m68knommu/setup.h b/include/asm-m68knommu/setup.h index d2b0fcce41b..fb86bb2a607 100644 --- a/include/asm-m68knommu/setup.h +++ b/include/asm-m68knommu/setup.h @@ -1,5 +1,10 @@ +#ifdef __KERNEL__ + #include <asm-m68k/setup.h> /* We have a bigger command line buffer. */ #undef COMMAND_LINE_SIZE + +#endif /* __KERNEL__ */ + #define COMMAND_LINE_SIZE 512 diff --git a/include/asm-m68knommu/ucontext.h b/include/asm-m68knommu/ucontext.h index 5d570cedbb0..713a27f901c 100644 --- a/include/asm-m68knommu/ucontext.h +++ b/include/asm-m68knommu/ucontext.h @@ -5,21 +5,17 @@ typedef int greg_t; #define NGREG 18 typedef greg_t gregset_t[NGREG]; -#ifdef CONFIG_FPU typedef struct fpregset { int f_pcr; int f_psr; int f_fpiaddr; int f_fpregs[8][3]; } fpregset_t; -#endif struct mcontext { int version; gregset_t gregs; -#ifdef CONFIG_FPU fpregset_t fpregs; -#endif }; #define MCONTEXT_VERSION 2 @@ -29,9 +25,7 @@ struct ucontext { struct ucontext *uc_link; stack_t uc_stack; struct mcontext uc_mcontext; -#ifdef CONFIG_FPU unsigned long uc_filler[80]; -#endif sigset_t uc_sigmask; /* mask last for extensibility */ }; diff --git a/include/asm-m68knommu/unistd.h b/include/asm-m68knommu/unistd.h index ebaf0319711..82e03195f32 100644 --- a/include/asm-m68knommu/unistd.h +++ b/include/asm-m68knommu/unistd.h @@ -318,156 +318,6 @@ #ifdef __KERNEL__ #define NR_syscalls 311 -#include <linux/err.h> - -/* user-visible error numbers are in the range -1 - -MAX_ERRNO: see - <asm-m68k/errno.h> */ - -#define __syscall_return(type, res) \ -do { \ - if ((unsigned long)(res) >= (unsigned long)(-MAX_ERRNO)) { \ - /* avoid using res which is declared to be in register d0; \ - errno might expand to a function call and clobber it. */ \ - int __err = -(res); \ - errno = __err; \ - res = -1; \ - } \ - return (type) (res); \ -} while (0) - -#define _syscall0(type, name) \ -type name(void) \ -{ \ - long __res; \ - __asm__ __volatile__ ("movel %1, %%d0\n\t" \ - "trap #0\n\t" \ - "movel %%d0, %0" \ - : "=g" (__res) \ - : "i" (__NR_##name) \ - : "cc", "%d0"); \ - if ((unsigned long)(__res) >= (unsigned long)(-125)) { \ - errno = -__res; \ - __res = -1; \ - } \ - return (type)__res; \ -} - -#define _syscall1(type, name, atype, a) \ -type name(atype a) \ -{ \ - long __res; \ - __asm__ __volatile__ ("movel %2, %%d1\n\t" \ - "movel %1, %%d0\n\t" \ - "trap #0\n\t" \ - "movel %%d0, %0" \ - : "=g" (__res) \ - : "i" (__NR_##name), \ - "g" ((long)a) \ - : "cc", "%d0", "%d1"); \ - if ((unsigned long)(__res) >= (unsigned long)(-125)) { \ - errno = -__res; \ - __res = -1; \ - } \ - return (type)__res; \ -} - -#define _syscall2(type, name, atype, a, btype, b) \ -type name(atype a, btype b) \ -{ \ - long __res; \ - __asm__ __volatile__ ("movel %3, %%d2\n\t" \ - "movel %2, %%d1\n\t" \ - "movel %1, %%d0\n\t" \ - "trap #0\n\t" \ - "movel %%d0, %0" \ - : "=g" (__res) \ - : "i" (__NR_##name), \ - "a" ((long)a), \ - "g" ((long)b) \ - : "cc", "%d0", "%d1", "%d2"); \ - if ((unsigned long)(__res) >= (unsigned long)(-125)) { \ - errno = -__res; \ - __res = -1; \ - } \ - return (type)__res; \ -} - -#define _syscall3(type, name, atype, a, btype, b, ctype, c) \ -type name(atype a, btype b, ctype c) \ -{ \ - long __res; \ - __asm__ __volatile__ ("movel %4, %%d3\n\t" \ - "movel %3, %%d2\n\t" \ - "movel %2, %%d1\n\t" \ - "movel %1, %%d0\n\t" \ - "trap #0\n\t" \ - "movel %%d0, %0" \ - : "=g" (__res) \ - : "i" (__NR_##name), \ - "a" ((long)a), \ - "a" ((long)b), \ - "g" ((long)c) \ - : "cc", "%d0", "%d1", "%d2", "%d3"); \ - if ((unsigned long)(__res) >= (unsigned long)(-125)) { \ - errno = -__res; \ - __res = -1; \ - } \ - return (type)__res; \ -} - -#define _syscall4(type, name, atype, a, btype, b, ctype, c, dtype, d) \ -type name(atype a, btype b, ctype c, dtype d) \ -{ \ - long __res; \ - __asm__ __volatile__ ("movel %5, %%d4\n\t" \ - "movel %4, %%d3\n\t" \ - "movel %3, %%d2\n\t" \ - "movel %2, %%d1\n\t" \ - "movel %1, %%d0\n\t" \ - "trap #0\n\t" \ - "movel %%d0, %0" \ - : "=g" (__res) \ - : "i" (__NR_##name), \ - "a" ((long)a), \ - "a" ((long)b), \ - "a" ((long)c), \ - "g" ((long)d) \ - : "cc", "%d0", "%d1", "%d2", "%d3", \ - "%d4"); \ - if ((unsigned long)(__res) >= (unsigned long)(-125)) { \ - errno = -__res; \ - __res = -1; \ - } \ - return (type)__res; \ -} - -#define _syscall5(type, name, atype, a, btype, b, ctype, c, dtype, d, etype, e) \ -type name(atype a, btype b, ctype c, dtype d, etype e) \ -{ \ - long __res; \ - __asm__ __volatile__ ("movel %6, %%d5\n\t" \ - "movel %5, %%d4\n\t" \ - "movel %4, %%d3\n\t" \ - "movel %3, %%d2\n\t" \ - "movel %2, %%d1\n\t" \ - "movel %1, %%d0\n\t" \ - "trap #0\n\t" \ - "movel %%d0, %0" \ - : "=g" (__res) \ - : "i" (__NR_##name), \ - "a" ((long)a), \ - "a" ((long)b), \ - "a" ((long)c), \ - "a" ((long)d), \ - "g" ((long)e) \ - : "cc", "%d0", "%d1", "%d2", "%d3", \ - "%d4", "%d5"); \ - if ((unsigned long)(__res) >= (unsigned long)(-125)) { \ - errno = -__res; \ - __res = -1; \ - } \ - return (type)__res; \ -} #define __ARCH_WANT_IPC_PARSE_VERSION #define __ARCH_WANT_OLD_READDIR diff --git a/include/asm-mips/addrspace.h b/include/asm-mips/addrspace.h index 45c706e34df..c6275088cf6 100644 --- a/include/asm-mips/addrspace.h +++ b/include/asm-mips/addrspace.h @@ -19,12 +19,16 @@ #define _ATYPE_ #define _ATYPE32_ #define _ATYPE64_ -#define _LLCONST_(x) x +#define _CONST64_(x) x #else #define _ATYPE_ __PTRDIFF_TYPE__ #define _ATYPE32_ int -#define _ATYPE64_ long long -#define _LLCONST_(x) x ## LL +#define _ATYPE64_ __s64 +#ifdef CONFIG_64BIT +#define _CONST64_(x) x ## L +#else +#define _CONST64_(x) x ## LL +#endif #endif /* @@ -48,7 +52,7 @@ */ #define CPHYSADDR(a) ((_ACAST32_(a)) & 0x1fffffff) #define XPHYSADDR(a) ((_ACAST64_(a)) & \ - _LLCONST_(0x000000ffffffffff)) + _CONST64_(0x000000ffffffffff)) #ifdef CONFIG_64BIT @@ -57,14 +61,14 @@ * The compatibility segments use the full 64-bit sign extended value. Note * the R8000 doesn't have them so don't reference these in generic MIPS code. */ -#define XKUSEG _LLCONST_(0x0000000000000000) -#define XKSSEG _LLCONST_(0x4000000000000000) -#define XKPHYS _LLCONST_(0x8000000000000000) -#define XKSEG _LLCONST_(0xc000000000000000) -#define CKSEG0 _LLCONST_(0xffffffff80000000) -#define CKSEG1 _LLCONST_(0xffffffffa0000000) -#define CKSSEG _LLCONST_(0xffffffffc0000000) -#define CKSEG3 _LLCONST_(0xffffffffe0000000) +#define XKUSEG _CONST64_(0x0000000000000000) +#define XKSSEG _CONST64_(0x4000000000000000) +#define XKPHYS _CONST64_(0x8000000000000000) +#define XKSEG _CONST64_(0xc000000000000000) +#define CKSEG0 _CONST64_(0xffffffff80000000) +#define CKSEG1 _CONST64_(0xffffffffa0000000) +#define CKSSEG _CONST64_(0xffffffffc0000000) +#define CKSEG3 _CONST64_(0xffffffffe0000000) #define CKSEG0ADDR(a) (CPHYSADDR(a) | CKSEG0) #define CKSEG1ADDR(a) (CPHYSADDR(a) | CKSEG1) @@ -122,7 +126,7 @@ #define PHYS_TO_XKSEG_UNCACHED(p) PHYS_TO_XKPHYS(K_CALG_UNCACHED,(p)) #define PHYS_TO_XKSEG_CACHED(p) PHYS_TO_XKPHYS(K_CALG_COH_SHAREABLE,(p)) #define XKPHYS_TO_PHYS(p) ((p) & TO_PHYS_MASK) -#define PHYS_TO_XKPHYS(cm,a) (_LLCONST_(0x8000000000000000) | \ +#define PHYS_TO_XKPHYS(cm,a) (_CONST64_(0x8000000000000000) | \ ((cm)<<59) | (a)) #if defined (CONFIG_CPU_R4300) \ @@ -132,20 +136,20 @@ || defined (CONFIG_CPU_NEVADA) \ || defined (CONFIG_CPU_TX49XX) \ || defined (CONFIG_CPU_MIPS64) -#define TO_PHYS_MASK _LLCONST_(0x0000000fffffffff) /* 2^^36 - 1 */ +#define TO_PHYS_MASK _CONST64_(0x0000000fffffffff) /* 2^^36 - 1 */ #endif #if defined (CONFIG_CPU_R8000) /* We keep KUSIZE consistent with R4000 for now (2^^40) instead of (2^^48) */ -#define TO_PHYS_MASK _LLCONST_(0x000000ffffffffff) /* 2^^40 - 1 */ +#define TO_PHYS_MASK _CONST64_(0x000000ffffffffff) /* 2^^40 - 1 */ #endif #if defined (CONFIG_CPU_R10000) -#define TO_PHYS_MASK _LLCONST_(0x000000ffffffffff) /* 2^^40 - 1 */ +#define TO_PHYS_MASK _CONST64_(0x000000ffffffffff) /* 2^^40 - 1 */ #endif #if defined(CONFIG_CPU_SB1) || defined(CONFIG_CPU_SB1A) -#define TO_PHYS_MASK _LLCONST_(0x00000fffffffffff) /* 2^^44 - 1 */ +#define TO_PHYS_MASK _CONST64_(0x00000fffffffffff) /* 2^^44 - 1 */ #endif #ifndef CONFIG_CPU_R8000 @@ -155,7 +159,7 @@ * in order to catch bugs in the source code. */ -#define COMPAT_K1BASE32 _LLCONST_(0xffffffffa0000000) +#define COMPAT_K1BASE32 _CONST64_(0xffffffffa0000000) #define PHYS_TO_COMPATK1(x) ((x) | COMPAT_K1BASE32) /* 32-bit compat k1 */ #endif diff --git a/include/asm-mips/atomic.h b/include/asm-mips/atomic.h index e64abc0d822..c1a2409bb52 100644 --- a/include/asm-mips/atomic.h +++ b/include/asm-mips/atomic.h @@ -9,20 +9,13 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (C) 1996, 97, 99, 2000, 03, 04 by Ralf Baechle + * Copyright (C) 1996, 97, 99, 2000, 03, 04, 06 by Ralf Baechle */ - -/* - * As workaround for the ATOMIC_DEC_AND_LOCK / atomic_dec_and_lock mess in - * <linux/spinlock.h> we have to include <linux/spinlock.h> outside the - * main big wrapper ... - */ -#include <linux/spinlock.h> - #ifndef _ASM_ATOMIC_H #define _ASM_ATOMIC_H #include <linux/irqflags.h> +#include <asm/barrier.h> #include <asm/cpu-features.h> #include <asm/war.h> @@ -138,6 +131,8 @@ static __inline__ int atomic_add_return(int i, atomic_t * v) { unsigned long result; + smp_mb(); + if (cpu_has_llsc && R10000_LLSC_WAR) { unsigned long temp; @@ -148,7 +143,6 @@ static __inline__ int atomic_add_return(int i, atomic_t * v) " sc %0, %2 \n" " beqzl %0, 1b \n" " addu %0, %1, %3 \n" - " sync \n" " .set mips0 \n" : "=&r" (result), "=&r" (temp), "=m" (v->counter) : "Ir" (i), "m" (v->counter) @@ -163,7 +157,6 @@ static __inline__ int atomic_add_return(int i, atomic_t * v) " sc %0, %2 \n" " beqz %0, 1b \n" " addu %0, %1, %3 \n" - " sync \n" " .set mips0 \n" : "=&r" (result), "=&r" (temp), "=m" (v->counter) : "Ir" (i), "m" (v->counter) @@ -178,6 +171,8 @@ static __inline__ int atomic_add_return(int i, atomic_t * v) local_irq_restore(flags); } + smp_mb(); + return result; } @@ -185,6 +180,8 @@ static __inline__ int atomic_sub_return(int i, atomic_t * v) { unsigned long result; + smp_mb(); + if (cpu_has_llsc && R10000_LLSC_WAR) { unsigned long temp; @@ -195,7 +192,6 @@ static __inline__ int atomic_sub_return(int i, atomic_t * v) " sc %0, %2 \n" " beqzl %0, 1b \n" " subu %0, %1, %3 \n" - " sync \n" " .set mips0 \n" : "=&r" (result), "=&r" (temp), "=m" (v->counter) : "Ir" (i), "m" (v->counter) @@ -210,7 +206,6 @@ static __inline__ int atomic_sub_return(int i, atomic_t * v) " sc %0, %2 \n" " beqz %0, 1b \n" " subu %0, %1, %3 \n" - " sync \n" " .set mips0 \n" : "=&r" (result), "=&r" (temp), "=m" (v->counter) : "Ir" (i), "m" (v->counter) @@ -225,6 +220,8 @@ static __inline__ int atomic_sub_return(int i, atomic_t * v) local_irq_restore(flags); } + smp_mb(); + return result; } @@ -240,6 +237,8 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v) { unsigned long result; + smp_mb(); + if (cpu_has_llsc && R10000_LLSC_WAR) { unsigned long temp; @@ -253,7 +252,6 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v) " beqzl %0, 1b \n" " subu %0, %1, %3 \n" " .set reorder \n" - " sync \n" "1: \n" " .set mips0 \n" : "=&r" (result), "=&r" (temp), "=m" (v->counter) @@ -272,7 +270,6 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v) " beqz %0, 1b \n" " subu %0, %1, %3 \n" " .set reorder \n" - " sync \n" "1: \n" " .set mips0 \n" : "=&r" (result), "=&r" (temp), "=m" (v->counter) @@ -289,6 +286,8 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v) local_irq_restore(flags); } + smp_mb(); + return result; } @@ -383,7 +382,7 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v) #ifdef CONFIG_64BIT -typedef struct { volatile __s64 counter; } atomic64_t; +typedef struct { volatile long counter; } atomic64_t; #define ATOMIC64_INIT(i) { (i) } @@ -492,6 +491,8 @@ static __inline__ long atomic64_add_return(long i, atomic64_t * v) { unsigned long result; + smp_mb(); + if (cpu_has_llsc && R10000_LLSC_WAR) { unsigned long temp; @@ -502,7 +503,6 @@ static __inline__ long atomic64_add_return(long i, atomic64_t * v) " scd %0, %2 \n" " beqzl %0, 1b \n" " addu %0, %1, %3 \n" - " sync \n" " .set mips0 \n" : "=&r" (result), "=&r" (temp), "=m" (v->counter) : "Ir" (i), "m" (v->counter) @@ -517,7 +517,6 @@ static __inline__ long atomic64_add_return(long i, atomic64_t * v) " scd %0, %2 \n" " beqz %0, 1b \n" " addu %0, %1, %3 \n" - " sync \n" " .set mips0 \n" : "=&r" (result), "=&r" (temp), "=m" (v->counter) : "Ir" (i), "m" (v->counter) @@ -532,6 +531,8 @@ static __inline__ long atomic64_add_return(long i, atomic64_t * v) local_irq_restore(flags); } + smp_mb(); + return result; } @@ -539,6 +540,8 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v) { unsigned long result; + smp_mb(); + if (cpu_has_llsc && R10000_LLSC_WAR) { unsigned long temp; @@ -549,7 +552,6 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v) " scd %0, %2 \n" " beqzl %0, 1b \n" " subu %0, %1, %3 \n" - " sync \n" " .set mips0 \n" : "=&r" (result), "=&r" (temp), "=m" (v->counter) : "Ir" (i), "m" (v->counter) @@ -564,7 +566,6 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v) " scd %0, %2 \n" " beqz %0, 1b \n" " subu %0, %1, %3 \n" - " sync \n" " .set mips0 \n" : "=&r" (result), "=&r" (temp), "=m" (v->counter) : "Ir" (i), "m" (v->counter) @@ -579,6 +580,8 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v) local_irq_restore(flags); } + smp_mb(); + return result; } @@ -594,6 +597,8 @@ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v) { unsigned long result; + smp_mb(); + if (cpu_has_llsc && R10000_LLSC_WAR) { unsigned long temp; @@ -607,7 +612,6 @@ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v) " beqzl %0, 1b \n" " dsubu %0, %1, %3 \n" " .set reorder \n" - " sync \n" "1: \n" " .set mips0 \n" : "=&r" (result), "=&r" (temp), "=m" (v->counter) @@ -626,7 +630,6 @@ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v) " beqz %0, 1b \n" " dsubu %0, %1, %3 \n" " .set reorder \n" - " sync \n" "1: \n" " .set mips0 \n" : "=&r" (result), "=&r" (temp), "=m" (v->counter) @@ -643,6 +646,8 @@ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v) local_irq_restore(flags); } + smp_mb(); + return result; } diff --git a/include/asm-mips/barrier.h b/include/asm-mips/barrier.h new file mode 100644 index 00000000000..ed82631b001 --- /dev/null +++ b/include/asm-mips/barrier.h @@ -0,0 +1,132 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2006 by Ralf Baechle (ralf@linux-mips.org) + */ +#ifndef __ASM_BARRIER_H +#define __ASM_BARRIER_H + +/* + * read_barrier_depends - Flush all pending reads that subsequents reads + * depend on. + * + * No data-dependent reads from memory-like regions are ever reordered + * over this barrier. All reads preceding this primitive are guaranteed + * to access memory (but not necessarily other CPUs' caches) before any + * reads following this primitive that depend on the data return by + * any of the preceding reads. This primitive is much lighter weight than + * rmb() on most CPUs, and is never heavier weight than is + * rmb(). + * + * These ordering constraints are respected by both the local CPU + * and the compiler. + * + * Ordering is not guaranteed by anything other than these primitives, + * not even by data dependencies. See the documentation for + * memory_barrier() for examples and URLs to more information. + * + * For example, the following code would force ordering (the initial + * value of "a" is zero, "b" is one, and "p" is "&a"): + * + * <programlisting> + * CPU 0 CPU 1 + * + * b = 2; + * memory_barrier(); + * p = &b; q = p; + * read_barrier_depends(); + * d = *q; + * </programlisting> + * + * because the read of "*q" depends on the read of "p" and these + * two reads are separated by a read_barrier_depends(). However, + * the following code, with the same initial values for "a" and "b": + * + * <programlisting> + * CPU 0 CPU 1 + * + * a = 2; + * memory_barrier(); + * b = 3; y = b; + * read_barrier_depends(); + * x = a; + * </programlisting> + * + * does not enforce ordering, since there is no data dependency between + * the read of "a" and the read of "b". Therefore, on some CPUs, such + * as Alpha, "y" could be set to 3 and "x" to 0. Use rmb() + * in cases like this where there are no data dependencies. + */ + +#define read_barrier_depends() do { } while(0) +#define smp_read_barrier_depends() do { } while(0) + +#ifdef CONFIG_CPU_HAS_SYNC +#define __sync() \ + __asm__ __volatile__( \ + ".set push\n\t" \ + ".set noreorder\n\t" \ + ".set mips2\n\t" \ + "sync\n\t" \ + ".set pop" \ + : /* no output */ \ + : /* no input */ \ + : "memory") +#else +#define __sync() do { } while(0) +#endif + +#define __fast_iob() \ + __asm__ __volatile__( \ + ".set push\n\t" \ + ".set noreorder\n\t" \ + "lw $0,%0\n\t" \ + "nop\n\t" \ + ".set pop" \ + : /* no output */ \ + : "m" (*(int *)CKSEG1) \ + : "memory") + +#define fast_wmb() __sync() +#define fast_rmb() __sync() +#define fast_mb() __sync() +#define fast_iob() \ + do { \ + __sync(); \ + __fast_iob(); \ + } while (0) + +#ifdef CONFIG_CPU_HAS_WB + +#include <asm/wbflush.h> + +#define wmb() fast_wmb() +#define rmb() fast_rmb() +#define mb() wbflush() +#define iob() wbflush() + +#else /* !CONFIG_CPU_HAS_WB */ + +#define wmb() fast_wmb() +#define rmb() fast_rmb() +#define mb() fast_mb() +#define iob() fast_iob() + +#endif /* !CONFIG_CPU_HAS_WB */ + +#if defined(CONFIG_WEAK_ORDERING) && defined(CONFIG_SMP) +#define __WEAK_ORDERING_MB " sync \n" +#else +#define __WEAK_ORDERING_MB " \n" +#endif + +#define smp_mb() __asm__ __volatile__(__WEAK_ORDERING_MB : : :"memory") +#define smp_rmb() __asm__ __volatile__(__WEAK_ORDERING_MB : : :"memory") +#define smp_wmb() __asm__ __volatile__(__WEAK_ORDERING_MB : : :"memory") + +#define set_mb(var, value) \ + do { var = value; smp_mb(); } while (0) + +#endif /* __ASM_BARRIER_H */ diff --git a/include/asm-mips/bitops.h b/include/asm-mips/bitops.h index 1bb89c5a10e..06445de1324 100644 --- a/include/asm-mips/bitops.h +++ b/include/asm-mips/bitops.h @@ -3,38 +3,34 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (c) 1994 - 1997, 1999, 2000 Ralf Baechle (ralf@gnu.org) + * Copyright (c) 1994 - 1997, 1999, 2000, 06 Ralf Baechle (ralf@linux-mips.org) * Copyright (c) 1999, 2000 Silicon Graphics, Inc. */ #ifndef _ASM_BITOPS_H #define _ASM_BITOPS_H #include <linux/compiler.h> +#include <linux/irqflags.h> #include <linux/types.h> +#include <asm/barrier.h> #include <asm/bug.h> #include <asm/byteorder.h> /* sigh ... */ #include <asm/cpu-features.h> +#include <asm/sgidefs.h> +#include <asm/war.h> #if (_MIPS_SZLONG == 32) #define SZLONG_LOG 5 #define SZLONG_MASK 31UL #define __LL "ll " #define __SC "sc " -#define cpu_to_lelongp(x) cpu_to_le32p((__u32 *) (x)) #elif (_MIPS_SZLONG == 64) #define SZLONG_LOG 6 #define SZLONG_MASK 63UL #define __LL "lld " #define __SC "scd " -#define cpu_to_lelongp(x) cpu_to_le64p((__u64 *) (x)) #endif -#ifdef __KERNEL__ - -#include <linux/irqflags.h> -#include <asm/sgidefs.h> -#include <asm/war.h> - /* * clear_bit() doesn't provide any barrier for the compiler. */ @@ -42,20 +38,6 @@ #define smp_mb__after_clear_bit() smp_mb() /* - * Only disable interrupt for kernel mode stuff to keep usermode stuff - * that dares to use kernel include files alive. - */ - -#define __bi_flags unsigned long flags -#define __bi_local_irq_save(x) local_irq_save(x) -#define __bi_local_irq_restore(x) local_irq_restore(x) -#else -#define __bi_flags -#define __bi_local_irq_save(x) -#define __bi_local_irq_restore(x) -#endif /* __KERNEL__ */ - -/* * set_bit - Atomically set a bit in memory * @nr: the bit to set * @addr: the address to start counting from @@ -93,13 +75,13 @@ static inline void set_bit(unsigned long nr, volatile unsigned long *addr) } else { volatile unsigned long *a = addr; unsigned long mask; - __bi_flags; + unsigned long flags; a += nr >> SZLONG_LOG; mask = 1UL << (nr & SZLONG_MASK); - __bi_local_irq_save(flags); + local_irq_save(flags); *a |= mask; - __bi_local_irq_restore(flags); + local_irq_restore(flags); } } @@ -141,13 +123,13 @@ static inline void clear_bit(unsigned long nr, volatile unsigned long *addr) } else { volatile unsigned long *a = addr; unsigned long mask; - __bi_flags; + unsigned long flags; a += nr >> SZLONG_LOG; mask = 1UL << (nr & SZLONG_MASK); - __bi_local_irq_save(flags); + local_irq_save(flags); *a &= ~mask; - __bi_local_irq_restore(flags); + local_irq_restore(flags); } } @@ -191,13 +173,13 @@ static inline void change_bit(unsigned long nr, volatile unsigned long *addr) } else { volatile unsigned long *a = addr; unsigned long mask; - __bi_flags; + unsigned long flags; a += nr >> SZLONG_LOG; mask = 1UL << (nr & SZLONG_MASK); - __bi_local_irq_save(flags); + local_irq_save(flags); *a ^= mask; - __bi_local_irq_restore(flags); + local_irq_restore(flags); } } @@ -223,9 +205,6 @@ static inline int test_and_set_bit(unsigned long nr, " " __SC "%2, %1 \n" " beqzl %2, 1b \n" " and %2, %0, %3 \n" -#ifdef CONFIG_SMP - " sync \n" -#endif " .set mips0 \n" : "=&r" (temp), "=m" (*m), "=&r" (res) : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m) @@ -245,9 +224,6 @@ static inline int test_and_set_bit(unsigned long nr, " " __SC "%2, %1 \n" " beqz %2, 1b \n" " and %2, %0, %3 \n" -#ifdef CONFIG_SMP - " sync \n" -#endif " .set pop \n" : "=&r" (temp), "=m" (*m), "=&r" (res) : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m) @@ -258,17 +234,19 @@ static inline int test_and_set_bit(unsigned long nr, volatile unsigned long *a = addr; unsigned long mask; int retval; - __bi_flags; + unsigned long flags; a += nr >> SZLONG_LOG; mask = 1UL << (nr & SZLONG_MASK); - __bi_local_irq_save(flags); + local_irq_save(flags); retval = (mask & *a) != 0; *a |= mask; - __bi_local_irq_restore(flags); + local_irq_restore(flags); return retval; } + + smp_mb(); } /* @@ -294,9 +272,6 @@ static inline int test_and_clear_bit(unsigned long nr, " " __SC "%2, %1 \n" " beqzl %2, 1b \n" " and %2, %0, %3 \n" -#ifdef CONFIG_SMP - " sync \n" -#endif " .set mips0 \n" : "=&r" (temp), "=m" (*m), "=&r" (res) : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m) @@ -317,9 +292,6 @@ static inline int test_and_clear_bit(unsigned long nr, " " __SC "%2, %1 \n" " beqz %2, 1b \n" " and %2, %0, %3 \n" -#ifdef CONFIG_SMP - " sync \n" -#endif " .set pop \n" : "=&r" (temp), "=m" (*m), "=&r" (res) : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m) @@ -330,17 +302,19 @@ static inline int test_and_clear_bit(unsigned long nr, volatile unsigned long *a = addr; unsigned long mask; int retval; - __bi_flags; + unsigned long flags; a += nr >> SZLONG_LOG; mask = 1UL << (nr & SZLONG_MASK); - __bi_local_irq_save(flags); + local_irq_save(flags); retval = (mask & *a) != 0; *a &= ~mask; - __bi_local_irq_restore(flags); + local_irq_restore(flags); return retval; } + + smp_mb(); } /* @@ -365,9 +339,6 @@ static inline int test_and_change_bit(unsigned long nr, " " __SC "%2, %1 \n" " beqzl %2, 1b \n" " and %2, %0, %3 \n" -#ifdef CONFIG_SMP - " sync \n" -#endif " .set mips0 \n" : "=&r" (temp), "=m" (*m), "=&r" (res) : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m) @@ -387,9 +358,6 @@ static inline int test_and_change_bit(unsigned long nr, " " __SC "\t%2, %1 \n" " beqz %2, 1b \n" " and %2, %0, %3 \n" -#ifdef CONFIG_SMP - " sync \n" -#endif " .set pop \n" : "=&r" (temp), "=m" (*m), "=&r" (res) : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m) @@ -399,22 +367,20 @@ static inline int test_and_change_bit(unsigned long nr, } else { volatile unsigned long *a = addr; unsigned long mask, retval; - __bi_flags; + unsigned long flags; a += nr >> SZLONG_LOG; mask = 1UL << (nr & SZLONG_MASK); - __bi_local_irq_save(flags); + local_irq_save(flags); retval = (mask & *a) != 0; *a ^= mask; - __bi_local_irq_restore(flags); + local_irq_restore(flags); return retval; } -} -#undef __bi_flags -#undef __bi_local_irq_save -#undef __bi_local_irq_restore + smp_mb(); +} #include <asm-generic/bitops/non-atomic.h> diff --git a/include/asm-mips/bootinfo.h b/include/asm-mips/bootinfo.h index 1e5ccdad3b0..8e321f53a38 100644 --- a/include/asm-mips/bootinfo.h +++ b/include/asm-mips/bootinfo.h @@ -131,6 +131,7 @@ #define MACH_PHILIPS_NINO 0 /* Nino */ #define MACH_PHILIPS_VELO 1 /* Velo */ #define MACH_PHILIPS_JBS 2 /* JBS */ +#define MACH_PHILIPS_STB810 3 /* STB810 */ /* * Valid machtype for group SIBYTE diff --git a/include/asm-mips/bug.h b/include/asm-mips/bug.h index 7b4739dc8f3..4d560a53394 100644 --- a/include/asm-mips/bug.h +++ b/include/asm-mips/bug.h @@ -1,6 +1,7 @@ #ifndef __ASM_BUG_H #define __ASM_BUG_H +#include <asm/sgidefs.h> #ifdef CONFIG_BUG @@ -13,6 +14,17 @@ do { \ #define HAVE_ARCH_BUG +#if (_MIPS_ISA > _MIPS_ISA_MIPS1) + +#define BUG_ON(condition) \ +do { \ + __asm__ __volatile__("tne $0, %0" : : "r" (condition)); \ +} while (0) + +#define HAVE_ARCH_BUG_ON + +#endif /* _MIPS_ISA > _MIPS_ISA_MIPS1 */ + #endif #include <asm-generic/bug.h> diff --git a/include/asm-mips/cacheflush.h b/include/asm-mips/cacheflush.h index e3c9925876a..0ddada3bb0b 100644 --- a/include/asm-mips/cacheflush.h +++ b/include/asm-mips/cacheflush.h @@ -17,6 +17,7 @@ * * - flush_cache_all() flushes entire cache * - flush_cache_mm(mm) flushes the specified mm context's cache lines + * - flush_cache_dup mm(mm) handles cache flushing when forking * - flush_cache_page(mm, vmaddr, pfn) flushes a single page * - flush_cache_range(vma, start, end) flushes a range of pages * - flush_icache_range(start, end) flush a range of instructions @@ -31,6 +32,7 @@ extern void (*flush_cache_all)(void); extern void (*__flush_cache_all)(void); extern void (*flush_cache_mm)(struct mm_struct *mm); +#define flush_cache_dup_mm(mm) do { (void) (mm); } while (0) extern void (*flush_cache_range)(struct vm_area_struct *vma, unsigned long start, unsigned long end); extern void (*flush_cache_page)(struct vm_area_struct *vma, unsigned long page, unsigned long pfn); diff --git a/include/asm-mips/checksum.h b/include/asm-mips/checksum.h index a5e6050ec0f..24cdcc6eaab 100644 --- a/include/asm-mips/checksum.h +++ b/include/asm-mips/checksum.h @@ -27,47 +27,53 @@ * * it's best to have buff aligned on a 32-bit boundary */ -unsigned int csum_partial(const unsigned char *buff, int len, unsigned int sum); +__wsum csum_partial(const void *buff, int len, __wsum sum); + +__wsum __csum_partial_copy_user(const void *src, void *dst, + int len, __wsum sum, int *err_ptr); /* * this is a new version of the above that records errors it finds in *errp, * but continues and zeros the rest of the buffer. */ -unsigned int csum_partial_copy_from_user(const unsigned char __user *src, - unsigned char *dst, int len, - unsigned int sum, int *errp); +static inline +__wsum csum_partial_copy_from_user(const void __user *src, void *dst, int len, + __wsum sum, int *err_ptr) +{ + might_sleep(); + return __csum_partial_copy_user((__force void *)src, dst, + len, sum, err_ptr); +} /* * Copy and checksum to user */ #define HAVE_CSUM_COPY_USER -static inline unsigned int csum_and_copy_to_user (const unsigned char *src, - unsigned char __user *dst, - int len, int sum, - int *err_ptr) +static inline +__wsum csum_and_copy_to_user(const void *src, void __user *dst, int len, + __wsum sum, int *err_ptr) { might_sleep(); - sum = csum_partial(src, len, sum); - - if (copy_to_user(dst, src, len)) { + if (access_ok(VERIFY_WRITE, dst, len)) + return __csum_partial_copy_user(src, (__force void *)dst, + len, sum, err_ptr); + if (len) *err_ptr = -EFAULT; - return -1; - } - return sum; + return (__force __wsum)-1; /* invalid checksum */ } /* * the same as csum_partial, but copies from user space (but on MIPS * we have just one address space, so this is identical to the above) */ -unsigned int csum_partial_copy_nocheck(const unsigned char *src, unsigned char *dst, - int len, unsigned int sum); +__wsum csum_partial_copy_nocheck(const void *src, void *dst, + int len, __wsum sum); /* * Fold a partial checksum without adding pseudo headers */ -static inline unsigned short int csum_fold(unsigned int sum) +static inline __sum16 csum_fold(__wsum sum) { __asm__( " .set push # csum_fold\n" @@ -82,7 +88,7 @@ static inline unsigned short int csum_fold(unsigned int sum) : "=r" (sum) : "0" (sum)); - return sum; + return (__force __sum16)sum; } /* @@ -92,10 +98,10 @@ static inline unsigned short int csum_fold(unsigned int sum) * By Jorge Cwik <jorge@laser.satlink.net>, adapted for linux by * Arnt Gulbrandsen. */ -static inline unsigned short ip_fast_csum(unsigned char *iph, unsigned int ihl) +static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl) { - unsigned int *word = (unsigned int *) iph; - unsigned int *stop = word + ihl; + const unsigned int *word = iph; + const unsigned int *stop = word + ihl; unsigned int csum; int carry; @@ -123,9 +129,9 @@ static inline unsigned short ip_fast_csum(unsigned char *iph, unsigned int ihl) return csum_fold(csum); } -static inline unsigned int csum_tcpudp_nofold(unsigned long saddr, - unsigned long daddr, unsigned short len, unsigned short proto, - unsigned int sum) +static inline __wsum csum_tcpudp_nofold(__be32 saddr, + __be32 daddr, unsigned short len, unsigned short proto, + __wsum sum) { __asm__( " .set push # csum_tcpudp_nofold\n" @@ -155,9 +161,9 @@ static inline unsigned int csum_tcpudp_nofold(unsigned long saddr, : "=r" (sum) : "0" (daddr), "r"(saddr), #ifdef __MIPSEL__ - "r" (((unsigned long)htons(len)<<16) + proto*256), + "r" ((proto + len) << 8), #else - "r" (((unsigned long)(proto)<<16) + len), + "r" (proto + len), #endif "r" (sum)); @@ -168,11 +174,10 @@ static inline unsigned int csum_tcpudp_nofold(unsigned long saddr, * computes the checksum of the TCP/UDP pseudo-header * returns a 16-bit checksum, already complemented */ -static inline unsigned short int csum_tcpudp_magic(unsigned long saddr, - unsigned long daddr, +static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr, unsigned short len, unsigned short proto, - unsigned int sum) + __wsum sum) { return csum_fold(csum_tcpudp_nofold(saddr, daddr, len, proto, sum)); } @@ -181,17 +186,16 @@ static inline unsigned short int csum_tcpudp_magic(unsigned long saddr, * this routine is used for miscellaneous IP-like checksums, mainly * in icmp.c */ -static inline unsigned short ip_compute_csum(unsigned char * buff, int len) +static inline __sum16 ip_compute_csum(const void *buff, int len) { return csum_fold(csum_partial(buff, len, 0)); } #define _HAVE_ARCH_IPV6_CSUM -static __inline__ unsigned short int csum_ipv6_magic(struct in6_addr *saddr, - struct in6_addr *daddr, - __u32 len, - unsigned short proto, - unsigned int sum) +static __inline__ __sum16 csum_ipv6_magic(const struct in6_addr *saddr, + const struct in6_addr *daddr, + __u32 len, unsigned short proto, + __wsum sum) { __asm__( " .set push # csum_ipv6_magic\n" diff --git a/include/asm-mips/compat.h b/include/asm-mips/compat.h index 900f472fdd2..432653d7ae0 100644 --- a/include/asm-mips/compat.h +++ b/include/asm-mips/compat.h @@ -5,6 +5,7 @@ */ #include <linux/types.h> #include <asm/page.h> +#include <asm/ptrace.h> #define COMPAT_USER_HZ 100 @@ -32,6 +33,7 @@ typedef struct { s32 val[2]; } compat_fsid_t; typedef s32 compat_timer_t; +typedef s32 compat_key_t; typedef s32 compat_int_t; typedef s32 compat_long_t; @@ -146,4 +148,71 @@ static inline void __user *compat_alloc_user_space(long len) return (void __user *) (regs->regs[29] - len); } +struct compat_ipc64_perm { + compat_key_t key; + __compat_uid32_t uid; + __compat_gid32_t gid; + __compat_uid32_t cuid; + __compat_gid32_t cgid; + compat_mode_t mode; + unsigned short seq; + unsigned short __pad2; + compat_ulong_t __unused1; + compat_ulong_t __unused2; +}; + +struct compat_semid64_ds { + struct compat_ipc64_perm sem_perm; + compat_time_t sem_otime; + compat_time_t sem_ctime; + compat_ulong_t sem_nsems; + compat_ulong_t __unused1; + compat_ulong_t __unused2; +}; + +struct compat_msqid64_ds { + struct compat_ipc64_perm msg_perm; +#ifndef CONFIG_CPU_LITTLE_ENDIAN + compat_ulong_t __unused1; +#endif + compat_time_t msg_stime; +#ifdef CONFIG_CPU_LITTLE_ENDIAN + compat_ulong_t __unused1; +#endif +#ifndef CONFIG_CPU_LITTLE_ENDIAN + compat_ulong_t __unused2; +#endif + compat_time_t msg_rtime; +#ifdef CONFIG_CPU_LITTLE_ENDIAN + compat_ulong_t __unused2; +#endif +#ifndef CONFIG_CPU_LITTLE_ENDIAN + compat_ulong_t __unused3; +#endif + compat_time_t msg_ctime; +#ifdef CONFIG_CPU_LITTLE_ENDIAN + compat_ulong_t __unused3; +#endif + compat_ulong_t msg_cbytes; + compat_ulong_t msg_qnum; + compat_ulong_t msg_qbytes; + compat_pid_t msg_lspid; + compat_pid_t msg_lrpid; + compat_ulong_t __unused4; + compat_ulong_t __unused5; +}; + +struct compat_shmid64_ds { + struct compat_ipc64_perm shm_perm; + compat_size_t shm_segsz; + compat_time_t shm_atime; + compat_time_t shm_dtime; + compat_time_t shm_ctime; + compat_pid_t shm_cpid; + compat_pid_t shm_lpid; + compat_ulong_t shm_nattch; + compat_ulong_t __unused1; + compat_ulong_t __unused2; +}; + #endif /* _ASM_COMPAT_H */ diff --git a/include/asm-mips/cpu-info.h b/include/asm-mips/cpu-info.h index a2f0c8ea916..610d0cdeaa9 100644 --- a/include/asm-mips/cpu-info.h +++ b/include/asm-mips/cpu-info.h @@ -22,12 +22,12 @@ * Descriptor for a cache */ struct cache_desc { - unsigned short linesz; /* Size of line in bytes */ - unsigned short ways; /* Number of ways */ - unsigned short sets; /* Number of lines per set */ unsigned int waysize; /* Bytes per way */ - unsigned int waybit; /* Bits to select in a cache set */ - unsigned int flags; /* Flags describing cache properties */ + unsigned short sets; /* Number of lines per set */ + unsigned char ways; /* Number of ways */ + unsigned char linesz; /* Size of line in bytes */ + unsigned char waybit; /* Bits to select in a cache set */ + unsigned char flags; /* Flags describing cache properties */ }; /* diff --git a/include/asm-mips/dec/kn02.h b/include/asm-mips/dec/kn02.h index 8319ad77b25..93430b5f472 100644 --- a/include/asm-mips/dec/kn02.h +++ b/include/asm-mips/dec/kn02.h @@ -82,11 +82,9 @@ #ifndef __ASSEMBLY__ -#include <linux/spinlock.h> #include <linux/types.h> extern u32 cached_kn02_csr; -extern spinlock_t kn02_lock; extern void init_kn02_irqs(int base); #endif diff --git a/include/asm-mips/device.h b/include/asm-mips/device.h new file mode 100644 index 00000000000..d8f9872b0e2 --- /dev/null +++ b/include/asm-mips/device.h @@ -0,0 +1,7 @@ +/* + * Arch specific extensions to struct device + * + * This file is released under the GPLv2 + */ +#include <asm-generic/device.h> + diff --git a/include/asm-mips/dma-mapping.h b/include/asm-mips/dma-mapping.h index 43288634c38..236d1a467cc 100644 --- a/include/asm-mips/dma-mapping.h +++ b/include/asm-mips/dma-mapping.h @@ -63,9 +63,9 @@ dma_get_cache_alignment(void) return 128; } -extern int dma_is_consistent(dma_addr_t dma_addr); +extern int dma_is_consistent(struct device *dev, dma_addr_t dma_addr); -extern void dma_cache_sync(void *vaddr, size_t size, +extern void dma_cache_sync(struct device *dev, void *vaddr, size_t size, enum dma_data_direction direction); #define ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY diff --git a/include/asm-mips/dma.h b/include/asm-mips/dma.h index e85849ac165..23f789c8084 100644 --- a/include/asm-mips/dma.h +++ b/include/asm-mips/dma.h @@ -74,7 +74,9 @@ * */ +#ifndef GENERIC_ISA_DMA_SUPPORT_BROKEN #define MAX_DMA_CHANNELS 8 +#endif /* * The maximum address in KSEG0 that we can perform a DMA transfer to on this diff --git a/include/asm-mips/futex.h b/include/asm-mips/futex.h index ed023eae067..47e5679c235 100644 --- a/include/asm-mips/futex.h +++ b/include/asm-mips/futex.h @@ -1,19 +1,21 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (c) 2006 Ralf Baechle (ralf@linux-mips.org) + */ #ifndef _ASM_FUTEX_H #define _ASM_FUTEX_H #ifdef __KERNEL__ #include <linux/futex.h> +#include <asm/barrier.h> #include <asm/errno.h> #include <asm/uaccess.h> #include <asm/war.h> -#ifdef CONFIG_SMP -#define __FUTEX_SMP_SYNC " sync \n" -#else -#define __FUTEX_SMP_SYNC -#endif - #define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \ { \ if (cpu_has_llsc && R10000_LLSC_WAR) { \ @@ -27,7 +29,7 @@ " .set mips3 \n" \ "2: sc $1, %2 \n" \ " beqzl $1, 1b \n" \ - __FUTEX_SMP_SYNC \ + __WEAK_ORDERING_MB \ "3: \n" \ " .set pop \n" \ " .set mips0 \n" \ @@ -53,7 +55,7 @@ " .set mips3 \n" \ "2: sc $1, %2 \n" \ " beqz $1, 1b \n" \ - __FUTEX_SMP_SYNC \ + __WEAK_ORDERING_MB \ "3: \n" \ " .set pop \n" \ " .set mips0 \n" \ @@ -86,7 +88,7 @@ futex_atomic_op_inuser (int encoded_op, int __user *uaddr) if (! access_ok (VERIFY_WRITE, uaddr, sizeof(int))) return -EFAULT; - inc_preempt_count(); + pagefault_disable(); switch (op) { case FUTEX_OP_SET: @@ -113,7 +115,7 @@ futex_atomic_op_inuser (int encoded_op, int __user *uaddr) ret = -ENOSYS; } - dec_preempt_count(); + pagefault_enable(); if (!ret) { switch (cmp) { @@ -150,7 +152,7 @@ futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval) " .set mips3 \n" "2: sc $1, %1 \n" " beqzl $1, 1b \n" - __FUTEX_SMP_SYNC + __WEAK_ORDERING_MB "3: \n" " .set pop \n" " .section .fixup,\"ax\" \n" @@ -177,7 +179,7 @@ futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval) " .set mips3 \n" "2: sc $1, %1 \n" " beqz $1, 1b \n" - __FUTEX_SMP_SYNC + __WEAK_ORDERING_MB "3: \n" " .set pop \n" " .section .fixup,\"ax\" \n" diff --git a/include/asm-mips/gt64120.h b/include/asm-mips/gt64120.h index 2edd171bb6c..4bf8e28f885 100644 --- a/include/asm-mips/gt64120.h +++ b/include/asm-mips/gt64120.h @@ -451,6 +451,13 @@ #define GT_SDRAM_OPMODE_OP_MODE 3 #define GT_SDRAM_OPMODE_OP_CBR 4 +#define GT_TC_CONTROL_ENTC0_SHF 0 +#define GT_TC_CONTROL_ENTC0_MSK (MSK(1) << GT_TC_CONTROL_ENTC0_SHF) +#define GT_TC_CONTROL_ENTC0_BIT GT_TC_CONTROL_ENTC0_MSK +#define GT_TC_CONTROL_SELTC0_SHF 1 +#define GT_TC_CONTROL_SELTC0_MSK (MSK(1) << GT_TC_CONTROL_SELTC0_SHF) +#define GT_TC_CONTROL_SELTC0_BIT GT_TC_CONTROL_SELTC0_MSK + #define GT_PCI0_BARE_SWSCS3BOOTDIS_SHF 0 #define GT_PCI0_BARE_SWSCS3BOOTDIS_MSK (MSK(1) << GT_PCI0_BARE_SWSCS3BOOTDIS_SHF) @@ -523,6 +530,13 @@ #define GT_PCI0_CMD_SWORDSWAP_MSK (MSK(1) << GT_PCI0_CMD_SWORDSWAP_SHF) #define GT_PCI0_CMD_SWORDSWAP_BIT GT_PCI0_CMD_SWORDSWAP_MSK +#define GT_INTR_T0EXP_SHF 8 +#define GT_INTR_T0EXP_MSK (MSK(1) << GT_INTR_T0EXP_SHF) +#define GT_INTR_T0EXP_BIT GT_INTR_T0EXP_MSK +#define GT_INTR_RETRYCTR0_SHF 20 +#define GT_INTR_RETRYCTR0_MSK (MSK(1) << GT_INTR_RETRYCTR0_SHF) +#define GT_INTR_RETRYCTR0_BIT GT_INTR_RETRYCTR0_MSK + /* * Misc */ diff --git a/include/asm-mips/highmem.h b/include/asm-mips/highmem.h index c976bfaaba8..f8c8182f7f2 100644 --- a/include/asm-mips/highmem.h +++ b/include/asm-mips/highmem.h @@ -21,6 +21,7 @@ #include <linux/init.h> #include <linux/interrupt.h> +#include <linux/uaccess.h> #include <asm/kmap_types.h> /* undef for production */ @@ -70,11 +71,16 @@ static inline void *kmap(struct page *page) static inline void *kmap_atomic(struct page *page, enum km_type type) { + pagefault_disable(); return page_address(page); } -static inline void kunmap_atomic(void *kvaddr, enum km_type type) { } -#define kmap_atomic_pfn(pfn, idx) page_address(pfn_to_page(pfn)) +static inline void kunmap_atomic(void *kvaddr, enum km_type type) +{ + pagefault_enable(); +} + +#define kmap_atomic_pfn(pfn, idx) kmap_atomic(pfn_to_page(pfn), (idx)) #define kmap_atomic_to_page(ptr) virt_to_page(ptr) diff --git a/include/asm-mips/i8259.h b/include/asm-mips/i8259.h index 0214abe3f0a..4df8d8b118c 100644 --- a/include/asm-mips/i8259.h +++ b/include/asm-mips/i8259.h @@ -19,10 +19,31 @@ #include <asm/io.h> +/* i8259A PIC registers */ +#define PIC_MASTER_CMD 0x20 +#define PIC_MASTER_IMR 0x21 +#define PIC_MASTER_ISR PIC_MASTER_CMD +#define PIC_MASTER_POLL PIC_MASTER_ISR +#define PIC_MASTER_OCW3 PIC_MASTER_ISR +#define PIC_SLAVE_CMD 0xa0 +#define PIC_SLAVE_IMR 0xa1 + +/* i8259A PIC related value */ +#define PIC_CASCADE_IR 2 +#define MASTER_ICW4_DEFAULT 0x01 +#define SLAVE_ICW4_DEFAULT 0x01 +#define PIC_ICW4_AEOI 2 + extern spinlock_t i8259A_lock; +extern void init_8259A(int auto_eoi); +extern void enable_8259A_irq(unsigned int irq); +extern void disable_8259A_irq(unsigned int irq); + extern void init_i8259_irqs(void); +#define I8259A_IRQ_BASE 0 + /* * Do the traditional i8259 interrupt polling thing. This is for the few * cases where no better interrupt acknowledge method is available and we @@ -35,15 +56,15 @@ static inline int i8259_irq(void) spin_lock(&i8259A_lock); /* Perform an interrupt acknowledge cycle on controller 1. */ - outb(0x0C, 0x20); /* prepare for poll */ - irq = inb(0x20) & 7; - if (irq == 2) { + outb(0x0C, PIC_MASTER_CMD); /* prepare for poll */ + irq = inb(PIC_MASTER_CMD) & 7; + if (irq == PIC_CASCADE_IR) { /* * Interrupt is cascaded so perform interrupt * acknowledge on controller 2. */ - outb(0x0C, 0xA0); /* prepare for poll */ - irq = (inb(0xA0) & 7) + 8; + outb(0x0C, PIC_SLAVE_CMD); /* prepare for poll */ + irq = (inb(PIC_SLAVE_CMD) & 7) + 8; } if (unlikely(irq == 7)) { @@ -54,14 +75,14 @@ static inline int i8259_irq(void) * significant bit is not set then there is no valid * interrupt. */ - outb(0x0B, 0x20); /* ISR register */ - if(~inb(0x20) & 0x80) + outb(0x0B, PIC_MASTER_ISR); /* ISR register */ + if(~inb(PIC_MASTER_ISR) & 0x80) irq = -1; } spin_unlock(&i8259A_lock); - return irq; + return likely(irq >= 0) ? irq + I8259A_IRQ_BASE : irq; } #endif /* _ASM_I8259_H */ diff --git a/include/asm-mips/io.h b/include/asm-mips/io.h index bc5f3c53155..d77b657c09c 100644 --- a/include/asm-mips/io.h +++ b/include/asm-mips/io.h @@ -113,7 +113,7 @@ static inline void set_io_port_base(unsigned long base) * almost all conceivable cases a device driver should not be using * this function */ -static inline unsigned long virt_to_phys(volatile void * address) +static inline unsigned long virt_to_phys(volatile const void *address) { return (unsigned long)address - PAGE_OFFSET; } diff --git a/include/asm-mips/irq.h b/include/asm-mips/irq.h index 35a05ca5560..386da82e577 100644 --- a/include/asm-mips/irq.h +++ b/include/asm-mips/irq.h @@ -24,8 +24,6 @@ static inline int irq_canonicalize(int irq) #define irq_canonicalize(irq) (irq) /* Sane hardware, sane code ... */ #endif -extern asmlinkage unsigned int do_IRQ(unsigned int irq); - #ifdef CONFIG_MIPS_MT_SMTC /* * Clear interrupt mask handling "backstop" if irq_hwmask @@ -33,18 +31,16 @@ extern asmlinkage unsigned int do_IRQ(unsigned int irq); * functions will take over re-enabling the low-level mask. * Otherwise it will be done on return from exception. */ -#define __DO_IRQ_SMTC_HOOK() \ +#define __DO_IRQ_SMTC_HOOK(irq) \ do { \ if (irq_hwmask[irq] & 0x0000ff00) \ write_c0_tccontext(read_c0_tccontext() & \ ~(irq_hwmask[irq] & 0x0000ff00)); \ } while (0) #else -#define __DO_IRQ_SMTC_HOOK() do { } while (0) +#define __DO_IRQ_SMTC_HOOK(irq) do { } while (0) #endif -#ifdef CONFIG_PREEMPT - /* * do_IRQ handles all normal device IRQ's (the special * SMP cross-CPU interrupts have their own specific @@ -56,13 +52,11 @@ do { \ #define do_IRQ(irq) \ do { \ irq_enter(); \ - __DO_IRQ_SMTC_HOOK(); \ - __do_IRQ((irq)); \ + __DO_IRQ_SMTC_HOOK(irq); \ + generic_handle_irq(irq); \ irq_exit(); \ } while (0) -#endif - extern void arch_init_irq(void); extern void spurious_interrupt(void); diff --git a/include/asm-mips/kexec.h b/include/asm-mips/kexec.h new file mode 100644 index 00000000000..b25267ebcb0 --- /dev/null +++ b/include/asm-mips/kexec.h @@ -0,0 +1,32 @@ +/* + * kexec.h for kexec + * Created by <nschichan@corp.free.fr> on Thu Oct 12 14:59:34 2006 + * + * This source code is licensed under the GNU General Public License, + * Version 2. See the file COPYING for more details. + */ + +#ifndef _MIPS_KEXEC +# define _MIPS_KEXEC + +/* Maximum physical address we can use pages from */ +#define KEXEC_SOURCE_MEMORY_LIMIT (0x20000000) +/* Maximum address we can reach in physical address mode */ +#define KEXEC_DESTINATION_MEMORY_LIMIT (0x20000000) + /* Maximum address we can use for the control code buffer */ +#define KEXEC_CONTROL_MEMORY_LIMIT (0x20000000) + +#define KEXEC_CONTROL_CODE_SIZE 4096 + +/* The native architecture */ +#define KEXEC_ARCH KEXEC_ARCH_MIPS + +#define MAX_NOTE_BYTES 1024 + +static inline void crash_setup_regs(struct pt_regs *newregs, + struct pt_regs *oldregs) +{ + /* Dummy implementation for now */ +} + +#endif /* !_MIPS_KEXEC */ diff --git a/include/asm-mips/mach-cobalt/cobalt.h b/include/asm-mips/mach-cobalt/cobalt.h index b3c5ecbec03..00b0fc68d5c 100644 --- a/include/asm-mips/mach-cobalt/cobalt.h +++ b/include/asm-mips/mach-cobalt/cobalt.h @@ -67,34 +67,9 @@ #define COBALT_BRD_ID_QUBE2 0x5 #define COBALT_BRD_ID_RAQ2 0x6 -/* - * Galileo chipset access macros for the Cobalt. The base address for - * the GT64111 chip is 0x14000000 - * - * Most of this really should go into a separate GT64111 header file. - */ -#define GT64111_IO_BASE 0x10000000UL -#define GT64111_IO_END 0x11ffffffUL -#define GT64111_MEM_BASE 0x12000000UL -#define GT64111_MEM_END 0x13ffffffUL -#define GT64111_BASE 0x14000000UL -#define GALILEO_REG(ofs) CKSEG1ADDR(GT64111_BASE + (unsigned long)(ofs)) - -#define GALILEO_INL(port) (*(volatile unsigned int *) GALILEO_REG(port)) -#define GALILEO_OUTL(val, port) \ -do { \ - *(volatile unsigned int *) GALILEO_REG(port) = (val); \ -} while (0) - -#define GALILEO_INTR_T0EXP (1 << 8) -#define GALILEO_INTR_RETRY_CTR (1 << 20) - -#define GALILEO_ENTC0 0x01 -#define GALILEO_SELTC0 0x02 - #define PCI_CFG_SET(devfn,where) \ - GALILEO_OUTL((0x80000000 | (PCI_SLOT (devfn) << 11) | \ - (PCI_FUNC (devfn) << 8) | (where)), GT_PCI0_CFGADDR_OFS) + GT_WRITE(GT_PCI0_CFGADDR_OFS, (0x80000000 | (PCI_SLOT (devfn) << 11) | \ + (PCI_FUNC (devfn) << 8) | (where))) #define COBALT_LED_PORT (*(volatile unsigned char *) CKSEG1ADDR(0x1c000000)) # define COBALT_LED_BAR_LEFT (1 << 0) /* Qube */ diff --git a/include/asm-mips/mach-cobalt/mach-gt64120.h b/include/asm-mips/mach-cobalt/mach-gt64120.h index 587fc4378f4..ae9c5523c7e 100644 --- a/include/asm-mips/mach-cobalt/mach-gt64120.h +++ b/include/asm-mips/mach-cobalt/mach-gt64120.h @@ -1 +1,27 @@ -/* there's something here ... in the dark */ +/* + * Copyright (C) 2006 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + */ +#ifndef _COBALT_MACH_GT64120_H +#define _COBALT_MACH_GT64120_H + +/* + * Cobalt uses GT64111. GT64111 is almost the same as GT64120. + */ + +#define GT64120_BASE CKSEG1ADDR(GT_DEF_BASE) + +#endif /* _COBALT_MACH_GT64120_H */ diff --git a/include/asm-mips/mach-ip27/irq.h b/include/asm-mips/mach-ip27/irq.h index 806213ce31b..25f0c3f39ad 100644 --- a/include/asm-mips/mach-ip27/irq.h +++ b/include/asm-mips/mach-ip27/irq.h @@ -10,8 +10,6 @@ #ifndef __ASM_MACH_IP27_IRQ_H #define __ASM_MACH_IP27_IRQ_H -#include <asm/sn/arch.h> - /* * A hardwired interrupt number is completly stupid for this system - a * large configuration might have thousands if not tenthousands of diff --git a/include/asm-mips/mach-ip27/topology.h b/include/asm-mips/mach-ip27/topology.h index a13b715fd9c..44790fdc5d0 100644 --- a/include/asm-mips/mach-ip27/topology.h +++ b/include/asm-mips/mach-ip27/topology.h @@ -1,7 +1,6 @@ #ifndef _ASM_MACH_TOPOLOGY_H #define _ASM_MACH_TOPOLOGY_H 1 -#include <asm/sn/arch.h> #include <asm/sn/hub.h> #include <asm/mmzone.h> diff --git a/include/asm-mips/mach-rm200/cpu-feature-overrides.h b/include/asm-mips/mach-rm/cpu-feature-overrides.h index 11410ae10d3..11410ae10d3 100644 --- a/include/asm-mips/mach-rm200/cpu-feature-overrides.h +++ b/include/asm-mips/mach-rm/cpu-feature-overrides.h diff --git a/include/asm-mips/mach-rm200/mc146818rtc.h b/include/asm-mips/mach-rm/mc146818rtc.h index d37ae68dc6a..d37ae68dc6a 100644 --- a/include/asm-mips/mach-rm200/mc146818rtc.h +++ b/include/asm-mips/mach-rm/mc146818rtc.h diff --git a/include/asm-mips/mach-rm200/timex.h b/include/asm-mips/mach-rm/timex.h index 11ff6cb0f21..11ff6cb0f21 100644 --- a/include/asm-mips/mach-rm200/timex.h +++ b/include/asm-mips/mach-rm/timex.h diff --git a/include/asm-mips/mipsregs.h b/include/asm-mips/mipsregs.h index 1f318d70799..9985cb7c16e 100644 --- a/include/asm-mips/mipsregs.h +++ b/include/asm-mips/mipsregs.h @@ -545,62 +545,6 @@ #define MIPS_FPIR_L (_ULCAST_(1) << 21) #define MIPS_FPIR_F64 (_ULCAST_(1) << 22) -/* - * R10000 performance counter definitions. - * - * FIXME: The R10000 performance counter opens a nice way to implement CPU - * time accounting with a precission of one cycle. I don't have - * R10000 silicon but just a manual, so ... - */ - -/* - * Events counted by counter #0 - */ -#define CE0_CYCLES 0 -#define CE0_INSN_ISSUED 1 -#define CE0_LPSC_ISSUED 2 -#define CE0_S_ISSUED 3 -#define CE0_SC_ISSUED 4 -#define CE0_SC_FAILED 5 -#define CE0_BRANCH_DECODED 6 -#define CE0_QW_WB_SECONDARY 7 -#define CE0_CORRECTED_ECC_ERRORS 8 -#define CE0_ICACHE_MISSES 9 -#define CE0_SCACHE_I_MISSES 10 -#define CE0_SCACHE_I_WAY_MISSPREDICTED 11 -#define CE0_EXT_INTERVENTIONS_REQ 12 -#define CE0_EXT_INVALIDATE_REQ 13 -#define CE0_VIRTUAL_COHERENCY_COND 14 -#define CE0_INSN_GRADUATED 15 - -/* - * Events counted by counter #1 - */ -#define CE1_CYCLES 0 -#define CE1_INSN_GRADUATED 1 -#define CE1_LPSC_GRADUATED 2 -#define CE1_S_GRADUATED 3 -#define CE1_SC_GRADUATED 4 -#define CE1_FP_INSN_GRADUATED 5 -#define CE1_QW_WB_PRIMARY 6 -#define CE1_TLB_REFILL 7 -#define CE1_BRANCH_MISSPREDICTED 8 -#define CE1_DCACHE_MISS 9 -#define CE1_SCACHE_D_MISSES 10 -#define CE1_SCACHE_D_WAY_MISSPREDICTED 11 -#define CE1_EXT_INTERVENTION_HITS 12 -#define CE1_EXT_INVALIDATE_REQ 13 -#define CE1_SP_HINT_TO_CEXCL_SC_BLOCKS 14 -#define CE1_SP_HINT_TO_SHARED_SC_BLOCKS 15 - -/* - * These flags define in which privilege mode the counters count events - */ -#define CEB_USER 8 /* Count events in user mode, EXL = ERL = 0 */ -#define CEB_SUPERVISOR 4 /* Count events in supvervisor mode EXL = ERL = 0 */ -#define CEB_KERNEL 2 /* Count events in kernel mode EXL = ERL = 0 */ -#define CEB_EXL 1 /* Count events with EXL = 1, ERL = 0 */ - #ifndef __ASSEMBLY__ /* diff --git a/include/asm-mips/page.h b/include/asm-mips/page.h index 85b258ee709..2f9e1a9ec51 100644 --- a/include/asm-mips/page.h +++ b/include/asm-mips/page.h @@ -34,7 +34,8 @@ #ifndef __ASSEMBLY__ -#include <asm/cpu-features.h> +#include <linux/pfn.h> +#include <asm/io.h> extern void clear_page(void * page); extern void copy_page(void * to, void * from); @@ -59,16 +60,13 @@ static inline void clear_user_page(void *addr, unsigned long vaddr, flush_data_cache_page((unsigned long)addr); } -static inline void copy_user_page(void *vto, void *vfrom, unsigned long vaddr, - struct page *to) -{ - extern void (*flush_data_cache_page)(unsigned long addr); +extern void copy_user_page(void *vto, void *vfrom, unsigned long vaddr, + struct page *to); +struct vm_area_struct; +extern void copy_user_highpage(struct page *to, struct page *from, + unsigned long vaddr, struct vm_area_struct *vma); - copy_page(vto, vfrom); - if (!cpu_has_ic_fills_f_dc || - pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK)) - flush_data_cache_page((unsigned long)vto); -} +#define __HAVE_ARCH_COPY_USER_HIGHPAGE /* * These are used to make use of C type-checking.. @@ -134,8 +132,14 @@ typedef struct { unsigned long pgprot; } pgprot_t; /* to align the pointer to the (next) page boundary */ #define PAGE_ALIGN(addr) (((addr) + PAGE_SIZE - 1) & PAGE_MASK) -#define __pa(x) ((unsigned long) (x) - PAGE_OFFSET) -#define __va(x) ((void *)((unsigned long) (x) + PAGE_OFFSET)) +#if defined(CONFIG_64BIT) && !defined(CONFIG_BUILD_ELF64) +#define __pa_page_offset(x) ((unsigned long)(x) < CKSEG0 ? PAGE_OFFSET : CKSEG0) +#else +#define __pa_page_offset(x) PAGE_OFFSET +#endif +#define __pa(x) ((unsigned long)(x) - __pa_page_offset(x)) +#define __pa_symbol(x) __pa(RELOC_HIDE((unsigned long)(x),0)) +#define __va(x) ((void *)((unsigned long)(x) + PAGE_OFFSET)) #define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) @@ -160,8 +164,8 @@ typedef struct { unsigned long pgprot; } pgprot_t; #endif -#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT) -#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT) +#define virt_to_page(kaddr) pfn_to_page(PFN_DOWN(virt_to_phys(kaddr))) +#define virt_addr_valid(kaddr) pfn_valid(PFN_DOWN(virt_to_phys(kaddr))) #define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \ VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) diff --git a/include/asm-mips/pci.h b/include/asm-mips/pci.h index c4d68bebdca..7f0f120ca07 100644 --- a/include/asm-mips/pci.h +++ b/include/asm-mips/pci.h @@ -187,4 +187,10 @@ static inline void pcibios_add_platform_entries(struct pci_dev *dev) /* Do platform specific device initialization at pci_enable_device() time */ extern int pcibios_plat_dev_init(struct pci_dev *dev); +/* Chances are this interrupt is wired PC-style ... */ +static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel) +{ + return channel ? 15 : 14; +} + #endif /* _ASM_PCI_H */ diff --git a/include/asm-mips/pgtable-32.h b/include/asm-mips/pgtable-32.h index d20f2e9b28b..2fbd47eba32 100644 --- a/include/asm-mips/pgtable-32.h +++ b/include/asm-mips/pgtable-32.h @@ -156,9 +156,9 @@ pfn_pte(unsigned long pfn, pgprot_t prot) #define __pte_offset(address) \ (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)) #define pte_offset(dir, address) \ - ((pte_t *) (pmd_page_vaddr(*dir)) + __pte_offset(address)) -#define pte_offset_kernel(dir, address) \ - ((pte_t *) pmd_page_vaddr(*(dir)) + __pte_offset(address)) + ((pte_t *) pmd_page_vaddr(*(dir)) + __pte_offset(address)) +#define pte_offset_kernel(dir, address) \ + ((pte_t *) pmd_page_vaddr(*(dir)) + __pte_offset(address)) #define pte_offset_map(dir, address) \ ((pte_t *)page_address(pmd_page(*(dir))) + __pte_offset(address)) diff --git a/include/asm-mips/pgtable-64.h b/include/asm-mips/pgtable-64.h index 7e7320300aa..a5b18710b6a 100644 --- a/include/asm-mips/pgtable-64.h +++ b/include/asm-mips/pgtable-64.h @@ -14,6 +14,7 @@ #include <asm/addrspace.h> #include <asm/page.h> #include <asm/cachectl.h> +#include <asm/fixmap.h> #include <asm-generic/pgtable-nopud.h> @@ -103,6 +104,13 @@ #define VMALLOC_START MAP_BASE #define VMALLOC_END \ (VMALLOC_START + PTRS_PER_PGD * PTRS_PER_PMD * PTRS_PER_PTE * PAGE_SIZE) +#if defined(CONFIG_MODULES) && !defined(CONFIG_BUILD_ELF64) && \ + VMALLOC_START != CKSSEG +/* Load modules into 32bit-compatible segment. */ +#define MODULE_START CKSSEG +#define MODULE_END (FIXADDR_START-2*PAGE_SIZE) +extern pgd_t module_pg_dir[PTRS_PER_PGD]; +#endif #define pte_ERROR(e) \ printk("%s:%d: bad pte %016lx.\n", __FILE__, __LINE__, pte_val(e)) @@ -174,7 +182,12 @@ static inline void pud_clear(pud_t *pudp) #define __pmd_offset(address) pmd_index(address) /* to find an entry in a kernel page-table-directory */ +#ifdef MODULE_START +#define pgd_offset_k(address) \ + ((address) >= MODULE_START ? module_pg_dir : pgd_offset(&init_mm, 0UL)) +#else #define pgd_offset_k(address) pgd_offset(&init_mm, 0UL) +#endif #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1)) #define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1)) @@ -199,9 +212,9 @@ static inline pmd_t *pmd_offset(pud_t * pud, unsigned long address) #define __pte_offset(address) \ (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)) #define pte_offset(dir, address) \ - ((pte_t *) (pmd_page_vaddr(*dir)) + __pte_offset(address)) + ((pte_t *) pmd_page_vaddr(*(dir)) + __pte_offset(address)) #define pte_offset_kernel(dir, address) \ - ((pte_t *) pmd_page_vaddr(*(dir)) + __pte_offset(address)) + ((pte_t *) pmd_page_vaddr(*(dir)) + __pte_offset(address)) #define pte_offset_map(dir, address) \ ((pte_t *)page_address(pmd_page(*(dir))) + __pte_offset(address)) #define pte_offset_map_nested(dir, address) \ diff --git a/include/asm-mips/pgtable.h b/include/asm-mips/pgtable.h index 1ca4d1e185c..f2e1325fec6 100644 --- a/include/asm-mips/pgtable.h +++ b/include/asm-mips/pgtable.h @@ -67,7 +67,7 @@ extern unsigned long empty_zero_page; extern unsigned long zero_page_mask; #define ZERO_PAGE(vaddr) \ - (virt_to_page(empty_zero_page + (((unsigned long)(vaddr)) & zero_page_mask))) + (virt_to_page((void *)(empty_zero_page + (((unsigned long)(vaddr)) & zero_page_mask)))) #define __HAVE_ARCH_MOVE_PTE #define move_pte(pte, prot, old_addr, new_addr) \ diff --git a/include/asm-mips/ptrace.h b/include/asm-mips/ptrace.h index 5f3a9075cd2..8a1f2b6f04a 100644 --- a/include/asm-mips/ptrace.h +++ b/include/asm-mips/ptrace.h @@ -80,10 +80,16 @@ struct pt_regs { #define instruction_pointer(regs) ((regs)->cp0_epc) #define profile_pc(regs) instruction_pointer(regs) -extern void show_regs(struct pt_regs *); - extern asmlinkage void do_syscall_trace(struct pt_regs *regs, int entryexit); +extern NORET_TYPE void die(const char *, struct pt_regs *); + +static inline void die_if_kernel(const char *str, struct pt_regs *regs) +{ + if (unlikely(!user_mode(regs))) + die(str, regs); +} + #endif #endif /* _ASM_PTRACE_H */ diff --git a/include/asm-mips/setup.h b/include/asm-mips/setup.h index 737fa4a6912..70009a90263 100644 --- a/include/asm-mips/setup.h +++ b/include/asm-mips/setup.h @@ -1,8 +1,6 @@ -#ifdef __KERNEL__ #ifndef _MIPS_SETUP_H #define _MIPS_SETUP_H #define COMMAND_LINE_SIZE 256 #endif /* __SETUP_H */ -#endif /* __KERNEL__ */ diff --git a/include/asm-mips/sn/arch.h b/include/asm-mips/sn/arch.h index 51174af6ac5..da523de628b 100644 --- a/include/asm-mips/sn/arch.h +++ b/include/asm-mips/sn/arch.h @@ -18,7 +18,6 @@ #endif typedef u64 hubreg_t; -typedef u64 nic_t; #define cputonasid(cpu) (cpu_data[(cpu)].p_nasid) #define cputoslice(cpu) (cpu_data[(cpu)].p_slice) diff --git a/include/asm-mips/sn/klconfig.h b/include/asm-mips/sn/klconfig.h index b63cd0655b3..82aeb9e322d 100644 --- a/include/asm-mips/sn/klconfig.h +++ b/include/asm-mips/sn/klconfig.h @@ -61,6 +61,8 @@ #endif /* CONFIG_SGI_IP35 */ #endif /* CONFIG_SGI_IP27 || CONFIG_SGI_IP35 */ +typedef u64 nic_t; + #define KLCFGINFO_MAGIC 0xbeedbabe typedef s32 klconf_off_t; @@ -176,7 +178,7 @@ typedef struct kl_config_hdr { /* --- New Macros for the changed kl_config_hdr_t structure --- */ #define PTR_CH_MALLOC_HDR(_k) ((klc_malloc_hdr_t *)\ - (unsigned long)_k + (_k->ch_malloc_hdr_off))) + ((unsigned long)_k + (_k->ch_malloc_hdr_off))) #define KL_CONFIG_CH_MALLOC_HDR(_n) PTR_CH_MALLOC_HDR(KL_CONFIG_HDR(_n)) diff --git a/include/asm-mips/spinlock.h b/include/asm-mips/spinlock.h index c8d5587467b..fc3217fc111 100644 --- a/include/asm-mips/spinlock.h +++ b/include/asm-mips/spinlock.h @@ -3,12 +3,13 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (C) 1999, 2000 by Ralf Baechle + * Copyright (C) 1999, 2000, 06 by Ralf Baechle * Copyright (C) 1999, 2000 Silicon Graphics, Inc. */ #ifndef _ASM_SPINLOCK_H #define _ASM_SPINLOCK_H +#include <asm/barrier.h> #include <asm/war.h> /* @@ -40,7 +41,6 @@ static inline void __raw_spin_lock(raw_spinlock_t *lock) " sc %1, %0 \n" " beqzl %1, 1b \n" " nop \n" - " sync \n" " .set reorder \n" : "=m" (lock->lock), "=&r" (tmp) : "m" (lock->lock) @@ -53,19 +53,22 @@ static inline void __raw_spin_lock(raw_spinlock_t *lock) " li %1, 1 \n" " sc %1, %0 \n" " beqz %1, 1b \n" - " sync \n" + " nop \n" " .set reorder \n" : "=m" (lock->lock), "=&r" (tmp) : "m" (lock->lock) : "memory"); } + + smp_mb(); } static inline void __raw_spin_unlock(raw_spinlock_t *lock) { + smp_mb(); + __asm__ __volatile__( " .set noreorder # __raw_spin_unlock \n" - " sync \n" " sw $0, %0 \n" " .set\treorder \n" : "=m" (lock->lock) @@ -86,7 +89,6 @@ static inline unsigned int __raw_spin_trylock(raw_spinlock_t *lock) " beqzl %2, 1b \n" " nop \n" " andi %2, %0, 1 \n" - " sync \n" " .set reorder" : "=&r" (temp), "=m" (lock->lock), "=&r" (res) : "m" (lock->lock) @@ -99,13 +101,14 @@ static inline unsigned int __raw_spin_trylock(raw_spinlock_t *lock) " sc %2, %1 \n" " beqz %2, 1b \n" " andi %2, %0, 1 \n" - " sync \n" " .set reorder" : "=&r" (temp), "=m" (lock->lock), "=&r" (res) : "m" (lock->lock) : "memory"); } + smp_mb(); + return res == 0; } @@ -143,7 +146,6 @@ static inline void __raw_read_lock(raw_rwlock_t *rw) " sc %1, %0 \n" " beqzl %1, 1b \n" " nop \n" - " sync \n" " .set reorder \n" : "=m" (rw->lock), "=&r" (tmp) : "m" (rw->lock) @@ -156,12 +158,14 @@ static inline void __raw_read_lock(raw_rwlock_t *rw) " addu %1, 1 \n" " sc %1, %0 \n" " beqz %1, 1b \n" - " sync \n" + " nop \n" " .set reorder \n" : "=m" (rw->lock), "=&r" (tmp) : "m" (rw->lock) : "memory"); } + + smp_mb(); } /* Note the use of sub, not subu which will make the kernel die with an @@ -171,13 +175,14 @@ static inline void __raw_read_unlock(raw_rwlock_t *rw) { unsigned int tmp; + smp_mb(); + if (R10000_LLSC_WAR) { __asm__ __volatile__( "1: ll %1, %2 # __raw_read_unlock \n" " sub %1, 1 \n" " sc %1, %0 \n" " beqzl %1, 1b \n" - " sync \n" : "=m" (rw->lock), "=&r" (tmp) : "m" (rw->lock) : "memory"); @@ -188,7 +193,7 @@ static inline void __raw_read_unlock(raw_rwlock_t *rw) " sub %1, 1 \n" " sc %1, %0 \n" " beqz %1, 1b \n" - " sync \n" + " nop \n" " .set reorder \n" : "=m" (rw->lock), "=&r" (tmp) : "m" (rw->lock) @@ -208,7 +213,7 @@ static inline void __raw_write_lock(raw_rwlock_t *rw) " lui %1, 0x8000 \n" " sc %1, %0 \n" " beqzl %1, 1b \n" - " sync \n" + " nop \n" " .set reorder \n" : "=m" (rw->lock), "=&r" (tmp) : "m" (rw->lock) @@ -221,18 +226,22 @@ static inline void __raw_write_lock(raw_rwlock_t *rw) " lui %1, 0x8000 \n" " sc %1, %0 \n" " beqz %1, 1b \n" - " sync \n" + " nop \n" " .set reorder \n" : "=m" (rw->lock), "=&r" (tmp) : "m" (rw->lock) : "memory"); } + + smp_mb(); } static inline void __raw_write_unlock(raw_rwlock_t *rw) { + smp_mb(); + __asm__ __volatile__( - " sync # __raw_write_unlock \n" + " # __raw_write_unlock \n" " sw $0, %0 \n" : "=m" (rw->lock) : "m" (rw->lock) @@ -252,11 +261,10 @@ static inline int __raw_read_trylock(raw_rwlock_t *rw) " bnez %1, 2f \n" " addu %1, 1 \n" " sc %1, %0 \n" - " beqzl %1, 1b \n" " .set reorder \n" -#ifdef CONFIG_SMP - " sync \n" -#endif + " beqzl %1, 1b \n" + " nop \n" + __WEAK_ORDERING_MB " li %2, 1 \n" "2: \n" : "=m" (rw->lock), "=&r" (tmp), "=&r" (ret) @@ -271,10 +279,9 @@ static inline int __raw_read_trylock(raw_rwlock_t *rw) " addu %1, 1 \n" " sc %1, %0 \n" " beqz %1, 1b \n" + " nop \n" " .set reorder \n" -#ifdef CONFIG_SMP - " sync \n" -#endif + __WEAK_ORDERING_MB " li %2, 1 \n" "2: \n" : "=m" (rw->lock), "=&r" (tmp), "=&r" (ret) @@ -299,7 +306,8 @@ static inline int __raw_write_trylock(raw_rwlock_t *rw) " lui %1, 0x8000 \n" " sc %1, %0 \n" " beqzl %1, 1b \n" - " sync \n" + " nop \n" + __WEAK_ORDERING_MB " li %2, 1 \n" " .set reorder \n" "2: \n" @@ -315,7 +323,8 @@ static inline int __raw_write_trylock(raw_rwlock_t *rw) " lui %1, 0x8000 \n" " sc %1, %0 \n" " beqz %1, 1b \n" - " sync \n" + " nop \n" + __WEAK_ORDERING_MB " li %2, 1 \n" " .set reorder \n" "2: \n" diff --git a/include/asm-mips/system.h b/include/asm-mips/system.h index 3056feed5a3..5e1289c85ed 100644 --- a/include/asm-mips/system.h +++ b/include/asm-mips/system.h @@ -3,7 +3,7 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (C) 1994, 95, 96, 97, 98, 99, 2003 by Ralf Baechle + * Copyright (C) 1994, 95, 96, 97, 98, 99, 2003, 06 by Ralf Baechle * Copyright (C) 1996 by Paul M. Antoine * Copyright (C) 1999 Silicon Graphics * Kevin D. Kissell, kevink@mips.org and Carsten Langgaard, carstenl@mips.com @@ -16,132 +16,11 @@ #include <linux/irqflags.h> #include <asm/addrspace.h> +#include <asm/barrier.h> #include <asm/cpu-features.h> #include <asm/dsp.h> -#include <asm/ptrace.h> #include <asm/war.h> -/* - * read_barrier_depends - Flush all pending reads that subsequents reads - * depend on. - * - * No data-dependent reads from memory-like regions are ever reordered - * over this barrier. All reads preceding this primitive are guaranteed - * to access memory (but not necessarily other CPUs' caches) before any - * reads following this primitive that depend on the data return by - * any of the preceding reads. This primitive is much lighter weight than - * rmb() on most CPUs, and is never heavier weight than is - * rmb(). - * - * These ordering constraints are respected by both the local CPU - * and the compiler. - * - * Ordering is not guaranteed by anything other than these primitives, - * not even by data dependencies. See the documentation for - * memory_barrier() for examples and URLs to more information. - * - * For example, the following code would force ordering (the initial - * value of "a" is zero, "b" is one, and "p" is "&a"): - * - * <programlisting> - * CPU 0 CPU 1 - * - * b = 2; - * memory_barrier(); - * p = &b; q = p; - * read_barrier_depends(); - * d = *q; - * </programlisting> - * - * because the read of "*q" depends on the read of "p" and these - * two reads are separated by a read_barrier_depends(). However, - * the following code, with the same initial values for "a" and "b": - * - * <programlisting> - * CPU 0 CPU 1 - * - * a = 2; - * memory_barrier(); - * b = 3; y = b; - * read_barrier_depends(); - * x = a; - * </programlisting> - * - * does not enforce ordering, since there is no data dependency between - * the read of "a" and the read of "b". Therefore, on some CPUs, such - * as Alpha, "y" could be set to 3 and "x" to 0. Use rmb() - * in cases like this where there are no data dependencies. - */ - -#define read_barrier_depends() do { } while(0) - -#ifdef CONFIG_CPU_HAS_SYNC -#define __sync() \ - __asm__ __volatile__( \ - ".set push\n\t" \ - ".set noreorder\n\t" \ - ".set mips2\n\t" \ - "sync\n\t" \ - ".set pop" \ - : /* no output */ \ - : /* no input */ \ - : "memory") -#else -#define __sync() do { } while(0) -#endif - -#define __fast_iob() \ - __asm__ __volatile__( \ - ".set push\n\t" \ - ".set noreorder\n\t" \ - "lw $0,%0\n\t" \ - "nop\n\t" \ - ".set pop" \ - : /* no output */ \ - : "m" (*(int *)CKSEG1) \ - : "memory") - -#define fast_wmb() __sync() -#define fast_rmb() __sync() -#define fast_mb() __sync() -#define fast_iob() \ - do { \ - __sync(); \ - __fast_iob(); \ - } while (0) - -#ifdef CONFIG_CPU_HAS_WB - -#include <asm/wbflush.h> - -#define wmb() fast_wmb() -#define rmb() fast_rmb() -#define mb() wbflush() -#define iob() wbflush() - -#else /* !CONFIG_CPU_HAS_WB */ - -#define wmb() fast_wmb() -#define rmb() fast_rmb() -#define mb() fast_mb() -#define iob() fast_iob() - -#endif /* !CONFIG_CPU_HAS_WB */ - -#ifdef CONFIG_SMP -#define smp_mb() mb() -#define smp_rmb() rmb() -#define smp_wmb() wmb() -#define smp_read_barrier_depends() read_barrier_depends() -#else -#define smp_mb() barrier() -#define smp_rmb() barrier() -#define smp_wmb() barrier() -#define smp_read_barrier_depends() do { } while(0) -#endif - -#define set_mb(var, value) \ -do { var = value; mb(); } while (0) /* * switch_to(n) should switch tasks to task nr n, first @@ -217,9 +96,6 @@ static inline unsigned long __xchg_u32(volatile int * m, unsigned int val) " .set mips3 \n" " sc %2, %1 \n" " beqzl %2, 1b \n" -#ifdef CONFIG_SMP - " sync \n" -#endif " .set mips0 \n" : "=&r" (retval), "=m" (*m), "=&r" (dummy) : "R" (*m), "Jr" (val) @@ -235,9 +111,6 @@ static inline unsigned long __xchg_u32(volatile int * m, unsigned int val) " .set mips3 \n" " sc %2, %1 \n" " beqz %2, 1b \n" -#ifdef CONFIG_SMP - " sync \n" -#endif " .set mips0 \n" : "=&r" (retval), "=m" (*m), "=&r" (dummy) : "R" (*m), "Jr" (val) @@ -251,6 +124,8 @@ static inline unsigned long __xchg_u32(volatile int * m, unsigned int val) local_irq_restore(flags); /* implies memory barrier */ } + smp_mb(); + return retval; } @@ -268,9 +143,6 @@ static inline __u64 __xchg_u64(volatile __u64 * m, __u64 val) " move %2, %z4 \n" " scd %2, %1 \n" " beqzl %2, 1b \n" -#ifdef CONFIG_SMP - " sync \n" -#endif " .set mips0 \n" : "=&r" (retval), "=m" (*m), "=&r" (dummy) : "R" (*m), "Jr" (val) @@ -284,9 +156,6 @@ static inline __u64 __xchg_u64(volatile __u64 * m, __u64 val) " move %2, %z4 \n" " scd %2, %1 \n" " beqz %2, 1b \n" -#ifdef CONFIG_SMP - " sync \n" -#endif " .set mips0 \n" : "=&r" (retval), "=m" (*m), "=&r" (dummy) : "R" (*m), "Jr" (val) @@ -300,6 +169,8 @@ static inline __u64 __xchg_u64(volatile __u64 * m, __u64 val) local_irq_restore(flags); /* implies memory barrier */ } + smp_mb(); + return retval; } #else @@ -345,9 +216,6 @@ static inline unsigned long __cmpxchg_u32(volatile int * m, unsigned long old, " .set mips3 \n" " sc $1, %1 \n" " beqzl $1, 1b \n" -#ifdef CONFIG_SMP - " sync \n" -#endif "2: \n" " .set pop \n" : "=&r" (retval), "=R" (*m) @@ -365,9 +233,6 @@ static inline unsigned long __cmpxchg_u32(volatile int * m, unsigned long old, " .set mips3 \n" " sc $1, %1 \n" " beqz $1, 1b \n" -#ifdef CONFIG_SMP - " sync \n" -#endif "2: \n" " .set pop \n" : "=&r" (retval), "=R" (*m) @@ -383,6 +248,8 @@ static inline unsigned long __cmpxchg_u32(volatile int * m, unsigned long old, local_irq_restore(flags); /* implies memory barrier */ } + smp_mb(); + return retval; } @@ -402,9 +269,6 @@ static inline unsigned long __cmpxchg_u64(volatile int * m, unsigned long old, " move $1, %z4 \n" " scd $1, %1 \n" " beqzl $1, 1b \n" -#ifdef CONFIG_SMP - " sync \n" -#endif "2: \n" " .set pop \n" : "=&r" (retval), "=R" (*m) @@ -420,9 +284,6 @@ static inline unsigned long __cmpxchg_u64(volatile int * m, unsigned long old, " move $1, %z4 \n" " scd $1, %1 \n" " beqz $1, 1b \n" -#ifdef CONFIG_SMP - " sync \n" -#endif "2: \n" " .set pop \n" : "=&r" (retval), "=R" (*m) @@ -438,6 +299,8 @@ static inline unsigned long __cmpxchg_u64(volatile int * m, unsigned long old, local_irq_restore(flags); /* implies memory barrier */ } + smp_mb(); + return retval; } #else @@ -472,14 +335,6 @@ extern void *set_except_vector(int n, void *addr); extern unsigned long ebase; extern void per_cpu_trap_init(void); -extern NORET_TYPE void die(const char *, struct pt_regs *); - -static inline void die_if_kernel(const char *str, struct pt_regs *regs) -{ - if (unlikely(!user_mode(regs))) - die(str, regs); -} - extern int stop_a_enabled; /* diff --git a/include/asm-mips/termbits.h b/include/asm-mips/termbits.h index b62ec7c521c..0bbe07b42a0 100644 --- a/include/asm-mips/termbits.h +++ b/include/asm-mips/termbits.h @@ -30,6 +30,17 @@ struct termios { cc_t c_cc[NCCS]; /* control characters */ }; +struct ktermios { + tcflag_t c_iflag; /* input mode flags */ + tcflag_t c_oflag; /* output mode flags */ + tcflag_t c_cflag; /* control mode flags */ + tcflag_t c_lflag; /* local mode flags */ + cc_t c_line; /* line discipline */ + cc_t c_cc[NCCS]; /* control characters */ + speed_t c_ispeed; /* input speed */ + speed_t c_ospeed; /* output speed */ +}; + /* c_cc characters */ #define VINTR 0 /* Interrupt character [ISIG]. */ #define VQUIT 1 /* Quit character [ISIG]. */ diff --git a/include/asm-mips/time.h b/include/asm-mips/time.h index 625acd337bc..a632cef830a 100644 --- a/include/asm-mips/time.h +++ b/include/asm-mips/time.h @@ -21,6 +21,7 @@ #include <linux/ptrace.h> #include <linux/rtc.h> #include <linux/spinlock.h> +#include <linux/clocksource.h> extern spinlock_t rtc_lock; @@ -44,12 +45,10 @@ extern int (*mips_timer_state)(void); extern void (*mips_timer_ack)(void); /* - * High precision timer functions. - * If mips_hpt_read is NULL, an R4k-compatible timer setup is attempted. + * High precision timer clocksource. + * If .read is NULL, an R4k-compatible timer setup is attempted. */ -extern unsigned int (*mips_hpt_read)(void); -extern void (*mips_hpt_init)(void); -extern unsigned int mips_hpt_mask; +extern struct clocksource clocksource_mips; /* * to_tm() converts system time back to (year, mon, day, hour, min, sec). diff --git a/include/asm-mips/types.h b/include/asm-mips/types.h index 2b52e180c6f..63a13c5bd83 100644 --- a/include/asm-mips/types.h +++ b/include/asm-mips/types.h @@ -93,16 +93,6 @@ typedef unsigned long long phys_t; typedef unsigned long phys_t; #endif -#ifdef CONFIG_LBD -typedef u64 sector_t; -#define HAVE_SECTOR_T -#endif - -#ifdef CONFIG_LSF -typedef u64 blkcnt_t; -#define HAVE_BLKCNT_T -#endif - #endif /* __ASSEMBLY__ */ #endif /* __KERNEL__ */ diff --git a/include/asm-mips/unistd.h b/include/asm-mips/unistd.h index ec56aa52f66..696cff39a1d 100644 --- a/include/asm-mips/unistd.h +++ b/include/asm-mips/unistd.h @@ -933,268 +933,6 @@ #ifndef __ASSEMBLY__ -/* XXX - _foo needs to be __foo, while __NR_bar could be _NR_bar. */ -#define _syscall0(type,name) \ -type name(void) \ -{ \ - register unsigned long __a3 asm("$7"); \ - unsigned long __v0; \ - \ - __asm__ volatile ( \ - ".set\tnoreorder\n\t" \ - "li\t$2, %2\t\t\t# " #name "\n\t" \ - "syscall\n\t" \ - "move\t%0, $2\n\t" \ - ".set\treorder" \ - : "=&r" (__v0), "=r" (__a3) \ - : "i" (__NR_##name) \ - : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \ - "memory"); \ - \ - if (__a3 == 0) \ - return (type) __v0; \ - errno = __v0; \ - return (type) -1; \ -} - -/* - * DANGER: This macro isn't usable for the pipe(2) call - * which has a unusual return convention. - */ -#define _syscall1(type,name,atype,a) \ -type name(atype a) \ -{ \ - register unsigned long __a0 asm("$4") = (unsigned long) a; \ - register unsigned long __a3 asm("$7"); \ - unsigned long __v0; \ - \ - __asm__ volatile ( \ - ".set\tnoreorder\n\t" \ - "li\t$2, %3\t\t\t# " #name "\n\t" \ - "syscall\n\t" \ - "move\t%0, $2\n\t" \ - ".set\treorder" \ - : "=&r" (__v0), "=r" (__a3) \ - : "r" (__a0), "i" (__NR_##name) \ - : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \ - "memory"); \ - \ - if (__a3 == 0) \ - return (type) __v0; \ - errno = __v0; \ - return (type) -1; \ -} - -#define _syscall2(type,name,atype,a,btype,b) \ -type name(atype a, btype b) \ -{ \ - register unsigned long __a0 asm("$4") = (unsigned long) a; \ - register unsigned long __a1 asm("$5") = (unsigned long) b; \ - register unsigned long __a3 asm("$7"); \ - unsigned long __v0; \ - \ - __asm__ volatile ( \ - ".set\tnoreorder\n\t" \ - "li\t$2, %4\t\t\t# " #name "\n\t" \ - "syscall\n\t" \ - "move\t%0, $2\n\t" \ - ".set\treorder" \ - : "=&r" (__v0), "=r" (__a3) \ - : "r" (__a0), "r" (__a1), "i" (__NR_##name) \ - : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \ - "memory"); \ - \ - if (__a3 == 0) \ - return (type) __v0; \ - errno = __v0; \ - return (type) -1; \ -} - -#define _syscall3(type,name,atype,a,btype,b,ctype,c) \ -type name(atype a, btype b, ctype c) \ -{ \ - register unsigned long __a0 asm("$4") = (unsigned long) a; \ - register unsigned long __a1 asm("$5") = (unsigned long) b; \ - register unsigned long __a2 asm("$6") = (unsigned long) c; \ - register unsigned long __a3 asm("$7"); \ - unsigned long __v0; \ - \ - __asm__ volatile ( \ - ".set\tnoreorder\n\t" \ - "li\t$2, %5\t\t\t# " #name "\n\t" \ - "syscall\n\t" \ - "move\t%0, $2\n\t" \ - ".set\treorder" \ - : "=&r" (__v0), "=r" (__a3) \ - : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##name) \ - : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \ - "memory"); \ - \ - if (__a3 == 0) \ - return (type) __v0; \ - errno = __v0; \ - return (type) -1; \ -} - -#define _syscall4(type,name,atype,a,btype,b,ctype,c,dtype,d) \ -type name(atype a, btype b, ctype c, dtype d) \ -{ \ - register unsigned long __a0 asm("$4") = (unsigned long) a; \ - register unsigned long __a1 asm("$5") = (unsigned long) b; \ - register unsigned long __a2 asm("$6") = (unsigned long) c; \ - register unsigned long __a3 asm("$7") = (unsigned long) d; \ - unsigned long __v0; \ - \ - __asm__ volatile ( \ - ".set\tnoreorder\n\t" \ - "li\t$2, %5\t\t\t# " #name "\n\t" \ - "syscall\n\t" \ - "move\t%0, $2\n\t" \ - ".set\treorder" \ - : "=&r" (__v0), "+r" (__a3) \ - : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##name) \ - : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \ - "memory"); \ - \ - if (__a3 == 0) \ - return (type) __v0; \ - errno = __v0; \ - return (type) -1; \ -} - -#if (_MIPS_SIM == _MIPS_SIM_ABI32) - -/* - * Using those means your brain needs more than an oil change ;-) - */ - -#define _syscall5(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e) \ -type name(atype a, btype b, ctype c, dtype d, etype e) \ -{ \ - register unsigned long __a0 asm("$4") = (unsigned long) a; \ - register unsigned long __a1 asm("$5") = (unsigned long) b; \ - register unsigned long __a2 asm("$6") = (unsigned long) c; \ - register unsigned long __a3 asm("$7") = (unsigned long) d; \ - unsigned long __v0; \ - \ - __asm__ volatile ( \ - ".set\tnoreorder\n\t" \ - "lw\t$2, %6\n\t" \ - "subu\t$29, 32\n\t" \ - "sw\t$2, 16($29)\n\t" \ - "li\t$2, %5\t\t\t# " #name "\n\t" \ - "syscall\n\t" \ - "move\t%0, $2\n\t" \ - "addiu\t$29, 32\n\t" \ - ".set\treorder" \ - : "=&r" (__v0), "+r" (__a3) \ - : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##name), \ - "m" ((unsigned long)e) \ - : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \ - "memory"); \ - \ - if (__a3 == 0) \ - return (type) __v0; \ - errno = __v0; \ - return (type) -1; \ -} - -#define _syscall6(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e,ftype,f) \ -type name(atype a, btype b, ctype c, dtype d, etype e, ftype f) \ -{ \ - register unsigned long __a0 asm("$4") = (unsigned long) a; \ - register unsigned long __a1 asm("$5") = (unsigned long) b; \ - register unsigned long __a2 asm("$6") = (unsigned long) c; \ - register unsigned long __a3 asm("$7") = (unsigned long) d; \ - unsigned long __v0; \ - \ - __asm__ volatile ( \ - ".set\tnoreorder\n\t" \ - "lw\t$2, %6\n\t" \ - "lw\t$8, %7\n\t" \ - "subu\t$29, 32\n\t" \ - "sw\t$2, 16($29)\n\t" \ - "sw\t$8, 20($29)\n\t" \ - "li\t$2, %5\t\t\t# " #name "\n\t" \ - "syscall\n\t" \ - "move\t%0, $2\n\t" \ - "addiu\t$29, 32\n\t" \ - ".set\treorder" \ - : "=&r" (__v0), "+r" (__a3) \ - : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##name), \ - "m" ((unsigned long)e), "m" ((unsigned long)f) \ - : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \ - "memory"); \ - \ - if (__a3 == 0) \ - return (type) __v0; \ - errno = __v0; \ - return (type) -1; \ -} - -#endif /* (_MIPS_SIM == _MIPS_SIM_ABI32) */ - -#if (_MIPS_SIM == _MIPS_SIM_NABI32) || (_MIPS_SIM == _MIPS_SIM_ABI64) - -#define _syscall5(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e) \ -type name (atype a,btype b,ctype c,dtype d,etype e) \ -{ \ - register unsigned long __a0 asm("$4") = (unsigned long) a; \ - register unsigned long __a1 asm("$5") = (unsigned long) b; \ - register unsigned long __a2 asm("$6") = (unsigned long) c; \ - register unsigned long __a3 asm("$7") = (unsigned long) d; \ - register unsigned long __a4 asm("$8") = (unsigned long) e; \ - unsigned long __v0; \ - \ - __asm__ volatile ( \ - ".set\tnoreorder\n\t" \ - "li\t$2, %6\t\t\t# " #name "\n\t" \ - "syscall\n\t" \ - "move\t%0, $2\n\t" \ - ".set\treorder" \ - : "=&r" (__v0), "+r" (__a3) \ - : "r" (__a0), "r" (__a1), "r" (__a2), "r" (__a4), "i" (__NR_##name) \ - : "$2", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \ - "memory"); \ - \ - if (__a3 == 0) \ - return (type) __v0; \ - errno = __v0; \ - return (type) -1; \ -} - -#define _syscall6(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e,ftype,f) \ -type name (atype a,btype b,ctype c,dtype d,etype e,ftype f) \ -{ \ - register unsigned long __a0 asm("$4") = (unsigned long) a; \ - register unsigned long __a1 asm("$5") = (unsigned long) b; \ - register unsigned long __a2 asm("$6") = (unsigned long) c; \ - register unsigned long __a3 asm("$7") = (unsigned long) d; \ - register unsigned long __a4 asm("$8") = (unsigned long) e; \ - register unsigned long __a5 asm("$9") = (unsigned long) f; \ - unsigned long __v0; \ - \ - __asm__ volatile ( \ - ".set\tnoreorder\n\t" \ - "li\t$2, %7\t\t\t# " #name "\n\t" \ - "syscall\n\t" \ - "move\t%0, $2\n\t" \ - ".set\treorder" \ - : "=&r" (__v0), "+r" (__a3) \ - : "r" (__a0), "r" (__a1), "r" (__a2), "r" (__a4), "r" (__a5), \ - "i" (__NR_##name) \ - : "$2", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \ - "memory"); \ - \ - if (__a3 == 0) \ - return (type) __v0; \ - errno = __v0; \ - return (type) -1; \ -} - -#endif /* (_MIPS_SIM == _MIPS_SIM_NABI32) || (_MIPS_SIM == _MIPS_SIM_ABI64) */ - - #define __ARCH_OMIT_COMPAT_SYS_GETDENTS64 #define __ARCH_WANT_IPC_PARSE_VERSION #define __ARCH_WANT_OLD_READDIR diff --git a/include/asm-mips/war.h b/include/asm-mips/war.h index 3ac146c019c..13a3502eef4 100644 --- a/include/asm-mips/war.h +++ b/include/asm-mips/war.h @@ -76,7 +76,7 @@ /* * But the RM200C seems to have been shipped only with V2.0 R4600s */ -#ifdef CONFIG_SNI_RM200_PCI +#ifdef CONFIG_SNI_RM #define R4600_V2_HIT_CACHEOP_WAR 1 diff --git a/include/asm-parisc/cacheflush.h b/include/asm-parisc/cacheflush.h index 2bc41f2e027..a799dd8ef39 100644 --- a/include/asm-parisc/cacheflush.h +++ b/include/asm-parisc/cacheflush.h @@ -15,6 +15,8 @@ #define flush_cache_mm(mm) flush_cache_all_local() #endif +#define flush_cache_dup_mm(mm) flush_cache_mm(mm) + #define flush_kernel_dcache_range(start,size) \ flush_kernel_dcache_range_asm((start), (start)+(size)); @@ -184,7 +186,7 @@ flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr, unsigned long } static inline void -flush_anon_page(struct page *page, unsigned long vmaddr) +flush_anon_page(struct vm_area_struct *vma, struct page *page, unsigned long vmaddr) { if (PageAnon(page)) flush_user_dcache_page(vmaddr); diff --git a/include/asm-parisc/checksum.h b/include/asm-parisc/checksum.h index 229cb56fdb7..cc3ec1bd891 100644 --- a/include/asm-parisc/checksum.h +++ b/include/asm-parisc/checksum.h @@ -15,7 +15,7 @@ * * it's best to have buff aligned on a 32-bit boundary */ -extern unsigned int csum_partial(const unsigned char *, int, unsigned int); +extern __wsum csum_partial(const void *, int, __wsum); /* * The same as csum_partial, but copies from src while it checksums. @@ -23,15 +23,14 @@ extern unsigned int csum_partial(const unsigned char *, int, unsigned int); * Here even more important to align src and dst on a 32-bit (or even * better 64-bit) boundary */ -extern unsigned int csum_partial_copy_nocheck(const unsigned char *, unsigned char *, - int, unsigned int); +extern __wsum csum_partial_copy_nocheck(const void *, void *, int, __wsum); /* * this is a new version of the above that records errors it finds in *errp, * but continues and zeros the rest of the buffer. */ -extern unsigned int csum_partial_copy_from_user(const unsigned char __user *src, - unsigned char *dst, int len, unsigned int sum, int *errp); +extern __wsum csum_partial_copy_from_user(const void __user *src, + void *dst, int len, __wsum sum, int *errp); /* * Optimized for IP headers, which always checksum on 4 octet boundaries. @@ -39,11 +38,10 @@ extern unsigned int csum_partial_copy_from_user(const unsigned char __user *src, * Written by Randolph Chung <tausq@debian.org>, and then mucked with by * LaMont Jones <lamont@debian.org> */ -static inline unsigned short ip_fast_csum(unsigned char * iph, - unsigned int ihl) { +static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl) +{ unsigned int sum; - __asm__ __volatile__ ( " ldws,ma 4(%1), %0\n" " addib,<= -4, %2, 2f\n" @@ -69,27 +67,27 @@ static inline unsigned short ip_fast_csum(unsigned char * iph, : "1" (iph), "2" (ihl) : "r19", "r20", "r21" ); - return(sum); + return (__force __sum16)sum; } /* * Fold a partial checksum */ -static inline unsigned int csum_fold(unsigned int sum) +static inline __sum16 csum_fold(__wsum csum) { + u32 sum = (__force u32)csum; /* add the swapped two 16-bit halves of sum, a possible carry from adding the two 16-bit halves, will carry from the lower half into the upper half, giving us the correct sum in the upper half. */ sum += (sum << 16) + (sum >> 16); - return (~sum) >> 16; + return (__force __sum16)(~sum >> 16); } -static inline unsigned long csum_tcpudp_nofold(unsigned long saddr, - unsigned long daddr, +static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len, unsigned short proto, - unsigned int sum) + __wsum sum) { __asm__( " add %1, %0, %0\n" @@ -97,19 +95,18 @@ static inline unsigned long csum_tcpudp_nofold(unsigned long saddr, " addc %3, %0, %0\n" " addc %%r0, %0, %0\n" : "=r" (sum) - : "r" (daddr), "r"(saddr), "r"((proto<<16)+len), "0"(sum)); - return sum; + : "r" (daddr), "r"(saddr), "r"(proto+len), "0"(sum)); + return sum; } /* * computes the checksum of the TCP/UDP pseudo-header * returns a 16-bit checksum, already complemented */ -static inline unsigned short int csum_tcpudp_magic(unsigned long saddr, - unsigned long daddr, +static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr, unsigned short len, unsigned short proto, - unsigned int sum) + __wsum sum) { return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum)); } @@ -118,17 +115,17 @@ static inline unsigned short int csum_tcpudp_magic(unsigned long saddr, * this routine is used for miscellaneous IP-like checksums, mainly * in icmp.c */ -static inline unsigned short ip_compute_csum(unsigned char * buf, int len) { +static inline __sum16 ip_compute_csum(const void *buf, int len) +{ return csum_fold (csum_partial(buf, len, 0)); } #define _HAVE_ARCH_IPV6_CSUM -static __inline__ unsigned short int csum_ipv6_magic(struct in6_addr *saddr, - struct in6_addr *daddr, - __u16 len, - unsigned short proto, - unsigned int sum) +static __inline__ __sum16 csum_ipv6_magic(const struct in6_addr *saddr, + const struct in6_addr *daddr, + __u32 len, unsigned short proto, + __wsum sum) { __asm__ __volatile__ ( @@ -193,9 +190,9 @@ static __inline__ unsigned short int csum_ipv6_magic(struct in6_addr *saddr, * Copy and checksum to user */ #define HAVE_CSUM_COPY_USER -static __inline__ unsigned int csum_and_copy_to_user (const unsigned char *src, - unsigned char __user *dst, - int len, int sum, +static __inline__ __wsum csum_and_copy_to_user(const void *src, + void __user *dst, + int len, __wsum sum, int *err_ptr) { /* code stolen from include/asm-mips64 */ @@ -203,7 +200,7 @@ static __inline__ unsigned int csum_and_copy_to_user (const unsigned char *src, if (copy_to_user(dst, src, len)) { *err_ptr = -EFAULT; - return -1; + return (__force __wsum)-1; } return sum; diff --git a/include/asm-parisc/device.h b/include/asm-parisc/device.h new file mode 100644 index 00000000000..d8f9872b0e2 --- /dev/null +++ b/include/asm-parisc/device.h @@ -0,0 +1,7 @@ +/* + * Arch specific extensions to struct device + * + * This file is released under the GPLv2 + */ +#include <asm-generic/device.h> + diff --git a/include/asm-parisc/dma-mapping.h b/include/asm-parisc/dma-mapping.h index 1e387e1dad3..66f0b408c66 100644 --- a/include/asm-parisc/dma-mapping.h +++ b/include/asm-parisc/dma-mapping.h @@ -191,13 +191,13 @@ dma_get_cache_alignment(void) } static inline int -dma_is_consistent(dma_addr_t dma_addr) +dma_is_consistent(struct device *dev, dma_addr_t dma_addr) { return (hppa_dma_ops->dma_sync_single_for_cpu == NULL); } static inline void -dma_cache_sync(void *vaddr, size_t size, +dma_cache_sync(struct device *dev, void *vaddr, size_t size, enum dma_data_direction direction) { if(hppa_dma_ops->dma_sync_single_for_cpu) diff --git a/include/asm-parisc/dma.h b/include/asm-parisc/dma.h index da2cf373e31..31ad0f05af3 100644 --- a/include/asm-parisc/dma.h +++ b/include/asm-parisc/dma.h @@ -17,10 +17,10 @@ /* ** DMA_CHUNK_SIZE is used by the SCSI mid-layer to break up -** (or rather not merge) DMA's into managable chunks. +** (or rather not merge) DMAs into manageable chunks. ** On parisc, this is more of the software/tuning constraint -** rather than the HW. I/O MMU allocation alogorithms can be -** faster with smaller size is (to some degree). +** rather than the HW. I/O MMU allocation algorithms can be +** faster with smaller sizes (to some degree). */ #define DMA_CHUNK_SIZE (BITS_PER_LONG*PAGE_SIZE) diff --git a/include/asm-parisc/futex.h b/include/asm-parisc/futex.h index d84bbb283fd..dbee6e60aa8 100644 --- a/include/asm-parisc/futex.h +++ b/include/asm-parisc/futex.h @@ -21,7 +21,7 @@ futex_atomic_op_inuser (int encoded_op, int __user *uaddr) if (! access_ok (VERIFY_WRITE, uaddr, sizeof(int))) return -EFAULT; - inc_preempt_count(); + pagefault_disable(); switch (op) { case FUTEX_OP_SET: @@ -33,7 +33,7 @@ futex_atomic_op_inuser (int encoded_op, int __user *uaddr) ret = -ENOSYS; } - dec_preempt_count(); + pagefault_enable(); if (!ret) { switch (cmp) { diff --git a/include/asm-parisc/pci.h b/include/asm-parisc/pci.h index 7b8ad118d2f..7b3be9ac0dd 100644 --- a/include/asm-parisc/pci.h +++ b/include/asm-parisc/pci.h @@ -149,7 +149,7 @@ extern int parisc_bus_is_phys; /* in arch/parisc/kernel/setup.c */ /* ** Most PCI devices (eg Tulip, NCR720) also export the same registers ** to both MMIO and I/O port space. Due to poor performance of I/O Port -** access under HP PCI bus adapters, strongly reccomend use of MMIO +** access under HP PCI bus adapters, strongly recommend the use of MMIO ** address space. ** ** While I'm at it more PA programming notes: diff --git a/include/asm-parisc/ropes.h b/include/asm-parisc/ropes.h index 5542dd00472..007a880615e 100644 --- a/include/asm-parisc/ropes.h +++ b/include/asm-parisc/ropes.h @@ -14,7 +14,7 @@ #endif /* -** The number of pdir entries to "free" before issueing +** The number of pdir entries to "free" before issuing ** a read to PCOM register to flush out PCOM writes. ** Interacts with allocation granularity (ie 4 or 8 entries ** allocated and free'd/purged at a time might make this diff --git a/include/asm-parisc/termbits.h b/include/asm-parisc/termbits.h index 372b634892c..a46e299a939 100644 --- a/include/asm-parisc/termbits.h +++ b/include/asm-parisc/termbits.h @@ -17,6 +17,17 @@ struct termios { cc_t c_cc[NCCS]; /* control characters */ }; +struct ktermios { + tcflag_t c_iflag; /* input mode flags */ + tcflag_t c_oflag; /* output mode flags */ + tcflag_t c_cflag; /* control mode flags */ + tcflag_t c_lflag; /* local mode flags */ + cc_t c_line; /* line discipline */ + cc_t c_cc[NCCS]; /* control characters */ + speed_t c_ispeed; /* input speed */ + speed_t c_ospeed; /* output speed */ +}; + /* c_cc characters */ #define VINTR 0 #define VQUIT 1 diff --git a/include/asm-powerpc/Kbuild b/include/asm-powerpc/Kbuild index 9827849953a..703970fb0ec 100644 --- a/include/asm-powerpc/Kbuild +++ b/include/asm-powerpc/Kbuild @@ -36,6 +36,7 @@ unifdef-y += posix_types.h unifdef-y += ptrace.h unifdef-y += seccomp.h unifdef-y += signal.h +unifdef-y += spu_info.h unifdef-y += termios.h unifdef-y += types.h unifdef-y += unistd.h diff --git a/include/asm-powerpc/bitops.h b/include/asm-powerpc/bitops.h index c341063d080..8f757f6246e 100644 --- a/include/asm-powerpc/bitops.h +++ b/include/asm-powerpc/bitops.h @@ -190,7 +190,8 @@ static __inline__ void set_bits(unsigned long mask, unsigned long *addr) * Return the zero-based bit position (LE, not IBM bit numbering) of * the most significant 1-bit in a double word. */ -static __inline__ int __ilog2(unsigned long x) +static __inline__ __attribute__((const)) +int __ilog2(unsigned long x) { int lz; @@ -198,6 +199,24 @@ static __inline__ int __ilog2(unsigned long x) return BITS_PER_LONG - 1 - lz; } +static inline __attribute__((const)) +int __ilog2_u32(u32 n) +{ + int bit; + asm ("cntlzw %0,%1" : "=r" (bit) : "r" (n)); + return 31 - bit; +} + +#ifdef __powerpc64__ +static inline __attribute__((const)) +int __ilog2_u64(u64 n) +{ + int bit; + asm ("cntlzd %0,%1" : "=r" (bit) : "r" (n)); + return 63 - bit; +} +#endif + /* * Determines the bit position of the least significant 0 bit in the * specified double word. The returned bit position will be diff --git a/include/asm-powerpc/bug.h b/include/asm-powerpc/bug.h index 978b2c7e84e..f6fa3947484 100644 --- a/include/asm-powerpc/bug.h +++ b/include/asm-powerpc/bug.h @@ -11,24 +11,48 @@ #define BUG_OPCODE .long 0x00b00b00 /* For asm */ #define BUG_ILLEGAL_INSTR "0x00b00b00" /* For BUG macro */ -#ifndef __ASSEMBLY__ - -struct bug_entry { - unsigned long bug_addr; - long line; - const char *file; - const char *function; -}; - -struct bug_entry *find_bug(unsigned long bugaddr); +#ifdef CONFIG_BUG -/* - * If this bit is set in the line number it means that the trap - * is for WARN_ON rather than BUG or BUG_ON. - */ -#define BUG_WARNING_TRAP 0x1000000 +#ifdef __ASSEMBLY__ +#ifdef CONFIG_DEBUG_BUGVERBOSE +.macro EMIT_BUG_ENTRY addr,file,line,flags + .section __bug_table,"a" +5001: PPC_LONG \addr, 5002f + .short \line, \flags + .org 5001b+BUG_ENTRY_SIZE + .previous + .section .rodata,"a" +5002: .asciz "\file" + .previous +.endm +#else + .macro EMIT_BUG_ENTRY addr,file,line,flags + .section __bug_table,"a" +5001: PPC_LONG \addr + .short \flags + .org 5001b+BUG_ENTRY_SIZE + .previous +.endm +#endif /* verbose */ -#ifdef CONFIG_BUG +#else /* !__ASSEMBLY__ */ +/* _EMIT_BUG_ENTRY expects args %0,%1,%2,%3 to be FILE, LINE, flags and + sizeof(struct bug_entry), respectively */ +#ifdef CONFIG_DEBUG_BUGVERBOSE +#define _EMIT_BUG_ENTRY \ + ".section __bug_table,\"a\"\n" \ + "2:\t" PPC_LONG "1b, %0\n" \ + "\t.short %1, %2\n" \ + ".org 2b+%3\n" \ + ".previous\n" +#else +#define _EMIT_BUG_ENTRY \ + ".section __bug_table,\"a\"\n" \ + "2:\t" PPC_LONG "1b\n" \ + "\t.short %2\n" \ + ".org 2b+%3\n" \ + ".previous\n" +#endif /* * BUG_ON() and WARN_ON() do their best to cooperate with compile-time @@ -36,13 +60,13 @@ struct bug_entry *find_bug(unsigned long bugaddr); * some compiler versions may not produce optimal results. */ -#define BUG() do { \ - __asm__ __volatile__( \ - "1: twi 31,0,0\n" \ - ".section __bug_table,\"a\"\n" \ - "\t"PPC_LONG" 1b,%0,%1,%2\n" \ - ".previous" \ - : : "i" (__LINE__), "i" (__FILE__), "i" (__FUNCTION__)); \ +#define BUG() do { \ + __asm__ __volatile__( \ + "1: twi 31,0,0\n" \ + _EMIT_BUG_ENTRY \ + : : "i" (__FILE__), "i" (__LINE__), \ + "i" (0), "i" (sizeof(struct bug_entry))); \ + for(;;) ; \ } while (0) #define BUG_ON(x) do { \ @@ -51,23 +75,21 @@ struct bug_entry *find_bug(unsigned long bugaddr); BUG(); \ } else { \ __asm__ __volatile__( \ - "1: "PPC_TLNEI" %0,0\n" \ - ".section __bug_table,\"a\"\n" \ - "\t"PPC_LONG" 1b,%1,%2,%3\n" \ - ".previous" \ - : : "r" ((long)(x)), "i" (__LINE__), \ - "i" (__FILE__), "i" (__FUNCTION__)); \ + "1: "PPC_TLNEI" %4,0\n" \ + _EMIT_BUG_ENTRY \ + : : "i" (__FILE__), "i" (__LINE__), "i" (0), \ + "i" (sizeof(struct bug_entry)), \ + "r" ((long)(x))); \ } \ } while (0) #define __WARN() do { \ __asm__ __volatile__( \ "1: twi 31,0,0\n" \ - ".section __bug_table,\"a\"\n" \ - "\t"PPC_LONG" 1b,%0,%1,%2\n" \ - ".previous" \ - : : "i" (__LINE__ + BUG_WARNING_TRAP), \ - "i" (__FILE__), "i" (__FUNCTION__)); \ + _EMIT_BUG_ENTRY \ + : : "i" (__FILE__), "i" (__LINE__), \ + "i" (BUGFLAG_WARNING), \ + "i" (sizeof(struct bug_entry))); \ } while (0) #define WARN_ON(x) ({ \ @@ -77,13 +99,12 @@ struct bug_entry *find_bug(unsigned long bugaddr); __WARN(); \ } else { \ __asm__ __volatile__( \ - "1: "PPC_TLNEI" %0,0\n" \ - ".section __bug_table,\"a\"\n" \ - "\t"PPC_LONG" 1b,%1,%2,%3\n" \ - ".previous" \ - : : "r" (__ret_warn_on), \ - "i" (__LINE__ + BUG_WARNING_TRAP), \ - "i" (__FILE__), "i" (__FUNCTION__)); \ + "1: "PPC_TLNEI" %4,0\n" \ + _EMIT_BUG_ENTRY \ + : : "i" (__FILE__), "i" (__LINE__), \ + "i" (BUGFLAG_WARNING), \ + "i" (sizeof(struct bug_entry)), \ + "r" (__ret_warn_on)); \ } \ unlikely(__ret_warn_on); \ }) @@ -91,8 +112,8 @@ struct bug_entry *find_bug(unsigned long bugaddr); #define HAVE_ARCH_BUG #define HAVE_ARCH_BUG_ON #define HAVE_ARCH_WARN_ON -#endif /* CONFIG_BUG */ #endif /* __ASSEMBLY __ */ +#endif /* CONFIG_BUG */ #include <asm-generic/bug.h> diff --git a/include/asm-powerpc/cacheflush.h b/include/asm-powerpc/cacheflush.h index 8a740c88d93..08e93e78921 100644 --- a/include/asm-powerpc/cacheflush.h +++ b/include/asm-powerpc/cacheflush.h @@ -18,6 +18,7 @@ */ #define flush_cache_all() do { } while (0) #define flush_cache_mm(mm) do { } while (0) +#define flush_cache_dup_mm(mm) do { } while (0) #define flush_cache_range(vma, start, end) do { } while (0) #define flush_cache_page(vma, vmaddr, pfn) do { } while (0) #define flush_icache_page(vma, page) do { } while (0) diff --git a/include/asm-powerpc/cell-pmu.h b/include/asm-powerpc/cell-pmu.h new file mode 100644 index 00000000000..e8c2ebd3ddd --- /dev/null +++ b/include/asm-powerpc/cell-pmu.h @@ -0,0 +1,113 @@ +/* + * Cell Broadband Engine Performance Monitor + * + * (C) Copyright IBM Corporation 2006 + * + * Author: + * David Erb (djerb@us.ibm.com) + * Kevin Corry (kevcorry@us.ibm.com) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef __ASM_CELL_PMU_H__ +#define __ASM_CELL_PMU_H__ + +/* The Cell PMU has four hardware performance counters, which can be + * configured as four 32-bit counters or eight 16-bit counters. + */ +#define NR_PHYS_CTRS 4 +#define NR_CTRS (NR_PHYS_CTRS * 2) + +/* Macros for the pm_control register. */ +#define CBE_PM_16BIT_CTR(ctr) (1 << (24 - ((ctr) & (NR_PHYS_CTRS - 1)))) +#define CBE_PM_ENABLE_PERF_MON 0x80000000 +#define CBE_PM_STOP_AT_MAX 0x40000000 +#define CBE_PM_TRACE_MODE_GET(pm_control) (((pm_control) >> 28) & 0x3) +#define CBE_PM_TRACE_MODE_SET(mode) (((mode) & 0x3) << 28) +#define CBE_PM_COUNT_MODE_SET(count) (((count) & 0x3) << 18) +#define CBE_PM_FREEZE_ALL_CTRS 0x00100000 +#define CBE_PM_ENABLE_EXT_TRACE 0x00008000 + +/* Macros for the trace_address register. */ +#define CBE_PM_TRACE_BUF_FULL 0x00000800 +#define CBE_PM_TRACE_BUF_EMPTY 0x00000400 +#define CBE_PM_TRACE_BUF_DATA_COUNT(ta) ((ta) & 0x3ff) +#define CBE_PM_TRACE_BUF_MAX_COUNT 0x400 + +/* Macros for the pm07_control registers. */ +#define CBE_PM_CTR_INPUT_MUX(pm07_control) (((pm07_control) >> 26) & 0x3f) +#define CBE_PM_CTR_INPUT_CONTROL 0x02000000 +#define CBE_PM_CTR_POLARITY 0x01000000 +#define CBE_PM_CTR_COUNT_CYCLES 0x00800000 +#define CBE_PM_CTR_ENABLE 0x00400000 + +/* Macros for the pm_status register. */ +#define CBE_PM_CTR_OVERFLOW_INTR(ctr) (1 << (31 - ((ctr) & 7))) + +enum pm_reg_name { + group_control, + debug_bus_control, + trace_address, + ext_tr_timer, + pm_status, + pm_control, + pm_interval, + pm_start_stop, +}; + +/* Routines for reading/writing the PMU registers. */ +extern u32 cbe_read_phys_ctr(u32 cpu, u32 phys_ctr); +extern void cbe_write_phys_ctr(u32 cpu, u32 phys_ctr, u32 val); +extern u32 cbe_read_ctr(u32 cpu, u32 ctr); +extern void cbe_write_ctr(u32 cpu, u32 ctr, u32 val); + +extern u32 cbe_read_pm07_control(u32 cpu, u32 ctr); +extern void cbe_write_pm07_control(u32 cpu, u32 ctr, u32 val); +extern u32 cbe_read_pm(u32 cpu, enum pm_reg_name reg); +extern void cbe_write_pm(u32 cpu, enum pm_reg_name reg, u32 val); + +extern u32 cbe_get_ctr_size(u32 cpu, u32 phys_ctr); +extern void cbe_set_ctr_size(u32 cpu, u32 phys_ctr, u32 ctr_size); + +extern void cbe_enable_pm(u32 cpu); +extern void cbe_disable_pm(u32 cpu); + +extern void cbe_read_trace_buffer(u32 cpu, u64 *buf); + +extern void cbe_enable_pm_interrupts(u32 cpu, u32 thread, u32 mask); +extern void cbe_disable_pm_interrupts(u32 cpu); +extern u32 cbe_query_pm_interrupts(u32 cpu); +extern u32 cbe_clear_pm_interrupts(u32 cpu); +extern void cbe_sync_irq(int node); + +/* Utility functions, macros */ +extern u32 cbe_get_hw_thread_id(int cpu); + +#define cbe_cpu_to_node(cpu) ((cpu) >> 1) + +#define CBE_COUNT_SUPERVISOR_MODE 0 +#define CBE_COUNT_HYPERVISOR_MODE 1 +#define CBE_COUNT_PROBLEM_MODE 2 +#define CBE_COUNT_ALL_MODES 3 + +/* Macros for the pm07_control registers. */ +#define PM07_CTR_INPUT_MUX(x) (((x) & 0x3F) << 26) +#define PM07_CTR_INPUT_CONTROL(x) (((x) & 1) << 25) +#define PM07_CTR_POLARITY(x) (((x) & 1) << 24) +#define PM07_CTR_COUNT_CYCLES(x) (((x) & 1) << 23) +#define PM07_CTR_ENABLE(x) (((x) & 1) << 22) + +#endif /* __ASM_CELL_PMU_H__ */ diff --git a/include/asm-powerpc/checksum.h b/include/asm-powerpc/checksum.h index 609ecbbd721..7cdf358337c 100644 --- a/include/asm-powerpc/checksum.h +++ b/include/asm-powerpc/checksum.h @@ -14,17 +14,16 @@ * which always checksum on 4 octet boundaries. ihl is the number * of 32-bit words and is always >= 5. */ -extern unsigned short ip_fast_csum(unsigned char * iph, unsigned int ihl); +extern __sum16 ip_fast_csum(const void *iph, unsigned int ihl); /* * computes the checksum of the TCP/UDP pseudo-header * returns a 16-bit checksum, already complemented */ -extern unsigned short csum_tcpudp_magic(unsigned long saddr, - unsigned long daddr, +extern __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr, unsigned short len, unsigned short proto, - unsigned int sum); + __wsum sum); /* * computes the checksum of a memory block at buff, length len, @@ -38,8 +37,7 @@ extern unsigned short csum_tcpudp_magic(unsigned long saddr, * * it's best to have buff aligned on a 32-bit boundary */ -extern unsigned int csum_partial(const unsigned char * buff, int len, - unsigned int sum); +extern __wsum csum_partial(const void *buff, int len, __wsum sum); /* * Computes the checksum of a memory block at src, length len, @@ -51,20 +49,15 @@ extern unsigned int csum_partial(const unsigned char * buff, int len, * Like csum_partial, this must be called with even lengths, * except for the last fragment. */ -extern unsigned int csum_partial_copy_generic(const char *src, char *dst, - int len, unsigned int sum, +extern __wsum csum_partial_copy_generic(const void *src, void *dst, + int len, __wsum sum, int *src_err, int *dst_err); /* * the same as csum_partial, but copies from src to dst while it * checksums. */ -unsigned int csum_partial_copy_nocheck(const char *src, - char *dst, - int len, - unsigned int sum); - #define csum_partial_copy_from_user(src, dst, len, sum, errp) \ - csum_partial_copy_generic((src), (dst), (len), (sum), (errp), NULL) + csum_partial_copy_generic((__force const void *)(src), (dst), (len), (sum), (errp), NULL) #define csum_partial_copy_nocheck(src, dst, len, sum) \ csum_partial_copy_generic((src), (dst), (len), (sum), NULL, NULL) @@ -74,7 +67,7 @@ unsigned int csum_partial_copy_nocheck(const char *src, * turns a 32-bit partial checksum (e.g. from csum_partial) into a * 1's complement 16-bit checksum. */ -static inline unsigned int csum_fold(unsigned int sum) +static inline __sum16 csum_fold(__wsum sum) { unsigned int tmp; @@ -83,41 +76,32 @@ static inline unsigned int csum_fold(unsigned int sum) /* if there is a carry from adding the two 16-bit halves, it will carry from the lower half into the upper half, giving us the correct sum in the upper half. */ - sum = ~(sum + tmp) >> 16; - return sum; + return (__force __sum16)(~((__force u32)sum + tmp) >> 16); } /* * this routine is used for miscellaneous IP-like checksums, mainly * in icmp.c */ -static inline unsigned short ip_compute_csum(unsigned char * buff, int len) +static inline __sum16 ip_compute_csum(const void *buff, int len) { return csum_fold(csum_partial(buff, len, 0)); } -#ifdef __powerpc64__ -static inline u32 csum_tcpudp_nofold(u32 saddr, - u32 daddr, +static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len, unsigned short proto, - unsigned int sum) + __wsum sum) { - unsigned long s = sum; +#ifdef __powerpc64__ + unsigned long s = (__force u32)sum; - s += saddr; - s += daddr; - s += (proto << 16) + len; + s += (__force u32)saddr; + s += (__force u32)daddr; + s += proto + len; s += (s >> 32); - return (u32) s; -} + return (__force __wsum) s; #else -static inline unsigned long csum_tcpudp_nofold(unsigned long saddr, - unsigned long daddr, - unsigned short len, - unsigned short proto, - unsigned int sum) -{ __asm__("\n\ addc %0,%0,%1 \n\ adde %0,%0,%2 \n\ @@ -125,10 +109,9 @@ static inline unsigned long csum_tcpudp_nofold(unsigned long saddr, addze %0,%0 \n\ " : "=r" (sum) - : "r" (daddr), "r"(saddr), "r"((proto<<16)+len), "0"(sum)); - return sum; -} - + : "r" (daddr), "r"(saddr), "r"(proto + len), "0"(sum)); + return sum; #endif +} #endif /* __KERNEL__ */ #endif diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h index a9a40149a7c..7384b8086b7 100644 --- a/include/asm-powerpc/cputable.h +++ b/include/asm-powerpc/cputable.h @@ -24,6 +24,8 @@ #define PPC_FEATURE_ICACHE_SNOOP 0x00002000 #define PPC_FEATURE_ARCH_2_05 0x00001000 #define PPC_FEATURE_PA6T 0x00000800 +#define PPC_FEATURE_HAS_DFP 0x00000400 +#define PPC_FEATURE_POWER6_EXT 0x00000200 #define PPC_FEATURE_TRUE_LE 0x00000002 #define PPC_FEATURE_PPC_LE 0x00000001 @@ -45,6 +47,7 @@ enum powerpc_oprofile_type { PPC_OPROFILE_POWER4 = 2, PPC_OPROFILE_G4 = 3, PPC_OPROFILE_BOOKE = 4, + PPC_OPROFILE_CELL = 5, }; struct cpu_spec { @@ -91,7 +94,7 @@ extern struct cpu_spec *cur_cpu_spec; extern unsigned int __start___ftr_fixup, __stop___ftr_fixup; -extern struct cpu_spec *identify_cpu(unsigned long offset); +extern struct cpu_spec *identify_cpu(unsigned long offset, unsigned int pvr); extern void do_feature_fixups(unsigned long value, void *fixup_start, void *fixup_end); @@ -123,6 +126,7 @@ extern void do_feature_fixups(unsigned long value, void *fixup_start, #define CPU_FTR_NODSISRALIGN ASM_CONST(0x0000000000100000) #define CPU_FTR_PPC_LE ASM_CONST(0x0000000000200000) #define CPU_FTR_REAL_LE ASM_CONST(0x0000000000400000) +#define CPU_FTR_FPU_UNAVAILABLE ASM_CONST(0x0000000000800000) /* * Add the 64-bit processor unique features in the top half of the word; @@ -148,19 +152,14 @@ extern void do_feature_fixups(unsigned long value, void *fixup_start, #define CPU_FTR_PAUSE_ZERO LONG_ASM_CONST(0x0000200000000000) #define CPU_FTR_PURR LONG_ASM_CONST(0x0000400000000000) #define CPU_FTR_CELL_TB_BUG LONG_ASM_CONST(0x0000800000000000) +#define CPU_FTR_SPURR LONG_ASM_CONST(0x0001000000000000) +#define CPU_FTR_DSCR LONG_ASM_CONST(0x0002000000000000) #ifndef __ASSEMBLY__ -#define CPU_FTR_PPCAS_ARCH_V2_BASE (CPU_FTR_SLB | \ - CPU_FTR_TLBIEL | CPU_FTR_NOEXECUTE | \ - CPU_FTR_NODSISRALIGN) - -/* iSeries doesn't support large pages */ -#ifdef CONFIG_PPC_ISERIES -#define CPU_FTR_PPCAS_ARCH_V2 (CPU_FTR_PPCAS_ARCH_V2_BASE) -#else -#define CPU_FTR_PPCAS_ARCH_V2 (CPU_FTR_PPCAS_ARCH_V2_BASE | CPU_FTR_16M_PAGE) -#endif /* CONFIG_PPC_ISERIES */ +#define CPU_FTR_PPCAS_ARCH_V2 (CPU_FTR_SLB | \ + CPU_FTR_TLBIEL | CPU_FTR_NOEXECUTE | \ + CPU_FTR_NODSISRALIGN | CPU_FTR_16M_PAGE) /* We only set the altivec features if the kernel was compiled with altivec * support @@ -298,6 +297,9 @@ extern void do_feature_fixups(unsigned long value, void *fixup_start, #define CPU_FTRS_E300 (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | \ CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_HAS_HIGH_BATS | \ CPU_FTR_COMMON) +#define CPU_FTRS_E300C2 (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | \ + CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_HAS_HIGH_BATS | \ + CPU_FTR_COMMON | CPU_FTR_FPU_UNAVAILABLE) #define CPU_FTRS_CLASSIC32 (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \ CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE) #define CPU_FTRS_8XX (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB) @@ -311,7 +313,8 @@ extern void do_feature_fixups(unsigned long value, void *fixup_start, #define CPU_FTRS_E500_2 (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \ CPU_FTR_BIG_PHYS | CPU_FTR_NODSISRALIGN) #define CPU_FTRS_GENERIC_32 (CPU_FTR_COMMON | CPU_FTR_NODSISRALIGN) -#ifdef __powerpc64__ + +/* 64-bit CPUs */ #define CPU_FTRS_POWER3 (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \ CPU_FTR_HPTE_TABLE | CPU_FTR_IABR | CPU_FTR_PPC_LE) #define CPU_FTRS_RS64 (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \ @@ -332,7 +335,14 @@ extern void do_feature_fixups(unsigned long value, void *fixup_start, CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ CPU_FTR_MMCRA | CPU_FTR_SMT | \ CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \ - CPU_FTR_PURR | CPU_FTR_CI_LARGE_PAGE | CPU_FTR_REAL_LE) + CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \ + CPU_FTR_DSCR) +#define CPU_FTRS_POWER6X (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \ + CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ + CPU_FTR_MMCRA | CPU_FTR_SMT | \ + CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \ + CPU_FTR_PURR | CPU_FTR_CI_LARGE_PAGE | \ + CPU_FTR_SPURR | CPU_FTR_REAL_LE | CPU_FTR_DSCR) #define CPU_FTRS_CELL (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \ CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \ @@ -343,7 +353,6 @@ extern void do_feature_fixups(unsigned long value, void *fixup_start, CPU_FTR_PURR | CPU_FTR_REAL_LE) #define CPU_FTRS_COMPATIBLE (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \ CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2) -#endif #ifdef __powerpc64__ #define CPU_FTRS_POSSIBLE \ @@ -361,7 +370,8 @@ enum { CPU_FTRS_7450_21 | CPU_FTRS_7450_23 | CPU_FTRS_7455_1 | CPU_FTRS_7455_20 | CPU_FTRS_7455 | CPU_FTRS_7447_10 | CPU_FTRS_7447 | CPU_FTRS_7447A | CPU_FTRS_82XX | - CPU_FTRS_G2_LE | CPU_FTRS_E300 | CPU_FTRS_CLASSIC32 | + CPU_FTRS_G2_LE | CPU_FTRS_E300 | CPU_FTRS_E300C2 | + CPU_FTRS_CLASSIC32 | #else CPU_FTRS_GENERIC_32 | #endif @@ -400,7 +410,8 @@ enum { CPU_FTRS_7450_21 & CPU_FTRS_7450_23 & CPU_FTRS_7455_1 & CPU_FTRS_7455_20 & CPU_FTRS_7455 & CPU_FTRS_7447_10 & CPU_FTRS_7447 & CPU_FTRS_7447A & CPU_FTRS_82XX & - CPU_FTRS_G2_LE & CPU_FTRS_E300 & CPU_FTRS_CLASSIC32 & + CPU_FTRS_G2_LE & CPU_FTRS_E300 & CPU_FTRS_E300C2 & + CPU_FTRS_CLASSIC32 & #else CPU_FTRS_GENERIC_32 & #endif diff --git a/include/asm-powerpc/dbdma.h b/include/asm-powerpc/dbdma.h index 8973565f95d..e23f07e73cb 100644 --- a/include/asm-powerpc/dbdma.h +++ b/include/asm-powerpc/dbdma.h @@ -95,7 +95,13 @@ struct dbdma_cmd { #define DBDMA_DO_STOP(regs) do { \ out_le32(&((regs)->control), (RUN|FLUSH)<<16); \ while(in_le32(&((regs)->status)) & (ACTIVE|FLUSH)) \ - ; \ + ; \ +} while(0) + +#define DBDMA_DO_RESET(regs) do { \ + out_le32(&((regs)->control), (ACTIVE|DEAD|WAKE|FLUSH|PAUSE|RUN)<<16);\ + while(in_le32(&((regs)->status)) & (RUN)) \ + ; \ } while(0) #endif /* _ASM_DBDMA_H_ */ diff --git a/include/asm-powerpc/dcr-mmio.h b/include/asm-powerpc/dcr-mmio.h new file mode 100644 index 00000000000..5dbfca8dde3 --- /dev/null +++ b/include/asm-powerpc/dcr-mmio.h @@ -0,0 +1,51 @@ +/* + * (c) Copyright 2006 Benjamin Herrenschmidt, IBM Corp. + * <benh@kernel.crashing.org> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See + * the GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#ifndef _ASM_POWERPC_DCR_MMIO_H +#define _ASM_POWERPC_DCR_MMIO_H +#ifdef __KERNEL__ + +#include <asm/io.h> + +typedef struct { void __iomem *token; unsigned int stride; } dcr_host_t; + +#define DCR_MAP_OK(host) ((host).token != NULL) + +extern dcr_host_t dcr_map(struct device_node *dev, unsigned int dcr_n, + unsigned int dcr_c); +extern void dcr_unmap(dcr_host_t host, unsigned int dcr_n, unsigned int dcr_c); + +static inline u32 dcr_read(dcr_host_t host, unsigned int dcr_n) +{ + return in_be32(host.token + dcr_n * host.stride); +} + +static inline void dcr_write(dcr_host_t host, unsigned int dcr_n, u32 value) +{ + out_be32(host.token + dcr_n * host.stride, value); +} + +extern u64 of_translate_dcr_address(struct device_node *dev, + unsigned int dcr_n, + unsigned int *stride); + +#endif /* __KERNEL__ */ +#endif /* _ASM_POWERPC_DCR_MMIO_H */ + + diff --git a/include/asm-powerpc/dcr-native.h b/include/asm-powerpc/dcr-native.h new file mode 100644 index 00000000000..d7a1bc1551c --- /dev/null +++ b/include/asm-powerpc/dcr-native.h @@ -0,0 +1,72 @@ +/* + * (c) Copyright 2006 Benjamin Herrenschmidt, IBM Corp. + * <benh@kernel.crashing.org> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See + * the GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#ifndef _ASM_POWERPC_DCR_NATIVE_H +#define _ASM_POWERPC_DCR_NATIVE_H +#ifdef __KERNEL__ +#ifndef __ASSEMBLY__ + +typedef struct {} dcr_host_t; + +#define DCR_MAP_OK(host) (1) + +#define dcr_map(dev, dcr_n, dcr_c) {} +#define dcr_unmap(host, dcr_n, dcr_c) {} +#define dcr_read(host, dcr_n) mfdcr(dcr_n) +#define dcr_write(host, dcr_n, value) mtdcr(dcr_n, value) + +/* Device Control Registers */ +void __mtdcr(int reg, unsigned int val); +unsigned int __mfdcr(int reg); +#define mfdcr(rn) \ + ({unsigned int rval; \ + if (__builtin_constant_p(rn)) \ + asm volatile("mfdcr %0," __stringify(rn) \ + : "=r" (rval)); \ + else \ + rval = __mfdcr(rn); \ + rval;}) + +#define mtdcr(rn, v) \ +do { \ + if (__builtin_constant_p(rn)) \ + asm volatile("mtdcr " __stringify(rn) ",%0" \ + : : "r" (v)); \ + else \ + __mtdcr(rn, v); \ +} while (0) + +/* R/W of indirect DCRs make use of standard naming conventions for DCRs */ +#define mfdcri(base, reg) \ +({ \ + mtdcr(base ## _CFGADDR, base ## _ ## reg); \ + mfdcr(base ## _CFGDATA); \ +}) + +#define mtdcri(base, reg, data) \ +do { \ + mtdcr(base ## _CFGADDR, base ## _ ## reg); \ + mtdcr(base ## _CFGDATA, data); \ +} while (0) + +#endif /* __ASSEMBLY__ */ +#endif /* __KERNEL__ */ +#endif /* _ASM_POWERPC_DCR_NATIVE_H */ + + diff --git a/include/asm-powerpc/dcr.h b/include/asm-powerpc/dcr.h new file mode 100644 index 00000000000..b66c5e6941f --- /dev/null +++ b/include/asm-powerpc/dcr.h @@ -0,0 +1,44 @@ +/* + * (c) Copyright 2006 Benjamin Herrenschmidt, IBM Corp. + * <benh@kernel.crashing.org> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See + * the GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#ifndef _ASM_POWERPC_DCR_H +#define _ASM_POWERPC_DCR_H +#ifdef __KERNEL__ +#ifdef CONFIG_PPC_DCR + +#ifdef CONFIG_PPC_DCR_NATIVE +#include <asm/dcr-native.h> +#else +#include <asm/dcr-mmio.h> +#endif + +/* + * On CONFIG_PPC_MERGE, we have additional helpers to read the DCR + * base from the device-tree + */ +#ifdef CONFIG_PPC_MERGE +extern unsigned int dcr_resource_start(struct device_node *np, + unsigned int index); +extern unsigned int dcr_resource_len(struct device_node *np, + unsigned int index); +#endif /* CONFIG_PPC_MERGE */ + +#endif /* CONFIG_PPC_DCR */ +#endif /* __KERNEL__ */ +#endif /* _ASM_POWERPC_DCR_H */ diff --git a/include/asm-powerpc/device.h b/include/asm-powerpc/device.h new file mode 100644 index 00000000000..228ab2a315b --- /dev/null +++ b/include/asm-powerpc/device.h @@ -0,0 +1,24 @@ +/* + * Arch specific extensions to struct device + * + * This file is released under the GPLv2 + */ +#ifndef _ASM_POWERPC_DEVICE_H +#define _ASM_POWERPC_DEVICE_H + +struct dma_mapping_ops; +struct device_node; + +struct dev_archdata { + /* Optional pointer to an OF device node */ + struct device_node *of_node; + + /* DMA operations on that device */ + struct dma_mapping_ops *dma_ops; + void *dma_data; + + /* NUMA node if applicable */ + int numa_node; +}; + +#endif /* _ASM_POWERPC_DEVICE_H */ diff --git a/include/asm-powerpc/dma-mapping.h b/include/asm-powerpc/dma-mapping.h index 2ab9baf78bb..7c7de87bd8a 100644 --- a/include/asm-powerpc/dma-mapping.h +++ b/include/asm-powerpc/dma-mapping.h @@ -44,26 +44,150 @@ extern void __dma_sync_page(struct page *page, unsigned long offset, #endif /* ! CONFIG_NOT_COHERENT_CACHE */ #ifdef CONFIG_PPC64 +/* + * DMA operations are abstracted for G5 vs. i/pSeries, PCI vs. VIO + */ +struct dma_mapping_ops { + void * (*alloc_coherent)(struct device *dev, size_t size, + dma_addr_t *dma_handle, gfp_t flag); + void (*free_coherent)(struct device *dev, size_t size, + void *vaddr, dma_addr_t dma_handle); + dma_addr_t (*map_single)(struct device *dev, void *ptr, + size_t size, enum dma_data_direction direction); + void (*unmap_single)(struct device *dev, dma_addr_t dma_addr, + size_t size, enum dma_data_direction direction); + int (*map_sg)(struct device *dev, struct scatterlist *sg, + int nents, enum dma_data_direction direction); + void (*unmap_sg)(struct device *dev, struct scatterlist *sg, + int nents, enum dma_data_direction direction); + int (*dma_supported)(struct device *dev, u64 mask); + int (*dac_dma_supported)(struct device *dev, u64 mask); + int (*set_dma_mask)(struct device *dev, u64 dma_mask); +}; + +static inline struct dma_mapping_ops *get_dma_ops(struct device *dev) +{ + /* We don't handle the NULL dev case for ISA for now. We could + * do it via an out of line call but it is not needed for now. The + * only ISA DMA device we support is the floppy and we have a hack + * in the floppy driver directly to get a device for us. + */ + if (unlikely(dev == NULL || dev->archdata.dma_ops == NULL)) + return NULL; + return dev->archdata.dma_ops; +} -extern int dma_supported(struct device *dev, u64 mask); -extern int dma_set_mask(struct device *dev, u64 dma_mask); -extern void *dma_alloc_coherent(struct device *dev, size_t size, - dma_addr_t *dma_handle, gfp_t flag); -extern void dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, - dma_addr_t dma_handle); -extern dma_addr_t dma_map_single(struct device *dev, void *cpu_addr, - size_t size, enum dma_data_direction direction); -extern void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, - size_t size, enum dma_data_direction direction); -extern dma_addr_t dma_map_page(struct device *dev, struct page *page, - unsigned long offset, size_t size, - enum dma_data_direction direction); -extern void dma_unmap_page(struct device *dev, dma_addr_t dma_address, - size_t size, enum dma_data_direction direction); -extern int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, - enum dma_data_direction direction); -extern void dma_unmap_sg(struct device *dev, struct scatterlist *sg, - int nhwentries, enum dma_data_direction direction); +static inline int dma_supported(struct device *dev, u64 mask) +{ + struct dma_mapping_ops *dma_ops = get_dma_ops(dev); + + if (unlikely(dma_ops == NULL)) + return 0; + if (dma_ops->dma_supported == NULL) + return 1; + return dma_ops->dma_supported(dev, mask); +} + +static inline int dma_set_mask(struct device *dev, u64 dma_mask) +{ + struct dma_mapping_ops *dma_ops = get_dma_ops(dev); + + if (unlikely(dma_ops == NULL)) + return -EIO; + if (dma_ops->set_dma_mask != NULL) + return dma_ops->set_dma_mask(dev, dma_mask); + if (!dev->dma_mask || !dma_supported(dev, *dev->dma_mask)) + return -EIO; + *dev->dma_mask = dma_mask; + return 0; +} + +static inline void *dma_alloc_coherent(struct device *dev, size_t size, + dma_addr_t *dma_handle, gfp_t flag) +{ + struct dma_mapping_ops *dma_ops = get_dma_ops(dev); + + BUG_ON(!dma_ops); + return dma_ops->alloc_coherent(dev, size, dma_handle, flag); +} + +static inline void dma_free_coherent(struct device *dev, size_t size, + void *cpu_addr, dma_addr_t dma_handle) +{ + struct dma_mapping_ops *dma_ops = get_dma_ops(dev); + + BUG_ON(!dma_ops); + dma_ops->free_coherent(dev, size, cpu_addr, dma_handle); +} + +static inline dma_addr_t dma_map_single(struct device *dev, void *cpu_addr, + size_t size, + enum dma_data_direction direction) +{ + struct dma_mapping_ops *dma_ops = get_dma_ops(dev); + + BUG_ON(!dma_ops); + return dma_ops->map_single(dev, cpu_addr, size, direction); +} + +static inline void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, + size_t size, + enum dma_data_direction direction) +{ + struct dma_mapping_ops *dma_ops = get_dma_ops(dev); + + BUG_ON(!dma_ops); + dma_ops->unmap_single(dev, dma_addr, size, direction); +} + +static inline dma_addr_t dma_map_page(struct device *dev, struct page *page, + unsigned long offset, size_t size, + enum dma_data_direction direction) +{ + struct dma_mapping_ops *dma_ops = get_dma_ops(dev); + + BUG_ON(!dma_ops); + return dma_ops->map_single(dev, page_address(page) + offset, size, + direction); +} + +static inline void dma_unmap_page(struct device *dev, dma_addr_t dma_address, + size_t size, + enum dma_data_direction direction) +{ + struct dma_mapping_ops *dma_ops = get_dma_ops(dev); + + BUG_ON(!dma_ops); + dma_ops->unmap_single(dev, dma_address, size, direction); +} + +static inline int dma_map_sg(struct device *dev, struct scatterlist *sg, + int nents, enum dma_data_direction direction) +{ + struct dma_mapping_ops *dma_ops = get_dma_ops(dev); + + BUG_ON(!dma_ops); + return dma_ops->map_sg(dev, sg, nents, direction); +} + +static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sg, + int nhwentries, + enum dma_data_direction direction) +{ + struct dma_mapping_ops *dma_ops = get_dma_ops(dev); + + BUG_ON(!dma_ops); + dma_ops->unmap_sg(dev, sg, nhwentries, direction); +} + + +/* + * Available generic sets of operations + */ +extern struct dma_mapping_ops dma_iommu_ops; +extern struct dma_mapping_ops dma_direct_ops; + +extern unsigned long dma_direct_offset; #else /* CONFIG_PPC64 */ @@ -218,9 +342,9 @@ static inline int dma_mapping_error(dma_addr_t dma_addr) #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) #ifdef CONFIG_NOT_COHERENT_CACHE -#define dma_is_consistent(d) (0) +#define dma_is_consistent(d, h) (0) #else -#define dma_is_consistent(d) (1) +#define dma_is_consistent(d, h) (1) #endif static inline int dma_get_cache_alignment(void) @@ -254,32 +378,12 @@ static inline void dma_sync_single_range_for_device(struct device *dev, dma_sync_single_for_device(dev, dma_handle, offset + size, direction); } -static inline void dma_cache_sync(void *vaddr, size_t size, +static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size, enum dma_data_direction direction) { BUG_ON(direction == DMA_NONE); __dma_sync(vaddr, size, (int)direction); } -/* - * DMA operations are abstracted for G5 vs. i/pSeries, PCI vs. VIO - */ -struct dma_mapping_ops { - void * (*alloc_coherent)(struct device *dev, size_t size, - dma_addr_t *dma_handle, gfp_t flag); - void (*free_coherent)(struct device *dev, size_t size, - void *vaddr, dma_addr_t dma_handle); - dma_addr_t (*map_single)(struct device *dev, void *ptr, - size_t size, enum dma_data_direction direction); - void (*unmap_single)(struct device *dev, dma_addr_t dma_addr, - size_t size, enum dma_data_direction direction); - int (*map_sg)(struct device *dev, struct scatterlist *sg, - int nents, enum dma_data_direction direction); - void (*unmap_sg)(struct device *dev, struct scatterlist *sg, - int nents, enum dma_data_direction direction); - int (*dma_supported)(struct device *dev, u64 mask); - int (*dac_dma_supported)(struct device *dev, u64 mask); -}; - #endif /* __KERNEL__ */ #endif /* _ASM_DMA_MAPPING_H */ diff --git a/include/asm-powerpc/eeh.h b/include/asm-powerpc/eeh.h index 6a784396660..b886bec6701 100644 --- a/include/asm-powerpc/eeh.h +++ b/include/asm-powerpc/eeh.h @@ -120,10 +120,6 @@ static inline u8 eeh_readb(const volatile void __iomem *addr) return eeh_check_failure(addr, val); return val; } -static inline void eeh_writeb(u8 val, volatile void __iomem *addr) -{ - out_8(addr, val); -} static inline u16 eeh_readw(const volatile void __iomem *addr) { @@ -132,21 +128,6 @@ static inline u16 eeh_readw(const volatile void __iomem *addr) return eeh_check_failure(addr, val); return val; } -static inline void eeh_writew(u16 val, volatile void __iomem *addr) -{ - out_le16(addr, val); -} -static inline u16 eeh_raw_readw(const volatile void __iomem *addr) -{ - u16 val = in_be16(addr); - if (EEH_POSSIBLE_ERROR(val, u16)) - return eeh_check_failure(addr, val); - return val; -} -static inline void eeh_raw_writew(u16 val, volatile void __iomem *addr) { - volatile u16 __iomem *vaddr = (volatile u16 __iomem *) addr; - out_be16(vaddr, val); -} static inline u32 eeh_readl(const volatile void __iomem *addr) { @@ -155,205 +136,75 @@ static inline u32 eeh_readl(const volatile void __iomem *addr) return eeh_check_failure(addr, val); return val; } -static inline void eeh_writel(u32 val, volatile void __iomem *addr) -{ - out_le32(addr, val); -} -static inline u32 eeh_raw_readl(const volatile void __iomem *addr) + +static inline u64 eeh_readq(const volatile void __iomem *addr) { - u32 val = in_be32(addr); - if (EEH_POSSIBLE_ERROR(val, u32)) + u64 val = in_le64(addr); + if (EEH_POSSIBLE_ERROR(val, u64)) return eeh_check_failure(addr, val); return val; } -static inline void eeh_raw_writel(u32 val, volatile void __iomem *addr) -{ - out_be32(addr, val); -} -static inline u64 eeh_readq(const volatile void __iomem *addr) +static inline u16 eeh_readw_be(const volatile void __iomem *addr) { - u64 val = in_le64(addr); - if (EEH_POSSIBLE_ERROR(val, u64)) + u16 val = in_be16(addr); + if (EEH_POSSIBLE_ERROR(val, u16)) return eeh_check_failure(addr, val); return val; } -static inline void eeh_writeq(u64 val, volatile void __iomem *addr) + +static inline u32 eeh_readl_be(const volatile void __iomem *addr) { - out_le64(addr, val); + u32 val = in_be32(addr); + if (EEH_POSSIBLE_ERROR(val, u32)) + return eeh_check_failure(addr, val); + return val; } -static inline u64 eeh_raw_readq(const volatile void __iomem *addr) + +static inline u64 eeh_readq_be(const volatile void __iomem *addr) { u64 val = in_be64(addr); if (EEH_POSSIBLE_ERROR(val, u64)) return eeh_check_failure(addr, val); return val; } -static inline void eeh_raw_writeq(u64 val, volatile void __iomem *addr) -{ - out_be64(addr, val); -} - -#define EEH_CHECK_ALIGN(v,a) \ - ((((unsigned long)(v)) & ((a) - 1)) == 0) -static inline void eeh_memset_io(volatile void __iomem *addr, int c, - unsigned long n) -{ - void *p = (void __force *)addr; - u32 lc = c; - lc |= lc << 8; - lc |= lc << 16; - - __asm__ __volatile__ ("sync" : : : "memory"); - while(n && !EEH_CHECK_ALIGN(p, 4)) { - *((volatile u8 *)p) = c; - p++; - n--; - } - while(n >= 4) { - *((volatile u32 *)p) = lc; - p += 4; - n -= 4; - } - while(n) { - *((volatile u8 *)p) = c; - p++; - n--; - } - __asm__ __volatile__ ("sync" : : : "memory"); -} -static inline void eeh_memcpy_fromio(void *dest, const volatile void __iomem *src, +static inline void eeh_memcpy_fromio(void *dest, const + volatile void __iomem *src, unsigned long n) { - void *vsrc = (void __force *) src; - void *destsave = dest; - unsigned long nsave = n; - - __asm__ __volatile__ ("sync" : : : "memory"); - while(n && (!EEH_CHECK_ALIGN(vsrc, 4) || !EEH_CHECK_ALIGN(dest, 4))) { - *((u8 *)dest) = *((volatile u8 *)vsrc); - __asm__ __volatile__ ("eieio" : : : "memory"); - vsrc++; - dest++; - n--; - } - while(n > 4) { - *((u32 *)dest) = *((volatile u32 *)vsrc); - __asm__ __volatile__ ("eieio" : : : "memory"); - vsrc += 4; - dest += 4; - n -= 4; - } - while(n) { - *((u8 *)dest) = *((volatile u8 *)vsrc); - __asm__ __volatile__ ("eieio" : : : "memory"); - vsrc++; - dest++; - n--; - } - __asm__ __volatile__ ("sync" : : : "memory"); + _memcpy_fromio(dest, src, n); /* Look for ffff's here at dest[n]. Assume that at least 4 bytes * were copied. Check all four bytes. */ - if ((nsave >= 4) && - (EEH_POSSIBLE_ERROR((*((u32 *) destsave+nsave-4)), u32))) { - eeh_check_failure(src, (*((u32 *) destsave+nsave-4))); - } -} - -static inline void eeh_memcpy_toio(volatile void __iomem *dest, const void *src, - unsigned long n) -{ - void *vdest = (void __force *) dest; - - __asm__ __volatile__ ("sync" : : : "memory"); - while(n && (!EEH_CHECK_ALIGN(vdest, 4) || !EEH_CHECK_ALIGN(src, 4))) { - *((volatile u8 *)vdest) = *((u8 *)src); - src++; - vdest++; - n--; - } - while(n > 4) { - *((volatile u32 *)vdest) = *((volatile u32 *)src); - src += 4; - vdest += 4; - n-=4; - } - while(n) { - *((volatile u8 *)vdest) = *((u8 *)src); - src++; - vdest++; - n--; - } - __asm__ __volatile__ ("sync" : : : "memory"); -} - -#undef EEH_CHECK_ALIGN - -static inline u8 eeh_inb(unsigned long port) -{ - u8 val; - val = in_8((u8 __iomem *)(port+pci_io_base)); - if (EEH_POSSIBLE_ERROR(val, u8)) - return eeh_check_failure((void __iomem *)(port), val); - return val; -} - -static inline void eeh_outb(u8 val, unsigned long port) -{ - out_8((u8 __iomem *)(port+pci_io_base), val); -} - -static inline u16 eeh_inw(unsigned long port) -{ - u16 val; - val = in_le16((u16 __iomem *)(port+pci_io_base)); - if (EEH_POSSIBLE_ERROR(val, u16)) - return eeh_check_failure((void __iomem *)(port), val); - return val; -} - -static inline void eeh_outw(u16 val, unsigned long port) -{ - out_le16((u16 __iomem *)(port+pci_io_base), val); -} - -static inline u32 eeh_inl(unsigned long port) -{ - u32 val; - val = in_le32((u32 __iomem *)(port+pci_io_base)); - if (EEH_POSSIBLE_ERROR(val, u32)) - return eeh_check_failure((void __iomem *)(port), val); - return val; -} - -static inline void eeh_outl(u32 val, unsigned long port) -{ - out_le32((u32 __iomem *)(port+pci_io_base), val); + if (n >= 4 && EEH_POSSIBLE_ERROR(*((u32 *)(dest + n - 4)), u32)) + eeh_check_failure(src, *((u32 *)(dest + n - 4))); } /* in-string eeh macros */ -static inline void eeh_insb(unsigned long port, void * buf, int ns) +static inline void eeh_readsb(const volatile void __iomem *addr, void * buf, + int ns) { - _insb((u8 __iomem *)(port+pci_io_base), buf, ns); + _insb(addr, buf, ns); if (EEH_POSSIBLE_ERROR((*(((u8*)buf)+ns-1)), u8)) - eeh_check_failure((void __iomem *)(port), *(u8*)buf); + eeh_check_failure(addr, *(u8*)buf); } -static inline void eeh_insw_ns(unsigned long port, void * buf, int ns) +static inline void eeh_readsw(const volatile void __iomem *addr, void * buf, + int ns) { - _insw_ns((u16 __iomem *)(port+pci_io_base), buf, ns); + _insw(addr, buf, ns); if (EEH_POSSIBLE_ERROR((*(((u16*)buf)+ns-1)), u16)) - eeh_check_failure((void __iomem *)(port), *(u16*)buf); + eeh_check_failure(addr, *(u16*)buf); } -static inline void eeh_insl_ns(unsigned long port, void * buf, int nl) +static inline void eeh_readsl(const volatile void __iomem *addr, void * buf, + int nl) { - _insl_ns((u32 __iomem *)(port+pci_io_base), buf, nl); + _insl(addr, buf, nl); if (EEH_POSSIBLE_ERROR((*(((u32*)buf)+nl-1)), u32)) - eeh_check_failure((void __iomem *)(port), *(u32*)buf); + eeh_check_failure(addr, *(u32*)buf); } #endif /* __KERNEL__ */ diff --git a/include/asm-powerpc/elf.h b/include/asm-powerpc/elf.h index 9a83a987d39..d36426c01b6 100644 --- a/include/asm-powerpc/elf.h +++ b/include/asm-powerpc/elf.h @@ -124,12 +124,10 @@ typedef elf_greg_t32 elf_gregset_t32[ELF_NGREG]; # define ELF_DATA ELFDATA2MSB typedef elf_greg_t64 elf_greg_t; typedef elf_gregset_t64 elf_gregset_t; -# define elf_addr_t unsigned long #else /* Assumption: ELF_ARCH == EM_PPC and ELF_CLASS == ELFCLASS32 */ typedef elf_greg_t32 elf_greg_t; typedef elf_gregset_t32 elf_gregset_t; -# define elf_addr_t __u32 #endif /* ELF_ARCH */ /* Floating point registers */ @@ -411,4 +409,17 @@ do { \ /* Keep this the last entry. */ #define R_PPC64_NUM 107 +#ifdef CONFIG_SPU_BASE +/* Notes used in ET_CORE. Note name is "SPU/<fd>/<filename>". */ +#define NT_SPU 1 + +extern int arch_notes_size(void); +extern void arch_write_notes(struct file *file); + +#define ELF_CORE_EXTRA_NOTES_SIZE arch_notes_size() +#define ELF_CORE_WRITE_EXTRA_NOTES arch_write_notes(file) + +#define ARCH_HAVE_EXTRA_ELF_NOTES +#endif /* CONFIG_PPC_CELL */ + #endif /* _ASM_POWERPC_ELF_H */ diff --git a/include/asm-powerpc/firmware.h b/include/asm-powerpc/firmware.h index fdf9aff7115..98f7b62422c 100644 --- a/include/asm-powerpc/firmware.h +++ b/include/asm-powerpc/firmware.h @@ -42,6 +42,7 @@ #define FW_FEATURE_SPLPAR ASM_CONST(0x0000000000100000) #define FW_FEATURE_ISERIES ASM_CONST(0x0000000000200000) #define FW_FEATURE_LPAR ASM_CONST(0x0000000000400000) +#define FW_FEATURE_PS3_LV1 ASM_CONST(0x0000000000800000) #ifndef __ASSEMBLY__ @@ -58,6 +59,10 @@ enum { FW_FEATURE_PSERIES_ALWAYS = 0, FW_FEATURE_ISERIES_POSSIBLE = FW_FEATURE_ISERIES | FW_FEATURE_LPAR, FW_FEATURE_ISERIES_ALWAYS = FW_FEATURE_ISERIES | FW_FEATURE_LPAR, + FW_FEATURE_PS3_POSSIBLE = FW_FEATURE_LPAR | FW_FEATURE_PS3_LV1, + FW_FEATURE_PS3_ALWAYS = FW_FEATURE_LPAR | FW_FEATURE_PS3_LV1, + FW_FEATURE_NATIVE_POSSIBLE = 0, + FW_FEATURE_NATIVE_ALWAYS = 0, FW_FEATURE_POSSIBLE = #ifdef CONFIG_PPC_PSERIES FW_FEATURE_PSERIES_POSSIBLE | @@ -65,6 +70,12 @@ enum { #ifdef CONFIG_PPC_ISERIES FW_FEATURE_ISERIES_POSSIBLE | #endif +#ifdef CONFIG_PPC_PS3 + FW_FEATURE_PS3_POSSIBLE | +#endif +#ifdef CONFIG_PPC_NATIVE + FW_FEATURE_NATIVE_ALWAYS | +#endif 0, FW_FEATURE_ALWAYS = #ifdef CONFIG_PPC_PSERIES @@ -73,6 +84,12 @@ enum { #ifdef CONFIG_PPC_ISERIES FW_FEATURE_ISERIES_ALWAYS & #endif +#ifdef CONFIG_PPC_PS3 + FW_FEATURE_PS3_ALWAYS & +#endif +#ifdef CONFIG_PPC_NATIVE + FW_FEATURE_NATIVE_ALWAYS & +#endif FW_FEATURE_POSSIBLE, #else /* CONFIG_PPC64 */ diff --git a/include/asm-powerpc/futex.h b/include/asm-powerpc/futex.h index 936422e5489..3f3673fd3ff 100644 --- a/include/asm-powerpc/futex.h +++ b/include/asm-powerpc/futex.h @@ -43,7 +43,7 @@ static inline int futex_atomic_op_inuser (int encoded_op, int __user *uaddr) if (! access_ok (VERIFY_WRITE, uaddr, sizeof(int))) return -EFAULT; - inc_preempt_count(); + pagefault_disable(); switch (op) { case FUTEX_OP_SET: @@ -65,7 +65,7 @@ static inline int futex_atomic_op_inuser (int encoded_op, int __user *uaddr) ret = -ENOSYS; } - dec_preempt_count(); + pagefault_enable(); if (!ret) { switch (cmp) { diff --git a/include/asm-powerpc/hvcall.h b/include/asm-powerpc/hvcall.h index 257d1cecb8c..7a500732b67 100644 --- a/include/asm-powerpc/hvcall.h +++ b/include/asm-powerpc/hvcall.h @@ -252,8 +252,6 @@ struct hcall_stats { unsigned long tb_total; /* total wall time (mftb) of calls. */ unsigned long purr_total; /* total cpu time (PURR) of calls. */ }; -void update_hcall_stats(unsigned long opcode, unsigned long tb_delta, - unsigned long purr_delta); #define HCALL_STAT_ARRAY_SIZE ((MAX_HCALL_OPCODE >> 2) + 1) #endif /* __ASSEMBLY__ */ diff --git a/include/asm-powerpc/hw_irq.h b/include/asm-powerpc/hw_irq.h index d40359204ab..9e4dd98eb22 100644 --- a/include/asm-powerpc/hw_irq.h +++ b/include/asm-powerpc/hw_irq.h @@ -7,16 +7,40 @@ #ifdef __KERNEL__ #include <linux/errno.h> +#include <linux/compiler.h> #include <asm/ptrace.h> #include <asm/processor.h> extern void timer_interrupt(struct pt_regs *); -#ifdef CONFIG_PPC_ISERIES +#ifdef CONFIG_PPC64 +#include <asm/paca.h> + +static inline unsigned long local_get_flags(void) +{ + unsigned long flags; + + __asm__ __volatile__("lbz %0,%1(13)" + : "=r" (flags) + : "i" (offsetof(struct paca_struct, soft_enabled))); + + return flags; +} + +static inline unsigned long local_irq_disable(void) +{ + unsigned long flags, zero; + + __asm__ __volatile__("li %1,0; lbz %0,%2(13); stb %1,%2(13)" + : "=r" (flags), "=&r" (zero) + : "i" (offsetof(struct paca_struct, soft_enabled)) + : "memory"); + + return flags; +} -extern unsigned long local_get_flags(void); -extern unsigned long local_irq_disable(void); extern void local_irq_restore(unsigned long); +extern void iseries_handle_interrupts(void); #define local_irq_enable() local_irq_restore(1) #define local_save_flags(flags) ((flags) = local_get_flags()) @@ -24,17 +48,14 @@ extern void local_irq_restore(unsigned long); #define irqs_disabled() (local_get_flags() == 0) +#define hard_irq_enable() __mtmsrd(mfmsr() | MSR_EE, 1) +#define hard_irq_disable() __mtmsrd(mfmsr() & ~MSR_EE, 1) + #else #if defined(CONFIG_BOOKE) #define SET_MSR_EE(x) mtmsr(x) #define local_irq_restore(flags) __asm__ __volatile__("wrtee %0" : : "r" (flags) : "memory") -#elif defined(__powerpc64__) -#define SET_MSR_EE(x) __mtmsrd(x, 1) -#define local_irq_restore(flags) do { \ - __asm__ __volatile__("": : :"memory"); \ - __mtmsrd((flags), 1); \ -} while(0) #else #define SET_MSR_EE(x) mtmsr(x) #define local_irq_restore(flags) mtmsr(flags) @@ -81,26 +102,10 @@ static inline void local_irq_save_ptr(unsigned long *flags) #define local_irq_save(flags) local_irq_save_ptr(&flags) #define irqs_disabled() ((mfmsr() & MSR_EE) == 0) -#endif /* CONFIG_PPC_ISERIES */ - -#define mask_irq(irq) \ - ({ \ - irq_desc_t *desc = get_irq_desc(irq); \ - if (desc->chip && desc->chip->disable) \ - desc->chip->disable(irq); \ - }) -#define unmask_irq(irq) \ - ({ \ - irq_desc_t *desc = get_irq_desc(irq); \ - if (desc->chip && desc->chip->enable) \ - desc->chip->enable(irq); \ - }) -#define ack_irq(irq) \ - ({ \ - irq_desc_t *desc = get_irq_desc(irq); \ - if (desc->chip && desc->chip->ack) \ - desc->chip->ack(irq); \ - }) +#define hard_irq_enable() local_irq_enable() +#define hard_irq_disable() local_irq_disable() + +#endif /* CONFIG_PPC64 */ /* * interrupt-retrigger: should we handle this via lost interrupts and IPIs diff --git a/include/asm-powerpc/ibmebus.h b/include/asm-powerpc/ibmebus.h index 3493429b70f..66112114b8c 100644 --- a/include/asm-powerpc/ibmebus.h +++ b/include/asm-powerpc/ibmebus.h @@ -44,7 +44,6 @@ #include <linux/mod_devicetable.h> #include <asm/of_device.h> -extern struct dma_mapping_ops ibmebus_dma_ops; extern struct bus_type ibmebus_bus_type; struct ibmebus_dev { diff --git a/include/asm-powerpc/ide.h b/include/asm-powerpc/ide.h index c8390f9485d..0f66f0f82c3 100644 --- a/include/asm-powerpc/ide.h +++ b/include/asm-powerpc/ide.h @@ -22,10 +22,10 @@ #endif #endif -#define __ide_mm_insw(p, a, c) _insw_ns((volatile u16 __iomem *)(p), (a), (c)) -#define __ide_mm_insl(p, a, c) _insl_ns((volatile u32 __iomem *)(p), (a), (c)) -#define __ide_mm_outsw(p, a, c) _outsw_ns((volatile u16 __iomem *)(p), (a), (c)) -#define __ide_mm_outsl(p, a, c) _outsl_ns((volatile u32 __iomem *)(p), (a), (c)) +#define __ide_mm_insw(p, a, c) readsw((void __iomem *)(p), (a), (c)) +#define __ide_mm_insl(p, a, c) readsl((void __iomem *)(p), (a), (c)) +#define __ide_mm_outsw(p, a, c) writesw((void __iomem *)(p), (a), (c)) +#define __ide_mm_outsl(p, a, c) writesl((void __iomem *)(p), (a), (c)) #ifndef __powerpc64__ #include <linux/hdreg.h> diff --git a/include/asm-powerpc/immap_qe.h b/include/asm-powerpc/immap_qe.h index ce12f85fff9..9fdd0491f6a 100644 --- a/include/asm-powerpc/immap_qe.h +++ b/include/asm-powerpc/immap_qe.h @@ -136,22 +136,7 @@ struct qe_timers { /* BRG */ struct qe_brg { - __be32 brgc1; /* BRG1 configuration register */ - __be32 brgc2; /* BRG2 configuration register */ - __be32 brgc3; /* BRG3 configuration register */ - __be32 brgc4; /* BRG4 configuration register */ - __be32 brgc5; /* BRG5 configuration register */ - __be32 brgc6; /* BRG6 configuration register */ - __be32 brgc7; /* BRG7 configuration register */ - __be32 brgc8; /* BRG8 configuration register */ - __be32 brgc9; /* BRG9 configuration register */ - __be32 brgc10; /* BRG10 configuration register */ - __be32 brgc11; /* BRG11 configuration register */ - __be32 brgc12; /* BRG12 configuration register */ - __be32 brgc13; /* BRG13 configuration register */ - __be32 brgc14; /* BRG14 configuration register */ - __be32 brgc15; /* BRG15 configuration register */ - __be32 brgc16; /* BRG16 configuration register */ + __be32 brgc[16]; /* BRG configuration registers */ u8 res0[0x40]; } __attribute__ ((packed)); diff --git a/include/asm-powerpc/io-defs.h b/include/asm-powerpc/io-defs.h new file mode 100644 index 00000000000..03691ab6921 --- /dev/null +++ b/include/asm-powerpc/io-defs.h @@ -0,0 +1,59 @@ +/* This file is meant to be include multiple times by other headers */ + +DEF_PCI_AC_RET(readb, u8, (const PCI_IO_ADDR addr), (addr)) +DEF_PCI_AC_RET(readw, u16, (const PCI_IO_ADDR addr), (addr)) +DEF_PCI_AC_RET(readl, u32, (const PCI_IO_ADDR addr), (addr)) +DEF_PCI_AC_RET(readw_be, u16, (const PCI_IO_ADDR addr), (addr)) +DEF_PCI_AC_RET(readl_be, u32, (const PCI_IO_ADDR addr), (addr)) +DEF_PCI_AC_NORET(writeb, (u8 val, PCI_IO_ADDR addr), (val, addr)) +DEF_PCI_AC_NORET(writew, (u16 val, PCI_IO_ADDR addr), (val, addr)) +DEF_PCI_AC_NORET(writel, (u32 val, PCI_IO_ADDR addr), (val, addr)) +DEF_PCI_AC_NORET(writew_be, (u16 val, PCI_IO_ADDR addr), (val, addr)) +DEF_PCI_AC_NORET(writel_be, (u32 val, PCI_IO_ADDR addr), (val, addr)) + +#ifdef __powerpc64__ +DEF_PCI_AC_RET(readq, u64, (const PCI_IO_ADDR addr), (addr)) +DEF_PCI_AC_RET(readq_be, u64, (const PCI_IO_ADDR addr), (addr)) +DEF_PCI_AC_NORET(writeq, (u64 val, PCI_IO_ADDR addr), (val, addr)) +DEF_PCI_AC_NORET(writeq_be, (u64 val, PCI_IO_ADDR addr), (val, addr)) +#endif /* __powerpc64__ */ + +DEF_PCI_AC_RET(inb, u8, (unsigned long port), (port)) +DEF_PCI_AC_RET(inw, u16, (unsigned long port), (port)) +DEF_PCI_AC_RET(inl, u32, (unsigned long port), (port)) +DEF_PCI_AC_NORET(outb, (u8 val, unsigned long port), (val, port)) +DEF_PCI_AC_NORET(outw, (u16 val, unsigned long port), (val, port)) +DEF_PCI_AC_NORET(outl, (u32 val, unsigned long port), (val, port)) + +DEF_PCI_AC_NORET(readsb, (const PCI_IO_ADDR a, void *b, unsigned long c), \ + (a, b, c)) +DEF_PCI_AC_NORET(readsw, (const PCI_IO_ADDR a, void *b, unsigned long c), \ + (a, b, c)) +DEF_PCI_AC_NORET(readsl, (const PCI_IO_ADDR a, void *b, unsigned long c), \ + (a, b, c)) +DEF_PCI_AC_NORET(writesb, (PCI_IO_ADDR a, const void *b, unsigned long c), \ + (a, b, c)) +DEF_PCI_AC_NORET(writesw, (PCI_IO_ADDR a, const void *b, unsigned long c), \ + (a, b, c)) +DEF_PCI_AC_NORET(writesl, (PCI_IO_ADDR a, const void *b, unsigned long c), \ + (a, b, c)) + +DEF_PCI_AC_NORET(insb, (unsigned long p, void *b, unsigned long c), \ + (p, b, c)) +DEF_PCI_AC_NORET(insw, (unsigned long p, void *b, unsigned long c), \ + (p, b, c)) +DEF_PCI_AC_NORET(insl, (unsigned long p, void *b, unsigned long c), \ + (p, b, c)) +DEF_PCI_AC_NORET(outsb, (unsigned long p, const void *b, unsigned long c), \ + (p, b, c)) +DEF_PCI_AC_NORET(outsw, (unsigned long p, const void *b, unsigned long c), \ + (p, b, c)) +DEF_PCI_AC_NORET(outsl, (unsigned long p, const void *b, unsigned long c), \ + (p, b, c)) + +DEF_PCI_AC_NORET(memset_io, (PCI_IO_ADDR a, int c, unsigned long n), \ + (a, c, n)) +DEF_PCI_AC_NORET(memcpy_fromio,(void *d,const PCI_IO_ADDR s,unsigned long n), \ + (d, s, n)) +DEF_PCI_AC_NORET(memcpy_toio,(PCI_IO_ADDR d,const void *s,unsigned long n), \ + (d, s, n)) diff --git a/include/asm-powerpc/io.h b/include/asm-powerpc/io.h index c2c5f14b5f5..1cd532379c3 100644 --- a/include/asm-powerpc/io.h +++ b/include/asm-powerpc/io.h @@ -13,154 +13,530 @@ extern int check_legacy_ioport(unsigned long base_port); #define PNPBIOS_BASE 0xf000 /* only relevant for PReP */ -#ifndef CONFIG_PPC64 -#include <asm-ppc/io.h> -#else - #include <linux/compiler.h> #include <asm/page.h> #include <asm/byteorder.h> -#include <asm/paca.h> #include <asm/synch.h> #include <asm/delay.h> +#include <asm/mmu.h> #include <asm-generic/iomap.h> +#ifdef CONFIG_PPC64 +#include <asm/paca.h> +#endif + #define SIO_CONFIG_RA 0x398 #define SIO_CONFIG_RD 0x399 #define SLOW_DOWN_IO +/* 32 bits uses slightly different variables for the various IO + * bases. Most of this file only uses _IO_BASE though which we + * define properly based on the platform + */ +#ifndef CONFIG_PCI +#define _IO_BASE 0 +#define _ISA_MEM_BASE 0 +#define PCI_DRAM_OFFSET 0 +#elif defined(CONFIG_PPC32) +#define _IO_BASE isa_io_base +#define _ISA_MEM_BASE isa_mem_base +#define PCI_DRAM_OFFSET pci_dram_offset +#else +#define _IO_BASE pci_io_base +#define _ISA_MEM_BASE 0 +#define PCI_DRAM_OFFSET 0 +#endif + extern unsigned long isa_io_base; +extern unsigned long isa_mem_base; extern unsigned long pci_io_base; +extern unsigned long pci_dram_offset; + +#if defined(CONFIG_PPC32) && defined(CONFIG_PPC_INDIRECT_IO) +#error CONFIG_PPC_INDIRECT_IO is not yet supported on 32 bits +#endif + +/* + * + * Low level MMIO accessors + * + * This provides the non-bus specific accessors to MMIO. Those are PowerPC + * specific and thus shouldn't be used in generic code. The accessors + * provided here are: + * + * in_8, in_le16, in_be16, in_le32, in_be32, in_le64, in_be64 + * out_8, out_le16, out_be16, out_le32, out_be32, out_le64, out_be64 + * _insb, _insw_ns, _insl_ns, _outsb, _outsw_ns, _outsl_ns + * + * Those operate directly on a kernel virtual address. Note that the prototype + * for the out_* accessors has the arguments in opposite order from the usual + * linux PCI accessors. Unlike those, they take the address first and the value + * next. + * + * Note: I might drop the _ns suffix on the stream operations soon as it is + * simply normal for stream operations to not swap in the first place. + * + */ + +#ifdef CONFIG_PPC64 +#define IO_SET_SYNC_FLAG() do { get_paca()->io_sync = 1; } while(0) +#else +#define IO_SET_SYNC_FLAG() +#endif + +#define DEF_MMIO_IN(name, type, insn) \ +static inline type name(const volatile type __iomem *addr) \ +{ \ + type ret; \ + __asm__ __volatile__("sync;" insn ";twi 0,%0,0;isync" \ + : "=r" (ret) : "r" (addr), "m" (*addr)); \ + return ret; \ +} + +#define DEF_MMIO_OUT(name, type, insn) \ +static inline void name(volatile type __iomem *addr, type val) \ +{ \ + __asm__ __volatile__("sync;" insn \ + : "=m" (*addr) : "r" (val), "r" (addr)); \ + IO_SET_SYNC_FLAG(); \ +} + + +#define DEF_MMIO_IN_BE(name, size, insn) \ + DEF_MMIO_IN(name, u##size, __stringify(insn)"%U2%X2 %0,%2") +#define DEF_MMIO_IN_LE(name, size, insn) \ + DEF_MMIO_IN(name, u##size, __stringify(insn)" %0,0,%1") + +#define DEF_MMIO_OUT_BE(name, size, insn) \ + DEF_MMIO_OUT(name, u##size, __stringify(insn)"%U0%X0 %1,%0") +#define DEF_MMIO_OUT_LE(name, size, insn) \ + DEF_MMIO_OUT(name, u##size, __stringify(insn)" %1,0,%2") + +DEF_MMIO_IN_BE(in_8, 8, lbz); +DEF_MMIO_IN_BE(in_be16, 16, lhz); +DEF_MMIO_IN_BE(in_be32, 32, lwz); +DEF_MMIO_IN_LE(in_le16, 16, lhbrx); +DEF_MMIO_IN_LE(in_le32, 32, lwbrx); + +DEF_MMIO_OUT_BE(out_8, 8, stb); +DEF_MMIO_OUT_BE(out_be16, 16, sth); +DEF_MMIO_OUT_BE(out_be32, 32, stw); +DEF_MMIO_OUT_LE(out_le16, 16, sthbrx); +DEF_MMIO_OUT_LE(out_le32, 32, stwbrx); + +#ifdef __powerpc64__ +DEF_MMIO_OUT_BE(out_be64, 64, std); +DEF_MMIO_IN_BE(in_be64, 64, ld); + +/* There is no asm instructions for 64 bits reverse loads and stores */ +static inline u64 in_le64(const volatile u64 __iomem *addr) +{ + return le64_to_cpu(in_be64(addr)); +} + +static inline void out_le64(volatile u64 __iomem *addr, u64 val) +{ + out_be64(addr, cpu_to_le64(val)); +} +#endif /* __powerpc64__ */ + +/* + * Low level IO stream instructions are defined out of line for now + */ +extern void _insb(const volatile u8 __iomem *addr, void *buf, long count); +extern void _outsb(volatile u8 __iomem *addr,const void *buf,long count); +extern void _insw_ns(const volatile u16 __iomem *addr, void *buf, long count); +extern void _outsw_ns(volatile u16 __iomem *addr, const void *buf, long count); +extern void _insl_ns(const volatile u32 __iomem *addr, void *buf, long count); +extern void _outsl_ns(volatile u32 __iomem *addr, const void *buf, long count); + +/* The _ns naming is historical and will be removed. For now, just #define + * the non _ns equivalent names + */ +#define _insw _insw_ns +#define _insl _insl_ns +#define _outsw _outsw_ns +#define _outsl _outsl_ns + + +/* + * memset_io, memcpy_toio, memcpy_fromio base implementations are out of line + */ + +extern void _memset_io(volatile void __iomem *addr, int c, unsigned long n); +extern void _memcpy_fromio(void *dest, const volatile void __iomem *src, + unsigned long n); +extern void _memcpy_toio(volatile void __iomem *dest, const void *src, + unsigned long n); + +/* + * + * PCI and standard ISA accessors + * + * Those are globally defined linux accessors for devices on PCI or ISA + * busses. They follow the Linux defined semantics. The current implementation + * for PowerPC is as close as possible to the x86 version of these, and thus + * provides fairly heavy weight barriers for the non-raw versions + * + * In addition, they support a hook mechanism when CONFIG_PPC_INDIRECT_IO + * allowing the platform to provide its own implementation of some or all + * of the accessors. + */ + +/* + * Include the EEH definitions when EEH is enabled only so they don't get + * in the way when building for 32 bits + */ +#ifdef CONFIG_EEH +#include <asm/eeh.h> +#endif + +/* Shortcut to the MMIO argument pointer */ +#define PCI_IO_ADDR volatile void __iomem * + +/* Indirect IO address tokens: + * + * When CONFIG_PPC_INDIRECT_IO is set, the platform can provide hooks + * on all IOs. (Note that this is all 64 bits only for now) + * + * To help platforms who may need to differenciate MMIO addresses in + * their hooks, a bitfield is reserved for use by the platform near the + * top of MMIO addresses (not PIO, those have to cope the hard way). + * + * This bit field is 12 bits and is at the top of the IO virtual + * addresses PCI_IO_INDIRECT_TOKEN_MASK. + * + * The kernel virtual space is thus: + * + * 0xD000000000000000 : vmalloc + * 0xD000080000000000 : PCI PHB IO space + * 0xD000080080000000 : ioremap + * 0xD0000fffffffffff : end of ioremap region + * + * Since the top 4 bits are reserved as the region ID, we use thus + * the next 12 bits and keep 4 bits available for the future if the + * virtual address space is ever to be extended. + * + * The direct IO mapping operations will then mask off those bits + * before doing the actual access, though that only happen when + * CONFIG_PPC_INDIRECT_IO is set, thus be careful when you use that + * mechanism + */ + +#ifdef CONFIG_PPC_INDIRECT_IO +#define PCI_IO_IND_TOKEN_MASK 0x0fff000000000000ul +#define PCI_IO_IND_TOKEN_SHIFT 48 +#define PCI_FIX_ADDR(addr) \ + ((PCI_IO_ADDR)(((unsigned long)(addr)) & ~PCI_IO_IND_TOKEN_MASK)) +#define PCI_GET_ADDR_TOKEN(addr) \ + (((unsigned long)(addr) & PCI_IO_IND_TOKEN_MASK) >> \ + PCI_IO_IND_TOKEN_SHIFT) +#define PCI_SET_ADDR_TOKEN(addr, token) \ +do { \ + unsigned long __a = (unsigned long)(addr); \ + __a &= ~PCI_IO_IND_TOKEN_MASK; \ + __a |= ((unsigned long)(token)) << PCI_IO_IND_TOKEN_SHIFT; \ + (addr) = (void __iomem *)__a; \ +} while(0) +#else +#define PCI_FIX_ADDR(addr) (addr) +#endif -#ifdef CONFIG_PPC_ISERIES - -extern int in_8(const volatile unsigned char __iomem *addr); -extern void out_8(volatile unsigned char __iomem *addr, int val); -extern int in_le16(const volatile unsigned short __iomem *addr); -extern int in_be16(const volatile unsigned short __iomem *addr); -extern void out_le16(volatile unsigned short __iomem *addr, int val); -extern void out_be16(volatile unsigned short __iomem *addr, int val); -extern unsigned in_le32(const volatile unsigned __iomem *addr); -extern unsigned in_be32(const volatile unsigned __iomem *addr); -extern void out_le32(volatile unsigned __iomem *addr, int val); -extern void out_be32(volatile unsigned __iomem *addr, int val); -extern unsigned long in_le64(const volatile unsigned long __iomem *addr); -extern unsigned long in_be64(const volatile unsigned long __iomem *addr); -extern void out_le64(volatile unsigned long __iomem *addr, unsigned long val); -extern void out_be64(volatile unsigned long __iomem *addr, unsigned long val); - -extern unsigned char __raw_readb(const volatile void __iomem *addr); -extern unsigned short __raw_readw(const volatile void __iomem *addr); -extern unsigned int __raw_readl(const volatile void __iomem *addr); -extern unsigned long __raw_readq(const volatile void __iomem *addr); -extern void __raw_writeb(unsigned char v, volatile void __iomem *addr); -extern void __raw_writew(unsigned short v, volatile void __iomem *addr); -extern void __raw_writel(unsigned int v, volatile void __iomem *addr); -extern void __raw_writeq(unsigned long v, volatile void __iomem *addr); - -extern void memset_io(volatile void __iomem *addr, int c, unsigned long n); -extern void memcpy_fromio(void *dest, const volatile void __iomem *src, - unsigned long n); -extern void memcpy_toio(volatile void __iomem *dest, const void *src, - unsigned long n); - -#else /* CONFIG_PPC_ISERIES */ - -#define in_8(addr) __in_8((addr)) -#define out_8(addr, val) __out_8((addr), (val)) -#define in_le16(addr) __in_le16((addr)) -#define in_be16(addr) __in_be16((addr)) -#define out_le16(addr, val) __out_le16((addr), (val)) -#define out_be16(addr, val) __out_be16((addr), (val)) -#define in_le32(addr) __in_le32((addr)) -#define in_be32(addr) __in_be32((addr)) -#define out_le32(addr, val) __out_le32((addr), (val)) -#define out_be32(addr, val) __out_be32((addr), (val)) -#define in_le64(addr) __in_le64((addr)) -#define in_be64(addr) __in_be64((addr)) -#define out_le64(addr, val) __out_le64((addr), (val)) -#define out_be64(addr, val) __out_be64((addr), (val)) + +/* + * Non ordered and non-swapping "raw" accessors + */ static inline unsigned char __raw_readb(const volatile void __iomem *addr) { - return *(volatile unsigned char __force *)addr; + return *(volatile unsigned char __force *)PCI_FIX_ADDR(addr); } static inline unsigned short __raw_readw(const volatile void __iomem *addr) { - return *(volatile unsigned short __force *)addr; + return *(volatile unsigned short __force *)PCI_FIX_ADDR(addr); } static inline unsigned int __raw_readl(const volatile void __iomem *addr) { - return *(volatile unsigned int __force *)addr; -} -static inline unsigned long __raw_readq(const volatile void __iomem *addr) -{ - return *(volatile unsigned long __force *)addr; + return *(volatile unsigned int __force *)PCI_FIX_ADDR(addr); } static inline void __raw_writeb(unsigned char v, volatile void __iomem *addr) { - *(volatile unsigned char __force *)addr = v; + *(volatile unsigned char __force *)PCI_FIX_ADDR(addr) = v; } static inline void __raw_writew(unsigned short v, volatile void __iomem *addr) { - *(volatile unsigned short __force *)addr = v; + *(volatile unsigned short __force *)PCI_FIX_ADDR(addr) = v; } static inline void __raw_writel(unsigned int v, volatile void __iomem *addr) { - *(volatile unsigned int __force *)addr = v; + *(volatile unsigned int __force *)PCI_FIX_ADDR(addr) = v; +} + +#ifdef __powerpc64__ +static inline unsigned long __raw_readq(const volatile void __iomem *addr) +{ + return *(volatile unsigned long __force *)PCI_FIX_ADDR(addr); } static inline void __raw_writeq(unsigned long v, volatile void __iomem *addr) { - *(volatile unsigned long __force *)addr = v; + *(volatile unsigned long __force *)PCI_FIX_ADDR(addr) = v; +} +#endif /* __powerpc64__ */ + +/* + * + * PCI PIO and MMIO accessors. + * + * + * On 32 bits, PIO operations have a recovery mechanism in case they trigger + * machine checks (which they occasionally do when probing non existing + * IO ports on some platforms, like PowerMac and 8xx). + * I always found it to be of dubious reliability and I am tempted to get + * rid of it one of these days. So if you think it's important to keep it, + * please voice up asap. We never had it for 64 bits and I do not intend + * to port it over + */ + +#ifdef CONFIG_PPC32 + +#define __do_in_asm(name, op) \ +static inline unsigned int name(unsigned int port) \ +{ \ + unsigned int x; \ + __asm__ __volatile__( \ + "sync\n" \ + "0:" op " %0,0,%1\n" \ + "1: twi 0,%0,0\n" \ + "2: isync\n" \ + "3: nop\n" \ + "4:\n" \ + ".section .fixup,\"ax\"\n" \ + "5: li %0,-1\n" \ + " b 4b\n" \ + ".previous\n" \ + ".section __ex_table,\"a\"\n" \ + " .align 2\n" \ + " .long 0b,5b\n" \ + " .long 1b,5b\n" \ + " .long 2b,5b\n" \ + " .long 3b,5b\n" \ + ".previous" \ + : "=&r" (x) \ + : "r" (port + _IO_BASE)); \ + return x; \ +} + +#define __do_out_asm(name, op) \ +static inline void name(unsigned int val, unsigned int port) \ +{ \ + __asm__ __volatile__( \ + "sync\n" \ + "0:" op " %0,0,%1\n" \ + "1: sync\n" \ + "2:\n" \ + ".section __ex_table,\"a\"\n" \ + " .align 2\n" \ + " .long 0b,2b\n" \ + " .long 1b,2b\n" \ + ".previous" \ + : : "r" (val), "r" (port + _IO_BASE)); \ +} + +__do_in_asm(_rec_inb, "lbzx") +__do_in_asm(_rec_inw, "lhbrx") +__do_in_asm(_rec_inl, "lwbrx") +__do_out_asm(_rec_outb, "stbx") +__do_out_asm(_rec_outw, "sthbrx") +__do_out_asm(_rec_outl, "stwbrx") + +#endif /* CONFIG_PPC32 */ + +/* The "__do_*" operations below provide the actual "base" implementation + * for each of the defined acccessor. Some of them use the out_* functions + * directly, some of them still use EEH, though we might change that in the + * future. Those macros below provide the necessary argument swapping and + * handling of the IO base for PIO. + * + * They are themselves used by the macros that define the actual accessors + * and can be used by the hooks if any. + * + * Note that PIO operations are always defined in terms of their corresonding + * MMIO operations. That allows platforms like iSeries who want to modify the + * behaviour of both to only hook on the MMIO version and get both. It's also + * possible to hook directly at the toplevel PIO operation if they have to + * be handled differently + */ +#define __do_writeb(val, addr) out_8(PCI_FIX_ADDR(addr), val) +#define __do_writew(val, addr) out_le16(PCI_FIX_ADDR(addr), val) +#define __do_writel(val, addr) out_le32(PCI_FIX_ADDR(addr), val) +#define __do_writeq(val, addr) out_le64(PCI_FIX_ADDR(addr), val) +#define __do_writew_be(val, addr) out_be16(PCI_FIX_ADDR(addr), val) +#define __do_writel_be(val, addr) out_be32(PCI_FIX_ADDR(addr), val) +#define __do_writeq_be(val, addr) out_be64(PCI_FIX_ADDR(addr), val) + +#ifdef CONFIG_EEH +#define __do_readb(addr) eeh_readb(PCI_FIX_ADDR(addr)) +#define __do_readw(addr) eeh_readw(PCI_FIX_ADDR(addr)) +#define __do_readl(addr) eeh_readl(PCI_FIX_ADDR(addr)) +#define __do_readq(addr) eeh_readq(PCI_FIX_ADDR(addr)) +#define __do_readw_be(addr) eeh_readw_be(PCI_FIX_ADDR(addr)) +#define __do_readl_be(addr) eeh_readl_be(PCI_FIX_ADDR(addr)) +#define __do_readq_be(addr) eeh_readq_be(PCI_FIX_ADDR(addr)) +#else /* CONFIG_EEH */ +#define __do_readb(addr) in_8(PCI_FIX_ADDR(addr)) +#define __do_readw(addr) in_le16(PCI_FIX_ADDR(addr)) +#define __do_readl(addr) in_le32(PCI_FIX_ADDR(addr)) +#define __do_readq(addr) in_le64(PCI_FIX_ADDR(addr)) +#define __do_readw_be(addr) in_be16(PCI_FIX_ADDR(addr)) +#define __do_readl_be(addr) in_be32(PCI_FIX_ADDR(addr)) +#define __do_readq_be(addr) in_be64(PCI_FIX_ADDR(addr)) +#endif /* !defined(CONFIG_EEH) */ + +#ifdef CONFIG_PPC32 +#define __do_outb(val, port) _rec_outb(val, port) +#define __do_outw(val, port) _rec_outw(val, port) +#define __do_outl(val, port) _rec_outl(val, port) +#define __do_inb(port) _rec_inb(port) +#define __do_inw(port) _rec_inw(port) +#define __do_inl(port) _rec_inl(port) +#else /* CONFIG_PPC32 */ +#define __do_outb(val, port) writeb(val,(PCI_IO_ADDR)_IO_BASE+port); +#define __do_outw(val, port) writew(val,(PCI_IO_ADDR)_IO_BASE+port); +#define __do_outl(val, port) writel(val,(PCI_IO_ADDR)_IO_BASE+port); +#define __do_inb(port) readb((PCI_IO_ADDR)_IO_BASE + port); +#define __do_inw(port) readw((PCI_IO_ADDR)_IO_BASE + port); +#define __do_inl(port) readl((PCI_IO_ADDR)_IO_BASE + port); +#endif /* !CONFIG_PPC32 */ + +#ifdef CONFIG_EEH +#define __do_readsb(a, b, n) eeh_readsb(PCI_FIX_ADDR(a), (b), (n)) +#define __do_readsw(a, b, n) eeh_readsw(PCI_FIX_ADDR(a), (b), (n)) +#define __do_readsl(a, b, n) eeh_readsl(PCI_FIX_ADDR(a), (b), (n)) +#else /* CONFIG_EEH */ +#define __do_readsb(a, b, n) _insb(PCI_FIX_ADDR(a), (b), (n)) +#define __do_readsw(a, b, n) _insw(PCI_FIX_ADDR(a), (b), (n)) +#define __do_readsl(a, b, n) _insl(PCI_FIX_ADDR(a), (b), (n)) +#endif /* !CONFIG_EEH */ +#define __do_writesb(a, b, n) _outsb(PCI_FIX_ADDR(a),(b),(n)) +#define __do_writesw(a, b, n) _outsw(PCI_FIX_ADDR(a),(b),(n)) +#define __do_writesl(a, b, n) _outsl(PCI_FIX_ADDR(a),(b),(n)) + +#define __do_insb(p, b, n) readsb((PCI_IO_ADDR)_IO_BASE+(p), (b), (n)) +#define __do_insw(p, b, n) readsw((PCI_IO_ADDR)_IO_BASE+(p), (b), (n)) +#define __do_insl(p, b, n) readsl((PCI_IO_ADDR)_IO_BASE+(p), (b), (n)) +#define __do_outsb(p, b, n) writesb((PCI_IO_ADDR)_IO_BASE+(p),(b),(n)) +#define __do_outsw(p, b, n) writesw((PCI_IO_ADDR)_IO_BASE+(p),(b),(n)) +#define __do_outsl(p, b, n) writesl((PCI_IO_ADDR)_IO_BASE+(p),(b),(n)) + +#define __do_memset_io(addr, c, n) \ + _memset_io(PCI_FIX_ADDR(addr), c, n) +#define __do_memcpy_toio(dst, src, n) \ + _memcpy_toio(PCI_FIX_ADDR(dst), src, n) + +#ifdef CONFIG_EEH +#define __do_memcpy_fromio(dst, src, n) \ + eeh_memcpy_fromio(dst, PCI_FIX_ADDR(src), n) +#else /* CONFIG_EEH */ +#define __do_memcpy_fromio(dst, src, n) \ + _memcpy_fromio(dst,PCI_FIX_ADDR(src),n) +#endif /* !CONFIG_EEH */ + +#ifdef CONFIG_PPC_INDIRECT_IO +#define DEF_PCI_HOOK(x) x +#else +#define DEF_PCI_HOOK(x) NULL +#endif + +/* Structure containing all the hooks */ +extern struct ppc_pci_io { + +#define DEF_PCI_AC_RET(name, ret, at, al) ret (*name) at; +#define DEF_PCI_AC_NORET(name, at, al) void (*name) at; + +#include <asm/io-defs.h> + +#undef DEF_PCI_AC_RET +#undef DEF_PCI_AC_NORET + +} ppc_pci_io; + +/* The inline wrappers */ +#define DEF_PCI_AC_RET(name, ret, at, al) \ +static inline ret name at \ +{ \ + if (DEF_PCI_HOOK(ppc_pci_io.name) != NULL) \ + return ppc_pci_io.name al; \ + return __do_##name al; \ +} + +#define DEF_PCI_AC_NORET(name, at, al) \ +static inline void name at \ +{ \ + if (DEF_PCI_HOOK(ppc_pci_io.name) != NULL) \ + ppc_pci_io.name al; \ + else \ + __do_##name al; \ } -#define memset_io(a,b,c) eeh_memset_io((a),(b),(c)) -#define memcpy_fromio(a,b,c) eeh_memcpy_fromio((a),(b),(c)) -#define memcpy_toio(a,b,c) eeh_memcpy_toio((a),(b),(c)) -#endif /* CONFIG_PPC_ISERIES */ +#include <asm/io-defs.h> + +#undef DEF_PCI_AC_RET +#undef DEF_PCI_AC_NORET + +/* Some drivers check for the presence of readq & writeq with + * a #ifdef, so we make them happy here. + */ +#ifdef __powerpc64__ +#define readq readq +#define writeq writeq +#endif + +#ifdef CONFIG_NOT_COHERENT_CACHE + +#define dma_cache_inv(_start,_size) \ + invalidate_dcache_range(_start, (_start + _size)) +#define dma_cache_wback(_start,_size) \ + clean_dcache_range(_start, (_start + _size)) +#define dma_cache_wback_inv(_start,_size) \ + flush_dcache_range(_start, (_start + _size)) + +#else /* CONFIG_NOT_COHERENT_CACHE */ + +#define dma_cache_inv(_start,_size) do { } while (0) +#define dma_cache_wback(_start,_size) do { } while (0) +#define dma_cache_wback_inv(_start,_size) do { } while (0) + +#endif /* !CONFIG_NOT_COHERENT_CACHE */ /* - * The insw/outsw/insl/outsl macros don't do byte-swapping. - * They are only used in practice for transferring buffers which - * are arrays of bytes, and byte-swapping is not appropriate in - * that case. - paulus */ -#define insb(port, buf, ns) eeh_insb((port), (buf), (ns)) -#define insw(port, buf, ns) eeh_insw_ns((port), (buf), (ns)) -#define insl(port, buf, nl) eeh_insl_ns((port), (buf), (nl)) - -#define outsb(port, buf, ns) _outsb((u8 __iomem *)((port)+pci_io_base), (buf), (ns)) -#define outsw(port, buf, ns) _outsw_ns((u16 __iomem *)((port)+pci_io_base), (buf), (ns)) -#define outsl(port, buf, nl) _outsl_ns((u32 __iomem *)((port)+pci_io_base), (buf), (nl)) - -#define readb(addr) eeh_readb(addr) -#define readw(addr) eeh_readw(addr) -#define readl(addr) eeh_readl(addr) -#define readq(addr) eeh_readq(addr) -#define writeb(data, addr) eeh_writeb((data), (addr)) -#define writew(data, addr) eeh_writew((data), (addr)) -#define writel(data, addr) eeh_writel((data), (addr)) -#define writeq(data, addr) eeh_writeq((data), (addr)) -#define inb(port) eeh_inb((unsigned long)port) -#define outb(val, port) eeh_outb(val, (unsigned long)port) -#define inw(port) eeh_inw((unsigned long)port) -#define outw(val, port) eeh_outw(val, (unsigned long)port) -#define inl(port) eeh_inl((unsigned long)port) -#define outl(val, port) eeh_outl(val, (unsigned long)port) + * Convert a physical pointer to a virtual kernel pointer for /dev/mem + * access + */ +#define xlate_dev_mem_ptr(p) __va(p) + +/* + * Convert a virtual cached pointer to an uncached pointer + */ +#define xlate_dev_kmem_ptr(p) p +/* + * We don't do relaxed operations yet, at least not with this semantic + */ #define readb_relaxed(addr) readb(addr) #define readw_relaxed(addr) readw(addr) #define readl_relaxed(addr) readl(addr) #define readq_relaxed(addr) readq(addr) -extern void _insb(volatile u8 __iomem *port, void *buf, long count); -extern void _outsb(volatile u8 __iomem *port, const void *buf, long count); -extern void _insw_ns(volatile u16 __iomem *port, void *buf, long count); -extern void _outsw_ns(volatile u16 __iomem *port, const void *buf, long count); -extern void _insl_ns(volatile u32 __iomem *port, void *buf, long count); -extern void _outsl_ns(volatile u32 __iomem *port, const void *buf, long count); - +#ifdef CONFIG_PPC32 +#define mmiowb() +#else +/* + * Enforce synchronisation of stores vs. spin_unlock + * (this does it explicitely, though our implementation of spin_unlock + * does it implicitely too) + */ static inline void mmiowb(void) { unsigned long tmp; @@ -169,6 +545,24 @@ static inline void mmiowb(void) : "=&r" (tmp) : "i" (offsetof(struct paca_struct, io_sync)) : "memory"); } +#endif /* !CONFIG_PPC32 */ + +static inline void iosync(void) +{ + __asm__ __volatile__ ("sync" : : : "memory"); +} + +/* Enforce in-order execution of data I/O. + * No distinction between read/write on PPC; use eieio for all three. + * Those are fairly week though. They don't provide a barrier between + * MMIO and cacheable storage nor do they provide a barrier vs. locks, + * they only provide barriers between 2 __raw MMIO operations and + * possibly break write combining. + */ +#define iobarrier_rw() eieio() +#define iobarrier_r() eieio() +#define iobarrier_w() eieio() + /* * output pause versions need a delay at least for the @@ -185,11 +579,6 @@ static inline void mmiowb(void) #define IO_SPACE_LIMIT ~(0UL) -extern int __ioremap_explicit(unsigned long p_addr, unsigned long v_addr, - unsigned long size, unsigned long flags); -extern void __iomem *__ioremap(unsigned long address, unsigned long size, - unsigned long flags); - /** * ioremap - map bus memory into CPU space * @address: bus address of the memory @@ -200,14 +589,77 @@ extern void __iomem *__ioremap(unsigned long address, unsigned long size, * writew/writel functions and the other mmio helpers. The returned * address is not guaranteed to be usable directly as a virtual * address. + * + * We provide a few variations of it: + * + * * ioremap is the standard one and provides non-cacheable guarded mappings + * and can be hooked by the platform via ppc_md + * + * * ioremap_flags allows to specify the page flags as an argument and can + * also be hooked by the platform via ppc_md + * + * * ioremap_nocache is identical to ioremap + * + * * iounmap undoes such a mapping and can be hooked + * + * * __ioremap_explicit (and the pending __iounmap_explicit) are low level + * functions to create hand-made mappings for use only by the PCI code + * and cannot currently be hooked. + * + * * __ioremap is the low level implementation used by ioremap and + * ioremap_flags and cannot be hooked (but can be used by a hook on one + * of the previous ones) + * + * * __iounmap, is the low level implementation used by iounmap and cannot + * be hooked (but can be used by a hook on iounmap) + * */ -extern void __iomem *ioremap(unsigned long address, unsigned long size); - +extern void __iomem *ioremap(phys_addr_t address, unsigned long size); +extern void __iomem *ioremap_flags(phys_addr_t address, unsigned long size, + unsigned long flags); #define ioremap_nocache(addr, size) ioremap((addr), (size)) -extern int iounmap_explicit(volatile void __iomem *addr, unsigned long size); extern void iounmap(volatile void __iomem *addr); + +extern void __iomem *__ioremap(phys_addr_t, unsigned long size, + unsigned long flags); +extern void __iounmap(volatile void __iomem *addr); + +extern int __ioremap_explicit(phys_addr_t p_addr, unsigned long v_addr, + unsigned long size, unsigned long flags); +extern int __iounmap_explicit(volatile void __iomem *start, + unsigned long size); + extern void __iomem * reserve_phb_iospace(unsigned long size); +/* Those are more 32 bits only functions */ +extern unsigned long iopa(unsigned long addr); +extern unsigned long mm_ptov(unsigned long addr) __attribute_const__; +extern void io_block_mapping(unsigned long virt, phys_addr_t phys, + unsigned int size, int flags); + + +/* + * When CONFIG_PPC_INDIRECT_IO is set, we use the generic iomap implementation + * which needs some additional definitions here. They basically allow PIO + * space overall to be 1GB. This will work as long as we never try to use + * iomap to map MMIO below 1GB which should be fine on ppc64 + */ +#define HAVE_ARCH_PIO_SIZE 1 +#define PIO_OFFSET 0x00000000UL +#define PIO_MASK 0x3fffffffUL +#define PIO_RESERVED 0x40000000UL + +#define mmio_read16be(addr) readw_be(addr) +#define mmio_read32be(addr) readl_be(addr) +#define mmio_write16be(val, addr) writew_be(val, addr) +#define mmio_write32be(val, addr) writel_be(val, addr) +#define mmio_insb(addr, dst, count) readsb(addr, dst, count) +#define mmio_insw(addr, dst, count) readsw(addr, dst, count) +#define mmio_insl(addr, dst, count) readsl(addr, dst, count) +#define mmio_outsb(addr, src, count) writesb(addr, src, count) +#define mmio_outsw(addr, src, count) writesw(addr, src, count) +#define mmio_outsl(addr, src, count) writesl(addr, src, count) + /** * virt_to_phys - map virtual addresses to physical * @address: address to remap @@ -254,178 +706,33 @@ static inline void * phys_to_virt(unsigned long address) */ #define BIO_VMERGE_BOUNDARY 0 -static inline void iosync(void) -{ - __asm__ __volatile__ ("sync" : : : "memory"); -} - -/* Enforce in-order execution of data I/O. - * No distinction between read/write on PPC; use eieio for all three. - */ -#define iobarrier_rw() eieio() -#define iobarrier_r() eieio() -#define iobarrier_w() eieio() - /* - * 8, 16 and 32 bit, big and little endian I/O operations, with barrier. - * These routines do not perform EEH-related I/O address translation, - * and should not be used directly by device drivers. Use inb/readb - * instead. + * 32 bits still uses virt_to_bus() for it's implementation of DMA + * mappings se we have to keep it defined here. We also have some old + * drivers (shame shame shame) that use bus_to_virt() and haven't been + * fixed yet so I need to define it here. */ -static inline int __in_8(const volatile unsigned char __iomem *addr) -{ - int ret; +#ifdef CONFIG_PPC32 - __asm__ __volatile__("sync; lbz%U1%X1 %0,%1; twi 0,%0,0; isync" - : "=r" (ret) : "m" (*addr)); - return ret; -} - -static inline void __out_8(volatile unsigned char __iomem *addr, int val) -{ - __asm__ __volatile__("sync; stb%U0%X0 %1,%0" - : "=m" (*addr) : "r" (val)); - get_paca()->io_sync = 1; -} - -static inline int __in_le16(const volatile unsigned short __iomem *addr) +static inline unsigned long virt_to_bus(volatile void * address) { - int ret; - - __asm__ __volatile__("sync; lhbrx %0,0,%1; twi 0,%0,0; isync" - : "=r" (ret) : "r" (addr), "m" (*addr)); - return ret; + if (address == NULL) + return 0; + return __pa(address) + PCI_DRAM_OFFSET; } -static inline int __in_be16(const volatile unsigned short __iomem *addr) +static inline void * bus_to_virt(unsigned long address) { - int ret; - - __asm__ __volatile__("sync; lhz%U1%X1 %0,%1; twi 0,%0,0; isync" - : "=r" (ret) : "m" (*addr)); - return ret; + if (address == 0) + return NULL; + return __va(address - PCI_DRAM_OFFSET); } -static inline void __out_le16(volatile unsigned short __iomem *addr, int val) -{ - __asm__ __volatile__("sync; sthbrx %1,0,%2" - : "=m" (*addr) : "r" (val), "r" (addr)); - get_paca()->io_sync = 1; -} - -static inline void __out_be16(volatile unsigned short __iomem *addr, int val) -{ - __asm__ __volatile__("sync; sth%U0%X0 %1,%0" - : "=m" (*addr) : "r" (val)); - get_paca()->io_sync = 1; -} - -static inline unsigned __in_le32(const volatile unsigned __iomem *addr) -{ - unsigned ret; - - __asm__ __volatile__("sync; lwbrx %0,0,%1; twi 0,%0,0; isync" - : "=r" (ret) : "r" (addr), "m" (*addr)); - return ret; -} +#define page_to_bus(page) (page_to_phys(page) + PCI_DRAM_OFFSET) -static inline unsigned __in_be32(const volatile unsigned __iomem *addr) -{ - unsigned ret; - - __asm__ __volatile__("sync; lwz%U1%X1 %0,%1; twi 0,%0,0; isync" - : "=r" (ret) : "m" (*addr)); - return ret; -} - -static inline void __out_le32(volatile unsigned __iomem *addr, int val) -{ - __asm__ __volatile__("sync; stwbrx %1,0,%2" : "=m" (*addr) - : "r" (val), "r" (addr)); - get_paca()->io_sync = 1; -} - -static inline void __out_be32(volatile unsigned __iomem *addr, int val) -{ - __asm__ __volatile__("sync; stw%U0%X0 %1,%0" - : "=m" (*addr) : "r" (val)); - get_paca()->io_sync = 1; -} - -static inline unsigned long __in_le64(const volatile unsigned long __iomem *addr) -{ - unsigned long tmp, ret; - - __asm__ __volatile__( - "sync\n" - "ld %1,0(%2)\n" - "twi 0,%1,0\n" - "isync\n" - "rldimi %0,%1,5*8,1*8\n" - "rldimi %0,%1,3*8,2*8\n" - "rldimi %0,%1,1*8,3*8\n" - "rldimi %0,%1,7*8,4*8\n" - "rldicl %1,%1,32,0\n" - "rlwimi %0,%1,8,8,31\n" - "rlwimi %0,%1,24,16,23\n" - : "=r" (ret) , "=r" (tmp) : "b" (addr) , "m" (*addr)); - return ret; -} - -static inline unsigned long __in_be64(const volatile unsigned long __iomem *addr) -{ - unsigned long ret; +#endif /* CONFIG_PPC32 */ - __asm__ __volatile__("sync; ld%U1%X1 %0,%1; twi 0,%0,0; isync" - : "=r" (ret) : "m" (*addr)); - return ret; -} - -static inline void __out_le64(volatile unsigned long __iomem *addr, unsigned long val) -{ - unsigned long tmp; - - __asm__ __volatile__( - "rldimi %0,%1,5*8,1*8\n" - "rldimi %0,%1,3*8,2*8\n" - "rldimi %0,%1,1*8,3*8\n" - "rldimi %0,%1,7*8,4*8\n" - "rldicl %1,%1,32,0\n" - "rlwimi %0,%1,8,8,31\n" - "rlwimi %0,%1,24,16,23\n" - "sync\n" - "std %0,0(%3)" - : "=&r" (tmp) , "=&r" (val) : "1" (val) , "b" (addr) , "m" (*addr)); - get_paca()->io_sync = 1; -} - -static inline void __out_be64(volatile unsigned long __iomem *addr, unsigned long val) -{ - __asm__ __volatile__("sync; std%U0%X0 %1,%0" : "=m" (*addr) : "r" (val)); - get_paca()->io_sync = 1; -} - -#include <asm/eeh.h> - -/* Nothing to do */ - -#define dma_cache_inv(_start,_size) do { } while (0) -#define dma_cache_wback(_start,_size) do { } while (0) -#define dma_cache_wback_inv(_start,_size) do { } while (0) - - -/* - * Convert a physical pointer to a virtual kernel pointer for /dev/mem - * access - */ -#define xlate_dev_mem_ptr(p) __va(p) - -/* - * Convert a virtual cached pointer to an uncached pointer - */ -#define xlate_dev_kmem_ptr(p) p #endif /* __KERNEL__ */ -#endif /* CONFIG_PPC64 */ #endif /* _ASM_POWERPC_IO_H */ diff --git a/include/asm-powerpc/iommu.h b/include/asm-powerpc/iommu.h index 39fad685ffa..f85dbd30555 100644 --- a/include/asm-powerpc/iommu.h +++ b/include/asm-powerpc/iommu.h @@ -34,7 +34,9 @@ #define IOMMU_PAGE_MASK (~((1 << IOMMU_PAGE_SHIFT) - 1)) #define IOMMU_PAGE_ALIGN(addr) _ALIGN_UP(addr, IOMMU_PAGE_SIZE) -#ifndef __ASSEMBLY__ +/* Boot time flags */ +extern int iommu_is_off; +extern int iommu_force_on; /* Pure 2^n version of get_order */ static __inline__ __attribute_const__ int get_iommu_order(unsigned long size) @@ -42,8 +44,6 @@ static __inline__ __attribute_const__ int get_iommu_order(unsigned long size) return __ilog2((size - 1) >> IOMMU_PAGE_SHIFT) + 1; } -#endif /* __ASSEMBLY__ */ - /* * IOMAP_MAX_ORDER defines the largest contiguous block @@ -70,39 +70,31 @@ struct iommu_table { struct scatterlist; struct device_node; -#ifdef CONFIG_PPC_MULTIPLATFORM - -/* Walks all buses and creates iommu tables */ -extern void iommu_setup_pSeries(void); -extern void iommu_setup_dart(void); - /* Frees table for an individual device node */ extern void iommu_free_table(struct device_node *dn); -#endif /* CONFIG_PPC_MULTIPLATFORM */ - /* Initializes an iommu_table based in values set in the passed-in * structure */ extern struct iommu_table *iommu_init_table(struct iommu_table * tbl, int nid); -extern int iommu_map_sg(struct device *dev, struct iommu_table *tbl, - struct scatterlist *sglist, int nelems, unsigned long mask, - enum dma_data_direction direction); +extern int iommu_map_sg(struct iommu_table *tbl, struct scatterlist *sglist, + int nelems, unsigned long mask, + enum dma_data_direction direction); extern void iommu_unmap_sg(struct iommu_table *tbl, struct scatterlist *sglist, - int nelems, enum dma_data_direction direction); + int nelems, enum dma_data_direction direction); extern void *iommu_alloc_coherent(struct iommu_table *tbl, size_t size, - dma_addr_t *dma_handle, unsigned long mask, - gfp_t flag, int node); + dma_addr_t *dma_handle, unsigned long mask, + gfp_t flag, int node); extern void iommu_free_coherent(struct iommu_table *tbl, size_t size, - void *vaddr, dma_addr_t dma_handle); + void *vaddr, dma_addr_t dma_handle); extern dma_addr_t iommu_map_single(struct iommu_table *tbl, void *vaddr, - size_t size, unsigned long mask, - enum dma_data_direction direction); + size_t size, unsigned long mask, + enum dma_data_direction direction); extern void iommu_unmap_single(struct iommu_table *tbl, dma_addr_t dma_handle, - size_t size, enum dma_data_direction direction); + size_t size, enum dma_data_direction direction); extern void iommu_init_early_pSeries(void); extern void iommu_init_early_iSeries(void); diff --git a/include/asm-powerpc/irq.h b/include/asm-powerpc/irq.h index f960f5346f4..46476e9a494 100644 --- a/include/asm-powerpc/irq.h +++ b/include/asm-powerpc/irq.h @@ -135,6 +135,10 @@ struct irq_map_entry { extern struct irq_map_entry irq_map[NR_IRQS]; +static inline irq_hw_number_t virq_to_hw(unsigned int virq) +{ + return irq_map[virq].hwirq; +} /** * irq_alloc_host - Allocate a new irq_host data structure diff --git a/include/asm-powerpc/iseries/iommu.h b/include/asm-powerpc/iseries/iommu.h index 0edbfe10cb3..6e323a13ac3 100644 --- a/include/asm-powerpc/iseries/iommu.h +++ b/include/asm-powerpc/iseries/iommu.h @@ -21,11 +21,13 @@ * Boston, MA 02111-1307 USA */ +struct pci_dev; struct device_node; struct iommu_table; /* Creates table for an individual device node */ -extern void iommu_devnode_init_iSeries(struct device_node *dn); +extern void iommu_devnode_init_iSeries(struct pci_dev *pdev, + struct device_node *dn); /* Get table parameters from HV */ extern void iommu_table_getparms_iSeries(unsigned long busno, diff --git a/include/asm-powerpc/lv1call.h b/include/asm-powerpc/lv1call.h new file mode 100644 index 00000000000..f733beeea63 --- /dev/null +++ b/include/asm-powerpc/lv1call.h @@ -0,0 +1,345 @@ +/* + * PS3 hvcall interface. + * + * Copyright (C) 2006 Sony Computer Entertainment Inc. + * Copyright 2006 Sony Corp. + * Copyright 2003, 2004 (c) MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#if !defined(_ASM_POWERPC_LV1CALL_H) +#define _ASM_POWERPC_LV1CALL_H + +#if !defined(__ASSEMBLY__) + +#include <linux/types.h> + +/* lv1 call declaration macros */ + +#define LV1_1_IN_ARG_DECL u64 in_1 +#define LV1_2_IN_ARG_DECL LV1_1_IN_ARG_DECL, u64 in_2 +#define LV1_3_IN_ARG_DECL LV1_2_IN_ARG_DECL, u64 in_3 +#define LV1_4_IN_ARG_DECL LV1_3_IN_ARG_DECL, u64 in_4 +#define LV1_5_IN_ARG_DECL LV1_4_IN_ARG_DECL, u64 in_5 +#define LV1_6_IN_ARG_DECL LV1_5_IN_ARG_DECL, u64 in_6 +#define LV1_7_IN_ARG_DECL LV1_6_IN_ARG_DECL, u64 in_7 +#define LV1_8_IN_ARG_DECL LV1_7_IN_ARG_DECL, u64 in_8 +#define LV1_1_OUT_ARG_DECL u64 *out_1 +#define LV1_2_OUT_ARG_DECL LV1_1_OUT_ARG_DECL, u64 *out_2 +#define LV1_3_OUT_ARG_DECL LV1_2_OUT_ARG_DECL, u64 *out_3 +#define LV1_4_OUT_ARG_DECL LV1_3_OUT_ARG_DECL, u64 *out_4 +#define LV1_5_OUT_ARG_DECL LV1_4_OUT_ARG_DECL, u64 *out_5 +#define LV1_6_OUT_ARG_DECL LV1_5_OUT_ARG_DECL, u64 *out_6 +#define LV1_7_OUT_ARG_DECL LV1_6_OUT_ARG_DECL, u64 *out_7 + +#define LV1_0_IN_0_OUT_ARG_DECL void +#define LV1_1_IN_0_OUT_ARG_DECL LV1_1_IN_ARG_DECL +#define LV1_2_IN_0_OUT_ARG_DECL LV1_2_IN_ARG_DECL +#define LV1_3_IN_0_OUT_ARG_DECL LV1_3_IN_ARG_DECL +#define LV1_4_IN_0_OUT_ARG_DECL LV1_4_IN_ARG_DECL +#define LV1_5_IN_0_OUT_ARG_DECL LV1_5_IN_ARG_DECL +#define LV1_6_IN_0_OUT_ARG_DECL LV1_6_IN_ARG_DECL +#define LV1_7_IN_0_OUT_ARG_DECL LV1_7_IN_ARG_DECL + +#define LV1_0_IN_1_OUT_ARG_DECL LV1_1_OUT_ARG_DECL +#define LV1_1_IN_1_OUT_ARG_DECL LV1_1_IN_ARG_DECL, LV1_1_OUT_ARG_DECL +#define LV1_2_IN_1_OUT_ARG_DECL LV1_2_IN_ARG_DECL, LV1_1_OUT_ARG_DECL +#define LV1_3_IN_1_OUT_ARG_DECL LV1_3_IN_ARG_DECL, LV1_1_OUT_ARG_DECL +#define LV1_4_IN_1_OUT_ARG_DECL LV1_4_IN_ARG_DECL, LV1_1_OUT_ARG_DECL +#define LV1_5_IN_1_OUT_ARG_DECL LV1_5_IN_ARG_DECL, LV1_1_OUT_ARG_DECL +#define LV1_6_IN_1_OUT_ARG_DECL LV1_6_IN_ARG_DECL, LV1_1_OUT_ARG_DECL +#define LV1_7_IN_1_OUT_ARG_DECL LV1_7_IN_ARG_DECL, LV1_1_OUT_ARG_DECL +#define LV1_8_IN_1_OUT_ARG_DECL LV1_8_IN_ARG_DECL, LV1_1_OUT_ARG_DECL + +#define LV1_0_IN_2_OUT_ARG_DECL LV1_2_OUT_ARG_DECL +#define LV1_1_IN_2_OUT_ARG_DECL LV1_1_IN_ARG_DECL, LV1_2_OUT_ARG_DECL +#define LV1_2_IN_2_OUT_ARG_DECL LV1_2_IN_ARG_DECL, LV1_2_OUT_ARG_DECL +#define LV1_3_IN_2_OUT_ARG_DECL LV1_3_IN_ARG_DECL, LV1_2_OUT_ARG_DECL +#define LV1_4_IN_2_OUT_ARG_DECL LV1_4_IN_ARG_DECL, LV1_2_OUT_ARG_DECL +#define LV1_5_IN_2_OUT_ARG_DECL LV1_5_IN_ARG_DECL, LV1_2_OUT_ARG_DECL +#define LV1_6_IN_2_OUT_ARG_DECL LV1_6_IN_ARG_DECL, LV1_2_OUT_ARG_DECL +#define LV1_7_IN_2_OUT_ARG_DECL LV1_7_IN_ARG_DECL, LV1_2_OUT_ARG_DECL + +#define LV1_0_IN_3_OUT_ARG_DECL LV1_3_OUT_ARG_DECL +#define LV1_1_IN_3_OUT_ARG_DECL LV1_1_IN_ARG_DECL, LV1_3_OUT_ARG_DECL +#define LV1_2_IN_3_OUT_ARG_DECL LV1_2_IN_ARG_DECL, LV1_3_OUT_ARG_DECL +#define LV1_3_IN_3_OUT_ARG_DECL LV1_3_IN_ARG_DECL, LV1_3_OUT_ARG_DECL +#define LV1_4_IN_3_OUT_ARG_DECL LV1_4_IN_ARG_DECL, LV1_3_OUT_ARG_DECL +#define LV1_5_IN_3_OUT_ARG_DECL LV1_5_IN_ARG_DECL, LV1_3_OUT_ARG_DECL +#define LV1_6_IN_3_OUT_ARG_DECL LV1_6_IN_ARG_DECL, LV1_3_OUT_ARG_DECL +#define LV1_7_IN_3_OUT_ARG_DECL LV1_7_IN_ARG_DECL, LV1_3_OUT_ARG_DECL + +#define LV1_0_IN_4_OUT_ARG_DECL LV1_4_OUT_ARG_DECL +#define LV1_1_IN_4_OUT_ARG_DECL LV1_1_IN_ARG_DECL, LV1_4_OUT_ARG_DECL +#define LV1_2_IN_4_OUT_ARG_DECL LV1_2_IN_ARG_DECL, LV1_4_OUT_ARG_DECL +#define LV1_3_IN_4_OUT_ARG_DECL LV1_3_IN_ARG_DECL, LV1_4_OUT_ARG_DECL +#define LV1_4_IN_4_OUT_ARG_DECL LV1_4_IN_ARG_DECL, LV1_4_OUT_ARG_DECL +#define LV1_5_IN_4_OUT_ARG_DECL LV1_5_IN_ARG_DECL, LV1_4_OUT_ARG_DECL +#define LV1_6_IN_4_OUT_ARG_DECL LV1_6_IN_ARG_DECL, LV1_4_OUT_ARG_DECL +#define LV1_7_IN_4_OUT_ARG_DECL LV1_7_IN_ARG_DECL, LV1_4_OUT_ARG_DECL + +#define LV1_0_IN_5_OUT_ARG_DECL LV1_5_OUT_ARG_DECL +#define LV1_1_IN_5_OUT_ARG_DECL LV1_1_IN_ARG_DECL, LV1_5_OUT_ARG_DECL +#define LV1_2_IN_5_OUT_ARG_DECL LV1_2_IN_ARG_DECL, LV1_5_OUT_ARG_DECL +#define LV1_3_IN_5_OUT_ARG_DECL LV1_3_IN_ARG_DECL, LV1_5_OUT_ARG_DECL +#define LV1_4_IN_5_OUT_ARG_DECL LV1_4_IN_ARG_DECL, LV1_5_OUT_ARG_DECL +#define LV1_5_IN_5_OUT_ARG_DECL LV1_5_IN_ARG_DECL, LV1_5_OUT_ARG_DECL +#define LV1_6_IN_5_OUT_ARG_DECL LV1_6_IN_ARG_DECL, LV1_5_OUT_ARG_DECL +#define LV1_7_IN_5_OUT_ARG_DECL LV1_7_IN_ARG_DECL, LV1_5_OUT_ARG_DECL + +#define LV1_0_IN_6_OUT_ARG_DECL LV1_6_OUT_ARG_DECL +#define LV1_1_IN_6_OUT_ARG_DECL LV1_1_IN_ARG_DECL, LV1_6_OUT_ARG_DECL +#define LV1_2_IN_6_OUT_ARG_DECL LV1_2_IN_ARG_DECL, LV1_6_OUT_ARG_DECL +#define LV1_3_IN_6_OUT_ARG_DECL LV1_3_IN_ARG_DECL, LV1_6_OUT_ARG_DECL +#define LV1_4_IN_6_OUT_ARG_DECL LV1_4_IN_ARG_DECL, LV1_6_OUT_ARG_DECL +#define LV1_5_IN_6_OUT_ARG_DECL LV1_5_IN_ARG_DECL, LV1_6_OUT_ARG_DECL +#define LV1_6_IN_6_OUT_ARG_DECL LV1_6_IN_ARG_DECL, LV1_6_OUT_ARG_DECL +#define LV1_7_IN_6_OUT_ARG_DECL LV1_7_IN_ARG_DECL, LV1_6_OUT_ARG_DECL + +#define LV1_0_IN_7_OUT_ARG_DECL LV1_7_OUT_ARG_DECL +#define LV1_1_IN_7_OUT_ARG_DECL LV1_1_IN_ARG_DECL, LV1_7_OUT_ARG_DECL +#define LV1_2_IN_7_OUT_ARG_DECL LV1_2_IN_ARG_DECL, LV1_7_OUT_ARG_DECL +#define LV1_3_IN_7_OUT_ARG_DECL LV1_3_IN_ARG_DECL, LV1_7_OUT_ARG_DECL +#define LV1_4_IN_7_OUT_ARG_DECL LV1_4_IN_ARG_DECL, LV1_7_OUT_ARG_DECL +#define LV1_5_IN_7_OUT_ARG_DECL LV1_5_IN_ARG_DECL, LV1_7_OUT_ARG_DECL +#define LV1_6_IN_7_OUT_ARG_DECL LV1_6_IN_ARG_DECL, LV1_7_OUT_ARG_DECL +#define LV1_7_IN_7_OUT_ARG_DECL LV1_7_IN_ARG_DECL, LV1_7_OUT_ARG_DECL + +#define LV1_1_IN_ARGS in_1 +#define LV1_2_IN_ARGS LV1_1_IN_ARGS, in_2 +#define LV1_3_IN_ARGS LV1_2_IN_ARGS, in_3 +#define LV1_4_IN_ARGS LV1_3_IN_ARGS, in_4 +#define LV1_5_IN_ARGS LV1_4_IN_ARGS, in_5 +#define LV1_6_IN_ARGS LV1_5_IN_ARGS, in_6 +#define LV1_7_IN_ARGS LV1_6_IN_ARGS, in_7 +#define LV1_8_IN_ARGS LV1_7_IN_ARGS, in_8 + +#define LV1_1_OUT_ARGS out_1 +#define LV1_2_OUT_ARGS LV1_1_OUT_ARGS, out_2 +#define LV1_3_OUT_ARGS LV1_2_OUT_ARGS, out_3 +#define LV1_4_OUT_ARGS LV1_3_OUT_ARGS, out_4 +#define LV1_5_OUT_ARGS LV1_4_OUT_ARGS, out_5 +#define LV1_6_OUT_ARGS LV1_5_OUT_ARGS, out_6 +#define LV1_7_OUT_ARGS LV1_6_OUT_ARGS, out_7 + +#define LV1_0_IN_0_OUT_ARGS +#define LV1_1_IN_0_OUT_ARGS LV1_1_IN_ARGS +#define LV1_2_IN_0_OUT_ARGS LV1_2_IN_ARGS +#define LV1_3_IN_0_OUT_ARGS LV1_3_IN_ARGS +#define LV1_4_IN_0_OUT_ARGS LV1_4_IN_ARGS +#define LV1_5_IN_0_OUT_ARGS LV1_5_IN_ARGS +#define LV1_6_IN_0_OUT_ARGS LV1_6_IN_ARGS +#define LV1_7_IN_0_OUT_ARGS LV1_7_IN_ARGS + +#define LV1_0_IN_1_OUT_ARGS LV1_1_OUT_ARGS +#define LV1_1_IN_1_OUT_ARGS LV1_1_IN_ARGS, LV1_1_OUT_ARGS +#define LV1_2_IN_1_OUT_ARGS LV1_2_IN_ARGS, LV1_1_OUT_ARGS +#define LV1_3_IN_1_OUT_ARGS LV1_3_IN_ARGS, LV1_1_OUT_ARGS +#define LV1_4_IN_1_OUT_ARGS LV1_4_IN_ARGS, LV1_1_OUT_ARGS +#define LV1_5_IN_1_OUT_ARGS LV1_5_IN_ARGS, LV1_1_OUT_ARGS +#define LV1_6_IN_1_OUT_ARGS LV1_6_IN_ARGS, LV1_1_OUT_ARGS +#define LV1_7_IN_1_OUT_ARGS LV1_7_IN_ARGS, LV1_1_OUT_ARGS +#define LV1_8_IN_1_OUT_ARGS LV1_8_IN_ARGS, LV1_1_OUT_ARGS + +#define LV1_0_IN_2_OUT_ARGS LV1_2_OUT_ARGS +#define LV1_1_IN_2_OUT_ARGS LV1_1_IN_ARGS, LV1_2_OUT_ARGS +#define LV1_2_IN_2_OUT_ARGS LV1_2_IN_ARGS, LV1_2_OUT_ARGS +#define LV1_3_IN_2_OUT_ARGS LV1_3_IN_ARGS, LV1_2_OUT_ARGS +#define LV1_4_IN_2_OUT_ARGS LV1_4_IN_ARGS, LV1_2_OUT_ARGS +#define LV1_5_IN_2_OUT_ARGS LV1_5_IN_ARGS, LV1_2_OUT_ARGS +#define LV1_6_IN_2_OUT_ARGS LV1_6_IN_ARGS, LV1_2_OUT_ARGS +#define LV1_7_IN_2_OUT_ARGS LV1_7_IN_ARGS, LV1_2_OUT_ARGS + +#define LV1_0_IN_3_OUT_ARGS LV1_3_OUT_ARGS +#define LV1_1_IN_3_OUT_ARGS LV1_1_IN_ARGS, LV1_3_OUT_ARGS +#define LV1_2_IN_3_OUT_ARGS LV1_2_IN_ARGS, LV1_3_OUT_ARGS +#define LV1_3_IN_3_OUT_ARGS LV1_3_IN_ARGS, LV1_3_OUT_ARGS +#define LV1_4_IN_3_OUT_ARGS LV1_4_IN_ARGS, LV1_3_OUT_ARGS +#define LV1_5_IN_3_OUT_ARGS LV1_5_IN_ARGS, LV1_3_OUT_ARGS +#define LV1_6_IN_3_OUT_ARGS LV1_6_IN_ARGS, LV1_3_OUT_ARGS +#define LV1_7_IN_3_OUT_ARGS LV1_7_IN_ARGS, LV1_3_OUT_ARGS + +#define LV1_0_IN_4_OUT_ARGS LV1_4_OUT_ARGS +#define LV1_1_IN_4_OUT_ARGS LV1_1_IN_ARGS, LV1_4_OUT_ARGS +#define LV1_2_IN_4_OUT_ARGS LV1_2_IN_ARGS, LV1_4_OUT_ARGS +#define LV1_3_IN_4_OUT_ARGS LV1_3_IN_ARGS, LV1_4_OUT_ARGS +#define LV1_4_IN_4_OUT_ARGS LV1_4_IN_ARGS, LV1_4_OUT_ARGS +#define LV1_5_IN_4_OUT_ARGS LV1_5_IN_ARGS, LV1_4_OUT_ARGS +#define LV1_6_IN_4_OUT_ARGS LV1_6_IN_ARGS, LV1_4_OUT_ARGS +#define LV1_7_IN_4_OUT_ARGS LV1_7_IN_ARGS, LV1_4_OUT_ARGS + +#define LV1_0_IN_5_OUT_ARGS LV1_5_OUT_ARGS +#define LV1_1_IN_5_OUT_ARGS LV1_1_IN_ARGS, LV1_5_OUT_ARGS +#define LV1_2_IN_5_OUT_ARGS LV1_2_IN_ARGS, LV1_5_OUT_ARGS +#define LV1_3_IN_5_OUT_ARGS LV1_3_IN_ARGS, LV1_5_OUT_ARGS +#define LV1_4_IN_5_OUT_ARGS LV1_4_IN_ARGS, LV1_5_OUT_ARGS +#define LV1_5_IN_5_OUT_ARGS LV1_5_IN_ARGS, LV1_5_OUT_ARGS +#define LV1_6_IN_5_OUT_ARGS LV1_6_IN_ARGS, LV1_5_OUT_ARGS +#define LV1_7_IN_5_OUT_ARGS LV1_7_IN_ARGS, LV1_5_OUT_ARGS + +#define LV1_0_IN_6_OUT_ARGS LV1_6_OUT_ARGS +#define LV1_1_IN_6_OUT_ARGS LV1_1_IN_ARGS, LV1_6_OUT_ARGS +#define LV1_2_IN_6_OUT_ARGS LV1_2_IN_ARGS, LV1_6_OUT_ARGS +#define LV1_3_IN_6_OUT_ARGS LV1_3_IN_ARGS, LV1_6_OUT_ARGS +#define LV1_4_IN_6_OUT_ARGS LV1_4_IN_ARGS, LV1_6_OUT_ARGS +#define LV1_5_IN_6_OUT_ARGS LV1_5_IN_ARGS, LV1_6_OUT_ARGS +#define LV1_6_IN_6_OUT_ARGS LV1_6_IN_ARGS, LV1_6_OUT_ARGS +#define LV1_7_IN_6_OUT_ARGS LV1_7_IN_ARGS, LV1_6_OUT_ARGS + +#define LV1_0_IN_7_OUT_ARGS LV1_7_OUT_ARGS +#define LV1_1_IN_7_OUT_ARGS LV1_1_IN_ARGS, LV1_7_OUT_ARGS +#define LV1_2_IN_7_OUT_ARGS LV1_2_IN_ARGS, LV1_7_OUT_ARGS +#define LV1_3_IN_7_OUT_ARGS LV1_3_IN_ARGS, LV1_7_OUT_ARGS +#define LV1_4_IN_7_OUT_ARGS LV1_4_IN_ARGS, LV1_7_OUT_ARGS +#define LV1_5_IN_7_OUT_ARGS LV1_5_IN_ARGS, LV1_7_OUT_ARGS +#define LV1_6_IN_7_OUT_ARGS LV1_6_IN_ARGS, LV1_7_OUT_ARGS +#define LV1_7_IN_7_OUT_ARGS LV1_7_IN_ARGS, LV1_7_OUT_ARGS + +/* + * This LV1_CALL() macro is for use by callers. It expands into an + * inline call wrapper and an underscored HV call declaration. The + * wrapper can be used to instrument the lv1 call interface. The + * file lv1call.S defines its own LV1_CALL() macro to expand into + * the actual underscored call definition. + */ + +#if !defined(LV1_CALL) +#define LV1_CALL(name, in, out, num) \ + extern s64 _lv1_##name(LV1_##in##_IN_##out##_OUT_ARG_DECL); \ + static inline int lv1_##name(LV1_##in##_IN_##out##_OUT_ARG_DECL) \ + {return _lv1_##name(LV1_##in##_IN_##out##_OUT_ARGS);} +#endif + +#endif /* !defined(__ASSEMBLY__) */ + +/* lv1 call table */ + +LV1_CALL(allocate_memory, 4, 2, 0 ) +LV1_CALL(write_htab_entry, 4, 0, 1 ) +LV1_CALL(construct_virtual_address_space, 3, 2, 2 ) +LV1_CALL(invalidate_htab_entries, 5, 0, 3 ) +LV1_CALL(get_virtual_address_space_id_of_ppe, 1, 1, 4 ) +LV1_CALL(query_logical_partition_address_region_info, 1, 5, 6 ) +LV1_CALL(select_virtual_address_space, 1, 0, 7 ) +LV1_CALL(pause, 1, 0, 9 ) +LV1_CALL(destruct_virtual_address_space, 1, 0, 10 ) +LV1_CALL(configure_irq_state_bitmap, 3, 0, 11 ) +LV1_CALL(connect_irq_plug_ext, 5, 0, 12 ) +LV1_CALL(release_memory, 1, 0, 13 ) +LV1_CALL(disconnect_irq_plug_ext, 3, 0, 17 ) +LV1_CALL(construct_event_receive_port, 0, 1, 18 ) +LV1_CALL(destruct_event_receive_port, 1, 0, 19 ) +LV1_CALL(send_event_locally, 1, 0, 24 ) +LV1_CALL(end_of_interrupt, 1, 0, 27 ) +LV1_CALL(connect_irq_plug, 2, 0, 28 ) +LV1_CALL(disconnect_irq_plug, 1, 0, 29 ) +LV1_CALL(end_of_interrupt_ext, 3, 0, 30 ) +LV1_CALL(did_update_interrupt_mask, 2, 0, 31 ) +LV1_CALL(shutdown_logical_partition, 1, 0, 44 ) +LV1_CALL(destruct_logical_spe, 1, 0, 54 ) +LV1_CALL(construct_logical_spe, 7, 6, 57 ) +LV1_CALL(set_spe_interrupt_mask, 3, 0, 61 ) +LV1_CALL(set_spe_transition_notifier, 3, 0, 64 ) +LV1_CALL(disable_logical_spe, 2, 0, 65 ) +LV1_CALL(clear_spe_interrupt_status, 4, 0, 66 ) +LV1_CALL(get_spe_interrupt_status, 2, 1, 67 ) +LV1_CALL(get_logical_ppe_id, 0, 1, 69 ) +LV1_CALL(set_interrupt_mask, 5, 0, 73 ) +LV1_CALL(get_logical_partition_id, 0, 1, 74 ) +LV1_CALL(configure_execution_time_variable, 1, 0, 77 ) +LV1_CALL(get_spe_irq_outlet, 2, 1, 78 ) +LV1_CALL(set_spe_privilege_state_area_1_register, 3, 0, 79 ) +LV1_CALL(create_repository_node, 6, 0, 90 ) +LV1_CALL(get_repository_node_value, 5, 2, 91 ) +LV1_CALL(modify_repository_node_value, 6, 0, 92 ) +LV1_CALL(remove_repository_node, 4, 0, 93 ) +LV1_CALL(read_htab_entries, 2, 5, 95 ) +LV1_CALL(set_dabr, 2, 0, 96 ) +LV1_CALL(get_total_execution_time, 2, 1, 103 ) +LV1_CALL(construct_io_irq_outlet, 1, 1, 120 ) +LV1_CALL(destruct_io_irq_outlet, 1, 0, 121 ) +LV1_CALL(map_htab, 1, 1, 122 ) +LV1_CALL(unmap_htab, 1, 0, 123 ) +LV1_CALL(get_version_info, 0, 1, 127 ) +LV1_CALL(insert_htab_entry, 6, 3, 158 ) +LV1_CALL(read_virtual_uart, 3, 1, 162 ) +LV1_CALL(write_virtual_uart, 3, 1, 163 ) +LV1_CALL(set_virtual_uart_param, 3, 0, 164 ) +LV1_CALL(get_virtual_uart_param, 2, 1, 165 ) +LV1_CALL(configure_virtual_uart_irq, 1, 1, 166 ) +LV1_CALL(open_device, 3, 0, 170 ) +LV1_CALL(close_device, 2, 0, 171 ) +LV1_CALL(map_device_mmio_region, 5, 1, 172 ) +LV1_CALL(unmap_device_mmio_region, 3, 0, 173 ) +LV1_CALL(allocate_device_dma_region, 5, 1, 174 ) +LV1_CALL(free_device_dma_region, 3, 0, 175 ) +LV1_CALL(map_device_dma_region, 6, 0, 176 ) +LV1_CALL(unmap_device_dma_region, 4, 0, 177 ) +LV1_CALL(net_add_multicast_address, 4, 0, 185 ) +LV1_CALL(net_remove_multicast_address, 4, 0, 186 ) +LV1_CALL(net_start_tx_dma, 4, 0, 187 ) +LV1_CALL(net_stop_tx_dma, 3, 0, 188 ) +LV1_CALL(net_start_rx_dma, 4, 0, 189 ) +LV1_CALL(net_stop_rx_dma, 3, 0, 190 ) +LV1_CALL(net_set_interrupt_status_indicator, 4, 0, 191 ) +LV1_CALL(net_set_interrupt_mask, 4, 0, 193 ) +LV1_CALL(net_control, 6, 2, 194 ) +LV1_CALL(connect_interrupt_event_receive_port, 4, 0, 197 ) +LV1_CALL(disconnect_interrupt_event_receive_port, 4, 0, 198 ) +LV1_CALL(get_spe_all_interrupt_statuses, 1, 1, 199 ) +LV1_CALL(deconfigure_virtual_uart_irq, 0, 0, 202 ) +LV1_CALL(enable_logical_spe, 2, 0, 207 ) +LV1_CALL(gpu_open, 1, 0, 210 ) +LV1_CALL(gpu_close, 0, 0, 211 ) +LV1_CALL(gpu_device_map, 1, 2, 212 ) +LV1_CALL(gpu_device_unmap, 1, 0, 213 ) +LV1_CALL(gpu_memory_allocate, 5, 2, 214 ) +LV1_CALL(gpu_memory_free, 1, 0, 216 ) +LV1_CALL(gpu_context_allocate, 2, 5, 217 ) +LV1_CALL(gpu_context_free, 1, 0, 218 ) +LV1_CALL(gpu_context_iomap, 5, 0, 221 ) +LV1_CALL(gpu_context_attribute, 6, 0, 225 ) +LV1_CALL(gpu_context_intr, 1, 1, 227 ) +LV1_CALL(gpu_attribute, 5, 0, 228 ) +LV1_CALL(get_rtc, 0, 2, 232 ) +LV1_CALL(set_ppe_periodic_tracer_frequency, 1, 0, 240 ) +LV1_CALL(start_ppe_periodic_tracer, 5, 0, 241 ) +LV1_CALL(stop_ppe_periodic_tracer, 1, 1, 242 ) +LV1_CALL(storage_read, 6, 1, 245 ) +LV1_CALL(storage_write, 6, 1, 246 ) +LV1_CALL(storage_send_device_command, 6, 1, 248 ) +LV1_CALL(storage_get_async_status, 1, 2, 249 ) +LV1_CALL(storage_check_async_status, 2, 1, 254 ) +LV1_CALL(panic, 1, 0, 255 ) +LV1_CALL(construct_lpm, 6, 3, 140 ) +LV1_CALL(destruct_lpm, 1, 0, 141 ) +LV1_CALL(start_lpm, 1, 0, 142 ) +LV1_CALL(stop_lpm, 1, 1, 143 ) +LV1_CALL(copy_lpm_trace_buffer, 3, 1, 144 ) +LV1_CALL(add_lpm_event_bookmark, 5, 0, 145 ) +LV1_CALL(delete_lpm_event_bookmark, 3, 0, 146 ) +LV1_CALL(set_lpm_interrupt_mask, 3, 1, 147 ) +LV1_CALL(get_lpm_interrupt_status, 1, 1, 148 ) +LV1_CALL(set_lpm_general_control, 5, 2, 149 ) +LV1_CALL(set_lpm_interval, 3, 1, 150 ) +LV1_CALL(set_lpm_trigger_control, 3, 1, 151 ) +LV1_CALL(set_lpm_counter_control, 4, 1, 152 ) +LV1_CALL(set_lpm_group_control, 3, 1, 153 ) +LV1_CALL(set_lpm_debug_bus_control, 3, 1, 154 ) +LV1_CALL(set_lpm_counter, 5, 2, 155 ) +LV1_CALL(set_lpm_signal, 7, 0, 156 ) +LV1_CALL(set_lpm_spr_trigger, 2, 0, 157 ) + +#endif diff --git a/include/asm-powerpc/machdep.h b/include/asm-powerpc/machdep.h index dac90dc341c..1b04e572354 100644 --- a/include/asm-powerpc/machdep.h +++ b/include/asm-powerpc/machdep.h @@ -26,6 +26,7 @@ struct device_node; struct iommu_table; struct rtc_time; struct file; +struct pci_controller; #ifdef CONFIG_KEXEC struct kimage; #endif @@ -84,9 +85,12 @@ struct machdep_calls { unsigned long (*tce_get)(struct iommu_table *tbl, long index); void (*tce_flush)(struct iommu_table *tbl); - void (*iommu_dev_setup)(struct pci_dev *dev); - void (*iommu_bus_setup)(struct pci_bus *bus); - void (*irq_bus_setup)(struct pci_bus *bus); + void (*pci_dma_dev_setup)(struct pci_dev *dev); + void (*pci_dma_bus_setup)(struct pci_bus *bus); + + void __iomem * (*ioremap)(phys_addr_t addr, unsigned long size, + unsigned long flags); + void (*iounmap)(volatile void __iomem *token); #endif /* CONFIG_PPC64 */ int (*probe)(void); @@ -106,6 +110,10 @@ struct machdep_calls { /* Called after scanning the bus, before allocating resources */ void (*pcibios_fixup)(void); int (*pci_probe_mode)(struct pci_bus *); + void (*pci_irq_fixup)(struct pci_dev *dev); + + /* To setup PHBs when using automatic OF platform driver for PCI */ + int (*pci_setup_phb)(struct pci_controller *host); void (*restart)(char *cmd); void (*power_off)(void); @@ -199,10 +207,6 @@ struct machdep_calls { * Returns 0 to allow assignment/enabling of the device. */ int (*pcibios_enable_device_hook)(struct pci_dev *, int initial); - /* For interrupt routing */ - unsigned char (*pci_swizzle)(struct pci_dev *, unsigned char *); - int (*pci_map_irq)(struct pci_dev *, unsigned char, unsigned char); - /* Called in indirect_* to avoid touching devices */ int (*pci_exclude_device)(unsigned char, unsigned char); diff --git a/include/asm-powerpc/mmu.h b/include/asm-powerpc/mmu.h index c3fc7a28e3c..41c8c9c5a25 100644 --- a/include/asm-powerpc/mmu.h +++ b/include/asm-powerpc/mmu.h @@ -248,21 +248,6 @@ extern void hpte_init_native(void); extern void hpte_init_lpar(void); extern void hpte_init_iSeries(void); -extern long pSeries_lpar_hpte_insert(unsigned long hpte_group, - unsigned long va, unsigned long prpn, - unsigned long rflags, - unsigned long vflags, int psize); - -extern long native_hpte_insert(unsigned long hpte_group, - unsigned long va, unsigned long prpn, - unsigned long rflags, - unsigned long vflags, int psize); - -extern long iSeries_hpte_insert(unsigned long hpte_group, - unsigned long va, unsigned long prpn, - unsigned long rflags, - unsigned long vflags, int psize); - extern void stabs_alloc(void); extern void slb_initialize(void); extern void slb_flush_and_rebolt(void); diff --git a/include/asm-powerpc/module.h b/include/asm-powerpc/module.h index 584fabfb4f0..e5f14b13ccf 100644 --- a/include/asm-powerpc/module.h +++ b/include/asm-powerpc/module.h @@ -46,8 +46,6 @@ struct mod_arch_specific { unsigned int num_bugs; }; -extern struct bug_entry *module_find_bug(unsigned long bugaddr); - /* * Select ELF headers. * Make empty section for module_frob_arch_sections to expand. diff --git a/include/asm-powerpc/mpc52xx.h b/include/asm-powerpc/mpc52xx.h new file mode 100644 index 00000000000..4560d72fc75 --- /dev/null +++ b/include/asm-powerpc/mpc52xx.h @@ -0,0 +1,255 @@ +/* + * Prototypes, etc. for the Freescale MPC52xx embedded cpu chips + * May need to be cleaned as the port goes on ... + * + * Copyright (C) 2004-2005 Sylvain Munaut <tnt@246tNt.com> + * Copyright (C) 2003 MontaVista, Software, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#ifndef __ASM_POWERPC_MPC52xx_H__ +#define __ASM_POWERPC_MPC52xx_H__ + +#ifndef __ASSEMBLY__ +#include <asm/types.h> +#include <asm/prom.h> +#endif /* __ASSEMBLY__ */ + + +/* ======================================================================== */ +/* Structures mapping of some unit register set */ +/* ======================================================================== */ + +#ifndef __ASSEMBLY__ + +/* Memory Mapping Control */ +struct mpc52xx_mmap_ctl { + u32 mbar; /* MMAP_CTRL + 0x00 */ + + u32 cs0_start; /* MMAP_CTRL + 0x04 */ + u32 cs0_stop; /* MMAP_CTRL + 0x08 */ + u32 cs1_start; /* MMAP_CTRL + 0x0c */ + u32 cs1_stop; /* MMAP_CTRL + 0x10 */ + u32 cs2_start; /* MMAP_CTRL + 0x14 */ + u32 cs2_stop; /* MMAP_CTRL + 0x18 */ + u32 cs3_start; /* MMAP_CTRL + 0x1c */ + u32 cs3_stop; /* MMAP_CTRL + 0x20 */ + u32 cs4_start; /* MMAP_CTRL + 0x24 */ + u32 cs4_stop; /* MMAP_CTRL + 0x28 */ + u32 cs5_start; /* MMAP_CTRL + 0x2c */ + u32 cs5_stop; /* MMAP_CTRL + 0x30 */ + + u32 sdram0; /* MMAP_CTRL + 0x34 */ + u32 sdram1; /* MMAP_CTRL + 0X38 */ + + u32 reserved[4]; /* MMAP_CTRL + 0x3c .. 0x48 */ + + u32 boot_start; /* MMAP_CTRL + 0x4c */ + u32 boot_stop; /* MMAP_CTRL + 0x50 */ + + u32 ipbi_ws_ctrl; /* MMAP_CTRL + 0x54 */ + + u32 cs6_start; /* MMAP_CTRL + 0x58 */ + u32 cs6_stop; /* MMAP_CTRL + 0x5c */ + u32 cs7_start; /* MMAP_CTRL + 0x60 */ + u32 cs7_stop; /* MMAP_CTRL + 0x64 */ +}; + +/* SDRAM control */ +struct mpc52xx_sdram { + u32 mode; /* SDRAM + 0x00 */ + u32 ctrl; /* SDRAM + 0x04 */ + u32 config1; /* SDRAM + 0x08 */ + u32 config2; /* SDRAM + 0x0c */ +}; + +/* SDMA */ +struct mpc52xx_sdma { + u32 taskBar; /* SDMA + 0x00 */ + u32 currentPointer; /* SDMA + 0x04 */ + u32 endPointer; /* SDMA + 0x08 */ + u32 variablePointer; /* SDMA + 0x0c */ + + u8 IntVect1; /* SDMA + 0x10 */ + u8 IntVect2; /* SDMA + 0x11 */ + u16 PtdCntrl; /* SDMA + 0x12 */ + + u32 IntPend; /* SDMA + 0x14 */ + u32 IntMask; /* SDMA + 0x18 */ + + u16 tcr[16]; /* SDMA + 0x1c .. 0x3a */ + + u8 ipr[32]; /* SDMA + 0x3c .. 0x5b */ + + u32 cReqSelect; /* SDMA + 0x5c */ + u32 task_size0; /* SDMA + 0x60 */ + u32 task_size1; /* SDMA + 0x64 */ + u32 MDEDebug; /* SDMA + 0x68 */ + u32 ADSDebug; /* SDMA + 0x6c */ + u32 Value1; /* SDMA + 0x70 */ + u32 Value2; /* SDMA + 0x74 */ + u32 Control; /* SDMA + 0x78 */ + u32 Status; /* SDMA + 0x7c */ + u32 PTDDebug; /* SDMA + 0x80 */ +}; + +/* GPT */ +struct mpc52xx_gpt { + u32 mode; /* GPTx + 0x00 */ + u32 count; /* GPTx + 0x04 */ + u32 pwm; /* GPTx + 0x08 */ + u32 status; /* GPTx + 0X0c */ +}; + +/* GPIO */ +struct mpc52xx_gpio { + u32 port_config; /* GPIO + 0x00 */ + u32 simple_gpioe; /* GPIO + 0x04 */ + u32 simple_ode; /* GPIO + 0x08 */ + u32 simple_ddr; /* GPIO + 0x0c */ + u32 simple_dvo; /* GPIO + 0x10 */ + u32 simple_ival; /* GPIO + 0x14 */ + u8 outo_gpioe; /* GPIO + 0x18 */ + u8 reserved1[3]; /* GPIO + 0x19 */ + u8 outo_dvo; /* GPIO + 0x1c */ + u8 reserved2[3]; /* GPIO + 0x1d */ + u8 sint_gpioe; /* GPIO + 0x20 */ + u8 reserved3[3]; /* GPIO + 0x21 */ + u8 sint_ode; /* GPIO + 0x24 */ + u8 reserved4[3]; /* GPIO + 0x25 */ + u8 sint_ddr; /* GPIO + 0x28 */ + u8 reserved5[3]; /* GPIO + 0x29 */ + u8 sint_dvo; /* GPIO + 0x2c */ + u8 reserved6[3]; /* GPIO + 0x2d */ + u8 sint_inten; /* GPIO + 0x30 */ + u8 reserved7[3]; /* GPIO + 0x31 */ + u16 sint_itype; /* GPIO + 0x34 */ + u16 reserved8; /* GPIO + 0x36 */ + u8 gpio_control; /* GPIO + 0x38 */ + u8 reserved9[3]; /* GPIO + 0x39 */ + u8 sint_istat; /* GPIO + 0x3c */ + u8 sint_ival; /* GPIO + 0x3d */ + u8 bus_errs; /* GPIO + 0x3e */ + u8 reserved10; /* GPIO + 0x3f */ +}; + +#define MPC52xx_GPIO_PSC_CONFIG_UART_WITHOUT_CD 4 +#define MPC52xx_GPIO_PSC_CONFIG_UART_WITH_CD 5 +#define MPC52xx_GPIO_PCI_DIS (1<<15) + +/* GPIO with WakeUp*/ +struct mpc52xx_gpio_wkup { + u8 wkup_gpioe; /* GPIO_WKUP + 0x00 */ + u8 reserved1[3]; /* GPIO_WKUP + 0x03 */ + u8 wkup_ode; /* GPIO_WKUP + 0x04 */ + u8 reserved2[3]; /* GPIO_WKUP + 0x05 */ + u8 wkup_ddr; /* GPIO_WKUP + 0x08 */ + u8 reserved3[3]; /* GPIO_WKUP + 0x09 */ + u8 wkup_dvo; /* GPIO_WKUP + 0x0C */ + u8 reserved4[3]; /* GPIO_WKUP + 0x0D */ + u8 wkup_inten; /* GPIO_WKUP + 0x10 */ + u8 reserved5[3]; /* GPIO_WKUP + 0x11 */ + u8 wkup_iinten; /* GPIO_WKUP + 0x14 */ + u8 reserved6[3]; /* GPIO_WKUP + 0x15 */ + u16 wkup_itype; /* GPIO_WKUP + 0x18 */ + u8 reserved7[2]; /* GPIO_WKUP + 0x1A */ + u8 wkup_maste; /* GPIO_WKUP + 0x1C */ + u8 reserved8[3]; /* GPIO_WKUP + 0x1D */ + u8 wkup_ival; /* GPIO_WKUP + 0x20 */ + u8 reserved9[3]; /* GPIO_WKUP + 0x21 */ + u8 wkup_istat; /* GPIO_WKUP + 0x24 */ + u8 reserved10[3]; /* GPIO_WKUP + 0x25 */ +}; + +/* XLB Bus control */ +struct mpc52xx_xlb { + u8 reserved[0x40]; + u32 config; /* XLB + 0x40 */ + u32 version; /* XLB + 0x44 */ + u32 status; /* XLB + 0x48 */ + u32 int_enable; /* XLB + 0x4c */ + u32 addr_capture; /* XLB + 0x50 */ + u32 bus_sig_capture; /* XLB + 0x54 */ + u32 addr_timeout; /* XLB + 0x58 */ + u32 data_timeout; /* XLB + 0x5c */ + u32 bus_act_timeout; /* XLB + 0x60 */ + u32 master_pri_enable; /* XLB + 0x64 */ + u32 master_priority; /* XLB + 0x68 */ + u32 base_address; /* XLB + 0x6c */ + u32 snoop_window; /* XLB + 0x70 */ +}; + +#define MPC52xx_XLB_CFG_PLDIS (1 << 31) +#define MPC52xx_XLB_CFG_SNOOP (1 << 15) + +/* Clock Distribution control */ +struct mpc52xx_cdm { + u32 jtag_id; /* CDM + 0x00 reg0 read only */ + u32 rstcfg; /* CDM + 0x04 reg1 read only */ + u32 breadcrumb; /* CDM + 0x08 reg2 */ + + u8 mem_clk_sel; /* CDM + 0x0c reg3 byte0 */ + u8 xlb_clk_sel; /* CDM + 0x0d reg3 byte1 read only */ + u8 ipb_clk_sel; /* CDM + 0x0e reg3 byte2 */ + u8 pci_clk_sel; /* CDM + 0x0f reg3 byte3 */ + + u8 ext_48mhz_en; /* CDM + 0x10 reg4 byte0 */ + u8 fd_enable; /* CDM + 0x11 reg4 byte1 */ + u16 fd_counters; /* CDM + 0x12 reg4 byte2,3 */ + + u32 clk_enables; /* CDM + 0x14 reg5 */ + + u8 osc_disable; /* CDM + 0x18 reg6 byte0 */ + u8 reserved0[3]; /* CDM + 0x19 reg6 byte1,2,3 */ + + u8 ccs_sleep_enable; /* CDM + 0x1c reg7 byte0 */ + u8 osc_sleep_enable; /* CDM + 0x1d reg7 byte1 */ + u8 reserved1; /* CDM + 0x1e reg7 byte2 */ + u8 ccs_qreq_test; /* CDM + 0x1f reg7 byte3 */ + + u8 soft_reset; /* CDM + 0x20 u8 byte0 */ + u8 no_ckstp; /* CDM + 0x21 u8 byte0 */ + u8 reserved2[2]; /* CDM + 0x22 u8 byte1,2,3 */ + + u8 pll_lock; /* CDM + 0x24 reg9 byte0 */ + u8 pll_looselock; /* CDM + 0x25 reg9 byte1 */ + u8 pll_sm_lockwin; /* CDM + 0x26 reg9 byte2 */ + u8 reserved3; /* CDM + 0x27 reg9 byte3 */ + + u16 reserved4; /* CDM + 0x28 reg10 byte0,1 */ + u16 mclken_div_psc1; /* CDM + 0x2a reg10 byte2,3 */ + + u16 reserved5; /* CDM + 0x2c reg11 byte0,1 */ + u16 mclken_div_psc2; /* CDM + 0x2e reg11 byte2,3 */ + + u16 reserved6; /* CDM + 0x30 reg12 byte0,1 */ + u16 mclken_div_psc3; /* CDM + 0x32 reg12 byte2,3 */ + + u16 reserved7; /* CDM + 0x34 reg13 byte0,1 */ + u16 mclken_div_psc6; /* CDM + 0x36 reg13 byte2,3 */ +}; + +#endif /* __ASSEMBLY__ */ + + +/* ========================================================================= */ +/* Prototypes for MPC52xx sysdev */ +/* ========================================================================= */ + +#ifndef __ASSEMBLY__ + +extern void __iomem * mpc52xx_find_and_map(const char *); +extern unsigned int mpc52xx_find_ipb_freq(struct device_node *node); +extern void mpc52xx_setup_cpu(void); +extern void mpc52xx_declare_of_platform_devices(void); + +extern void mpc52xx_init_irq(void); +extern unsigned int mpc52xx_get_irq(void); + +#endif /* __ASSEMBLY__ */ + +#endif /* __ASM_POWERPC_MPC52xx_H__ */ + diff --git a/include/asm-powerpc/mpc85xx.h b/include/asm-powerpc/mpc85xx.h index ccdb8a21138..54142997a58 100644 --- a/include/asm-powerpc/mpc85xx.h +++ b/include/asm-powerpc/mpc85xx.h @@ -31,14 +31,6 @@ #include <platforms/85xx/mpc85xx_cds.h> #endif -#define _IO_BASE isa_io_base -#define _ISA_MEM_BASE isa_mem_base -#ifdef CONFIG_PCI -#define PCI_DRAM_OFFSET pci_dram_offset -#else -#define PCI_DRAM_OFFSET 0 -#endif - /* Let modules/drivers get at CCSRBAR */ extern phys_addr_t get_ccsrbar(void); diff --git a/include/asm-powerpc/mpic.h b/include/asm-powerpc/mpic.h index ef0a5458d2b..b71e7b32a55 100644 --- a/include/asm-powerpc/mpic.h +++ b/include/asm-powerpc/mpic.h @@ -3,6 +3,7 @@ #ifdef __KERNEL__ #include <linux/irq.h> +#include <asm/dcr.h> /* * Global registers @@ -225,6 +226,23 @@ struct mpic_irq_fixup #endif /* CONFIG_MPIC_BROKEN_U3 */ +enum mpic_reg_type { + mpic_access_mmio_le, + mpic_access_mmio_be, +#ifdef CONFIG_PPC_DCR + mpic_access_dcr +#endif +}; + +struct mpic_reg_bank { + u32 __iomem *base; +#ifdef CONFIG_PPC_DCR + dcr_host_t dhost; + unsigned int dbase; + unsigned int doff; +#endif /* CONFIG_PPC_DCR */ +}; + /* The instance data of a given MPIC */ struct mpic { @@ -264,11 +282,18 @@ struct mpic spinlock_t fixup_lock; #endif + /* Register access method */ + enum mpic_reg_type reg_type; + /* The various ioremap'ed bases */ - volatile u32 __iomem *gregs; - volatile u32 __iomem *tmregs; - volatile u32 __iomem *cpuregs[MPIC_MAX_CPUS]; - volatile u32 __iomem *isus[MPIC_MAX_ISU]; + struct mpic_reg_bank gregs; + struct mpic_reg_bank tmregs; + struct mpic_reg_bank cpuregs[MPIC_MAX_CPUS]; + struct mpic_reg_bank isus[MPIC_MAX_ISU]; + +#ifdef CONFIG_PPC_DCR + unsigned int dcr_base; +#endif #ifdef CONFIG_MPIC_WEIRD /* Pointer to HW info array */ @@ -305,6 +330,8 @@ struct mpic #define MPIC_SPV_EOI 0x00000020 /* No passthrough disable */ #define MPIC_NO_PTHROU_DIS 0x00000040 +/* DCR based MPIC */ +#define MPIC_USES_DCR 0x00000080 /* MPIC HW modification ID */ #define MPIC_REGSET_MASK 0xf0000000 @@ -337,7 +364,7 @@ struct mpic * that is senses[0] correspond to linux irq "irq_offset". */ extern struct mpic *mpic_alloc(struct device_node *node, - unsigned long phys_addr, + phys_addr_t phys_addr, unsigned int flags, unsigned int isu_size, unsigned int irq_count, @@ -350,7 +377,7 @@ extern struct mpic *mpic_alloc(struct device_node *node, * @phys_addr: physical address of the ISU */ extern void mpic_assign_isu(struct mpic *mpic, unsigned int isu_num, - unsigned long phys_addr); + phys_addr_t phys_addr); /* Set default sense codes * diff --git a/include/asm-powerpc/of_device.h b/include/asm-powerpc/of_device.h index c5c0b0b3cd5..a889b2005bf 100644 --- a/include/asm-powerpc/of_device.h +++ b/include/asm-powerpc/of_device.h @@ -6,12 +6,6 @@ #include <linux/mod_devicetable.h> #include <asm/prom.h> -/* - * The of_platform_bus_type is a bus type used by drivers that do not - * attach to a macio or similar bus but still use OF probing - * mechanism - */ -extern struct bus_type of_platform_bus_type; /* * The of_device is a kind of "base class" that is a superset of @@ -20,46 +14,22 @@ extern struct bus_type of_platform_bus_type; */ struct of_device { - struct device_node *node; /* OF device node */ + struct device_node *node; /* to be obsoleted */ u64 dma_mask; /* DMA mask */ struct device dev; /* Generic device interface */ }; #define to_of_device(d) container_of(d, struct of_device, dev) +extern const struct of_device_id *of_match_node( + const struct of_device_id *matches, const struct device_node *node); extern const struct of_device_id *of_match_device( const struct of_device_id *matches, const struct of_device *dev); extern struct of_device *of_dev_get(struct of_device *dev); extern void of_dev_put(struct of_device *dev); -/* - * An of_platform_driver driver is attached to a basic of_device on - * the "platform bus" (of_platform_bus_type) - */ -struct of_platform_driver -{ - char *name; - struct of_device_id *match_table; - struct module *owner; - - int (*probe)(struct of_device* dev, const struct of_device_id *match); - int (*remove)(struct of_device* dev); - - int (*suspend)(struct of_device* dev, pm_message_t state); - int (*resume)(struct of_device* dev); - int (*shutdown)(struct of_device* dev); - - struct device_driver driver; -}; -#define to_of_platform_driver(drv) container_of(drv,struct of_platform_driver, driver) - -extern int of_register_driver(struct of_platform_driver *drv); -extern void of_unregister_driver(struct of_platform_driver *drv); extern int of_device_register(struct of_device *ofdev); extern void of_device_unregister(struct of_device *ofdev); -extern struct of_device *of_platform_device_create(struct device_node *np, - const char *bus_id, - struct device *parent); extern void of_release_dev(struct device *dev); #endif /* __KERNEL__ */ diff --git a/include/asm-powerpc/of_platform.h b/include/asm-powerpc/of_platform.h new file mode 100644 index 00000000000..217eafb167e --- /dev/null +++ b/include/asm-powerpc/of_platform.h @@ -0,0 +1,60 @@ +/* + * Copyright (C) 2006 Benjamin Herrenschmidt, IBM Corp. + * <benh@kernel.crashing.org> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + * + */ + +#include <asm/of_device.h> + +/* + * The of_platform_bus_type is a bus type used by drivers that do not + * attach to a macio or similar bus but still use OF probing + * mechanism + */ +extern struct bus_type of_platform_bus_type; + +/* + * An of_platform_driver driver is attached to a basic of_device on + * the "platform bus" (of_platform_bus_type) + */ +struct of_platform_driver +{ + char *name; + struct of_device_id *match_table; + struct module *owner; + + int (*probe)(struct of_device* dev, + const struct of_device_id *match); + int (*remove)(struct of_device* dev); + + int (*suspend)(struct of_device* dev, pm_message_t state); + int (*resume)(struct of_device* dev); + int (*shutdown)(struct of_device* dev); + + struct device_driver driver; +}; +#define to_of_platform_driver(drv) \ + container_of(drv,struct of_platform_driver, driver) + +/* Platform drivers register/unregister */ +extern int of_register_platform_driver(struct of_platform_driver *drv); +extern void of_unregister_platform_driver(struct of_platform_driver *drv); + +/* Platform devices and busses creation */ +extern struct of_device *of_platform_device_create(struct device_node *np, + const char *bus_id, + struct device *parent); +/* pseudo "matches" value to not do deep probe */ +#define OF_NO_DEEP_PROBE ((struct of_device_id *)-1) + +extern int of_platform_bus_probe(struct device_node *root, + struct of_device_id *matches, + struct device *parent); + +extern struct of_device *of_find_device_by_node(struct device_node *np); +extern struct of_device *of_find_device_by_phandle(phandle ph); diff --git a/include/asm-powerpc/oprofile_impl.h b/include/asm-powerpc/oprofile_impl.h index 07a10e590c1..71043bf3641 100644 --- a/include/asm-powerpc/oprofile_impl.h +++ b/include/asm-powerpc/oprofile_impl.h @@ -44,7 +44,9 @@ struct op_powerpc_model { int num_counters); void (*cpu_setup) (struct op_counter_config *); void (*start) (struct op_counter_config *); + void (*global_start) (struct op_counter_config *); void (*stop) (void); + void (*global_stop) (void); void (*handle_interrupt) (struct pt_regs *, struct op_counter_config *); int num_counters; @@ -54,6 +56,7 @@ extern struct op_powerpc_model op_model_fsl_booke; extern struct op_powerpc_model op_model_rs64; extern struct op_powerpc_model op_model_power4; extern struct op_powerpc_model op_model_7450; +extern struct op_powerpc_model op_model_cell; #ifndef CONFIG_FSL_BOOKE diff --git a/include/asm-powerpc/paca.h b/include/asm-powerpc/paca.h index 0a4e5c93e8e..0d3adc09c84 100644 --- a/include/asm-powerpc/paca.h +++ b/include/asm-powerpc/paca.h @@ -93,7 +93,8 @@ struct paca_struct { u64 stab_rr; /* stab/slb round-robin counter */ u64 saved_r1; /* r1 save for RTAS calls */ u64 saved_msr; /* MSR saved here by enter_rtas */ - u8 proc_enabled; /* irq soft-enable flag */ + u8 soft_enabled; /* irq soft-enable flag */ + u8 hard_enabled; /* set if irqs are enabled in MSR */ u8 io_sync; /* writel() needs spin_unlock sync */ /* Stuff for accurate time accounting */ diff --git a/include/asm-powerpc/page_32.h b/include/asm-powerpc/page_32.h index 2677bad70f4..07f6d3cf5e5 100644 --- a/include/asm-powerpc/page_32.h +++ b/include/asm-powerpc/page_32.h @@ -26,15 +26,7 @@ extern void clear_pages(void *page, int order); static inline void clear_page(void *page) { clear_pages(page, 0); } extern void copy_page(void *to, void *from); -/* Pure 2^n version of get_order */ -extern __inline__ int get_order(unsigned long size) -{ - int lz; - - size = (size-1) >> PAGE_SHIFT; - asm ("cntlzw %0,%1" : "=r" (lz) : "r" (size)); - return 32 - lz; -} +#include <asm-generic/page.h> #endif /* __ASSEMBLY__ */ diff --git a/include/asm-powerpc/pci-bridge.h b/include/asm-powerpc/pci-bridge.h index 86ee46b09b8..cb02c9d1ef9 100644 --- a/include/asm-powerpc/pci-bridge.h +++ b/include/asm-powerpc/pci-bridge.h @@ -25,17 +25,18 @@ struct pci_controller { int node; void *arch_data; struct list_head list_node; + struct device *parent; int first_busno; int last_busno; void __iomem *io_base_virt; - unsigned long io_base_phys; + resource_size_t io_base_phys; /* Some machines have a non 1:1 mapping of * the PCI memory space in the CPU bus space */ - unsigned long pci_mem_offset; + resource_size_t pci_mem_offset; unsigned long pci_io_size; struct pci_ops *ops; diff --git a/include/asm-powerpc/pci.h b/include/asm-powerpc/pci.h index 46afd29b904..ac656ee6bb1 100644 --- a/include/asm-powerpc/pci.h +++ b/include/asm-powerpc/pci.h @@ -62,29 +62,23 @@ static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel) } #ifdef CONFIG_PPC64 -#define HAVE_ARCH_PCI_MWI 1 -static inline int pcibios_prep_mwi(struct pci_dev *dev) -{ - /* - * We would like to avoid touching the cacheline size or MWI bit - * but we cant do that with the current pcibios_prep_mwi - * interface. pSeries firmware sets the cacheline size (which is not - * the cpu cacheline size in all cases) and hardware treats MWI - * the same as memory write. So we dont touch the cacheline size - * here and allow the generic code to set the MWI bit. - */ - return 0; -} -extern struct dma_mapping_ops pci_dma_ops; +/* + * We want to avoid touching the cacheline size or MWI bit. + * pSeries firmware sets the cacheline size (which is not the cpu cacheline + * size in all cases) and hardware treats MWI the same as memory write. + */ +#define PCI_DISABLE_MWI + +extern struct dma_mapping_ops *pci_dma_ops; /* For DAC DMA, we currently don't support it by default, but * we let 64-bit platforms override this. */ static inline int pci_dac_dma_supported(struct pci_dev *hwdev,u64 mask) { - if (pci_dma_ops.dac_dma_supported) - return pci_dma_ops.dac_dma_supported(&hwdev->dev, mask); + if (pci_dma_ops && pci_dma_ops->dac_dma_supported) + return pci_dma_ops->dac_dma_supported(&hwdev->dev, mask); return 0; } @@ -149,8 +143,13 @@ int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma, /* Tell drivers/pci/proc.c that we have pci_mmap_page_range() */ #define HAVE_PCI_MMAP 1 -#ifdef CONFIG_PPC64 -/* pci_unmap_{single,page} is not a nop, thus... */ +#if defined(CONFIG_PPC64) || defined(CONFIG_NOT_COHERENT_CACHE) +/* + * For 64-bit kernels, pci_unmap_{single,page} is not a nop. + * For 32-bit non-coherent kernels, pci_dma_sync_single_for_cpu() and + * so on are not nops. + * and thus... + */ #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \ dma_addr_t ADDR_NAME; #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \ @@ -164,6 +163,20 @@ int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma, #define pci_unmap_len_set(PTR, LEN_NAME, VAL) \ (((PTR)->LEN_NAME) = (VAL)) +#else /* 32-bit && coherent */ + +/* pci_unmap_{page,single} is a nop so... */ +#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) +#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) +#define pci_unmap_addr(PTR, ADDR_NAME) (0) +#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0) +#define pci_unmap_len(PTR, LEN_NAME) (0) +#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) + +#endif /* CONFIG_PPC64 || CONFIG_NOT_COHERENT_CACHE */ + +#ifdef CONFIG_PPC64 + /* The PCI address space does not equal the physical memory address * space (we have an IOMMU). The IDE and SCSI device layers use * this boolean for bounce buffer decisions. @@ -178,16 +191,8 @@ int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma, */ #define PCI_DMA_BUS_IS_PHYS (1) -/* pci_unmap_{page,single} is a nop so... */ -#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) -#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) -#define pci_unmap_addr(PTR, ADDR_NAME) (0) -#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0) -#define pci_unmap_len(PTR, LEN_NAME) (0) -#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) - #endif /* CONFIG_PPC64 */ - + extern void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region, struct resource *res); @@ -216,6 +221,8 @@ extern int remap_bus_range(struct pci_bus *bus); extern void pcibios_fixup_device_resources(struct pci_dev *dev, struct pci_bus *bus); +extern void pcibios_setup_new_device(struct pci_dev *dev); + extern void pcibios_claim_one_bus(struct pci_bus *b); extern struct pci_controller *init_phb_dynamic(struct device_node *dn); @@ -238,12 +245,10 @@ extern pgprot_t pci_phys_mem_access_prot(struct file *file, unsigned long size, pgprot_t prot); -#if defined(CONFIG_PPC_MULTIPLATFORM) || defined(CONFIG_PPC32) #define HAVE_ARCH_PCI_RESOURCE_TO_USER extern void pci_resource_to_user(const struct pci_dev *dev, int bar, const struct resource *rsrc, resource_size_t *start, resource_size_t *end); -#endif /* CONFIG_PPC_MULTIPLATFORM || CONFIG_PPC32 */ #endif /* __KERNEL__ */ #endif /* __ASM_POWERPC_PCI_H */ diff --git a/include/asm-powerpc/pgalloc.h b/include/asm-powerpc/pgalloc.h index ae63db7b3e7..b0830db68f8 100644 --- a/include/asm-powerpc/pgalloc.h +++ b/include/asm-powerpc/pgalloc.h @@ -11,7 +11,7 @@ #include <linux/cpumask.h> #include <linux/percpu.h> -extern kmem_cache_t *pgtable_cache[]; +extern struct kmem_cache *pgtable_cache[]; #ifdef CONFIG_PPC_64K_PAGES #define PTE_CACHE_NUM 0 diff --git a/include/asm-powerpc/posix_types.h b/include/asm-powerpc/posix_types.h index c6391077224..2f2288f520b 100644 --- a/include/asm-powerpc/posix_types.h +++ b/include/asm-powerpc/posix_types.h @@ -60,7 +60,7 @@ typedef struct { #define __FD_CLR(d, set) ((set)->fds_bits[__FDELT(d)] &= ~__FDMASK(d)) #define __FD_ISSET(d, set) (((set)->fds_bits[__FDELT(d)] & __FDMASK(d)) != 0) #define __FD_ZERO(set) \ - ((void) memset ((__ptr_t) (set), 0, sizeof (__kernel_fd_set))) + ((void) memset ((void *) (set), 0, sizeof (__kernel_fd_set))) #else /* __GNUC__ */ diff --git a/include/asm-powerpc/ppc-pci.h b/include/asm-powerpc/ppc-pci.h index 1115756c79f..ab6eddb518c 100644 --- a/include/asm-powerpc/ppc-pci.h +++ b/include/asm-powerpc/ppc-pci.h @@ -36,18 +36,17 @@ typedef void *(*traverse_func)(struct device_node *me, void *data); void *traverse_pci_devices(struct device_node *start, traverse_func pre, void *data); -void pci_devs_phb_init(void); -void pci_devs_phb_init_dynamic(struct pci_controller *phb); -int setup_phb(struct device_node *dev, struct pci_controller *phb); -void __devinit scan_phb(struct pci_controller *hose); +extern void pci_devs_phb_init(void); +extern void pci_devs_phb_init_dynamic(struct pci_controller *phb); +extern void scan_phb(struct pci_controller *hose); /* From rtas_pci.h */ -void init_pci_config_tokens (void); -unsigned long get_phb_buid (struct device_node *); +extern void init_pci_config_tokens (void); +extern unsigned long get_phb_buid (struct device_node *); +extern int rtas_setup_phb(struct pci_controller *phb); /* From pSeries_pci.h */ extern void pSeries_final_fixup(void); -extern void pSeries_irq_bus_setup(struct pci_bus *bus); extern unsigned long pci_probe_only; diff --git a/include/asm-powerpc/processor.h b/include/asm-powerpc/processor.h index 6cb6fb19e57..a26c32ee552 100644 --- a/include/asm-powerpc/processor.h +++ b/include/asm-powerpc/processor.h @@ -53,10 +53,6 @@ extern unsigned char ucBoardRevMaj, ucBoardRevMin; #endif /* CONFIG_PPC_PREP */ -#ifndef CONFIG_PPC_MULTIPLATFORM -#define _machine 0 -#endif /* CONFIG_PPC_MULTIPLATFORM */ - #endif /* defined(__KERNEL__) && defined(CONFIG_PPC32) */ /* diff --git a/include/asm-powerpc/prom.h b/include/asm-powerpc/prom.h index ec11d44eaeb..0afee17f33b 100644 --- a/include/asm-powerpc/prom.h +++ b/include/asm-powerpc/prom.h @@ -17,6 +17,7 @@ */ #include <linux/types.h> #include <linux/proc_fs.h> +#include <linux/platform_device.h> #include <asm/atomic.h> /* Definitions used by the flattened device tree */ @@ -333,6 +334,20 @@ extern int of_irq_map_one(struct device_node *device, int index, struct pci_dev; extern int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq); +static inline int of_irq_to_resource(struct device_node *dev, int index, struct resource *r) +{ + int irq = irq_of_parse_and_map(dev, index); + + /* Only dereference the resource if both the + * resource and the irq are valid. */ + if (r && irq != NO_IRQ) { + r->start = r->end = irq; + r->flags = IORESOURCE_IRQ; + } + + return irq; +} + #endif /* __KERNEL__ */ #endif /* _POWERPC_PROM_H */ diff --git a/include/asm-powerpc/ps3.h b/include/asm-powerpc/ps3.h new file mode 100644 index 00000000000..52a69ed0d90 --- /dev/null +++ b/include/asm-powerpc/ps3.h @@ -0,0 +1,462 @@ +/* + * PS3 platform declarations. + * + * Copyright (C) 2006 Sony Computer Entertainment Inc. + * Copyright 2006 Sony Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#if !defined(_ASM_POWERPC_PS3_H) +#define _ASM_POWERPC_PS3_H + +#include <linux/compiler.h> /* for __deprecated */ +#include <linux/init.h> +#include <linux/types.h> +#include <linux/device.h> + +/** + * struct ps3_device_id - HV bus device identifier from the system repository + * @bus_id: HV bus id, {1..} (zero invalid) + * @dev_id: HV device id, {0..} + */ + +struct ps3_device_id { + unsigned int bus_id; + unsigned int dev_id; +}; + + +/* dma routines */ + +enum ps3_dma_page_size { + PS3_DMA_4K = 12U, + PS3_DMA_64K = 16U, + PS3_DMA_1M = 20U, + PS3_DMA_16M = 24U, +}; + +enum ps3_dma_region_type { + PS3_DMA_OTHER = 0, + PS3_DMA_INTERNAL = 2, +}; + +/** + * struct ps3_dma_region - A per device dma state variables structure + * @did: The HV device id. + * @page_size: The ioc pagesize. + * @region_type: The HV region type. + * @bus_addr: The 'translated' bus address of the region. + * @len: The length in bytes of the region. + * @chunk_list: Opaque variable used by the ioc page manager. + */ + +struct ps3_dma_region { + struct ps3_device_id did; + enum ps3_dma_page_size page_size; + enum ps3_dma_region_type region_type; + unsigned long bus_addr; + unsigned long len; + struct { + spinlock_t lock; + struct list_head head; + } chunk_list; +}; + +/** + * struct ps3_dma_region_init - Helper to initialize structure variables + * + * Helper to properly initialize variables prior to calling + * ps3_system_bus_device_register. + */ + +static inline void ps3_dma_region_init(struct ps3_dma_region *r, + const struct ps3_device_id* did, enum ps3_dma_page_size page_size, + enum ps3_dma_region_type region_type) +{ + r->did = *did; + r->page_size = page_size; + r->region_type = region_type; +} +int ps3_dma_region_create(struct ps3_dma_region *r); +int ps3_dma_region_free(struct ps3_dma_region *r); +int ps3_dma_map(struct ps3_dma_region *r, unsigned long virt_addr, + unsigned long len, unsigned long *bus_addr); +int ps3_dma_unmap(struct ps3_dma_region *r, unsigned long bus_addr, + unsigned long len); + +/* mmio routines */ + +enum ps3_mmio_page_size { + PS3_MMIO_4K = 12U, + PS3_MMIO_64K = 16U +}; + +/** + * struct ps3_mmio_region - a per device mmio state variables structure + * + * Current systems can be supported with a single region per device. + */ + +struct ps3_mmio_region { + struct ps3_device_id did; + unsigned long bus_addr; + unsigned long len; + enum ps3_mmio_page_size page_size; + unsigned long lpar_addr; +}; + +/** + * struct ps3_mmio_region_init - Helper to initialize structure variables + * + * Helper to properly initialize variables prior to calling + * ps3_system_bus_device_register. + */ + +static inline void ps3_mmio_region_init(struct ps3_mmio_region *r, + const struct ps3_device_id* did, unsigned long bus_addr, + unsigned long len, enum ps3_mmio_page_size page_size) +{ + r->did = *did; + r->bus_addr = bus_addr; + r->len = len; + r->page_size = page_size; +} +int ps3_mmio_region_create(struct ps3_mmio_region *r); +int ps3_free_mmio_region(struct ps3_mmio_region *r); +unsigned long ps3_mm_phys_to_lpar(unsigned long phys_addr); + +/* inrerrupt routines */ + +int ps3_alloc_io_irq(unsigned int interrupt_id, unsigned int *virq); +int ps3_free_io_irq(unsigned int virq); +int ps3_alloc_event_irq(unsigned int *virq); +int ps3_free_event_irq(unsigned int virq); +int ps3_send_event_locally(unsigned int virq); +int ps3_connect_event_irq(const struct ps3_device_id *did, + unsigned int interrupt_id, unsigned int *virq); +int ps3_disconnect_event_irq(const struct ps3_device_id *did, + unsigned int interrupt_id, unsigned int virq); +int ps3_alloc_vuart_irq(void* virt_addr_bmp, unsigned int *virq); +int ps3_free_vuart_irq(unsigned int virq); +int ps3_alloc_spe_irq(unsigned long spe_id, unsigned int class, + unsigned int *virq); +int ps3_free_spe_irq(unsigned int virq); + +/* lv1 result codes */ + +enum lv1_result { + LV1_SUCCESS = 0, + /* not used -1 */ + LV1_RESOURCE_SHORTAGE = -2, + LV1_NO_PRIVILEGE = -3, + LV1_DENIED_BY_POLICY = -4, + LV1_ACCESS_VIOLATION = -5, + LV1_NO_ENTRY = -6, + LV1_DUPLICATE_ENTRY = -7, + LV1_TYPE_MISMATCH = -8, + LV1_BUSY = -9, + LV1_EMPTY = -10, + LV1_WRONG_STATE = -11, + /* not used -12 */ + LV1_NO_MATCH = -13, + LV1_ALREADY_CONNECTED = -14, + LV1_UNSUPPORTED_PARAMETER_VALUE = -15, + LV1_CONDITION_NOT_SATISFIED = -16, + LV1_ILLEGAL_PARAMETER_VALUE = -17, + LV1_BAD_OPTION = -18, + LV1_IMPLEMENTATION_LIMITATION = -19, + LV1_NOT_IMPLEMENTED = -20, + LV1_INVALID_CLASS_ID = -21, + LV1_CONSTRAINT_NOT_SATISFIED = -22, + LV1_ALIGNMENT_ERROR = -23, + LV1_INTERNAL_ERROR = -32768, +}; + +static inline const char* ps3_result(int result) +{ +#if defined(DEBUG) + switch (result) { + case LV1_SUCCESS: + return "LV1_SUCCESS (0)"; + case -1: + return "** unknown result ** (-1)"; + case LV1_RESOURCE_SHORTAGE: + return "LV1_RESOURCE_SHORTAGE (-2)"; + case LV1_NO_PRIVILEGE: + return "LV1_NO_PRIVILEGE (-3)"; + case LV1_DENIED_BY_POLICY: + return "LV1_DENIED_BY_POLICY (-4)"; + case LV1_ACCESS_VIOLATION: + return "LV1_ACCESS_VIOLATION (-5)"; + case LV1_NO_ENTRY: + return "LV1_NO_ENTRY (-6)"; + case LV1_DUPLICATE_ENTRY: + return "LV1_DUPLICATE_ENTRY (-7)"; + case LV1_TYPE_MISMATCH: + return "LV1_TYPE_MISMATCH (-8)"; + case LV1_BUSY: + return "LV1_BUSY (-9)"; + case LV1_EMPTY: + return "LV1_EMPTY (-10)"; + case LV1_WRONG_STATE: + return "LV1_WRONG_STATE (-11)"; + case -12: + return "** unknown result ** (-12)"; + case LV1_NO_MATCH: + return "LV1_NO_MATCH (-13)"; + case LV1_ALREADY_CONNECTED: + return "LV1_ALREADY_CONNECTED (-14)"; + case LV1_UNSUPPORTED_PARAMETER_VALUE: + return "LV1_UNSUPPORTED_PARAMETER_VALUE (-15)"; + case LV1_CONDITION_NOT_SATISFIED: + return "LV1_CONDITION_NOT_SATISFIED (-16)"; + case LV1_ILLEGAL_PARAMETER_VALUE: + return "LV1_ILLEGAL_PARAMETER_VALUE (-17)"; + case LV1_BAD_OPTION: + return "LV1_BAD_OPTION (-18)"; + case LV1_IMPLEMENTATION_LIMITATION: + return "LV1_IMPLEMENTATION_LIMITATION (-19)"; + case LV1_NOT_IMPLEMENTED: + return "LV1_NOT_IMPLEMENTED (-20)"; + case LV1_INVALID_CLASS_ID: + return "LV1_INVALID_CLASS_ID (-21)"; + case LV1_CONSTRAINT_NOT_SATISFIED: + return "LV1_CONSTRAINT_NOT_SATISFIED (-22)"; + case LV1_ALIGNMENT_ERROR: + return "LV1_ALIGNMENT_ERROR (-23)"; + case LV1_INTERNAL_ERROR: + return "LV1_INTERNAL_ERROR (-32768)"; + default: + BUG(); + return "** unknown result **"; + }; +#else + return ""; +#endif +} + +/* repository bus info */ + +enum ps3_bus_type { + PS3_BUS_TYPE_SB = 4, + PS3_BUS_TYPE_STORAGE = 5, +}; + +enum ps3_dev_type { + PS3_DEV_TYPE_SB_GELIC = 3, + PS3_DEV_TYPE_SB_USB = 4, + PS3_DEV_TYPE_SB_GPIO = 6, +}; + +int ps3_repository_read_bus_str(unsigned int bus_index, const char *bus_str, + u64 *value); +int ps3_repository_read_bus_id(unsigned int bus_index, unsigned int *bus_id); +int ps3_repository_read_bus_type(unsigned int bus_index, + enum ps3_bus_type *bus_type); +int ps3_repository_read_bus_num_dev(unsigned int bus_index, + unsigned int *num_dev); + +/* repository bus device info */ + +enum ps3_interrupt_type { + PS3_INTERRUPT_TYPE_EVENT_PORT = 2, + PS3_INTERRUPT_TYPE_SB_OHCI = 3, + PS3_INTERRUPT_TYPE_SB_EHCI = 4, + PS3_INTERRUPT_TYPE_OTHER = 5, +}; + +enum ps3_region_type { + PS3_REGION_TYPE_SB_OHCI = 3, + PS3_REGION_TYPE_SB_EHCI = 4, + PS3_REGION_TYPE_SB_GPIO = 5, +}; + +int ps3_repository_read_dev_str(unsigned int bus_index, + unsigned int dev_index, const char *dev_str, u64 *value); +int ps3_repository_read_dev_id(unsigned int bus_index, unsigned int dev_index, + unsigned int *dev_id); +int ps3_repository_read_dev_type(unsigned int bus_index, + unsigned int dev_index, enum ps3_dev_type *dev_type); +int ps3_repository_read_dev_intr(unsigned int bus_index, + unsigned int dev_index, unsigned int intr_index, + enum ps3_interrupt_type *intr_type, unsigned int *interrupt_id); +int ps3_repository_read_dev_reg_type(unsigned int bus_index, + unsigned int dev_index, unsigned int reg_index, + enum ps3_region_type *reg_type); +int ps3_repository_read_dev_reg_addr(unsigned int bus_index, + unsigned int dev_index, unsigned int reg_index, u64 *bus_addr, + u64 *len); +int ps3_repository_read_dev_reg(unsigned int bus_index, + unsigned int dev_index, unsigned int reg_index, + enum ps3_region_type *reg_type, u64 *bus_addr, u64 *len); + +/* repository bus enumerators */ + +struct ps3_repository_device { + unsigned int bus_index; + unsigned int dev_index; + struct ps3_device_id did; +}; + +int ps3_repository_find_device(enum ps3_bus_type bus_type, + enum ps3_dev_type dev_type, + const struct ps3_repository_device *start_dev, + struct ps3_repository_device *dev); +static inline int ps3_repository_find_first_device( + enum ps3_bus_type bus_type, enum ps3_dev_type dev_type, + struct ps3_repository_device *dev) +{ + return ps3_repository_find_device(bus_type, dev_type, NULL, dev); +} +int ps3_repository_find_interrupt(const struct ps3_repository_device *dev, + enum ps3_interrupt_type intr_type, unsigned int *interrupt_id); +int ps3_repository_find_region(const struct ps3_repository_device *dev, + enum ps3_region_type reg_type, u64 *bus_addr, u64 *len); + +/* repository block device info */ + +int ps3_repository_read_dev_port(unsigned int bus_index, + unsigned int dev_index, u64 *port); +int ps3_repository_read_dev_blk_size(unsigned int bus_index, + unsigned int dev_index, u64 *blk_size); +int ps3_repository_read_dev_num_blocks(unsigned int bus_index, + unsigned int dev_index, u64 *num_blocks); +int ps3_repository_read_dev_num_regions(unsigned int bus_index, + unsigned int dev_index, unsigned int *num_regions); +int ps3_repository_read_dev_region_id(unsigned int bus_index, + unsigned int dev_index, unsigned int region_index, + unsigned int *region_id); +int ps3_repository_read_dev_region_size(unsigned int bus_index, + unsigned int dev_index, unsigned int region_index, u64 *region_size); +int ps3_repository_read_dev_region_start(unsigned int bus_index, + unsigned int dev_index, unsigned int region_index, u64 *region_start); + +/* repository pu and memory info */ + +int ps3_repository_read_num_pu(unsigned int *num_pu); +int ps3_repository_read_ppe_id(unsigned int *pu_index, unsigned int *ppe_id); +int ps3_repository_read_rm_base(unsigned int ppe_id, u64 *rm_base); +int ps3_repository_read_rm_size(unsigned int ppe_id, u64 *rm_size); +int ps3_repository_read_region_total(u64 *region_total); +int ps3_repository_read_mm_info(u64 *rm_base, u64 *rm_size, + u64 *region_total); + +/* repository pme info */ + +int ps3_repository_read_num_be(unsigned int *num_be); +int ps3_repository_read_be_node_id(unsigned int be_index, u64 *node_id); +int ps3_repository_read_tb_freq(u64 node_id, u64 *tb_freq); +int ps3_repository_read_be_tb_freq(unsigned int be_index, u64 *tb_freq); + +/* repository 'Other OS' area */ + +int ps3_repository_read_boot_dat_addr(u64 *lpar_addr); +int ps3_repository_read_boot_dat_size(unsigned int *size); +int ps3_repository_read_boot_dat_info(u64 *lpar_addr, unsigned int *size); + +/* repository spu info */ + +/** + * enum spu_resource_type - Type of spu resource. + * @spu_resource_type_shared: Logical spu is shared with other partions. + * @spu_resource_type_exclusive: Logical spu is not shared with other partions. + * + * Returned by ps3_repository_read_spu_resource_id(). + */ + +enum ps3_spu_resource_type { + PS3_SPU_RESOURCE_TYPE_SHARED = 0, + PS3_SPU_RESOURCE_TYPE_EXCLUSIVE = 0x8000000000000000UL, +}; + +int ps3_repository_read_num_spu_reserved(unsigned int *num_spu_reserved); +int ps3_repository_read_num_spu_resource_id(unsigned int *num_resource_id); +int ps3_repository_read_spu_resource_id(unsigned int res_index, + enum ps3_spu_resource_type* resource_type, unsigned int *resource_id); + + +/* system bus routines */ + +enum ps3_match_id { + PS3_MATCH_ID_EHCI = 1, + PS3_MATCH_ID_OHCI, + PS3_MATCH_ID_GELIC, + PS3_MATCH_ID_AV_SETTINGS, + PS3_MATCH_ID_SYSTEM_MANAGER, +}; + +/** + * struct ps3_system_bus_device - a device on the system bus + */ + +struct ps3_system_bus_device { + enum ps3_match_id match_id; + struct ps3_device_id did; + unsigned int interrupt_id; +/* struct iommu_table *iommu_table; -- waiting for Ben's cleanups */ + struct ps3_dma_region *d_region; + struct ps3_mmio_region *m_region; + struct device core; +}; + +/** + * struct ps3_system_bus_driver - a driver for a device on the system bus + */ + +struct ps3_system_bus_driver { + enum ps3_match_id match_id; + struct device_driver core; + int (*probe)(struct ps3_system_bus_device *); + int (*remove)(struct ps3_system_bus_device *); +/* int (*suspend)(struct ps3_system_bus_device *, pm_message_t); */ +/* int (*resume)(struct ps3_system_bus_device *); */ +}; + +int ps3_system_bus_device_register(struct ps3_system_bus_device *dev); +int ps3_system_bus_driver_register(struct ps3_system_bus_driver *drv); +void ps3_system_bus_driver_unregister(struct ps3_system_bus_driver *drv); +static inline struct ps3_system_bus_driver *to_ps3_system_bus_driver( + struct device_driver *_drv) +{ + return container_of(_drv, struct ps3_system_bus_driver, core); +} +static inline struct ps3_system_bus_device *to_ps3_system_bus_device( + struct device *_dev) +{ + return container_of(_dev, struct ps3_system_bus_device, core); +} + +/** + * ps3_system_bus_set_drvdata - + * @dev: device structure + * @data: Data to set + */ + +static inline void ps3_system_bus_set_driver_data( + struct ps3_system_bus_device *dev, void *data) +{ + dev->core.driver_data = data; +} +static inline void *ps3_system_bus_get_driver_data( + struct ps3_system_bus_device *dev) +{ + return dev->core.driver_data; +} + +/* These two need global scope for get_dma_ops(). */ + +extern struct bus_type ps3_system_bus_type; + +#endif diff --git a/include/asm-powerpc/reg.h b/include/asm-powerpc/reg.h index 6faae7b14d5..a3631b15754 100644 --- a/include/asm-powerpc/reg.h +++ b/include/asm-powerpc/reg.h @@ -143,6 +143,7 @@ /* Special Purpose Registers (SPRNs)*/ #define SPRN_CTR 0x009 /* Count Register */ +#define SPRN_DSCR 0x11 #define SPRN_CTRLF 0x088 #define SPRN_CTRLT 0x098 #define CTRL_CT 0xc0000000 /* current thread */ @@ -163,6 +164,7 @@ #define SPRN_TBRU 0x10D /* Time Base Read Upper Register (user, R/O) */ #define SPRN_TBWL 0x11C /* Time Base Lower Register (super, R/W) */ #define SPRN_TBWU 0x11D /* Time Base Upper Register (super, R/W) */ +#define SPRN_SPURR 0x134 /* Scaled PURR */ #define SPRN_HIOR 0x137 /* 970 Hypervisor interrupt offset */ #define SPRN_DBAT0L 0x219 /* Data BAT 0 Lower Register */ #define SPRN_DBAT0U 0x218 /* Data BAT 0 Upper Register */ diff --git a/include/asm-powerpc/rtas.h b/include/asm-powerpc/rtas.h index d34f9e1f242..8eaa7b28d9d 100644 --- a/include/asm-powerpc/rtas.h +++ b/include/asm-powerpc/rtas.h @@ -54,8 +54,6 @@ struct rtas_args { rtas_arg_t *rets; /* Pointer to return values in args[]. */ }; -extern struct rtas_args rtas_stop_self_args; - struct rtas_t { unsigned long entry; /* physical address pointer */ unsigned long base; /* physical address pointer */ @@ -161,6 +159,7 @@ extern struct rtas_t rtas; extern void enter_rtas(unsigned long); extern int rtas_token(const char *service); +extern int rtas_service_present(const char *service); extern int rtas_call(int token, int, int, int *, ...); extern void rtas_restart(char *cmd); extern void rtas_power_off(void); @@ -223,8 +222,6 @@ extern int rtas_get_error_log_max(void); extern spinlock_t rtas_data_buf_lock; extern char rtas_data_buf[RTAS_DATA_BUF_SIZE]; -extern void rtas_stop_self(void); - /* RMO buffer reserved for user-space RTAS use */ extern unsigned long rtas_rmo_buf; diff --git a/include/asm-powerpc/setup.h b/include/asm-powerpc/setup.h index 3d9740aae01..817fac0a071 100644 --- a/include/asm-powerpc/setup.h +++ b/include/asm-powerpc/setup.h @@ -1,9 +1,6 @@ #ifndef _ASM_POWERPC_SETUP_H #define _ASM_POWERPC_SETUP_H -#ifdef __KERNEL__ - #define COMMAND_LINE_SIZE 512 -#endif /* __KERNEL__ */ #endif /* _ASM_POWERPC_SETUP_H */ diff --git a/include/asm-powerpc/sparsemem.h b/include/asm-powerpc/sparsemem.h index 38b1ea3b58f..48ad807a0b8 100644 --- a/include/asm-powerpc/sparsemem.h +++ b/include/asm-powerpc/sparsemem.h @@ -9,8 +9,14 @@ * MAX_PHYSMEM_BITS 2^N: how much memory we can have in that space */ #define SECTION_SIZE_BITS 24 + +#if defined(CONFIG_PS3_USE_LPAR_ADDR) +#define MAX_PHYSADDR_BITS 47 +#define MAX_PHYSMEM_BITS 47 +#else #define MAX_PHYSADDR_BITS 44 #define MAX_PHYSMEM_BITS 44 +#endif #ifdef CONFIG_MEMORY_HOTPLUG extern void create_section_mapping(unsigned long start, unsigned long end); diff --git a/include/asm-powerpc/spu.h b/include/asm-powerpc/spu.h index e73ea00efd8..3d90264e9d3 100644 --- a/include/asm-powerpc/spu.h +++ b/include/asm-powerpc/spu.h @@ -111,14 +111,12 @@ struct spu { u8 *local_store; unsigned long problem_phys; struct spu_problem __iomem *problem; - struct spu_priv1 __iomem *priv1; struct spu_priv2 __iomem *priv2; struct list_head list; struct list_head sched_list; + struct list_head full_list; int number; - int nid; unsigned int irqs[3]; - u32 isrc; u32 node; u64 flags; u64 dar; @@ -144,6 +142,7 @@ struct spu { char irq_c1[8]; char irq_c2[8]; + void* pdata; /* platform private data */ struct sys_device sysdev; }; @@ -162,6 +161,7 @@ struct spu_syscall_block { extern long spu_sys_callback(struct spu_syscall_block *s); /* syscalls implemented in spufs */ +struct file; extern struct spufs_calls { asmlinkage long (*create_thread)(const char __user *name, unsigned int flags, mode_t mode); @@ -170,6 +170,13 @@ extern struct spufs_calls { struct module *owner; } spufs_calls; +/* coredump calls implemented in spufs */ +struct spu_coredump_calls { + asmlinkage int (*arch_notes_size)(void); + asmlinkage void (*arch_write_notes)(struct file *file); + struct module *owner; +}; + /* return status from spu_run, same as in libspe */ #define SPE_EVENT_DMA_ALIGNMENT 0x0008 /*A DMA alignment error */ #define SPE_EVENT_SPE_ERROR 0x0010 /*An illegal instruction error*/ @@ -182,8 +189,10 @@ extern struct spufs_calls { */ #define SPU_CREATE_EVENTS_ENABLED 0x0001 #define SPU_CREATE_GANG 0x0002 +#define SPU_CREATE_NOSCHED 0x0004 +#define SPU_CREATE_ISOLATE 0x0008 -#define SPU_CREATE_FLAG_ALL 0x0003 /* mask of all valid flags */ +#define SPU_CREATE_FLAG_ALL 0x000f /* mask of all valid flags */ #ifdef CONFIG_SPU_FS_MODULE @@ -199,6 +208,15 @@ static inline void unregister_spu_syscalls(struct spufs_calls *calls) } #endif /* MODULE */ +int register_arch_coredump_calls(struct spu_coredump_calls *calls); +void unregister_arch_coredump_calls(struct spu_coredump_calls *calls); + +int spu_add_sysdev_attr(struct sysdev_attribute *attr); +void spu_remove_sysdev_attr(struct sysdev_attribute *attr); + +int spu_add_sysdev_attr_group(struct attribute_group *attrs); +void spu_remove_sysdev_attr_group(struct attribute_group *attrs); + /* * Notifier blocks: @@ -215,6 +233,7 @@ static inline void unregister_spu_syscalls(struct spufs_calls *calls) * to object-id spufs file from user space and the notifer * function can assume that spu->ctx is valid. */ +struct notifier_block; int spu_switch_event_register(struct notifier_block * n); int spu_switch_event_unregister(struct notifier_block * n); @@ -277,6 +296,7 @@ struct spu_problem { u32 spu_runcntl_RW; /* 0x401c */ #define SPU_RUNCNTL_STOP 0L #define SPU_RUNCNTL_RUNNABLE 1L +#define SPU_RUNCNTL_ISOLATE 2L u8 pad_0x4020_0x4024[0x4]; /* 0x4020 */ u32 spu_status_R; /* 0x4024 */ #define SPU_STOP_STATUS_SHIFT 16 @@ -289,8 +309,8 @@ struct spu_problem { #define SPU_STATUS_INVALID_INSTR 0x20 #define SPU_STATUS_INVALID_CH 0x40 #define SPU_STATUS_ISOLATED_STATE 0x80 -#define SPU_STATUS_ISOLATED_LOAD_STAUTUS 0x200 -#define SPU_STATUS_ISOLATED_EXIT_STAUTUS 0x400 +#define SPU_STATUS_ISOLATED_LOAD_STATUS 0x200 +#define SPU_STATUS_ISOLATED_EXIT_STATUS 0x400 u8 pad_0x4028_0x402c[0x4]; /* 0x4028 */ u32 spu_spe_R; /* 0x402c */ u8 pad_0x4030_0x4034[0x4]; /* 0x4030 */ diff --git a/include/asm-powerpc/spu_csa.h b/include/asm-powerpc/spu_csa.h index 964c2d38ccb..bdbf906a767 100644 --- a/include/asm-powerpc/spu_csa.h +++ b/include/asm-powerpc/spu_csa.h @@ -151,7 +151,6 @@ struct spu_priv1_collapsed { u64 mfc_fir_chkstp_enable_RW; u64 smf_sbi_signal_sel; u64 smf_ato_signal_sel; - u64 mfc_sdr_RW; u64 tlb_index_hint_RO; u64 tlb_index_W; u64 tlb_vpn_RW; diff --git a/include/asm-powerpc/spu_info.h b/include/asm-powerpc/spu_info.h new file mode 100644 index 00000000000..3545efbf989 --- /dev/null +++ b/include/asm-powerpc/spu_info.h @@ -0,0 +1,54 @@ +/* + * SPU info structures + * + * (C) Copyright 2006 IBM Corp. + * + * Author: Dwayne Grant McConnell <decimal@us.ibm.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef _SPU_INFO_H +#define _SPU_INFO_H + +#ifdef __KERNEL__ +#include <asm/spu.h> +#include <linux/types.h> +#else +struct mfc_cq_sr { + __u64 mfc_cq_data0_RW; + __u64 mfc_cq_data1_RW; + __u64 mfc_cq_data2_RW; + __u64 mfc_cq_data3_RW; +}; +#endif /* __KERNEL__ */ + +struct spu_dma_info { + __u64 dma_info_type; + __u64 dma_info_mask; + __u64 dma_info_status; + __u64 dma_info_stall_and_notify; + __u64 dma_info_atomic_command_status; + struct mfc_cq_sr dma_info_command_data[16]; +}; + +struct spu_proxydma_info { + __u64 proxydma_info_type; + __u64 proxydma_info_mask; + __u64 proxydma_info_status; + struct mfc_cq_sr proxydma_info_command_data[8]; +}; + +#endif diff --git a/include/asm-powerpc/spu_priv1.h b/include/asm-powerpc/spu_priv1.h index 300c458b6d0..69dcb0c5388 100644 --- a/include/asm-powerpc/spu_priv1.h +++ b/include/asm-powerpc/spu_priv1.h @@ -21,12 +21,13 @@ #define _SPU_PRIV1_H #if defined(__KERNEL__) +#include <linux/types.h> + struct spu; /* access to priv1 registers */ -struct spu_priv1_ops -{ +struct spu_priv1_ops { void (*int_mask_and) (struct spu *spu, int class, u64 mask); void (*int_mask_or) (struct spu *spu, int class, u64 mask); void (*int_mask_set) (struct spu *spu, int class, u64 mask); @@ -37,7 +38,7 @@ struct spu_priv1_ops u64 (*mfc_dar_get) (struct spu *spu); u64 (*mfc_dsisr_get) (struct spu *spu); void (*mfc_dsisr_set) (struct spu *spu, u64 dsisr); - void (*mfc_sdr_set) (struct spu *spu, u64 sdr); + void (*mfc_sdr_setup) (struct spu *spu); void (*mfc_sr1_set) (struct spu *spu, u64 sr1); u64 (*mfc_sr1_get) (struct spu *spu); void (*mfc_tclass_id_set) (struct spu *spu, u64 tclass_id); @@ -112,9 +113,9 @@ spu_mfc_dsisr_set (struct spu *spu, u64 dsisr) } static inline void -spu_mfc_sdr_set (struct spu *spu, u64 sdr) +spu_mfc_sdr_setup (struct spu *spu) { - spu_priv1_ops->mfc_sdr_set(spu, sdr); + spu_priv1_ops->mfc_sdr_setup(spu); } static inline void @@ -171,12 +172,41 @@ spu_resource_allocation_enable_get (struct spu *spu) return spu_priv1_ops->resource_allocation_enable_get(spu); } -/* The declarations folowing are put here for convenience - * and only intended to be used by the platform setup code - * for initializing spu_priv1_ops. +/* spu management abstraction */ + +struct spu_management_ops { + int (*enumerate_spus)(int (*fn)(void *data)); + int (*create_spu)(struct spu *spu, void *data); + int (*destroy_spu)(struct spu *spu); +}; + +extern const struct spu_management_ops* spu_management_ops; + +static inline int +spu_enumerate_spus (int (*fn)(void *data)) +{ + return spu_management_ops->enumerate_spus(fn); +} + +static inline int +spu_create_spu (struct spu *spu, void *data) +{ + return spu_management_ops->create_spu(spu, data); +} + +static inline int +spu_destroy_spu (struct spu *spu) +{ + return spu_management_ops->destroy_spu(spu); +} + +/* + * The declarations folowing are put here for convenience + * and only intended to be used by the platform setup code. */ extern const struct spu_priv1_ops spu_priv1_mmio_ops; +extern const struct spu_management_ops spu_management_of_ops; #endif /* __KERNEL__ */ #endif diff --git a/include/asm-powerpc/termbits.h b/include/asm-powerpc/termbits.h index 6d533b07aaf..5e79198f7d1 100644 --- a/include/asm-powerpc/termbits.h +++ b/include/asm-powerpc/termbits.h @@ -30,6 +30,19 @@ struct termios { speed_t c_ospeed; /* output speed */ }; +/* For PowerPC the termios and ktermios are the same */ + +struct ktermios { + tcflag_t c_iflag; /* input mode flags */ + tcflag_t c_oflag; /* output mode flags */ + tcflag_t c_cflag; /* control mode flags */ + tcflag_t c_lflag; /* local mode flags */ + cc_t c_cc[NCCS]; /* control characters */ + cc_t c_line; /* line discipline (== c_cc[19]) */ + speed_t c_ispeed; /* input speed */ + speed_t c_ospeed; /* output speed */ +}; + /* c_cc characters */ #define VINTR 0 #define VQUIT 1 diff --git a/include/asm-powerpc/thread_info.h b/include/asm-powerpc/thread_info.h index d339e2e88b1..3f32ca8bfec 100644 --- a/include/asm-powerpc/thread_info.h +++ b/include/asm-powerpc/thread_info.h @@ -122,6 +122,7 @@ static inline struct thread_info *current_thread_info(void) #define TIF_RESTOREALL 12 /* Restore all regs (implies NOERROR) */ #define TIF_NOERROR 14 /* Force successful syscall return */ #define TIF_RESTORE_SIGMASK 15 /* Restore signal mask in do_signal */ +#define TIF_FREEZE 16 /* Freezing for suspend */ /* as above, but as bit values */ #define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) @@ -138,6 +139,7 @@ static inline struct thread_info *current_thread_info(void) #define _TIF_RESTOREALL (1<<TIF_RESTOREALL) #define _TIF_NOERROR (1<<TIF_NOERROR) #define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK) +#define _TIF_FREEZE (1<<TIF_FREEZE) #define _TIF_SYSCALL_T_OR_A (_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT|_TIF_SECCOMP) #define _TIF_USER_WORK_MASK (_TIF_NOTIFY_RESUME | _TIF_SIGPENDING | \ diff --git a/include/asm-powerpc/todc.h b/include/asm-powerpc/todc.h deleted file mode 100644 index 60a8c39b8c1..00000000000 --- a/include/asm-powerpc/todc.h +++ /dev/null @@ -1,487 +0,0 @@ -/* - * Definitions for the M48Txx and mc146818 series of Time of day/Real Time - * Clock chips. - * - * Author: Mark A. Greer <mgreer@mvista.com> - * - * 2001 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -/* - * Support for the M48T37/M48T59/.../mc146818 Real Time Clock chips. - * Purpose is to make one generic file that handles all of these chips instead - * of every platform implementing the same code over & over again. - */ - -#ifndef __PPC_KERNEL_TODC_H -#define __PPC_KERNEL_TODC_H - -typedef struct { - uint rtc_type; /* your particular chip */ - - /* - * Following are the addresses of the AS0, AS1, and DATA registers - * of these chips. Note that these are board-specific. - */ - unsigned int nvram_as0; - unsigned int nvram_as1; - unsigned int nvram_data; - - /* - * Define bits to stop external set of regs from changing so - * the chip can be read/written reliably. - */ - unsigned char enable_read; - unsigned char enable_write; - - /* - * Following is the number of AS0 address bits. This is normally - * 8 but some bad hardware routes address lines incorrectly. - */ - int as0_bits; - - int nvram_size; /* Size of NVRAM on chip */ - int sw_flags; /* Software control flags */ - - /* Following are the register offsets for the particular chip */ - int year; - int month; - int day_of_month; - int day_of_week; - int hours; - int minutes; - int seconds; - int control_b; - int control_a; - int watchdog; - int interrupts; - int alarm_date; - int alarm_hour; - int alarm_minutes; - int alarm_seconds; - int century; - int flags; - - /* - * Some RTC chips have their NVRAM buried behind a addr/data pair of - * regs on the first level/clock registers. The following fields - * are the addresses for those addr/data regs. - */ - int nvram_addr_reg; - int nvram_data_reg; -} todc_info_t; - -/* - * Define the types of TODC/RTC variants that are supported in - * arch/ppc/kernel/todc_time.c - * Make a new one of these for any chip somehow differs from what's already - * defined. That way, if you ever need to put in code to touch those - * bits/registers in todc_time.c, you can put it inside an - * 'if (todc_info->rtc_type == TODC_TYPE_XXX)' so you won't break - * anyone else. - */ -#define TODC_TYPE_MK48T35 1 -#define TODC_TYPE_MK48T37 2 -#define TODC_TYPE_MK48T59 3 -#define TODC_TYPE_DS1693 4 /* Dallas DS1693 RTC */ -#define TODC_TYPE_DS1743 5 /* Dallas DS1743 RTC */ -#define TODC_TYPE_DS1746 6 /* Dallas DS1746 RTC */ -#define TODC_TYPE_DS1747 7 /* Dallas DS1747 RTC */ -#define TODC_TYPE_DS1501 8 /* Dallas DS1501 RTC */ -#define TODC_TYPE_DS1643 9 /* Dallas DS1643 RTC */ -#define TODC_TYPE_PC97307 10 /* PC97307 internal RTC */ -#define TODC_TYPE_DS1557 11 /* Dallas DS1557 RTC */ -#define TODC_TYPE_DS17285 12 /* Dallas DS17285 RTC */ -#define TODC_TYPE_DS1553 13 /* Dallas DS1553 RTC */ -#define TODC_TYPE_MC146818 100 /* Leave room for m48txx's */ - -/* - * Bit to clear/set to enable reads/writes to the chip - */ -#define TODC_MK48TXX_CNTL_A_R 0x40 -#define TODC_MK48TXX_CNTL_A_W 0x80 -#define TODC_MK48TXX_DAY_CB 0x80 - -#define TODC_DS1501_CNTL_B_TE 0x80 - -/* - * Define flag bits used by todc routines. - */ -#define TODC_FLAG_2_LEVEL_NVRAM 0x00000001 - -/* - * Define the values for the various RTC's that should to into the todc_info - * table. - * Note: The XXX_NVRAM_SIZE, XXX_NVRAM_ADDR_REG, and XXX_NVRAM_DATA_REG only - * matter if XXX_SW_FLAGS has TODC_FLAG_2_LEVEL_NVRAM set. - */ -#define TODC_TYPE_MK48T35_NVRAM_SIZE 0x7ff8 -#define TODC_TYPE_MK48T35_SW_FLAGS 0 -#define TODC_TYPE_MK48T35_YEAR 0x7fff -#define TODC_TYPE_MK48T35_MONTH 0x7ffe -#define TODC_TYPE_MK48T35_DOM 0x7ffd /* Day of Month */ -#define TODC_TYPE_MK48T35_DOW 0x7ffc /* Day of Week */ -#define TODC_TYPE_MK48T35_HOURS 0x7ffb -#define TODC_TYPE_MK48T35_MINUTES 0x7ffa -#define TODC_TYPE_MK48T35_SECONDS 0x7ff9 -#define TODC_TYPE_MK48T35_CNTL_B 0x7ff9 -#define TODC_TYPE_MK48T35_CNTL_A 0x7ff8 -#define TODC_TYPE_MK48T35_WATCHDOG 0x0000 -#define TODC_TYPE_MK48T35_INTERRUPTS 0x0000 -#define TODC_TYPE_MK48T35_ALARM_DATE 0x0000 -#define TODC_TYPE_MK48T35_ALARM_HOUR 0x0000 -#define TODC_TYPE_MK48T35_ALARM_MINUTES 0x0000 -#define TODC_TYPE_MK48T35_ALARM_SECONDS 0x0000 -#define TODC_TYPE_MK48T35_CENTURY 0x0000 -#define TODC_TYPE_MK48T35_FLAGS 0x0000 -#define TODC_TYPE_MK48T35_NVRAM_ADDR_REG 0 -#define TODC_TYPE_MK48T35_NVRAM_DATA_REG 0 - -#define TODC_TYPE_MK48T37_NVRAM_SIZE 0x7ff0 -#define TODC_TYPE_MK48T37_SW_FLAGS 0 -#define TODC_TYPE_MK48T37_YEAR 0x7fff -#define TODC_TYPE_MK48T37_MONTH 0x7ffe -#define TODC_TYPE_MK48T37_DOM 0x7ffd /* Day of Month */ -#define TODC_TYPE_MK48T37_DOW 0x7ffc /* Day of Week */ -#define TODC_TYPE_MK48T37_HOURS 0x7ffb -#define TODC_TYPE_MK48T37_MINUTES 0x7ffa -#define TODC_TYPE_MK48T37_SECONDS 0x7ff9 -#define TODC_TYPE_MK48T37_CNTL_B 0x7ff9 -#define TODC_TYPE_MK48T37_CNTL_A 0x7ff8 -#define TODC_TYPE_MK48T37_WATCHDOG 0x7ff7 -#define TODC_TYPE_MK48T37_INTERRUPTS 0x7ff6 -#define TODC_TYPE_MK48T37_ALARM_DATE 0x7ff5 -#define TODC_TYPE_MK48T37_ALARM_HOUR 0x7ff4 -#define TODC_TYPE_MK48T37_ALARM_MINUTES 0x7ff3 -#define TODC_TYPE_MK48T37_ALARM_SECONDS 0x7ff2 -#define TODC_TYPE_MK48T37_CENTURY 0x7ff1 -#define TODC_TYPE_MK48T37_FLAGS 0x7ff0 -#define TODC_TYPE_MK48T37_NVRAM_ADDR_REG 0 -#define TODC_TYPE_MK48T37_NVRAM_DATA_REG 0 - -#define TODC_TYPE_MK48T59_NVRAM_SIZE 0x1ff0 -#define TODC_TYPE_MK48T59_SW_FLAGS 0 -#define TODC_TYPE_MK48T59_YEAR 0x1fff -#define TODC_TYPE_MK48T59_MONTH 0x1ffe -#define TODC_TYPE_MK48T59_DOM 0x1ffd /* Day of Month */ -#define TODC_TYPE_MK48T59_DOW 0x1ffc /* Day of Week */ -#define TODC_TYPE_MK48T59_HOURS 0x1ffb -#define TODC_TYPE_MK48T59_MINUTES 0x1ffa -#define TODC_TYPE_MK48T59_SECONDS 0x1ff9 -#define TODC_TYPE_MK48T59_CNTL_B 0x1ff9 -#define TODC_TYPE_MK48T59_CNTL_A 0x1ff8 -#define TODC_TYPE_MK48T59_WATCHDOG 0x1fff -#define TODC_TYPE_MK48T59_INTERRUPTS 0x1fff -#define TODC_TYPE_MK48T59_ALARM_DATE 0x1fff -#define TODC_TYPE_MK48T59_ALARM_HOUR 0x1fff -#define TODC_TYPE_MK48T59_ALARM_MINUTES 0x1fff -#define TODC_TYPE_MK48T59_ALARM_SECONDS 0x1fff -#define TODC_TYPE_MK48T59_CENTURY 0x1fff -#define TODC_TYPE_MK48T59_FLAGS 0x1fff -#define TODC_TYPE_MK48T59_NVRAM_ADDR_REG 0 -#define TODC_TYPE_MK48T59_NVRAM_DATA_REG 0 - -#define TODC_TYPE_DS1501_NVRAM_SIZE 0x100 -#define TODC_TYPE_DS1501_SW_FLAGS TODC_FLAG_2_LEVEL_NVRAM -#define TODC_TYPE_DS1501_YEAR (TODC_TYPE_DS1501_NVRAM_SIZE + 0x06) -#define TODC_TYPE_DS1501_MONTH (TODC_TYPE_DS1501_NVRAM_SIZE + 0x05) -#define TODC_TYPE_DS1501_DOM (TODC_TYPE_DS1501_NVRAM_SIZE + 0x04) -#define TODC_TYPE_DS1501_DOW (TODC_TYPE_DS1501_NVRAM_SIZE + 0x03) -#define TODC_TYPE_DS1501_HOURS (TODC_TYPE_DS1501_NVRAM_SIZE + 0x02) -#define TODC_TYPE_DS1501_MINUTES (TODC_TYPE_DS1501_NVRAM_SIZE + 0x01) -#define TODC_TYPE_DS1501_SECONDS (TODC_TYPE_DS1501_NVRAM_SIZE + 0x00) -#define TODC_TYPE_DS1501_CNTL_B (TODC_TYPE_DS1501_NVRAM_SIZE + 0x0f) -#define TODC_TYPE_DS1501_CNTL_A (TODC_TYPE_DS1501_NVRAM_SIZE + 0x0f) -#define TODC_TYPE_DS1501_WATCHDOG (TODC_TYPE_DS1501_NVRAM_SIZE + 0xff) -#define TODC_TYPE_DS1501_INTERRUPTS (TODC_TYPE_DS1501_NVRAM_SIZE + 0xff) -#define TODC_TYPE_DS1501_ALARM_DATE (TODC_TYPE_DS1501_NVRAM_SIZE + 0x0b) -#define TODC_TYPE_DS1501_ALARM_HOUR (TODC_TYPE_DS1501_NVRAM_SIZE + 0x0a) -#define TODC_TYPE_DS1501_ALARM_MINUTES (TODC_TYPE_DS1501_NVRAM_SIZE + 0x09) -#define TODC_TYPE_DS1501_ALARM_SECONDS (TODC_TYPE_DS1501_NVRAM_SIZE + 0x08) -#define TODC_TYPE_DS1501_CENTURY (TODC_TYPE_DS1501_NVRAM_SIZE + 0x07) -#define TODC_TYPE_DS1501_FLAGS (TODC_TYPE_DS1501_NVRAM_SIZE + 0xff) -#define TODC_TYPE_DS1501_NVRAM_ADDR_REG 0x10 -#define TODC_TYPE_DS1501_NVRAM_DATA_REG 0x13 - -#define TODC_TYPE_DS1553_NVRAM_SIZE 0x1ff0 -#define TODC_TYPE_DS1553_SW_FLAGS 0 -#define TODC_TYPE_DS1553_YEAR 0x1fff -#define TODC_TYPE_DS1553_MONTH 0x1ffe -#define TODC_TYPE_DS1553_DOM 0x1ffd /* Day of Month */ -#define TODC_TYPE_DS1553_DOW 0x1ffc /* Day of Week */ -#define TODC_TYPE_DS1553_HOURS 0x1ffb -#define TODC_TYPE_DS1553_MINUTES 0x1ffa -#define TODC_TYPE_DS1553_SECONDS 0x1ff9 -#define TODC_TYPE_DS1553_CNTL_B 0x1ff9 -#define TODC_TYPE_DS1553_CNTL_A 0x1ff8 /* control_a R/W regs */ -#define TODC_TYPE_DS1553_WATCHDOG 0x1ff7 -#define TODC_TYPE_DS1553_INTERRUPTS 0x1ff6 -#define TODC_TYPE_DS1553_ALARM_DATE 0x1ff5 -#define TODC_TYPE_DS1553_ALARM_HOUR 0x1ff4 -#define TODC_TYPE_DS1553_ALARM_MINUTES 0x1ff3 -#define TODC_TYPE_DS1553_ALARM_SECONDS 0x1ff2 -#define TODC_TYPE_DS1553_CENTURY 0x1ff8 -#define TODC_TYPE_DS1553_FLAGS 0x1ff0 -#define TODC_TYPE_DS1553_NVRAM_ADDR_REG 0 -#define TODC_TYPE_DS1553_NVRAM_DATA_REG 0 - -#define TODC_TYPE_DS1557_NVRAM_SIZE 0x7fff0 -#define TODC_TYPE_DS1557_SW_FLAGS 0 -#define TODC_TYPE_DS1557_YEAR 0x7ffff -#define TODC_TYPE_DS1557_MONTH 0x7fffe -#define TODC_TYPE_DS1557_DOM 0x7fffd /* Day of Month */ -#define TODC_TYPE_DS1557_DOW 0x7fffc /* Day of Week */ -#define TODC_TYPE_DS1557_HOURS 0x7fffb -#define TODC_TYPE_DS1557_MINUTES 0x7fffa -#define TODC_TYPE_DS1557_SECONDS 0x7fff9 -#define TODC_TYPE_DS1557_CNTL_B 0x7fff9 -#define TODC_TYPE_DS1557_CNTL_A 0x7fff8 /* control_a R/W regs */ -#define TODC_TYPE_DS1557_WATCHDOG 0x7fff7 -#define TODC_TYPE_DS1557_INTERRUPTS 0x7fff6 -#define TODC_TYPE_DS1557_ALARM_DATE 0x7fff5 -#define TODC_TYPE_DS1557_ALARM_HOUR 0x7fff4 -#define TODC_TYPE_DS1557_ALARM_MINUTES 0x7fff3 -#define TODC_TYPE_DS1557_ALARM_SECONDS 0x7fff2 -#define TODC_TYPE_DS1557_CENTURY 0x7fff8 -#define TODC_TYPE_DS1557_FLAGS 0x7fff0 -#define TODC_TYPE_DS1557_NVRAM_ADDR_REG 0 -#define TODC_TYPE_DS1557_NVRAM_DATA_REG 0 - -#define TODC_TYPE_DS1643_NVRAM_SIZE 0x1ff8 -#define TODC_TYPE_DS1643_SW_FLAGS 0 -#define TODC_TYPE_DS1643_YEAR 0x1fff -#define TODC_TYPE_DS1643_MONTH 0x1ffe -#define TODC_TYPE_DS1643_DOM 0x1ffd /* Day of Month */ -#define TODC_TYPE_DS1643_DOW 0x1ffc /* Day of Week */ -#define TODC_TYPE_DS1643_HOURS 0x1ffb -#define TODC_TYPE_DS1643_MINUTES 0x1ffa -#define TODC_TYPE_DS1643_SECONDS 0x1ff9 -#define TODC_TYPE_DS1643_CNTL_B 0x1ff9 -#define TODC_TYPE_DS1643_CNTL_A 0x1ff8 /* control_a R/W regs */ -#define TODC_TYPE_DS1643_WATCHDOG 0x1fff -#define TODC_TYPE_DS1643_INTERRUPTS 0x1fff -#define TODC_TYPE_DS1643_ALARM_DATE 0x1fff -#define TODC_TYPE_DS1643_ALARM_HOUR 0x1fff -#define TODC_TYPE_DS1643_ALARM_MINUTES 0x1fff -#define TODC_TYPE_DS1643_ALARM_SECONDS 0x1fff -#define TODC_TYPE_DS1643_CENTURY 0x1ff8 -#define TODC_TYPE_DS1643_FLAGS 0x1fff -#define TODC_TYPE_DS1643_NVRAM_ADDR_REG 0 -#define TODC_TYPE_DS1643_NVRAM_DATA_REG 0 - -#define TODC_TYPE_DS1693_NVRAM_SIZE 0 /* Not handled yet */ -#define TODC_TYPE_DS1693_SW_FLAGS 0 -#define TODC_TYPE_DS1693_YEAR 0x09 -#define TODC_TYPE_DS1693_MONTH 0x08 -#define TODC_TYPE_DS1693_DOM 0x07 /* Day of Month */ -#define TODC_TYPE_DS1693_DOW 0x06 /* Day of Week */ -#define TODC_TYPE_DS1693_HOURS 0x04 -#define TODC_TYPE_DS1693_MINUTES 0x02 -#define TODC_TYPE_DS1693_SECONDS 0x00 -#define TODC_TYPE_DS1693_CNTL_B 0x0b -#define TODC_TYPE_DS1693_CNTL_A 0x0a -#define TODC_TYPE_DS1693_WATCHDOG 0xff -#define TODC_TYPE_DS1693_INTERRUPTS 0xff -#define TODC_TYPE_DS1693_ALARM_DATE 0x49 -#define TODC_TYPE_DS1693_ALARM_HOUR 0x05 -#define TODC_TYPE_DS1693_ALARM_MINUTES 0x03 -#define TODC_TYPE_DS1693_ALARM_SECONDS 0x01 -#define TODC_TYPE_DS1693_CENTURY 0x48 -#define TODC_TYPE_DS1693_FLAGS 0xff -#define TODC_TYPE_DS1693_NVRAM_ADDR_REG 0 -#define TODC_TYPE_DS1693_NVRAM_DATA_REG 0 - -#define TODC_TYPE_DS1743_NVRAM_SIZE 0x1ff8 -#define TODC_TYPE_DS1743_SW_FLAGS 0 -#define TODC_TYPE_DS1743_YEAR 0x1fff -#define TODC_TYPE_DS1743_MONTH 0x1ffe -#define TODC_TYPE_DS1743_DOM 0x1ffd /* Day of Month */ -#define TODC_TYPE_DS1743_DOW 0x1ffc /* Day of Week */ -#define TODC_TYPE_DS1743_HOURS 0x1ffb -#define TODC_TYPE_DS1743_MINUTES 0x1ffa -#define TODC_TYPE_DS1743_SECONDS 0x1ff9 -#define TODC_TYPE_DS1743_CNTL_B 0x1ff9 -#define TODC_TYPE_DS1743_CNTL_A 0x1ff8 /* control_a R/W regs */ -#define TODC_TYPE_DS1743_WATCHDOG 0x1fff -#define TODC_TYPE_DS1743_INTERRUPTS 0x1fff -#define TODC_TYPE_DS1743_ALARM_DATE 0x1fff -#define TODC_TYPE_DS1743_ALARM_HOUR 0x1fff -#define TODC_TYPE_DS1743_ALARM_MINUTES 0x1fff -#define TODC_TYPE_DS1743_ALARM_SECONDS 0x1fff -#define TODC_TYPE_DS1743_CENTURY 0x1ff8 -#define TODC_TYPE_DS1743_FLAGS 0x1fff -#define TODC_TYPE_DS1743_NVRAM_ADDR_REG 0 -#define TODC_TYPE_DS1743_NVRAM_DATA_REG 0 - -#define TODC_TYPE_DS1746_NVRAM_SIZE 0x1fff8 -#define TODC_TYPE_DS1746_SW_FLAGS 0 -#define TODC_TYPE_DS1746_YEAR 0x1ffff -#define TODC_TYPE_DS1746_MONTH 0x1fffe -#define TODC_TYPE_DS1746_DOM 0x1fffd /* Day of Month */ -#define TODC_TYPE_DS1746_DOW 0x1fffc /* Day of Week */ -#define TODC_TYPE_DS1746_HOURS 0x1fffb -#define TODC_TYPE_DS1746_MINUTES 0x1fffa -#define TODC_TYPE_DS1746_SECONDS 0x1fff9 -#define TODC_TYPE_DS1746_CNTL_B 0x1fff9 -#define TODC_TYPE_DS1746_CNTL_A 0x1fff8 /* control_a R/W regs */ -#define TODC_TYPE_DS1746_WATCHDOG 0x00000 -#define TODC_TYPE_DS1746_INTERRUPTS 0x00000 -#define TODC_TYPE_DS1746_ALARM_DATE 0x00000 -#define TODC_TYPE_DS1746_ALARM_HOUR 0x00000 -#define TODC_TYPE_DS1746_ALARM_MINUTES 0x00000 -#define TODC_TYPE_DS1746_ALARM_SECONDS 0x00000 -#define TODC_TYPE_DS1746_CENTURY 0x00000 -#define TODC_TYPE_DS1746_FLAGS 0x00000 -#define TODC_TYPE_DS1746_NVRAM_ADDR_REG 0 -#define TODC_TYPE_DS1746_NVRAM_DATA_REG 0 - -#define TODC_TYPE_DS1747_NVRAM_SIZE 0x7fff8 -#define TODC_TYPE_DS1747_SW_FLAGS 0 -#define TODC_TYPE_DS1747_YEAR 0x7ffff -#define TODC_TYPE_DS1747_MONTH 0x7fffe -#define TODC_TYPE_DS1747_DOM 0x7fffd /* Day of Month */ -#define TODC_TYPE_DS1747_DOW 0x7fffc /* Day of Week */ -#define TODC_TYPE_DS1747_HOURS 0x7fffb -#define TODC_TYPE_DS1747_MINUTES 0x7fffa -#define TODC_TYPE_DS1747_SECONDS 0x7fff9 -#define TODC_TYPE_DS1747_CNTL_B 0x7fff9 -#define TODC_TYPE_DS1747_CNTL_A 0x7fff8 /* control_a R/W regs */ -#define TODC_TYPE_DS1747_WATCHDOG 0x00000 -#define TODC_TYPE_DS1747_INTERRUPTS 0x00000 -#define TODC_TYPE_DS1747_ALARM_DATE 0x00000 -#define TODC_TYPE_DS1747_ALARM_HOUR 0x00000 -#define TODC_TYPE_DS1747_ALARM_MINUTES 0x00000 -#define TODC_TYPE_DS1747_ALARM_SECONDS 0x00000 -#define TODC_TYPE_DS1747_CENTURY 0x00000 -#define TODC_TYPE_DS1747_FLAGS 0x00000 -#define TODC_TYPE_DS1747_NVRAM_ADDR_REG 0 -#define TODC_TYPE_DS1747_NVRAM_DATA_REG 0 - -#define TODC_TYPE_DS17285_NVRAM_SIZE (0x1000-0x80) /* 4Kx8 NVRAM (minus RTC regs) */ -#define TODC_TYPE_DS17285_SW_FLAGS TODC_FLAG_2_LEVEL_NVRAM -#define TODC_TYPE_DS17285_SECONDS (TODC_TYPE_DS17285_NVRAM_SIZE + 0x00) -#define TODC_TYPE_DS17285_ALARM_SECONDS (TODC_TYPE_DS17285_NVRAM_SIZE + 0x01) -#define TODC_TYPE_DS17285_MINUTES (TODC_TYPE_DS17285_NVRAM_SIZE + 0x02) -#define TODC_TYPE_DS17285_ALARM_MINUTES (TODC_TYPE_DS17285_NVRAM_SIZE + 0x03) -#define TODC_TYPE_DS17285_HOURS (TODC_TYPE_DS17285_NVRAM_SIZE + 0x04) -#define TODC_TYPE_DS17285_ALARM_HOUR (TODC_TYPE_DS17285_NVRAM_SIZE + 0x05) -#define TODC_TYPE_DS17285_DOW (TODC_TYPE_DS17285_NVRAM_SIZE + 0x06) -#define TODC_TYPE_DS17285_DOM (TODC_TYPE_DS17285_NVRAM_SIZE + 0x07) -#define TODC_TYPE_DS17285_MONTH (TODC_TYPE_DS17285_NVRAM_SIZE + 0x08) -#define TODC_TYPE_DS17285_YEAR (TODC_TYPE_DS17285_NVRAM_SIZE + 0x09) -#define TODC_TYPE_DS17285_CNTL_A (TODC_TYPE_DS17285_NVRAM_SIZE + 0x0A) -#define TODC_TYPE_DS17285_CNTL_B (TODC_TYPE_DS17285_NVRAM_SIZE + 0x0B) -#define TODC_TYPE_DS17285_CNTL_C (TODC_TYPE_DS17285_NVRAM_SIZE + 0x0C) -#define TODC_TYPE_DS17285_CNTL_D (TODC_TYPE_DS17285_NVRAM_SIZE + 0x0D) -#define TODC_TYPE_DS17285_WATCHDOG 0 -#define TODC_TYPE_DS17285_INTERRUPTS 0 -#define TODC_TYPE_DS17285_ALARM_DATE 0 -#define TODC_TYPE_DS17285_CENTURY 0 -#define TODC_TYPE_DS17285_FLAGS 0 -#define TODC_TYPE_DS17285_NVRAM_ADDR_REG 0x50 -#define TODC_TYPE_DS17285_NVRAM_DATA_REG 0x53 - -#define TODC_TYPE_MC146818_NVRAM_SIZE 0 /* XXXX */ -#define TODC_TYPE_MC146818_SW_FLAGS 0 -#define TODC_TYPE_MC146818_YEAR 0x09 -#define TODC_TYPE_MC146818_MONTH 0x08 -#define TODC_TYPE_MC146818_DOM 0x07 /* Day of Month */ -#define TODC_TYPE_MC146818_DOW 0x06 /* Day of Week */ -#define TODC_TYPE_MC146818_HOURS 0x04 -#define TODC_TYPE_MC146818_MINUTES 0x02 -#define TODC_TYPE_MC146818_SECONDS 0x00 -#define TODC_TYPE_MC146818_CNTL_B 0x0a -#define TODC_TYPE_MC146818_CNTL_A 0x0b /* control_a R/W regs */ -#define TODC_TYPE_MC146818_WATCHDOG 0 -#define TODC_TYPE_MC146818_INTERRUPTS 0x0c -#define TODC_TYPE_MC146818_ALARM_DATE 0xff -#define TODC_TYPE_MC146818_ALARM_HOUR 0x05 -#define TODC_TYPE_MC146818_ALARM_MINUTES 0x03 -#define TODC_TYPE_MC146818_ALARM_SECONDS 0x01 -#define TODC_TYPE_MC146818_CENTURY 0xff -#define TODC_TYPE_MC146818_FLAGS 0xff -#define TODC_TYPE_MC146818_NVRAM_ADDR_REG 0 -#define TODC_TYPE_MC146818_NVRAM_DATA_REG 0 - -#define TODC_TYPE_PC97307_NVRAM_SIZE 0 /* No NVRAM? */ -#define TODC_TYPE_PC97307_SW_FLAGS 0 -#define TODC_TYPE_PC97307_YEAR 0x09 -#define TODC_TYPE_PC97307_MONTH 0x08 -#define TODC_TYPE_PC97307_DOM 0x07 /* Day of Month */ -#define TODC_TYPE_PC97307_DOW 0x06 /* Day of Week */ -#define TODC_TYPE_PC97307_HOURS 0x04 -#define TODC_TYPE_PC97307_MINUTES 0x02 -#define TODC_TYPE_PC97307_SECONDS 0x00 -#define TODC_TYPE_PC97307_CNTL_B 0x0a -#define TODC_TYPE_PC97307_CNTL_A 0x0b /* control_a R/W regs */ -#define TODC_TYPE_PC97307_WATCHDOG 0x0c -#define TODC_TYPE_PC97307_INTERRUPTS 0x0d -#define TODC_TYPE_PC97307_ALARM_DATE 0xff -#define TODC_TYPE_PC97307_ALARM_HOUR 0x05 -#define TODC_TYPE_PC97307_ALARM_MINUTES 0x03 -#define TODC_TYPE_PC97307_ALARM_SECONDS 0x01 -#define TODC_TYPE_PC97307_CENTURY 0xff -#define TODC_TYPE_PC97307_FLAGS 0xff -#define TODC_TYPE_PC97307_NVRAM_ADDR_REG 0 -#define TODC_TYPE_PC97307_NVRAM_DATA_REG 0 - -/* - * Define macros to allocate and init the todc_info_t table that will - * be used by the todc_time.c routines. - */ -#define TODC_ALLOC() \ - static todc_info_t todc_info_alloc; \ - todc_info_t *todc_info = &todc_info_alloc; - -#define TODC_INIT(clock_type, as0, as1, data, bits) { \ - todc_info->rtc_type = clock_type; \ - \ - todc_info->nvram_as0 = (unsigned int)(as0); \ - todc_info->nvram_as1 = (unsigned int)(as1); \ - todc_info->nvram_data = (unsigned int)(data); \ - \ - todc_info->as0_bits = (bits); \ - \ - todc_info->nvram_size = clock_type ##_NVRAM_SIZE; \ - todc_info->sw_flags = clock_type ##_SW_FLAGS; \ - \ - todc_info->year = clock_type ##_YEAR; \ - todc_info->month = clock_type ##_MONTH; \ - todc_info->day_of_month = clock_type ##_DOM; \ - todc_info->day_of_week = clock_type ##_DOW; \ - todc_info->hours = clock_type ##_HOURS; \ - todc_info->minutes = clock_type ##_MINUTES; \ - todc_info->seconds = clock_type ##_SECONDS; \ - todc_info->control_b = clock_type ##_CNTL_B; \ - todc_info->control_a = clock_type ##_CNTL_A; \ - todc_info->watchdog = clock_type ##_WATCHDOG; \ - todc_info->interrupts = clock_type ##_INTERRUPTS; \ - todc_info->alarm_date = clock_type ##_ALARM_DATE; \ - todc_info->alarm_hour = clock_type ##_ALARM_HOUR; \ - todc_info->alarm_minutes = clock_type ##_ALARM_MINUTES; \ - todc_info->alarm_seconds = clock_type ##_ALARM_SECONDS; \ - todc_info->century = clock_type ##_CENTURY; \ - todc_info->flags = clock_type ##_FLAGS; \ - \ - todc_info->nvram_addr_reg = clock_type ##_NVRAM_ADDR_REG; \ - todc_info->nvram_data_reg = clock_type ##_NVRAM_DATA_REG; \ -} - -extern todc_info_t *todc_info; - -unsigned char todc_direct_read_val(int addr); -void todc_direct_write_val(int addr, unsigned char val); -unsigned char todc_m48txx_read_val(int addr); -void todc_m48txx_write_val(int addr, unsigned char val); -unsigned char todc_mc146818_read_val(int addr); -void todc_mc146818_write_val(int addr, unsigned char val); - -long todc_time_init(void); -void todc_get_rtc_time(struct rtc_time *); -int todc_set_rtc_time(struct rtc_time *); -void todc_calibrate_decr(void); - -#endif /* __PPC_KERNEL_TODC_H */ diff --git a/include/asm-powerpc/topology.h b/include/asm-powerpc/topology.h index 9fe7894ee03..6610495f5f1 100644 --- a/include/asm-powerpc/topology.h +++ b/include/asm-powerpc/topology.h @@ -32,7 +32,14 @@ static inline int node_to_first_cpu(int node) int of_node_to_nid(struct device_node *device); struct pci_bus; +#ifdef CONFIG_PCI extern int pcibus_to_node(struct pci_bus *bus); +#else +static inline int pcibus_to_node(struct pci_bus *bus) +{ + return -1; +} +#endif #define pcibus_to_cpumask(bus) (pcibus_to_node(bus) == -1 ? \ CPU_MASK_ALL : \ @@ -59,6 +66,7 @@ extern int pcibus_to_node(struct pci_bus *bus); | SD_BALANCE_EXEC \ | SD_BALANCE_NEWIDLE \ | SD_WAKE_IDLE \ + | SD_SERIALIZE \ | SD_WAKE_BALANCE, \ .last_balance = jiffies, \ .balance_interval = 1, \ diff --git a/include/asm-powerpc/tsi108.h b/include/asm-powerpc/tsi108.h index 2c702d35a7c..4e95d153be8 100644 --- a/include/asm-powerpc/tsi108.h +++ b/include/asm-powerpc/tsi108.h @@ -98,12 +98,12 @@ typedef struct { extern u32 get_vir_csrbase(void); extern u32 tsi108_csr_vir_base; -extern inline u32 tsi108_read_reg(u32 reg_offset) +static inline u32 tsi108_read_reg(u32 reg_offset) { return in_be32((volatile u32 *)(tsi108_csr_vir_base + reg_offset)); } -extern inline void tsi108_write_reg(u32 reg_offset, u32 val) +static inline void tsi108_write_reg(u32 reg_offset, u32 val) { out_be32((volatile u32 *)(tsi108_csr_vir_base + reg_offset), val); } diff --git a/include/asm-powerpc/types.h b/include/asm-powerpc/types.h index d6fb56b8045..3b363757a2b 100644 --- a/include/asm-powerpc/types.h +++ b/include/asm-powerpc/types.h @@ -97,16 +97,6 @@ typedef struct { unsigned long env; } func_descr_t; -#ifdef CONFIG_LBD -typedef u64 sector_t; -#define HAVE_SECTOR_T -#endif - -#ifdef CONFIG_LSF -typedef u64 blkcnt_t; -#define HAVE_BLKCNT_T -#endif - #endif /* __ASSEMBLY__ */ #endif /* __KERNEL__ */ diff --git a/include/asm-powerpc/uaccess.h b/include/asm-powerpc/uaccess.h index d83fc29c2bb..adbf16b8cfb 100644 --- a/include/asm-powerpc/uaccess.h +++ b/include/asm-powerpc/uaccess.h @@ -304,7 +304,7 @@ extern unsigned long __copy_tofrom_user(void __user *to, #ifndef __powerpc64__ -extern inline unsigned long copy_from_user(void *to, +static inline unsigned long copy_from_user(void *to, const void __user *from, unsigned long n) { unsigned long over; @@ -319,7 +319,7 @@ extern inline unsigned long copy_from_user(void *to, return n; } -extern inline unsigned long copy_to_user(void __user *to, +static inline unsigned long copy_to_user(void __user *to, const void *from, unsigned long n) { unsigned long over; diff --git a/include/asm-powerpc/unistd.h b/include/asm-powerpc/unistd.h index 0e4ea37f646..0ae954e3d25 100644 --- a/include/asm-powerpc/unistd.h +++ b/include/asm-powerpc/unistd.h @@ -334,119 +334,9 @@ #ifndef __ASSEMBLY__ -/* On powerpc a system call basically clobbers the same registers like a - * function call, with the exception of LR (which is needed for the - * "sc; bnslr" sequence) and CR (where only CR0.SO is clobbered to signal - * an error return status). - */ - -#define __syscall_nr(nr, type, name, args...) \ - unsigned long __sc_ret, __sc_err; \ - { \ - register unsigned long __sc_0 __asm__ ("r0"); \ - register unsigned long __sc_3 __asm__ ("r3"); \ - register unsigned long __sc_4 __asm__ ("r4"); \ - register unsigned long __sc_5 __asm__ ("r5"); \ - register unsigned long __sc_6 __asm__ ("r6"); \ - register unsigned long __sc_7 __asm__ ("r7"); \ - register unsigned long __sc_8 __asm__ ("r8"); \ - \ - __sc_loadargs_##nr(name, args); \ - __asm__ __volatile__ \ - ("sc \n\t" \ - "mfcr %0 " \ - : "=&r" (__sc_0), \ - "=&r" (__sc_3), "=&r" (__sc_4), \ - "=&r" (__sc_5), "=&r" (__sc_6), \ - "=&r" (__sc_7), "=&r" (__sc_8) \ - : __sc_asm_input_##nr \ - : "cr0", "ctr", "memory", \ - "r9", "r10","r11", "r12"); \ - __sc_ret = __sc_3; \ - __sc_err = __sc_0; \ - } \ - if (__sc_err & 0x10000000) \ - { \ - errno = __sc_ret; \ - __sc_ret = -1; \ - } \ - return (type) __sc_ret - -#define __sc_loadargs_0(name, dummy...) \ - __sc_0 = __NR_##name -#define __sc_loadargs_1(name, arg1) \ - __sc_loadargs_0(name); \ - __sc_3 = (unsigned long) (arg1) -#define __sc_loadargs_2(name, arg1, arg2) \ - __sc_loadargs_1(name, arg1); \ - __sc_4 = (unsigned long) (arg2) -#define __sc_loadargs_3(name, arg1, arg2, arg3) \ - __sc_loadargs_2(name, arg1, arg2); \ - __sc_5 = (unsigned long) (arg3) -#define __sc_loadargs_4(name, arg1, arg2, arg3, arg4) \ - __sc_loadargs_3(name, arg1, arg2, arg3); \ - __sc_6 = (unsigned long) (arg4) -#define __sc_loadargs_5(name, arg1, arg2, arg3, arg4, arg5) \ - __sc_loadargs_4(name, arg1, arg2, arg3, arg4); \ - __sc_7 = (unsigned long) (arg5) -#define __sc_loadargs_6(name, arg1, arg2, arg3, arg4, arg5, arg6) \ - __sc_loadargs_5(name, arg1, arg2, arg3, arg4, arg5); \ - __sc_8 = (unsigned long) (arg6) - -#define __sc_asm_input_0 "0" (__sc_0) -#define __sc_asm_input_1 __sc_asm_input_0, "1" (__sc_3) -#define __sc_asm_input_2 __sc_asm_input_1, "2" (__sc_4) -#define __sc_asm_input_3 __sc_asm_input_2, "3" (__sc_5) -#define __sc_asm_input_4 __sc_asm_input_3, "4" (__sc_6) -#define __sc_asm_input_5 __sc_asm_input_4, "5" (__sc_7) -#define __sc_asm_input_6 __sc_asm_input_5, "6" (__sc_8) - -#define _syscall0(type,name) \ -type name(void) \ -{ \ - __syscall_nr(0, type, name); \ -} - -#define _syscall1(type,name,type1,arg1) \ -type name(type1 arg1) \ -{ \ - __syscall_nr(1, type, name, arg1); \ -} - -#define _syscall2(type,name,type1,arg1,type2,arg2) \ -type name(type1 arg1, type2 arg2) \ -{ \ - __syscall_nr(2, type, name, arg1, arg2); \ -} - -#define _syscall3(type,name,type1,arg1,type2,arg2,type3,arg3) \ -type name(type1 arg1, type2 arg2, type3 arg3) \ -{ \ - __syscall_nr(3, type, name, arg1, arg2, arg3); \ -} - -#define _syscall4(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4) \ -type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4) \ -{ \ - __syscall_nr(4, type, name, arg1, arg2, arg3, arg4); \ -} - -#define _syscall5(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5) \ -type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) \ -{ \ - __syscall_nr(5, type, name, arg1, arg2, arg3, arg4, arg5); \ -} -#define _syscall6(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5,type6,arg6) \ -type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5, type6 arg6) \ -{ \ - __syscall_nr(6, type, name, arg1, arg2, arg3, arg4, arg5, arg6); \ -} - - #include <linux/types.h> #include <linux/compiler.h> #include <linux/linkage.h> -#include <asm/syscalls.h> #define __ARCH_WANT_IPC_PARSE_VERSION #define __ARCH_WANT_OLD_READDIR @@ -481,16 +371,9 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5, type6 arg6 /* * "Conditional" syscalls - * - * What we want is __attribute__((weak,alias("sys_ni_syscall"))), - * but it doesn't work on all toolchains, so we just do it by hand */ -#ifdef CONFIG_PPC32 -#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall") -#else -#define cond_syscall(x) asm(".weak\t." #x "\n\t.set\t." #x ",.sys_ni_syscall") -#endif - +#define cond_syscall(x) \ + asmlinkage long x (void) __attribute__((weak,alias("sys_ni_syscall"))) #endif /* __ASSEMBLY__ */ #endif /* __KERNEL__ */ diff --git a/include/asm-powerpc/vio.h b/include/asm-powerpc/vio.h index 4b51d42e141..0117b544ecb 100644 --- a/include/asm-powerpc/vio.h +++ b/include/asm-powerpc/vio.h @@ -45,7 +45,6 @@ struct iommu_table; * The vio_dev structure is used to describe virtual I/O devices. */ struct vio_dev { - struct iommu_table *iommu_table; /* vio_map_* uses this */ const char *name; const char *type; uint32_t unit_address; diff --git a/include/asm-powerpc/xmon.h b/include/asm-powerpc/xmon.h index f1d337ed68d..88320a05f0a 100644 --- a/include/asm-powerpc/xmon.h +++ b/include/asm-powerpc/xmon.h @@ -14,8 +14,10 @@ #ifdef CONFIG_XMON extern void xmon_setup(void); +extern void xmon_register_spus(struct list_head *list); #else static inline void xmon_setup(void) { }; +static inline void xmon_register_spus(struct list_head *list) { }; #endif #endif /* __KERNEL __ */ diff --git a/include/asm-ppc/device.h b/include/asm-ppc/device.h new file mode 100644 index 00000000000..d8f9872b0e2 --- /dev/null +++ b/include/asm-ppc/device.h @@ -0,0 +1,7 @@ +/* + * Arch specific extensions to struct device + * + * This file is released under the GPLv2 + */ +#include <asm-generic/device.h> + diff --git a/include/asm-ppc/highmem.h b/include/asm-ppc/highmem.h index 1d2c4ef81c2..f7b21ee302b 100644 --- a/include/asm-ppc/highmem.h +++ b/include/asm-ppc/highmem.h @@ -79,7 +79,7 @@ static inline void *kmap_atomic(struct page *page, enum km_type type) unsigned long vaddr; /* even !CONFIG_PREEMPT needs this, for in_atomic in do_page_fault */ - inc_preempt_count(); + pagefault_disable(); if (!PageHighMem(page)) return page_address(page); @@ -101,8 +101,7 @@ static inline void kunmap_atomic(void *kvaddr, enum km_type type) unsigned int idx = type + KM_TYPE_NR*smp_processor_id(); if (vaddr < KMAP_FIX_BEGIN) { // FIXME - dec_preempt_count(); - preempt_check_resched(); + pagefault_enable(); return; } @@ -115,8 +114,7 @@ static inline void kunmap_atomic(void *kvaddr, enum km_type type) pte_clear(&init_mm, vaddr, kmap_pte+idx); flush_tlb_page(NULL, vaddr); #endif - dec_preempt_count(); - preempt_check_resched(); + pagefault_enable(); } static inline struct page *kmap_atomic_to_page(void *ptr) diff --git a/include/asm-ppc/io.h b/include/asm-ppc/io.h index a4c411b753e..ccf1a9bb2e4 100644 --- a/include/asm-ppc/io.h +++ b/include/asm-ppc/io.h @@ -26,17 +26,11 @@ #if defined(CONFIG_4xx) #include <asm/ibm4xx.h> -#elif defined(CONFIG_PPC_MPC52xx) -#include <asm/mpc52xx.h> #elif defined(CONFIG_8xx) #include <asm/mpc8xx.h> #elif defined(CONFIG_8260) #include <asm/mpc8260.h> -#elif defined(CONFIG_83xx) -#include <asm/mpc83xx.h> -#elif defined(CONFIG_85xx) -#include <asm/mpc85xx.h> -#elif defined(CONFIG_APUS) +#elif defined(CONFIG_APUS) || !defined(CONFIG_PCI) #define _IO_BASE 0 #define _ISA_MEM_BASE 0 #define PCI_DRAM_OFFSET 0 @@ -237,6 +231,14 @@ static inline void __raw_writel(__u32 b, volatile void __iomem *addr) #define insl(port, buf, nl) _insl_ns((port)+___IO_BASE, (buf), (nl)) #define outsl(port, buf, nl) _outsl_ns((port)+___IO_BASE, (buf), (nl)) +#define readsb(a, b, n) _insb((a), (b), (n)) +#define readsw(a, b, n) _insw_ns((a), (b), (n)) +#define readsl(a, b, n) _insl_ns((a), (b), (n)) +#define writesb(a, b, n) _outsb((a),(b),(n)) +#define writesw(a, b, n) _outsw_ns((a),(b),(n)) +#define writesl(a, b, n) _outsl_ns((a),(b),(n)) + + /* * On powermacs and 8xx we will get a machine check exception * if we try to read data from a non-existent I/O port. Because @@ -327,12 +329,12 @@ __do_out_asm(outl, "stwbrx") #define inl_p(port) inl((port)) #define outl_p(val, port) outl((val), (port)) -extern void _insb(volatile u8 __iomem *port, void *buf, long count); -extern void _outsb(volatile u8 __iomem *port, const void *buf, long count); -extern void _insw_ns(volatile u16 __iomem *port, void *buf, long count); -extern void _outsw_ns(volatile u16 __iomem *port, const void *buf, long count); -extern void _insl_ns(volatile u32 __iomem *port, void *buf, long count); -extern void _outsl_ns(volatile u32 __iomem *port, const void *buf, long count); +extern void _insb(const volatile u8 __iomem *addr, void *buf, long count); +extern void _outsb(volatile u8 __iomem *addr,const void *buf,long count); +extern void _insw_ns(const volatile u16 __iomem *addr, void *buf, long count); +extern void _outsw_ns(volatile u16 __iomem *addr, const void *buf, long count); +extern void _insl_ns(const volatile u32 __iomem *addr, void *buf, long count); +extern void _outsl_ns(volatile u32 __iomem *addr, const void *buf, long count); #define IO_SPACE_LIMIT ~0 diff --git a/include/asm-ppc/m48t35.h b/include/asm-ppc/m48t35.h index f3c5e5dfa98..a5277ea4b19 100644 --- a/include/asm-ppc/m48t35.h +++ b/include/asm-ppc/m48t35.h @@ -39,7 +39,7 @@ #define M48T35_RTC_WATCHDOG_RB 0x03 #define M48T35_RTC_WATCHDOG_BMB 0x7c #define M48T35_RTC_WATCHDOG_WDS 0x80 -#define M48T35_RTC_WATCHDOG_ALL (M48T35_RTC_WATCHDOG_RB|M48T35_RTC_WATCHDOG_BMB|M48T35_RTC_W +#define M48T35_RTC_WATCHDOG_ALL (M48T35_RTC_WATCHDOG_RB|M48T35_RTC_WATCHDOG_BMB|M48T35_RTC_W) #define M48T35_RTC_CONTROL_WRITE 0x80 #define M48T35_RTC_CONTROL_READ 0x40 diff --git a/include/asm-ppc/mpc52xx.h b/include/asm-ppc/mpc52xx.h index 64c8874618d..d9d21aa68ba 100644 --- a/include/asm-ppc/mpc52xx.h +++ b/include/asm-ppc/mpc52xx.h @@ -29,17 +29,6 @@ struct pt_regs; #endif /* __ASSEMBLY__ */ -#ifdef CONFIG_PCI -#define _IO_BASE isa_io_base -#define _ISA_MEM_BASE isa_mem_base -#define PCI_DRAM_OFFSET pci_dram_offset -#else -#define _IO_BASE 0 -#define _ISA_MEM_BASE 0 -#define PCI_DRAM_OFFSET 0 -#endif - - /* ======================================================================== */ /* PPC Sys devices definition */ /* ======================================================================== */ diff --git a/include/asm-ppc/mpc83xx.h b/include/asm-ppc/mpc83xx.h index 02ed2c32571..c3061972309 100644 --- a/include/asm-ppc/mpc83xx.h +++ b/include/asm-ppc/mpc83xx.h @@ -25,14 +25,6 @@ #include <platforms/83xx/mpc834x_sys.h> #endif -#define _IO_BASE isa_io_base -#define _ISA_MEM_BASE isa_mem_base -#ifdef CONFIG_PCI -#define PCI_DRAM_OFFSET pci_dram_offset -#else -#define PCI_DRAM_OFFSET 0 -#endif - /* * The "residual" board information structure the boot loader passes * into the kernel. diff --git a/include/asm-ppc/mpc85xx.h b/include/asm-ppc/mpc85xx.h index 9b4851199c7..d7e4a79d77f 100644 --- a/include/asm-ppc/mpc85xx.h +++ b/include/asm-ppc/mpc85xx.h @@ -44,14 +44,6 @@ #include <platforms/85xx/tqm85xx.h> #endif -#define _IO_BASE isa_io_base -#define _ISA_MEM_BASE isa_mem_base -#ifdef CONFIG_PCI -#define PCI_DRAM_OFFSET pci_dram_offset -#else -#define PCI_DRAM_OFFSET 0 -#endif - /* * The "residual" board information structure the boot loader passes * into the kernel. diff --git a/include/asm-ppc/pci-bridge.h b/include/asm-ppc/pci-bridge.h index 9d5230689b3..4d35b844bc5 100644 --- a/include/asm-ppc/pci-bridge.h +++ b/include/asm-ppc/pci-bridge.h @@ -20,8 +20,8 @@ extern unsigned long pci_bus_mem_base_phys(unsigned int bus); extern struct pci_controller* pcibios_alloc_controller(void); /* Helper function for setting up resources */ -extern void pci_init_resource(struct resource *res, unsigned long start, - unsigned long end, int flags, char *name); +extern void pci_init_resource(struct resource *res, resource_size_t start, + resource_size_t end, int flags, char *name); /* Get the PCI host controller for a bus */ extern struct pci_controller* pci_bus_to_hose(int bus); @@ -43,18 +43,19 @@ struct pci_controller { struct pci_controller *next; struct pci_bus *bus; void *arch_data; + struct device *parent; int first_busno; int last_busno; int bus_offset; void __iomem *io_base_virt; - unsigned long io_base_phys; + resource_size_t io_base_phys; /* Some machines (PReP) have a non 1:1 mapping of * the PCI memory space in the CPU bus space */ - unsigned long pci_mem_offset; + resource_size_t pci_mem_offset; struct pci_ops *ops; volatile unsigned int __iomem *cfg_addr; diff --git a/include/asm-ppc/pci.h b/include/asm-ppc/pci.h index 11ffaaa5da1..9d162028dab 100644 --- a/include/asm-ppc/pci.h +++ b/include/asm-ppc/pci.h @@ -61,6 +61,27 @@ extern unsigned long pci_bus_to_phys(unsigned int ba, int busnr); */ #define PCI_DMA_BUS_IS_PHYS (1) +#ifdef CONFIG_NOT_COHERENT_CACHE +/* + * pci_unmap_{page,single} are NOPs but pci_dma_sync_single_for_cpu() + * and so on are not, so... + */ + +#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \ + dma_addr_t ADDR_NAME; +#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \ + __u32 LEN_NAME; +#define pci_unmap_addr(PTR, ADDR_NAME) \ + ((PTR)->ADDR_NAME) +#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \ + (((PTR)->ADDR_NAME) = (VAL)) +#define pci_unmap_len(PTR, LEN_NAME) \ + ((PTR)->LEN_NAME) +#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \ + (((PTR)->LEN_NAME) = (VAL)) + +#else /* coherent */ + /* pci_unmap_{page,single} is a nop so... */ #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) @@ -69,6 +90,8 @@ extern unsigned long pci_bus_to_phys(unsigned int ba, int busnr); #define pci_unmap_len(PTR, LEN_NAME) (0) #define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) +#endif /* CONFIG_NOT_COHERENT_CACHE */ + #ifdef CONFIG_PCI static inline void pci_dma_burst_advice(struct pci_dev *pdev, enum pci_dma_burst_strategy *strat, diff --git a/include/asm-ppc/reg_booke.h b/include/asm-ppc/reg_booke.h index 602fbadeaf4..a263fc1e65c 100644 --- a/include/asm-ppc/reg_booke.h +++ b/include/asm-ppc/reg_booke.h @@ -9,41 +9,9 @@ #ifndef __ASM_PPC_REG_BOOKE_H__ #define __ASM_PPC_REG_BOOKE_H__ -#ifndef __ASSEMBLY__ -/* Device Control Registers */ -void __mtdcr(int reg, unsigned int val); -unsigned int __mfdcr(int reg); -#define mfdcr(rn) \ - ({unsigned int rval; \ - if (__builtin_constant_p(rn)) \ - asm volatile("mfdcr %0," __stringify(rn) \ - : "=r" (rval)); \ - else \ - rval = __mfdcr(rn); \ - rval;}) - -#define mtdcr(rn, v) \ -do { \ - if (__builtin_constant_p(rn)) \ - asm volatile("mtdcr " __stringify(rn) ",%0" \ - : : "r" (v)); \ - else \ - __mtdcr(rn, v); \ -} while (0) - -/* R/W of indirect DCRs make use of standard naming conventions for DCRs */ -#define mfdcri(base, reg) \ -({ \ - mtdcr(base ## _CFGADDR, base ## _ ## reg); \ - mfdcr(base ## _CFGDATA); \ -}) - -#define mtdcri(base, reg, data) \ -do { \ - mtdcr(base ## _CFGADDR, base ## _ ## reg); \ - mtdcr(base ## _CFGDATA, data); \ -} while (0) +#include <asm/dcr.h> +#ifndef __ASSEMBLY__ /* Performance Monitor Registers */ #define mfpmr(rn) ({unsigned int rval; \ asm volatile("mfpmr %0," __stringify(rn) \ diff --git a/include/asm-s390/cacheflush.h b/include/asm-s390/cacheflush.h index e399a8ba2ed..f7cade8083f 100644 --- a/include/asm-s390/cacheflush.h +++ b/include/asm-s390/cacheflush.h @@ -7,6 +7,7 @@ /* Caches aren't brain-dead on the s390. */ #define flush_cache_all() do { } while (0) #define flush_cache_mm(mm) do { } while (0) +#define flush_cache_dup_mm(mm) do { } while (0) #define flush_cache_range(vma, start, end) do { } while (0) #define flush_cache_page(vma, vmaddr, pfn) do { } while (0) #define flush_dcache_page(page) do { } while (0) diff --git a/include/asm-s390/checksum.h b/include/asm-s390/checksum.h index 37c362d89fa..0a3cd7ec845 100644 --- a/include/asm-s390/checksum.h +++ b/include/asm-s390/checksum.h @@ -27,8 +27,8 @@ * * it's best to have buff aligned on a 32-bit boundary */ -static inline unsigned int -csum_partial(const unsigned char * buff, int len, unsigned int sum) +static inline __wsum +csum_partial(const void *buff, int len, __wsum sum) { register unsigned long reg2 asm("2") = (unsigned long) buff; register unsigned long reg3 asm("3") = (unsigned long) len; @@ -49,9 +49,9 @@ csum_partial(const unsigned char * buff, int len, unsigned int sum) * Copy from userspace and compute checksum. If we catch an exception * then zero the rest of the buffer. */ -static inline unsigned int -csum_partial_copy_from_user(const char __user *src, char *dst, - int len, unsigned int sum, +static inline __wsum +csum_partial_copy_from_user(const void __user *src, void *dst, + int len, __wsum sum, int *err_ptr) { int missing; @@ -66,8 +66,8 @@ csum_partial_copy_from_user(const char __user *src, char *dst, } -static inline unsigned int -csum_partial_copy_nocheck (const char *src, char *dst, int len, unsigned int sum) +static inline __wsum +csum_partial_copy_nocheck (const void *src, void *dst, int len, __wsum sum) { memcpy(dst,src,len); return csum_partial(dst, len, sum); @@ -76,8 +76,7 @@ csum_partial_copy_nocheck (const char *src, char *dst, int len, unsigned int sum /* * Fold a partial checksum without adding pseudo headers */ -static inline unsigned short -csum_fold(unsigned int sum) +static inline __sum16 csum_fold(__wsum sum) { #ifndef __s390x__ register_pair rp; @@ -100,7 +99,7 @@ csum_fold(unsigned int sum) " srl %0,16\n" /* %0 = H+L+C */ : "+&d" (sum) : : "cc", "2", "3"); #endif /* __s390x__ */ - return ((unsigned short) ~sum); + return (__force __sum16) ~sum; } /* @@ -108,8 +107,7 @@ csum_fold(unsigned int sum) * which always checksum on 4 octet boundaries. * */ -static inline unsigned short -ip_fast_csum(unsigned char *iph, unsigned int ihl) +static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl) { return csum_fold(csum_partial(iph, ihl*4, 0)); } @@ -118,10 +116,10 @@ ip_fast_csum(unsigned char *iph, unsigned int ihl) * computes the checksum of the TCP/UDP pseudo-header * returns a 32-bit checksum */ -static inline unsigned int -csum_tcpudp_nofold(unsigned long saddr, unsigned long daddr, +static inline __wsum +csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len, unsigned short proto, - unsigned int sum) + __wsum sum) { #ifndef __s390x__ asm volatile( @@ -137,12 +135,12 @@ csum_tcpudp_nofold(unsigned long saddr, unsigned long daddr, "1:" : "+&d" (sum) : "d" (daddr) : "cc"); asm volatile( - " alr %0,%1\n" /* sum += (len<<16) + (proto<<8) */ + " alr %0,%1\n" /* sum += len + proto */ " brc 12,2f\n" " ahi %0,1\n" /* add carry */ "2:" : "+&d" (sum) - : "d" (((unsigned int) len<<16) + (unsigned int) proto) + : "d" (len + proto) : "cc"); #else /* __s390x__ */ asm volatile( @@ -153,7 +151,7 @@ csum_tcpudp_nofold(unsigned long saddr, unsigned long daddr, "0: algr %0,%2\n" /* sum += daddr */ " brc 12,1f\n" " aghi %0,1\n" /* add carry */ - "1: algfr %0,%3\n" /* sum += (len<<16) + proto */ + "1: algfr %0,%3\n" /* sum += len + proto */ " brc 12,2f\n" " aghi %0,1\n" /* add carry */ "2: srlg 0,%0,32\n" @@ -163,7 +161,7 @@ csum_tcpudp_nofold(unsigned long saddr, unsigned long daddr, "3: llgfr %0,%0" : "+&d" (sum) : "d" (saddr), "d" (daddr), - "d" (((unsigned int) len<<16) + (unsigned int) proto) + "d" (len + proto) : "cc", "0"); #endif /* __s390x__ */ return sum; @@ -174,10 +172,10 @@ csum_tcpudp_nofold(unsigned long saddr, unsigned long daddr, * returns a 16-bit checksum, already complemented */ -static inline unsigned short int -csum_tcpudp_magic(unsigned long saddr, unsigned long daddr, +static inline __sum16 +csum_tcpudp_magic(__be32 saddr, __be32 daddr, unsigned short len, unsigned short proto, - unsigned int sum) + __wsum sum) { return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum)); } @@ -187,8 +185,7 @@ csum_tcpudp_magic(unsigned long saddr, unsigned long daddr, * in icmp.c */ -static inline unsigned short -ip_compute_csum(unsigned char * buff, int len) +static inline __sum16 ip_compute_csum(const void *buff, int len) { return csum_fold(csum_partial(buff, len, 0)); } diff --git a/include/asm-s390/cio.h b/include/asm-s390/cio.h index 81287d86329..d9278503098 100644 --- a/include/asm-s390/cio.h +++ b/include/asm-s390/cio.h @@ -278,17 +278,16 @@ struct ccw_dev_id { static inline int ccw_dev_id_is_equal(struct ccw_dev_id *dev_id1, struct ccw_dev_id *dev_id2) { - return !memcmp(dev_id1, dev_id2, sizeof(struct ccw_dev_id)); + if ((dev_id1->ssid == dev_id2->ssid) && + (dev_id1->devno == dev_id2->devno)) + return 1; + return 0; } extern int diag210(struct diag210 *addr); extern void wait_cons_dev(void); -extern void clear_all_subchannels(void); - -extern void cio_reset_channel_paths(void); - extern void css_schedule_reprobe(void); extern void reipl_ccw_dev(struct ccw_dev_id *id); diff --git a/include/asm-s390/cpcmd.h b/include/asm-s390/cpcmd.h index 1fcf65be7a2..48a9eab1642 100644 --- a/include/asm-s390/cpcmd.h +++ b/include/asm-s390/cpcmd.h @@ -7,8 +7,8 @@ * Christian Borntraeger (cborntra@de.ibm.com), */ -#ifndef __CPCMD__ -#define __CPCMD__ +#ifndef _ASM_S390_CPCMD_H +#define _ASM_S390_CPCMD_H /* * the lowlevel function for cpcmd @@ -16,9 +16,6 @@ */ extern int __cpcmd(const char *cmd, char *response, int rlen, int *response_code); -#ifndef __s390x__ -#define cpcmd __cpcmd -#else /* * cpcmd is the in-kernel interface for issuing CP commands * @@ -33,6 +30,5 @@ extern int __cpcmd(const char *cmd, char *response, int rlen, int *response_code * NOTE: If the response buffer is not below 2 GB, cpcmd can sleep */ extern int cpcmd(const char *cmd, char *response, int rlen, int *response_code); -#endif /*__s390x__*/ -#endif +#endif /* _ASM_S390_CPCMD_H */ diff --git a/include/asm-s390/dasd.h b/include/asm-s390/dasd.h index c042f957808..604f68fa6f5 100644 --- a/include/asm-s390/dasd.h +++ b/include/asm-s390/dasd.h @@ -69,11 +69,13 @@ typedef struct dasd_information2_t { * 0x01: readonly (ro) * 0x02: use diag discipline (diag) * 0x04: set the device initially online (internal use only) + * 0x08: enable ERP related logging */ #define DASD_FEATURE_DEFAULT 0x00 #define DASD_FEATURE_READONLY 0x01 #define DASD_FEATURE_USEDIAG 0x02 #define DASD_FEATURE_INITIAL_ONLINE 0x04 +#define DASD_FEATURE_ERPLOG 0x08 #define DASD_PARTN_BITS 2 diff --git a/include/asm-s390/device.h b/include/asm-s390/device.h new file mode 100644 index 00000000000..d8f9872b0e2 --- /dev/null +++ b/include/asm-s390/device.h @@ -0,0 +1,7 @@ +/* + * Arch specific extensions to struct device + * + * This file is released under the GPLv2 + */ +#include <asm-generic/device.h> + diff --git a/include/asm-s390/futex.h b/include/asm-s390/futex.h index 5e261e1de67..5c5d02de49e 100644 --- a/include/asm-s390/futex.h +++ b/include/asm-s390/futex.h @@ -4,8 +4,8 @@ #ifdef __KERNEL__ #include <linux/futex.h> +#include <linux/uaccess.h> #include <asm/errno.h> -#include <asm/uaccess.h> static inline int futex_atomic_op_inuser (int encoded_op, int __user *uaddr) { @@ -21,7 +21,9 @@ static inline int futex_atomic_op_inuser (int encoded_op, int __user *uaddr) if (! access_ok (VERIFY_WRITE, uaddr, sizeof(int))) return -EFAULT; + pagefault_disable(); ret = uaccess.futex_atomic_op(op, uaddr, oparg, &oldval); + pagefault_enable(); if (!ret) { switch (cmp) { diff --git a/include/asm-s390/kexec.h b/include/asm-s390/kexec.h index ce28ddda0f5..9c35c8ad1af 100644 --- a/include/asm-s390/kexec.h +++ b/include/asm-s390/kexec.h @@ -26,7 +26,7 @@ /* Maximum address we can use for the control pages */ /* Not more than 2GB */ -#define KEXEC_CONTROL_MEMORY_LIMIT (1<<31) +#define KEXEC_CONTROL_MEMORY_LIMIT (1UL<<31) /* Allocate one page for the pdp and the second for the code */ #define KEXEC_CONTROL_CODE_SIZE 4096 diff --git a/include/asm-s390/lowcore.h b/include/asm-s390/lowcore.h index 06583ed0bde..74f7389bd3e 100644 --- a/include/asm-s390/lowcore.h +++ b/include/asm-s390/lowcore.h @@ -362,6 +362,14 @@ static inline void set_prefix(__u32 address) asm volatile("spx %0" : : "m" (address) : "memory"); } +static inline __u32 store_prefix(void) +{ + __u32 address; + + asm volatile("stpx %0" : "=m" (address)); + return address; +} + #define __PANIC_MAGIC 0xDEADC0DE #endif diff --git a/include/asm-s390/page.h b/include/asm-s390/page.h index 363ea761d5e..05ea6f17278 100644 --- a/include/asm-s390/page.h +++ b/include/asm-s390/page.h @@ -127,6 +127,26 @@ page_get_storage_key(unsigned long addr) return skey; } +extern unsigned long max_pfn; + +static inline int pfn_valid(unsigned long pfn) +{ + unsigned long dummy; + int ccode; + + if (pfn >= max_pfn) + return 0; + + asm volatile( + " lra %0,0(%2)\n" + " ipm %1\n" + " srl %1,28\n" + : "=d" (dummy), "=d" (ccode) + : "a" (pfn << PAGE_SHIFT) + : "cc"); + return !ccode; +} + #endif /* !__ASSEMBLY__ */ /* to align the pointer to the (next) page boundary */ @@ -138,8 +158,6 @@ page_get_storage_key(unsigned long addr) #define __va(x) (void *)(unsigned long)(x) #define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT) #define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT) - -#define pfn_valid(pfn) ((pfn) < max_mapnr) #define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT) #define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \ diff --git a/include/asm-s390/pgalloc.h b/include/asm-s390/pgalloc.h index 28619de5eca..0707a7e2fc1 100644 --- a/include/asm-s390/pgalloc.h +++ b/include/asm-s390/pgalloc.h @@ -25,8 +25,11 @@ extern void diag10(unsigned long addr); * Page allocation orders. */ #ifndef __s390x__ +# define PTE_ALLOC_ORDER 0 +# define PMD_ALLOC_ORDER 0 # define PGD_ALLOC_ORDER 1 #else /* __s390x__ */ +# define PTE_ALLOC_ORDER 0 # define PMD_ALLOC_ORDER 2 # define PGD_ALLOC_ORDER 2 #endif /* __s390x__ */ diff --git a/include/asm-s390/pgtable.h b/include/asm-s390/pgtable.h index 36bb6dacf00..ae61aca5d48 100644 --- a/include/asm-s390/pgtable.h +++ b/include/asm-s390/pgtable.h @@ -107,16 +107,27 @@ extern char empty_zero_page[PAGE_SIZE]; * The vmalloc() routines leaves a hole of 4kB between each vmalloced * area for the same reason. ;) */ +extern unsigned long vmalloc_end; #define VMALLOC_OFFSET (8*1024*1024) #define VMALLOC_START (((unsigned long) high_memory + VMALLOC_OFFSET) \ & ~(VMALLOC_OFFSET-1)) +#define VMALLOC_END vmalloc_end + +/* + * We need some free virtual space to be able to do vmalloc. + * VMALLOC_MIN_SIZE defines the minimum size of the vmalloc + * area. On a machine with 2GB memory we make sure that we + * have at least 128MB free space for vmalloc. On a machine + * with 4TB we make sure we have at least 128GB. + */ #ifndef __s390x__ -# define VMALLOC_END (0x7fffffffL) +#define VMALLOC_MIN_SIZE 0x8000000UL +#define VMALLOC_END_INIT 0x80000000UL #else /* __s390x__ */ -# define VMALLOC_END (0x40000000000L) +#define VMALLOC_MIN_SIZE 0x2000000000UL +#define VMALLOC_END_INIT 0x40000000000UL #endif /* __s390x__ */ - /* * A 31 bit pagetable entry of S390 has following format: * | PFRA | | OS | @@ -806,11 +817,17 @@ static inline pte_t mk_swap_pte(unsigned long type, unsigned long offset) #define kern_addr_valid(addr) (1) +extern int add_shared_memory(unsigned long start, unsigned long size); +extern int remove_shared_memory(unsigned long start, unsigned long size); + /* * No page table caches to initialise */ #define pgtable_cache_init() do { } while (0) +#define __HAVE_ARCH_MEMMAP_INIT +extern void memmap_init(unsigned long, int, unsigned long, unsigned long); + #define __HAVE_ARCH_PTEP_ESTABLISH #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG diff --git a/include/asm-s390/posix_types.h b/include/asm-s390/posix_types.h index b94c98856e1..397d93fba3a 100644 --- a/include/asm-s390/posix_types.h +++ b/include/asm-s390/posix_types.h @@ -104,7 +104,7 @@ static inline int __FD_ISSET(unsigned long fd, const __kernel_fd_set *fdsetp) #undef __FD_ZERO #define __FD_ZERO(fdsetp) \ - ((void) memset ((__ptr_t) (fdsetp), 0, sizeof (__kernel_fd_set))) + ((void) memset ((void *) (fdsetp), 0, sizeof (__kernel_fd_set))) #endif /* __KERNEL__ */ diff --git a/include/asm-s390/qdio.h b/include/asm-s390/qdio.h index 7189c79bc67..127f72e7741 100644 --- a/include/asm-s390/qdio.h +++ b/include/asm-s390/qdio.h @@ -34,6 +34,7 @@ #define QDIO_QETH_QFMT 0 #define QDIO_ZFCP_QFMT 1 #define QDIO_IQDIO_QFMT 2 +#define QDIO_IQDIO_QFMT_ASYNCH 3 struct qdio_buffer_element{ unsigned int flags; diff --git a/include/asm-s390/reset.h b/include/asm-s390/reset.h new file mode 100644 index 00000000000..532e65a2aaf --- /dev/null +++ b/include/asm-s390/reset.h @@ -0,0 +1,24 @@ +/* + * include/asm-s390/reset.h + * + * Copyright IBM Corp. 2006 + * Author(s): Heiko Carstens <heiko.carstens@de.ibm.com> + */ + +#ifndef _ASM_S390_RESET_H +#define _ASM_S390_RESET_H + +#include <linux/list.h> + +struct reset_call { + struct list_head list; + void (*fn)(void); +}; + +extern void register_reset_call(struct reset_call *reset); +extern void unregister_reset_call(struct reset_call *reset); +extern void s390_reset_system(void); +extern void (*s390_reset_mcck_handler)(void); +extern void (*s390_reset_pgm_handler)(void); + +#endif /* _ASM_S390_RESET_H */ diff --git a/include/asm-s390/setup.h b/include/asm-s390/setup.h index 5d72eda8a11..9574fe80a04 100644 --- a/include/asm-s390/setup.h +++ b/include/asm-s390/setup.h @@ -2,18 +2,19 @@ * include/asm-s390/setup.h * * S390 version - * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation + * Copyright IBM Corp. 1999,2006 */ #ifndef _ASM_S390_SETUP_H #define _ASM_S390_SETUP_H +#define COMMAND_LINE_SIZE 896 + #ifdef __KERNEL__ #include <asm/types.h> #define PARMAREA 0x10400 -#define COMMAND_LINE_SIZE 896 #define MEMORY_CHUNKS 16 /* max 0x7fff */ #define IPL_PARMBLOCK_ORIGIN 0x2000 @@ -30,6 +31,17 @@ #endif /* __s390x__ */ #define COMMAND_LINE ((char *) (0x10480)) +#define CHUNK_READ_WRITE 0 +#define CHUNK_READ_ONLY 1 + +struct mem_chunk { + unsigned long addr; + unsigned long size; + unsigned long type; +}; + +extern struct mem_chunk memory_chunk[]; + /* * Machine features detected in head.S */ @@ -53,7 +65,6 @@ extern unsigned long machine_flags; #define MACHINE_HAS_MVCOS (machine_flags & 512) #endif /* __s390x__ */ - #define MACHINE_HAS_SCLP (!MACHINE_IS_P390) /* @@ -71,7 +82,6 @@ extern unsigned int console_irq; #define SET_CONSOLE_3215 do { console_mode = 2; } while (0) #define SET_CONSOLE_3270 do { console_mode = 3; } while (0) - struct ipl_list_hdr { u32 len; u8 reserved1[3]; diff --git a/include/asm-s390/smp.h b/include/asm-s390/smp.h index c3cf030ada4..7097c96ed02 100644 --- a/include/asm-s390/smp.h +++ b/include/asm-s390/smp.h @@ -18,6 +18,7 @@ #include <asm/lowcore.h> #include <asm/sigp.h> +#include <asm/ptrace.h> /* s390 specific smp.c headers @@ -101,6 +102,13 @@ smp_call_function_on(void (*func) (void *info), void *info, func(info); return 0; } + +static inline void smp_send_stop(void) +{ + /* Disable all interrupts/machine checks */ + __load_psw_mask(PSW_KERNEL_BITS & ~PSW_MASK_MCHECK); +} + #define smp_cpu_not_running(cpu) 1 #define smp_get_cpu(cpu) ({ 0; }) #define smp_put_cpu(cpu) ({ 0; }) diff --git a/include/asm-s390/system.h b/include/asm-s390/system.h index ccbafe4bf2c..bd0b05ae87d 100644 --- a/include/asm-s390/system.h +++ b/include/asm-s390/system.h @@ -115,6 +115,16 @@ extern void account_system_vtime(struct task_struct *); #define account_vtime(x) do { /* empty */ } while (0) #endif +#ifdef CONFIG_PFAULT +extern void pfault_irq_init(void); +extern int pfault_init(void); +extern void pfault_fini(void); +#else /* CONFIG_PFAULT */ +#define pfault_irq_init() do { } while (0) +#define pfault_init() ({-1;}) +#define pfault_fini() do { } while (0) +#endif /* CONFIG_PFAULT */ + #define finish_arch_switch(prev) do { \ set_fs(current->thread.mm_segment); \ account_vtime(prev); \ diff --git a/include/asm-s390/termbits.h b/include/asm-s390/termbits.h index eb3f8bfabf6..585c78a6e40 100644 --- a/include/asm-s390/termbits.h +++ b/include/asm-s390/termbits.h @@ -25,6 +25,17 @@ struct termios { cc_t c_cc[NCCS]; /* control characters */ }; +struct ktermios { + tcflag_t c_iflag; /* input mode flags */ + tcflag_t c_oflag; /* output mode flags */ + tcflag_t c_cflag; /* control mode flags */ + tcflag_t c_lflag; /* local mode flags */ + cc_t c_line; /* line discipline */ + cc_t c_cc[NCCS]; /* control characters */ + speed_t c_ispeed; /* input speed */ + speed_t c_ospeed; /* output speed */ +}; + /* c_cc characters */ #define VINTR 0 #define VQUIT 1 diff --git a/include/asm-s390/termios.h b/include/asm-s390/termios.h index d1e29cca54c..62b23caf370 100644 --- a/include/asm-s390/termios.h +++ b/include/asm-s390/termios.h @@ -75,39 +75,7 @@ struct termio { */ #define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0" -/* - * Translate a "termio" structure into a "termios". Ugh. - */ -#define SET_LOW_TERMIOS_BITS(termios, termio, x) { \ - unsigned short __tmp; \ - get_user(__tmp,&(termio)->x); \ - (termios)->x = (0xffff0000 & ((termios)->x)) | __tmp; \ -} - -#define user_termio_to_kernel_termios(termios, termio) \ -({ \ - SET_LOW_TERMIOS_BITS(termios, termio, c_iflag); \ - SET_LOW_TERMIOS_BITS(termios, termio, c_oflag); \ - SET_LOW_TERMIOS_BITS(termios, termio, c_cflag); \ - SET_LOW_TERMIOS_BITS(termios, termio, c_lflag); \ - copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \ -}) - -/* - * Translate a "termios" structure into a "termio". Ugh. - */ -#define kernel_termios_to_user_termio(termio, termios) \ -({ \ - put_user((termios)->c_iflag, &(termio)->c_iflag); \ - put_user((termios)->c_oflag, &(termio)->c_oflag); \ - put_user((termios)->c_cflag, &(termio)->c_cflag); \ - put_user((termios)->c_lflag, &(termio)->c_lflag); \ - put_user((termios)->c_line, &(termio)->c_line); \ - copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \ -}) - -#define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios)) -#define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios)) +#include <asm-generic/termios.h> #endif /* __KERNEL__ */ diff --git a/include/asm-s390/types.h b/include/asm-s390/types.h index ae2951cc83a..fc5d7cf1932 100644 --- a/include/asm-s390/types.h +++ b/include/asm-s390/types.h @@ -87,16 +87,6 @@ typedef union { } subreg; } register_pair; -#ifdef CONFIG_LBD -typedef u64 sector_t; -#define HAVE_SECTOR_T -#endif - -#ifdef CONFIG_LSF -typedef u64 blkcnt_t; -#define HAVE_BLKCNT_T -#endif - #endif /* ! __s390x__ */ #endif /* __ASSEMBLY__ */ #endif /* __KERNEL__ */ diff --git a/include/asm-s390/uaccess.h b/include/asm-s390/uaccess.h index 72ae4efddb4..73ac4e82217 100644 --- a/include/asm-s390/uaccess.h +++ b/include/asm-s390/uaccess.h @@ -201,7 +201,7 @@ extern int __get_user_bad(void) __attribute__((noreturn)); * Returns number of bytes that could not be copied. * On success, this will be zero. */ -static inline unsigned long +static inline unsigned long __must_check __copy_to_user(void __user *to, const void *from, unsigned long n) { if (__builtin_constant_p(n) && (n <= 256)) @@ -226,7 +226,7 @@ __copy_to_user(void __user *to, const void *from, unsigned long n) * Returns number of bytes that could not be copied. * On success, this will be zero. */ -static inline unsigned long +static inline unsigned long __must_check copy_to_user(void __user *to, const void *from, unsigned long n) { might_sleep(); @@ -252,7 +252,7 @@ copy_to_user(void __user *to, const void *from, unsigned long n) * If some data could not be copied, this function will pad the copied * data to the requested size using zero bytes. */ -static inline unsigned long +static inline unsigned long __must_check __copy_from_user(void *to, const void __user *from, unsigned long n) { if (__builtin_constant_p(n) && (n <= 256)) @@ -277,7 +277,7 @@ __copy_from_user(void *to, const void __user *from, unsigned long n) * If some data could not be copied, this function will pad the copied * data to the requested size using zero bytes. */ -static inline unsigned long +static inline unsigned long __must_check copy_from_user(void *to, const void __user *from, unsigned long n) { might_sleep(); @@ -288,13 +288,13 @@ copy_from_user(void *to, const void __user *from, unsigned long n) return n; } -static inline unsigned long +static inline unsigned long __must_check __copy_in_user(void __user *to, const void __user *from, unsigned long n) { return uaccess.copy_in_user(n, to, from); } -static inline unsigned long +static inline unsigned long __must_check copy_in_user(void __user *to, const void __user *from, unsigned long n) { might_sleep(); @@ -306,7 +306,7 @@ copy_in_user(void __user *to, const void __user *from, unsigned long n) /* * Copy a null terminated string from userspace. */ -static inline long +static inline long __must_check strncpy_from_user(char *dst, const char __user *src, long count) { long res = -EFAULT; @@ -343,13 +343,13 @@ strnlen_user(const char __user * src, unsigned long n) * Zero Userspace */ -static inline unsigned long +static inline unsigned long __must_check __clear_user(void __user *to, unsigned long n) { return uaccess.clear_user(n, to); } -static inline unsigned long +static inline unsigned long __must_check clear_user(void __user *to, unsigned long n) { might_sleep(); diff --git a/include/asm-s390/unistd.h b/include/asm-s390/unistd.h index 71d3c21b84f..fb6fef97d73 100644 --- a/include/asm-s390/unistd.h +++ b/include/asm-s390/unistd.h @@ -345,160 +345,6 @@ #ifdef __KERNEL__ -#include <linux/err.h> - -#define __syscall_return(type, res) \ -do { \ - if ((unsigned long)(res) >= (unsigned long)(-MAX_ERRNO)) { \ - errno = -(res); \ - res = -1; \ - } \ - return (type) (res); \ -} while (0) - -#define _svc_clobber "1", "cc", "memory" - -#define _syscall0(type,name) \ -type name(void) { \ - register long __svcres asm("2"); \ - long __res; \ - asm volatile( \ - " .if %1 < 256\n" \ - " svc %b1\n" \ - " .else\n" \ - " la %%r1,%1\n" \ - " svc 0\n" \ - " .endif" \ - : "=d" (__svcres) \ - : "i" (__NR_##name) \ - : _svc_clobber); \ - __res = __svcres; \ - __syscall_return(type,__res); \ -} - -#define _syscall1(type,name,type1,arg1) \ -type name(type1 arg1) { \ - register type1 __arg1 asm("2") = arg1; \ - register long __svcres asm("2"); \ - long __res; \ - asm volatile( \ - " .if %1 < 256\n" \ - " svc %b1\n" \ - " .else\n" \ - " la %%r1,%1\n" \ - " svc 0\n" \ - " .endif" \ - : "=d" (__svcres) \ - : "i" (__NR_##name), \ - "0" (__arg1) \ - : _svc_clobber); \ - __res = __svcres; \ - __syscall_return(type,__res); \ -} - -#define _syscall2(type,name,type1,arg1,type2,arg2) \ -type name(type1 arg1, type2 arg2) { \ - register type1 __arg1 asm("2") = arg1; \ - register type2 __arg2 asm("3") = arg2; \ - register long __svcres asm("2"); \ - long __res; \ - asm volatile( \ - " .if %1 < 256\n" \ - " svc %b1\n" \ - " .else\n" \ - " la %%r1,%1\n" \ - " svc 0\n" \ - " .endif" \ - : "=d" (__svcres) \ - : "i" (__NR_##name), \ - "0" (__arg1), \ - "d" (__arg2) \ - : _svc_clobber ); \ - __res = __svcres; \ - __syscall_return(type,__res); \ -} - -#define _syscall3(type,name,type1,arg1,type2,arg2,type3,arg3) \ -type name(type1 arg1, type2 arg2, type3 arg3) { \ - register type1 __arg1 asm("2") = arg1; \ - register type2 __arg2 asm("3") = arg2; \ - register type3 __arg3 asm("4") = arg3; \ - register long __svcres asm("2"); \ - long __res; \ - asm volatile( \ - " .if %1 < 256\n" \ - " svc %b1\n" \ - " .else\n" \ - " la %%r1,%1\n" \ - " svc 0\n" \ - " .endif" \ - : "=d" (__svcres) \ - : "i" (__NR_##name), \ - "0" (__arg1), \ - "d" (__arg2), \ - "d" (__arg3) \ - : _svc_clobber); \ - __res = __svcres; \ - __syscall_return(type,__res); \ -} - -#define _syscall4(type,name,type1,arg1,type2,arg2,type3,arg3, \ - type4,name4) \ -type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4) { \ - register type1 __arg1 asm("2") = arg1; \ - register type2 __arg2 asm("3") = arg2; \ - register type3 __arg3 asm("4") = arg3; \ - register type4 __arg4 asm("5") = arg4; \ - register long __svcres asm("2"); \ - long __res; \ - asm volatile( \ - " .if %1 < 256\n" \ - " svc %b1\n" \ - " .else\n" \ - " la %%r1,%1\n" \ - " svc 0\n" \ - " .endif" \ - : "=d" (__svcres) \ - : "i" (__NR_##name), \ - "0" (__arg1), \ - "d" (__arg2), \ - "d" (__arg3), \ - "d" (__arg4) \ - : _svc_clobber); \ - __res = __svcres; \ - __syscall_return(type,__res); \ -} - -#define _syscall5(type,name,type1,arg1,type2,arg2,type3,arg3, \ - type4,name4,type5,name5) \ -type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, \ - type5 arg5) { \ - register type1 __arg1 asm("2") = arg1; \ - register type2 __arg2 asm("3") = arg2; \ - register type3 __arg3 asm("4") = arg3; \ - register type4 __arg4 asm("5") = arg4; \ - register type5 __arg5 asm("6") = arg5; \ - register long __svcres asm("2"); \ - long __res; \ - asm volatile( \ - " .if %1 < 256\n" \ - " svc %b1\n" \ - " .else\n" \ - " la %%r1,%1\n" \ - " svc 0\n" \ - " .endif" \ - : "=d" (__svcres) \ - : "i" (__NR_##name), \ - "0" (__arg1), \ - "d" (__arg2), \ - "d" (__arg3), \ - "d" (__arg4), \ - "d" (__arg5) \ - : _svc_clobber); \ - __res = __svcres; \ - __syscall_return(type,__res); \ -} - #define __ARCH_WANT_IPC_PARSE_VERSION #define __ARCH_WANT_OLD_READDIR #define __ARCH_WANT_SYS_ALARM diff --git a/include/asm-s390/zcrypt.h b/include/asm-s390/zcrypt.h index 7244c68464f..b90e55888a5 100644 --- a/include/asm-s390/zcrypt.h +++ b/include/asm-s390/zcrypt.h @@ -180,40 +180,8 @@ struct ica_xcRB { * for the implementation details for the contents of the * block * - * Z90STAT_TOTALCOUNT - * Return an integer count of all device types together. - * - * Z90STAT_PCICACOUNT - * Return an integer count of all PCICAs. - * - * Z90STAT_PCICCCOUNT - * Return an integer count of all PCICCs. - * - * Z90STAT_PCIXCCMCL2COUNT - * Return an integer count of all MCL2 PCIXCCs. - * - * Z90STAT_PCIXCCMCL3COUNT - * Return an integer count of all MCL3 PCIXCCs. - * - * Z90STAT_CEX2CCOUNT - * Return an integer count of all CEX2Cs. - * - * Z90STAT_CEX2ACOUNT - * Return an integer count of all CEX2As. - * - * Z90STAT_REQUESTQ_COUNT - * Return an integer count of the number of entries waiting to be - * sent to a device. - * - * Z90STAT_PENDINGQ_COUNT - * Return an integer count of the number of entries sent to a - * device awaiting the reply. - * - * Z90STAT_TOTALOPEN_COUNT - * Return an integer count of the number of open file handles. - * - * Z90STAT_DOMAIN_INDEX - * Return the integer value of the Cryptographic Domain. + * ZSECSENDCPRB + * Send an arbitrary CPRB to a crypto card. * * Z90STAT_STATUS_MASK * Return an 64 element array of unsigned chars for the status of @@ -235,28 +203,51 @@ struct ica_xcRB { * of successfully completed requests per device since the device * was detected and made available. * - * ICAZ90STATUS (deprecated) + * Z90STAT_REQUESTQ_COUNT + * Return an integer count of the number of entries waiting to be + * sent to a device. + * + * Z90STAT_PENDINGQ_COUNT + * Return an integer count of the number of entries sent to all + * devices awaiting the reply. + * + * Z90STAT_TOTALOPEN_COUNT + * Return an integer count of the number of open file handles. + * + * Z90STAT_DOMAIN_INDEX + * Return the integer value of the Cryptographic Domain. + * + * The following ioctls are deprecated and should be no longer used: + * + * Z90STAT_TOTALCOUNT + * Return an integer count of all device types together. + * + * Z90STAT_PCICACOUNT + * Return an integer count of all PCICAs. + * + * Z90STAT_PCICCCOUNT + * Return an integer count of all PCICCs. + * + * Z90STAT_PCIXCCMCL2COUNT + * Return an integer count of all MCL2 PCIXCCs. + * + * Z90STAT_PCIXCCMCL3COUNT + * Return an integer count of all MCL3 PCIXCCs. + * + * Z90STAT_CEX2CCOUNT + * Return an integer count of all CEX2Cs. + * + * Z90STAT_CEX2ACOUNT + * Return an integer count of all CEX2As. + * + * ICAZ90STATUS * Return some device driver status in a ica_z90_status struct * This takes an ica_z90_status struct as its arg. * - * NOTE: this ioctl() is deprecated, and has been replaced with - * single ioctl()s for each type of status being requested - * - * Z90STAT_PCIXCCCOUNT (deprecated) + * Z90STAT_PCIXCCCOUNT * Return an integer count of all PCIXCCs (MCL2 + MCL3). * This is DEPRECATED now that MCL3 PCIXCCs are treated differently from * MCL2 PCIXCCs. - * - * Z90QUIESCE (not recommended) - * Quiesce the driver. This is intended to stop all new - * requests from being processed. Its use is NOT recommended, - * except in circumstances where there is no other way to stop - * callers from accessing the driver. Its original use was to - * allow the driver to be "drained" of work in preparation for - * a system shutdown. - * - * NOTE: once issued, this ban on new work cannot be undone - * except by unloading and reloading the driver. */ /** diff --git a/include/asm-sh/atomic-irq.h b/include/asm-sh/atomic-irq.h new file mode 100644 index 00000000000..74f7943cff6 --- /dev/null +++ b/include/asm-sh/atomic-irq.h @@ -0,0 +1,71 @@ +#ifndef __ASM_SH_ATOMIC_IRQ_H +#define __ASM_SH_ATOMIC_IRQ_H + +/* + * To get proper branch prediction for the main line, we must branch + * forward to code at the end of this object's .text section, then + * branch back to restart the operation. + */ +static inline void atomic_add(int i, atomic_t *v) +{ + unsigned long flags; + + local_irq_save(flags); + *(long *)v += i; + local_irq_restore(flags); +} + +static inline void atomic_sub(int i, atomic_t *v) +{ + unsigned long flags; + + local_irq_save(flags); + *(long *)v -= i; + local_irq_restore(flags); +} + +static inline int atomic_add_return(int i, atomic_t *v) +{ + unsigned long temp, flags; + + local_irq_save(flags); + temp = *(long *)v; + temp += i; + *(long *)v = temp; + local_irq_restore(flags); + + return temp; +} + +static inline int atomic_sub_return(int i, atomic_t *v) +{ + unsigned long temp, flags; + + local_irq_save(flags); + temp = *(long *)v; + temp -= i; + *(long *)v = temp; + local_irq_restore(flags); + + return temp; +} + +static inline void atomic_clear_mask(unsigned int mask, atomic_t *v) +{ + unsigned long flags; + + local_irq_save(flags); + *(long *)v &= ~mask; + local_irq_restore(flags); +} + +static inline void atomic_set_mask(unsigned int mask, atomic_t *v) +{ + unsigned long flags; + + local_irq_save(flags); + *(long *)v |= mask; + local_irq_restore(flags); +} + +#endif /* __ASM_SH_ATOMIC_IRQ_H */ diff --git a/include/asm-sh/atomic-llsc.h b/include/asm-sh/atomic-llsc.h new file mode 100644 index 00000000000..4b00b78e3f4 --- /dev/null +++ b/include/asm-sh/atomic-llsc.h @@ -0,0 +1,107 @@ +#ifndef __ASM_SH_ATOMIC_LLSC_H +#define __ASM_SH_ATOMIC_LLSC_H + +/* + * To get proper branch prediction for the main line, we must branch + * forward to code at the end of this object's .text section, then + * branch back to restart the operation. + */ +static inline void atomic_add(int i, atomic_t *v) +{ + unsigned long tmp; + + __asm__ __volatile__ ( +"1: movli.l @%2, %0 ! atomic_add \n" +" add %1, %0 \n" +" movco.l %0, @%2 \n" +" bf 1b \n" + : "=&z" (tmp) + : "r" (i), "r" (&v->counter) + : "t"); +} + +static inline void atomic_sub(int i, atomic_t *v) +{ + unsigned long tmp; + + __asm__ __volatile__ ( +"1: movli.l @%2, %0 ! atomic_sub \n" +" sub %1, %0 \n" +" movco.l %0, @%2 \n" +" bf 1b \n" + : "=&z" (tmp) + : "r" (i), "r" (&v->counter) + : "t"); +} + +/* + * SH-4A note: + * + * We basically get atomic_xxx_return() for free compared with + * atomic_xxx(). movli.l/movco.l require r0 due to the instruction + * encoding, so the retval is automatically set without having to + * do any special work. + */ +static inline int atomic_add_return(int i, atomic_t *v) +{ + unsigned long temp; + + __asm__ __volatile__ ( +"1: movli.l @%2, %0 ! atomic_add_return \n" +" add %1, %0 \n" +" movco.l %0, @%2 \n" +" bf 1b \n" +" synco \n" + : "=&z" (temp) + : "r" (i), "r" (&v->counter) + : "t"); + + return temp; +} + +static inline int atomic_sub_return(int i, atomic_t *v) +{ + unsigned long temp; + + __asm__ __volatile__ ( +"1: movli.l @%2, %0 ! atomic_sub_return \n" +" sub %1, %0 \n" +" movco.l %0, @%2 \n" +" bf 1b \n" +" synco \n" + : "=&z" (temp) + : "r" (i), "r" (&v->counter) + : "t"); + + return temp; +} + +static inline void atomic_clear_mask(unsigned int mask, atomic_t *v) +{ + unsigned long tmp; + + __asm__ __volatile__ ( +"1: movli.l @%2, %0 ! atomic_clear_mask \n" +" and %1, %0 \n" +" movco.l %0, @%2 \n" +" bf 1b \n" + : "=&z" (tmp) + : "r" (~mask), "r" (&v->counter) + : "t"); +} + +static inline void atomic_set_mask(unsigned int mask, atomic_t *v) +{ + unsigned long tmp; + + __asm__ __volatile__ ( +"1: movli.l @%2, %0 ! atomic_set_mask \n" +" or %1, %0 \n" +" movco.l %0, @%2 \n" +" bf 1b \n" + : "=&z" (tmp) + : "r" (mask), "r" (&v->counter) + : "t"); +} + +#endif /* __ASM_SH_ATOMIC_LLSC_H */ diff --git a/include/asm-sh/atomic.h b/include/asm-sh/atomic.h index 8bdc1ba56f7..e12570b9339 100644 --- a/include/asm-sh/atomic.h +++ b/include/asm-sh/atomic.h @@ -17,119 +17,14 @@ typedef struct { volatile int counter; } atomic_t; #include <linux/compiler.h> #include <asm/system.h> -/* - * To get proper branch prediction for the main line, we must branch - * forward to code at the end of this object's .text section, then - * branch back to restart the operation. - */ -static inline void atomic_add(int i, atomic_t *v) -{ #ifdef CONFIG_CPU_SH4A - unsigned long tmp; - - __asm__ __volatile__ ( -"1: movli.l @%3, %0 ! atomic_add \n" -" add %2, %0 \n" -" movco.l %0, @%3 \n" -" bf 1b \n" - : "=&z" (tmp), "=r" (&v->counter) - : "r" (i), "r" (&v->counter) - : "t"); +#include <asm/atomic-llsc.h> #else - unsigned long flags; - - local_irq_save(flags); - *(long *)v += i; - local_irq_restore(flags); -#endif -} - -static inline void atomic_sub(int i, atomic_t *v) -{ -#ifdef CONFIG_CPU_SH4A - unsigned long tmp; - - __asm__ __volatile__ ( -"1: movli.l @%3, %0 ! atomic_sub \n" -" sub %2, %0 \n" -" movco.l %0, @%3 \n" -" bf 1b \n" - : "=&z" (tmp), "=r" (&v->counter) - : "r" (i), "r" (&v->counter) - : "t"); -#else - unsigned long flags; - - local_irq_save(flags); - *(long *)v -= i; - local_irq_restore(flags); +#include <asm/atomic-irq.h> #endif -} - -/* - * SH-4A note: - * - * We basically get atomic_xxx_return() for free compared with - * atomic_xxx(). movli.l/movco.l require r0 due to the instruction - * encoding, so the retval is automatically set without having to - * do any special work. - */ -static inline int atomic_add_return(int i, atomic_t *v) -{ - unsigned long temp; - -#ifdef CONFIG_CPU_SH4A - __asm__ __volatile__ ( -"1: movli.l @%3, %0 ! atomic_add_return \n" -" add %2, %0 \n" -" movco.l %0, @%3 \n" -" bf 1b \n" -" synco \n" - : "=&z" (temp), "=r" (&v->counter) - : "r" (i), "r" (&v->counter) - : "t"); -#else - unsigned long flags; - - local_irq_save(flags); - temp = *(long *)v; - temp += i; - *(long *)v = temp; - local_irq_restore(flags); -#endif - - return temp; -} #define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0) -static inline int atomic_sub_return(int i, atomic_t *v) -{ - unsigned long temp; - -#ifdef CONFIG_CPU_SH4A - __asm__ __volatile__ ( -"1: movli.l @%3, %0 ! atomic_sub_return \n" -" sub %2, %0 \n" -" movco.l %0, @%3 \n" -" bf 1b \n" -" synco \n" - : "=&z" (temp), "=r" (&v->counter) - : "r" (i), "r" (&v->counter) - : "t"); -#else - unsigned long flags; - - local_irq_save(flags); - temp = *(long *)v; - temp -= i; - *(long *)v = temp; - local_irq_restore(flags); -#endif - - return temp; -} - #define atomic_dec_return(v) atomic_sub_return(1,(v)) #define atomic_inc_return(v) atomic_add_return(1,(v)) @@ -180,50 +75,6 @@ static inline int atomic_add_unless(atomic_t *v, int a, int u) } #define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) -static inline void atomic_clear_mask(unsigned int mask, atomic_t *v) -{ -#ifdef CONFIG_CPU_SH4A - unsigned long tmp; - - __asm__ __volatile__ ( -"1: movli.l @%3, %0 ! atomic_clear_mask \n" -" and %2, %0 \n" -" movco.l %0, @%3 \n" -" bf 1b \n" - : "=&z" (tmp), "=r" (&v->counter) - : "r" (~mask), "r" (&v->counter) - : "t"); -#else - unsigned long flags; - - local_irq_save(flags); - *(long *)v &= ~mask; - local_irq_restore(flags); -#endif -} - -static inline void atomic_set_mask(unsigned int mask, atomic_t *v) -{ -#ifdef CONFIG_CPU_SH4A - unsigned long tmp; - - __asm__ __volatile__ ( -"1: movli.l @%3, %0 ! atomic_set_mask \n" -" or %2, %0 \n" -" movco.l %0, @%3 \n" -" bf 1b \n" - : "=&z" (tmp), "=r" (&v->counter) - : "r" (mask), "r" (&v->counter) - : "t"); -#else - unsigned long flags; - - local_irq_save(flags); - *(long *)v |= mask; - local_irq_restore(flags); -#endif -} - /* Atomic operations are already serializing on SH */ #define smp_mb__before_atomic_dec() barrier() #define smp_mb__after_atomic_dec() barrier() diff --git a/include/asm-sh/bug.h b/include/asm-sh/bug.h index 1b4fc52a59e..2f89dd06d0c 100644 --- a/include/asm-sh/bug.h +++ b/include/asm-sh/bug.h @@ -1,19 +1,54 @@ #ifndef __ASM_SH_BUG_H #define __ASM_SH_BUG_H - #ifdef CONFIG_BUG -/* - * Tell the user there is some problem. - */ -#define BUG() do { \ - printk("kernel BUG at %s:%d!\n", __FILE__, __LINE__); \ - *(volatile int *)0 = 0; \ + +struct bug_frame { + unsigned short opcode; + unsigned short line; + const char *file; + const char *func; +}; + +struct pt_regs; + +extern void handle_BUG(struct pt_regs *); + +#define TRAPA_BUG_OPCODE 0xc33e /* trapa #0x3e */ + +#ifdef CONFIG_DEBUG_BUGVERBOSE + +#define BUG() \ +do { \ + __asm__ __volatile__ ( \ + ".align 2\n\t" \ + ".short %O0\n\t" \ + ".short %O1\n\t" \ + ".long %O2\n\t" \ + ".long %O3\n\t" \ + : \ + : "n" (TRAPA_BUG_OPCODE), \ + "i" (__LINE__), "X" (__FILE__), \ + "X" (__FUNCTION__)); \ +} while (0) + +#else + +#define BUG() \ +do { \ + __asm__ __volatile__ ( \ + ".align 2\n\t" \ + ".short %O0\n\t" \ + : \ + : "n" (TRAPA_BUG_OPCODE)); \ } while (0) +#endif /* CONFIG_DEBUG_BUGVERBOSE */ + #define HAVE_ARCH_BUG -#endif + +#endif /* CONFIG_BUG */ #include <asm-generic/bug.h> -#endif +#endif /* __ASM_SH_BUG_H */ diff --git a/include/asm-sh/bugs.h b/include/asm-sh/bugs.h index beeea40f549..a294997a841 100644 --- a/include/asm-sh/bugs.h +++ b/include/asm-sh/bugs.h @@ -16,25 +16,37 @@ static void __init check_bugs(void) { - extern char *get_cpu_subtype(void); extern unsigned long loops_per_jiffy; - char *p= &init_utsname()->machine[2]; /* "sh" */ + char *p = &init_utsname()->machine[2]; /* "sh" */ cpu_data->loops_per_jiffy = loops_per_jiffy; switch (cpu_data->type) { - case CPU_SH7604: + case CPU_SH7604 ... CPU_SH7619: *p++ = '2'; break; + case CPU_SH7206: + *p++ = '2'; + *p++ = 'a'; + break; case CPU_SH7705 ... CPU_SH7300: *p++ = '3'; break; case CPU_SH7750 ... CPU_SH4_501: *p++ = '4'; break; - case CPU_SH7770 ... CPU_SH7781: + case CPU_SH7770 ... CPU_SH7785: + *p++ = '4'; + *p++ = 'a'; + break; + case CPU_SH73180 ... CPU_SH7722: *p++ = '4'; *p++ = 'a'; + *p++ = 'l'; + *p++ = '-'; + *p++ = 'd'; + *p++ = 's'; + *p++ = 'p'; break; default: *p++ = '?'; diff --git a/include/asm-sh/checksum.h b/include/asm-sh/checksum.h index 08168afe674..4bc8357e889 100644 --- a/include/asm-sh/checksum.h +++ b/include/asm-sh/checksum.h @@ -23,7 +23,7 @@ * * it's best to have buff aligned on a 32-bit boundary */ -asmlinkage unsigned int csum_partial(const unsigned char * buff, int len, unsigned int sum); +asmlinkage __wsum csum_partial(const void *buff, int len, __wsum sum); /* * the same as csum_partial, but copies from src while it @@ -33,35 +33,37 @@ asmlinkage unsigned int csum_partial(const unsigned char * buff, int len, unsign * better 64-bit) boundary */ -asmlinkage unsigned int csum_partial_copy_generic(const unsigned char *src, unsigned char *dst, - int len, int sum, int *src_err_ptr, int *dst_err_ptr); +asmlinkage __wsum csum_partial_copy_generic(const void *src, void *dst, + int len, __wsum sum, + int *src_err_ptr, int *dst_err_ptr); /* * Note: when you get a NULL pointer exception here this means someone - * passed in an incorrect kernel address to one of these functions. - * - * If you use these functions directly please don't forget the + * passed in an incorrect kernel address to one of these functions. + * + * If you use these functions directly please don't forget the * access_ok(). */ -static __inline__ -unsigned int csum_partial_copy_nocheck (const unsigned char *src, unsigned char *dst, - int len, int sum) +static inline +__wsum csum_partial_copy_nocheck(const void *src, void *dst, + int len, __wsum sum) { - return csum_partial_copy_generic ( src, dst, len, sum, NULL, NULL); + return csum_partial_copy_generic(src, dst, len, sum, NULL, NULL); } -static __inline__ -unsigned int csum_partial_copy_from_user (const unsigned char *src, unsigned char *dst, - int len, int sum, int *err_ptr) +static inline +__wsum csum_partial_copy_from_user(const void __user *src, void *dst, + int len, __wsum sum, int *err_ptr) { - return csum_partial_copy_generic ( src, dst, len, sum, err_ptr, NULL); + return csum_partial_copy_generic((__force const void *)src, dst, + len, sum, err_ptr, NULL); } /* * Fold a partial checksum */ -static __inline__ unsigned int csum_fold(unsigned int sum) +static inline __sum16 csum_fold(__wsum sum) { unsigned int __dummy; __asm__("swap.w %0, %1\n\t" @@ -74,7 +76,7 @@ static __inline__ unsigned int csum_fold(unsigned int sum) : "=r" (sum), "=&r" (__dummy) : "0" (sum) : "t"); - return sum; + return (__force __sum16)sum; } /* @@ -84,7 +86,7 @@ static __inline__ unsigned int csum_fold(unsigned int sum) * i386 version by Jorge Cwik <jorge@laser.satlink.net>, adapted * for linux by * Arnt Gulbrandsen. */ -static __inline__ unsigned short ip_fast_csum(unsigned char * iph, unsigned int ihl) +static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl) { unsigned int sum, __dummy0, __dummy1; @@ -112,16 +114,15 @@ static __inline__ unsigned short ip_fast_csum(unsigned char * iph, unsigned int return csum_fold(sum); } -static __inline__ unsigned long csum_tcpudp_nofold(unsigned long saddr, - unsigned long daddr, - unsigned short len, - unsigned short proto, - unsigned int sum) +static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr, + unsigned short len, + unsigned short proto, + __wsum sum) { #ifdef __LITTLE_ENDIAN__ - unsigned long len_proto = (ntohs(len)<<16)+proto*256; + unsigned long len_proto = (proto + len) << 8; #else - unsigned long len_proto = (proto<<16)+len; + unsigned long len_proto = proto + len; #endif __asm__("clrt\n\t" "addc %0, %1\n\t" @@ -132,6 +133,7 @@ static __inline__ unsigned long csum_tcpudp_nofold(unsigned long saddr, : "=r" (sum), "=r" (len_proto) : "r" (daddr), "r" (saddr), "1" (len_proto), "0" (sum) : "t"); + return sum; } @@ -139,32 +141,28 @@ static __inline__ unsigned long csum_tcpudp_nofold(unsigned long saddr, * computes the checksum of the TCP/UDP pseudo-header * returns a 16-bit checksum, already complemented */ -static __inline__ unsigned short int csum_tcpudp_magic(unsigned long saddr, - unsigned long daddr, - unsigned short len, - unsigned short proto, - unsigned int sum) +static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr, + unsigned short len, + unsigned short proto, + __wsum sum) { - return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum)); + return csum_fold(csum_tcpudp_nofold(saddr, daddr, len, proto, sum)); } /* * this routine is used for miscellaneous IP-like checksums, mainly * in icmp.c */ - -static __inline__ unsigned short ip_compute_csum(unsigned char * buff, int len) +static inline __sum16 ip_compute_csum(const void *buff, int len) { - return csum_fold (csum_partial(buff, len, 0)); + return csum_fold(csum_partial(buff, len, 0)); } #define _HAVE_ARCH_IPV6_CSUM -#ifdef CONFIG_IPV6 -static __inline__ unsigned short int csum_ipv6_magic(struct in6_addr *saddr, - struct in6_addr *daddr, - __u32 len, - unsigned short proto, - unsigned int sum) +static inline __sum16 csum_ipv6_magic(const struct in6_addr *saddr, + const struct in6_addr *daddr, + __u32 len, unsigned short proto, + __wsum sum) { unsigned int __dummy; __asm__("clrt\n\t" @@ -189,29 +187,29 @@ static __inline__ unsigned short int csum_ipv6_magic(struct in6_addr *saddr, "movt %1\n\t" "add %1, %0\n" : "=r" (sum), "=&r" (__dummy) - : "r" (saddr), "r" (daddr), + : "r" (saddr), "r" (daddr), "r" (htonl(len)), "r" (htonl(proto)), "0" (sum) : "t"); return csum_fold(sum); } -#endif -/* +/* * Copy and checksum to user */ #define HAVE_CSUM_COPY_USER -static __inline__ unsigned int csum_and_copy_to_user (const unsigned char *src, - unsigned char __user *dst, - int len, int sum, - int *err_ptr) +static inline __wsum csum_and_copy_to_user(const void *src, + void __user *dst, + int len, __wsum sum, + int *err_ptr) { if (access_ok(VERIFY_WRITE, dst, len)) - return csum_partial_copy_generic(src, dst, len, sum, NULL, err_ptr); + return csum_partial_copy_generic((__force const void *)src, + dst, len, sum, NULL, err_ptr); if (len) *err_ptr = -EFAULT; - return -1; /* invalid checksum */ + return (__force __wsum)-1; /* invalid checksum */ } #endif /* __ASM_SH_CHECKSUM_H */ diff --git a/include/asm-sh/clock.h b/include/asm-sh/clock.h index fdfb75b30f0..1df92807f8c 100644 --- a/include/asm-sh/clock.h +++ b/include/asm-sh/clock.h @@ -4,6 +4,7 @@ #include <linux/kref.h> #include <linux/list.h> #include <linux/seq_file.h> +#include <linux/clk.h> struct clk; @@ -18,7 +19,7 @@ struct clk_ops { struct clk { struct list_head node; const char *name; - + int id; struct module *owner; struct clk *parent; @@ -40,22 +41,13 @@ void arch_init_clk_ops(struct clk_ops **, int type); int clk_init(void); int __clk_enable(struct clk *); -int clk_enable(struct clk *); - void __clk_disable(struct clk *); -void clk_disable(struct clk *); -int clk_set_rate(struct clk *, unsigned long rate); -unsigned long clk_get_rate(struct clk *); void clk_recalc_rate(struct clk *); -struct clk *clk_get(const char *id); -void clk_put(struct clk *); - int clk_register(struct clk *); void clk_unregister(struct clk *); int show_clocks(struct seq_file *m); #endif /* __ASM_SH_CLOCK_H */ - diff --git a/include/asm-sh/cpu-sh2/cache.h b/include/asm-sh/cpu-sh2/cache.h index cd96402e856..20b9796842d 100644 --- a/include/asm-sh/cpu-sh2/cache.h +++ b/include/asm-sh/cpu-sh2/cache.h @@ -12,6 +12,7 @@ #define L1_CACHE_SHIFT 4 +#if defined(CONFIG_CPU_SUBTYPE_SH7604) #define CCR 0xfffffe92 /* Address of Cache Control Register */ #define CCR_CACHE_CE 0x01 /* Cache enable */ @@ -27,5 +28,26 @@ #define CCR_CACHE_ORA CCR_CACHE_TW #define CCR_CACHE_WT 0x00 /* SH-2 is _always_ write-through */ +#elif defined(CONFIG_CPU_SUBTYPE_SH7619) +#define CCR1 0xffffffec +#define CCR CCR1 + +#define CCR_CACHE_CE 0x01 /* Cache enable */ +#define CCR_CACHE_WT 0x06 /* CCR[bit1=1,bit2=1] */ + /* 0x00000000-0x7fffffff: Write-through */ + /* 0x80000000-0x9fffffff: Write-back */ + /* 0xc0000000-0xdfffffff: Write-through */ +#define CCR_CACHE_CB 0x00 /* CCR[bit1=0,bit2=0] */ + /* 0x00000000-0x7fffffff: Write-back */ + /* 0x80000000-0x9fffffff: Write-through */ + /* 0xc0000000-0xdfffffff: Write-back */ +#define CCR_CACHE_CF 0x08 /* Cache invalidate */ + +#define CACHE_OC_ADDRESS_ARRAY 0xf0000000 +#define CACHE_OC_DATA_ARRAY 0xf1000000 + +#define CCR_CACHE_ENABLE CCR_CACHE_CE +#define CCR_CACHE_INVALIDATE CCR_CACHE_CF +#endif #endif /* __ASM_CPU_SH2_CACHE_H */ diff --git a/include/asm-sh/cpu-sh2/cacheflush.h b/include/asm-sh/cpu-sh2/cacheflush.h index f556fa80ea9..2979efb26de 100644 --- a/include/asm-sh/cpu-sh2/cacheflush.h +++ b/include/asm-sh/cpu-sh2/cacheflush.h @@ -15,6 +15,7 @@ * * - flush_cache_all() flushes entire cache * - flush_cache_mm(mm) flushes the specified mm context's cache lines + * - flush_cache_dup mm(mm) handles cache flushing when forking * - flush_cache_page(mm, vmaddr, pfn) flushes a single page * - flush_cache_range(vma, start, end) flushes a range of pages * @@ -27,6 +28,7 @@ */ #define flush_cache_all() do { } while (0) #define flush_cache_mm(mm) do { } while (0) +#define flush_cache_dup_mm(mm) do { } while (0) #define flush_cache_range(vma, start, end) do { } while (0) #define flush_cache_page(vma, vmaddr, pfn) do { } while (0) #define flush_dcache_page(page) do { } while (0) diff --git a/include/asm-sh/cpu-sh2/freq.h b/include/asm-sh/cpu-sh2/freq.h new file mode 100644 index 00000000000..31de475da70 --- /dev/null +++ b/include/asm-sh/cpu-sh2/freq.h @@ -0,0 +1,18 @@ +/* + * include/asm-sh/cpu-sh2/freq.h + * + * Copyright (C) 2006 Yoshinori Sato + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#ifndef __ASM_CPU_SH2_FREQ_H +#define __ASM_CPU_SH2_FREQ_H + +#if defined(CONFIG_CPU_SUBTYPE_SH7619) +#define FREQCR 0xf815ff80 +#endif + +#endif /* __ASM_CPU_SH2_FREQ_H */ + diff --git a/include/asm-sh/cpu-sh2/mmu_context.h b/include/asm-sh/cpu-sh2/mmu_context.h new file mode 100644 index 00000000000..beeb299e01e --- /dev/null +++ b/include/asm-sh/cpu-sh2/mmu_context.h @@ -0,0 +1,16 @@ +/* + * include/asm-sh/cpu-sh2/mmu_context.h + * + * Copyright (C) 2003 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#ifndef __ASM_CPU_SH2_MMU_CONTEXT_H +#define __ASM_CPU_SH2_MMU_CONTEXT_H + +/* No MMU */ + +#endif /* __ASM_CPU_SH2_MMU_CONTEXT_H */ + diff --git a/include/asm-sh/cpu-sh2/timer.h b/include/asm-sh/cpu-sh2/timer.h new file mode 100644 index 00000000000..a39c241e819 --- /dev/null +++ b/include/asm-sh/cpu-sh2/timer.h @@ -0,0 +1,6 @@ +#ifndef __ASM_CPU_SH2_TIMER_H +#define __ASM_CPU_SH2_TIMER_H + +/* Nothing needed yet */ + +#endif /* __ASM_CPU_SH2_TIMER_H */ diff --git a/include/asm-sh/cpu-sh2a/addrspace.h b/include/asm-sh/cpu-sh2a/addrspace.h new file mode 100644 index 00000000000..3d2e9aa2152 --- /dev/null +++ b/include/asm-sh/cpu-sh2a/addrspace.h @@ -0,0 +1 @@ +#include <asm/cpu-sh2/addrspace.h> diff --git a/include/asm-sh/cpu-sh2a/cache.h b/include/asm-sh/cpu-sh2a/cache.h new file mode 100644 index 00000000000..3e4b9e48098 --- /dev/null +++ b/include/asm-sh/cpu-sh2a/cache.h @@ -0,0 +1,39 @@ +/* + * include/asm-sh/cpu-sh2a/cache.h + * + * Copyright (C) 2004 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#ifndef __ASM_CPU_SH2A_CACHE_H +#define __ASM_CPU_SH2A_CACHE_H + +#define L1_CACHE_SHIFT 4 + +#define CCR1 0xfffc1000 +#define CCR2 0xfffc1004 + +/* CCR1 behaves more like the traditional CCR */ +#define CCR CCR1 + +/* + * Most of the SH-2A CCR1 definitions resemble the SH-4 ones. All others not + * listed here are reserved. + */ +#define CCR_CACHE_CB 0x0000 /* Hack */ +#define CCR_CACHE_OCE 0x0001 +#define CCR_CACHE_WT 0x0002 +#define CCR_CACHE_OCI 0x0008 /* OCF */ +#define CCR_CACHE_ICE 0x0100 +#define CCR_CACHE_ICI 0x0800 /* ICF */ + +#define CACHE_IC_ADDRESS_ARRAY 0xf0000000 +#define CACHE_OC_ADDRESS_ARRAY 0xf0800000 + +#define CCR_CACHE_ENABLE (CCR_CACHE_OCE | CCR_CACHE_ICE) +#define CCR_CACHE_INVALIDATE (CCR_CACHE_OCI | CCR_CACHE_ICI) + +#endif /* __ASM_CPU_SH2A_CACHE_H */ + diff --git a/include/asm-sh/cpu-sh2a/cacheflush.h b/include/asm-sh/cpu-sh2a/cacheflush.h new file mode 100644 index 00000000000..fa3186c7335 --- /dev/null +++ b/include/asm-sh/cpu-sh2a/cacheflush.h @@ -0,0 +1 @@ +#include <asm/cpu-sh2/cacheflush.h> diff --git a/include/asm-sh/cpu-sh2a/dma.h b/include/asm-sh/cpu-sh2a/dma.h new file mode 100644 index 00000000000..0d5ad85c1de --- /dev/null +++ b/include/asm-sh/cpu-sh2a/dma.h @@ -0,0 +1 @@ +#include <asm/cpu-sh2/dma.h> diff --git a/include/asm-sh/cpu-sh2a/freq.h b/include/asm-sh/cpu-sh2a/freq.h new file mode 100644 index 00000000000..e518fff6d10 --- /dev/null +++ b/include/asm-sh/cpu-sh2a/freq.h @@ -0,0 +1,18 @@ +/* + * include/asm-sh/cpu-sh2a/freq.h + * + * Copyright (C) 2006 Yoshinori Sato + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#ifndef __ASM_CPU_SH2A_FREQ_H +#define __ASM_CPU_SH2A_FREQ_H + +#if defined(CONFIG_CPU_SUBTYPE_SH7206) +#define FREQCR 0xfffe0010 +#endif + +#endif /* __ASM_CPU_SH2A_FREQ_H */ + diff --git a/include/asm-sh/cpu-sh2a/mmu_context.h b/include/asm-sh/cpu-sh2a/mmu_context.h new file mode 100644 index 00000000000..cd2387f7db9 --- /dev/null +++ b/include/asm-sh/cpu-sh2a/mmu_context.h @@ -0,0 +1 @@ +#include <asm/cpu-sh2/mmu_context.h> diff --git a/include/asm-sh/cpu-sh2a/timer.h b/include/asm-sh/cpu-sh2a/timer.h new file mode 100644 index 00000000000..fee504adf11 --- /dev/null +++ b/include/asm-sh/cpu-sh2a/timer.h @@ -0,0 +1 @@ +#include <asm/cpu-sh2/timer.h> diff --git a/include/asm-sh/cpu-sh2a/ubc.h b/include/asm-sh/cpu-sh2a/ubc.h new file mode 100644 index 00000000000..cf28062b96a --- /dev/null +++ b/include/asm-sh/cpu-sh2a/ubc.h @@ -0,0 +1 @@ +#include <asm/cpu-sh2/ubc.h> diff --git a/include/asm-sh/cpu-sh2a/watchdog.h b/include/asm-sh/cpu-sh2a/watchdog.h new file mode 100644 index 00000000000..c1b3e248847 --- /dev/null +++ b/include/asm-sh/cpu-sh2a/watchdog.h @@ -0,0 +1 @@ +#include <asm/cpu-sh2/watchdog.h> diff --git a/include/asm-sh/cpu-sh3/cacheflush.h b/include/asm-sh/cpu-sh3/cacheflush.h index 03fde97a7fd..f70d8ef76a1 100644 --- a/include/asm-sh/cpu-sh3/cacheflush.h +++ b/include/asm-sh/cpu-sh3/cacheflush.h @@ -15,6 +15,7 @@ * * - flush_cache_all() flushes entire cache * - flush_cache_mm(mm) flushes the specified mm context's cache lines + * - flush_cache_dup mm(mm) handles cache flushing when forking * - flush_cache_page(mm, vmaddr, pfn) flushes a single page * - flush_cache_range(vma, start, end) flushes a range of pages * @@ -39,6 +40,7 @@ void flush_cache_all(void); void flush_cache_mm(struct mm_struct *mm); +#define flush_cache_dup_mm(mm) flush_cache_mm(mm) void flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end); void flush_cache_page(struct vm_area_struct *vma, unsigned long addr, unsigned long pfn); @@ -48,6 +50,7 @@ void flush_icache_page(struct vm_area_struct *vma, struct page *page); #else #define flush_cache_all() do { } while (0) #define flush_cache_mm(mm) do { } while (0) +#define flush_cache_dup_mm(mm) do { } while (0) #define flush_cache_range(vma, start, end) do { } while (0) #define flush_cache_page(vma, vmaddr, pfn) do { } while (0) #define flush_dcache_page(page) do { } while (0) diff --git a/include/asm-sh/cpu-sh4/cache.h b/include/asm-sh/cpu-sh4/cache.h index 6e9c7e6ee8e..f92b20a0983 100644 --- a/include/asm-sh/cpu-sh4/cache.h +++ b/include/asm-sh/cpu-sh4/cache.h @@ -22,7 +22,7 @@ #define CCR_CACHE_ICE 0x0100 /* Instruction Cache Enable */ #define CCR_CACHE_ICI 0x0800 /* IC Invalidate */ #define CCR_CACHE_IIX 0x8000 /* IC Index Enable */ -#ifndef CONFIG_CPU_SUBTYPE_SH7780 +#ifndef CONFIG_CPU_SH4A #define CCR_CACHE_EMODE 0x80000000 /* EMODE Enable */ #endif diff --git a/include/asm-sh/cpu-sh4/cacheflush.h b/include/asm-sh/cpu-sh4/cacheflush.h index 515fd574267..b01a10f3122 100644 --- a/include/asm-sh/cpu-sh4/cacheflush.h +++ b/include/asm-sh/cpu-sh4/cacheflush.h @@ -18,6 +18,7 @@ */ void flush_cache_all(void); void flush_cache_mm(struct mm_struct *mm); +#define flush_cache_dup_mm(mm) flush_cache_mm(mm) void flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end); void flush_cache_page(struct vm_area_struct *vma, unsigned long addr, diff --git a/include/asm-sh/cpu-sh4/freq.h b/include/asm-sh/cpu-sh4/freq.h index ef2b9b1ae41..602d061ca2d 100644 --- a/include/asm-sh/cpu-sh4/freq.h +++ b/include/asm-sh/cpu-sh4/freq.h @@ -10,7 +10,7 @@ #ifndef __ASM_CPU_SH4_FREQ_H #define __ASM_CPU_SH4_FREQ_H -#if defined(CONFIG_CPU_SUBTYPE_SH73180) +#if defined(CONFIG_CPU_SUBTYPE_SH73180) || defined(CONFIG_CPU_SUBTYPE_SH7722) #define FRQCR 0xa4150000 #elif defined(CONFIG_CPU_SUBTYPE_SH7780) #define FRQCR 0xffc80000 diff --git a/include/asm-sh/device.h b/include/asm-sh/device.h new file mode 100644 index 00000000000..d8f9872b0e2 --- /dev/null +++ b/include/asm-sh/device.h @@ -0,0 +1,7 @@ +/* + * Arch specific extensions to struct device + * + * This file is released under the GPLv2 + */ +#include <asm-generic/device.h> + diff --git a/include/asm-sh/dma-mapping.h b/include/asm-sh/dma-mapping.h index 56cd4b97723..8d0867b98e0 100644 --- a/include/asm-sh/dma-mapping.h +++ b/include/asm-sh/dma-mapping.h @@ -53,7 +53,7 @@ static inline void dma_free_coherent(struct device *dev, size_t size, consistent_free(vaddr, size); } -static inline void dma_cache_sync(void *vaddr, size_t size, +static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size, enum dma_data_direction dir) { consistent_sync(vaddr, size, (int)dir); @@ -67,7 +67,7 @@ static inline dma_addr_t dma_map_single(struct device *dev, if (dev->bus == &pci_bus_type) return virt_to_bus(ptr); #endif - dma_cache_sync(ptr, size, dir); + dma_cache_sync(dev, ptr, size, dir); return virt_to_bus(ptr); } @@ -81,7 +81,7 @@ static inline int dma_map_sg(struct device *dev, struct scatterlist *sg, for (i = 0; i < nents; i++) { #if !defined(CONFIG_PCI) || defined(CONFIG_SH_PCIDMA_NONCOHERENT) - dma_cache_sync(page_address(sg[i].page) + sg[i].offset, + dma_cache_sync(dev, page_address(sg[i].page) + sg[i].offset, sg[i].length, dir); #endif sg[i].dma_address = page_to_phys(sg[i].page) + sg[i].offset; @@ -112,7 +112,7 @@ static inline void dma_sync_single(struct device *dev, dma_addr_t dma_handle, if (dev->bus == &pci_bus_type) return; #endif - dma_cache_sync(bus_to_virt(dma_handle), size, dir); + dma_cache_sync(dev, bus_to_virt(dma_handle), size, dir); } static inline void dma_sync_single_range(struct device *dev, @@ -124,7 +124,7 @@ static inline void dma_sync_single_range(struct device *dev, if (dev->bus == &pci_bus_type) return; #endif - dma_cache_sync(bus_to_virt(dma_handle) + offset, size, dir); + dma_cache_sync(dev, bus_to_virt(dma_handle) + offset, size, dir); } static inline void dma_sync_sg(struct device *dev, struct scatterlist *sg, @@ -134,7 +134,7 @@ static inline void dma_sync_sg(struct device *dev, struct scatterlist *sg, for (i = 0; i < nelems; i++) { #if !defined(CONFIG_PCI) || defined(CONFIG_SH_PCIDMA_NONCOHERENT) - dma_cache_sync(page_address(sg[i].page) + sg[i].offset, + dma_cache_sync(dev, page_address(sg[i].page) + sg[i].offset, sg[i].length, dir); #endif sg[i].dma_address = page_to_phys(sg[i].page) + sg[i].offset; diff --git a/include/asm-sh/dma.h b/include/asm-sh/dma.h index d9daa028689..faf3051cd42 100644 --- a/include/asm-sh/dma.h +++ b/include/asm-sh/dma.h @@ -14,9 +14,7 @@ #include <linux/spinlock.h> #include <linux/wait.h> #include <linux/sysdev.h> -#include <linux/device.h> #include <asm/cpu/dma.h> -#include <asm/semaphore.h> /* The maximum address that we can perform a DMA transfer to on this platform */ /* Don't define MAX_DMA_ADDRESS; it's useless on the SuperH and any @@ -46,16 +44,21 @@ * DMAC (dma_info) flags */ enum { - DMAC_CHANNELS_CONFIGURED = 0x00, - DMAC_CHANNELS_TEI_CAPABLE = 0x01, + DMAC_CHANNELS_CONFIGURED = 0x01, + DMAC_CHANNELS_TEI_CAPABLE = 0x02, /* Transfer end interrupt */ }; /* * DMA channel capabilities / flags */ enum { - DMA_TEI_CAPABLE = 0x01, - DMA_CONFIGURED = 0x02, + DMA_CONFIGURED = 0x01, + + /* + * Transfer end interrupt, inherited from DMAC. + * wait_queue used in dma_wait_for_completion. + */ + DMA_TEI_CAPABLE = 0x02, }; extern spinlock_t dma_spin_lock; @@ -68,28 +71,31 @@ struct dma_ops { int (*get_residue)(struct dma_channel *chan); int (*xfer)(struct dma_channel *chan); - void (*configure)(struct dma_channel *chan, unsigned long flags); + int (*configure)(struct dma_channel *chan, unsigned long flags); + int (*extend)(struct dma_channel *chan, unsigned long op, void *param); }; struct dma_channel { - char dev_id[16]; + char dev_id[16]; /* unique name per DMAC of channel */ - unsigned int chan; /* Physical channel number */ + unsigned int chan; /* DMAC channel number */ unsigned int vchan; /* Virtual channel number */ + unsigned int mode; unsigned int count; unsigned long sar; unsigned long dar; + const char **caps; + unsigned long flags; atomic_t busy; - struct semaphore sem; wait_queue_head_t wait_queue; struct sys_device dev; - char *name; + void *priv_data; }; struct dma_info { @@ -103,6 +109,12 @@ struct dma_info { struct dma_channel *channels; struct list_head list; + int first_channel_nr; +}; + +struct dma_chan_caps { + int ch_num; + const char **caplist; }; #define to_dma_channel(channel) container_of(channel, struct dma_channel, dev) @@ -121,6 +133,8 @@ extern int dma_xfer(unsigned int chan, unsigned long from, #define dma_read_page(chan, from, to) \ dma_read(chan, from, to, PAGE_SIZE) +extern int request_dma_bycap(const char **dmac, const char **caps, + const char *dev_id); extern int request_dma(unsigned int chan, const char *dev_id); extern void free_dma(unsigned int chan); extern int get_dma_residue(unsigned int chan); @@ -131,6 +145,10 @@ extern void dma_configure_channel(unsigned int chan, unsigned long flags); extern int register_dmac(struct dma_info *info); extern void unregister_dmac(struct dma_info *info); +extern struct dma_info *get_dma_info_by_name(const char *dmac_name); + +extern int dma_extend(unsigned int chan, unsigned long op, void *param); +extern int register_chan_caps(const char *dmac, struct dma_chan_caps *capslist); #ifdef CONFIG_SYSFS /* arch/sh/drivers/dma/dma-sysfs.c */ diff --git a/include/asm-sh/elf.h b/include/asm-sh/elf.h index fc050fd7645..43ca244564b 100644 --- a/include/asm-sh/elf.h +++ b/include/asm-sh/elf.h @@ -74,7 +74,7 @@ typedef struct user_fpu_struct elf_fpregset_t; #define ELF_ARCH EM_SH #define USE_ELF_CORE_DUMP -#define ELF_EXEC_PAGESIZE 4096 +#define ELF_EXEC_PAGESIZE PAGE_SIZE /* This is the location that an ET_DYN program is loaded if exec'ed. Typical use of this is to invoke "./ld.so someprog" to test out a new version of diff --git a/include/asm-sh/entry-macros.S b/include/asm-sh/entry-macros.S new file mode 100644 index 00000000000..500030eae7a --- /dev/null +++ b/include/asm-sh/entry-macros.S @@ -0,0 +1,33 @@ +! entry.S macro define + + .macro cli + stc sr, r0 + or #0xf0, r0 + ldc r0, sr + .endm + + .macro sti + mov #0xf0, r11 + extu.b r11, r11 + not r11, r11 + stc sr, r10 + and r11, r10 +#ifdef CONFIG_HAS_SR_RB + stc k_g_imask, r11 + or r11, r10 +#endif + ldc r10, sr + .endm + + .macro get_current_thread_info, ti, tmp +#ifdef CONFIG_HAS_SR_RB + stc r7_bank, \ti +#else + mov #((THREAD_SIZE - 1) >> 10) ^ 0xff, \tmp + shll8 \tmp + shll2 \tmp + mov r15, \ti + and \tmp, \ti +#endif + .endm + diff --git a/include/asm-sh/irq-sh73180.h b/include/asm-sh/irq-sh73180.h deleted file mode 100644 index b28af9a69d7..00000000000 --- a/include/asm-sh/irq-sh73180.h +++ /dev/null @@ -1,314 +0,0 @@ -#ifndef __ASM_SH_IRQ_SH73180_H -#define __ASM_SH_IRQ_SH73180_H - -/* - * linux/include/asm-sh/irq-sh73180.h - * - * Copyright (C) 2004 Takashi SHUDO <shudo@hitachi-ul.co.jp> - */ - -#undef INTC_IPRA -#undef INTC_IPRB -#undef INTC_IPRC -#undef INTC_IPRD - -#undef DMTE0_IRQ -#undef DMTE1_IRQ -#undef DMTE2_IRQ -#undef DMTE3_IRQ -#undef DMTE4_IRQ -#undef DMTE5_IRQ -#undef DMTE6_IRQ -#undef DMTE7_IRQ -#undef DMAE_IRQ -#undef DMA_IPR_ADDR -#undef DMA_IPR_POS -#undef DMA_PRIORITY - -#undef INTC_IMCR0 -#undef INTC_IMCR1 -#undef INTC_IMCR2 -#undef INTC_IMCR3 -#undef INTC_IMCR4 -#undef INTC_IMCR5 -#undef INTC_IMCR6 -#undef INTC_IMCR7 -#undef INTC_IMCR8 -#undef INTC_IMCR9 -#undef INTC_IMCR10 - - -#define INTC_IPRA 0xA4080000UL -#define INTC_IPRB 0xA4080004UL -#define INTC_IPRC 0xA4080008UL -#define INTC_IPRD 0xA408000CUL -#define INTC_IPRE 0xA4080010UL -#define INTC_IPRF 0xA4080014UL -#define INTC_IPRG 0xA4080018UL -#define INTC_IPRH 0xA408001CUL -#define INTC_IPRI 0xA4080020UL -#define INTC_IPRJ 0xA4080024UL -#define INTC_IPRK 0xA4080028UL - -#define INTC_IMR0 0xA4080080UL -#define INTC_IMR1 0xA4080084UL -#define INTC_IMR2 0xA4080088UL -#define INTC_IMR3 0xA408008CUL -#define INTC_IMR4 0xA4080090UL -#define INTC_IMR5 0xA4080094UL -#define INTC_IMR6 0xA4080098UL -#define INTC_IMR7 0xA408009CUL -#define INTC_IMR8 0xA40800A0UL -#define INTC_IMR9 0xA40800A4UL -#define INTC_IMR10 0xA40800A8UL -#define INTC_IMR11 0xA40800ACUL - -#define INTC_IMCR0 0xA40800C0UL -#define INTC_IMCR1 0xA40800C4UL -#define INTC_IMCR2 0xA40800C8UL -#define INTC_IMCR3 0xA40800CCUL -#define INTC_IMCR4 0xA40800D0UL -#define INTC_IMCR5 0xA40800D4UL -#define INTC_IMCR6 0xA40800D8UL -#define INTC_IMCR7 0xA40800DCUL -#define INTC_IMCR8 0xA40800E0UL -#define INTC_IMCR9 0xA40800E4UL -#define INTC_IMCR10 0xA40800E8UL -#define INTC_IMCR11 0xA40800ECUL - -#define INTC_ICR0 0xA4140000UL -#define INTC_ICR1 0xA414001CUL - -#define INTMSK0 0xa4140044 -#define INTMSKCLR0 0xa4140064 -#define INTC_INTPRI0 0xa4140010 - -/* - NOTE: - - *_IRQ = (INTEVT2 - 0x200)/0x20 -*/ - -/* TMU0 */ -#define TMU0_IRQ 16 -#define TMU0_IPR_ADDR INTC_IPRA -#define TMU0_IPR_POS 3 -#define TMU0_PRIORITY 2 - -#define TIMER_IRQ 16 -#define TIMER_IPR_ADDR INTC_IPRA -#define TIMER_IPR_POS 3 -#define TIMER_PRIORITY 2 - -/* TMU1 */ -#define TMU1_IRQ 17 -#define TMU1_IPR_ADDR INTC_IPRA -#define TMU1_IPR_POS 2 -#define TMU1_PRIORITY 2 - -/* TMU2 */ -#define TMU2_IRQ 18 -#define TMU2_IPR_ADDR INTC_IPRA -#define TMU2_IPR_POS 1 -#define TMU2_PRIORITY 2 - -/* LCDC */ -#define LCDC_IRQ 28 -#define LCDC_IPR_ADDR INTC_IPRB -#define LCDC_IPR_POS 2 -#define LCDC_PRIORITY 2 - -/* VIO (Video I/O) */ -#define CEU_IRQ 52 -#define BEU_IRQ 53 -#define VEU_IRQ 54 -#define VOU_IRQ 55 -#define VIO_IPR_ADDR INTC_IPRE -#define VIO_IPR_POS 2 -#define VIO_PRIORITY 2 - -/* MFI (Multi Functional Interface) */ -#define MFI_IRQ 56 -#define MFI_IPR_ADDR INTC_IPRE -#define MFI_IPR_POS 1 -#define MFI_PRIORITY 2 - -/* VPU (Video Processing Unit) */ -#define VPU_IRQ 60 -#define VPU_IPR_ADDR INTC_IPRE -#define VPU_IPR_POS 0 -#define VPU_PRIORITY 2 - -/* 3DG */ -#define TDG_IRQ 63 -#define TDG_IPR_ADDR INTC_IPRJ -#define TDG_IPR_POS 2 -#define TDG_PRIORITY 2 - -/* DMAC(1) */ -#define DMTE0_IRQ 48 -#define DMTE1_IRQ 49 -#define DMTE2_IRQ 50 -#define DMTE3_IRQ 51 -#define DMA1_IPR_ADDR INTC_IPRE -#define DMA1_IPR_POS 3 -#define DMA1_PRIORITY 7 - -/* DMAC(2) */ -#define DMTE4_IRQ 76 -#define DMTE5_IRQ 77 -#define DMA2_IPR_ADDR INTC_IPRF -#define DMA2_IPR_POS 2 -#define DMA2_PRIORITY 7 - -/* SCIF0 */ -#define SCIF_ERI_IRQ 80 -#define SCIF_RXI_IRQ 81 -#define SCIF_BRI_IRQ 82 -#define SCIF_TXI_IRQ 83 -#define SCIF_IPR_ADDR INTC_IPRG -#define SCIF_IPR_POS 3 -#define SCIF_PRIORITY 3 - -/* SIOF0 */ -#define SIOF0_IRQ 84 -#define SIOF0_IPR_ADDR INTC_IPRH -#define SIOF0_IPR_POS 3 -#define SIOF0_PRIORITY 3 - -/* FLCTL (Flash Memory Controller) */ -#define FLSTE_IRQ 92 -#define FLTEND_IRQ 93 -#define FLTRQ0_IRQ 94 -#define FLTRQ1_IRQ 95 -#define FLCTL_IPR_ADDR INTC_IPRH -#define FLCTL_IPR_POS 1 -#define FLCTL_PRIORITY 3 - -/* IIC(0) (IIC Bus Interface) */ -#define IIC0_ALI_IRQ 96 -#define IIC0_TACKI_IRQ 97 -#define IIC0_WAITI_IRQ 98 -#define IIC0_DTEI_IRQ 99 -#define IIC0_IPR_ADDR INTC_IPRH -#define IIC0_IPR_POS 0 -#define IIC0_PRIORITY 3 - -/* IIC(1) (IIC Bus Interface) */ -#define IIC1_ALI_IRQ 44 -#define IIC1_TACKI_IRQ 45 -#define IIC1_WAITI_IRQ 46 -#define IIC1_DTEI_IRQ 47 -#define IIC1_IPR_ADDR INTC_IPRG -#define IIC1_IPR_POS 0 -#define IIC1_PRIORITY 3 - -/* SIO0 */ -#define SIO0_IRQ 88 -#define SIO0_IPR_ADDR INTC_IPRI -#define SIO0_IPR_POS 3 -#define SIO0_PRIORITY 3 - -/* SDHI */ -#define SDHI_SDHII0_IRQ 100 -#define SDHI_SDHII1_IRQ 101 -#define SDHI_SDHII2_IRQ 102 -#define SDHI_SDHII3_IRQ 103 -#define SDHI_IPR_ADDR INTC_IPRK -#define SDHI_IPR_POS 0 -#define SDHI_PRIORITY 3 - -/* SIU (Sound Interface Unit) */ -#define SIU_IRQ 108 -#define SIU_IPR_ADDR INTC_IPRJ -#define SIU_IPR_POS 1 -#define SIU_PRIORITY 3 - -#define PORT_PACR 0xA4050100UL -#define PORT_PBCR 0xA4050102UL -#define PORT_PCCR 0xA4050104UL -#define PORT_PDCR 0xA4050106UL -#define PORT_PECR 0xA4050108UL -#define PORT_PFCR 0xA405010AUL -#define PORT_PGCR 0xA405010CUL -#define PORT_PHCR 0xA405010EUL -#define PORT_PJCR 0xA4050110UL -#define PORT_PKCR 0xA4050112UL -#define PORT_PLCR 0xA4050114UL -#define PORT_SCPCR 0xA4050116UL -#define PORT_PMCR 0xA4050118UL -#define PORT_PNCR 0xA405011AUL -#define PORT_PQCR 0xA405011CUL -#define PORT_PRCR 0xA405011EUL -#define PORT_PTCR 0xA405014CUL -#define PORT_PUCR 0xA405014EUL -#define PORT_PVCR 0xA4050150UL - -#define PORT_PSELA 0xA4050140UL -#define PORT_PSELB 0xA4050142UL -#define PORT_PSELC 0xA4050144UL -#define PORT_PSELE 0xA4050158UL - -#define PORT_HIZCRA 0xA4050146UL -#define PORT_HIZCRB 0xA4050148UL -#define PORT_DRVCR 0xA405014AUL - -#define PORT_PADR 0xA4050120UL -#define PORT_PBDR 0xA4050122UL -#define PORT_PCDR 0xA4050124UL -#define PORT_PDDR 0xA4050126UL -#define PORT_PEDR 0xA4050128UL -#define PORT_PFDR 0xA405012AUL -#define PORT_PGDR 0xA405012CUL -#define PORT_PHDR 0xA405012EUL -#define PORT_PJDR 0xA4050130UL -#define PORT_PKDR 0xA4050132UL -#define PORT_PLDR 0xA4050134UL -#define PORT_SCPDR 0xA4050136UL -#define PORT_PMDR 0xA4050138UL -#define PORT_PNDR 0xA405013AUL -#define PORT_PQDR 0xA405013CUL -#define PORT_PRDR 0xA405013EUL -#define PORT_PTDR 0xA405016CUL -#define PORT_PUDR 0xA405016EUL -#define PORT_PVDR 0xA4050170UL - -#define IRQ0_IRQ 32 -#define IRQ1_IRQ 33 -#define IRQ2_IRQ 34 -#define IRQ3_IRQ 35 -#define IRQ4_IRQ 36 -#define IRQ5_IRQ 37 -#define IRQ6_IRQ 38 -#define IRQ7_IRQ 39 - -#define INTPRI00 0xA4140010UL - -#define IRQ0_IPR_ADDR INTPRI00 -#define IRQ1_IPR_ADDR INTPRI00 -#define IRQ2_IPR_ADDR INTPRI00 -#define IRQ3_IPR_ADDR INTPRI00 -#define IRQ4_IPR_ADDR INTPRI00 -#define IRQ5_IPR_ADDR INTPRI00 -#define IRQ6_IPR_ADDR INTPRI00 -#define IRQ7_IPR_ADDR INTPRI00 - -#define IRQ0_IPR_POS 7 -#define IRQ1_IPR_POS 6 -#define IRQ2_IPR_POS 5 -#define IRQ3_IPR_POS 4 -#define IRQ4_IPR_POS 3 -#define IRQ5_IPR_POS 2 -#define IRQ6_IPR_POS 1 -#define IRQ7_IPR_POS 0 - -#define IRQ0_PRIORITY 1 -#define IRQ1_PRIORITY 1 -#define IRQ2_PRIORITY 1 -#define IRQ3_PRIORITY 1 -#define IRQ4_PRIORITY 1 -#define IRQ5_PRIORITY 1 -#define IRQ6_PRIORITY 1 -#define IRQ7_PRIORITY 1 - -#endif /* __ASM_SH_IRQ_SH73180_H */ diff --git a/include/asm-sh/irq-sh7343.h b/include/asm-sh/irq-sh7343.h deleted file mode 100644 index 5d15419b53b..00000000000 --- a/include/asm-sh/irq-sh7343.h +++ /dev/null @@ -1,317 +0,0 @@ -#ifndef __ASM_SH_IRQ_SH7343_H -#define __ASM_SH_IRQ_SH7343_H - -/* - * linux/include/asm-sh/irq-sh7343.h - * - * Copyright (C) 2006 Kenati Technologies Inc. - * Andre Mccurdy <andre@kenati.com> - * Ranjit Deshpande <ranjit@kenati.com> - */ - -#undef INTC_IPRA -#undef INTC_IPRB -#undef INTC_IPRC -#undef INTC_IPRD - -#undef DMTE0_IRQ -#undef DMTE1_IRQ -#undef DMTE2_IRQ -#undef DMTE3_IRQ -#undef DMTE4_IRQ -#undef DMTE5_IRQ -#undef DMTE6_IRQ -#undef DMTE7_IRQ -#undef DMAE_IRQ -#undef DMA_IPR_ADDR -#undef DMA_IPR_POS -#undef DMA_PRIORITY - -#undef INTC_IMCR0 -#undef INTC_IMCR1 -#undef INTC_IMCR2 -#undef INTC_IMCR3 -#undef INTC_IMCR4 -#undef INTC_IMCR5 -#undef INTC_IMCR6 -#undef INTC_IMCR7 -#undef INTC_IMCR8 -#undef INTC_IMCR9 -#undef INTC_IMCR10 - - -#define INTC_IPRA 0xA4080000UL -#define INTC_IPRB 0xA4080004UL -#define INTC_IPRC 0xA4080008UL -#define INTC_IPRD 0xA408000CUL -#define INTC_IPRE 0xA4080010UL -#define INTC_IPRF 0xA4080014UL -#define INTC_IPRG 0xA4080018UL -#define INTC_IPRH 0xA408001CUL -#define INTC_IPRI 0xA4080020UL -#define INTC_IPRJ 0xA4080024UL -#define INTC_IPRK 0xA4080028UL -#define INTC_IPRL 0xA408002CUL - -#define INTC_IMR0 0xA4080080UL -#define INTC_IMR1 0xA4080084UL -#define INTC_IMR2 0xA4080088UL -#define INTC_IMR3 0xA408008CUL -#define INTC_IMR4 0xA4080090UL -#define INTC_IMR5 0xA4080094UL -#define INTC_IMR6 0xA4080098UL -#define INTC_IMR7 0xA408009CUL -#define INTC_IMR8 0xA40800A0UL -#define INTC_IMR9 0xA40800A4UL -#define INTC_IMR10 0xA40800A8UL -#define INTC_IMR11 0xA40800ACUL - -#define INTC_IMCR0 0xA40800C0UL -#define INTC_IMCR1 0xA40800C4UL -#define INTC_IMCR2 0xA40800C8UL -#define INTC_IMCR3 0xA40800CCUL -#define INTC_IMCR4 0xA40800D0UL -#define INTC_IMCR5 0xA40800D4UL -#define INTC_IMCR6 0xA40800D8UL -#define INTC_IMCR7 0xA40800DCUL -#define INTC_IMCR8 0xA40800E0UL -#define INTC_IMCR9 0xA40800E4UL -#define INTC_IMCR10 0xA40800E8UL -#define INTC_IMCR11 0xA40800ECUL - -#define INTC_ICR0 0xA4140000UL -#define INTC_ICR1 0xA414001CUL - -#define INTMSK0 0xa4140044 -#define INTMSKCLR0 0xa4140064 -#define INTC_INTPRI0 0xa4140010 - -/* - NOTE: - - *_IRQ = (INTEVT2 - 0x200)/0x20 -*/ - -/* TMU0 */ -#define TMU0_IRQ 16 -#define TMU0_IPR_ADDR INTC_IPRA -#define TMU0_IPR_POS 3 -#define TMU0_PRIORITY 2 - -#define TIMER_IRQ 16 -#define TIMER_IPR_ADDR INTC_IPRA -#define TIMER_IPR_POS 3 -#define TIMER_PRIORITY 2 - -/* TMU1 */ -#define TMU1_IRQ 17 -#define TMU1_IPR_ADDR INTC_IPRA -#define TMU1_IPR_POS 2 -#define TMU1_PRIORITY 2 - -/* TMU2 */ -#define TMU2_IRQ 18 -#define TMU2_IPR_ADDR INTC_IPRA -#define TMU2_IPR_POS 1 -#define TMU2_PRIORITY 2 - -/* LCDC */ -#define LCDC_IRQ 28 -#define LCDC_IPR_ADDR INTC_IPRB -#define LCDC_IPR_POS 2 -#define LCDC_PRIORITY 2 - -/* VIO (Video I/O) */ -#define CEU_IRQ 52 -#define BEU_IRQ 53 -#define VEU_IRQ 54 -#define VOU_IRQ 55 -#define VIO_IPR_ADDR INTC_IPRE -#define VIO_IPR_POS 2 -#define VIO_PRIORITY 2 - -/* MFI (Multi Functional Interface) */ -#define MFI_IRQ 56 -#define MFI_IPR_ADDR INTC_IPRE -#define MFI_IPR_POS 1 -#define MFI_PRIORITY 2 - -/* VPU (Video Processing Unit) */ -#define VPU_IRQ 60 -#define VPU_IPR_ADDR INTC_IPRE -#define VPU_IPR_POS 0 -#define VPU_PRIORITY 2 - -/* 3DG */ -#define TDG_IRQ 63 -#define TDG_IPR_ADDR INTC_IPRJ -#define TDG_IPR_POS 2 -#define TDG_PRIORITY 2 - -/* DMAC(1) */ -#define DMTE0_IRQ 48 -#define DMTE1_IRQ 49 -#define DMTE2_IRQ 50 -#define DMTE3_IRQ 51 -#define DMA1_IPR_ADDR INTC_IPRE -#define DMA1_IPR_POS 3 -#define DMA1_PRIORITY 7 - -/* DMAC(2) */ -#define DMTE4_IRQ 76 -#define DMTE5_IRQ 77 -#define DMA2_IPR_ADDR INTC_IPRF -#define DMA2_IPR_POS 2 -#define DMA2_PRIORITY 7 - -/* SCIF0 */ -#define SCIF_ERI_IRQ 80 -#define SCIF_RXI_IRQ 81 -#define SCIF_BRI_IRQ 82 -#define SCIF_TXI_IRQ 83 -#define SCIF_IPR_ADDR INTC_IPRG -#define SCIF_IPR_POS 3 -#define SCIF_PRIORITY 3 - -/* SIOF0 */ -#define SIOF0_IRQ 84 -#define SIOF0_IPR_ADDR INTC_IPRH -#define SIOF0_IPR_POS 3 -#define SIOF0_PRIORITY 3 - -/* FLCTL (Flash Memory Controller) */ -#define FLSTE_IRQ 92 -#define FLTEND_IRQ 93 -#define FLTRQ0_IRQ 94 -#define FLTRQ1_IRQ 95 -#define FLCTL_IPR_ADDR INTC_IPRH -#define FLCTL_IPR_POS 1 -#define FLCTL_PRIORITY 3 - -/* IIC(0) (IIC Bus Interface) */ -#define IIC0_ALI_IRQ 96 -#define IIC0_TACKI_IRQ 97 -#define IIC0_WAITI_IRQ 98 -#define IIC0_DTEI_IRQ 99 -#define IIC0_IPR_ADDR INTC_IPRH -#define IIC0_IPR_POS 0 -#define IIC0_PRIORITY 3 - -/* IIC(1) (IIC Bus Interface) */ -#define IIC1_ALI_IRQ 44 -#define IIC1_TACKI_IRQ 45 -#define IIC1_WAITI_IRQ 46 -#define IIC1_DTEI_IRQ 47 -#define IIC1_IPR_ADDR INTC_IPRI -#define IIC1_IPR_POS 0 -#define IIC1_PRIORITY 3 - -/* SIO0 */ -#define SIO0_IRQ 88 -#define SIO0_IPR_ADDR INTC_IPRI -#define SIO0_IPR_POS 3 -#define SIO0_PRIORITY 3 - -/* SDHI */ -#define SDHI_SDHII0_IRQ 100 -#define SDHI_SDHII1_IRQ 101 -#define SDHI_SDHII2_IRQ 102 -#define SDHI_SDHII3_IRQ 103 -#define SDHI_IPR_ADDR INTC_IPRK -#define SDHI_IPR_POS 0 -#define SDHI_PRIORITY 3 - -/* SIU (Sound Interface Unit) */ -#define SIU_IRQ 108 -#define SIU_IPR_ADDR INTC_IPRJ -#define SIU_IPR_POS 1 -#define SIU_PRIORITY 3 - -#define PORT_PACR 0xA4050100UL -#define PORT_PBCR 0xA4050102UL -#define PORT_PCCR 0xA4050104UL -#define PORT_PDCR 0xA4050106UL -#define PORT_PECR 0xA4050108UL -#define PORT_PFCR 0xA405010AUL -#define PORT_PGCR 0xA405010CUL -#define PORT_PHCR 0xA405010EUL -#define PORT_PJCR 0xA4050110UL -#define PORT_PKCR 0xA4050112UL -#define PORT_PLCR 0xA4050114UL -#define PORT_SCPCR 0xA4050116UL -#define PORT_PMCR 0xA4050118UL -#define PORT_PNCR 0xA405011AUL -#define PORT_PQCR 0xA405011CUL -#define PORT_PRCR 0xA405011EUL -#define PORT_PTCR 0xA405014CUL -#define PORT_PUCR 0xA405014EUL -#define PORT_PVCR 0xA4050150UL - -#define PORT_PSELA 0xA4050140UL -#define PORT_PSELB 0xA4050142UL -#define PORT_PSELC 0xA4050144UL -#define PORT_PSELE 0xA4050158UL - -#define PORT_HIZCRA 0xA4050146UL -#define PORT_HIZCRB 0xA4050148UL -#define PORT_DRVCR 0xA405014AUL - -#define PORT_PADR 0xA4050120UL -#define PORT_PBDR 0xA4050122UL -#define PORT_PCDR 0xA4050124UL -#define PORT_PDDR 0xA4050126UL -#define PORT_PEDR 0xA4050128UL -#define PORT_PFDR 0xA405012AUL -#define PORT_PGDR 0xA405012CUL -#define PORT_PHDR 0xA405012EUL -#define PORT_PJDR 0xA4050130UL -#define PORT_PKDR 0xA4050132UL -#define PORT_PLDR 0xA4050134UL -#define PORT_SCPDR 0xA4050136UL -#define PORT_PMDR 0xA4050138UL -#define PORT_PNDR 0xA405013AUL -#define PORT_PQDR 0xA405013CUL -#define PORT_PRDR 0xA405013EUL -#define PORT_PTDR 0xA405016CUL -#define PORT_PUDR 0xA405016EUL -#define PORT_PVDR 0xA4050170UL - -#define IRQ0_IRQ 32 -#define IRQ1_IRQ 33 -#define IRQ2_IRQ 34 -#define IRQ3_IRQ 35 -#define IRQ4_IRQ 36 -#define IRQ5_IRQ 37 -#define IRQ6_IRQ 38 -#define IRQ7_IRQ 39 - -#define INTPRI00 0xA4140010UL - -#define IRQ0_IPR_ADDR INTPRI00 -#define IRQ1_IPR_ADDR INTPRI00 -#define IRQ2_IPR_ADDR INTPRI00 -#define IRQ3_IPR_ADDR INTPRI00 -#define IRQ4_IPR_ADDR INTPRI00 -#define IRQ5_IPR_ADDR INTPRI00 -#define IRQ6_IPR_ADDR INTPRI00 -#define IRQ7_IPR_ADDR INTPRI00 - -#define IRQ0_IPR_POS 7 -#define IRQ1_IPR_POS 6 -#define IRQ2_IPR_POS 5 -#define IRQ3_IPR_POS 4 -#define IRQ4_IPR_POS 3 -#define IRQ5_IPR_POS 2 -#define IRQ6_IPR_POS 1 -#define IRQ7_IPR_POS 0 - -#define IRQ0_PRIORITY 1 -#define IRQ1_PRIORITY 1 -#define IRQ2_PRIORITY 1 -#define IRQ3_PRIORITY 1 -#define IRQ4_PRIORITY 1 -#define IRQ5_PRIORITY 1 -#define IRQ6_PRIORITY 1 -#define IRQ7_PRIORITY 1 - -#endif /* __ASM_SH_IRQ_SH7343_H */ diff --git a/include/asm-sh/irq-sh7780.h b/include/asm-sh/irq-sh7780.h deleted file mode 100644 index 19912ae6a7f..00000000000 --- a/include/asm-sh/irq-sh7780.h +++ /dev/null @@ -1,311 +0,0 @@ -#ifndef __ASM_SH_IRQ_SH7780_H -#define __ASM_SH_IRQ_SH7780_H - -/* - * linux/include/asm-sh/irq-sh7780.h - * - * Copyright (C) 2004 Takashi SHUDO <shudo@hitachi-ul.co.jp> - */ -#define INTC_BASE 0xffd00000 -#define INTC_ICR0 (INTC_BASE+0x0) -#define INTC_ICR1 (INTC_BASE+0x1c) -#define INTC_INTPRI (INTC_BASE+0x10) -#define INTC_INTREQ (INTC_BASE+0x24) -#define INTC_INTMSK0 (INTC_BASE+0x44) -#define INTC_INTMSK1 (INTC_BASE+0x48) -#define INTC_INTMSK2 (INTC_BASE+0x40080) -#define INTC_INTMSKCLR0 (INTC_BASE+0x64) -#define INTC_INTMSKCLR1 (INTC_BASE+0x68) -#define INTC_INTMSKCLR2 (INTC_BASE+0x40084) -#define INTC_NMIFCR (INTC_BASE+0xc0) -#define INTC_USERIMASK (INTC_BASE+0x30000) - -#define INTC_INT2PRI0 (INTC_BASE+0x40000) -#define INTC_INT2PRI1 (INTC_BASE+0x40004) -#define INTC_INT2PRI2 (INTC_BASE+0x40008) -#define INTC_INT2PRI3 (INTC_BASE+0x4000c) -#define INTC_INT2PRI4 (INTC_BASE+0x40010) -#define INTC_INT2PRI5 (INTC_BASE+0x40014) -#define INTC_INT2PRI6 (INTC_BASE+0x40018) -#define INTC_INT2PRI7 (INTC_BASE+0x4001c) -#define INTC_INT2A0 (INTC_BASE+0x40030) -#define INTC_INT2A1 (INTC_BASE+0x40034) -#define INTC_INT2MSKR (INTC_BASE+0x40038) -#define INTC_INT2MSKCR (INTC_BASE+0x4003c) -#define INTC_INT2B0 (INTC_BASE+0x40040) -#define INTC_INT2B1 (INTC_BASE+0x40044) -#define INTC_INT2B2 (INTC_BASE+0x40048) -#define INTC_INT2B3 (INTC_BASE+0x4004c) -#define INTC_INT2B4 (INTC_BASE+0x40050) -#define INTC_INT2B5 (INTC_BASE+0x40054) -#define INTC_INT2B6 (INTC_BASE+0x40058) -#define INTC_INT2B7 (INTC_BASE+0x4005c) -#define INTC_INT2GPIC (INTC_BASE+0x40090) -/* - NOTE: - *_IRQ = (INTEVT2 - 0x200)/0x20 -*/ -/* IRQ 0-7 line external int*/ -#define IRQ0_IRQ 2 -#define IRQ0_IPR_ADDR INTC_INTPRI -#define IRQ0_IPR_POS 7 -#define IRQ0_PRIORITY 2 - -#define IRQ1_IRQ 4 -#define IRQ1_IPR_ADDR INTC_INTPRI -#define IRQ1_IPR_POS 6 -#define IRQ1_PRIORITY 2 - -#define IRQ2_IRQ 6 -#define IRQ2_IPR_ADDR INTC_INTPRI -#define IRQ2_IPR_POS 5 -#define IRQ2_PRIORITY 2 - -#define IRQ3_IRQ 8 -#define IRQ3_IPR_ADDR INTC_INTPRI -#define IRQ3_IPR_POS 4 -#define IRQ3_PRIORITY 2 - -#define IRQ4_IRQ 10 -#define IRQ4_IPR_ADDR INTC_INTPRI -#define IRQ4_IPR_POS 3 -#define IRQ4_PRIORITY 2 - -#define IRQ5_IRQ 12 -#define IRQ5_IPR_ADDR INTC_INTPRI -#define IRQ5_IPR_POS 2 -#define IRQ5_PRIORITY 2 - -#define IRQ6_IRQ 14 -#define IRQ6_IPR_ADDR INTC_INTPRI -#define IRQ6_IPR_POS 1 -#define IRQ6_PRIORITY 2 - -#define IRQ7_IRQ 0 -#define IRQ7_IPR_ADDR INTC_INTPRI -#define IRQ7_IPR_POS 0 -#define IRQ7_PRIORITY 2 - -/* TMU */ -/* ch0 */ -#define TMU_IRQ 28 -#define TMU_IPR_ADDR INTC_INT2PRI0 -#define TMU_IPR_POS 3 -#define TMU_PRIORITY 2 - -#define TIMER_IRQ 28 -#define TIMER_IPR_ADDR INTC_INT2PRI0 -#define TIMER_IPR_POS 3 -#define TIMER_PRIORITY 2 - -/* ch 1*/ -#define TMU_CH1_IRQ 29 -#define TMU_CH1_IPR_ADDR INTC_INT2PRI0 -#define TMU_CH1_IPR_POS 2 -#define TMU_CH1_PRIORITY 2 - -#define TIMER1_IRQ 29 -#define TIMER1_IPR_ADDR INTC_INT2PRI0 -#define TIMER1_IPR_POS 2 -#define TIMER1_PRIORITY 2 - -/* ch 2*/ -#define TMU_CH2_IRQ 30 -#define TMU_CH2_IPR_ADDR INTC_INT2PRI0 -#define TMU_CH2_IPR_POS 1 -#define TMU_CH2_PRIORITY 2 -/* ch 2 Input capture */ -#define TMU_CH2IC_IRQ 31 -#define TMU_CH2IC_IPR_ADDR INTC_INT2PRI0 -#define TMU_CH2IC_IPR_POS 0 -#define TMU_CH2IC_PRIORITY 2 -/* ch 3 */ -#define TMU_CH3_IRQ 96 -#define TMU_CH3_IPR_ADDR INTC_INT2PRI1 -#define TMU_CH3_IPR_POS 3 -#define TMU_CH3_PRIORITY 2 -/* ch 4 */ -#define TMU_CH4_IRQ 97 -#define TMU_CH4_IPR_ADDR INTC_INT2PRI1 -#define TMU_CH4_IPR_POS 2 -#define TMU_CH4_PRIORITY 2 -/* ch 5*/ -#define TMU_CH5_IRQ 98 -#define TMU_CH5_IPR_ADDR INTC_INT2PRI1 -#define TMU_CH5_IPR_POS 1 -#define TMU_CH5_PRIORITY 2 - -/* SCIF0 */ -#define SCIF0_ERI_IRQ 40 -#define SCIF0_RXI_IRQ 41 -#define SCIF0_BRI_IRQ 42 -#define SCIF0_TXI_IRQ 43 -#define SCIF0_IPR_ADDR INTC_INT2PRI2 -#define SCIF0_IPR_POS 3 -#define SCIF0_PRIORITY 3 - -/* SCIF1 */ -#define SCIF1_ERI_IRQ 76 -#define SCIF1_RXI_IRQ 77 -#define SCIF1_BRI_IRQ 78 -#define SCIF1_TXI_IRQ 79 -#define SCIF1_IPR_ADDR INTC_INT2PRI2 -#define SCIF1_IPR_POS 2 -#define SCIF1_PRIORITY 3 - -#define WDT_IRQ 27 -#define WDT_IPR_ADDR INTC_INT2PRI2 -#define WDT_IPR_POS 1 -#define WDT_PRIORITY 2 - -/* DMAC(0) */ -#define DMINT0_IRQ 34 -#define DMINT1_IRQ 35 -#define DMINT2_IRQ 36 -#define DMINT3_IRQ 37 -#define DMINT4_IRQ 44 -#define DMINT5_IRQ 45 -#define DMINT6_IRQ 46 -#define DMINT7_IRQ 47 -#define DMAE_IRQ 38 -#define DMA0_IPR_ADDR INTC_INT2PRI3 -#define DMA0_IPR_POS 2 -#define DMA0_PRIORITY 7 - -/* DMAC(1) */ -#define DMINT8_IRQ 92 -#define DMINT9_IRQ 93 -#define DMINT10_IRQ 94 -#define DMINT11_IRQ 95 -#define DMA1_IPR_ADDR INTC_INT2PRI3 -#define DMA1_IPR_POS 1 -#define DMA1_PRIORITY 7 - -#define DMTE0_IRQ DMINT0_IRQ -#define DMTE4_IRQ DMINT4_IRQ -#define DMA_IPR_ADDR DMA0_IPR_ADDR -#define DMA_IPR_POS DMA0_IPR_POS -#define DMA_PRIORITY DMA0_PRIORITY - -/* CMT */ -#define CMT_IRQ 56 -#define CMT_IPR_ADDR INTC_INT2PRI4 -#define CMT_IPR_POS 3 -#define CMT_PRIORITY 0 - -/* HAC */ -#define HAC_IRQ 60 -#define HAC_IPR_ADDR INTC_INT2PRI4 -#define HAC_IPR_POS 2 -#define CMT_PRIORITY 0 - -/* PCIC(0) */ -#define PCIC0_IRQ 64 -#define PCIC0_IPR_ADDR INTC_INT2PRI4 -#define PCIC0_IPR_POS 1 -#define PCIC0_PRIORITY 2 - -/* PCIC(1) */ -#define PCIC1_IRQ 65 -#define PCIC1_IPR_ADDR INTC_INT2PRI4 -#define PCIC1_IPR_POS 0 -#define PCIC1_PRIORITY 2 - -/* PCIC(2) */ -#define PCIC2_IRQ 66 -#define PCIC2_IPR_ADDR INTC_INT2PRI5 -#define PCIC2_IPR_POS 3 -#define PCIC2_PRIORITY 2 - -/* PCIC(3) */ -#define PCIC3_IRQ 67 -#define PCIC3_IPR_ADDR INTC_INT2PRI5 -#define PCIC3_IPR_POS 2 -#define PCIC3_PRIORITY 2 - -/* PCIC(4) */ -#define PCIC4_IRQ 68 -#define PCIC4_IPR_ADDR INTC_INT2PRI5 -#define PCIC4_IPR_POS 1 -#define PCIC4_PRIORITY 2 - -/* PCIC(5) */ -#define PCICERR_IRQ 69 -#define PCICPWD3_IRQ 70 -#define PCICPWD2_IRQ 71 -#define PCICPWD1_IRQ 72 -#define PCICPWD0_IRQ 73 -#define PCIC5_IPR_ADDR INTC_INT2PRI5 -#define PCIC5_IPR_POS 0 -#define PCIC5_PRIORITY 2 - -/* SIOF */ -#define SIOF_IRQ 80 -#define SIOF_IPR_ADDR INTC_INT2PRI6 -#define SIOF_IPR_POS 3 -#define SIOF_PRIORITY 3 - -/* HSPI */ -#define HSPI_IRQ 84 -#define HSPI_IPR_ADDR INTC_INT2PRI6 -#define HSPI_IPR_POS 2 -#define HSPI_PRIORITY 3 - -/* MMCIF */ -#define MMCIF_FSTAT_IRQ 88 -#define MMCIF_TRAN_IRQ 89 -#define MMCIF_ERR_IRQ 90 -#define MMCIF_FRDY_IRQ 91 -#define MMCIF_IPR_ADDR INTC_INT2PRI6 -#define MMCIF_IPR_POS 1 -#define HSPI_PRIORITY 3 - -/* SSI */ -#define SSI_IRQ 100 -#define SSI_IPR_ADDR INTC_INT2PRI6 -#define SSI_IPR_POS 0 -#define SSI_PRIORITY 3 - -/* FLCTL */ -#define FLCTL_FLSTE_IRQ 104 -#define FLCTL_FLTEND_IRQ 105 -#define FLCTL_FLTRQ0_IRQ 106 -#define FLCTL_FLTRQ1_IRQ 107 -#define FLCTL_IPR_ADDR INTC_INT2PRI7 -#define FLCTL_IPR_POS 3 -#define FLCTL_PRIORITY 3 - -/* GPIO */ -#define GPIO0_IRQ 108 -#define GPIO1_IRQ 109 -#define GPIO2_IRQ 110 -#define GPIO3_IRQ 111 -#define GPIO_IPR_ADDR INTC_INT2PRI7 -#define GPIO_IPR_POS 2 -#define GPIO_PRIORITY 3 - -#define INTC_TMU0_MSK 0 -#define INTC_TMU3_MSK 1 -#define INTC_RTC_MSK 2 -#define INTC_SCIF0_MSK 3 -#define INTC_SCIF1_MSK 4 -#define INTC_WDT_MSK 5 -#define INTC_HUID_MSK 7 -#define INTC_DMAC0_MSK 8 -#define INTC_DMAC1_MSK 9 -#define INTC_CMT_MSK 12 -#define INTC_HAC_MSK 13 -#define INTC_PCIC0_MSK 14 -#define INTC_PCIC1_MSK 15 -#define INTC_PCIC2_MSK 16 -#define INTC_PCIC3_MSK 17 -#define INTC_PCIC4_MSK 18 -#define INTC_PCIC5_MSK 19 -#define INTC_SIOF_MSK 20 -#define INTC_HSPI_MSK 21 -#define INTC_MMCIF_MSK 22 -#define INTC_SSI_MSK 23 -#define INTC_FLCTL_MSK 24 -#define INTC_GPIO_MSK 25 - -#endif /* __ASM_SH_IRQ_SH7780_H */ diff --git a/include/asm-sh/irq.h b/include/asm-sh/irq.h index 6cd3e9e2a76..bff965ef4b9 100644 --- a/include/asm-sh/irq.h +++ b/include/asm-sh/irq.h @@ -1,233 +1,9 @@ #ifndef __ASM_SH_IRQ_H #define __ASM_SH_IRQ_H -/* - * - * linux/include/asm-sh/irq.h - * - * Copyright (C) 1999 Niibe Yutaka & Takeshi Yaegashi - * Copyright (C) 2000 Kazumoto Kojima - * Copyright (C) 2003 Paul Mundt - * - */ - #include <asm/machvec.h> #include <asm/ptrace.h> /* for pt_regs */ -#ifndef CONFIG_CPU_SUBTYPE_SH7780 - -#define INTC_DMAC0_MSK 0 - -#if defined(CONFIG_CPU_SH3) -#define INTC_IPRA 0xfffffee2UL -#define INTC_IPRB 0xfffffee4UL -#elif defined(CONFIG_CPU_SH4) -#define INTC_IPRA 0xffd00004UL -#define INTC_IPRB 0xffd00008UL -#define INTC_IPRC 0xffd0000cUL -#define INTC_IPRD 0xffd00010UL -#endif - -#define TIMER_IRQ 16 -#define TIMER_IPR_ADDR INTC_IPRA -#define TIMER_IPR_POS 3 -#define TIMER_PRIORITY 2 - -#define TIMER1_IRQ 17 -#define TIMER1_IPR_ADDR INTC_IPRA -#define TIMER1_IPR_POS 2 -#define TIMER1_PRIORITY 4 - -#define RTC_IRQ 22 -#define RTC_IPR_ADDR INTC_IPRA -#define RTC_IPR_POS 0 -#define RTC_PRIORITY TIMER_PRIORITY - -#if defined(CONFIG_CPU_SH3) -#define DMTE0_IRQ 48 -#define DMTE1_IRQ 49 -#define DMTE2_IRQ 50 -#define DMTE3_IRQ 51 -#define DMA_IPR_ADDR INTC_IPRE -#define DMA_IPR_POS 3 -#define DMA_PRIORITY 7 -#if defined(CONFIG_CPU_SUBTYPE_SH7300) -/* TMU2 */ -#define TIMER2_IRQ 18 -#define TIMER2_IPR_ADDR INTC_IPRA -#define TIMER2_IPR_POS 1 -#define TIMER2_PRIORITY 2 - -/* WDT */ -#define WDT_IRQ 27 -#define WDT_IPR_ADDR INTC_IPRB -#define WDT_IPR_POS 3 -#define WDT_PRIORITY 2 - -/* SIM (SIM Card Module) */ -#define SIM_ERI_IRQ 23 -#define SIM_RXI_IRQ 24 -#define SIM_TXI_IRQ 25 -#define SIM_TEND_IRQ 26 -#define SIM_IPR_ADDR INTC_IPRB -#define SIM_IPR_POS 1 -#define SIM_PRIORITY 2 - -/* VIO (Video I/O) */ -#define VIO_IRQ 52 -#define VIO_IPR_ADDR INTC_IPRE -#define VIO_IPR_POS 2 -#define VIO_PRIORITY 2 - -/* MFI (Multi Functional Interface) */ -#define MFI_IRQ 56 -#define MFI_IPR_ADDR INTC_IPRE -#define MFI_IPR_POS 1 -#define MFI_PRIORITY 2 - -/* VPU (Video Processing Unit) */ -#define VPU_IRQ 60 -#define VPU_IPR_ADDR INTC_IPRE -#define VPU_IPR_POS 0 -#define VPU_PRIORITY 2 - -/* KEY (Key Scan Interface) */ -#define KEY_IRQ 79 -#define KEY_IPR_ADDR INTC_IPRF -#define KEY_IPR_POS 3 -#define KEY_PRIORITY 2 - -/* CMT (Compare Match Timer) */ -#define CMT_IRQ 104 -#define CMT_IPR_ADDR INTC_IPRF -#define CMT_IPR_POS 0 -#define CMT_PRIORITY 2 - -/* DMAC(1) */ -#define DMTE0_IRQ 48 -#define DMTE1_IRQ 49 -#define DMTE2_IRQ 50 -#define DMTE3_IRQ 51 -#define DMA1_IPR_ADDR INTC_IPRE -#define DMA1_IPR_POS 3 -#define DMA1_PRIORITY 7 - -/* DMAC(2) */ -#define DMTE4_IRQ 76 -#define DMTE5_IRQ 77 -#define DMA2_IPR_ADDR INTC_IPRF -#define DMA2_IPR_POS 2 -#define DMA2_PRIORITY 7 - -/* SIOF0 */ -#define SIOF0_IRQ 84 -#define SIOF0_IPR_ADDR INTC_IPRH -#define SIOF0_IPR_POS 3 -#define SIOF0_PRIORITY 3 - -/* FLCTL (Flash Memory Controller) */ -#define FLSTE_IRQ 92 -#define FLTEND_IRQ 93 -#define FLTRQ0_IRQ 94 -#define FLTRQ1_IRQ 95 -#define FLCTL_IPR_ADDR INTC_IPRH -#define FLCTL_IPR_POS 1 -#define FLCTL_PRIORITY 3 - -/* IIC (IIC Bus Interface) */ -#define IIC_ALI_IRQ 96 -#define IIC_TACKI_IRQ 97 -#define IIC_WAITI_IRQ 98 -#define IIC_DTEI_IRQ 99 -#define IIC_IPR_ADDR INTC_IPRH -#define IIC_IPR_POS 0 -#define IIC_PRIORITY 3 - -/* SIO0 */ -#define SIO0_IRQ 88 -#define SIO0_IPR_ADDR INTC_IPRI -#define SIO0_IPR_POS 3 -#define SIO0_PRIORITY 3 - -/* SIU (Sound Interface Unit) */ -#define SIU_IRQ 108 -#define SIU_IPR_ADDR INTC_IPRJ -#define SIU_IPR_POS 1 -#define SIU_PRIORITY 3 - -#endif -#elif defined(CONFIG_CPU_SH4) -#define DMTE0_IRQ 34 -#define DMTE1_IRQ 35 -#define DMTE2_IRQ 36 -#define DMTE3_IRQ 37 -#define DMTE4_IRQ 44 /* 7751R only */ -#define DMTE5_IRQ 45 /* 7751R only */ -#define DMTE6_IRQ 46 /* 7751R only */ -#define DMTE7_IRQ 47 /* 7751R only */ -#define DMAE_IRQ 38 -#define DMA_IPR_ADDR INTC_IPRC -#define DMA_IPR_POS 2 -#define DMA_PRIORITY 7 -#endif - -#if defined (CONFIG_CPU_SUBTYPE_SH7707) || defined (CONFIG_CPU_SUBTYPE_SH7708) || \ - defined (CONFIG_CPU_SUBTYPE_SH7709) || defined (CONFIG_CPU_SUBTYPE_SH7750) || \ - defined (CONFIG_CPU_SUBTYPE_SH7751) || defined (CONFIG_CPU_SUBTYPE_SH7706) -#define SCI_ERI_IRQ 23 -#define SCI_RXI_IRQ 24 -#define SCI_TXI_IRQ 25 -#define SCI_IPR_ADDR INTC_IPRB -#define SCI_IPR_POS 1 -#define SCI_PRIORITY 3 -#endif - -#if defined(CONFIG_CPU_SUBTYPE_SH7300) -#define SCIF0_IRQ 80 -#define SCIF0_IPR_ADDR INTC_IPRG -#define SCIF0_IPR_POS 3 -#define SCIF0_PRIORITY 3 -#elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \ - defined(CONFIG_CPU_SUBTYPE_SH7706) || \ - defined(CONFIG_CPU_SUBTYPE_SH7707) || \ - defined(CONFIG_CPU_SUBTYPE_SH7709) -#define SCIF_ERI_IRQ 56 -#define SCIF_RXI_IRQ 57 -#define SCIF_BRI_IRQ 58 -#define SCIF_TXI_IRQ 59 -#define SCIF_IPR_ADDR INTC_IPRE -#define SCIF_IPR_POS 1 -#define SCIF_PRIORITY 3 - -#define IRDA_ERI_IRQ 52 -#define IRDA_RXI_IRQ 53 -#define IRDA_BRI_IRQ 54 -#define IRDA_TXI_IRQ 55 -#define IRDA_IPR_ADDR INTC_IPRE -#define IRDA_IPR_POS 2 -#define IRDA_PRIORITY 3 -#elif defined(CONFIG_CPU_SUBTYPE_SH7750) || defined(CONFIG_CPU_SUBTYPE_SH7751) || \ - defined(CONFIG_CPU_SUBTYPE_ST40STB1) || defined(CONFIG_CPU_SUBTYPE_SH4_202) -#define SCIF_ERI_IRQ 40 -#define SCIF_RXI_IRQ 41 -#define SCIF_BRI_IRQ 42 -#define SCIF_TXI_IRQ 43 -#define SCIF_IPR_ADDR INTC_IPRC -#define SCIF_IPR_POS 1 -#define SCIF_PRIORITY 3 -#if defined(CONFIG_CPU_SUBTYPE_ST40STB1) -#define SCIF1_ERI_IRQ 23 -#define SCIF1_RXI_IRQ 24 -#define SCIF1_BRI_IRQ 25 -#define SCIF1_TXI_IRQ 26 -#define SCIF1_IPR_ADDR INTC_IPRB -#define SCIF1_IPR_POS 1 -#define SCIF1_PRIORITY 3 -#endif /* ST40STB1 */ - -#endif /* 775x / SH4-202 / ST40STB1 */ -#endif /* 7780 */ - /* NR_IRQS is made from three components: * 1. ONCHIP_NR_IRQS - number of IRLS + on-chip peripherial modules * 2. PINT_NR_IRQS - number of PINT interrupts @@ -261,10 +37,15 @@ # define ONCHIP_NR_IRQS 144 #elif defined(CONFIG_CPU_SUBTYPE_SH7300) || \ defined(CONFIG_CPU_SUBTYPE_SH73180) || \ - defined(CONFIG_CPU_SUBTYPE_SH7343) + defined(CONFIG_CPU_SUBTYPE_SH7343) || \ + defined(CONFIG_CPU_SUBTYPE_SH7722) # define ONCHIP_NR_IRQS 109 #elif defined(CONFIG_CPU_SUBTYPE_SH7780) # define ONCHIP_NR_IRQS 111 +#elif defined(CONFIG_CPU_SUBTYPE_SH7206) +# define ONCHIP_NR_IRQS 256 +#elif defined(CONFIG_CPU_SUBTYPE_SH7619) +# define ONCHIP_NR_IRQS 128 #elif defined(CONFIG_SH_UNKNOWN) /* Most be last */ # define ONCHIP_NR_IRQS 144 #endif @@ -299,6 +80,8 @@ # define OFFCHIP_NR_IRQS 16 #elif defined(CONFIG_SH_7343_SOLUTION_ENGINE) # define OFFCHIP_NR_IRQS 12 +#elif defined(CONFIG_SH_7722_SOLUTION_ENGINE) +# define OFFCHIP_NR_IRQS 14 #elif defined(CONFIG_SH_UNKNOWN) # define OFFCHIP_NR_IRQS 16 /* Must also be last */ #else @@ -312,9 +95,11 @@ /* NR_IRQS. 1+2+3 */ #define NR_IRQS (ONCHIP_NR_IRQS + PINT_NR_IRQS + OFFCHIP_NR_IRQS) -extern void disable_irq(unsigned int); -extern void disable_irq_nosync(unsigned int); -extern void enable_irq(unsigned int); +/* + * Convert back and forth between INTEVT and IRQ values. + */ +#define evt2irq(evt) (((evt) >> 5) - 16) +#define irq2evt(irq) (((irq) + 16) << 5) /* * Simple Mask Register Support @@ -327,362 +112,36 @@ extern unsigned short *irq_mask_register; */ void init_IRQ_pint(void); +/* + * The shift value is now the number of bits to shift, not the number of + * bits/4. This is to make it easier to read the value directly from the + * datasheets. The IPR address, addr, will be set from ipr_idx via the + * map_ipridx_to_addr function. + */ struct ipr_data { unsigned int irq; - unsigned int addr; /* Address of Interrupt Priority Register */ - int shift; /* Shifts of the 16-bit data */ + int ipr_idx; /* Index for the IPR registered */ + int shift; /* Number of bits to shift the data */ int priority; /* The priority */ + unsigned int addr; /* Address of Interrupt Priority Register */ }; /* - * Function for "on chip support modules". + * Given an IPR IDX, map the value to an IPR register address. */ -extern void make_ipr_irq(struct ipr_data *table, unsigned int nr_irqs); -extern void make_imask_irq(unsigned int irq); - -#if defined(CONFIG_CPU_SUBTYPE_SH7300) -#undef INTC_IPRA -#undef INTC_IPRB -#define INTC_IPRA 0xA414FEE2UL -#define INTC_IPRB 0xA414FEE4UL -#define INTC_IPRC 0xA4140016UL -#define INTC_IPRD 0xA4140018UL -#define INTC_IPRE 0xA414001AUL -#define INTC_IPRF 0xA4080000UL -#define INTC_IPRG 0xA4080002UL -#define INTC_IPRH 0xA4080004UL -#define INTC_IPRI 0xA4080006UL -#define INTC_IPRJ 0xA4080008UL - -#define INTC_IMR0 0xA4080040UL -#define INTC_IMR1 0xA4080042UL -#define INTC_IMR2 0xA4080044UL -#define INTC_IMR3 0xA4080046UL -#define INTC_IMR4 0xA4080048UL -#define INTC_IMR5 0xA408004AUL -#define INTC_IMR6 0xA408004CUL -#define INTC_IMR7 0xA408004EUL -#define INTC_IMR8 0xA4080050UL -#define INTC_IMR9 0xA4080052UL -#define INTC_IMR10 0xA4080054UL - -#define INTC_IMCR0 0xA4080060UL -#define INTC_IMCR1 0xA4080062UL -#define INTC_IMCR2 0xA4080064UL -#define INTC_IMCR3 0xA4080066UL -#define INTC_IMCR4 0xA4080068UL -#define INTC_IMCR5 0xA408006AUL -#define INTC_IMCR6 0xA408006CUL -#define INTC_IMCR7 0xA408006EUL -#define INTC_IMCR8 0xA4080070UL -#define INTC_IMCR9 0xA4080072UL -#define INTC_IMCR10 0xA4080074UL - -#define INTC_ICR0 0xA414FEE0UL -#define INTC_ICR1 0xA4140010UL - -#define INTC_IRR0 0xA4140004UL - -#define PORT_PACR 0xA4050100UL -#define PORT_PBCR 0xA4050102UL -#define PORT_PCCR 0xA4050104UL -#define PORT_PDCR 0xA4050106UL -#define PORT_PECR 0xA4050108UL -#define PORT_PFCR 0xA405010AUL -#define PORT_PGCR 0xA405010CUL -#define PORT_PHCR 0xA405010EUL -#define PORT_PJCR 0xA4050110UL -#define PORT_PKCR 0xA4050112UL -#define PORT_PLCR 0xA4050114UL -#define PORT_SCPCR 0xA4050116UL -#define PORT_PMCR 0xA4050118UL -#define PORT_PNCR 0xA405011AUL -#define PORT_PQCR 0xA405011CUL - -#define PORT_PSELA 0xA4050140UL -#define PORT_PSELB 0xA4050142UL -#define PORT_PSELC 0xA4050144UL - -#define PORT_HIZCRA 0xA4050146UL -#define PORT_HIZCRB 0xA4050148UL -#define PORT_DRVCR 0xA4050150UL - -#define PORT_PADR 0xA4050120UL -#define PORT_PBDR 0xA4050122UL -#define PORT_PCDR 0xA4050124UL -#define PORT_PDDR 0xA4050126UL -#define PORT_PEDR 0xA4050128UL -#define PORT_PFDR 0xA405012AUL -#define PORT_PGDR 0xA405012CUL -#define PORT_PHDR 0xA405012EUL -#define PORT_PJDR 0xA4050130UL -#define PORT_PKDR 0xA4050132UL -#define PORT_PLDR 0xA4050134UL -#define PORT_SCPDR 0xA4050136UL -#define PORT_PMDR 0xA4050138UL -#define PORT_PNDR 0xA405013AUL -#define PORT_PQDR 0xA405013CUL - -#define IRQ0_IRQ 32 -#define IRQ1_IRQ 33 -#define IRQ2_IRQ 34 -#define IRQ3_IRQ 35 -#define IRQ4_IRQ 36 -#define IRQ5_IRQ 37 - -#define IRQ0_IPR_ADDR INTC_IPRC -#define IRQ1_IPR_ADDR INTC_IPRC -#define IRQ2_IPR_ADDR INTC_IPRC -#define IRQ3_IPR_ADDR INTC_IPRC -#define IRQ4_IPR_ADDR INTC_IPRD -#define IRQ5_IPR_ADDR INTC_IPRD - -#define IRQ0_IPR_POS 0 -#define IRQ1_IPR_POS 1 -#define IRQ2_IPR_POS 2 -#define IRQ3_IPR_POS 3 -#define IRQ4_IPR_POS 0 -#define IRQ5_IPR_POS 1 +unsigned int map_ipridx_to_addr(int idx); -#define IRQ0_PRIORITY 1 -#define IRQ1_PRIORITY 1 -#define IRQ2_PRIORITY 1 -#define IRQ3_PRIORITY 1 -#define IRQ4_PRIORITY 1 -#define IRQ5_PRIORITY 1 - -extern int ipr_irq_demux(int irq); -#define __irq_demux(irq) ipr_irq_demux(irq) - -#elif defined(CONFIG_CPU_SUBTYPE_SH7604) -#define INTC_IPRA 0xfffffee2UL -#define INTC_IPRB 0xfffffe60UL - -#define INTC_VCRA 0xfffffe62UL -#define INTC_VCRB 0xfffffe64UL -#define INTC_VCRC 0xfffffe66UL -#define INTC_VCRD 0xfffffe68UL - -#define INTC_VCRWDT 0xfffffee4UL -#define INTC_VCRDIV 0xffffff0cUL -#define INTC_VCRDMA0 0xffffffa0UL -#define INTC_VCRDMA1 0xffffffa8UL - -#define INTC_ICR 0xfffffee0UL -#elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \ - defined(CONFIG_CPU_SUBTYPE_SH7706) || \ - defined(CONFIG_CPU_SUBTYPE_SH7707) || \ - defined(CONFIG_CPU_SUBTYPE_SH7709) || \ - defined(CONFIG_CPU_SUBTYPE_SH7710) -#define INTC_IRR0 0xa4000004UL -#define INTC_IRR1 0xa4000006UL -#define INTC_IRR2 0xa4000008UL - -#define INTC_ICR0 0xfffffee0UL -#define INTC_ICR1 0xa4000010UL -#define INTC_ICR2 0xa4000012UL -#define INTC_INTER 0xa4000014UL - -#define INTC_IPRC 0xa4000016UL -#define INTC_IPRD 0xa4000018UL -#define INTC_IPRE 0xa400001aUL -#if defined(CONFIG_CPU_SUBTYPE_SH7707) -#define INTC_IPRF 0xa400001cUL -#elif defined(CONFIG_CPU_SUBTYPE_SH7705) -#define INTC_IPRF 0xa4080000UL -#define INTC_IPRG 0xa4080002UL -#define INTC_IPRH 0xa4080004UL -#elif defined(CONFIG_CPU_SUBTYPE_SH7710) -/* Interrupt Controller Registers */ -#undef INTC_IPRA -#undef INTC_IPRB -#define INTC_IPRA 0xA414FEE2UL -#define INTC_IPRB 0xA414FEE4UL -#define INTC_IPRF 0xA4080000UL -#define INTC_IPRG 0xA4080002UL -#define INTC_IPRH 0xA4080004UL -#define INTC_IPRI 0xA4080006UL - -#undef INTC_ICR0 -#undef INTC_ICR1 -#define INTC_ICR0 0xA414FEE0UL -#define INTC_ICR1 0xA4140010UL - -#define INTC_IRR0 0xa4000004UL -#define INTC_IRR1 0xa4000006UL -#define INTC_IRR2 0xa4000008UL -#define INTC_IRR3 0xa400000AUL -#define INTC_IRR4 0xa400000CUL -#define INTC_IRR5 0xa4080020UL -#define INTC_IRR7 0xa4080024UL -#define INTC_IRR8 0xa4080026UL - -/* Interrupt numbers */ -#define TIMER2_IRQ 18 -#define TIMER2_IPR_ADDR INTC_IPRA -#define TIMER2_IPR_POS 1 -#define TIMER2_PRIORITY 2 - -/* WDT */ -#define WDT_IRQ 27 -#define WDT_IPR_ADDR INTC_IPRB -#define WDT_IPR_POS 3 -#define WDT_PRIORITY 2 - -#define SCIF0_ERI_IRQ 52 -#define SCIF0_RXI_IRQ 53 -#define SCIF0_BRI_IRQ 54 -#define SCIF0_TXI_IRQ 55 -#define SCIF0_IPR_ADDR INTC_IPRE -#define SCIF0_IPR_POS 2 -#define SCIF0_PRIORITY 3 - -#define DMTE4_IRQ 76 -#define DMTE5_IRQ 77 -#define DMA2_IPR_ADDR INTC_IPRF -#define DMA2_IPR_POS 2 -#define DMA2_PRIORITY 7 - -#define IPSEC_IRQ 79 -#define IPSEC_IPR_ADDR INTC_IPRF -#define IPSEC_IPR_POS 3 -#define IPSEC_PRIORITY 3 - -/* EDMAC */ -#define EDMAC0_IRQ 80 -#define EDMAC0_IPR_ADDR INTC_IPRG -#define EDMAC0_IPR_POS 3 -#define EDMAC0_PRIORITY 3 - -#define EDMAC1_IRQ 81 -#define EDMAC1_IPR_ADDR INTC_IPRG -#define EDMAC1_IPR_POS 2 -#define EDMAC1_PRIORITY 3 - -#define EDMAC2_IRQ 82 -#define EDMAC2_IPR_ADDR INTC_IPRG -#define EDMAC2_IPR_POS 1 -#define EDMAC2_PRIORITY 3 - -/* SIOF */ -#define SIOF0_ERI_IRQ 96 -#define SIOF0_TXI_IRQ 97 -#define SIOF0_RXI_IRQ 98 -#define SIOF0_CCI_IRQ 99 -#define SIOF0_IPR_ADDR INTC_IPRH -#define SIOF0_IPR_POS 0 -#define SIOF0_PRIORITY 7 - -#define SIOF1_ERI_IRQ 100 -#define SIOF1_TXI_IRQ 101 -#define SIOF1_RXI_IRQ 102 -#define SIOF1_CCI_IRQ 103 -#define SIOF1_IPR_ADDR INTC_IPRI -#define SIOF1_IPR_POS 1 -#define SIOF1_PRIORITY 7 -#endif /* CONFIG_CPU_SUBTYPE_SH7710 */ - -#if defined(CONFIG_CPU_SUBTYPE_SH7710) -#define PORT_PACR 0xa4050100UL -#define PORT_PBCR 0xa4050102UL -#define PORT_PCCR 0xa4050104UL -#define PORT_PETCR 0xa4050106UL -#define PORT_PADR 0xa4050120UL -#define PORT_PBDR 0xa4050122UL -#define PORT_PCDR 0xa4050124UL -#else -#define PORT_PACR 0xa4000100UL -#define PORT_PBCR 0xa4000102UL -#define PORT_PCCR 0xa4000104UL -#define PORT_PFCR 0xa400010aUL -#define PORT_PADR 0xa4000120UL -#define PORT_PBDR 0xa4000122UL -#define PORT_PCDR 0xa4000124UL -#define PORT_PFDR 0xa400012aUL -#endif - -#define IRQ0_IRQ 32 -#define IRQ1_IRQ 33 -#define IRQ2_IRQ 34 -#define IRQ3_IRQ 35 -#define IRQ4_IRQ 36 -#define IRQ5_IRQ 37 - -#define IRQ0_IPR_ADDR INTC_IPRC -#define IRQ1_IPR_ADDR INTC_IPRC -#define IRQ2_IPR_ADDR INTC_IPRC -#define IRQ3_IPR_ADDR INTC_IPRC -#define IRQ4_IPR_ADDR INTC_IPRD -#define IRQ5_IPR_ADDR INTC_IPRD - -#define IRQ0_IPR_POS 0 -#define IRQ1_IPR_POS 1 -#define IRQ2_IPR_POS 2 -#define IRQ3_IPR_POS 3 -#define IRQ4_IPR_POS 0 -#define IRQ5_IPR_POS 1 - -#define IRQ0_PRIORITY 1 -#define IRQ1_PRIORITY 1 -#define IRQ2_PRIORITY 1 -#define IRQ3_PRIORITY 1 -#define IRQ4_PRIORITY 1 -#define IRQ5_PRIORITY 1 - -#define PINT0_IRQ 40 -#define PINT8_IRQ 41 - -#define PINT0_IPR_ADDR INTC_IPRD -#define PINT8_IPR_ADDR INTC_IPRD - -#define PINT0_IPR_POS 3 -#define PINT8_IPR_POS 2 -#define PINT0_PRIORITY 2 -#define PINT8_PRIORITY 2 - -extern int ipr_irq_demux(int irq); -#define __irq_demux(irq) ipr_irq_demux(irq) -#endif /* CONFIG_CPU_SUBTYPE_SH7707 || CONFIG_CPU_SUBTYPE_SH7709 */ - -#if defined(CONFIG_CPU_SUBTYPE_SH7750) || defined(CONFIG_CPU_SUBTYPE_SH7751) || \ - defined(CONFIG_CPU_SUBTYPE_ST40STB1) || defined(CONFIG_CPU_SUBTYPE_SH4_202) -#define INTC_ICR 0xffd00000 -#define INTC_ICR_NMIL (1<<15) -#define INTC_ICR_MAI (1<<14) -#define INTC_ICR_NMIB (1<<9) -#define INTC_ICR_NMIE (1<<8) -#define INTC_ICR_IRLM (1<<7) -#endif - -#ifdef CONFIG_CPU_SUBTYPE_SH7780 -#include <asm/irq-sh7780.h> -#endif - -/* SH with INTC2-style interrupts */ -#ifdef CONFIG_CPU_HAS_INTC2_IRQ -#if defined(CONFIG_CPU_SUBTYPE_ST40STB1) -#define INTC2_BASE 0xfe080000 -#define INTC2_FIRST_IRQ 64 -#define INTC2_INTREQ_OFFSET 0x20 -#define INTC2_INTMSK_OFFSET 0x40 -#define INTC2_INTMSKCLR_OFFSET 0x60 -#define NR_INTC2_IRQS 25 -#elif defined(CONFIG_CPU_SUBTYPE_SH7760) -#define INTC2_BASE 0xfe080000 -#define INTC2_FIRST_IRQ 48 /* INTEVT 0x800 */ -#define INTC2_INTREQ_OFFSET 0x20 -#define INTC2_INTMSK_OFFSET 0x40 -#define INTC2_INTMSKCLR_OFFSET 0x60 -#define NR_INTC2_IRQS 64 -#elif defined(CONFIG_CPU_SUBTYPE_SH7780) -#define INTC2_BASE 0xffd40000 -#define INTC2_FIRST_IRQ 21 -#define INTC2_INTMSK_OFFSET (0x38) -#define INTC2_INTMSKCLR_OFFSET (0x3c) -#define NR_INTC2_IRQS 60 -#endif +/* + * Enable individual interrupt mode for external IPR IRQs. + */ +void ipr_irq_enable_irlm(void); -#define INTC2_INTPRI_OFFSET 0x00 +/* + * Function for "on chip support modules". + */ +void make_ipr_irq(struct ipr_data *table, unsigned int nr_irqs); +void make_imask_irq(unsigned int irq); +void init_IRQ_ipr(void); struct intc2_data { unsigned short irq; @@ -693,20 +152,14 @@ struct intc2_data { void make_intc2_irq(struct intc2_data *, unsigned int nr_irqs); void init_IRQ_intc2(void); -#endif - -extern int shmse_irq_demux(int irq); static inline int generic_irq_demux(int irq) { return irq; } -#ifndef __irq_demux -#define __irq_demux(irq) (irq) -#endif #define irq_canonicalize(irq) (irq) -#define irq_demux(irq) __irq_demux(sh_mv.mv_irq_demux(irq)) +#define irq_demux(irq) sh_mv.mv_irq_demux(irq) #ifdef CONFIG_4KSTACKS extern void irq_ctx_init(int cpu); @@ -717,12 +170,4 @@ extern void irq_ctx_exit(int cpu); # define irq_ctx_exit(cpu) do { } while (0) #endif -#if defined(CONFIG_CPU_SUBTYPE_SH73180) -#include <asm/irq-sh73180.h> -#endif - -#if defined(CONFIG_CPU_SUBTYPE_SH7343) -#include <asm/irq-sh7343.h> -#endif - #endif /* __ASM_SH_IRQ_H */ diff --git a/include/asm-sh/irqflags.h b/include/asm-sh/irqflags.h new file mode 100644 index 00000000000..9dedc1b693e --- /dev/null +++ b/include/asm-sh/irqflags.h @@ -0,0 +1,123 @@ +#ifndef __ASM_SH_IRQFLAGS_H +#define __ASM_SH_IRQFLAGS_H + +static inline void raw_local_irq_enable(void) +{ + unsigned long __dummy0, __dummy1; + + __asm__ __volatile__ ( + "stc sr, %0\n\t" + "and %1, %0\n\t" +#ifdef CONFIG_CPU_HAS_SR_RB + "stc r6_bank, %1\n\t" + "or %1, %0\n\t" +#endif + "ldc %0, sr\n\t" + : "=&r" (__dummy0), "=r" (__dummy1) + : "1" (~0x000000f0) + : "memory" + ); +} + +static inline void raw_local_irq_disable(void) +{ + unsigned long flags; + + __asm__ __volatile__ ( + "stc sr, %0\n\t" + "or #0xf0, %0\n\t" + "ldc %0, sr\n\t" + : "=&z" (flags) + : /* no inputs */ + : "memory" + ); +} + +static inline void set_bl_bit(void) +{ + unsigned long __dummy0, __dummy1; + + __asm__ __volatile__ ( + "stc sr, %0\n\t" + "or %2, %0\n\t" + "and %3, %0\n\t" + "ldc %0, sr\n\t" + : "=&r" (__dummy0), "=r" (__dummy1) + : "r" (0x10000000), "r" (0xffffff0f) + : "memory" + ); +} + +static inline void clear_bl_bit(void) +{ + unsigned long __dummy0, __dummy1; + + __asm__ __volatile__ ( + "stc sr, %0\n\t" + "and %2, %0\n\t" + "ldc %0, sr\n\t" + : "=&r" (__dummy0), "=r" (__dummy1) + : "1" (~0x10000000) + : "memory" + ); +} + +static inline unsigned long __raw_local_save_flags(void) +{ + unsigned long flags; + + __asm__ __volatile__ ( + "stc sr, %0\n\t" + "and #0xf0, %0\n\t" + : "=&z" (flags) + : /* no inputs */ + : "memory" + ); + + return flags; +} + +#define raw_local_save_flags(flags) \ + do { (flags) = __raw_local_save_flags(); } while (0) + +static inline int raw_irqs_disabled_flags(unsigned long flags) +{ + return (flags != 0); +} + +static inline int raw_irqs_disabled(void) +{ + unsigned long flags = __raw_local_save_flags(); + + return raw_irqs_disabled_flags(flags); +} + +static inline unsigned long __raw_local_irq_save(void) +{ + unsigned long flags, __dummy; + + __asm__ __volatile__ ( + "stc sr, %1\n\t" + "mov %1, %0\n\t" + "or #0xf0, %0\n\t" + "ldc %0, sr\n\t" + "mov %1, %0\n\t" + "and #0xf0, %0\n\t" + : "=&z" (flags), "=&r" (__dummy) + : /* no inputs */ + : "memory" + ); + + return flags; +} + +#define raw_local_irq_save(flags) \ + do { (flags) = __raw_local_irq_save(); } while (0) + +static inline void raw_local_irq_restore(unsigned long flags) +{ + if ((flags & 0xf0) != 0xf0) + raw_local_irq_enable(); +} + +#endif /* __ASM_SH_IRQFLAGS_H */ diff --git a/include/asm-sh/mmu_context.h b/include/asm-sh/mmu_context.h index c7088efe579..46f04e23bd4 100644 --- a/include/asm-sh/mmu_context.h +++ b/include/asm-sh/mmu_context.h @@ -10,7 +10,6 @@ #include <asm/cpu/mmu_context.h> #include <asm/tlbflush.h> -#include <asm/pgalloc.h> #include <asm/uaccess.h> #include <asm/io.h> @@ -42,10 +41,8 @@ extern unsigned long mmu_context_cache; /* * Get MMU context if needed. */ -static __inline__ void -get_mmu_context(struct mm_struct *mm) +static inline void get_mmu_context(struct mm_struct *mm) { - extern void flush_tlb_all(void); unsigned long mc = mmu_context_cache; /* Check if we have old version of context. */ @@ -61,6 +58,7 @@ get_mmu_context(struct mm_struct *mm) * Flush all TLB and start new cycle. */ flush_tlb_all(); + /* * Fix version; Note that we avoid version #0 * to distingush NO_CONTEXT. @@ -75,11 +73,10 @@ get_mmu_context(struct mm_struct *mm) * Initialize the context related info for a new mm_struct * instance. */ -static __inline__ int init_new_context(struct task_struct *tsk, +static inline int init_new_context(struct task_struct *tsk, struct mm_struct *mm) { mm->context.id = NO_CONTEXT; - return 0; } @@ -87,12 +84,12 @@ static __inline__ int init_new_context(struct task_struct *tsk, * Destroy context related info for an mm_struct that is about * to be put to rest. */ -static __inline__ void destroy_context(struct mm_struct *mm) +static inline void destroy_context(struct mm_struct *mm) { /* Do nothing */ } -static __inline__ void set_asid(unsigned long asid) +static inline void set_asid(unsigned long asid) { unsigned long __dummy; @@ -105,7 +102,7 @@ static __inline__ void set_asid(unsigned long asid) "r" (0xffffff00)); } -static __inline__ unsigned long get_asid(void) +static inline unsigned long get_asid(void) { unsigned long asid; @@ -120,24 +117,29 @@ static __inline__ unsigned long get_asid(void) * After we have set current->mm to a new value, this activates * the context for the new mm so we see the new mappings. */ -static __inline__ void activate_context(struct mm_struct *mm) +static inline void activate_context(struct mm_struct *mm) { get_mmu_context(mm); set_asid(mm->context.id & MMU_CONTEXT_ASID_MASK); } -/* MMU_TTB can be used for optimizing the fault handling. - (Currently not used) */ -static __inline__ void switch_mm(struct mm_struct *prev, - struct mm_struct *next, - struct task_struct *tsk) +/* MMU_TTB is used for optimizing the fault handling. */ +static inline void set_TTB(pgd_t *pgd) { - if (likely(prev != next)) { - unsigned long __pgdir = (unsigned long)next->pgd; + ctrl_outl((unsigned long)pgd, MMU_TTB); +} - __asm__ __volatile__("mov.l %0, %1" - : /* no output */ - : "r" (__pgdir), "m" (__m(MMU_TTB))); +static inline pgd_t *get_TTB(void) +{ + return (pgd_t *)ctrl_inl(MMU_TTB); +} + +static inline void switch_mm(struct mm_struct *prev, + struct mm_struct *next, + struct task_struct *tsk) +{ + if (likely(prev != next)) { + set_TTB(next->pgd); activate_context(next); } } @@ -147,7 +149,7 @@ static __inline__ void switch_mm(struct mm_struct *prev, #define activate_mm(prev, next) \ switch_mm((prev),(next),NULL) -static __inline__ void +static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) { } diff --git a/include/asm-sh/page.h b/include/asm-sh/page.h index ca8b26d9047..380fd62dd05 100644 --- a/include/asm-sh/page.h +++ b/include/asm-sh/page.h @@ -13,9 +13,16 @@ [ P4 control ] 0xE0000000 */ - /* PAGE_SHIFT determines the page size */ -#define PAGE_SHIFT 12 +#if defined(CONFIG_PAGE_SIZE_4KB) +# define PAGE_SHIFT 12 +#elif defined(CONFIG_PAGE_SIZE_8KB) +# define PAGE_SHIFT 13 +#elif defined(CONFIG_PAGE_SIZE_64KB) +# define PAGE_SHIFT 16 +#else +# error "Bogus kernel page size?" +#endif #ifdef __ASSEMBLY__ #define PAGE_SIZE (1 << PAGE_SHIFT) @@ -28,8 +35,14 @@ #if defined(CONFIG_HUGETLB_PAGE_SIZE_64K) #define HPAGE_SHIFT 16 +#elif defined(CONFIG_HUGETLB_PAGE_SIZE_256K) +#define HPAGE_SHIFT 18 #elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB) #define HPAGE_SHIFT 20 +#elif defined(CONFIG_HUGETLB_PAGE_SIZE_4MB) +#define HPAGE_SHIFT 22 +#elif defined(CONFIG_HUGETLB_PAGE_SIZE_64MB) +#define HPAGE_SHIFT 26 #endif #ifdef CONFIG_HUGETLB_PAGE @@ -69,15 +82,25 @@ extern void __copy_user_page(void *to, void *from, void *orig_to); /* * These are used to make use of C type-checking.. */ -typedef struct { unsigned long pte; } pte_t; -typedef struct { unsigned long pgd; } pgd_t; +#ifdef CONFIG_X2TLB +typedef struct { unsigned long pte_low, pte_high; } pte_t; +typedef struct { unsigned long long pgprot; } pgprot_t; +#define pte_val(x) \ + ((x).pte_low | ((unsigned long long)(x).pte_high << 32)) +#define __pte(x) \ + ({ pte_t __pte = {(x), ((unsigned long long)(x)) >> 32}; __pte; }) +#else +typedef struct { unsigned long pte_low; } pte_t; typedef struct { unsigned long pgprot; } pgprot_t; +#define pte_val(x) ((x).pte_low) +#define __pte(x) ((pte_t) { (x) } ) +#endif + +typedef struct { unsigned long pgd; } pgd_t; -#define pte_val(x) ((x).pte) #define pgd_val(x) ((x).pgd) #define pgprot_val(x) ((x).pgprot) -#define __pte(x) ((pte_t) { (x) } ) #define __pgd(x) ((pgd_t) { (x) } ) #define __pgprot(x) ((pgprot_t) { (x) } ) diff --git a/include/asm-sh/pgalloc.h b/include/asm-sh/pgalloc.h index e841465ab4d..888e4529e6f 100644 --- a/include/asm-sh/pgalloc.h +++ b/include/asm-sh/pgalloc.h @@ -1,13 +1,16 @@ #ifndef __ASM_SH_PGALLOC_H #define __ASM_SH_PGALLOC_H -#define pmd_populate_kernel(mm, pmd, pte) \ - set_pmd(pmd, __pmd(_PAGE_TABLE + __pa(pte))) +static inline void pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmd, + pte_t *pte) +{ + set_pmd(pmd, __pmd((unsigned long)pte)); +} static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmd, struct page *pte) { - set_pmd(pmd, __pmd(_PAGE_TABLE + page_to_phys(pte))); + set_pmd(pmd, __pmd((unsigned long)page_address(pte))); } /* @@ -15,7 +18,16 @@ static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmd, */ static inline pgd_t *pgd_alloc(struct mm_struct *mm) { - return (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_REPEAT | __GFP_ZERO); + pgd_t *pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_REPEAT); + + if (pgd) { + memset(pgd, 0, USER_PTRS_PER_PGD * sizeof(pgd_t)); + memcpy(pgd + USER_PTRS_PER_PGD, + swapper_pg_dir + USER_PTRS_PER_PGD, + (PTRS_PER_PGD - USER_PTRS_PER_PGD) * sizeof(pgd_t)); + } + + return pgd; } static inline void pgd_free(pgd_t *pgd) diff --git a/include/asm-sh/pgtable-2level.h b/include/asm-sh/pgtable-2level.h deleted file mode 100644 index b525db6f61c..00000000000 --- a/include/asm-sh/pgtable-2level.h +++ /dev/null @@ -1,70 +0,0 @@ -#ifndef __ASM_SH_PGTABLE_2LEVEL_H -#define __ASM_SH_PGTABLE_2LEVEL_H - -/* - * traditional two-level paging structure: - */ - -#define PGDIR_SHIFT 22 -#define PTRS_PER_PGD 1024 - -/* - * this is two-level, so we don't really have any - * PMD directory physically. - */ -#define PMD_SHIFT 22 -#define PTRS_PER_PMD 1 - -#define PTRS_PER_PTE 1024 - -#ifndef __ASSEMBLY__ -#define pte_ERROR(e) \ - printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e)) -#define pmd_ERROR(e) \ - printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e)) -#define pgd_ERROR(e) \ - printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e)) - -/* - * The "pgd_xxx()" functions here are trivial for a folded two-level - * setup: the pgd is never bad, and a pmd always exists (as it's folded - * into the pgd entry) - */ -static inline int pgd_none(pgd_t pgd) { return 0; } -static inline int pgd_bad(pgd_t pgd) { return 0; } -static inline int pgd_present(pgd_t pgd) { return 1; } -static inline void pgd_clear (pgd_t * pgdp) { } - -/* - * Certain architectures need to do special things when PTEs - * within a page table are directly modified. Thus, the following - * hook is made available. - */ -#define set_pte(pteptr, pteval) (*(pteptr) = pteval) -#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval) - -/* - * (pmds are folded into pgds so this doesn't get actually called, - * but the define is needed for a generic inline function.) - */ -#define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval) -#define set_pgd(pgdptr, pgdval) (*(pgdptr) = pgdval) - -#define pgd_page_vaddr(pgd) \ -((unsigned long) __va(pgd_val(pgd) & PAGE_MASK)) - -#define pgd_page(pgd) \ - (phys_to_page(pgd_val(pgd))) - -static inline pmd_t * pmd_offset(pgd_t * dir, unsigned long address) -{ - return (pmd_t *) dir; -} - -#define pte_pfn(x) ((unsigned long)(((x).pte >> PAGE_SHIFT))) -#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot)) -#define pfn_pmd(pfn, prot) __pmd(((pfn) << PAGE_SHIFT) | pgprot_val(prot)) - -#endif /* !__ASSEMBLY__ */ - -#endif /* __ASM_SH_PGTABLE_2LEVEL_H */ diff --git a/include/asm-sh/pgtable.h b/include/asm-sh/pgtable.h index 2c8682ad101..036ca284386 100644 --- a/include/asm-sh/pgtable.h +++ b/include/asm-sh/pgtable.h @@ -15,15 +15,10 @@ #include <asm-generic/pgtable-nopmd.h> #include <asm/page.h> -#define PTRS_PER_PGD 1024 - #ifndef __ASSEMBLY__ #include <asm/addrspace.h> #include <asm/fixmap.h> -extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; -extern void paging_init(void); - /* * ZERO_PAGE is a global shared page that is always zero: used * for zero-mapped memory areas etc.. @@ -33,15 +28,28 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]; #endif /* !__ASSEMBLY__ */ -/* traditional two-level paging structure */ -#define PGDIR_SHIFT 22 -#define PTRS_PER_PMD 1 -#define PTRS_PER_PTE 1024 -#define PMD_SIZE (1UL << PMD_SHIFT) -#define PMD_MASK (~(PMD_SIZE-1)) -#define PGDIR_SIZE (1UL << PGDIR_SHIFT) +/* + * traditional two-level paging structure + */ +/* PTE bits */ +#ifdef CONFIG_X2TLB +# define PTE_MAGNITUDE 3 /* 64-bit PTEs on extended mode SH-X2 TLB */ +#else +# define PTE_MAGNITUDE 2 /* 32-bit PTEs */ +#endif +#define PTE_SHIFT PAGE_SHIFT +#define PTE_BITS (PTE_SHIFT - PTE_MAGNITUDE) + +/* PGD bits */ +#define PGDIR_SHIFT (PTE_SHIFT + PTE_BITS) +#define PGDIR_BITS (32 - PGDIR_SHIFT) +#define PGDIR_SIZE (1 << PGDIR_SHIFT) #define PGDIR_MASK (~(PGDIR_SIZE-1)) +/* Entries per level */ +#define PTRS_PER_PTE (PAGE_SIZE / 4) +#define PTRS_PER_PGD (PAGE_SIZE / 4) + #define USER_PTRS_PER_PGD (TASK_SIZE/PGDIR_SIZE) #define FIRST_USER_ADDRESS 0 @@ -49,7 +57,7 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]; /* * First 1MB map is used by fixed purpose. - * Currently only 4-enty (16kB) is used (see arch/sh/mm/cache.c) + * Currently only 4-entry (16kB) is used (see arch/sh/mm/cache.c) */ #define VMALLOC_START (P3SEG+0x00100000) #define VMALLOC_END (FIXADDR_START-2*PAGE_SIZE) @@ -57,7 +65,8 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]; /* * Linux PTEL encoding. * - * Hardware and software bit definitions for the PTEL value: + * Hardware and software bit definitions for the PTEL value (see below for + * notes on SH-X2 MMUs and 64-bit PTEs): * * - Bits 0 and 7 are reserved on SH-3 (_PAGE_WT and _PAGE_SZ1 on SH-4). * @@ -76,20 +85,57 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]; * * - Bits 31, 30, and 29 remain unused by everyone and can be used for future * software flags, although care must be taken to update _PAGE_CLEAR_FLAGS. + * + * XXX: Leave the _PAGE_FILE and _PAGE_WT overhaul for a rainy day. + * + * SH-X2 MMUs and extended PTEs + * + * SH-X2 supports an extended mode TLB with split data arrays due to the + * number of bits needed for PR and SZ (now EPR and ESZ) encodings. The PR and + * SZ bit placeholders still exist in data array 1, but are implemented as + * reserved bits, with the real logic existing in data array 2. + * + * The downside to this is that we can no longer fit everything in to a 32-bit + * PTE encoding, so a 64-bit pte_t is necessary for these parts. On the plus + * side, this gives us quite a few spare bits to play with for future usage. */ +/* Legacy and compat mode bits */ #define _PAGE_WT 0x001 /* WT-bit on SH-4, 0 on SH-3 */ #define _PAGE_HW_SHARED 0x002 /* SH-bit : shared among processes */ #define _PAGE_DIRTY 0x004 /* D-bit : page changed */ #define _PAGE_CACHABLE 0x008 /* C-bit : cachable */ -#define _PAGE_SZ0 0x010 /* SZ0-bit : Size of page */ -#define _PAGE_RW 0x020 /* PR0-bit : write access allowed */ -#define _PAGE_USER 0x040 /* PR1-bit : user space access allowed */ -#define _PAGE_SZ1 0x080 /* SZ1-bit : Size of page (on SH-4) */ +#ifndef CONFIG_X2TLB +# define _PAGE_SZ0 0x010 /* SZ0-bit : Size of page */ +# define _PAGE_RW 0x020 /* PR0-bit : write access allowed */ +# define _PAGE_USER 0x040 /* PR1-bit : user space access allowed*/ +# define _PAGE_SZ1 0x080 /* SZ1-bit : Size of page (on SH-4) */ +#endif #define _PAGE_PRESENT 0x100 /* V-bit : page is valid */ #define _PAGE_PROTNONE 0x200 /* software: if not present */ #define _PAGE_ACCESSED 0x400 /* software: page referenced */ #define _PAGE_FILE _PAGE_WT /* software: pagecache or swap? */ +/* Extended mode bits */ +#define _PAGE_EXT_ESZ0 0x0010 /* ESZ0-bit: Size of page */ +#define _PAGE_EXT_ESZ1 0x0020 /* ESZ1-bit: Size of page */ +#define _PAGE_EXT_ESZ2 0x0040 /* ESZ2-bit: Size of page */ +#define _PAGE_EXT_ESZ3 0x0080 /* ESZ3-bit: Size of page */ + +#define _PAGE_EXT_USER_EXEC 0x0100 /* EPR0-bit: User space executable */ +#define _PAGE_EXT_USER_WRITE 0x0200 /* EPR1-bit: User space writable */ +#define _PAGE_EXT_USER_READ 0x0400 /* EPR2-bit: User space readable */ + +#define _PAGE_EXT_KERN_EXEC 0x0800 /* EPR3-bit: Kernel space executable */ +#define _PAGE_EXT_KERN_WRITE 0x1000 /* EPR4-bit: Kernel space writable */ +#define _PAGE_EXT_KERN_READ 0x2000 /* EPR5-bit: Kernel space readable */ + +/* Wrapper for extended mode pgprot twiddling */ +#ifdef CONFIG_X2TLB +# define _PAGE_EXT(x) ((unsigned long long)(x) << 32) +#else +# define _PAGE_EXT(x) (0) +#endif + /* software: moves to PTEA.TC (Timing Control) */ #define _PAGE_PCC_AREA5 0x00000000 /* use BSC registers for area5 */ #define _PAGE_PCC_AREA6 0x80000000 /* use BSC registers for area6 */ @@ -114,37 +160,160 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]; #define _PAGE_FLAGS_HARDWARE_MASK (0x1fffffff & ~(_PAGE_CLEAR_FLAGS)) -/* Hardware flags: SZ0=1 (4k-byte) */ -#define _PAGE_FLAGS_HARD _PAGE_SZ0 +/* Hardware flags, page size encoding */ +#if defined(CONFIG_X2TLB) +# if defined(CONFIG_PAGE_SIZE_4KB) +# define _PAGE_FLAGS_HARD _PAGE_EXT(_PAGE_EXT_ESZ0) +# elif defined(CONFIG_PAGE_SIZE_8KB) +# define _PAGE_FLAGS_HARD _PAGE_EXT(_PAGE_EXT_ESZ1) +# elif defined(CONFIG_PAGE_SIZE_64KB) +# define _PAGE_FLAGS_HARD _PAGE_EXT(_PAGE_EXT_ESZ2) +# endif +#else +# if defined(CONFIG_PAGE_SIZE_4KB) +# define _PAGE_FLAGS_HARD _PAGE_SZ0 +# elif defined(CONFIG_PAGE_SIZE_64KB) +# define _PAGE_FLAGS_HARD _PAGE_SZ1 +# endif +#endif -#if defined(CONFIG_HUGETLB_PAGE_SIZE_64K) -#define _PAGE_SZHUGE (_PAGE_SZ1) -#elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB) -#define _PAGE_SZHUGE (_PAGE_SZ0 | _PAGE_SZ1) +#if defined(CONFIG_X2TLB) +# if defined(CONFIG_HUGETLB_PAGE_SIZE_64K) +# define _PAGE_SZHUGE (_PAGE_EXT_ESZ2) +# elif defined(CONFIG_HUGETLB_PAGE_SIZE_256K) +# define _PAGE_SZHUGE (_PAGE_EXT_ESZ0 | _PAGE_EXT_ESZ2) +# elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB) +# define _PAGE_SZHUGE (_PAGE_EXT_ESZ0 | _PAGE_EXT_ESZ1 | _PAGE_EXT_ESZ2) +# elif defined(CONFIG_HUGETLB_PAGE_SIZE_4MB) +# define _PAGE_SZHUGE (_PAGE_EXT_ESZ3) +# elif defined(CONFIG_HUGETLB_PAGE_SIZE_64MB) +# define _PAGE_SZHUGE (_PAGE_EXT_ESZ2 | _PAGE_EXT_ESZ3) +# endif +#else +# if defined(CONFIG_HUGETLB_PAGE_SIZE_64K) +# define _PAGE_SZHUGE (_PAGE_SZ1) +# elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB) +# define _PAGE_SZHUGE (_PAGE_SZ0 | _PAGE_SZ1) +# endif #endif -#define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED | _PAGE_DIRTY) -#define _KERNPG_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | _PAGE_DIRTY) -#define _PAGE_CHG_MASK (PTE_MASK | _PAGE_ACCESSED | _PAGE_CACHABLE | _PAGE_DIRTY) +/* + * Stub out _PAGE_SZHUGE if we don't have a good definition for it, + * to make pte_mkhuge() happy. + */ +#ifndef _PAGE_SZHUGE +# define _PAGE_SZHUGE (_PAGE_FLAGS_HARD) +#endif + +#define _PAGE_CHG_MASK \ + (PTE_MASK | _PAGE_ACCESSED | _PAGE_CACHABLE | _PAGE_DIRTY) #ifndef __ASSEMBLY__ -#ifdef CONFIG_MMU -#define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_CACHABLE |_PAGE_ACCESSED | _PAGE_FLAGS_HARD) -#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_CACHABLE |_PAGE_ACCESSED | _PAGE_FLAGS_HARD) -#define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | _PAGE_ACCESSED | _PAGE_FLAGS_HARD) -#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | _PAGE_ACCESSED | _PAGE_FLAGS_HARD) -#define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_CACHABLE | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_HW_SHARED | _PAGE_FLAGS_HARD) +#if defined(CONFIG_X2TLB) /* SH-X2 TLB */ +#define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_CACHABLE | \ + _PAGE_ACCESSED | _PAGE_FLAGS_HARD) + +#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \ + _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \ + _PAGE_EXT(_PAGE_EXT_USER_READ | \ + _PAGE_EXT_USER_WRITE)) + +#define PAGE_EXECREAD __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \ + _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \ + _PAGE_EXT(_PAGE_EXT_USER_EXEC | \ + _PAGE_EXT_USER_READ)) + +#define PAGE_COPY PAGE_EXECREAD + +#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \ + _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \ + _PAGE_EXT(_PAGE_EXT_USER_READ)) + +#define PAGE_WRITEONLY __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \ + _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \ + _PAGE_EXT(_PAGE_EXT_USER_WRITE)) + +#define PAGE_RWX __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \ + _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \ + _PAGE_EXT(_PAGE_EXT_USER_WRITE | \ + _PAGE_EXT_USER_READ | \ + _PAGE_EXT_USER_EXEC)) + +#define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_CACHABLE | \ + _PAGE_DIRTY | _PAGE_ACCESSED | \ + _PAGE_HW_SHARED | _PAGE_FLAGS_HARD | \ + _PAGE_EXT(_PAGE_EXT_KERN_READ | \ + _PAGE_EXT_KERN_WRITE | \ + _PAGE_EXT_KERN_EXEC)) + +#define PAGE_KERNEL_NOCACHE \ + __pgprot(_PAGE_PRESENT | _PAGE_DIRTY | \ + _PAGE_ACCESSED | _PAGE_HW_SHARED | \ + _PAGE_FLAGS_HARD | \ + _PAGE_EXT(_PAGE_EXT_KERN_READ | \ + _PAGE_EXT_KERN_WRITE | \ + _PAGE_EXT_KERN_EXEC)) + +#define PAGE_KERNEL_RO __pgprot(_PAGE_PRESENT | _PAGE_CACHABLE | \ + _PAGE_DIRTY | _PAGE_ACCESSED | \ + _PAGE_HW_SHARED | _PAGE_FLAGS_HARD | \ + _PAGE_EXT(_PAGE_EXT_KERN_READ | \ + _PAGE_EXT_KERN_EXEC)) + +#define PAGE_KERNEL_PCC(slot, type) \ + __pgprot(_PAGE_PRESENT | _PAGE_DIRTY | \ + _PAGE_ACCESSED | _PAGE_FLAGS_HARD | \ + _PAGE_EXT(_PAGE_EXT_KERN_READ | \ + _PAGE_EXT_KERN_WRITE | \ + _PAGE_EXT_KERN_EXEC) \ + (slot ? _PAGE_PCC_AREA5 : _PAGE_PCC_AREA6) | \ + (type)) + +#elif defined(CONFIG_MMU) /* SH-X TLB */ +#define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_CACHABLE | \ + _PAGE_ACCESSED | _PAGE_FLAGS_HARD) + +#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \ + _PAGE_CACHABLE | _PAGE_ACCESSED | \ + _PAGE_FLAGS_HARD) + +#define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | \ + _PAGE_ACCESSED | _PAGE_FLAGS_HARD) + +#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | \ + _PAGE_ACCESSED | _PAGE_FLAGS_HARD) + +#define PAGE_EXECREAD PAGE_READONLY +#define PAGE_RWX PAGE_SHARED +#define PAGE_WRITEONLY PAGE_SHARED + +#define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_CACHABLE | \ + _PAGE_DIRTY | _PAGE_ACCESSED | \ + _PAGE_HW_SHARED | _PAGE_FLAGS_HARD) + #define PAGE_KERNEL_NOCACHE \ - __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_HW_SHARED | _PAGE_FLAGS_HARD) -#define PAGE_KERNEL_RO __pgprot(_PAGE_PRESENT | _PAGE_CACHABLE | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_HW_SHARED | _PAGE_FLAGS_HARD) + __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | \ + _PAGE_ACCESSED | _PAGE_HW_SHARED | \ + _PAGE_FLAGS_HARD) + +#define PAGE_KERNEL_RO __pgprot(_PAGE_PRESENT | _PAGE_CACHABLE | \ + _PAGE_DIRTY | _PAGE_ACCESSED | \ + _PAGE_HW_SHARED | _PAGE_FLAGS_HARD) + #define PAGE_KERNEL_PCC(slot, type) \ - __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_FLAGS_HARD | (slot ? _PAGE_PCC_AREA5 : _PAGE_PCC_AREA6) | (type)) + __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | \ + _PAGE_ACCESSED | _PAGE_FLAGS_HARD | \ + (slot ? _PAGE_PCC_AREA5 : _PAGE_PCC_AREA6) | \ + (type)) #else /* no mmu */ #define PAGE_NONE __pgprot(0) #define PAGE_SHARED __pgprot(0) #define PAGE_COPY __pgprot(0) +#define PAGE_EXECREAD __pgprot(0) +#define PAGE_RWX __pgprot(0) #define PAGE_READONLY __pgprot(0) +#define PAGE_WRITEONLY __pgprot(0) #define PAGE_KERNEL __pgprot(0) #define PAGE_KERNEL_NOCACHE __pgprot(0) #define PAGE_KERNEL_RO __pgprot(0) @@ -154,27 +323,32 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]; #endif /* __ASSEMBLY__ */ /* - * As i386 and MIPS, SuperH can't do page protection for execute, and - * considers that the same as a read. Also, write permissions imply - * read permissions. This is the closest we can get.. + * SH-X and lower (legacy) SuperH parts (SH-3, SH-4, some SH-4A) can't do page + * protection for execute, and considers it the same as a read. Also, write + * permission implies read permission. This is the closest we can get.. + * + * SH-X2 (SH7785) and later parts take this to the opposite end of the extreme, + * not only supporting separate execute, read, and write bits, but having + * completely separate permission bits for user and kernel space. */ + /*xwr*/ #define __P000 PAGE_NONE #define __P001 PAGE_READONLY #define __P010 PAGE_COPY #define __P011 PAGE_COPY -#define __P100 PAGE_READONLY -#define __P101 PAGE_READONLY +#define __P100 PAGE_EXECREAD +#define __P101 PAGE_EXECREAD #define __P110 PAGE_COPY #define __P111 PAGE_COPY #define __S000 PAGE_NONE #define __S001 PAGE_READONLY -#define __S010 PAGE_SHARED +#define __S010 PAGE_WRITEONLY #define __S011 PAGE_SHARED -#define __S100 PAGE_READONLY -#define __S101 PAGE_READONLY -#define __S110 PAGE_SHARED -#define __S111 PAGE_SHARED +#define __S100 PAGE_EXECREAD +#define __S101 PAGE_EXECREAD +#define __S110 PAGE_RWX +#define __S111 PAGE_RWX #ifndef __ASSEMBLY__ @@ -183,7 +357,17 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]; * within a page table are directly modified. Thus, the following * hook is made available. */ +#ifdef CONFIG_X2TLB +static inline void set_pte(pte_t *ptep, pte_t pte) +{ + ptep->pte_high = pte.pte_high; + smp_wmb(); + ptep->pte_low = pte.pte_low; +} +#else #define set_pte(pteptr, pteval) (*(pteptr) = pteval) +#endif + #define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval) /* @@ -192,18 +376,18 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]; */ #define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval) -#define pte_pfn(x) ((unsigned long)(((x).pte >> PAGE_SHIFT))) +#define pte_pfn(x) ((unsigned long)(((x).pte_low >> PAGE_SHIFT))) #define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot)) #define pfn_pmd(pfn, prot) __pmd(((pfn) << PAGE_SHIFT) | pgprot_val(prot)) #define pte_none(x) (!pte_val(x)) #define pte_present(x) (pte_val(x) & (_PAGE_PRESENT | _PAGE_PROTNONE)) -#define pte_clear(mm,addr,xp) do { set_pte_at(mm, addr, xp, __pte(0)); } while (0) +#define pte_clear(mm,addr,xp) do { set_pte_at(mm, addr, xp, __pte(0)); } while (0) #define pmd_none(x) (!pmd_val(x)) -#define pmd_present(x) (pmd_val(x) & _PAGE_PRESENT) +#define pmd_present(x) (pmd_val(x)) #define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0) -#define pmd_bad(x) ((pmd_val(x) & (~PAGE_MASK & ~_PAGE_USER)) != _KERNPG_TABLE) +#define pmd_bad(x) (pmd_val(x) & ~PAGE_MASK) #define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT)) #define pte_page(x) phys_to_page(pte_val(x)&PTE_PHYS_MASK) @@ -212,28 +396,52 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]; * The following only work if pte_present() is true. * Undefined behaviour if not.. */ -static inline int pte_read(pte_t pte) { return pte_val(pte) & _PAGE_USER; } -static inline int pte_exec(pte_t pte) { return pte_val(pte) & _PAGE_USER; } -static inline int pte_dirty(pte_t pte){ return pte_val(pte) & _PAGE_DIRTY; } -static inline int pte_young(pte_t pte){ return pte_val(pte) & _PAGE_ACCESSED; } -static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; } -static inline int pte_write(pte_t pte){ return pte_val(pte) & _PAGE_RW; } -static inline int pte_not_present(pte_t pte){ return !(pte_val(pte) & _PAGE_PRESENT); } - -static inline pte_t pte_rdprotect(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_USER)); return pte; } -static inline pte_t pte_exprotect(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_USER)); return pte; } -static inline pte_t pte_mkclean(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_DIRTY)); return pte; } -static inline pte_t pte_mkold(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_ACCESSED)); return pte; } -static inline pte_t pte_wrprotect(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_RW)); return pte; } -static inline pte_t pte_mkread(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_USER)); return pte; } -static inline pte_t pte_mkexec(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_USER)); return pte; } -static inline pte_t pte_mkdirty(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_DIRTY)); return pte; } -static inline pte_t pte_mkyoung(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_ACCESSED)); return pte; } -static inline pte_t pte_mkwrite(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_RW)); return pte; } -#ifdef CONFIG_HUGETLB_PAGE -static inline pte_t pte_mkhuge(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_SZHUGE)); return pte; } +#define pte_not_present(pte) (!(pte_val(pte) & _PAGE_PRESENT)) +#define pte_dirty(pte) (pte_val(pte) & _PAGE_DIRTY) +#define pte_young(pte) (pte_val(pte) & _PAGE_ACCESSED) +#define pte_file(pte) (pte_val(pte) & _PAGE_FILE) + +#ifdef CONFIG_X2TLB +#define pte_read(pte) ((pte).pte_high & _PAGE_EXT_USER_READ) +#define pte_exec(pte) ((pte).pte_high & _PAGE_EXT_USER_EXEC) +#define pte_write(pte) ((pte).pte_high & _PAGE_EXT_USER_WRITE) +#else +#define pte_read(pte) (pte_val(pte) & _PAGE_USER) +#define pte_exec(pte) (pte_val(pte) & _PAGE_USER) +#define pte_write(pte) (pte_val(pte) & _PAGE_RW) +#endif + +#define PTE_BIT_FUNC(h,fn,op) \ +static inline pte_t pte_##fn(pte_t pte) { pte.pte_##h op; return pte; } + +#ifdef CONFIG_X2TLB +/* + * We cheat a bit in the SH-X2 TLB case. As the permission bits are + * individually toggled (and user permissions are entirely decoupled from + * kernel permissions), we attempt to couple them a bit more sanely here. + */ +PTE_BIT_FUNC(high, rdprotect, &= ~_PAGE_EXT_USER_READ); +PTE_BIT_FUNC(high, mkread, |= _PAGE_EXT_USER_READ | _PAGE_EXT_KERN_READ); +PTE_BIT_FUNC(high, wrprotect, &= ~_PAGE_EXT_USER_WRITE); +PTE_BIT_FUNC(high, mkwrite, |= _PAGE_EXT_USER_WRITE | _PAGE_EXT_KERN_WRITE); +PTE_BIT_FUNC(high, exprotect, &= ~_PAGE_EXT_USER_EXEC); +PTE_BIT_FUNC(high, mkexec, |= _PAGE_EXT_USER_EXEC | _PAGE_EXT_KERN_EXEC); +PTE_BIT_FUNC(high, mkhuge, |= _PAGE_SZHUGE); +#else +PTE_BIT_FUNC(low, rdprotect, &= ~_PAGE_USER); +PTE_BIT_FUNC(low, mkread, |= _PAGE_USER); +PTE_BIT_FUNC(low, wrprotect, &= ~_PAGE_RW); +PTE_BIT_FUNC(low, mkwrite, |= _PAGE_RW); +PTE_BIT_FUNC(low, exprotect, &= ~_PAGE_USER); +PTE_BIT_FUNC(low, mkexec, |= _PAGE_USER); +PTE_BIT_FUNC(low, mkhuge, |= _PAGE_SZHUGE); #endif +PTE_BIT_FUNC(low, mkclean, &= ~_PAGE_DIRTY); +PTE_BIT_FUNC(low, mkdirty, |= _PAGE_DIRTY); +PTE_BIT_FUNC(low, mkold, &= ~_PAGE_ACCESSED); +PTE_BIT_FUNC(low, mkyoung, |= _PAGE_ACCESSED); + /* * Macro and implementation to make a page protection as uncachable. */ @@ -258,13 +466,14 @@ static inline pgprot_t pgprot_noncached(pgprot_t _prot) #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot)) static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) -{ set_pte(&pte, __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot))); return pte; } - -#define pmd_page_vaddr(pmd) \ -((unsigned long) __va(pmd_val(pmd) & PAGE_MASK)) +{ + set_pte(&pte, __pte((pte_val(pte) & _PAGE_CHG_MASK) | + pgprot_val(newprot))); + return pte; +} -#define pmd_page(pmd) \ - (phys_to_page(pmd_val(pmd))) +#define pmd_page_vaddr(pmd) pmd_val(pmd) +#define pmd_page(pmd) (virt_to_page(pmd_val(pmd))) /* to find an entry in a page-table-directory. */ #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1)) @@ -283,8 +492,15 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) #define pte_unmap(pte) do { } while (0) #define pte_unmap_nested(pte) do { } while (0) +#ifdef CONFIG_X2TLB +#define pte_ERROR(e) \ + printk("%s:%d: bad pte %p(%08lx%08lx).\n", __FILE__, __LINE__, \ + &(e), (e).pte_high, (e).pte_low) +#else #define pte_ERROR(e) \ printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e)) +#endif + #define pgd_ERROR(e) \ printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e)) @@ -292,16 +508,50 @@ struct vm_area_struct; extern void update_mmu_cache(struct vm_area_struct * vma, unsigned long address, pte_t pte); -/* Encode and de-code a swap entry */ /* + * Encode and de-code a swap entry + * + * Constraints: + * _PAGE_FILE at bit 0 + * _PAGE_PRESENT at bit 8 + * _PAGE_PROTNONE at bit 9 + * + * For the normal case, we encode the swap type into bits 0:7 and the + * swap offset into bits 10:30. For the 64-bit PTE case, we keep the + * preserved bits in the low 32-bits and use the upper 32 as the swap + * offset (along with a 5-bit type), following the same approach as x86 + * PAE. This keeps the logic quite simple, and allows for a full 32 + * PTE_FILE_MAX_BITS, as opposed to the 29-bits we're constrained with + * in the pte_low case. + * + * As is evident by the Alpha code, if we ever get a 64-bit unsigned + * long (swp_entry_t) to match up with the 64-bit PTEs, this all becomes + * much cleaner.. + * * NOTE: We should set ZEROs at the position of _PAGE_PRESENT * and _PAGE_PROTNONE bits */ -#define __swp_type(x) ((x).val & 0xff) -#define __swp_offset(x) ((x).val >> 10) -#define __swp_entry(type, offset) ((swp_entry_t) { (type) | ((offset) << 10) }) -#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) >> 1 }) -#define __swp_entry_to_pte(x) ((pte_t) { (x).val << 1 }) +#ifdef CONFIG_X2TLB +#define __swp_type(x) ((x).val & 0x1f) +#define __swp_offset(x) ((x).val >> 5) +#define __swp_entry(type, offset) ((swp_entry_t){ (type) | (offset) << 5}) +#define __pte_to_swp_entry(pte) ((swp_entry_t){ (pte).pte_high }) +#define __swp_entry_to_pte(x) ((pte_t){ 0, (x).val }) + +/* + * Encode and decode a nonlinear file mapping entry + */ +#define pte_to_pgoff(pte) ((pte).pte_high) +#define pgoff_to_pte(off) ((pte_t) { _PAGE_FILE, (off) }) + +#define PTE_FILE_MAX_BITS 32 +#else +#define __swp_type(x) ((x).val & 0xff) +#define __swp_offset(x) ((x).val >> 10) +#define __swp_entry(type, offset) ((swp_entry_t){(type) | (offset) <<10}) + +#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) >> 1 }) +#define __swp_entry_to_pte(x) ((pte_t) { (x).val << 1 }) /* * Encode and decode a nonlinear file mapping entry @@ -309,6 +559,7 @@ extern void update_mmu_cache(struct vm_area_struct * vma, #define PTE_FILE_MAX_BITS 29 #define pte_to_pgoff(pte) (pte_val(pte) >> 1) #define pgoff_to_pte(off) ((pte_t) { ((off) << 1) | _PAGE_FILE }) +#endif typedef pte_t *pte_addr_t; @@ -337,6 +588,9 @@ extern unsigned int kobjsize(const void *objp); extern pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep); #endif +extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; +extern void paging_init(void); + #include <asm-generic/pgtable.h> #endif /* !__ASSEMBLY__ */ diff --git a/include/asm-sh/processor.h b/include/asm-sh/processor.h index 45bb74e35d3..e29f2abb92d 100644 --- a/include/asm-sh/processor.h +++ b/include/asm-sh/processor.h @@ -27,6 +27,8 @@ #define CCN_CVR 0xff000040 #define CCN_PRR 0xff000044 +const char *get_cpu_subtype(void); + /* * CPU type and hardware bug flags. Kept separately for each CPU. * @@ -36,7 +38,10 @@ */ enum cpu_type { /* SH-2 types */ - CPU_SH7604, + CPU_SH7604, CPU_SH7619, + + /* SH-2A types */ + CPU_SH7206, /* SH-3 types */ CPU_SH7705, CPU_SH7706, CPU_SH7707, @@ -47,7 +52,12 @@ enum cpu_type { /* SH-4 types */ CPU_SH7750, CPU_SH7750S, CPU_SH7750R, CPU_SH7751, CPU_SH7751R, CPU_SH7760, CPU_ST40RA, CPU_ST40GX1, CPU_SH4_202, CPU_SH4_501, - CPU_SH73180, CPU_SH7343, CPU_SH7770, CPU_SH7780, CPU_SH7781, + + /* SH-4A types */ + CPU_SH7770, CPU_SH7780, CPU_SH7781, CPU_SH7785, + + /* SH4AL-DSP types */ + CPU_SH73180, CPU_SH7343, CPU_SH7722, /* Unknown subtype */ CPU_SH_NONE @@ -130,12 +140,11 @@ union sh_fpu_union { }; struct thread_struct { + /* Saved registers when thread is descheduled */ unsigned long sp; unsigned long pc; - unsigned long trap_no, error_code; - unsigned long address; - /* Hardware debugging registers may come here */ + /* Hardware debugging registers */ unsigned long ubc_pc; /* floating point info */ @@ -150,12 +159,7 @@ typedef struct { extern int ubc_usercnt; #define INIT_THREAD { \ - sizeof(init_stack) + (long) &init_stack, /* sp */ \ - 0, /* pc */ \ - 0, 0, \ - 0, \ - 0, \ - {{{0,}},} /* fpu state */ \ + .sp = sizeof(init_stack) + (long) &init_stack, \ } /* @@ -259,8 +263,8 @@ void show_trace(struct task_struct *tsk, unsigned long *sp, struct pt_regs *regs); extern unsigned long get_wchan(struct task_struct *p); -#define KSTK_EIP(tsk) ((tsk)->thread.pc) -#define KSTK_ESP(tsk) ((tsk)->thread.sp) +#define KSTK_EIP(tsk) (task_pt_regs(tsk)->pc) +#define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[15]) #define cpu_sleep() __asm__ __volatile__ ("sleep" : : : "memory") #define cpu_relax() barrier() diff --git a/include/asm-sh/push-switch.h b/include/asm-sh/push-switch.h new file mode 100644 index 00000000000..4903f9e52dd --- /dev/null +++ b/include/asm-sh/push-switch.h @@ -0,0 +1,31 @@ +#ifndef __ASM_SH_PUSH_SWITCH_H +#define __ASM_SH_PUSH_SWITCH_H + +#include <linux/timer.h> +#include <linux/interrupt.h> +#include <linux/workqueue.h> +#include <linux/platform_device.h> + +struct push_switch { + /* switch state */ + unsigned int state:1; + /* debounce timer */ + struct timer_list debounce; + /* workqueue */ + struct work_struct work; + /* platform device, for workqueue handler */ + struct platform_device *pdev; +}; + +struct push_switch_platform_info { + /* IRQ handler */ + irqreturn_t (*irq_handler)(int irq, void *data); + /* Special IRQ flags */ + unsigned int irq_flags; + /* Bit location of switch */ + unsigned int bit; + /* Symbolic switch name */ + const char *name; +}; + +#endif /* __ASM_SH_PUSH_SWITCH_H */ diff --git a/include/asm-sh/rwsem.h b/include/asm-sh/rwsem.h index 9d2aea5e848..4931ba817d7 100644 --- a/include/asm-sh/rwsem.h +++ b/include/asm-sh/rwsem.h @@ -25,11 +25,21 @@ struct rw_semaphore { #define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS) spinlock_t wait_lock; struct list_head wait_list; +#ifdef CONFIG_DEBUG_LOCK_ALLOC + struct lockdep_map dep_map; +#endif }; +#ifdef CONFIG_DEBUG_LOCK_ALLOC +# define __RWSEM_DEP_MAP_INIT(lockname) , .dep_map = { .name = #lockname } +#else +# define __RWSEM_DEP_MAP_INIT(lockname) +#endif + #define __RWSEM_INITIALIZER(name) \ { RWSEM_UNLOCKED_VALUE, SPIN_LOCK_UNLOCKED, \ - LIST_HEAD_INIT((name).wait_list) } + LIST_HEAD_INIT((name).wait_list) \ + __RWSEM_DEP_MAP_INIT(name) } #define DECLARE_RWSEM(name) \ struct rw_semaphore name = __RWSEM_INITIALIZER(name) @@ -39,6 +49,16 @@ extern struct rw_semaphore *rwsem_down_write_failed(struct rw_semaphore *sem); extern struct rw_semaphore *rwsem_wake(struct rw_semaphore *sem); extern struct rw_semaphore *rwsem_downgrade_wake(struct rw_semaphore *sem); +extern void __init_rwsem(struct rw_semaphore *sem, const char *name, + struct lock_class_key *key); + +#define init_rwsem(sem) \ +do { \ + static struct lock_class_key __key; \ + \ + __init_rwsem((sem), #sem, &__key); \ +} while (0) + static inline void init_rwsem(struct rw_semaphore *sem) { sem->count = RWSEM_UNLOCKED_VALUE; @@ -141,6 +161,11 @@ static inline void __downgrade_write(struct rw_semaphore *sem) rwsem_downgrade_wake(sem); } +static inline void __down_write_nested(struct rw_semaphore *sem, int subclass) +{ + __down_write(sem); +} + /* * implement exchange and add functionality */ diff --git a/include/asm-sh/se7206.h b/include/asm-sh/se7206.h new file mode 100644 index 00000000000..698eb80389a --- /dev/null +++ b/include/asm-sh/se7206.h @@ -0,0 +1,13 @@ +#ifndef __ASM_SH_SE7206_H +#define __ASM_SH_SE7206_H + +#define PA_SMSC 0x30000000 +#define PA_MRSHPC 0x34000000 +#define PA_LED 0x31400000 + +void init_se7206_IRQ(void); + +#define __IO_PREFIX se7206 +#include <asm/io_generic.h> + +#endif /* __ASM_SH_SE7206_H */ diff --git a/include/asm-sh/setup.h b/include/asm-sh/setup.h index 34ca8a7f06b..1583c6b7bda 100644 --- a/include/asm-sh/setup.h +++ b/include/asm-sh/setup.h @@ -1,10 +1,12 @@ -#ifdef __KERNEL__ #ifndef _SH_SETUP_H #define _SH_SETUP_H #define COMMAND_LINE_SIZE 256 +#ifdef __KERNEL__ + int setup_early_printk(char *); -#endif /* _SH_SETUP_H */ #endif /* __KERNEL__ */ + +#endif /* _SH_SETUP_H */ diff --git a/include/asm-sh/system.h b/include/asm-sh/system.h index 3340126f4e0..b1e42e7f998 100644 --- a/include/asm-sh/system.h +++ b/include/asm-sh/system.h @@ -6,6 +6,7 @@ * Copyright (C) 2002 Paul Mundt */ +#include <linux/irqflags.h> #include <asm/types.h> /* @@ -131,103 +132,6 @@ static inline unsigned long tas(volatile int *m) #define set_mb(var, value) do { xchg(&var, value); } while (0) -/* Interrupt Control */ -#ifdef CONFIG_CPU_HAS_SR_RB -static inline void local_irq_enable(void) -{ - unsigned long __dummy0, __dummy1; - - __asm__ __volatile__("stc sr, %0\n\t" - "and %1, %0\n\t" - "stc r6_bank, %1\n\t" - "or %1, %0\n\t" - "ldc %0, sr" - : "=&r" (__dummy0), "=r" (__dummy1) - : "1" (~0x000000f0) - : "memory"); -} -#else -static inline void local_irq_enable(void) -{ - unsigned long __dummy0, __dummy1; - - __asm__ __volatile__ ( - "stc sr, %0\n\t" - "and %1, %0\n\t" - "ldc %0, sr\n\t" - : "=&r" (__dummy0), "=r" (__dummy1) - : "1" (~0x000000f0) - : "memory"); -} -#endif - -static inline void local_irq_disable(void) -{ - unsigned long __dummy; - __asm__ __volatile__("stc sr, %0\n\t" - "or #0xf0, %0\n\t" - "ldc %0, sr" - : "=&z" (__dummy) - : /* no inputs */ - : "memory"); -} - -static inline void set_bl_bit(void) -{ - unsigned long __dummy0, __dummy1; - - __asm__ __volatile__ ("stc sr, %0\n\t" - "or %2, %0\n\t" - "and %3, %0\n\t" - "ldc %0, sr" - : "=&r" (__dummy0), "=r" (__dummy1) - : "r" (0x10000000), "r" (0xffffff0f) - : "memory"); -} - -static inline void clear_bl_bit(void) -{ - unsigned long __dummy0, __dummy1; - - __asm__ __volatile__ ("stc sr, %0\n\t" - "and %2, %0\n\t" - "ldc %0, sr" - : "=&r" (__dummy0), "=r" (__dummy1) - : "1" (~0x10000000) - : "memory"); -} - -#define local_save_flags(x) \ - __asm__("stc sr, %0; and #0xf0, %0" : "=&z" (x) :/**/: "memory" ) - -#define irqs_disabled() \ -({ \ - unsigned long flags; \ - local_save_flags(flags); \ - (flags != 0); \ -}) - -static inline unsigned long local_irq_save(void) -{ - unsigned long flags, __dummy; - - __asm__ __volatile__("stc sr, %1\n\t" - "mov %1, %0\n\t" - "or #0xf0, %0\n\t" - "ldc %0, sr\n\t" - "mov %1, %0\n\t" - "and #0xf0, %0" - : "=&z" (flags), "=&r" (__dummy) - :/**/ - : "memory" ); - return flags; -} - -#define local_irq_restore(x) do { \ - if ((x & 0x000000f0) != 0x000000f0) \ - local_irq_enable(); \ -} while (0) - /* * Jump to P2 area. * When handling TLB or caches, we need to do it from P2 area. @@ -264,9 +168,6 @@ do { \ : "=&r" (__dummy)); \ } while (0) -/* For spinlocks etc */ -#define local_irq_save(x) x = local_irq_save() - static inline unsigned long xchg_u32(volatile u32 *m, unsigned long val) { unsigned long flags, retval; diff --git a/include/asm-sh/termbits.h b/include/asm-sh/termbits.h index 4f9822a8e7b..f1b7b46f4e9 100644 --- a/include/asm-sh/termbits.h +++ b/include/asm-sh/termbits.h @@ -17,6 +17,17 @@ struct termios { cc_t c_cc[NCCS]; /* control characters */ }; +struct ktermios { + tcflag_t c_iflag; /* input mode flags */ + tcflag_t c_oflag; /* output mode flags */ + tcflag_t c_cflag; /* control mode flags */ + tcflag_t c_lflag; /* local mode flags */ + cc_t c_line; /* line discipline */ + cc_t c_cc[NCCS]; /* control characters */ + speed_t c_ispeed; /* input speed */ + speed_t c_ospeed; /* output speed */ +}; + /* c_cc characters */ #define VINTR 0 #define VQUIT 1 diff --git a/include/asm-sh/thread_info.h b/include/asm-sh/thread_info.h index 3ebc3f9039e..879f741105d 100644 --- a/include/asm-sh/thread_info.h +++ b/include/asm-sh/thread_info.h @@ -90,13 +90,7 @@ static inline struct thread_info *current_thread_info(void) #endif #define free_thread_info(ti) kfree(ti) -#else /* !__ASSEMBLY__ */ - -/* how to get the thread information struct from ASM */ -#define GET_THREAD_INFO(reg) \ - stc r7_bank, reg - -#endif +#endif /* __ASSEMBLY__ */ /* * thread information flags @@ -112,6 +106,7 @@ static inline struct thread_info *current_thread_info(void) #define TIF_USEDFPU 16 /* FPU was used by this task this quantum (SMP) */ #define TIF_POLLING_NRFLAG 17 /* true if poll_idle() is polling TIF_NEED_RESCHED */ #define TIF_MEMDIE 18 +#define TIF_FREEZE 19 #define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) #define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME) @@ -120,6 +115,7 @@ static inline struct thread_info *current_thread_info(void) #define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK) #define _TIF_USEDFPU (1<<TIF_USEDFPU) #define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) +#define _TIF_FREEZE (1<<TIF_FREEZE) #define _TIF_WORK_MASK 0x000000FE /* work to do on interrupt/exception return */ #define _TIF_ALLWORK_MASK 0x000000FF /* work to do on any return to u-space */ diff --git a/include/asm-sh/timer.h b/include/asm-sh/timer.h index 5df842bcf7b..17b5e76a4c3 100644 --- a/include/asm-sh/timer.h +++ b/include/asm-sh/timer.h @@ -18,11 +18,32 @@ struct sys_timer { struct sys_device dev; struct sys_timer_ops *ops; + +#ifdef CONFIG_NO_IDLE_HZ + struct dyn_tick_timer *dyn_tick; +#endif }; +#ifdef CONFIG_NO_IDLE_HZ +#define DYN_TICK_ENABLED (1 << 1) + +struct dyn_tick_timer { + spinlock_t lock; + unsigned int state; /* Current state */ + int (*enable)(void); /* Enables dynamic tick */ + int (*disable)(void); /* Disables dynamic tick */ + void (*reprogram)(unsigned long); /* Reprograms the timer */ + int (*handler)(int, void *); +}; + +void timer_dyn_reprogram(void); +#else +#define timer_dyn_reprogram() do { } while (0) +#endif + #define TICK_SIZE (tick_nsec / 1000) -extern struct sys_timer tmu_timer; +extern struct sys_timer tmu_timer, cmt_timer, mtu2_timer; extern struct sys_timer *sys_timer; #ifndef CONFIG_GENERIC_TIME diff --git a/include/asm-sh/titan.h b/include/asm-sh/titan.h index 270a4f4bc8a..03f3583c891 100644 --- a/include/asm-sh/titan.h +++ b/include/asm-sh/titan.h @@ -1,9 +1,8 @@ /* * Platform defintions for Titan */ - -#ifndef _ASM_SH_TITAN_TITAN_H -#define _ASM_SH_TITAN_TITAN_H +#ifndef _ASM_SH_TITAN_H +#define _ASM_SH_TITAN_H #define __IO_PREFIX titan #include <asm/io_generic.h> @@ -15,29 +14,4 @@ #define TITAN_IRQ_MPCIB 11 /* mPCI B */ #define TITAN_IRQ_USB 11 /* USB */ -/* - * The external interrupt lines, these take up ints 0 - 15 inclusive - * depending on the priority for the interrupt. In fact the priority - * is the interrupt :-) - */ -#define IRL0_IRQ 0 -#define IRL0_IPR_ADDR INTC_IPRD -#define IRL0_IPR_POS 3 -#define IRL0_PRIORITY 8 - -#define IRL1_IRQ 1 -#define IRL1_IPR_ADDR INTC_IPRD -#define IRL1_IPR_POS 2 -#define IRL1_PRIORITY 8 - -#define IRL2_IRQ 2 -#define IRL2_IPR_ADDR INTC_IPRD -#define IRL2_IPR_POS 1 -#define IRL2_PRIORITY 8 - -#define IRL3_IRQ 3 -#define IRL3_IPR_ADDR INTC_IPRD -#define IRL3_IPR_POS 0 -#define IRL3_PRIORITY 8 - -#endif +#endif /* __ASM_SH_TITAN_H */ diff --git a/include/asm-sh/types.h b/include/asm-sh/types.h index 3c09dd4ca31..fd00dbb82f8 100644 --- a/include/asm-sh/types.h +++ b/include/asm-sh/types.h @@ -52,16 +52,6 @@ typedef unsigned long long u64; typedef u32 dma_addr_t; -#ifdef CONFIG_LBD -typedef u64 sector_t; -#define HAVE_SECTOR_T -#endif - -#ifdef CONFIG_LSF -typedef u64 blkcnt_t; -#define HAVE_BLKCNT_T -#endif - #endif /* __ASSEMBLY__ */ #endif /* __KERNEL__ */ diff --git a/include/asm-sh/unistd.h b/include/asm-sh/unistd.h index 1c2abde122c..f982073dc6c 100644 --- a/include/asm-sh/unistd.h +++ b/include/asm-sh/unistd.h @@ -332,125 +332,6 @@ #ifdef __KERNEL__ -#include <linux/err.h> - -/* user-visible error numbers are in the range -1 - -MAX_ERRNO: - * see <asm-sh/errno.h> */ - -#define __syscall_return(type, res) \ -do { \ - if ((unsigned long)(res) >= (unsigned long)(-MAX_ERRNO)) { \ - /* Avoid using "res" which is declared to be in register r0; \ - errno might expand to a function call and clobber it. */ \ - int __err = -(res); \ - errno = __err; \ - res = -1; \ - } \ - return (type) (res); \ -} while (0) - -/* XXX - _foo needs to be __foo, while __NR_bar could be _NR_bar. */ -#define _syscall0(type,name) \ -type name(void) \ -{ \ -register long __sc0 __asm__ ("r3") = __NR_##name; \ -__asm__ __volatile__ ("trapa #0x10" \ - : "=z" (__sc0) \ - : "0" (__sc0) \ - : "memory" ); \ -__syscall_return(type,__sc0); \ -} - -#define _syscall1(type,name,type1,arg1) \ -type name(type1 arg1) \ -{ \ -register long __sc0 __asm__ ("r3") = __NR_##name; \ -register long __sc4 __asm__ ("r4") = (long) arg1; \ -__asm__ __volatile__ ("trapa #0x11" \ - : "=z" (__sc0) \ - : "0" (__sc0), "r" (__sc4) \ - : "memory"); \ -__syscall_return(type,__sc0); \ -} - -#define _syscall2(type,name,type1,arg1,type2,arg2) \ -type name(type1 arg1,type2 arg2) \ -{ \ -register long __sc0 __asm__ ("r3") = __NR_##name; \ -register long __sc4 __asm__ ("r4") = (long) arg1; \ -register long __sc5 __asm__ ("r5") = (long) arg2; \ -__asm__ __volatile__ ("trapa #0x12" \ - : "=z" (__sc0) \ - : "0" (__sc0), "r" (__sc4), "r" (__sc5) \ - : "memory"); \ -__syscall_return(type,__sc0); \ -} - -#define _syscall3(type,name,type1,arg1,type2,arg2,type3,arg3) \ -type name(type1 arg1,type2 arg2,type3 arg3) \ -{ \ -register long __sc0 __asm__ ("r3") = __NR_##name; \ -register long __sc4 __asm__ ("r4") = (long) arg1; \ -register long __sc5 __asm__ ("r5") = (long) arg2; \ -register long __sc6 __asm__ ("r6") = (long) arg3; \ -__asm__ __volatile__ ("trapa #0x13" \ - : "=z" (__sc0) \ - : "0" (__sc0), "r" (__sc4), "r" (__sc5), "r" (__sc6) \ - : "memory"); \ -__syscall_return(type,__sc0); \ -} - -#define _syscall4(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4) \ -type name (type1 arg1, type2 arg2, type3 arg3, type4 arg4) \ -{ \ -register long __sc0 __asm__ ("r3") = __NR_##name; \ -register long __sc4 __asm__ ("r4") = (long) arg1; \ -register long __sc5 __asm__ ("r5") = (long) arg2; \ -register long __sc6 __asm__ ("r6") = (long) arg3; \ -register long __sc7 __asm__ ("r7") = (long) arg4; \ -__asm__ __volatile__ ("trapa #0x14" \ - : "=z" (__sc0) \ - : "0" (__sc0), "r" (__sc4), "r" (__sc5), "r" (__sc6), \ - "r" (__sc7) \ - : "memory" ); \ -__syscall_return(type,__sc0); \ -} - -#define _syscall5(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5) \ -type name (type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) \ -{ \ -register long __sc3 __asm__ ("r3") = __NR_##name; \ -register long __sc4 __asm__ ("r4") = (long) arg1; \ -register long __sc5 __asm__ ("r5") = (long) arg2; \ -register long __sc6 __asm__ ("r6") = (long) arg3; \ -register long __sc7 __asm__ ("r7") = (long) arg4; \ -register long __sc0 __asm__ ("r0") = (long) arg5; \ -__asm__ __volatile__ ("trapa #0x15" \ - : "=z" (__sc0) \ - : "0" (__sc0), "r" (__sc4), "r" (__sc5), "r" (__sc6), "r" (__sc7), \ - "r" (__sc3) \ - : "memory" ); \ -__syscall_return(type,__sc0); \ -} - -#define _syscall6(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5,type6,arg6) \ -type name (type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5, type6 arg6) \ -{ \ -register long __sc3 __asm__ ("r3") = __NR_##name; \ -register long __sc4 __asm__ ("r4") = (long) arg1; \ -register long __sc5 __asm__ ("r5") = (long) arg2; \ -register long __sc6 __asm__ ("r6") = (long) arg3; \ -register long __sc7 __asm__ ("r7") = (long) arg4; \ -register long __sc0 __asm__ ("r0") = (long) arg5; \ -register long __sc1 __asm__ ("r1") = (long) arg6; \ -__asm__ __volatile__ ("trapa #0x16" \ - : "=z" (__sc0) \ - : "0" (__sc0), "r" (__sc4), "r" (__sc5), "r" (__sc6), "r" (__sc7), \ - "r" (__sc3), "r" (__sc1) \ - : "memory" ); \ -__syscall_return(type,__sc0); \ -} - #define __ARCH_WANT_IPC_PARSE_VERSION #define __ARCH_WANT_OLD_READDIR #define __ARCH_WANT_OLD_STAT diff --git a/include/asm-sh64/cacheflush.h b/include/asm-sh64/cacheflush.h index 55f71aa0aa6..1e53a47bdc9 100644 --- a/include/asm-sh64/cacheflush.h +++ b/include/asm-sh64/cacheflush.h @@ -21,6 +21,8 @@ extern void flush_icache_user_range(struct vm_area_struct *vma, struct page *page, unsigned long addr, int len); +#define flush_cache_dup_mm(mm) flush_cache_mm(mm) + #define flush_dcache_mmap_lock(mapping) do { } while (0) #define flush_dcache_mmap_unlock(mapping) do { } while (0) diff --git a/include/asm-sh64/checksum.h b/include/asm-sh64/checksum.h index fd034e9ae6e..ba594ccb42e 100644 --- a/include/asm-sh64/checksum.h +++ b/include/asm-sh64/checksum.h @@ -26,8 +26,7 @@ * * it's best to have buff aligned on a 32-bit boundary */ -asmlinkage unsigned int csum_partial(const unsigned char *buff, int len, - unsigned int sum); +asmlinkage __wsum csum_partial(const void *buff, int len, __wsum sum); /* * Note: when you get a NULL pointer exception here this means someone @@ -38,46 +37,34 @@ asmlinkage unsigned int csum_partial(const unsigned char *buff, int len, */ -unsigned int csum_partial_copy_nocheck(const char *src, char *dst, int len, - unsigned int sum); +__wsum csum_partial_copy_nocheck(const void *src, void *dst, int len, + __wsum sum); -unsigned int csum_partial_copy_from_user(const char *src, char *dst, - int len, int sum, int *err_ptr); +__wsum csum_partial_copy_from_user(const void __user *src, void *dst, + int len, __wsum sum, int *err_ptr); -/* - * These are the old (and unsafe) way of doing checksums, a warning message will be - * printed if they are used and an exeption occurs. - * - * these functions should go away after some time. - */ - -#define csum_partial_copy_fromuser csum_partial_copy - -unsigned int csum_partial_copy(const char *src, char *dst, int len, - unsigned int sum); - -static inline unsigned short csum_fold(unsigned int sum) +static inline __sum16 csum_fold(__wsum csum) { + u32 sum = (__force u32)csum; sum = (sum & 0xffff) + (sum >> 16); sum = (sum & 0xffff) + (sum >> 16); - return ~(sum); + return (__force __sum16)~sum; } -unsigned short ip_fast_csum(unsigned char * iph, unsigned int ihl); +__sum16 ip_fast_csum(const void *iph, unsigned int ihl); -unsigned long csum_tcpudp_nofold(unsigned long saddr, unsigned long daddr, +__wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len, unsigned short proto, - unsigned int sum); + __wsum sum); /* * computes the checksum of the TCP/UDP pseudo-header * returns a 16-bit checksum, already complemented */ -static inline unsigned short int csum_tcpudp_magic(unsigned long saddr, - unsigned long daddr, +static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr, unsigned short len, unsigned short proto, - unsigned int sum) + __wsum sum) { return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum)); } @@ -86,7 +73,7 @@ static inline unsigned short int csum_tcpudp_magic(unsigned long saddr, * this routine is used for miscellaneous IP-like checksums, mainly * in icmp.c */ -static inline unsigned short ip_compute_csum(unsigned char * buff, int len) +static inline __sum16 ip_compute_csum(const void *buff, int len) { return csum_fold(csum_partial(buff, len, 0)); } diff --git a/include/asm-sh64/device.h b/include/asm-sh64/device.h new file mode 100644 index 00000000000..d8f9872b0e2 --- /dev/null +++ b/include/asm-sh64/device.h @@ -0,0 +1,7 @@ +/* + * Arch specific extensions to struct device + * + * This file is released under the GPLv2 + */ +#include <asm-generic/device.h> + diff --git a/include/asm-sh64/dma-mapping.h b/include/asm-sh64/dma-mapping.h index 68e27a8fca3..5efe906c59f 100644 --- a/include/asm-sh64/dma-mapping.h +++ b/include/asm-sh64/dma-mapping.h @@ -35,7 +35,7 @@ static inline void dma_free_coherent(struct device *dev, size_t size, consistent_free(NULL, size, vaddr, dma_handle); } -static inline void dma_cache_sync(void *vaddr, size_t size, +static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size, enum dma_data_direction dir) { dma_cache_wback_inv((unsigned long)vaddr, size); diff --git a/include/asm-sh64/pgalloc.h b/include/asm-sh64/pgalloc.h index b29dd468817..cb803e56cb6 100644 --- a/include/asm-sh64/pgalloc.h +++ b/include/asm-sh64/pgalloc.h @@ -41,7 +41,7 @@ static inline void pgd_init(unsigned long page) static inline pgd_t *get_pgd_slow(void) { unsigned int pgd_size = (USER_PTRS_PER_PGD * sizeof(pgd_t)); - pgd_t *ret = (pgd_t *)kmalloc(pgd_size, GFP_KERNEL); + pgd_t *ret = kmalloc(pgd_size, GFP_KERNEL); return ret; } diff --git a/include/asm-sh64/setup.h b/include/asm-sh64/setup.h index ebd42eb1b70..5b07b14c292 100644 --- a/include/asm-sh64/setup.h +++ b/include/asm-sh64/setup.h @@ -1,6 +1,10 @@ #ifndef __ASM_SH64_SETUP_H #define __ASM_SH64_SETUP_H +#define COMMAND_LINE_SIZE 256 + +#ifdef __KERNEL__ + #define PARAM ((unsigned char *)empty_zero_page) #define MOUNT_ROOT_RDONLY (*(unsigned long *) (PARAM+0x000)) #define RAMDISK_FLAGS (*(unsigned long *) (PARAM+0x004)) @@ -12,5 +16,7 @@ #define COMMAND_LINE ((char *) (PARAM+256)) #define COMMAND_LINE_SIZE 256 +#endif /* __KERNEL__ */ + #endif /* __ASM_SH64_SETUP_H */ diff --git a/include/asm-sh64/unistd.h b/include/asm-sh64/unistd.h index ee7828b27ad..1f38a7aacaa 100644 --- a/include/asm-sh64/unistd.h +++ b/include/asm-sh64/unistd.h @@ -347,148 +347,6 @@ #ifdef __KERNEL__ #define NR_syscalls 321 -#include <linux/err.h> - -/* user-visible error numbers are in the range -1 - -MAX_ERRNO: - * see <asm-sh64/errno.h> */ - -#define __syscall_return(type, res) \ -do { \ - /* Note: when returning from kernel the return value is in r9 \ - ** This prevents conflicts between return value and arg1 \ - ** when dispatching signal handler, in other words makes \ - ** life easier in the system call epilogue (see entry.S) \ - */ \ - register unsigned long __sr2 __asm__ ("r2") = res; \ - if ((unsigned long)(res) >= (unsigned long)(-MAX_ERRNO)) { \ - errno = -(res); \ - __sr2 = -1; \ - } \ - return (type) (__sr2); \ -} while (0) - -/* XXX - _foo needs to be __foo, while __NR_bar could be _NR_bar. */ - -#define _syscall0(type,name) \ -type name(void) \ -{ \ -register unsigned long __sc0 __asm__ ("r9") = ((0x10 << 16) | __NR_##name); \ -__asm__ __volatile__ ("trapa %1 !\t\t\t" #name "()" \ - : "=r" (__sc0) \ - : "r" (__sc0) ); \ -__syscall_return(type,__sc0); \ -} - - /* - * The apparent spurious "dummy" assembler comment is *needed*, - * as without it, the compiler treats the arg<n> variables - * as no longer live just before the asm. The compiler can - * then optimize the storage into any registers it wishes. - * The additional dummy statement forces the compiler to put - * the arguments into the correct registers before the TRAPA. - */ -#define _syscall1(type,name,type1,arg1) \ -type name(type1 arg1) \ -{ \ -register unsigned long __sc0 __asm__ ("r9") = ((0x11 << 16) | __NR_##name); \ -register unsigned long __sc2 __asm__ ("r2") = (unsigned long) arg1; \ -__asm__ __volatile__ ("trapa %1 !\t\t\t" #name "(%2)" \ - : "=r" (__sc0) \ - : "r" (__sc0), "r" (__sc2)); \ -__asm__ __volatile__ ("!dummy %0 %1" \ - : \ - : "r" (__sc0), "r" (__sc2)); \ -__syscall_return(type,__sc0); \ -} - -#define _syscall2(type,name,type1,arg1,type2,arg2) \ -type name(type1 arg1,type2 arg2) \ -{ \ -register unsigned long __sc0 __asm__ ("r9") = ((0x12 << 16) | __NR_##name); \ -register unsigned long __sc2 __asm__ ("r2") = (unsigned long) arg1; \ -register unsigned long __sc3 __asm__ ("r3") = (unsigned long) arg2; \ -__asm__ __volatile__ ("trapa %1 !\t\t\t" #name "(%2,%3)" \ - : "=r" (__sc0) \ - : "r" (__sc0), "r" (__sc2), "r" (__sc3) ); \ -__asm__ __volatile__ ("!dummy %0 %1 %2" \ - : \ - : "r" (__sc0), "r" (__sc2), "r" (__sc3) ); \ -__syscall_return(type,__sc0); \ -} - -#define _syscall3(type,name,type1,arg1,type2,arg2,type3,arg3) \ -type name(type1 arg1,type2 arg2,type3 arg3) \ -{ \ -register unsigned long __sc0 __asm__ ("r9") = ((0x13 << 16) | __NR_##name); \ -register unsigned long __sc2 __asm__ ("r2") = (unsigned long) arg1; \ -register unsigned long __sc3 __asm__ ("r3") = (unsigned long) arg2; \ -register unsigned long __sc4 __asm__ ("r4") = (unsigned long) arg3; \ -__asm__ __volatile__ ("trapa %1 !\t\t\t" #name "(%2,%3,%4)" \ - : "=r" (__sc0) \ - : "r" (__sc0), "r" (__sc2), "r" (__sc3), "r" (__sc4) ); \ -__asm__ __volatile__ ("!dummy %0 %1 %2 %3" \ - : \ - : "r" (__sc0), "r" (__sc2), "r" (__sc3), "r" (__sc4) ); \ -__syscall_return(type,__sc0); \ -} - -#define _syscall4(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4) \ -type name (type1 arg1, type2 arg2, type3 arg3, type4 arg4) \ -{ \ -register unsigned long __sc0 __asm__ ("r9") = ((0x14 << 16) | __NR_##name); \ -register unsigned long __sc2 __asm__ ("r2") = (unsigned long) arg1; \ -register unsigned long __sc3 __asm__ ("r3") = (unsigned long) arg2; \ -register unsigned long __sc4 __asm__ ("r4") = (unsigned long) arg3; \ -register unsigned long __sc5 __asm__ ("r5") = (unsigned long) arg4; \ -__asm__ __volatile__ ("trapa %1 !\t\t\t" #name "(%2,%3,%4,%5)" \ - : "=r" (__sc0) \ - : "r" (__sc0), "r" (__sc2), "r" (__sc3), "r" (__sc4), "r" (__sc5) );\ -__asm__ __volatile__ ("!dummy %0 %1 %2 %3 %4" \ - : \ - : "r" (__sc0), "r" (__sc2), "r" (__sc3), "r" (__sc4), "r" (__sc5) );\ -__syscall_return(type,__sc0); \ -} - -#define _syscall5(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5) \ -type name (type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) \ -{ \ -register unsigned long __sc0 __asm__ ("r9") = ((0x15 << 16) | __NR_##name); \ -register unsigned long __sc2 __asm__ ("r2") = (unsigned long) arg1; \ -register unsigned long __sc3 __asm__ ("r3") = (unsigned long) arg2; \ -register unsigned long __sc4 __asm__ ("r4") = (unsigned long) arg3; \ -register unsigned long __sc5 __asm__ ("r5") = (unsigned long) arg4; \ -register unsigned long __sc6 __asm__ ("r6") = (unsigned long) arg5; \ -__asm__ __volatile__ ("trapa %1 !\t\t\t" #name "(%2,%3,%4,%5,%6)" \ - : "=r" (__sc0) \ - : "r" (__sc0), "r" (__sc2), "r" (__sc3), "r" (__sc4), "r" (__sc5), \ - "r" (__sc6)); \ -__asm__ __volatile__ ("!dummy %0 %1 %2 %3 %4 %5" \ - : \ - : "r" (__sc0), "r" (__sc2), "r" (__sc3), "r" (__sc4), "r" (__sc5), \ - "r" (__sc6)); \ -__syscall_return(type,__sc0); \ -} - -#define _syscall6(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5, type6, arg6) \ -type name (type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5, type6 arg6) \ -{ \ -register unsigned long __sc0 __asm__ ("r9") = ((0x16 << 16) | __NR_##name); \ -register unsigned long __sc2 __asm__ ("r2") = (unsigned long) arg1; \ -register unsigned long __sc3 __asm__ ("r3") = (unsigned long) arg2; \ -register unsigned long __sc4 __asm__ ("r4") = (unsigned long) arg3; \ -register unsigned long __sc5 __asm__ ("r5") = (unsigned long) arg4; \ -register unsigned long __sc6 __asm__ ("r6") = (unsigned long) arg5; \ -register unsigned long __sc7 __asm__ ("r7") = (unsigned long) arg6; \ -__asm__ __volatile__ ("trapa %1 !\t\t\t" #name "(%2,%3,%4,%5,%6,%7)" \ - : "=r" (__sc0) \ - : "r" (__sc0), "r" (__sc2), "r" (__sc3), "r" (__sc4), "r" (__sc5), \ - "r" (__sc6), "r" (__sc7)); \ -__asm__ __volatile__ ("!dummy %0 %1 %2 %3 %4 %5 %6" \ - : \ - : "r" (__sc0), "r" (__sc2), "r" (__sc3), "r" (__sc4), "r" (__sc5), \ - "r" (__sc6), "r" (__sc7)); \ -__syscall_return(type,__sc0); \ -} #define __ARCH_WANT_IPC_PARSE_VERSION #define __ARCH_WANT_OLD_READDIR diff --git a/include/asm-sparc/bitops.h b/include/asm-sparc/bitops.h index 04aa3318f76..329e696e775 100644 --- a/include/asm-sparc/bitops.h +++ b/include/asm-sparc/bitops.h @@ -14,6 +14,10 @@ #ifdef __KERNEL__ +extern unsigned long ___set_bit(unsigned long *addr, unsigned long mask); +extern unsigned long ___clear_bit(unsigned long *addr, unsigned long mask); +extern unsigned long ___change_bit(unsigned long *addr, unsigned long mask); + /* * Set bit 'nr' in 32-bit quantity at address 'addr' where bit '0' * is in the highest of the four bytes and bit '31' is the high bit @@ -22,134 +26,62 @@ */ static inline int test_and_set_bit(unsigned long nr, volatile unsigned long *addr) { - register unsigned long mask asm("g2"); - register unsigned long *ADDR asm("g1"); - register int tmp1 asm("g3"); - register int tmp2 asm("g4"); - register int tmp3 asm("g5"); - register int tmp4 asm("g7"); + unsigned long *ADDR, mask; ADDR = ((unsigned long *) addr) + (nr >> 5); mask = 1 << (nr & 31); - __asm__ __volatile__( - "mov %%o7, %%g4\n\t" - "call ___set_bit\n\t" - " add %%o7, 8, %%o7\n" - : "=&r" (mask), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3), "=r" (tmp4) - : "0" (mask), "r" (ADDR) - : "memory", "cc"); - - return mask != 0; + return ___set_bit(ADDR, mask) != 0; } static inline void set_bit(unsigned long nr, volatile unsigned long *addr) { - register unsigned long mask asm("g2"); - register unsigned long *ADDR asm("g1"); - register int tmp1 asm("g3"); - register int tmp2 asm("g4"); - register int tmp3 asm("g5"); - register int tmp4 asm("g7"); + unsigned long *ADDR, mask; ADDR = ((unsigned long *) addr) + (nr >> 5); mask = 1 << (nr & 31); - __asm__ __volatile__( - "mov %%o7, %%g4\n\t" - "call ___set_bit\n\t" - " add %%o7, 8, %%o7\n" - : "=&r" (mask), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3), "=r" (tmp4) - : "0" (mask), "r" (ADDR) - : "memory", "cc"); + (void) ___set_bit(ADDR, mask); } static inline int test_and_clear_bit(unsigned long nr, volatile unsigned long *addr) { - register unsigned long mask asm("g2"); - register unsigned long *ADDR asm("g1"); - register int tmp1 asm("g3"); - register int tmp2 asm("g4"); - register int tmp3 asm("g5"); - register int tmp4 asm("g7"); + unsigned long *ADDR, mask; ADDR = ((unsigned long *) addr) + (nr >> 5); mask = 1 << (nr & 31); - __asm__ __volatile__( - "mov %%o7, %%g4\n\t" - "call ___clear_bit\n\t" - " add %%o7, 8, %%o7\n" - : "=&r" (mask), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3), "=r" (tmp4) - : "0" (mask), "r" (ADDR) - : "memory", "cc"); - - return mask != 0; + return ___clear_bit(ADDR, mask) != 0; } static inline void clear_bit(unsigned long nr, volatile unsigned long *addr) { - register unsigned long mask asm("g2"); - register unsigned long *ADDR asm("g1"); - register int tmp1 asm("g3"); - register int tmp2 asm("g4"); - register int tmp3 asm("g5"); - register int tmp4 asm("g7"); + unsigned long *ADDR, mask; ADDR = ((unsigned long *) addr) + (nr >> 5); mask = 1 << (nr & 31); - __asm__ __volatile__( - "mov %%o7, %%g4\n\t" - "call ___clear_bit\n\t" - " add %%o7, 8, %%o7\n" - : "=&r" (mask), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3), "=r" (tmp4) - : "0" (mask), "r" (ADDR) - : "memory", "cc"); + (void) ___clear_bit(ADDR, mask); } static inline int test_and_change_bit(unsigned long nr, volatile unsigned long *addr) { - register unsigned long mask asm("g2"); - register unsigned long *ADDR asm("g1"); - register int tmp1 asm("g3"); - register int tmp2 asm("g4"); - register int tmp3 asm("g5"); - register int tmp4 asm("g7"); + unsigned long *ADDR, mask; ADDR = ((unsigned long *) addr) + (nr >> 5); mask = 1 << (nr & 31); - __asm__ __volatile__( - "mov %%o7, %%g4\n\t" - "call ___change_bit\n\t" - " add %%o7, 8, %%o7\n" - : "=&r" (mask), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3), "=r" (tmp4) - : "0" (mask), "r" (ADDR) - : "memory", "cc"); - - return mask != 0; + return ___change_bit(ADDR, mask) != 0; } static inline void change_bit(unsigned long nr, volatile unsigned long *addr) { - register unsigned long mask asm("g2"); - register unsigned long *ADDR asm("g1"); - register int tmp1 asm("g3"); - register int tmp2 asm("g4"); - register int tmp3 asm("g5"); - register int tmp4 asm("g7"); + unsigned long *ADDR, mask; ADDR = ((unsigned long *) addr) + (nr >> 5); mask = 1 << (nr & 31); - __asm__ __volatile__( - "mov %%o7, %%g4\n\t" - "call ___change_bit\n\t" - " add %%o7, 8, %%o7\n" - : "=&r" (mask), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3), "=r" (tmp4) - : "0" (mask), "r" (ADDR) - : "memory", "cc"); + (void) ___change_bit(ADDR, mask); } #include <asm-generic/bitops/non-atomic.h> diff --git a/include/asm-sparc/cacheflush.h b/include/asm-sparc/cacheflush.h index fc632f811cd..68ac1091027 100644 --- a/include/asm-sparc/cacheflush.h +++ b/include/asm-sparc/cacheflush.h @@ -48,6 +48,7 @@ BTFIXUPDEF_CALL(void, flush_cache_page, struct vm_area_struct *, unsigned long) #define flush_cache_all() BTFIXUP_CALL(flush_cache_all)() #define flush_cache_mm(mm) BTFIXUP_CALL(flush_cache_mm)(mm) +#define flush_cache_dup_mm(mm) BTFIXUP_CALL(flush_cache_mm)(mm) #define flush_cache_range(vma,start,end) BTFIXUP_CALL(flush_cache_range)(vma,start,end) #define flush_cache_page(vma,addr,pfn) BTFIXUP_CALL(flush_cache_page)(vma,addr) #define flush_icache_range(start, end) do { } while (0) diff --git a/include/asm-sparc/checksum.h b/include/asm-sparc/checksum.h index 28615810897..267e631e9bb 100644 --- a/include/asm-sparc/checksum.h +++ b/include/asm-sparc/checksum.h @@ -30,7 +30,7 @@ * * it's best to have buff aligned on a 32-bit boundary */ -extern unsigned int csum_partial(const unsigned char * buff, int len, unsigned int sum); +extern __wsum csum_partial(const void *buff, int len, __wsum sum); /* the same as csum_partial, but copies from fs:src while it * checksums @@ -41,9 +41,8 @@ extern unsigned int csum_partial(const unsigned char * buff, int len, unsigned i extern unsigned int __csum_partial_copy_sparc_generic (const unsigned char *, unsigned char *); -static inline unsigned int -csum_partial_copy_nocheck (const unsigned char *src, unsigned char *dst, int len, - unsigned int sum) +static inline __wsum +csum_partial_copy_nocheck(const void *src, void *dst, int len, __wsum sum) { register unsigned int ret asm("o0") = (unsigned int)src; register char *d asm("o1") = dst; @@ -57,42 +56,36 @@ csum_partial_copy_nocheck (const unsigned char *src, unsigned char *dst, int len : "o2", "o3", "o4", "o5", "o7", "g2", "g3", "g4", "g5", "g7", "memory", "cc"); - return ret; + return (__force __wsum)ret; } -static inline unsigned int -csum_partial_copy_from_user(const unsigned char __user *src, unsigned char *dst, int len, - unsigned int sum, int *err) +static inline __wsum +csum_partial_copy_from_user(const void __user *src, void *dst, int len, + __wsum sum, int *err) { - if (!access_ok (VERIFY_READ, src, len)) { - *err = -EFAULT; - memset (dst, 0, len); - return sum; - } else { - register unsigned long ret asm("o0") = (unsigned long)src; - register char *d asm("o1") = dst; - register int l asm("g1") = len; - register unsigned int s asm("g7") = sum; + register unsigned long ret asm("o0") = (unsigned long)src; + register char *d asm("o1") = dst; + register int l asm("g1") = len; + register __wsum s asm("g7") = sum; - __asm__ __volatile__ ( - ".section __ex_table,#alloc\n\t" - ".align 4\n\t" - ".word 1f,2\n\t" - ".previous\n" - "1:\n\t" - "call __csum_partial_copy_sparc_generic\n\t" - " st %8, [%%sp + 64]\n" - : "=&r" (ret), "=&r" (d), "=&r" (l), "=&r" (s) - : "0" (ret), "1" (d), "2" (l), "3" (s), "r" (err) - : "o2", "o3", "o4", "o5", "o7", "g2", "g3", "g4", "g5", - "cc", "memory"); - return ret; - } - } + __asm__ __volatile__ ( + ".section __ex_table,#alloc\n\t" + ".align 4\n\t" + ".word 1f,2\n\t" + ".previous\n" + "1:\n\t" + "call __csum_partial_copy_sparc_generic\n\t" + " st %8, [%%sp + 64]\n" + : "=&r" (ret), "=&r" (d), "=&r" (l), "=&r" (s) + : "0" (ret), "1" (d), "2" (l), "3" (s), "r" (err) + : "o2", "o3", "o4", "o5", "o7", "g2", "g3", "g4", "g5", + "cc", "memory"); + return (__force __wsum)ret; +} -static inline unsigned int -csum_partial_copy_to_user(const unsigned char *src, unsigned char __user *dst, int len, - unsigned int sum, int *err) +static inline __wsum +csum_partial_copy_to_user(const void *src, void __user *dst, int len, + __wsum sum, int *err) { if (!access_ok (VERIFY_WRITE, dst, len)) { *err = -EFAULT; @@ -101,7 +94,7 @@ csum_partial_copy_to_user(const unsigned char *src, unsigned char __user *dst, i register unsigned long ret asm("o0") = (unsigned long)src; register char __user *d asm("o1") = dst; register int l asm("g1") = len; - register unsigned int s asm("g7") = sum; + register __wsum s asm("g7") = sum; __asm__ __volatile__ ( ".section __ex_table,#alloc\n\t" @@ -116,7 +109,7 @@ csum_partial_copy_to_user(const unsigned char *src, unsigned char __user *dst, i : "o2", "o3", "o4", "o5", "o7", "g2", "g3", "g4", "g5", "cc", "memory"); - return ret; + return (__force __wsum)ret; } } @@ -126,10 +119,9 @@ csum_partial_copy_to_user(const unsigned char *src, unsigned char __user *dst, i /* ihl is always 5 or greater, almost always is 5, and iph is word aligned * the majority of the time. */ -static inline unsigned short ip_fast_csum(const unsigned char *iph, - unsigned int ihl) +static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl) { - unsigned short sum; + __sum16 sum; /* Note: We must read %2 before we touch %0 for the first time, * because GCC can legitimately use the same register for @@ -164,7 +156,7 @@ static inline unsigned short ip_fast_csum(const unsigned char *iph, } /* Fold a partial checksum without adding pseudo headers. */ -static inline unsigned int csum_fold(unsigned int sum) +static inline __sum16 csum_fold(__wsum sum) { unsigned int tmp; @@ -173,23 +165,22 @@ static inline unsigned int csum_fold(unsigned int sum) "addx\t%1, %%g0, %1\n\t" "xnor\t%%g0, %1, %0" : "=&r" (sum), "=r" (tmp) - : "0" (sum), "1" (sum<<16) + : "0" (sum), "1" ((__force u32)sum<<16) : "cc"); - return sum; + return (__force __sum16)sum; } -static inline unsigned long csum_tcpudp_nofold(unsigned long saddr, - unsigned long daddr, - unsigned int len, +static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr, + unsigned short len, unsigned short proto, - unsigned int sum) + __wsum sum) { __asm__ __volatile__("addcc\t%1, %0, %0\n\t" "addxcc\t%2, %0, %0\n\t" "addxcc\t%3, %0, %0\n\t" "addx\t%0, %%g0, %0\n\t" : "=r" (sum), "=r" (saddr) - : "r" (daddr), "r" ((proto<<16)+len), "0" (sum), + : "r" (daddr), "r" (proto + len), "0" (sum), "1" (saddr) : "cc"); return sum; @@ -199,22 +190,20 @@ static inline unsigned long csum_tcpudp_nofold(unsigned long saddr, * computes the checksum of the TCP/UDP pseudo-header * returns a 16-bit checksum, already complemented */ -static inline unsigned short int csum_tcpudp_magic(unsigned long saddr, - unsigned long daddr, +static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr, unsigned short len, unsigned short proto, - unsigned int sum) + __wsum sum) { return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum)); } #define _HAVE_ARCH_IPV6_CSUM -static inline unsigned short int csum_ipv6_magic(struct in6_addr *saddr, - struct in6_addr *daddr, - __u32 len, - unsigned short proto, - unsigned int sum) +static inline __sum16 csum_ipv6_magic(const struct in6_addr *saddr, + const struct in6_addr *daddr, + __u32 len, unsigned short proto, + __wsum sum) { __asm__ __volatile__ ( "addcc %3, %4, %%g4\n\t" @@ -245,7 +234,7 @@ static inline unsigned short int csum_ipv6_magic(struct in6_addr *saddr, } /* this routine is used for miscellaneous IP-like checksums, mainly in icmp.c */ -static inline unsigned short ip_compute_csum(unsigned char * buff, int len) +static inline __sum16 ip_compute_csum(const void *buff, int len) { return csum_fold(csum_partial(buff, len, 0)); } diff --git a/include/asm-sparc/device.h b/include/asm-sparc/device.h new file mode 100644 index 00000000000..d8f9872b0e2 --- /dev/null +++ b/include/asm-sparc/device.h @@ -0,0 +1,7 @@ +/* + * Arch specific extensions to struct device + * + * This file is released under the GPLv2 + */ +#include <asm-generic/device.h> + diff --git a/include/asm-sparc/of_device.h b/include/asm-sparc/of_device.h index 80ea31f6e17..7cb00c1b09c 100644 --- a/include/asm-sparc/of_device.h +++ b/include/asm-sparc/of_device.h @@ -33,7 +33,7 @@ struct of_device #define to_of_device(d) container_of(d, struct of_device, dev) extern void __iomem *of_ioremap(struct resource *res, unsigned long offset, unsigned long size, char *name); -extern void of_iounmap(void __iomem *base, unsigned long size); +extern void of_iounmap(struct resource *res, void __iomem *base, unsigned long size); extern struct of_device *of_find_device_by_node(struct device_node *); diff --git a/include/asm-sparc/termbits.h b/include/asm-sparc/termbits.h index 1794d71134b..5eb00a105d7 100644 --- a/include/asm-sparc/termbits.h +++ b/include/asm-sparc/termbits.h @@ -31,6 +31,18 @@ struct termios { #endif }; +struct ktermios { + tcflag_t c_iflag; /* input mode flags */ + tcflag_t c_oflag; /* output mode flags */ + tcflag_t c_cflag; /* control mode flags */ + tcflag_t c_lflag; /* local mode flags */ + cc_t c_line; /* line discipline */ + cc_t c_cc[NCCS]; /* control characters */ + cc_t _x_cc[2]; /* We need them to hold vmin/vtime */ + speed_t c_ispeed; /* input speed */ + speed_t c_ospeed; /* output speed */ +}; + /* c_cc characters */ #define VINTR 0 #define VQUIT 1 diff --git a/include/asm-sparc/unistd.h b/include/asm-sparc/unistd.h index f7827fa4cd5..d5b2f8053b3 100644 --- a/include/asm-sparc/unistd.h +++ b/include/asm-sparc/unistd.h @@ -329,136 +329,6 @@ * find a free slot in the 0-302 range. */ -#define _syscall0(type,name) \ -type name(void) \ -{ \ -long __res; \ -register long __g1 __asm__ ("g1") = __NR_##name; \ -__asm__ __volatile__ ("t 0x10\n\t" \ - "bcc 1f\n\t" \ - "mov %%o0, %0\n\t" \ - "sub %%g0, %%o0, %0\n\t" \ - "1:\n\t" \ - : "=r" (__res)\ - : "r" (__g1) \ - : "o0", "cc"); \ -if (__res < -255 || __res >= 0) \ - return (type) __res; \ -errno = -__res; \ -return -1; \ -} - -#define _syscall1(type,name,type1,arg1) \ -type name(type1 arg1) \ -{ \ -long __res; \ -register long __g1 __asm__ ("g1") = __NR_##name; \ -register long __o0 __asm__ ("o0") = (long)(arg1); \ -__asm__ __volatile__ ("t 0x10\n\t" \ - "bcc 1f\n\t" \ - "mov %%o0, %0\n\t" \ - "sub %%g0, %%o0, %0\n\t" \ - "1:\n\t" \ - : "=r" (__res), "=&r" (__o0) \ - : "1" (__o0), "r" (__g1) \ - : "cc"); \ -if (__res < -255 || __res >= 0) \ - return (type) __res; \ -errno = -__res; \ -return -1; \ -} - -#define _syscall2(type,name,type1,arg1,type2,arg2) \ -type name(type1 arg1,type2 arg2) \ -{ \ -long __res; \ -register long __g1 __asm__ ("g1") = __NR_##name; \ -register long __o0 __asm__ ("o0") = (long)(arg1); \ -register long __o1 __asm__ ("o1") = (long)(arg2); \ -__asm__ __volatile__ ("t 0x10\n\t" \ - "bcc 1f\n\t" \ - "mov %%o0, %0\n\t" \ - "sub %%g0, %%o0, %0\n\t" \ - "1:\n\t" \ - : "=r" (__res), "=&r" (__o0) \ - : "1" (__o0), "r" (__o1), "r" (__g1) \ - : "cc"); \ -if (__res < -255 || __res >= 0) \ - return (type) __res; \ -errno = -__res; \ -return -1; \ -} - -#define _syscall3(type,name,type1,arg1,type2,arg2,type3,arg3) \ -type name(type1 arg1,type2 arg2,type3 arg3) \ -{ \ -long __res; \ -register long __g1 __asm__ ("g1") = __NR_##name; \ -register long __o0 __asm__ ("o0") = (long)(arg1); \ -register long __o1 __asm__ ("o1") = (long)(arg2); \ -register long __o2 __asm__ ("o2") = (long)(arg3); \ -__asm__ __volatile__ ("t 0x10\n\t" \ - "bcc 1f\n\t" \ - "mov %%o0, %0\n\t" \ - "sub %%g0, %%o0, %0\n\t" \ - "1:\n\t" \ - : "=r" (__res), "=&r" (__o0) \ - : "1" (__o0), "r" (__o1), "r" (__o2), "r" (__g1) \ - : "cc"); \ -if (__res < -255 || __res>=0) \ - return (type) __res; \ -errno = -__res; \ -return -1; \ -} - -#define _syscall4(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4) \ -type name (type1 arg1, type2 arg2, type3 arg3, type4 arg4) \ -{ \ -long __res; \ -register long __g1 __asm__ ("g1") = __NR_##name; \ -register long __o0 __asm__ ("o0") = (long)(arg1); \ -register long __o1 __asm__ ("o1") = (long)(arg2); \ -register long __o2 __asm__ ("o2") = (long)(arg3); \ -register long __o3 __asm__ ("o3") = (long)(arg4); \ -__asm__ __volatile__ ("t 0x10\n\t" \ - "bcc 1f\n\t" \ - "mov %%o0, %0\n\t" \ - "sub %%g0, %%o0, %0\n\t" \ - "1:\n\t" \ - : "=r" (__res), "=&r" (__o0) \ - : "1" (__o0), "r" (__o1), "r" (__o2), "r" (__o3), "r" (__g1) \ - : "cc"); \ -if (__res < -255 || __res>=0) \ - return (type) __res; \ -errno = -__res; \ -return -1; \ -} - -#define _syscall5(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4, \ - type5,arg5) \ -type name (type1 arg1,type2 arg2,type3 arg3,type4 arg4,type5 arg5) \ -{ \ -long __res; \ -register long __g1 __asm__ ("g1") = __NR_##name; \ -register long __o0 __asm__ ("o0") = (long)(arg1); \ -register long __o1 __asm__ ("o1") = (long)(arg2); \ -register long __o2 __asm__ ("o2") = (long)(arg3); \ -register long __o3 __asm__ ("o3") = (long)(arg4); \ -register long __o4 __asm__ ("o4") = (long)(arg5); \ -__asm__ __volatile__ ("t 0x10\n\t" \ - "bcc 1f\n\t" \ - "mov %%o0, %0\n\t" \ - "sub %%g0, %%o0, %0\n\t" \ - "1:\n\t" \ - : "=r" (__res), "=&r" (__o0) \ - : "1" (__o0), "r" (__o1), "r" (__o2), "r" (__o3), "r" (__o4), "r" (__g1) \ - : "cc"); \ -if (__res < -255 || __res>=0) \ - return (type) __res; \ -errno = -__res; \ -return -1; \ -} - #define __ARCH_WANT_IPC_PARSE_VERSION #define __ARCH_WANT_OLD_READDIR #define __ARCH_WANT_STAT64 diff --git a/include/asm-sparc64/cacheflush.h b/include/asm-sparc64/cacheflush.h index 745d1ab6037..122e4058dd9 100644 --- a/include/asm-sparc64/cacheflush.h +++ b/include/asm-sparc64/cacheflush.h @@ -12,6 +12,7 @@ /* These are the same regardless of whether this is an SMP kernel or not. */ #define flush_cache_mm(__mm) \ do { if ((__mm) == current->mm) flushw_user(); } while(0) +#define flush_cache_dup_mm(mm) flush_cache_mm(mm) #define flush_cache_range(vma, start, end) \ flush_cache_mm((vma)->vm_mm) #define flush_cache_page(vma, page, pfn) \ diff --git a/include/asm-sparc64/checksum.h b/include/asm-sparc64/checksum.h index dc8bed246fc..70a006da763 100644 --- a/include/asm-sparc64/checksum.h +++ b/include/asm-sparc64/checksum.h @@ -30,7 +30,7 @@ * * it's best to have buff aligned on a 32-bit boundary */ -extern unsigned int csum_partial(const unsigned char * buff, int len, unsigned int sum); +extern __wsum csum_partial(const void * buff, int len, __wsum sum); /* the same as csum_partial, but copies from user space while it * checksums @@ -38,52 +38,50 @@ extern unsigned int csum_partial(const unsigned char * buff, int len, unsigned i * here even more important to align src and dst on a 32-bit (or even * better 64-bit) boundary */ -extern unsigned int csum_partial_copy_nocheck(const unsigned char *src, - unsigned char *dst, - int len, unsigned int sum); - -extern long __csum_partial_copy_from_user(const unsigned char __user *src, - unsigned char *dst, int len, - unsigned int sum); - -static inline unsigned int -csum_partial_copy_from_user(const unsigned char __user *src, - unsigned char *dst, int len, - unsigned int sum, int *err) +extern __wsum csum_partial_copy_nocheck(const void *src, void *dst, + int len, __wsum sum); + +extern long __csum_partial_copy_from_user(const void __user *src, + void *dst, int len, + __wsum sum); + +static inline __wsum +csum_partial_copy_from_user(const void __user *src, + void *dst, int len, + __wsum sum, int *err) { long ret = __csum_partial_copy_from_user(src, dst, len, sum); if (ret < 0) *err = -EFAULT; - return (unsigned int) ret; + return (__force __wsum) ret; } /* * Copy and checksum to user */ #define HAVE_CSUM_COPY_USER -extern long __csum_partial_copy_to_user(const unsigned char *src, - unsigned char __user *dst, int len, - unsigned int sum); - -static inline unsigned int -csum_and_copy_to_user(const unsigned char *src, - unsigned char __user *dst, int len, - unsigned int sum, int *err) +extern long __csum_partial_copy_to_user(const void *src, + void __user *dst, int len, + __wsum sum); + +static inline __wsum +csum_and_copy_to_user(const void *src, + void __user *dst, int len, + __wsum sum, int *err) { long ret = __csum_partial_copy_to_user(src, dst, len, sum); if (ret < 0) *err = -EFAULT; - return (unsigned int) ret; + return (__force __wsum) ret; } /* ihl is always 5 or greater, almost always is 5, and iph is word aligned * the majority of the time. */ -extern unsigned short ip_fast_csum(__const__ unsigned char *iph, - unsigned int ihl); +extern __sum16 ip_fast_csum(const void *iph, unsigned int ihl); /* Fold a partial checksum without adding pseudo headers. */ -static inline unsigned short csum_fold(unsigned int sum) +static inline __sum16 csum_fold(__wsum sum) { unsigned int tmp; @@ -93,16 +91,15 @@ static inline unsigned short csum_fold(unsigned int sum) " addc %1, %%g0, %1\n" " xnor %%g0, %1, %0\n" : "=&r" (sum), "=r" (tmp) - : "0" (sum), "1" (sum<<16) + : "0" (sum), "1" ((__force u32)sum<<16) : "cc"); - return (sum & 0xffff); + return (__force __sum16)sum; } -static inline unsigned long csum_tcpudp_nofold(unsigned long saddr, - unsigned long daddr, +static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned int len, unsigned short proto, - unsigned int sum) + __wsum sum) { __asm__ __volatile__( " addcc %1, %0, %0\n" @@ -110,7 +107,7 @@ static inline unsigned long csum_tcpudp_nofold(unsigned long saddr, " addccc %3, %0, %0\n" " addc %0, %%g0, %0\n" : "=r" (sum), "=r" (saddr) - : "r" (daddr), "r" ((proto<<16)+len), "0" (sum), "1" (saddr) + : "r" (daddr), "r" (proto + len), "0" (sum), "1" (saddr) : "cc"); return sum; } @@ -119,22 +116,20 @@ static inline unsigned long csum_tcpudp_nofold(unsigned long saddr, * computes the checksum of the TCP/UDP pseudo-header * returns a 16-bit checksum, already complemented */ -static inline unsigned short int csum_tcpudp_magic(unsigned long saddr, - unsigned long daddr, +static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr, unsigned short len, unsigned short proto, - unsigned int sum) + __wsum sum) { return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum)); } #define _HAVE_ARCH_IPV6_CSUM -static inline unsigned short int csum_ipv6_magic(struct in6_addr *saddr, - struct in6_addr *daddr, - __u32 len, - unsigned short proto, - unsigned int sum) +static inline __sum16 csum_ipv6_magic(const struct in6_addr *saddr, + const struct in6_addr *daddr, + __u32 len, unsigned short proto, + __wsum sum) { __asm__ __volatile__ ( " addcc %3, %4, %%g7\n" @@ -165,7 +160,7 @@ static inline unsigned short int csum_ipv6_magic(struct in6_addr *saddr, } /* this routine is used for miscellaneous IP-like checksums, mainly in icmp.c */ -static inline unsigned short ip_compute_csum(unsigned char * buff, int len) +static inline __sum16 ip_compute_csum(const void *buff, int len) { return csum_fold(csum_partial(buff, len, 0)); } diff --git a/include/asm-sparc64/device.h b/include/asm-sparc64/device.h new file mode 100644 index 00000000000..d8f9872b0e2 --- /dev/null +++ b/include/asm-sparc64/device.h @@ -0,0 +1,7 @@ +/* + * Arch specific extensions to struct device + * + * This file is released under the GPLv2 + */ +#include <asm-generic/device.h> + diff --git a/include/asm-sparc64/dma-mapping.h b/include/asm-sparc64/dma-mapping.h index 27c46fbeebd..2f858a2df94 100644 --- a/include/asm-sparc64/dma-mapping.h +++ b/include/asm-sparc64/dma-mapping.h @@ -181,7 +181,7 @@ dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, size_t siz #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) -#define dma_is_consistent(d) (1) +#define dma_is_consistent(d, h) (1) static inline int dma_get_cache_alignment(void) @@ -210,7 +210,7 @@ dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle, } static inline void -dma_cache_sync(void *vaddr, size_t size, +dma_cache_sync(struct device *dev, void *vaddr, size_t size, enum dma_data_direction direction) { /* could define this in terms of the dma_cache ... operations, diff --git a/include/asm-sparc64/dma.h b/include/asm-sparc64/dma.h index 27f65972b3b..93e5a062df8 100644 --- a/include/asm-sparc64/dma.h +++ b/include/asm-sparc64/dma.h @@ -152,9 +152,9 @@ extern void dvma_init(struct sbus_bus *); #define DMA_MAXEND(addr) (0x01000000UL-(((unsigned long)(addr))&0x00ffffffUL)) /* Yes, I hack a lot of elisp in my spare time... */ -#define DMA_ERROR_P(regs) (((sbus_readl((regs) + DMA_CSR) & DMA_HNDL_ERROR)) -#define DMA_IRQ_P(regs) (((sbus_readl((regs) + DMA_CSR)) & (DMA_HNDL_INTR | DMA_HNDL_ERROR))) -#define DMA_WRITE_P(regs) (((sbus_readl((regs) + DMA_CSR) & DMA_ST_WRITE)) +#define DMA_ERROR_P(regs) ((sbus_readl((regs) + DMA_CSR) & DMA_HNDL_ERROR)) +#define DMA_IRQ_P(regs) ((sbus_readl((regs) + DMA_CSR)) & (DMA_HNDL_INTR | DMA_HNDL_ERROR)) +#define DMA_WRITE_P(regs) ((sbus_readl((regs) + DMA_CSR) & DMA_ST_WRITE)) #define DMA_OFF(__regs) \ do { u32 tmp = sbus_readl((__regs) + DMA_CSR); \ tmp &= ~DMA_ENABLE; \ diff --git a/include/asm-sparc64/futex.h b/include/asm-sparc64/futex.h index 7392fc4a954..876312fe82c 100644 --- a/include/asm-sparc64/futex.h +++ b/include/asm-sparc64/futex.h @@ -45,7 +45,7 @@ static inline int futex_atomic_op_inuser(int encoded_op, int __user *uaddr) if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28)) oparg = 1 << oparg; - inc_preempt_count(); + pagefault_disable(); switch (op) { case FUTEX_OP_SET: @@ -67,7 +67,7 @@ static inline int futex_atomic_op_inuser(int encoded_op, int __user *uaddr) ret = -ENOSYS; } - dec_preempt_count(); + pagefault_enable(); if (!ret) { switch (cmp) { diff --git a/include/asm-sparc64/hw_irq.h b/include/asm-sparc64/hw_irq.h index 599b3b07345..8e44a836082 100644 --- a/include/asm-sparc64/hw_irq.h +++ b/include/asm-sparc64/hw_irq.h @@ -1,6 +1,4 @@ #ifndef __ASM_SPARC64_HW_IRQ_H #define __ASM_SPARC64_HW_IRQ_H -extern void hw_resend_irq(struct hw_interrupt_type *handler, unsigned int virt_irq); - #endif diff --git a/include/asm-sparc64/irqflags.h b/include/asm-sparc64/irqflags.h new file mode 100644 index 00000000000..024fc54d068 --- /dev/null +++ b/include/asm-sparc64/irqflags.h @@ -0,0 +1,89 @@ +/* + * include/asm-sparc64/irqflags.h + * + * IRQ flags handling + * + * This file gets included from lowlevel asm headers too, to provide + * wrapped versions of the local_irq_*() APIs, based on the + * raw_local_irq_*() functions from the lowlevel headers. + */ +#ifndef _ASM_IRQFLAGS_H +#define _ASM_IRQFLAGS_H + +#ifndef __ASSEMBLY__ + +static inline unsigned long __raw_local_save_flags(void) +{ + unsigned long flags; + + __asm__ __volatile__( + "rdpr %%pil, %0" + : "=r" (flags) + ); + + return flags; +} + +#define raw_local_save_flags(flags) \ + do { (flags) = __raw_local_save_flags(); } while (0) + +static inline void raw_local_irq_restore(unsigned long flags) +{ + __asm__ __volatile__( + "wrpr %0, %%pil" + : /* no output */ + : "r" (flags) + : "memory" + ); +} + +static inline void raw_local_irq_disable(void) +{ + __asm__ __volatile__( + "wrpr 15, %%pil" + : /* no outputs */ + : /* no inputs */ + : "memory" + ); +} + +static inline void raw_local_irq_enable(void) +{ + __asm__ __volatile__( + "wrpr 0, %%pil" + : /* no outputs */ + : /* no inputs */ + : "memory" + ); +} + +static inline int raw_irqs_disabled_flags(unsigned long flags) +{ + return (flags > 0); +} + +static inline int raw_irqs_disabled(void) +{ + unsigned long flags = __raw_local_save_flags(); + + return raw_irqs_disabled_flags(flags); +} + +/* + * For spinlocks, etc: + */ +static inline unsigned long __raw_local_irq_save(void) +{ + unsigned long flags = __raw_local_save_flags(); + + raw_local_irq_disable(); + + return flags; +} + +#define raw_local_irq_save(flags) \ + do { (flags) = __raw_local_irq_save(); } while (0) + +#endif /* (__ASSEMBLY__) */ + +#endif /* !(_ASM_IRQFLAGS_H) */ diff --git a/include/asm-sparc64/kprobes.h b/include/asm-sparc64/kprobes.h index c9f5c34d318..becc38fa06c 100644 --- a/include/asm-sparc64/kprobes.h +++ b/include/asm-sparc64/kprobes.h @@ -13,7 +13,11 @@ typedef u32 kprobe_opcode_t; #define JPROBE_ENTRY(pentry) (kprobe_opcode_t *)pentry #define arch_remove_kprobe(p) do {} while (0) #define ARCH_INACTIVE_KPROBE_COUNT 0 -#define flush_insn_slot(p) do { } while (0) + +#define flush_insn_slot(p) \ +do { flushi(&(p)->ainsn.insn[0]); \ + flushi(&(p)->ainsn.insn[1]); \ +} while (0) /* Architecture specific copy of original instruction*/ struct arch_specific_insn { @@ -23,7 +27,7 @@ struct arch_specific_insn { struct prev_kprobe { struct kprobe *kp; - unsigned int status; + unsigned long status; unsigned long orig_tnpc; unsigned long orig_tstate_pil; }; @@ -33,10 +37,7 @@ struct kprobe_ctlblk { unsigned long kprobe_status; unsigned long kprobe_orig_tnpc; unsigned long kprobe_orig_tstate_pil; - long *jprobe_saved_esp; struct pt_regs jprobe_saved_regs; - struct pt_regs *jprobe_saved_regs_location; - struct sparc_stackf jprobe_saved_stack; struct prev_kprobe prev_kprobe; }; diff --git a/include/asm-sparc64/of_device.h b/include/asm-sparc64/of_device.h index a62c7b997d6..60e9173c9ac 100644 --- a/include/asm-sparc64/of_device.h +++ b/include/asm-sparc64/of_device.h @@ -34,7 +34,7 @@ struct of_device #define to_of_device(d) container_of(d, struct of_device, dev) extern void __iomem *of_ioremap(struct resource *res, unsigned long offset, unsigned long size, char *name); -extern void of_iounmap(void __iomem *base, unsigned long size); +extern void of_iounmap(struct resource *res, void __iomem *base, unsigned long size); extern struct of_device *of_find_device_by_node(struct device_node *); diff --git a/include/asm-sparc64/pci.h b/include/asm-sparc64/pci.h index e1ea67bc32f..ca6560288ae 100644 --- a/include/asm-sparc64/pci.h +++ b/include/asm-sparc64/pci.h @@ -18,6 +18,8 @@ #define PCI_IRQ_NONE 0xffffffff +#define PCI_CACHE_LINE_BYTES 64 + static inline void pcibios_set_master(struct pci_dev *dev) { /* No special bus mastering setup handling */ @@ -291,10 +293,6 @@ extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, enum pci_mmap_state mmap_state, int write_combine); -/* Platform specific MWI support. */ -#define HAVE_ARCH_PCI_MWI -extern int pcibios_prep_mwi(struct pci_dev *dev); - extern void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region, struct resource *res); diff --git a/include/asm-sparc64/percpu.h b/include/asm-sparc64/percpu.h index ced8cbde046..0d3df76aa47 100644 --- a/include/asm-sparc64/percpu.h +++ b/include/asm-sparc64/percpu.h @@ -5,6 +5,16 @@ #ifdef CONFIG_SMP +#ifdef CONFIG_MODULES +# define PERCPU_MODULE_RESERVE 8192 +#else +# define PERCPU_MODULE_RESERVE 0 +#endif + +#define PERCPU_ENOUGH_ROOM \ + (ALIGN(__per_cpu_end - __per_cpu_start, SMP_CACHE_BYTES) + \ + PERCPU_MODULE_RESERVE) + extern void setup_per_cpu_areas(void); extern unsigned long __per_cpu_base; diff --git a/include/asm-sparc64/pgalloc.h b/include/asm-sparc64/pgalloc.h index 010f9cd0a67..5891ff7ba76 100644 --- a/include/asm-sparc64/pgalloc.h +++ b/include/asm-sparc64/pgalloc.h @@ -13,7 +13,7 @@ #include <asm/page.h> /* Page table allocation/freeing. */ -extern kmem_cache_t *pgtable_cache; +extern struct kmem_cache *pgtable_cache; static inline pgd_t *pgd_alloc(struct mm_struct *mm) { diff --git a/include/asm-sparc64/rwsem.h b/include/asm-sparc64/rwsem.h index cef5e827042..1294b7ce5d0 100644 --- a/include/asm-sparc64/rwsem.h +++ b/include/asm-sparc64/rwsem.h @@ -23,20 +23,33 @@ struct rw_semaphore { signed int count; spinlock_t wait_lock; struct list_head wait_list; +#ifdef CONFIG_DEBUG_LOCK_ALLOC + struct lockdep_map dep_map; +#endif }; +#ifdef CONFIG_DEBUG_LOCK_ALLOC +# define __RWSEM_DEP_MAP_INIT(lockname) , .dep_map = { .name = #lockname } +#else +# define __RWSEM_DEP_MAP_INIT(lockname) +#endif + #define __RWSEM_INITIALIZER(name) \ -{ RWSEM_UNLOCKED_VALUE, SPIN_LOCK_UNLOCKED, LIST_HEAD_INIT((name).wait_list) } +{ RWSEM_UNLOCKED_VALUE, SPIN_LOCK_UNLOCKED, LIST_HEAD_INIT((name).wait_list) \ + __RWSEM_DEP_MAP_INIT(name) } #define DECLARE_RWSEM(name) \ struct rw_semaphore name = __RWSEM_INITIALIZER(name) -static __inline__ void init_rwsem(struct rw_semaphore *sem) -{ - sem->count = RWSEM_UNLOCKED_VALUE; - spin_lock_init(&sem->wait_lock); - INIT_LIST_HEAD(&sem->wait_list); -} +extern void __init_rwsem(struct rw_semaphore *sem, const char *name, + struct lock_class_key *key); + +#define init_rwsem(sem) \ +do { \ + static struct lock_class_key __key; \ + \ + __init_rwsem((sem), #sem, &__key); \ +} while (0) extern void __down_read(struct rw_semaphore *sem); extern int __down_read_trylock(struct rw_semaphore *sem); @@ -46,6 +59,11 @@ extern void __up_read(struct rw_semaphore *sem); extern void __up_write(struct rw_semaphore *sem); extern void __downgrade_write(struct rw_semaphore *sem); +static inline void __down_write_nested(struct rw_semaphore *sem, int subclass) +{ + __down_write(sem); +} + static inline int rwsem_atomic_update(int delta, struct rw_semaphore *sem) { return atomic_add_return(delta, (atomic_t *)(&sem->count)); diff --git a/include/asm-sparc64/system.h b/include/asm-sparc64/system.h index a8b7432c9a7..32281acb878 100644 --- a/include/asm-sparc64/system.h +++ b/include/asm-sparc64/system.h @@ -7,6 +7,9 @@ #include <asm/visasm.h> #ifndef __ASSEMBLY__ + +#include <linux/irqflags.h> + /* * Sparc (general) CPU types */ @@ -72,52 +75,6 @@ do { __asm__ __volatile__("ba,pt %%xcc, 1f\n\t" \ #endif -#define setipl(__new_ipl) \ - __asm__ __volatile__("wrpr %0, %%pil" : : "r" (__new_ipl) : "memory") - -#define local_irq_disable() \ - __asm__ __volatile__("wrpr 15, %%pil" : : : "memory") - -#define local_irq_enable() \ - __asm__ __volatile__("wrpr 0, %%pil" : : : "memory") - -#define getipl() \ -({ unsigned long retval; __asm__ __volatile__("rdpr %%pil, %0" : "=r" (retval)); retval; }) - -#define swap_pil(__new_pil) \ -({ unsigned long retval; \ - __asm__ __volatile__("rdpr %%pil, %0\n\t" \ - "wrpr %1, %%pil" \ - : "=&r" (retval) \ - : "r" (__new_pil) \ - : "memory"); \ - retval; \ -}) - -#define read_pil_and_cli() \ -({ unsigned long retval; \ - __asm__ __volatile__("rdpr %%pil, %0\n\t" \ - "wrpr 15, %%pil" \ - : "=r" (retval) \ - : : "memory"); \ - retval; \ -}) - -#define local_save_flags(flags) ((flags) = getipl()) -#define local_irq_save(flags) ((flags) = read_pil_and_cli()) -#define local_irq_restore(flags) setipl((flags)) - -/* On sparc64 IRQ flags are the PIL register. A value of zero - * means all interrupt levels are enabled, any other value means - * only IRQ levels greater than that value will be received. - * Consequently this means that the lowest IRQ level is one. - */ -#define irqs_disabled() \ -({ unsigned long flags; \ - local_save_flags(flags);\ - (flags > 0); \ -}) - #define nop() __asm__ __volatile__ ("nop") #define read_barrier_depends() do { } while(0) diff --git a/include/asm-sparc64/termbits.h b/include/asm-sparc64/termbits.h index b07715273ed..705cd44b417 100644 --- a/include/asm-sparc64/termbits.h +++ b/include/asm-sparc64/termbits.h @@ -33,6 +33,18 @@ struct termios { #endif }; +struct ktermios { + tcflag_t c_iflag; /* input mode flags */ + tcflag_t c_oflag; /* output mode flags */ + tcflag_t c_cflag; /* control mode flags */ + tcflag_t c_lflag; /* local mode flags */ + cc_t c_line; /* line discipline */ + cc_t c_cc[NCCS]; /* control characters */ + cc_t _x_cc[2]; /* We need them to hold vmin/vtime */ + speed_t c_ispeed; /* input speed */ + speed_t c_ospeed; /* output speed */ +}; + /* c_cc characters */ #define VINTR 0 #define VQUIT 1 diff --git a/include/asm-sparc64/ttable.h b/include/asm-sparc64/ttable.h index f2352606a79..c2a16e18849 100644 --- a/include/asm-sparc64/ttable.h +++ b/include/asm-sparc64/ttable.h @@ -137,10 +137,49 @@ #endif #define BREAKPOINT_TRAP TRAP(breakpoint_trap) +#ifdef CONFIG_TRACE_IRQFLAGS + +#define TRAP_IRQ(routine, level) \ + rdpr %pil, %g2; \ + wrpr %g0, 15, %pil; \ + sethi %hi(1f-4), %g7; \ + ba,pt %xcc, etrap_irq; \ + or %g7, %lo(1f-4), %g7; \ + nop; \ + nop; \ + nop; \ + .subsection 2; \ +1: call trace_hardirqs_off; \ + nop; \ + mov level, %o0; \ + call routine; \ + add %sp, PTREGS_OFF, %o1; \ + ba,a,pt %xcc, rtrap_irq; \ + .previous; + +#define TICK_SMP_IRQ \ + rdpr %pil, %g2; \ + wrpr %g0, 15, %pil; \ + sethi %hi(1f-4), %g7; \ + ba,pt %xcc, etrap_irq; \ + or %g7, %lo(1f-4), %g7; \ + nop; \ + nop; \ + nop; \ + .subsection 2; \ +1: call trace_hardirqs_off; \ + nop; \ + call smp_percpu_timer_interrupt; \ + add %sp, PTREGS_OFF, %o0; \ + ba,a,pt %xcc, rtrap_irq; \ + .previous; + +#else + #define TRAP_IRQ(routine, level) \ rdpr %pil, %g2; \ wrpr %g0, 15, %pil; \ - b,pt %xcc, etrap_irq; \ + ba,pt %xcc, etrap_irq; \ rd %pc, %g7; \ mov level, %o0; \ call routine; \ @@ -151,12 +190,14 @@ rdpr %pil, %g2; \ wrpr %g0, 15, %pil; \ sethi %hi(109f), %g7; \ - b,pt %xcc, etrap_irq; \ + ba,pt %xcc, etrap_irq; \ 109: or %g7, %lo(109b), %g7; \ call smp_percpu_timer_interrupt; \ add %sp, PTREGS_OFF, %o0; \ ba,a,pt %xcc, rtrap_irq; +#endif + #define TRAP_IVEC TRAP_NOSAVE(do_ivec) #define BTRAP(lvl) TRAP_ARG(bad_trap, lvl) diff --git a/include/asm-sparc64/unistd.h b/include/asm-sparc64/unistd.h index 63669dad0d7..47047536f26 100644 --- a/include/asm-sparc64/unistd.h +++ b/include/asm-sparc64/unistd.h @@ -332,124 +332,6 @@ * find a free slot in the 0-302 range. */ -#define _syscall0(type,name) \ -type name(void) \ -{ \ -long __res; \ -register long __g1 __asm__ ("g1") = __NR_##name; \ -__asm__ __volatile__ ("t 0x6d\n\t" \ - "sub %%g0, %%o0, %0\n\t" \ - "movcc %%xcc, %%o0, %0\n\t" \ - : "=r" (__res)\ - : "r" (__g1) \ - : "o0", "cc"); \ -if (__res >= 0) \ - return (type) __res; \ -errno = -__res; \ -return -1; \ -} - -#define _syscall1(type,name,type1,arg1) \ -type name(type1 arg1) \ -{ \ -long __res; \ -register long __g1 __asm__ ("g1") = __NR_##name; \ -register long __o0 __asm__ ("o0") = (long)(arg1); \ -__asm__ __volatile__ ("t 0x6d\n\t" \ - "sub %%g0, %%o0, %0\n\t" \ - "movcc %%xcc, %%o0, %0\n\t" \ - : "=r" (__res), "=&r" (__o0) \ - : "1" (__o0), "r" (__g1) \ - : "cc"); \ -if (__res >= 0) \ - return (type) __res; \ -errno = -__res; \ -return -1; \ -} - -#define _syscall2(type,name,type1,arg1,type2,arg2) \ -type name(type1 arg1,type2 arg2) \ -{ \ -long __res; \ -register long __g1 __asm__ ("g1") = __NR_##name; \ -register long __o0 __asm__ ("o0") = (long)(arg1); \ -register long __o1 __asm__ ("o1") = (long)(arg2); \ -__asm__ __volatile__ ("t 0x6d\n\t" \ - "sub %%g0, %%o0, %0\n\t" \ - "movcc %%xcc, %%o0, %0\n\t" \ - : "=r" (__res), "=&r" (__o0) \ - : "1" (__o0), "r" (__o1), "r" (__g1) \ - : "cc"); \ -if (__res >= 0) \ - return (type) __res; \ -errno = -__res; \ -return -1; \ -} - -#define _syscall3(type,name,type1,arg1,type2,arg2,type3,arg3) \ -type name(type1 arg1,type2 arg2,type3 arg3) \ -{ \ -long __res; \ -register long __g1 __asm__ ("g1") = __NR_##name; \ -register long __o0 __asm__ ("o0") = (long)(arg1); \ -register long __o1 __asm__ ("o1") = (long)(arg2); \ -register long __o2 __asm__ ("o2") = (long)(arg3); \ -__asm__ __volatile__ ("t 0x6d\n\t" \ - "sub %%g0, %%o0, %0\n\t" \ - "movcc %%xcc, %%o0, %0\n\t" \ - : "=r" (__res), "=&r" (__o0) \ - : "1" (__o0), "r" (__o1), "r" (__o2), "r" (__g1) \ - : "cc"); \ -if (__res>=0) \ - return (type) __res; \ -errno = -__res; \ -return -1; \ -} - -#define _syscall4(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4) \ -type name (type1 arg1, type2 arg2, type3 arg3, type4 arg4) \ -{ \ -long __res; \ -register long __g1 __asm__ ("g1") = __NR_##name; \ -register long __o0 __asm__ ("o0") = (long)(arg1); \ -register long __o1 __asm__ ("o1") = (long)(arg2); \ -register long __o2 __asm__ ("o2") = (long)(arg3); \ -register long __o3 __asm__ ("o3") = (long)(arg4); \ -__asm__ __volatile__ ("t 0x6d\n\t" \ - "sub %%g0, %%o0, %0\n\t" \ - "movcc %%xcc, %%o0, %0\n\t" \ - : "=r" (__res), "=&r" (__o0) \ - : "1" (__o0), "r" (__o1), "r" (__o2), "r" (__o3), "r" (__g1) \ - : "cc"); \ -if (__res>=0) \ - return (type) __res; \ -errno = -__res; \ -return -1; \ -} - -#define _syscall5(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4, \ - type5,arg5) \ -type name (type1 arg1,type2 arg2,type3 arg3,type4 arg4,type5 arg5) \ -{ \ -long __res; \ -register long __g1 __asm__ ("g1") = __NR_##name; \ -register long __o0 __asm__ ("o0") = (long)(arg1); \ -register long __o1 __asm__ ("o1") = (long)(arg2); \ -register long __o2 __asm__ ("o2") = (long)(arg3); \ -register long __o3 __asm__ ("o3") = (long)(arg4); \ -register long __o4 __asm__ ("o4") = (long)(arg5); \ -__asm__ __volatile__ ("t 0x6d\n\t" \ - "sub %%g0, %%o0, %0\n\t" \ - "movcc %%xcc, %%o0, %0\n\t" \ - : "=r" (__res), "=&r" (__o0) \ - : "1" (__o0), "r" (__o1), "r" (__o2), "r" (__o3), "r" (__o4), "r" (__g1) \ - : "cc"); \ -if (__res>=0) \ - return (type) __res; \ -errno = -__res; \ -return -1; \ -} - /* sysconf options, for SunOS compatibility */ #define _SC_ARG_MAX 1 #define _SC_CHILD_MAX 2 diff --git a/include/asm-um/bug.h b/include/asm-um/bug.h index 1e22fa26ff0..3357c5e2468 100644 --- a/include/asm-um/bug.h +++ b/include/asm-um/bug.h @@ -1,4 +1,6 @@ #ifndef __UM_BUG_H #define __UM_BUG_H -#include <asm-generic/bug.h> + +#include <asm/arch/bug.h> + #endif diff --git a/include/asm-um/device.h b/include/asm-um/device.h new file mode 100644 index 00000000000..d8f9872b0e2 --- /dev/null +++ b/include/asm-um/device.h @@ -0,0 +1,7 @@ +/* + * Arch specific extensions to struct device + * + * This file is released under the GPLv2 + */ +#include <asm-generic/device.h> + diff --git a/include/asm-um/dma-mapping.h b/include/asm-um/dma-mapping.h index babd2989511..f0ee4fb5591 100644 --- a/include/asm-um/dma-mapping.h +++ b/include/asm-um/dma-mapping.h @@ -94,7 +94,7 @@ dma_sync_sg(struct device *dev, struct scatterlist *sg, int nelems, #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) -#define dma_is_consistent(d) (1) +#define dma_is_consistent(d, h) (1) static inline int dma_get_cache_alignment(void) @@ -112,7 +112,7 @@ dma_sync_single_range(struct device *dev, dma_addr_t dma_handle, } static inline void -dma_cache_sync(void *vaddr, size_t size, +dma_cache_sync(struct device *dev, void *vaddr, size_t size, enum dma_data_direction direction) { BUG(); diff --git a/include/asm-v850/cacheflush.h b/include/asm-v850/cacheflush.h index e1a87f82f1a..9ece05a202e 100644 --- a/include/asm-v850/cacheflush.h +++ b/include/asm-v850/cacheflush.h @@ -24,6 +24,7 @@ systems with MMUs, so we don't need them. */ #define flush_cache_all() ((void)0) #define flush_cache_mm(mm) ((void)0) +#define flush_cache_dup_mm(mm) ((void)0) #define flush_cache_range(vma, start, end) ((void)0) #define flush_cache_page(vma, vmaddr, pfn) ((void)0) #define flush_dcache_page(page) ((void)0) diff --git a/include/asm-v850/checksum.h b/include/asm-v850/checksum.h index 4df5e71098f..d1dddd93826 100644 --- a/include/asm-v850/checksum.h +++ b/include/asm-v850/checksum.h @@ -26,8 +26,7 @@ * * it's best to have buff aligned on a 32-bit boundary */ -extern unsigned int csum_partial (const unsigned char * buff, int len, - unsigned int sum); +extern __wsum csum_partial(const void *buff, int len, __wsum sum); /* * the same as csum_partial, but copies from src while it @@ -36,8 +35,8 @@ extern unsigned int csum_partial (const unsigned char * buff, int len, * here even more important to align src and dst on a 32-bit (or even * better 64-bit) boundary */ -extern unsigned csum_partial_copy (const unsigned char *src, - unsigned char *dst, int len, unsigned sum); +extern __wsum csum_partial_copy_nocheck(const void *src, + void *dst, int len, __wsum sum); /* @@ -46,20 +45,17 @@ extern unsigned csum_partial_copy (const unsigned char *src, * here even more important to align src and dst on a 32-bit (or even * better 64-bit) boundary */ -extern unsigned csum_partial_copy_from_user (const unsigned char *src, - unsigned char *dst, - int len, unsigned sum, +extern __wsum csum_partial_copy_from_user (const void *src, + void *dst, + int len, __wsum sum, int *csum_err); -#define csum_partial_copy_nocheck(src, dst, len, sum) \ - csum_partial_copy ((src), (dst), (len), (sum)) - -unsigned short ip_fast_csum (unsigned char *iph, unsigned int ihl); +__sum16 ip_fast_csum(const void *iph, unsigned int ihl); /* * Fold a partial checksum */ -static inline unsigned int csum_fold (unsigned long sum) +static inline __sum16 csum_fold (__wsum sum) { unsigned int result; /* @@ -68,7 +64,7 @@ static inline unsigned int csum_fold (unsigned long sum) add %1, %0 H L H+L+C H+L */ asm ("hsw %1, %0; add %1, %0" : "=&r" (result) : "r" (sum)); - return (~result) >> 16; + return (__force __sum16)(~result >> 16); } @@ -76,10 +72,10 @@ static inline unsigned int csum_fold (unsigned long sum) * computes the checksum of the TCP/UDP pseudo-header * returns a 16-bit checksum, already complemented */ -static inline unsigned int -csum_tcpudp_nofold (unsigned long saddr, unsigned long daddr, +static inline __wsum +csum_tcpudp_nofold (__be32 saddr, __be32 daddr, unsigned short len, - unsigned short proto, unsigned int sum) + unsigned short proto, __wsum sum) { int __carry; __asm__ ("add %2, %0;" @@ -93,15 +89,15 @@ csum_tcpudp_nofold (unsigned long saddr, unsigned long daddr, "add %1, %0" : "=&r" (sum), "=&r" (__carry) : "r" (daddr), "r" (saddr), - "r" (ntohs (len) + (proto << 8)), + "r" ((len + proto) << 8), "0" (sum)); return sum; } -static inline unsigned short int -csum_tcpudp_magic (unsigned long saddr, unsigned long daddr, +static inline __sum16 +csum_tcpudp_magic (__be32 saddr, __be32 daddr, unsigned short len, - unsigned short proto, unsigned int sum) + unsigned short proto, __wsum sum) { return csum_fold (csum_tcpudp_nofold (saddr, daddr, len, proto, sum)); } @@ -110,7 +106,7 @@ csum_tcpudp_magic (unsigned long saddr, unsigned long daddr, * this routine is used for miscellaneous IP-like checksums, mainly * in icmp.c */ -extern unsigned short ip_compute_csum (const unsigned char * buff, int len); +extern __sum16 ip_compute_csum(const void *buff, int len); #endif /* __V850_CHECKSUM_H__ */ diff --git a/include/asm-v850/device.h b/include/asm-v850/device.h new file mode 100644 index 00000000000..d8f9872b0e2 --- /dev/null +++ b/include/asm-v850/device.h @@ -0,0 +1,7 @@ +/* + * Arch specific extensions to struct device + * + * This file is released under the GPLv2 + */ +#include <asm-generic/device.h> + diff --git a/include/asm-v850/irq.h b/include/asm-v850/irq.h index 1bf096db8f4..88687c181f0 100644 --- a/include/asm-v850/irq.h +++ b/include/asm-v850/irq.h @@ -46,8 +46,6 @@ extern void init_irq_handlers (int base_irq, int num, int interval, struct hw_interrupt_type *irq_type); -typedef void (*irq_handler_t)(int irq, void *data, struct pt_regs *regs); - /* Handle interrupt IRQ. REGS are the registers at the time of ther interrupt. */ extern unsigned int handle_irq (int irq, struct pt_regs *regs); diff --git a/include/asm-v850/termbits.h b/include/asm-v850/termbits.h index 212d4e27926..f3b43303208 100644 --- a/include/asm-v850/termbits.h +++ b/include/asm-v850/termbits.h @@ -17,6 +17,17 @@ struct termios { cc_t c_cc[NCCS]; /* control characters */ }; +struct ktermios { + tcflag_t c_iflag; /* input mode flags */ + tcflag_t c_oflag; /* output mode flags */ + tcflag_t c_cflag; /* control mode flags */ + tcflag_t c_lflag; /* local mode flags */ + cc_t c_line; /* line discipline */ + cc_t c_cc[NCCS]; /* control characters */ + speed_t c_ispeed; /* input speed */ + speed_t c_ospeed; /* output speed */ +}; + /* c_cc characters */ #define VINTR 0 #define VQUIT 1 diff --git a/include/asm-v850/unistd.h b/include/asm-v850/unistd.h index 737401e7d3a..2241ed45ecf 100644 --- a/include/asm-v850/unistd.h +++ b/include/asm-v850/unistd.h @@ -204,168 +204,8 @@ #define __NR_gettid 201 #define __NR_tkill 202 - -/* Syscall protocol: - Syscall number in r12, args in r6-r9, r13-r14 - Return value in r10 - Trap 0 for `short' syscalls, where all the args can fit in function - call argument registers, and trap 1 when there are additional args in - r13-r14. */ - -#define SYSCALL_NUM "r12" -#define SYSCALL_ARG0 "r6" -#define SYSCALL_ARG1 "r7" -#define SYSCALL_ARG2 "r8" -#define SYSCALL_ARG3 "r9" -#define SYSCALL_ARG4 "r13" -#define SYSCALL_ARG5 "r14" -#define SYSCALL_RET "r10" - -#define SYSCALL_SHORT_TRAP "0" -#define SYSCALL_LONG_TRAP "1" - -/* Registers clobbered by any syscall. This _doesn't_ include the syscall - number (r12) or the `extended arg' registers (r13, r14), even though - they are actually clobbered too (this is because gcc's `asm' statement - doesn't allow a clobber to be used as an input or output). */ -#define SYSCALL_CLOBBERS "r1", "r5", "r11", "r15", "r16", \ - "r17", "r18", "r19" - -/* Registers clobbered by a `short' syscall. This includes all clobbers - except the syscall number (r12). */ -#define SYSCALL_SHORT_CLOBBERS SYSCALL_CLOBBERS, "r13", "r14" - #ifdef __KERNEL__ -#include <asm/clinkage.h> -#include <linux/err.h> - -#define __syscall_return(type, res) \ - do { \ - /* user-visible error numbers are in the range -1 - -MAX_ERRNO: \ - see <asm-v850/errno.h> */ \ - if (__builtin_expect ((unsigned long)(res) >= (unsigned long)(-MAX_ERRNO), 0)) { \ - errno = -(res); \ - res = -1; \ - } \ - return (type) (res); \ - } while (0) - - -#define _syscall0(type, name) \ -type name (void) \ -{ \ - register unsigned long __syscall __asm__ (SYSCALL_NUM) = __NR_##name; \ - register unsigned long __ret __asm__ (SYSCALL_RET); \ - __asm__ __volatile__ ("trap " SYSCALL_SHORT_TRAP \ - : "=r" (__ret), "=r" (__syscall) \ - : "1" (__syscall) \ - : SYSCALL_SHORT_CLOBBERS); \ - __syscall_return (type, __ret); \ -} - -#define _syscall1(type, name, atype, a) \ -type name (atype a) \ -{ \ - register atype __a __asm__ (SYSCALL_ARG0) = a; \ - register unsigned long __syscall __asm__ (SYSCALL_NUM) = __NR_##name; \ - register unsigned long __ret __asm__ (SYSCALL_RET); \ - __asm__ __volatile__ ("trap " SYSCALL_SHORT_TRAP \ - : "=r" (__ret), "=r" (__syscall) \ - : "1" (__syscall), "r" (__a) \ - : SYSCALL_SHORT_CLOBBERS); \ - __syscall_return (type, __ret); \ -} - -#define _syscall2(type, name, atype, a, btype, b) \ -type name (atype a, btype b) \ -{ \ - register atype __a __asm__ (SYSCALL_ARG0) = a; \ - register btype __b __asm__ (SYSCALL_ARG1) = b; \ - register unsigned long __syscall __asm__ (SYSCALL_NUM) = __NR_##name; \ - register unsigned long __ret __asm__ (SYSCALL_RET); \ - __asm__ __volatile__ ("trap " SYSCALL_SHORT_TRAP \ - : "=r" (__ret), "=r" (__syscall) \ - : "1" (__syscall), "r" (__a), "r" (__b) \ - : SYSCALL_SHORT_CLOBBERS); \ - __syscall_return (type, __ret); \ -} - -#define _syscall3(type, name, atype, a, btype, b, ctype, c) \ -type name (atype a, btype b, ctype c) \ -{ \ - register atype __a __asm__ (SYSCALL_ARG0) = a; \ - register btype __b __asm__ (SYSCALL_ARG1) = b; \ - register ctype __c __asm__ (SYSCALL_ARG2) = c; \ - register unsigned long __syscall __asm__ (SYSCALL_NUM) = __NR_##name; \ - register unsigned long __ret __asm__ (SYSCALL_RET); \ - __asm__ __volatile__ ("trap " SYSCALL_SHORT_TRAP \ - : "=r" (__ret), "=r" (__syscall) \ - : "1" (__syscall), "r" (__a), "r" (__b), "r" (__c) \ - : SYSCALL_SHORT_CLOBBERS); \ - __syscall_return (type, __ret); \ -} - -#define _syscall4(type, name, atype, a, btype, b, ctype, c, dtype, d) \ -type name (atype a, btype b, ctype c, dtype d) \ -{ \ - register atype __a __asm__ (SYSCALL_ARG0) = a; \ - register btype __b __asm__ (SYSCALL_ARG1) = b; \ - register ctype __c __asm__ (SYSCALL_ARG2) = c; \ - register dtype __d __asm__ (SYSCALL_ARG3) = d; \ - register unsigned long __syscall __asm__ (SYSCALL_NUM) = __NR_##name; \ - register unsigned long __ret __asm__ (SYSCALL_RET); \ - __asm__ __volatile__ ("trap " SYSCALL_SHORT_TRAP \ - : "=r" (__ret), "=r" (__syscall) \ - : "1" (__syscall), \ - "r" (__a), "r" (__b), "r" (__c), "r" (__d) \ - : SYSCALL_SHORT_CLOBBERS); \ - __syscall_return (type, __ret); \ -} - -#define _syscall5(type, name, atype, a, btype, b, ctype, c, dtype, d, etype,e)\ -type name (atype a, btype b, ctype c, dtype d, etype e) \ -{ \ - register atype __a __asm__ (SYSCALL_ARG0) = a; \ - register btype __b __asm__ (SYSCALL_ARG1) = b; \ - register ctype __c __asm__ (SYSCALL_ARG2) = c; \ - register dtype __d __asm__ (SYSCALL_ARG3) = d; \ - register etype __e __asm__ (SYSCALL_ARG4) = e; \ - register unsigned long __syscall __asm__ (SYSCALL_NUM) = __NR_##name; \ - register unsigned long __ret __asm__ (SYSCALL_RET); \ - __asm__ __volatile__ ("trap " SYSCALL_LONG_TRAP \ - : "=r" (__ret), "=r" (__syscall), "=r" (__e) \ - : "1" (__syscall), \ - "r" (__a), "r" (__b), "r" (__c), "r" (__d), "2" (__e) \ - : SYSCALL_CLOBBERS); \ - __syscall_return (type, __ret); \ -} - -#define __SYSCALL6_TRAP(syscall, ret, a, b, c, d, e, f) \ - __asm__ __volatile__ ("trap " SYSCALL_LONG_TRAP \ - : "=r" (ret), "=r" (syscall), \ - "=r" (e), "=r" (f) \ - : "1" (syscall), \ - "r" (a), "r" (b), "r" (c), "r" (d), \ - "2" (e), "3" (f) \ - : SYSCALL_CLOBBERS); - -#define _syscall6(type, name, atype, a, btype, b, ctype, c, dtype, d, etype, e, ftype, f) \ -type name (atype a, btype b, ctype c, dtype d, etype e, ftype f) \ -{ \ - register atype __a __asm__ (SYSCALL_ARG0) = a; \ - register btype __b __asm__ (SYSCALL_ARG1) = b; \ - register ctype __c __asm__ (SYSCALL_ARG2) = c; \ - register dtype __d __asm__ (SYSCALL_ARG3) = d; \ - register etype __e __asm__ (SYSCALL_ARG4) = e; \ - register etype __f __asm__ (SYSCALL_ARG5) = f; \ - register unsigned long __syscall __asm__ (SYSCALL_NUM) = __NR_##name; \ - register unsigned long __ret __asm__ (SYSCALL_RET); \ - __SYSCALL6_TRAP(__syscall, __ret, __a, __b, __c, __d, __e, __f); \ - __syscall_return (type, __ret); \ -} - - #define __ARCH_WANT_IPC_PARSE_VERSION #define __ARCH_WANT_OLD_READDIR #define __ARCH_WANT_STAT64 diff --git a/include/asm-x86_64/Kbuild b/include/asm-x86_64/Kbuild index 1ee9b07f3fe..ebd7117782a 100644 --- a/include/asm-x86_64/Kbuild +++ b/include/asm-x86_64/Kbuild @@ -6,13 +6,11 @@ ALTARCHDEF := defined __i386__ header-y += boot.h header-y += bootsetup.h -header-y += cpufeature.h header-y += debugreg.h header-y += ldt.h header-y += msr.h header-y += prctl.h header-y += ptrace-abi.h -header-y += setup.h header-y += sigcontext32.h header-y += ucontext.h header-y += vsyscall32.h diff --git a/include/asm-x86_64/acpi.h b/include/asm-x86_64/acpi.h index 9d1916e59c0..6b6fc6f8be7 100644 --- a/include/asm-x86_64/acpi.h +++ b/include/asm-x86_64/acpi.h @@ -54,30 +54,8 @@ #define ACPI_ENABLE_IRQS() local_irq_enable() #define ACPI_FLUSH_CPU_CACHE() wbinvd() - -static inline int -__acpi_acquire_global_lock (unsigned int *lock) -{ - unsigned int old, new, val; - do { - old = *lock; - new = (((old & ~0x3) + 2) + ((old >> 1) & 0x1)); - val = cmpxchg(lock, old, new); - } while (unlikely (val != old)); - return (new < 3) ? -1 : 0; -} - -static inline int -__acpi_release_global_lock (unsigned int *lock) -{ - unsigned int old, new, val; - do { - old = *lock; - new = old & ~0x3; - val = cmpxchg(lock, old, new); - } while (unlikely (val != old)); - return old & 0x1; -} +int __acpi_acquire_global_lock(unsigned int *lock); +int __acpi_release_global_lock(unsigned int *lock); #define ACPI_ACQUIRE_GLOBAL_LOCK(GLptr, Acq) \ ((Acq) = __acpi_acquire_global_lock((unsigned int *) GLptr)) diff --git a/include/asm-x86_64/alternative.h b/include/asm-x86_64/alternative.h index a584826cc57..a6657b4f3e0 100644 --- a/include/asm-x86_64/alternative.h +++ b/include/asm-x86_64/alternative.h @@ -4,6 +4,7 @@ #ifdef __KERNEL__ #include <linux/types.h> +#include <linux/stddef.h> #include <asm/cpufeature.h> struct alt_instr { @@ -133,4 +134,15 @@ static inline void alternatives_smp_switch(int smp) {} #define LOCK_PREFIX "" #endif +struct paravirt_patch; +#ifdef CONFIG_PARAVIRT +void apply_paravirt(struct paravirt_patch *start, struct paravirt_patch *end); +#else +static inline void +apply_paravirt(struct paravirt_patch *start, struct paravirt_patch *end) +{} +#define __start_parainstructions NULL +#define __stop_parainstructions NULL +#endif + #endif /* _X86_64_ALTERNATIVE_H */ diff --git a/include/asm-x86_64/atomic.h b/include/asm-x86_64/atomic.h index 007e88d6d43..706ca4b6000 100644 --- a/include/asm-x86_64/atomic.h +++ b/include/asm-x86_64/atomic.h @@ -21,7 +21,7 @@ * on us. We need to use _exactly_ the address the user gave us, * not some alias that contains the same information. */ -typedef struct { volatile int counter; } atomic_t; +typedef struct { int counter; } atomic_t; #define ATOMIC_INIT(i) { (i) } @@ -189,9 +189,9 @@ static __inline__ int atomic_add_return(int i, atomic_t *v) { int __i = i; __asm__ __volatile__( - LOCK_PREFIX "xaddl %0, %1;" - :"=r"(i) - :"m"(v->counter), "0"(i)); + LOCK_PREFIX "xaddl %0, %1" + :"+r" (i), "+m" (v->counter) + : : "memory"); return i + __i; } diff --git a/include/asm-x86_64/bitops.h b/include/asm-x86_64/bitops.h index 5b535eaf530..8da9609070f 100644 --- a/include/asm-x86_64/bitops.h +++ b/include/asm-x86_64/bitops.h @@ -7,7 +7,13 @@ #include <asm/alternative.h> -#define ADDR (*(volatile long *) addr) +#if __GNUC__ < 4 || __GNUC_MINOR__ < 1 +/* Technically wrong, but this avoids compilation errors on some gcc + versions. */ +#define ADDR "=m" (*(volatile long *) addr) +#else +#define ADDR "+m" (*(volatile long *) addr) +#endif /** * set_bit - Atomically set a bit in memory @@ -23,7 +29,7 @@ static __inline__ void set_bit(int nr, volatile void * addr) { __asm__ __volatile__( LOCK_PREFIX "btsl %1,%0" - :"+m" (ADDR) + :ADDR :"dIr" (nr) : "memory"); } @@ -40,7 +46,7 @@ static __inline__ void __set_bit(int nr, volatile void * addr) { __asm__ volatile( "btsl %1,%0" - :"+m" (ADDR) + :ADDR :"dIr" (nr) : "memory"); } @@ -58,7 +64,7 @@ static __inline__ void clear_bit(int nr, volatile void * addr) { __asm__ __volatile__( LOCK_PREFIX "btrl %1,%0" - :"+m" (ADDR) + :ADDR :"dIr" (nr)); } @@ -66,7 +72,7 @@ static __inline__ void __clear_bit(int nr, volatile void * addr) { __asm__ __volatile__( "btrl %1,%0" - :"+m" (ADDR) + :ADDR :"dIr" (nr)); } @@ -86,7 +92,7 @@ static __inline__ void __change_bit(int nr, volatile void * addr) { __asm__ __volatile__( "btcl %1,%0" - :"+m" (ADDR) + :ADDR :"dIr" (nr)); } @@ -103,7 +109,7 @@ static __inline__ void change_bit(int nr, volatile void * addr) { __asm__ __volatile__( LOCK_PREFIX "btcl %1,%0" - :"+m" (ADDR) + :ADDR :"dIr" (nr)); } @@ -121,7 +127,7 @@ static __inline__ int test_and_set_bit(int nr, volatile void * addr) __asm__ __volatile__( LOCK_PREFIX "btsl %2,%1\n\tsbbl %0,%0" - :"=r" (oldbit),"+m" (ADDR) + :"=r" (oldbit),ADDR :"dIr" (nr) : "memory"); return oldbit; } @@ -141,7 +147,7 @@ static __inline__ int __test_and_set_bit(int nr, volatile void * addr) __asm__( "btsl %2,%1\n\tsbbl %0,%0" - :"=r" (oldbit),"+m" (ADDR) + :"=r" (oldbit),ADDR :"dIr" (nr)); return oldbit; } @@ -160,7 +166,7 @@ static __inline__ int test_and_clear_bit(int nr, volatile void * addr) __asm__ __volatile__( LOCK_PREFIX "btrl %2,%1\n\tsbbl %0,%0" - :"=r" (oldbit),"+m" (ADDR) + :"=r" (oldbit),ADDR :"dIr" (nr) : "memory"); return oldbit; } @@ -180,7 +186,7 @@ static __inline__ int __test_and_clear_bit(int nr, volatile void * addr) __asm__( "btrl %2,%1\n\tsbbl %0,%0" - :"=r" (oldbit),"+m" (ADDR) + :"=r" (oldbit),ADDR :"dIr" (nr)); return oldbit; } @@ -192,7 +198,7 @@ static __inline__ int __test_and_change_bit(int nr, volatile void * addr) __asm__ __volatile__( "btcl %2,%1\n\tsbbl %0,%0" - :"=r" (oldbit),"+m" (ADDR) + :"=r" (oldbit),ADDR :"dIr" (nr) : "memory"); return oldbit; } @@ -211,7 +217,7 @@ static __inline__ int test_and_change_bit(int nr, volatile void * addr) __asm__ __volatile__( LOCK_PREFIX "btcl %2,%1\n\tsbbl %0,%0" - :"=r" (oldbit),"+m" (ADDR) + :"=r" (oldbit),ADDR :"dIr" (nr) : "memory"); return oldbit; } @@ -237,7 +243,7 @@ static __inline__ int variable_test_bit(int nr, volatile const void * addr) __asm__ __volatile__( "btl %2,%1\n\tsbbl %0,%0" :"=r" (oldbit) - :"m" (ADDR),"dIr" (nr)); + :"m" (*(volatile long *)addr),"dIr" (nr)); return oldbit; } diff --git a/include/asm-x86_64/bug.h b/include/asm-x86_64/bug.h index 80ac1fe966a..68260641491 100644 --- a/include/asm-x86_64/bug.h +++ b/include/asm-x86_64/bug.h @@ -1,30 +1,30 @@ #ifndef __ASM_X8664_BUG_H #define __ASM_X8664_BUG_H 1 -#include <linux/stringify.h> - -/* - * Tell the user there is some problem. The exception handler decodes - * this frame. - */ -struct bug_frame { - unsigned char ud2[2]; - unsigned char push; - signed int filename; - unsigned char ret; - unsigned short line; -} __attribute__((packed)); - #ifdef CONFIG_BUG #define HAVE_ARCH_BUG -/* We turn the bug frame into valid instructions to not confuse - the disassembler. Thanks to Jan Beulich & Suresh Siddha - for nice instruction selection. - The magic numbers generate mov $64bitimm,%eax ; ret $offset. */ -#define BUG() \ - asm volatile( \ - "ud2 ; pushq $%c1 ; ret $%c0" :: \ - "i"(__LINE__), "i" (__FILE__)) + +#ifdef CONFIG_DEBUG_BUGVERBOSE +#define BUG() \ + do { \ + asm volatile("1:\tud2\n" \ + ".pushsection __bug_table,\"a\"\n" \ + "2:\t.quad 1b, %c0\n" \ + "\t.word %c1, 0\n" \ + "\t.org 2b+%c2\n" \ + ".popsection" \ + : : "i" (__FILE__), "i" (__LINE__), \ + "i" (sizeof(struct bug_entry))); \ + for(;;) ; \ + } while(0) +#else +#define BUG() \ + do { \ + asm volatile("ud2"); \ + for(;;) ; \ + } while(0) +#endif + void out_of_line_bug(void); #else static inline void out_of_line_bug(void) { } diff --git a/include/asm-x86_64/cacheflush.h b/include/asm-x86_64/cacheflush.h index d32f7f58752..ab1cb5c7dc9 100644 --- a/include/asm-x86_64/cacheflush.h +++ b/include/asm-x86_64/cacheflush.h @@ -7,6 +7,7 @@ /* Caches aren't brain-dead on the intel. */ #define flush_cache_all() do { } while (0) #define flush_cache_mm(mm) do { } while (0) +#define flush_cache_dup_mm(mm) do { } while (0) #define flush_cache_range(vma, start, end) do { } while (0) #define flush_cache_page(vma, vmaddr, pfn) do { } while (0) #define flush_dcache_page(page) do { } while (0) diff --git a/include/asm-x86_64/calgary.h b/include/asm-x86_64/calgary.h index 6b93f5a3a5c..7ee90064571 100644 --- a/include/asm-x86_64/calgary.h +++ b/include/asm-x86_64/calgary.h @@ -51,6 +51,8 @@ struct iommu_table { #define TCE_TABLE_SIZE_4M 6 #define TCE_TABLE_SIZE_8M 7 +extern int use_calgary; + #ifdef CONFIG_CALGARY_IOMMU extern int calgary_iommu_init(void); extern void detect_calgary(void); diff --git a/include/asm-x86_64/checksum.h b/include/asm-x86_64/checksum.h index 989469e8e0b..419fe88a034 100644 --- a/include/asm-x86_64/checksum.h +++ b/include/asm-x86_64/checksum.h @@ -19,15 +19,16 @@ * the last step before putting a checksum into a packet. * Make sure not to mix with 64bit checksums. */ -static inline unsigned int csum_fold(unsigned int sum) +static inline __sum16 csum_fold(__wsum sum) { __asm__( " addl %1,%0\n" " adcl $0xffff,%0" : "=r" (sum) - : "r" (sum << 16), "0" (sum & 0xffff0000) + : "r" ((__force u32)sum << 16), + "0" ((__force u32)sum & 0xffff0000) ); - return (~sum) >> 16; + return (__force __sum16)(~(__force u32)sum >> 16); } /* @@ -43,7 +44,7 @@ static inline unsigned int csum_fold(unsigned int sum) * iph: ipv4 header * ihl: length of header / 4 */ -static inline unsigned short ip_fast_csum(unsigned char *iph, unsigned int ihl) +static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl) { unsigned int sum; @@ -70,7 +71,7 @@ static inline unsigned short ip_fast_csum(unsigned char *iph, unsigned int ihl) : "=r" (sum), "=r" (iph), "=r" (ihl) : "1" (iph), "2" (ihl) : "memory"); - return(sum); + return (__force __sum16)sum; } /** @@ -84,16 +85,17 @@ static inline unsigned short ip_fast_csum(unsigned char *iph, unsigned int ihl) * Returns the pseudo header checksum the input data. Result is * 32bit unfolded. */ -static inline unsigned long -csum_tcpudp_nofold(unsigned saddr, unsigned daddr, unsigned short len, - unsigned short proto, unsigned int sum) +static inline __wsum +csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len, + unsigned short proto, __wsum sum) { asm(" addl %1, %0\n" " adcl %2, %0\n" " adcl %3, %0\n" " adcl $0, %0\n" : "=r" (sum) - : "g" (daddr), "g" (saddr), "g" ((ntohs(len)<<16)+proto*256), "0" (sum)); + : "g" (daddr), "g" (saddr), + "g" ((len + proto)<<8), "0" (sum)); return sum; } @@ -109,9 +111,9 @@ csum_tcpudp_nofold(unsigned saddr, unsigned daddr, unsigned short len, * Returns the 16bit pseudo header checksum the input data already * complemented and ready to be filled in. */ -static inline unsigned short int -csum_tcpudp_magic(unsigned long saddr, unsigned long daddr, - unsigned short len, unsigned short proto, unsigned int sum) +static inline __sum16 +csum_tcpudp_magic(__be32 saddr, __be32 daddr, + unsigned short len, unsigned short proto, __wsum sum) { return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum)); } @@ -126,25 +128,25 @@ csum_tcpudp_magic(unsigned long saddr, unsigned long daddr, * Before filling it in it needs to be csum_fold()'ed. * buff should be aligned to a 64bit boundary if possible. */ -extern unsigned int csum_partial(const unsigned char *buff, unsigned len, unsigned int sum); +extern __wsum csum_partial(const void *buff, int len, __wsum sum); #define _HAVE_ARCH_COPY_AND_CSUM_FROM_USER 1 #define HAVE_CSUM_COPY_USER 1 /* Do not call this directly. Use the wrappers below */ -extern unsigned long csum_partial_copy_generic(const unsigned char *src, const unsigned char *dst, - unsigned len, - unsigned sum, +extern __wsum csum_partial_copy_generic(const void *src, const void *dst, + int len, + __wsum sum, int *src_err_ptr, int *dst_err_ptr); -extern unsigned int csum_partial_copy_from_user(const unsigned char __user *src, unsigned char *dst, - int len, unsigned int isum, int *errp); -extern unsigned int csum_partial_copy_to_user(const unsigned char *src, unsigned char __user *dst, - int len, unsigned int isum, int *errp); -extern unsigned int csum_partial_copy_nocheck(const unsigned char *src, unsigned char *dst, int len, - unsigned int sum); +extern __wsum csum_partial_copy_from_user(const void __user *src, void *dst, + int len, __wsum isum, int *errp); +extern __wsum csum_partial_copy_to_user(const void *src, void __user *dst, + int len, __wsum isum, int *errp); +extern __wsum csum_partial_copy_nocheck(const void *src, void *dst, int len, + __wsum sum); /* Old names. To be removed. */ #define csum_and_copy_to_user csum_partial_copy_to_user @@ -158,7 +160,7 @@ extern unsigned int csum_partial_copy_nocheck(const unsigned char *src, unsigned * Returns the 16bit folded/inverted checksum of the passed buffer. * Ready to fill in. */ -extern unsigned short ip_compute_csum(unsigned char * buff, int len); +extern __sum16 ip_compute_csum(const void *buff, int len); /** * csum_ipv6_magic - Compute checksum of an IPv6 pseudo header. @@ -176,9 +178,9 @@ extern unsigned short ip_compute_csum(unsigned char * buff, int len); struct in6_addr; #define _HAVE_ARCH_IPV6_CSUM 1 -extern unsigned short -csum_ipv6_magic(struct in6_addr *saddr, struct in6_addr *daddr, - __u32 len, unsigned short proto, unsigned int sum); +extern __sum16 +csum_ipv6_magic(const struct in6_addr *saddr, const struct in6_addr *daddr, + __u32 len, unsigned short proto, __wsum sum); static inline unsigned add32_with_carry(unsigned a, unsigned b) { diff --git a/include/asm-x86_64/cpufeature.h b/include/asm-x86_64/cpufeature.h index ee792faaca0..0b3c686139f 100644 --- a/include/asm-x86_64/cpufeature.h +++ b/include/asm-x86_64/cpufeature.h @@ -29,7 +29,7 @@ #define X86_FEATURE_PSE36 (0*32+17) /* 36-bit PSEs */ #define X86_FEATURE_PN (0*32+18) /* Processor serial number */ #define X86_FEATURE_CLFLSH (0*32+19) /* Supports the CLFLUSH instruction */ -#define X86_FEATURE_DTES (0*32+21) /* Debug Trace Store */ +#define X86_FEATURE_DS (0*32+21) /* Debug Store */ #define X86_FEATURE_ACPI (0*32+22) /* ACPI via MSR */ #define X86_FEATURE_MMX (0*32+23) /* Multimedia Extensions */ #define X86_FEATURE_FXSR (0*32+24) /* FXSAVE and FXRSTOR instructions (fast save and restore */ @@ -68,6 +68,8 @@ #define X86_FEATURE_FXSAVE_LEAK (3*32+7) /* FIP/FOP/FDP leaks through FXSAVE */ #define X86_FEATURE_UP (3*32+8) /* SMP kernel running on UP */ #define X86_FEATURE_ARCH_PERFMON (3*32+9) /* Intel Architectural PerfMon */ +#define X86_FEATURE_PEBS (3*32+10) /* Precise-Event Based Sampling */ +#define X86_FEATURE_BTS (3*32+11) /* Branch Trace Store */ /* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */ #define X86_FEATURE_XMM3 (4*32+ 0) /* Streaming SIMD Extensions-3 */ @@ -112,5 +114,8 @@ #define cpu_has_cyrix_arr 0 #define cpu_has_centaur_mcr 0 #define cpu_has_clflush boot_cpu_has(X86_FEATURE_CLFLSH) +#define cpu_has_ds boot_cpu_has(X86_FEATURE_DS) +#define cpu_has_pebs boot_cpu_has(X86_FEATURE_PEBS) +#define cpu_has_bts boot_cpu_has(X86_FEATURE_BTS) #endif /* __ASM_X8664_CPUFEATURE_H */ diff --git a/include/asm-x86_64/delay.h b/include/asm-x86_64/delay.h index 65f64acc531..c2669f1f552 100644 --- a/include/asm-x86_64/delay.h +++ b/include/asm-x86_64/delay.h @@ -7,18 +7,21 @@ * Delay routines calling functions in arch/x86_64/lib/delay.c */ +/* Undefined functions to get compile-time errors */ extern void __bad_udelay(void); extern void __bad_ndelay(void); extern void __udelay(unsigned long usecs); -extern void __ndelay(unsigned long usecs); +extern void __ndelay(unsigned long nsecs); extern void __const_udelay(unsigned long usecs); extern void __delay(unsigned long loops); +/* 0x10c7 is 2**32 / 1000000 (rounded up) */ #define udelay(n) (__builtin_constant_p(n) ? \ - ((n) > 20000 ? __bad_udelay() : __const_udelay((n) * 0x10c6ul)) : \ + ((n) > 20000 ? __bad_udelay() : __const_udelay((n) * 0x10c7ul)) : \ __udelay(n)) +/* 0x5 is 2**32 / 1000000000 (rounded up) */ #define ndelay(n) (__builtin_constant_p(n) ? \ ((n) > 20000 ? __bad_ndelay() : __const_udelay((n) * 5ul)) : \ __ndelay(n)) diff --git a/include/asm-x86_64/desc.h b/include/asm-x86_64/desc.h index eb7723a4679..913d6ac0003 100644 --- a/include/asm-x86_64/desc.h +++ b/include/asm-x86_64/desc.h @@ -9,64 +9,13 @@ #include <linux/string.h> #include <linux/smp.h> +#include <asm/desc_defs.h> #include <asm/segment.h> #include <asm/mmu.h> -// 8 byte segment descriptor -struct desc_struct { - u16 limit0; - u16 base0; - unsigned base1 : 8, type : 4, s : 1, dpl : 2, p : 1; - unsigned limit : 4, avl : 1, l : 1, d : 1, g : 1, base2 : 8; -} __attribute__((packed)); - -struct n_desc_struct { - unsigned int a,b; -}; - extern struct desc_struct cpu_gdt_table[GDT_ENTRIES]; -enum { - GATE_INTERRUPT = 0xE, - GATE_TRAP = 0xF, - GATE_CALL = 0xC, -}; - -// 16byte gate -struct gate_struct { - u16 offset_low; - u16 segment; - unsigned ist : 3, zero0 : 5, type : 5, dpl : 2, p : 1; - u16 offset_middle; - u32 offset_high; - u32 zero1; -} __attribute__((packed)); - -#define PTR_LOW(x) ((unsigned long)(x) & 0xFFFF) -#define PTR_MIDDLE(x) (((unsigned long)(x) >> 16) & 0xFFFF) -#define PTR_HIGH(x) ((unsigned long)(x) >> 32) - -enum { - DESC_TSS = 0x9, - DESC_LDT = 0x2, -}; - -// LDT or TSS descriptor in the GDT. 16 bytes. -struct ldttss_desc { - u16 limit0; - u16 base0; - unsigned base1 : 8, type : 5, dpl : 2, p : 1; - unsigned limit1 : 4, zero0 : 3, g : 1, base2 : 8; - u32 base3; - u32 zero1; -} __attribute__((packed)); - -struct desc_ptr { - unsigned short size; - unsigned long address; -} __attribute__((packed)) ; - #define load_TR_desc() asm volatile("ltr %w0"::"r" (GDT_ENTRY_TSS*8)) #define load_LDT_desc() asm volatile("lldt %w0"::"r" (GDT_ENTRY_LDT*8)) #define clear_LDT() asm volatile("lldt %w0"::"r" (0)) diff --git a/include/asm-x86_64/desc_defs.h b/include/asm-x86_64/desc_defs.h new file mode 100644 index 00000000000..08900407009 --- /dev/null +++ b/include/asm-x86_64/desc_defs.h @@ -0,0 +1,69 @@ +/* Written 2000 by Andi Kleen */ +#ifndef __ARCH_DESC_DEFS_H +#define __ARCH_DESC_DEFS_H + +/* + * Segment descriptor structure definitions, usable from both x86_64 and i386 + * archs. + */ + +#ifndef __ASSEMBLY__ + +#include <linux/types.h> + +// 8 byte segment descriptor +struct desc_struct { + u16 limit0; + u16 base0; + unsigned base1 : 8, type : 4, s : 1, dpl : 2, p : 1; + unsigned limit : 4, avl : 1, l : 1, d : 1, g : 1, base2 : 8; +} __attribute__((packed)); + +struct n_desc_struct { + unsigned int a,b; +}; + +enum { + GATE_INTERRUPT = 0xE, + GATE_TRAP = 0xF, + GATE_CALL = 0xC, +}; + +// 16byte gate +struct gate_struct { + u16 offset_low; + u16 segment; + unsigned ist : 3, zero0 : 5, type : 5, dpl : 2, p : 1; + u16 offset_middle; + u32 offset_high; + u32 zero1; +} __attribute__((packed)); + +#define PTR_LOW(x) ((unsigned long)(x) & 0xFFFF) +#define PTR_MIDDLE(x) (((unsigned long)(x) >> 16) & 0xFFFF) +#define PTR_HIGH(x) ((unsigned long)(x) >> 32) + +enum { + DESC_TSS = 0x9, + DESC_LDT = 0x2, +}; + +// LDT or TSS descriptor in the GDT. 16 bytes. +struct ldttss_desc { + u16 limit0; + u16 base0; + unsigned base1 : 8, type : 5, dpl : 2, p : 1; + unsigned limit1 : 4, zero0 : 3, g : 1, base2 : 8; + u32 base3; + u32 zero1; +} __attribute__((packed)); + +struct desc_ptr { + unsigned short size; + unsigned long address; +} __attribute__((packed)) ; + + +#endif /* !__ASSEMBLY__ */ + +#endif diff --git a/include/asm-x86_64/device.h b/include/asm-x86_64/device.h new file mode 100644 index 00000000000..3afa03f33a3 --- /dev/null +++ b/include/asm-x86_64/device.h @@ -0,0 +1,15 @@ +/* + * Arch specific extensions to struct device + * + * This file is released under the GPLv2 + */ +#ifndef _ASM_X86_64_DEVICE_H +#define _ASM_X86_64_DEVICE_H + +struct dev_archdata { +#ifdef CONFIG_ACPI + void *acpi_handle; +#endif +}; + +#endif /* _ASM_X86_64_DEVICE_H */ diff --git a/include/asm-x86_64/dma-mapping.h b/include/asm-x86_64/dma-mapping.h index 10174b110a5..be9ec689072 100644 --- a/include/asm-x86_64/dma-mapping.h +++ b/include/asm-x86_64/dma-mapping.h @@ -180,12 +180,13 @@ static inline int dma_get_cache_alignment(void) return boot_cpu_data.x86_clflush_size; } -#define dma_is_consistent(h) 1 +#define dma_is_consistent(d, h) 1 extern int dma_set_mask(struct device *dev, u64 mask); static inline void -dma_cache_sync(void *vaddr, size_t size, enum dma_data_direction dir) +dma_cache_sync(struct device *dev, void *vaddr, size_t size, + enum dma_data_direction dir) { flush_write_buffers(); } diff --git a/include/asm-x86_64/elf.h b/include/asm-x86_64/elf.h index a406fcb1e92..6d24ea7c4d9 100644 --- a/include/asm-x86_64/elf.h +++ b/include/asm-x86_64/elf.h @@ -45,7 +45,6 @@ typedef struct user_i387_struct elf_fpregset_t; #ifdef __KERNEL__ #include <asm/processor.h> -#include <asm/compat.h> /* * This is used to ensure we don't load something for the wrong architecture. diff --git a/include/asm-x86_64/futex.h b/include/asm-x86_64/futex.h index 9804bf07b09..5cdfb08013c 100644 --- a/include/asm-x86_64/futex.h +++ b/include/asm-x86_64/futex.h @@ -55,7 +55,7 @@ futex_atomic_op_inuser (int encoded_op, int __user *uaddr) if (! access_ok (VERIFY_WRITE, uaddr, sizeof(int))) return -EFAULT; - inc_preempt_count(); + pagefault_disable(); switch (op) { case FUTEX_OP_SET: @@ -78,7 +78,7 @@ futex_atomic_op_inuser (int encoded_op, int __user *uaddr) ret = -ENOSYS; } - dec_preempt_count(); + pagefault_enable(); if (!ret) { switch (cmp) { diff --git a/include/asm-x86_64/genapic.h b/include/asm-x86_64/genapic.h index a0e9a4b9348..b80f4bb5f27 100644 --- a/include/asm-x86_64/genapic.h +++ b/include/asm-x86_64/genapic.h @@ -30,6 +30,6 @@ struct genapic { }; -extern struct genapic *genapic; +extern struct genapic *genapic, *genapic_force, apic_flat; #endif diff --git a/include/asm-x86_64/ioctls.h b/include/asm-x86_64/ioctls.h index 62caf8b6e4e..3fc0b15a0d7 100644 --- a/include/asm-x86_64/ioctls.h +++ b/include/asm-x86_64/ioctls.h @@ -46,6 +46,10 @@ #define TIOCSBRK 0x5427 /* BSD compatibility */ #define TIOCCBRK 0x5428 /* BSD compatibility */ #define TIOCGSID 0x5429 /* Return the session ID of FD */ +#define TCGETS2 _IOR('T',0x2A, struct termios2) +#define TCSETS2 _IOW('T',0x2B, struct termios2) +#define TCSETSW2 _IOW('T',0x2C, struct termios2) +#define TCSETSF2 _IOW('T',0x2D, struct termios2) #define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */ #define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */ diff --git a/include/asm-x86_64/msr.h b/include/asm-x86_64/msr.h index 37e194169fa..3227bc93d69 100644 --- a/include/asm-x86_64/msr.h +++ b/include/asm-x86_64/msr.h @@ -169,8 +169,8 @@ static inline unsigned int cpuid_edx(unsigned int op) #define MSR_LSTAR 0xc0000082 /* long mode SYSCALL target */ #define MSR_CSTAR 0xc0000083 /* compatibility mode SYSCALL target */ #define MSR_SYSCALL_MASK 0xc0000084 /* EFLAGS mask for syscall */ -#define MSR_FS_BASE 0xc0000100 /* 64bit GS base */ -#define MSR_GS_BASE 0xc0000101 /* 64bit FS base */ +#define MSR_FS_BASE 0xc0000100 /* 64bit FS base */ +#define MSR_GS_BASE 0xc0000101 /* 64bit GS base */ #define MSR_KERNEL_GS_BASE 0xc0000102 /* SwapGS GS shadow (or USER_GS from kernel) */ /* EFER bits: */ #define _EFER_SCE 0 /* SYSCALL/SYSRET */ @@ -189,6 +189,7 @@ static inline unsigned int cpuid_edx(unsigned int op) #define MSR_IA32_PERFCTR0 0xc1 #define MSR_IA32_PERFCTR1 0xc2 +#define MSR_FSB_FREQ 0xcd #define MSR_MTRRcap 0x0fe #define MSR_IA32_BBL_CR_CTL 0x119 @@ -210,6 +211,10 @@ static inline unsigned int cpuid_edx(unsigned int op) #define MSR_IA32_LASTINTFROMIP 0x1dd #define MSR_IA32_LASTINTTOIP 0x1de +#define MSR_IA32_PEBS_ENABLE 0x3f1 +#define MSR_IA32_DS_AREA 0x600 +#define MSR_IA32_PERF_CAPABILITIES 0x345 + #define MSR_MTRRfix64K_00000 0x250 #define MSR_MTRRfix16K_80000 0x258 #define MSR_MTRRfix16K_A0000 0x259 @@ -307,6 +312,9 @@ static inline unsigned int cpuid_edx(unsigned int op) #define MSR_IA32_PERF_STATUS 0x198 #define MSR_IA32_PERF_CTL 0x199 +#define MSR_IA32_MPERF 0xE7 +#define MSR_IA32_APERF 0xE8 + #define MSR_IA32_THERM_CONTROL 0x19a #define MSR_IA32_THERM_INTERRUPT 0x19b #define MSR_IA32_THERM_STATUS 0x19c @@ -407,4 +415,13 @@ static inline unsigned int cpuid_edx(unsigned int op) #define MSR_P4_U2L_ESCR0 0x3b0 #define MSR_P4_U2L_ESCR1 0x3b1 +/* Intel Core-based CPU performance counters */ +#define MSR_CORE_PERF_FIXED_CTR0 0x309 +#define MSR_CORE_PERF_FIXED_CTR1 0x30a +#define MSR_CORE_PERF_FIXED_CTR2 0x30b +#define MSR_CORE_PERF_FIXED_CTR_CTRL 0x38d +#define MSR_CORE_PERF_GLOBAL_STATUS 0x38e +#define MSR_CORE_PERF_GLOBAL_CTRL 0x38f +#define MSR_CORE_PERF_GLOBAL_OVF_CTRL 0x390 + #endif diff --git a/include/asm-x86_64/nmi.h b/include/asm-x86_64/nmi.h index f367d4014b4..72375e7d32a 100644 --- a/include/asm-x86_64/nmi.h +++ b/include/asm-x86_64/nmi.h @@ -77,4 +77,7 @@ extern int proc_nmi_enabled(struct ctl_table *, int , struct file *, extern int unknown_nmi_panic; +void __trigger_all_cpu_backtrace(void); +#define trigger_all_cpu_backtrace() __trigger_all_cpu_backtrace() + #endif /* ASM_NMI_H */ diff --git a/include/asm-x86_64/pci-direct.h b/include/asm-x86_64/pci-direct.h index eba9cb471df..6823fa4f1af 100644 --- a/include/asm-x86_64/pci-direct.h +++ b/include/asm-x86_64/pci-direct.h @@ -10,6 +10,7 @@ extern u32 read_pci_config(u8 bus, u8 slot, u8 func, u8 offset); extern u8 read_pci_config_byte(u8 bus, u8 slot, u8 func, u8 offset); extern u16 read_pci_config_16(u8 bus, u8 slot, u8 func, u8 offset); extern void write_pci_config(u8 bus, u8 slot, u8 func, u8 offset, u32 val); +extern void write_pci_config_byte(u8 bus, u8 slot, u8 func, u8 offset, u8 val); extern int early_pci_allowed(void); diff --git a/include/asm-x86_64/pgtable.h b/include/asm-x86_64/pgtable.h index 0555c1c4d8f..59901c690a0 100644 --- a/include/asm-x86_64/pgtable.h +++ b/include/asm-x86_64/pgtable.h @@ -221,20 +221,19 @@ static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, unsigned long #define __S110 PAGE_SHARED_EXEC #define __S111 PAGE_SHARED_EXEC -static inline unsigned long pgd_bad(pgd_t pgd) -{ - unsigned long val = pgd_val(pgd); - val &= ~PTE_MASK; - val &= ~(_PAGE_USER | _PAGE_DIRTY); - return val & ~(_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED); -} +static inline unsigned long pgd_bad(pgd_t pgd) +{ + return pgd_val(pgd) & ~(PTE_MASK | _KERNPG_TABLE | _PAGE_USER); +} static inline unsigned long pud_bad(pud_t pud) { - unsigned long val = pud_val(pud); - val &= ~PTE_MASK; - val &= ~(_PAGE_USER | _PAGE_DIRTY); - return val & ~(_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED); + return pud_val(pud) & ~(PTE_MASK | _KERNPG_TABLE | _PAGE_USER); +} + +static inline unsigned long pmd_bad(pmd_t pmd) +{ + return pmd_val(pmd) & ~(PTE_MASK | _KERNPG_TABLE | _PAGE_USER); } #define pte_none(x) (!pte_val(x)) @@ -347,7 +346,6 @@ static inline int pmd_large(pmd_t pte) { #define pmd_none(x) (!pmd_val(x)) #define pmd_present(x) (pmd_val(x) & _PAGE_PRESENT) #define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0) -#define pmd_bad(x) ((pmd_val(x) & (~PTE_MASK & ~_PAGE_USER)) != _KERNPG_TABLE ) #define pfn_pmd(nr,prot) (__pmd(((nr) << PAGE_SHIFT) | pgprot_val(prot))) #define pmd_pfn(x) ((pmd_val(x) & __PHYSICAL_MASK) >> PAGE_SHIFT) diff --git a/include/asm-x86_64/processor.h b/include/asm-x86_64/processor.h index cef17e0f828..76552d72804 100644 --- a/include/asm-x86_64/processor.h +++ b/include/asm-x86_64/processor.h @@ -475,6 +475,14 @@ static inline void __mwait(unsigned long eax, unsigned long ecx) : :"a" (eax), "c" (ecx)); } +static inline void __sti_mwait(unsigned long eax, unsigned long ecx) +{ + /* "mwait %eax,%ecx;" */ + asm volatile( + "sti; .byte 0x0f,0x01,0xc9;" + : :"a" (eax), "c" (ecx)); +} + extern void mwait_idle_with_hints(unsigned long eax, unsigned long ecx); #define stack_current() \ diff --git a/include/asm-x86_64/proto.h b/include/asm-x86_64/proto.h index e72cfcdf534..6d324b83897 100644 --- a/include/asm-x86_64/proto.h +++ b/include/asm-x86_64/proto.h @@ -61,7 +61,6 @@ extern void numa_initmem_init(unsigned long start_pfn, unsigned long end_pfn); extern unsigned long numa_free_all_bootmem(void); extern void reserve_bootmem_generic(unsigned long phys, unsigned len); -extern void free_bootmem_generic(unsigned long phys, unsigned len); extern void load_gs_index(unsigned gs); @@ -88,6 +87,7 @@ extern void syscall32_cpu_init(void); extern void setup_node_bootmem(int nodeid, unsigned long start, unsigned long end); extern void early_quirks(void); +extern void quirk_intel_irqbalance(void); extern void check_efer(void); extern int unhandled_signal(struct task_struct *tsk, int sig); diff --git a/include/asm-x86_64/rio.h b/include/asm-x86_64/rio.h new file mode 100644 index 00000000000..c7350f6d201 --- /dev/null +++ b/include/asm-x86_64/rio.h @@ -0,0 +1,74 @@ +/* + * Derived from include/asm-i386/mach-summit/mach_mpparse.h + * and include/asm-i386/mach-default/bios_ebda.h + * + * Author: Laurent Vivier <Laurent.Vivier@bull.net> + */ + +#ifndef __ASM_RIO_H +#define __ASM_RIO_H + +#define RIO_TABLE_VERSION 3 + +struct rio_table_hdr { + u8 version; /* Version number of this data structure */ + u8 num_scal_dev; /* # of Scalability devices */ + u8 num_rio_dev; /* # of RIO I/O devices */ +} __attribute__((packed)); + +struct scal_detail { + u8 node_id; /* Scalability Node ID */ + u32 CBAR; /* Address of 1MB register space */ + u8 port0node; /* Node ID port connected to: 0xFF=None */ + u8 port0port; /* Port num port connected to: 0,1,2, or */ + /* 0xFF=None */ + u8 port1node; /* Node ID port connected to: 0xFF = None */ + u8 port1port; /* Port num port connected to: 0,1,2, or */ + /* 0xFF=None */ + u8 port2node; /* Node ID port connected to: 0xFF = None */ + u8 port2port; /* Port num port connected to: 0,1,2, or */ + /* 0xFF=None */ + u8 chassis_num; /* 1 based Chassis number (1 = boot node) */ +} __attribute__((packed)); + +struct rio_detail { + u8 node_id; /* RIO Node ID */ + u32 BBAR; /* Address of 1MB register space */ + u8 type; /* Type of device */ + u8 owner_id; /* Node ID of Hurricane that owns this */ + /* node */ + u8 port0node; /* Node ID port connected to: 0xFF=None */ + u8 port0port; /* Port num port connected to: 0,1,2, or */ + /* 0xFF=None */ + u8 port1node; /* Node ID port connected to: 0xFF=None */ + u8 port1port; /* Port num port connected to: 0,1,2, or */ + /* 0xFF=None */ + u8 first_slot; /* Lowest slot number below this Calgary */ + u8 status; /* Bit 0 = 1 : the XAPIC is used */ + /* = 0 : the XAPIC is not used, ie: */ + /* ints fwded to another XAPIC */ + /* Bits1:7 Reserved */ + u8 WP_index; /* instance index - lower ones have */ + /* lower slot numbers/PCI bus numbers */ + u8 chassis_num; /* 1 based Chassis number */ +} __attribute__((packed)); + +enum { + HURR_SCALABILTY = 0, /* Hurricane Scalability info */ + HURR_RIOIB = 2, /* Hurricane RIOIB info */ + COMPAT_CALGARY = 4, /* Compatibility Calgary */ + ALT_CALGARY = 5, /* Second Planar Calgary */ +}; + +/* + * there is a real-mode segmented pointer pointing to the + * 4K EBDA area at 0x40E. + */ +static inline unsigned long get_bios_ebda(void) +{ + unsigned long address = *(unsigned short *)phys_to_virt(0x40EUL); + address <<= 4; + return address; +} + +#endif /* __ASM_RIO_H */ diff --git a/include/asm-x86_64/smp.h b/include/asm-x86_64/smp.h index d6b7c057edb..e17b9ec42e9 100644 --- a/include/asm-x86_64/smp.h +++ b/include/asm-x86_64/smp.h @@ -82,11 +82,6 @@ extern u8 x86_cpu_to_apicid[NR_CPUS]; /* physical ID */ extern u8 x86_cpu_to_log_apicid[NR_CPUS]; extern u8 bios_cpu_apicid[]; -static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask) -{ - return cpus_addr(cpumask)[0]; -} - static inline int cpu_present_to_apicid(int mps_cpu) { if (mps_cpu < NR_CPUS) @@ -118,13 +113,6 @@ static __inline int logical_smp_processor_id(void) #define cpu_physical_id(cpu) x86_cpu_to_apicid[cpu] #else #define cpu_physical_id(cpu) boot_cpu_id -static inline int smp_call_function_single(int cpuid, void (*func) (void *info), - void *info, int retry, int wait) -{ - /* Disable interrupts here? */ - func(info); - return 0; -} #endif /* !CONFIG_SMP */ #endif diff --git a/include/asm-x86_64/spinlock.h b/include/asm-x86_64/spinlock.h index 05ef097ba55..88bf981e73c 100644 --- a/include/asm-x86_64/spinlock.h +++ b/include/asm-x86_64/spinlock.h @@ -36,7 +36,34 @@ static inline void __raw_spin_lock(raw_spinlock_t *lock) "2:\t" : "=m" (lock->slock) : : "memory"); } -#define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock) +/* + * Same as __raw_spin_lock, but reenable interrupts during spinning. + */ +#ifndef CONFIG_PROVE_LOCKING +static inline void __raw_spin_lock_flags(raw_spinlock_t *lock, unsigned long flags) +{ + asm volatile( + "\n1:\t" + LOCK_PREFIX " ; decl %0\n\t" + "jns 5f\n" + "testl $0x200, %1\n\t" /* interrupts were disabled? */ + "jz 4f\n\t" + "sti\n" + "3:\t" + "rep;nop\n\t" + "cmpl $0, %0\n\t" + "jle 3b\n\t" + "cli\n\t" + "jmp 1b\n" + "4:\t" + "rep;nop\n\t" + "cmpl $0, %0\n\t" + "jg 1b\n\t" + "jmp 4b\n" + "5:\n\t" + : "+m" (lock->slock) : "r" ((unsigned)flags) : "memory"); +} +#endif static inline int __raw_spin_trylock(raw_spinlock_t *lock) { diff --git a/include/asm-x86_64/spinlock_types.h b/include/asm-x86_64/spinlock_types.h index 59efe849f35..4da9345c150 100644 --- a/include/asm-x86_64/spinlock_types.h +++ b/include/asm-x86_64/spinlock_types.h @@ -6,13 +6,13 @@ #endif typedef struct { - volatile unsigned int slock; + unsigned int slock; } raw_spinlock_t; #define __RAW_SPIN_LOCK_UNLOCKED { 1 } typedef struct { - volatile unsigned int lock; + unsigned int lock; } raw_rwlock_t; #define __RAW_RW_LOCK_UNLOCKED { RW_LOCK_BIAS } diff --git a/include/asm-x86_64/stacktrace.h b/include/asm-x86_64/stacktrace.h index 5eb9799bef7..6f0b5459430 100644 --- a/include/asm-x86_64/stacktrace.h +++ b/include/asm-x86_64/stacktrace.h @@ -1,6 +1,8 @@ #ifndef _ASM_STACKTRACE_H #define _ASM_STACKTRACE_H 1 +extern int kstack_depth_to_print; + /* Generic stack tracer with callbacks */ struct stacktrace_ops { diff --git a/include/asm-x86_64/termbits.h b/include/asm-x86_64/termbits.h index bd950946e52..6cfc3bb10c1 100644 --- a/include/asm-x86_64/termbits.h +++ b/include/asm-x86_64/termbits.h @@ -17,6 +17,28 @@ struct termios { cc_t c_cc[NCCS]; /* control characters */ }; +struct termios2 { + tcflag_t c_iflag; /* input mode flags */ + tcflag_t c_oflag; /* output mode flags */ + tcflag_t c_cflag; /* control mode flags */ + tcflag_t c_lflag; /* local mode flags */ + cc_t c_line; /* line discipline */ + cc_t c_cc[NCCS]; /* control characters */ + speed_t c_ispeed; /* input speed */ + speed_t c_ospeed; /* output speed */ +}; + +struct ktermios { + tcflag_t c_iflag; /* input mode flags */ + tcflag_t c_oflag; /* output mode flags */ + tcflag_t c_cflag; /* control mode flags */ + tcflag_t c_lflag; /* local mode flags */ + cc_t c_line; /* line discipline */ + cc_t c_cc[NCCS]; /* control characters */ + speed_t c_ispeed; /* input speed */ + speed_t c_ospeed; /* output speed */ +}; + /* c_cc characters */ #define VINTR 0 #define VQUIT 1 @@ -118,6 +140,7 @@ struct termios { #define HUPCL 0002000 #define CLOCAL 0004000 #define CBAUDEX 0010000 +#define BOTHER 0010000 /* non standard rate */ #define B57600 0010001 #define B115200 0010002 #define B230400 0010003 @@ -133,10 +156,12 @@ struct termios { #define B3000000 0010015 #define B3500000 0010016 #define B4000000 0010017 -#define CIBAUD 002003600000 /* input baud rate (not used) */ +#define CIBAUD 002003600000 /* input baud rate */ #define CMSPAR 010000000000 /* mark or space (stick) parity */ #define CRTSCTS 020000000000 /* flow control */ +#define IBSHIFT 8 /* Shift from CBAUD to CIBAUD */ + /* c_lflag bits */ #define ISIG 0000001 #define ICANON 0000002 diff --git a/include/asm-x86_64/termios.h b/include/asm-x86_64/termios.h index 041a91f7ddf..443b225537f 100644 --- a/include/asm-x86_64/termios.h +++ b/include/asm-x86_64/termios.h @@ -98,8 +98,10 @@ struct termio { copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \ }) -#define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios)) -#define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios)) +#define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios2)) +#define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios2)) +#define user_termios_to_kernel_termios_1(k, u) copy_from_user(k, u, sizeof(struct termios)) +#define kernel_termios_to_user_termios_1(u, k) copy_to_user(u, k, sizeof(struct termios)) #endif /* __KERNEL__ */ diff --git a/include/asm-x86_64/thread_info.h b/include/asm-x86_64/thread_info.h index 787a08114b4..74a6c74397f 100644 --- a/include/asm-x86_64/thread_info.h +++ b/include/asm-x86_64/thread_info.h @@ -122,6 +122,7 @@ static inline struct thread_info *stack_thread_info(void) #define TIF_MEMDIE 20 #define TIF_DEBUG 21 /* uses debug registers */ #define TIF_IO_BITMAP 22 /* uses I/O bitmap */ +#define TIF_FREEZE 23 /* is freezing for suspend */ #define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) #define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME) @@ -137,6 +138,7 @@ static inline struct thread_info *stack_thread_info(void) #define _TIF_ABI_PENDING (1<<TIF_ABI_PENDING) #define _TIF_DEBUG (1<<TIF_DEBUG) #define _TIF_IO_BITMAP (1<<TIF_IO_BITMAP) +#define _TIF_FREEZE (1<<TIF_FREEZE) /* work to do on interrupt/exception return */ #define _TIF_WORK_MASK \ diff --git a/include/asm-x86_64/topology.h b/include/asm-x86_64/topology.h index 5c8f49280db..2facec5914d 100644 --- a/include/asm-x86_64/topology.h +++ b/include/asm-x86_64/topology.h @@ -47,6 +47,7 @@ extern int __node_distance(int, int); .flags = SD_LOAD_BALANCE \ | SD_BALANCE_FORK \ | SD_BALANCE_EXEC \ + | SD_SERIALIZE \ | SD_WAKE_BALANCE, \ .last_balance = jiffies, \ .balance_interval = 1, \ diff --git a/include/asm-x86_64/types.h b/include/asm-x86_64/types.h index c86c2e6793e..2d4491aae28 100644 --- a/include/asm-x86_64/types.h +++ b/include/asm-x86_64/types.h @@ -48,9 +48,6 @@ typedef unsigned long long u64; typedef u64 dma64_addr_t; typedef u64 dma_addr_t; -typedef u64 sector_t; -#define HAVE_SECTOR_T - #endif /* __ASSEMBLY__ */ #endif /* __KERNEL__ */ diff --git a/include/asm-x86_64/uaccess.h b/include/asm-x86_64/uaccess.h index 19f99178fe8..d5dbc87274f 100644 --- a/include/asm-x86_64/uaccess.h +++ b/include/asm-x86_64/uaccess.h @@ -6,7 +6,6 @@ */ #include <linux/compiler.h> #include <linux/errno.h> -#include <linux/sched.h> #include <linux/prefetch.h> #include <asm/page.h> diff --git a/include/asm-x86_64/unistd.h b/include/asm-x86_64/unistd.h index 777288eb7e7..c5f596e71fa 100644 --- a/include/asm-x86_64/unistd.h +++ b/include/asm-x86_64/unistd.h @@ -622,25 +622,7 @@ __SYSCALL(__NR_move_pages, sys_move_pages) #define __NR_syscall_max __NR_move_pages -#ifdef __KERNEL__ -#include <linux/err.h> -#endif - #ifndef __NO_STUBS - -/* user-visible error numbers are in the range -1 - -MAX_ERRNO */ - -#define __syscall_clobber "r11","rcx","memory" - -#define __syscall_return(type, res) \ -do { \ - if ((unsigned long)(res) >= (unsigned long)(-MAX_ERRNO)) { \ - errno = -(res); \ - res = -1; \ - } \ - return (type) (res); \ -} while (0) - #define __ARCH_WANT_OLD_READDIR #define __ARCH_WANT_OLD_STAT #define __ARCH_WANT_SYS_ALARM @@ -664,87 +646,6 @@ do { \ #define __ARCH_WANT_SYS_TIME #define __ARCH_WANT_COMPAT_SYS_TIME -#define __syscall "syscall" - -#define _syscall0(type,name) \ -type name(void) \ -{ \ -long __res; \ -__asm__ volatile (__syscall \ - : "=a" (__res) \ - : "0" (__NR_##name) : __syscall_clobber ); \ -__syscall_return(type,__res); \ -} - -#define _syscall1(type,name,type1,arg1) \ -type name(type1 arg1) \ -{ \ -long __res; \ -__asm__ volatile (__syscall \ - : "=a" (__res) \ - : "0" (__NR_##name),"D" ((long)(arg1)) : __syscall_clobber ); \ -__syscall_return(type,__res); \ -} - -#define _syscall2(type,name,type1,arg1,type2,arg2) \ -type name(type1 arg1,type2 arg2) \ -{ \ -long __res; \ -__asm__ volatile (__syscall \ - : "=a" (__res) \ - : "0" (__NR_##name),"D" ((long)(arg1)),"S" ((long)(arg2)) : __syscall_clobber ); \ -__syscall_return(type,__res); \ -} - -#define _syscall3(type,name,type1,arg1,type2,arg2,type3,arg3) \ -type name(type1 arg1,type2 arg2,type3 arg3) \ -{ \ -long __res; \ -__asm__ volatile (__syscall \ - : "=a" (__res) \ - : "0" (__NR_##name),"D" ((long)(arg1)),"S" ((long)(arg2)), \ - "d" ((long)(arg3)) : __syscall_clobber); \ -__syscall_return(type,__res); \ -} - -#define _syscall4(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4) \ -type name (type1 arg1, type2 arg2, type3 arg3, type4 arg4) \ -{ \ -long __res; \ -__asm__ volatile ("movq %5,%%r10 ;" __syscall \ - : "=a" (__res) \ - : "0" (__NR_##name),"D" ((long)(arg1)),"S" ((long)(arg2)), \ - "d" ((long)(arg3)),"g" ((long)(arg4)) : __syscall_clobber,"r10" ); \ -__syscall_return(type,__res); \ -} - -#define _syscall5(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4, \ - type5,arg5) \ -type name (type1 arg1,type2 arg2,type3 arg3,type4 arg4,type5 arg5) \ -{ \ -long __res; \ -__asm__ volatile ("movq %5,%%r10 ; movq %6,%%r8 ; " __syscall \ - : "=a" (__res) \ - : "0" (__NR_##name),"D" ((long)(arg1)),"S" ((long)(arg2)), \ - "d" ((long)(arg3)),"g" ((long)(arg4)),"g" ((long)(arg5)) : \ - __syscall_clobber,"r8","r10" ); \ -__syscall_return(type,__res); \ -} - -#define _syscall6(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4, \ - type5,arg5,type6,arg6) \ -type name (type1 arg1,type2 arg2,type3 arg3,type4 arg4,type5 arg5,type6 arg6) \ -{ \ -long __res; \ -__asm__ volatile ("movq %5,%%r10 ; movq %6,%%r8 ; movq %7,%%r9 ; " __syscall \ - : "=a" (__res) \ - : "0" (__NR_##name),"D" ((long)(arg1)),"S" ((long)(arg2)), \ - "d" ((long)(arg3)), "g" ((long)(arg4)), "g" ((long)(arg5)), \ - "g" ((long)(arg6)) : \ - __syscall_clobber,"r8","r10","r9" ); \ -__syscall_return(type,__res); \ -} - #ifdef __KERNEL__ #ifndef __ASSEMBLY__ diff --git a/include/asm-x86_64/unwind.h b/include/asm-x86_64/unwind.h index 2e7ff10fd77..02710f6a456 100644 --- a/include/asm-x86_64/unwind.h +++ b/include/asm-x86_64/unwind.h @@ -1,104 +1,6 @@ #ifndef _ASM_X86_64_UNWIND_H #define _ASM_X86_64_UNWIND_H -/* - * Copyright (C) 2002-2006 Novell, Inc. - * Jan Beulich <jbeulich@novell.com> - * This code is released under version 2 of the GNU GPL. - */ - -#ifdef CONFIG_STACK_UNWIND - -#include <linux/sched.h> -#include <asm/ptrace.h> -#include <asm/uaccess.h> -#include <asm/vsyscall.h> - -struct unwind_frame_info -{ - struct pt_regs regs; - struct task_struct *task; - unsigned call_frame:1; -}; - -#define UNW_PC(frame) (frame)->regs.rip -#define UNW_SP(frame) (frame)->regs.rsp -#ifdef CONFIG_FRAME_POINTER -#define UNW_FP(frame) (frame)->regs.rbp -#define FRAME_RETADDR_OFFSET 8 -#define FRAME_LINK_OFFSET 0 -#define STACK_BOTTOM(tsk) (((tsk)->thread.rsp0 - 1) & ~(THREAD_SIZE - 1)) -#define STACK_TOP(tsk) ((tsk)->thread.rsp0) -#endif -/* Might need to account for the special exception and interrupt handling - stacks here, since normally - EXCEPTION_STACK_ORDER < THREAD_ORDER < IRQSTACK_ORDER, - but the construct is needed only for getting across the stack switch to - the interrupt stack - thus considering the IRQ stack itself is unnecessary, - and the overhead of comparing against all exception handling stacks seems - not desirable. */ -#define STACK_LIMIT(ptr) (((ptr) - 1) & ~(THREAD_SIZE - 1)) - -#define UNW_REGISTER_INFO \ - PTREGS_INFO(rax), \ - PTREGS_INFO(rdx), \ - PTREGS_INFO(rcx), \ - PTREGS_INFO(rbx), \ - PTREGS_INFO(rsi), \ - PTREGS_INFO(rdi), \ - PTREGS_INFO(rbp), \ - PTREGS_INFO(rsp), \ - PTREGS_INFO(r8), \ - PTREGS_INFO(r9), \ - PTREGS_INFO(r10), \ - PTREGS_INFO(r11), \ - PTREGS_INFO(r12), \ - PTREGS_INFO(r13), \ - PTREGS_INFO(r14), \ - PTREGS_INFO(r15), \ - PTREGS_INFO(rip) - -#define UNW_DEFAULT_RA(raItem, dataAlign) \ - ((raItem).where == Memory && \ - !((raItem).value * (dataAlign) + 8)) - -static inline void arch_unw_init_frame_info(struct unwind_frame_info *info, - /*const*/ struct pt_regs *regs) -{ - info->regs = *regs; -} - -static inline void arch_unw_init_blocked(struct unwind_frame_info *info) -{ - extern const char thread_return[]; - - memset(&info->regs, 0, sizeof(info->regs)); - info->regs.rip = (unsigned long)thread_return; - info->regs.cs = __KERNEL_CS; - __get_user(info->regs.rbp, (unsigned long *)info->task->thread.rsp); - info->regs.rsp = info->task->thread.rsp; - info->regs.ss = __KERNEL_DS; -} - -extern int arch_unwind_init_running(struct unwind_frame_info *, - int (*callback)(struct unwind_frame_info *, - void *arg), - void *arg); - -static inline int arch_unw_user_mode(const struct unwind_frame_info *info) -{ -#if 0 /* This can only work when selector register saves/restores - are properly annotated (and tracked in UNW_REGISTER_INFO). */ - return user_mode(&info->regs); -#else - return (long)info->regs.rip >= 0 - || (info->regs.rip >= VSYSCALL_START && info->regs.rip < VSYSCALL_END) - || (long)info->regs.rsp >= 0; -#endif -} - -#else - #define UNW_PC(frame) ((void)(frame), 0UL) #define UNW_SP(frame) ((void)(frame), 0UL) @@ -107,6 +9,4 @@ static inline int arch_unw_user_mode(const void *info) return 0; } -#endif - #endif /* _ASM_X86_64_UNWIND_H */ diff --git a/include/asm-x86_64/vsyscall.h b/include/asm-x86_64/vsyscall.h index 01d1c17e284..05cb8dd200d 100644 --- a/include/asm-x86_64/vsyscall.h +++ b/include/asm-x86_64/vsyscall.h @@ -10,6 +10,7 @@ enum vsyscall_num { #define VSYSCALL_START (-10UL << 20) #define VSYSCALL_SIZE 1024 #define VSYSCALL_END (-2UL << 20) +#define VSYSCALL_MAPPED_PAGES 1 #define VSYSCALL_ADDR(vsyscall_nr) (VSYSCALL_START+VSYSCALL_SIZE*(vsyscall_nr)) #ifdef __KERNEL__ diff --git a/include/asm-xtensa/asmmacro.h b/include/asm-xtensa/asmmacro.h new file mode 100644 index 00000000000..76915cabad1 --- /dev/null +++ b/include/asm-xtensa/asmmacro.h @@ -0,0 +1,153 @@ +/* + * include/asm-xtensa/asmmacro.h + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2005 Tensilica Inc. + */ + +#ifndef _XTENSA_ASMMACRO_H +#define _XTENSA_ASMMACRO_H + +#include <asm/variant/core.h> + +/* + * Some little helpers for loops. Use zero-overhead-loops + * where applicable and if supported by the processor. + * + * __loopi ar, at, size, inc + * ar register initialized with the start address + * at scratch register used by macro + * size size immediate value + * inc increment + * + * __loops ar, as, at, inc_log2[, mask_log2][, cond][, ncond] + * ar register initialized with the start address + * as register initialized with the size + * at scratch register use by macro + * inc_log2 increment [in log2] + * mask_log2 mask [in log2] + * cond true condition (used in loop'cond') + * ncond false condition (used in b'ncond') + * + * __loop as + * restart loop. 'as' register must not have been modified! + * + * __endla ar, at, incr + * ar start address (modified) + * as scratch register used by macro + * inc increment + */ + +/* + * loop for given size as immediate + */ + + .macro __loopi ar, at, size, incr + +#if XCHAL_HAVE_LOOPS + movi \at, ((\size + \incr - 1) / (\incr)) + loop \at, 99f +#else + addi \at, \ar, \size + 98: +#endif + + .endm + +/* + * loop for given size in register + */ + + .macro __loops ar, as, at, incr_log2, mask_log2, cond, ncond + +#if XCHAL_HAVE_LOOPS + .ifgt \incr_log2 - 1 + addi \at, \as, (1 << \incr_log2) - 1 + .ifnc \mask_log2, + extui \at, \at, \incr_log2, \mask_log2 + .else + srli \at, \at, \incr_log2 + .endif + .endif + loop\cond \at, 99f +#else + .ifnc \mask_log2, + extui \at, \as, \incr_log2, \mask_log2 + .else + .ifnc \ncond, + srli \at, \as, \incr_log2 + .endif + .endif + .ifnc \ncond, + b\ncond \at, 99f + + .endif + .ifnc \mask_log2, + slli \at, \at, \incr_log2 + add \at, \ar, \at + .else + add \at, \ar, \as + .endif +#endif + 98: + + .endm + +/* + * loop from ar to ax + */ + + .macro __loopt ar, as, at, incr_log2 + +#if XCHAL_HAVE_LOOPS + sub \at, \as, \ar + .ifgt \incr_log2 - 1 + addi \at, \at, (1 << \incr_log2) - 1 + srli \at, \at, \incr_log2 + .endif + loop \at, 99f +#else + 98: +#endif + + .endm + +/* + * restart loop. registers must be unchanged + */ + + .macro __loop as + +#if XCHAL_HAVE_LOOPS + loop \as, 99f +#else + 98: +#endif + + .endm + +/* + * end of loop with no increment of the address. + */ + + .macro __endl ar, as +#if !XCHAL_HAVE_LOOPS + bltu \ar, \as, 98b +#endif + 99: + .endm + +/* + * end of loop with increment of the address. + */ + + .macro __endla ar, as, incr + addi \ar, \ar, \incr + __endl \ar \as + .endm + + +#endif /* _XTENSA_ASMMACRO_H */ diff --git a/include/asm-xtensa/bug.h b/include/asm-xtensa/bug.h index 56703659b20..3e52d72712f 100644 --- a/include/asm-xtensa/bug.h +++ b/include/asm-xtensa/bug.h @@ -13,29 +13,6 @@ #ifndef _XTENSA_BUG_H #define _XTENSA_BUG_H -#include <linux/stringify.h> - -#define ILL __asm__ __volatile__ (".byte 0,0,0\n") - -#ifdef CONFIG_KALLSYMS -# define BUG() do { \ - printk("kernel BUG at %s:%d!\n", __FILE__, __LINE__); \ - ILL; \ -} while (0) -#else -# define BUG() do { \ - printk("kernel BUG!\n"); \ - ILL; \ -} while (0) -#endif - -#define BUG_ON(condition) do { if (unlikely((condition)!=0)) BUG(); } while(0) -#define PAGE_BUG(page) do { BUG(); } while (0) -#define WARN_ON(condition) do { \ - if (unlikely((condition)!=0)) { \ - printk ("Warning in %s at %s:%d\n", __FUNCTION__, __FILE__, __LINE__); \ - dump_stack(); \ - } \ -} while (0) +#include <asm-generic/bug.h> #endif /* _XTENSA_BUG_H */ diff --git a/include/asm-xtensa/byteorder.h b/include/asm-xtensa/byteorder.h index 0b1552569aa..0f540a5f4c0 100644 --- a/include/asm-xtensa/byteorder.h +++ b/include/asm-xtensa/byteorder.h @@ -11,10 +11,9 @@ #ifndef _XTENSA_BYTEORDER_H #define _XTENSA_BYTEORDER_H -#include <asm/processor.h> #include <asm/types.h> -static __inline__ __const__ __u32 ___arch__swab32(__u32 x) +static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 x) { __u32 res; /* instruction sequence from Xtensa ISA release 2/2000 */ @@ -29,7 +28,7 @@ static __inline__ __const__ __u32 ___arch__swab32(__u32 x) return res; } -static __inline__ __const__ __u16 ___arch__swab16(__u16 x) +static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 x) { /* Given that 'short' values are signed (i.e., can be negative), * we cannot assume that the upper 16-bits of the register are diff --git a/include/asm-xtensa/cache.h b/include/asm-xtensa/cache.h index 1e79c0e2746..1c4a78f29ae 100644 --- a/include/asm-xtensa/cache.h +++ b/include/asm-xtensa/cache.h @@ -4,7 +4,6 @@ * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. - * 2 of the License, or (at your option) any later version. * * (C) 2001 - 2005 Tensilica Inc. */ @@ -12,21 +11,14 @@ #ifndef _XTENSA_CACHE_H #define _XTENSA_CACHE_H -#include <xtensa/config/core.h> +#include <asm/variant/core.h> -#if XCHAL_ICACHE_SIZE > 0 -# if (XCHAL_ICACHE_SIZE % (XCHAL_ICACHE_LINESIZE*XCHAL_ICACHE_WAYS*4)) != 0 -# error cache configuration outside expected/supported range! -# endif -#endif +#define L1_CACHE_SHIFT XCHAL_DCACHE_LINEWIDTH +#define L1_CACHE_BYTES XCHAL_DCACHE_LINESIZE +#define SMP_CACHE_BYTES L1_CACHE_BYTES -#if XCHAL_DCACHE_SIZE > 0 -# if (XCHAL_DCACHE_SIZE % (XCHAL_DCACHE_LINESIZE*XCHAL_DCACHE_WAYS*4)) != 0 -# error cache configuration outside expected/supported range! -# endif -#endif +#define DCACHE_WAY_SIZE (XCHAL_DCACHE_SIZE/XCHAL_DCACHE_WAYS) +#define ICACHE_WAY_SIZE (XCHAL_ICACHE_SIZE/XCHAL_ICACHE_WAYS) -#define L1_CACHE_SHIFT XCHAL_CACHE_LINEWIDTH_MAX -#define L1_CACHE_BYTES XCHAL_CACHE_LINESIZE_MAX #endif /* _XTENSA_CACHE_H */ diff --git a/include/asm-xtensa/cacheasm.h b/include/asm-xtensa/cacheasm.h new file mode 100644 index 00000000000..2c20a58f94c --- /dev/null +++ b/include/asm-xtensa/cacheasm.h @@ -0,0 +1,177 @@ +/* + * include/asm-xtensa/cacheasm.h + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2006 Tensilica Inc. + */ + +#include <asm/cache.h> +#include <asm/asmmacro.h> +#include <linux/stringify.h> + +/* + * Define cache functions as macros here so that they can be used + * by the kernel and boot loader. We should consider moving them to a + * library that can be linked by both. + * + * Locking + * + * ___unlock_dcache_all + * ___unlock_icache_all + * + * Flush and invaldating + * + * ___flush_invalidate_dcache_{all|range|page} + * ___flush_dcache_{all|range|page} + * ___invalidate_dcache_{all|range|page} + * ___invalidate_icache_{all|range|page} + * + */ + + .macro __loop_cache_all ar at insn size line_width + + movi \ar, 0 + + __loopi \ar, \at, \size, (4 << (\line_width)) + \insn \ar, 0 << (\line_width) + \insn \ar, 1 << (\line_width) + \insn \ar, 2 << (\line_width) + \insn \ar, 3 << (\line_width) + __endla \ar, \at, 4 << (\line_width) + + .endm + + + .macro __loop_cache_range ar as at insn line_width + + extui \at, \ar, 0, \line_width + add \as, \as, \at + + __loops \ar, \as, \at, \line_width + \insn \ar, 0 + __endla \ar, \at, (1 << (\line_width)) + + .endm + + + .macro __loop_cache_page ar at insn line_width + + __loopi \ar, \at, PAGE_SIZE, 4 << (\line_width) + \insn \ar, 0 << (\line_width) + \insn \ar, 1 << (\line_width) + \insn \ar, 2 << (\line_width) + \insn \ar, 3 << (\line_width) + __endla \ar, \at, 4 << (\line_width) + + .endm + + +#if XCHAL_DCACHE_LINE_LOCKABLE + + .macro ___unlock_dcache_all ar at + + __loop_cache_all \ar \at diu XCHAL_DCACHE_SIZE XCHAL_DCACHE_LINEWIDTH + + .endm + +#endif + +#if XCHAL_ICACHE_LINE_LOCKABLE + + .macro ___unlock_icache_all ar at + + __loop_cache_all \ar \at iiu XCHAL_ICACHE_SIZE XCHAL_ICACHE_LINEWIDTH + + .endm +#endif + + .macro ___flush_invalidate_dcache_all ar at + + __loop_cache_all \ar \at diwbi XCHAL_DCACHE_SIZE XCHAL_DCACHE_LINEWIDTH + + .endm + + + .macro ___flush_dcache_all ar at + + __loop_cache_all \ar \at diwb XCHAL_DCACHE_SIZE XCHAL_DCACHE_LINEWIDTH + + .endm + + + .macro ___invalidate_dcache_all ar at + + __loop_cache_all \ar \at dii __stringify(DCACHE_WAY_SIZE) \ + XCHAL_DCACHE_LINEWIDTH + + .endm + + + .macro ___invalidate_icache_all ar at + + __loop_cache_all \ar \at iii __stringify(ICACHE_WAY_SIZE) \ + XCHAL_ICACHE_LINEWIDTH + + .endm + + + + .macro ___flush_invalidate_dcache_range ar as at + + __loop_cache_range \ar \as \at dhwbi XCHAL_DCACHE_LINEWIDTH + + .endm + + + .macro ___flush_dcache_range ar as at + + __loop_cache_range \ar \as \at dhwb XCHAL_DCACHE_LINEWIDTH + + .endm + + + .macro ___invalidate_dcache_range ar as at + + __loop_cache_range \ar \as \at dhi XCHAL_DCACHE_LINEWIDTH + + .endm + + + .macro ___invalidate_icache_range ar as at + + __loop_cache_range \ar \as \at ihi XCHAL_ICACHE_LINEWIDTH + + .endm + + + + .macro ___flush_invalidate_dcache_page ar as + + __loop_cache_page \ar \as dhwbi XCHAL_DCACHE_LINEWIDTH + + .endm + + + .macro ___flush_dcache_page ar as + + __loop_cache_page \ar \as dhwb XCHAL_DCACHE_LINEWIDTH + + .endm + + + .macro ___invalidate_dcache_page ar as + + __loop_cache_page \ar \as dhi XCHAL_DCACHE_LINEWIDTH + + .endm + + + .macro ___invalidate_icache_page ar as + + __loop_cache_page \ar \as ihi XCHAL_ICACHE_LINEWIDTH + + .endm + diff --git a/include/asm-xtensa/cacheflush.h b/include/asm-xtensa/cacheflush.h index 44a36e08784..22ef901b784 100644 --- a/include/asm-xtensa/cacheflush.h +++ b/include/asm-xtensa/cacheflush.h @@ -5,7 +5,7 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * (C) 2001 - 2005 Tensilica Inc. + * (C) 2001 - 2006 Tensilica Inc. */ #ifndef _XTENSA_CACHEFLUSH_H @@ -75,6 +75,7 @@ extern void __flush_invalidate_dcache_range(unsigned long, unsigned long); #define flush_cache_all() __flush_invalidate_cache_all(); #define flush_cache_mm(mm) __flush_invalidate_cache_all(); +#define flush_cache_dup_mm(mm) __flush_invalidate_cache_all(); #define flush_cache_vmap(start,end) __flush_invalidate_cache_all(); #define flush_cache_vunmap(start,end) __flush_invalidate_cache_all(); @@ -88,6 +89,7 @@ extern void flush_cache_page(struct vm_area_struct*, unsigned long, unsigned lon #define flush_cache_all() do { } while (0) #define flush_cache_mm(mm) do { } while (0) +#define flush_cache_dup_mm(mm) do { } while (0) #define flush_cache_vmap(start,end) do { } while (0) #define flush_cache_vunmap(start,end) do { } while (0) diff --git a/include/asm-xtensa/checksum.h b/include/asm-xtensa/checksum.h index 03114f8d1e1..23534c60b3a 100644 --- a/include/asm-xtensa/checksum.h +++ b/include/asm-xtensa/checksum.h @@ -12,7 +12,7 @@ #define _XTENSA_CHECKSUM_H #include <linux/in6.h> -#include <xtensa/config/core.h> +#include <asm/variant/core.h> /* * computes the checksum of a memory block at buff, length len, @@ -26,7 +26,7 @@ * * it's best to have buff aligned on a 32-bit boundary */ -asmlinkage unsigned int csum_partial(const unsigned char * buff, int len, unsigned int sum); +asmlinkage __wsum csum_partial(const void *buff, int len, __wsum sum); /* * the same as csum_partial, but copies from src while it @@ -36,7 +36,7 @@ asmlinkage unsigned int csum_partial(const unsigned char * buff, int len, unsign * better 64-bit) boundary */ -asmlinkage unsigned int csum_partial_copy_generic( const char *src, char *dst, int len, int sum, +asmlinkage __wsum csum_partial_copy_generic(const void *src, void *dst, int len, __wsum sum, int *src_err_ptr, int *dst_err_ptr); /* @@ -46,34 +46,25 @@ asmlinkage unsigned int csum_partial_copy_generic( const char *src, char *dst, i * If you use these functions directly please don't forget the access_ok(). */ static inline -unsigned int csum_partial_copy_nocheck ( const char *src, char *dst, - int len, int sum) +__wsum csum_partial_copy_nocheck(const void *src, void *dst, + int len, __wsum sum) { - return csum_partial_copy_generic ( src, dst, len, sum, NULL, NULL); + return csum_partial_copy_generic(src, dst, len, sum, NULL, NULL); } static inline -unsigned int csum_partial_copy_from_user ( const char *src, char *dst, - int len, int sum, int *err_ptr) +__wsum csum_partial_copy_from_user(const void __user *src, void *dst, + int len, __wsum sum, int *err_ptr) { - return csum_partial_copy_generic ( src, dst, len, sum, err_ptr, NULL); + return csum_partial_copy_generic((__force const void *)src, dst, + len, sum, err_ptr, NULL); } /* - * These are the old (and unsafe) way of doing checksums, a warning message will be - * printed if they are used and an exeption occurs. - * - * these functions should go away after some time. - */ - -#define csum_partial_copy_fromuser csum_partial_copy -unsigned int csum_partial_copy( const char *src, char *dst, int len, int sum); - -/* * Fold a partial checksum */ -static __inline__ unsigned int csum_fold(unsigned int sum) +static __inline__ __sum16 csum_fold(__wsum sum) { unsigned int __dummy; __asm__("extui %1, %0, 16, 16\n\t" @@ -87,14 +78,14 @@ static __inline__ unsigned int csum_fold(unsigned int sum) "extui %0, %0, 0, 16\n\t" : "=r" (sum), "=&r" (__dummy) : "0" (sum)); - return sum; + return (__force __sum16)sum; } /* * This is a version of ip_compute_csum() optimized for IP headers, * which always checksum on 4 octet boundaries. */ -static __inline__ unsigned short ip_fast_csum(unsigned char * iph, unsigned int ihl) +static __inline__ __sum16 ip_fast_csum(const void *iph, unsigned int ihl) { unsigned int sum, tmp, endaddr; @@ -127,17 +118,16 @@ static __inline__ unsigned short ip_fast_csum(unsigned char * iph, unsigned int return csum_fold(sum); } -static __inline__ unsigned long csum_tcpudp_nofold(unsigned long saddr, - unsigned long daddr, +static __inline__ __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len, unsigned short proto, - unsigned int sum) + __wsum sum) { #ifdef __XTENSA_EL__ - unsigned long len_proto = (ntohs(len)<<16)+proto*256; + unsigned long len_proto = (len + proto) << 8; #elif defined(__XTENSA_EB__) - unsigned long len_proto = (proto<<16)+len; + unsigned long len_proto = len + proto; #else # error processor byte order undefined! #endif @@ -162,11 +152,10 @@ static __inline__ unsigned long csum_tcpudp_nofold(unsigned long saddr, * computes the checksum of the TCP/UDP pseudo-header * returns a 16-bit checksum, already complemented */ -static __inline__ unsigned short int csum_tcpudp_magic(unsigned long saddr, - unsigned long daddr, +static __inline__ __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr, unsigned short len, unsigned short proto, - unsigned int sum) + __wsum sum) { return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum)); } @@ -176,17 +165,16 @@ static __inline__ unsigned short int csum_tcpudp_magic(unsigned long saddr, * in icmp.c */ -static __inline__ unsigned short ip_compute_csum(unsigned char * buff, int len) +static __inline__ __sum16 ip_compute_csum(const void *buff, int len) { return csum_fold (csum_partial(buff, len, 0)); } #define _HAVE_ARCH_IPV6_CSUM -static __inline__ unsigned short int csum_ipv6_magic(struct in6_addr *saddr, - struct in6_addr *daddr, - __u32 len, - unsigned short proto, - unsigned int sum) +static __inline__ __sum16 csum_ipv6_magic(const struct in6_addr *saddr, + const struct in6_addr *daddr, + __u32 len, unsigned short proto, + __wsum sum) { unsigned int __dummy; __asm__("l32i %1, %2, 0\n\t" @@ -248,8 +236,8 @@ static __inline__ unsigned short int csum_ipv6_magic(struct in6_addr *saddr, * Copy and checksum to user */ #define HAVE_CSUM_COPY_USER -static __inline__ unsigned int csum_and_copy_to_user (const char *src, char *dst, - int len, int sum, int *err_ptr) +static __inline__ __wsum csum_and_copy_to_user(const void *src, void __user *dst, + int len, __wsum sum, int *err_ptr) { if (access_ok(VERIFY_WRITE, dst, len)) return csum_partial_copy_generic(src, dst, len, sum, NULL, err_ptr); @@ -257,6 +245,6 @@ static __inline__ unsigned int csum_and_copy_to_user (const char *src, char *dst if (len) *err_ptr = -EFAULT; - return -1; /* invalid checksum */ + return (__force __wsum)-1; /* invalid checksum */ } #endif diff --git a/include/asm-xtensa/coprocessor.h b/include/asm-xtensa/coprocessor.h index 5093034723b..bd09ec02d57 100644 --- a/include/asm-xtensa/coprocessor.h +++ b/include/asm-xtensa/coprocessor.h @@ -11,7 +11,16 @@ #ifndef _XTENSA_COPROCESSOR_H #define _XTENSA_COPROCESSOR_H -#include <xtensa/config/core.h> +#include <asm/variant/core.h> +#include <asm/variant/tie.h> + +#if !XCHAL_HAVE_CP + +#define XTENSA_CP_EXTRA_OFFSET 0 +#define XTENSA_CP_EXTRA_ALIGN 1 /* must be a power of 2 */ +#define XTENSA_CP_EXTRA_SIZE 0 + +#else #define XTOFS(last_start,last_size,align) \ ((last_start+last_size+align-1) & -align) @@ -67,4 +76,6 @@ extern void save_coprocessor_registers(void*, int); # endif #endif +#endif + #endif /* _XTENSA_COPROCESSOR_H */ diff --git a/include/asm-xtensa/device.h b/include/asm-xtensa/device.h new file mode 100644 index 00000000000..d8f9872b0e2 --- /dev/null +++ b/include/asm-xtensa/device.h @@ -0,0 +1,7 @@ +/* + * Arch specific extensions to struct device + * + * This file is released under the GPLv2 + */ +#include <asm-generic/device.h> + diff --git a/include/asm-xtensa/dma-mapping.h b/include/asm-xtensa/dma-mapping.h index c39c91dfcc6..82b03b3a2ee 100644 --- a/include/asm-xtensa/dma-mapping.h +++ b/include/asm-xtensa/dma-mapping.h @@ -170,10 +170,10 @@ dma_get_cache_alignment(void) return L1_CACHE_BYTES; } -#define dma_is_consistent(d) (1) +#define dma_is_consistent(d, h) (1) static inline void -dma_cache_sync(void *vaddr, size_t size, +dma_cache_sync(struct device *dev, void *vaddr, size_t size, enum dma_data_direction direction) { consistent_sync(vaddr, size, direction); diff --git a/include/asm-xtensa/dma.h b/include/asm-xtensa/dma.h index db2633f6778..e30f3abf48f 100644 --- a/include/asm-xtensa/dma.h +++ b/include/asm-xtensa/dma.h @@ -12,7 +12,6 @@ #define _XTENSA_DMA_H #include <asm/io.h> /* need byte IO */ -#include <xtensa/config/core.h> /* * This is only to be defined if we have PC-like DMA. @@ -44,7 +43,9 @@ * enters another area, and virt_to_phys() may not return * the value desired). */ -#define MAX_DMA_ADDRESS (PAGE_OFFSET + XCHAL_KSEG_CACHED_SIZE - 1) + +#define MAX_DMA_ADDRESS (PAGE_OFFSET + XCHAL_KIO_SIZE - 1) + /* Reserve and release a DMA channel */ extern int request_dma(unsigned int dmanr, const char * device_id); diff --git a/include/asm-xtensa/elf.h b/include/asm-xtensa/elf.h index de0667453b2..f0f9fd8560a 100644 --- a/include/asm-xtensa/elf.h +++ b/include/asm-xtensa/elf.h @@ -13,9 +13,8 @@ #ifndef _XTENSA_ELF_H #define _XTENSA_ELF_H +#include <asm/variant/core.h> #include <asm/ptrace.h> -#include <asm/coprocessor.h> -#include <xtensa/config/core.h> /* Xtensa processor ELF architecture-magic number */ @@ -118,11 +117,15 @@ typedef elf_greg_t elf_gregset_t[ELF_NGREG]; * using memcpy(). But we do allow space for such alignment, * to allow optimizations of layout and copying. */ - +#if 0 #define TOTAL_FPREGS_SIZE \ (4 + XTENSA_CPE_LTABLE_SIZE + XTENSA_CP_EXTRA_SIZE) #define ELF_NFPREG \ ((TOTAL_FPREGS_SIZE + sizeof(elf_fpreg_t) - 1) / sizeof(elf_fpreg_t)) +#else +#define TOTAL_FPREGS_SIZE 0 +#define ELF_NFPREG 0 +#endif typedef unsigned int elf_fpreg_t; typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG]; diff --git a/include/asm-xtensa/fcntl.h b/include/asm-xtensa/fcntl.h index ec066ae96ca..0609fc691b7 100644 --- a/include/asm-xtensa/fcntl.h +++ b/include/asm-xtensa/fcntl.h @@ -14,48 +14,86 @@ /* open/fcntl - O_SYNC is only implemented on blocks devices and on files located on an ext2 file system */ -#define O_APPEND 0x0008 -#define O_SYNC 0x0010 -#define O_NONBLOCK 0x0080 -#define O_CREAT 0x0100 /* not fcntl */ -#define O_EXCL 0x0400 /* not fcntl */ -#define O_NOCTTY 0x0800 /* not fcntl */ -#define FASYNC 0x1000 /* fcntl, for BSD compatibility */ -#define O_LARGEFILE 0x2000 /* allow large file opens - currently ignored */ -#define O_DIRECT 0x8000 /* direct disk access hint - currently ignored*/ -#define O_NOATIME 0x100000 - -#define F_GETLK 14 -#define F_GETLK64 15 +#define O_ACCMODE 0003 +#define O_RDONLY 00 +#define O_WRONLY 01 +#define O_RDWR 02 +#define O_CREAT 0100 /* not fcntl */ +#define O_EXCL 0200 /* not fcntl */ +#define O_NOCTTY 0400 /* not fcntl */ +#define O_TRUNC 01000 /* not fcntl */ +#define O_APPEND 02000 +#define O_NONBLOCK 04000 +#define O_NDELAY O_NONBLOCK +#define O_SYNC 010000 +#define FASYNC 020000 /* fcntl, for BSD compatibility */ +#define O_DIRECT 040000 /* direct disk access hint */ +#define O_LARGEFILE 0100000 +#define O_DIRECTORY 0200000 /* must be a directory */ +#define O_NOFOLLOW 0400000 /* don't follow links */ +#define O_NOATIME 01000000 + +#define F_DUPFD 0 /* dup */ +#define F_GETFD 1 /* get close_on_exec */ +#define F_SETFD 2 /* set/clear close_on_exec */ +#define F_GETFL 3 /* get file->f_flags */ +#define F_SETFL 4 /* set file->f_flags */ +#define F_GETLK 5 #define F_SETLK 6 #define F_SETLKW 7 -#define F_SETLK64 16 -#define F_SETLKW64 17 -#define F_SETOWN 24 /* for sockets. */ -#define F_GETOWN 23 /* for sockets. */ +#define F_SETOWN 8 /* for sockets. */ +#define F_GETOWN 9 /* for sockets. */ +#define F_SETSIG 10 /* for sockets. */ +#define F_GETSIG 11 /* for sockets. */ + +#define F_GETLK64 12 /* using 'struct flock64' */ +#define F_SETLK64 13 +#define F_SETLKW64 14 + +/* for F_[GET|SET]FL */ +#define FD_CLOEXEC 1 /* actually anything with low bit set goes */ + +/* for posix fcntl() and lockf() */ +#define F_RDLCK 0 +#define F_WRLCK 1 +#define F_UNLCK 2 + +/* for old implementation of bsd flock () */ +#define F_EXLCK 4 /* or 3 */ +#define F_SHLCK 8 /* or 4 */ -typedef struct flock { +/* for leases */ +#define F_INPROGRESS 16 + +/* operations for bsd flock(), also used by the kernel implementation */ +#define LOCK_SH 1 /* shared lock */ +#define LOCK_EX 2 /* exclusive lock */ +#define LOCK_NB 4 /* or'd with one of the above to prevent + blocking */ +#define LOCK_UN 8 /* remove lock */ + +#define LOCK_MAND 32 /* This is a mandatory flock */ +#define LOCK_READ 64 /* ... Which allows concurrent read operations */ +#define LOCK_WRITE 128 /* ... Which allows concurrent write operations */ +#define LOCK_RW 192 /* ... Which allows concurrent read & write ops */ + +struct flock { short l_type; short l_whence; - __kernel_off_t l_start; - __kernel_off_t l_len; - long l_sysid; - __kernel_pid_t l_pid; - long pad[4]; -} flock_t; + off_t l_start; + off_t l_len; + pid_t l_pid; +}; struct flock64 { short l_type; short l_whence; - __kernel_off_t l_start; - __kernel_off_t l_len; + loff_t l_start; + loff_t l_len; pid_t l_pid; }; -#define HAVE_ARCH_STRUCT_FLOCK -#define HAVE_ARCH_STRUCT_FLOCK64 - -#include <asm-generic/fcntl.h> +#define F_LINUX_SPECIFIC_BASE 1024 #endif /* _XTENSA_FCNTL_H */ diff --git a/include/asm-xtensa/fixmap.h b/include/asm-xtensa/fixmap.h deleted file mode 100644 index 4423b8ad495..00000000000 --- a/include/asm-xtensa/fixmap.h +++ /dev/null @@ -1,252 +0,0 @@ -/* - * include/asm-xtensa/fixmap.h - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2001 - 2005 Tensilica Inc. - */ - -#ifndef _XTENSA_FIXMAP_H -#define _XTENSA_FIXMAP_H - -#include <asm/processor.h> - -#ifdef CONFIG_MMU - -/* - * Here we define all the compile-time virtual addresses. - */ - -#if XCHAL_SEG_MAPPABLE_VADDR != 0 -# error "Current port requires virtual user space starting at 0" -#endif -#if XCHAL_SEG_MAPPABLE_SIZE < 0x80000000 -# error "Current port requires at least 0x8000000 bytes for user space" -#endif - -/* Verify instruction/data ram/rom and xlmi don't overlay vmalloc space. */ - -#define __IN_VMALLOC(addr) \ - (((addr) >= VMALLOC_START) && ((addr) < VMALLOC_END)) -#define __SPAN_VMALLOC(start,end) \ - (((start) < VMALLOC_START) && ((end) >= VMALLOC_END)) -#define INSIDE_VMALLOC(start,end) \ - (__IN_VMALLOC((start)) || __IN_VMALLOC(end) || __SPAN_VMALLOC((start),(end))) - -#if XCHAL_NUM_INSTROM -# if XCHAL_NUM_INSTROM == 1 -# if INSIDE_VMALLOC(XCHAL_INSTROM0_VADDR,XCHAL_INSTROM0_VADDR+XCHAL_INSTROM0_SIZE) -# error vmalloc range conflicts with instrom0 -# endif -# endif -# if XCHAL_NUM_INSTROM == 2 -# if INSIDE_VMALLOC(XCHAL_INSTROM1_VADDR,XCHAL_INSTROM1_VADDR+XCHAL_INSTROM1_SIZE) -# error vmalloc range conflicts with instrom1 -# endif -# endif -#endif - -#if XCHAL_NUM_INSTRAM -# if XCHAL_NUM_INSTRAM == 1 -# if INSIDE_VMALLOC(XCHAL_INSTRAM0_VADDR,XCHAL_INSTRAM0_VADDR+XCHAL_INSTRAM0_SIZE) -# error vmalloc range conflicts with instram0 -# endif -# endif -# if XCHAL_NUM_INSTRAM == 2 -# if INSIDE_VMALLOC(XCHAL_INSTRAM1_VADDR,XCHAL_INSTRAM1_VADDR+XCHAL_INSTRAM1_SIZE) -# error vmalloc range conflicts with instram1 -# endif -# endif -#endif - -#if XCHAL_NUM_DATAROM -# if XCHAL_NUM_DATAROM == 1 -# if INSIDE_VMALLOC(XCHAL_DATAROM0_VADDR,XCHAL_DATAROM0_VADDR+XCHAL_DATAROM0_SIZE) -# error vmalloc range conflicts with datarom0 -# endif -# endif -# if XCHAL_NUM_DATAROM == 2 -# if INSIDE_VMALLOC(XCHAL_DATAROM1_VADDR,XCHAL_DATAROM1_VADDR+XCHAL_DATAROM1_SIZE) -# error vmalloc range conflicts with datarom1 -# endif -# endif -#endif - -#if XCHAL_NUM_DATARAM -# if XCHAL_NUM_DATARAM == 1 -# if INSIDE_VMALLOC(XCHAL_DATARAM0_VADDR,XCHAL_DATARAM0_VADDR+XCHAL_DATARAM0_SIZE) -# error vmalloc range conflicts with dataram0 -# endif -# endif -# if XCHAL_NUM_DATARAM == 2 -# if INSIDE_VMALLOC(XCHAL_DATARAM1_VADDR,XCHAL_DATARAM1_VADDR+XCHAL_DATARAM1_SIZE) -# error vmalloc range conflicts with dataram1 -# endif -# endif -#endif - -#if XCHAL_NUM_XLMI -# if XCHAL_NUM_XLMI == 1 -# if INSIDE_VMALLOC(XCHAL_XLMI0_VADDR,XCHAL_XLMI0_VADDR+XCHAL_XLMI0_SIZE) -# error vmalloc range conflicts with xlmi0 -# endif -# endif -# if XCHAL_NUM_XLMI == 2 -# if INSIDE_VMALLOC(XCHAL_XLMI1_VADDR,XCHAL_XLMI1_VADDR+XCHAL_XLMI1_SIZE) -# error vmalloc range conflicts with xlmi1 -# endif -# endif -#endif - -#if (XCHAL_NUM_INSTROM > 2) || \ - (XCHAL_NUM_INSTRAM > 2) || \ - (XCHAL_NUM_DATARAM > 2) || \ - (XCHAL_NUM_DATAROM > 2) || \ - (XCHAL_NUM_XLMI > 2) -# error Insufficient checks on vmalloc above for more than 2 devices -#endif - -/* - * USER_VM_SIZE does not necessarily equal TASK_SIZE. We bumped - * TASK_SIZE down to 0x4000000 to simplify the handling of windowed - * call instructions (currently limited to a range of 1 GByte). User - * tasks may very well reclaim the VM space from 0x40000000 to - * 0x7fffffff in the future, so we do not want the kernel becoming - * accustomed to having any of its stuff (e.g., page tables) in this - * region. This VM region is no-man's land for now. - */ - -#define USER_VM_START XCHAL_SEG_MAPPABLE_VADDR -#define USER_VM_SIZE 0x80000000 - -/* Size of page table: */ - -#define PGTABLE_SIZE_BITS (32 - XCHAL_MMU_MIN_PTE_PAGE_SIZE + 2) -#define PGTABLE_SIZE (1L << PGTABLE_SIZE_BITS) - -/* All kernel-mappable space: */ - -#define KERNEL_ALLMAP_START (USER_VM_START + USER_VM_SIZE) -#define KERNEL_ALLMAP_SIZE (XCHAL_SEG_MAPPABLE_SIZE - KERNEL_ALLMAP_START) - -/* Carve out page table at start of kernel-mappable area: */ - -#if KERNEL_ALLMAP_SIZE < PGTABLE_SIZE -#error "Gimme some space for page table!" -#endif -#define PGTABLE_START KERNEL_ALLMAP_START - -/* Remaining kernel-mappable space: */ - -#define KERNEL_MAPPED_START (KERNEL_ALLMAP_START + PGTABLE_SIZE) -#define KERNEL_MAPPED_SIZE (KERNEL_ALLMAP_SIZE - PGTABLE_SIZE) - -#if KERNEL_MAPPED_SIZE < 0x01000000 /* 16 MB is arbitrary for now */ -# error "Shouldn't the kernel have at least *some* mappable space?" -#endif - -#define MAX_LOW_MEMORY XCHAL_KSEG_CACHED_SIZE - -#endif - -/* - * Some constants used elsewhere, but perhaps only in Xtensa header - * files, so maybe we can get rid of some and access compile-time HAL - * directly... - * - * Note: We assume that system RAM is located at the very start of the - * kernel segments !! - */ -#define KERNEL_VM_LOW XCHAL_KSEG_CACHED_VADDR -#define KERNEL_VM_HIGH XCHAL_KSEG_BYPASS_VADDR -#define KERNEL_SPACE XCHAL_KSEG_CACHED_VADDR - -/* - * Returns the physical/virtual addresses of the kernel space - * (works with the cached kernel segment only, which is the - * one normally used for kernel operation). - */ - -/* PHYSICAL BYPASS CACHED - * - * bypass vaddr bypass paddr * cached vaddr - * cached vaddr cached paddr bypass vaddr * - * bypass paddr * bypass vaddr cached vaddr - * cached paddr * bypass vaddr cached vaddr - * other * * * - */ - -#define PHYSADDR(a) \ -(((unsigned)(a) >= XCHAL_KSEG_BYPASS_VADDR \ - && (unsigned)(a) < XCHAL_KSEG_BYPASS_VADDR + XCHAL_KSEG_BYPASS_SIZE) ? \ - (unsigned)(a) - XCHAL_KSEG_BYPASS_VADDR + XCHAL_KSEG_BYPASS_PADDR : \ - ((unsigned)(a) >= XCHAL_KSEG_CACHED_VADDR \ - && (unsigned)(a) < XCHAL_KSEG_CACHED_VADDR + XCHAL_KSEG_CACHED_SIZE) ? \ - (unsigned)(a) - XCHAL_KSEG_CACHED_VADDR + XCHAL_KSEG_CACHED_PADDR : \ - (unsigned)(a)) - -#define BYPASS_ADDR(a) \ -(((unsigned)(a) >= XCHAL_KSEG_BYPASS_PADDR \ - && (unsigned)(a) < XCHAL_KSEG_BYPASS_PADDR + XCHAL_KSEG_BYPASS_SIZE) ? \ - (unsigned)(a) - XCHAL_KSEG_BYPASS_PADDR + XCHAL_KSEG_BYPASS_VADDR : \ - ((unsigned)(a) >= XCHAL_KSEG_CACHED_PADDR \ - && (unsigned)(a) < XCHAL_KSEG_CACHED_PADDR + XCHAL_KSEG_CACHED_SIZE) ? \ - (unsigned)(a) - XCHAL_KSEG_CACHED_PADDR + XCHAL_KSEG_BYPASS_VADDR : \ - ((unsigned)(a) >= XCHAL_KSEG_CACHED_VADDR \ - && (unsigned)(a) < XCHAL_KSEG_CACHED_VADDR+XCHAL_KSEG_CACHED_SIZE)? \ - (unsigned)(a) - XCHAL_KSEG_CACHED_VADDR+XCHAL_KSEG_BYPASS_VADDR: \ - (unsigned)(a)) - -#define CACHED_ADDR(a) \ -(((unsigned)(a) >= XCHAL_KSEG_BYPASS_PADDR \ - && (unsigned)(a) < XCHAL_KSEG_BYPASS_PADDR + XCHAL_KSEG_BYPASS_SIZE) ? \ - (unsigned)(a) - XCHAL_KSEG_BYPASS_PADDR + XCHAL_KSEG_CACHED_VADDR : \ - ((unsigned)(a) >= XCHAL_KSEG_CACHED_PADDR \ - && (unsigned)(a) < XCHAL_KSEG_CACHED_PADDR + XCHAL_KSEG_CACHED_SIZE) ? \ - (unsigned)(a) - XCHAL_KSEG_CACHED_PADDR + XCHAL_KSEG_CACHED_VADDR : \ - ((unsigned)(a) >= XCHAL_KSEG_BYPASS_VADDR \ - && (unsigned)(a) < XCHAL_KSEG_BYPASS_VADDR+XCHAL_KSEG_BYPASS_SIZE) ? \ - (unsigned)(a) - XCHAL_KSEG_BYPASS_VADDR+XCHAL_KSEG_CACHED_VADDR : \ - (unsigned)(a)) - -#define PHYSADDR_IO(a) \ -(((unsigned)(a) >= XCHAL_KIO_BYPASS_VADDR \ - && (unsigned)(a) < XCHAL_KIO_BYPASS_VADDR + XCHAL_KIO_BYPASS_SIZE) ? \ - (unsigned)(a) - XCHAL_KIO_BYPASS_VADDR + XCHAL_KIO_BYPASS_PADDR : \ - ((unsigned)(a) >= XCHAL_KIO_CACHED_VADDR \ - && (unsigned)(a) < XCHAL_KIO_CACHED_VADDR + XCHAL_KIO_CACHED_SIZE) ? \ - (unsigned)(a) - XCHAL_KIO_CACHED_VADDR + XCHAL_KIO_CACHED_PADDR : \ - (unsigned)(a)) - -#define BYPASS_ADDR_IO(a) \ -(((unsigned)(a) >= XCHAL_KIO_BYPASS_PADDR \ - && (unsigned)(a) < XCHAL_KIO_BYPASS_PADDR + XCHAL_KIO_BYPASS_SIZE) ? \ - (unsigned)(a) - XCHAL_KIO_BYPASS_PADDR + XCHAL_KIO_BYPASS_VADDR : \ - ((unsigned)(a) >= XCHAL_KIO_CACHED_PADDR \ - && (unsigned)(a) < XCHAL_KIO_CACHED_PADDR + XCHAL_KIO_CACHED_SIZE) ? \ - (unsigned)(a) - XCHAL_KIO_CACHED_PADDR + XCHAL_KIO_BYPASS_VADDR : \ - ((unsigned)(a) >= XCHAL_KIO_CACHED_VADDR \ - && (unsigned)(a) < XCHAL_KIO_CACHED_VADDR + XCHAL_KIO_CACHED_SIZE) ? \ - (unsigned)(a) - XCHAL_KIO_CACHED_VADDR + XCHAL_KIO_BYPASS_VADDR : \ - (unsigned)(a)) - -#define CACHED_ADDR_IO(a) \ -(((unsigned)(a) >= XCHAL_KIO_BYPASS_PADDR \ - && (unsigned)(a) < XCHAL_KIO_BYPASS_PADDR + XCHAL_KIO_BYPASS_SIZE) ? \ - (unsigned)(a) - XCHAL_KIO_BYPASS_PADDR + XCHAL_KIO_CACHED_VADDR : \ - ((unsigned)(a) >= XCHAL_KIO_CACHED_PADDR \ - && (unsigned)(a) < XCHAL_KIO_CACHED_PADDR + XCHAL_KIO_CACHED_SIZE) ? \ - (unsigned)(a) - XCHAL_KIO_CACHED_PADDR + XCHAL_KIO_CACHED_VADDR : \ - ((unsigned)(a) >= XCHAL_KIO_BYPASS_VADDR \ - && (unsigned)(a) < XCHAL_KIO_BYPASS_VADDR + XCHAL_KIO_BYPASS_SIZE) ? \ - (unsigned)(a) - XCHAL_KIO_BYPASS_VADDR + XCHAL_KIO_CACHED_VADDR : \ - (unsigned)(a)) - -#endif /* _XTENSA_ADDRSPACE_H */ - - - - - diff --git a/include/asm-xtensa/io.h b/include/asm-xtensa/io.h index 556e5eed34f..31ffc3f119c 100644 --- a/include/asm-xtensa/io.h +++ b/include/asm-xtensa/io.h @@ -1,5 +1,5 @@ /* - * linux/include/asm-xtensa/io.h + * include/asm-xtensa/io.h * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive @@ -15,10 +15,11 @@ #include <asm/byteorder.h> #include <linux/types.h> -#include <asm/fixmap.h> - -#define _IO_BASE 0 +#define XCHAL_KIO_CACHED_VADDR 0xf0000000 +#define XCHAL_KIO_BYPASS_VADDR 0xf8000000 +#define XCHAL_KIO_PADDR 0xf0000000 +#define XCHAL_KIO_SIZE 0x08000000 /* * swap functions to change byte order from little-endian to big-endian and @@ -42,40 +43,43 @@ static inline unsigned int _swapl (unsigned int v) static inline unsigned long virt_to_phys(volatile void * address) { - return PHYSADDR((unsigned long)address); + return __pa(address); } static inline void * phys_to_virt(unsigned long address) { - return (void*) CACHED_ADDR(address); + return __va(address); } /* - * IO bus memory addresses are also 1:1 with the physical address + * virt_to_bus and bus_to_virt are deprecated. */ -static inline unsigned long virt_to_bus(volatile void * address) -{ - return PHYSADDR((unsigned long)address); -} - -static inline void * bus_to_virt (unsigned long address) -{ - return (void *) CACHED_ADDR(address); -} +#define virt_to_bus(x) virt_to_phys(x) +#define bus_to_virt(x) phys_to_virt(x) /* - * Change "struct page" to physical address. + * Return the virtual (cached) address for the specified bus memory. + * Note that we currently don't support any address outside the KIO segment. */ static inline void *ioremap(unsigned long offset, unsigned long size) { - return (void *) CACHED_ADDR_IO(offset); + if (offset >= XCHAL_KIO_PADDR + && offset < XCHAL_KIO_PADDR + XCHAL_KIO_SIZE) + return (void*)(offset-XCHAL_KIO_PADDR+XCHAL_KIO_BYPASS_VADDR); + + else + BUG(); } static inline void *ioremap_nocache(unsigned long offset, unsigned long size) { - return (void *) BYPASS_ADDR_IO(offset); + if (offset >= XCHAL_KIO_PADDR + && offset < XCHAL_KIO_PADDR + XCHAL_KIO_SIZE) + return (void*)(offset-XCHAL_KIO_PADDR+XCHAL_KIO_CACHED_VADDR); + else + BUG(); } static inline void iounmap(void *addr) @@ -121,9 +125,6 @@ static inline void __raw_writel(__u32 b, volatile void __iomem *addr) *(__force volatile __u32 *)(addr) = b; } - - - /* These are the definitions for the x86 IO instructions * inb/inw/inl/outb/outw/outl, the "string" versions * insb/insw/insl/outsb/outsw/outsl, and the "pausing" versions @@ -131,11 +132,11 @@ static inline void __raw_writel(__u32 b, volatile void __iomem *addr) * The macros don't do byte-swapping. */ -#define inb(port) readb((u8 *)((port)+_IO_BASE)) -#define outb(val, port) writeb((val),(u8 *)((unsigned long)(port)+_IO_BASE)) -#define inw(port) readw((u16 *)((port)+_IO_BASE)) -#define outw(val, port) writew((val),(u16 *)((unsigned long)(port)+_IO_BASE)) -#define inl(port) readl((u32 *)((port)+_IO_BASE)) +#define inb(port) readb((u8 *)((port))) +#define outb(val, port) writeb((val),(u8 *)((unsigned long)(port))) +#define inw(port) readw((u16 *)((port))) +#define outw(val, port) writew((val),(u16 *)((unsigned long)(port))) +#define inl(port) readl((u32 *)((port))) #define outl(val, port) writel((val),(u32 *)((unsigned long)(port))) #define inb_p(port) inb((port)) @@ -180,14 +181,13 @@ extern void outsl (unsigned long port, const void *src, unsigned long count); /* - * * Convert a physical pointer to a virtual kernel pointer for /dev/mem - * * access - * */ + * Convert a physical pointer to a virtual kernel pointer for /dev/mem access + */ #define xlate_dev_mem_ptr(p) __va(p) /* - * * Convert a virtual cached pointer to an uncached pointer - * */ + * Convert a virtual cached pointer to an uncached pointer + */ #define xlate_dev_kmem_ptr(p) p diff --git a/include/asm-xtensa/irq.h b/include/asm-xtensa/irq.h index 049fde7e752..fc73b7f11af 100644 --- a/include/asm-xtensa/irq.h +++ b/include/asm-xtensa/irq.h @@ -12,8 +12,7 @@ #define _XTENSA_IRQ_H #include <asm/platform/hardware.h> - -#include <xtensa/config/core.h> +#include <asm/variant/core.h> #ifndef PLATFORM_NR_IRQS # define PLATFORM_NR_IRQS 0 @@ -27,10 +26,5 @@ static __inline__ int irq_canonicalize(int irq) } struct irqaction; -#if 0 // FIXME -extern void disable_irq_nosync(unsigned int); -extern void disable_irq(unsigned int); -extern void enable_irq(unsigned int); -#endif #endif /* _XTENSA_IRQ_H */ diff --git a/include/asm-xtensa/irq_regs.h b/include/asm-xtensa/irq_regs.h new file mode 100644 index 00000000000..3dd9c0b7027 --- /dev/null +++ b/include/asm-xtensa/irq_regs.h @@ -0,0 +1 @@ +#include <asm-generic/irq_regs.h> diff --git a/include/asm-xtensa/mmu_context.h b/include/asm-xtensa/mmu_context.h index af683a74a4e..f14851f086c 100644 --- a/include/asm-xtensa/mmu_context.h +++ b/include/asm-xtensa/mmu_context.h @@ -16,187 +16,32 @@ #include <linux/stringify.h> #include <asm/pgtable.h> -#include <asm/mmu_context.h> #include <asm/cacheflush.h> #include <asm/tlbflush.h> -/* - * Linux was ported to Xtensa assuming all auto-refill ways in set 0 - * had the same properties (a very likely assumption). Multiple sets - * of auto-refill ways will still work properly, but not as optimally - * as the Xtensa designer may have assumed. - * - * We make this case a hard #error, killing the kernel build, to alert - * the developer to this condition (which is more likely an error). - * You super-duper clever developers can change it to a warning or - * remove it altogether if you think you know what you're doing. :) - */ +#define XCHAL_MMU_ASID_BITS 8 #if (XCHAL_HAVE_TLBS != 1) # error "Linux must have an MMU!" #endif -#if ((XCHAL_ITLB_ARF_WAYS == 0) || (XCHAL_DTLB_ARF_WAYS == 0)) -# error "MMU must have auto-refill ways" -#endif - -#if ((XCHAL_ITLB_ARF_SETS != 1) || (XCHAL_DTLB_ARF_SETS != 1)) -# error Linux may not use all auto-refill ways as efficiently as you think -#endif - -#if (XCHAL_MMU_MAX_PTE_PAGE_SIZE != XCHAL_MMU_MIN_PTE_PAGE_SIZE) -# error Only one page size allowed! -#endif - extern unsigned long asid_cache; -extern pgd_t *current_pgd; - -/* - * Define the number of entries per auto-refill way in set 0 of both I and D - * TLBs. We deal only with set 0 here (an assumption further explained in - * assertions.h). Also, define the total number of ARF entries in both TLBs. - */ - -#define ITLB_ENTRIES_PER_ARF_WAY (XCHAL_ITLB_SET(XCHAL_ITLB_ARF_SET0,ENTRIES)) -#define DTLB_ENTRIES_PER_ARF_WAY (XCHAL_DTLB_SET(XCHAL_DTLB_ARF_SET0,ENTRIES)) - -#define ITLB_ENTRIES \ - (ITLB_ENTRIES_PER_ARF_WAY * (XCHAL_ITLB_SET(XCHAL_ITLB_ARF_SET0,WAYS))) -#define DTLB_ENTRIES \ - (DTLB_ENTRIES_PER_ARF_WAY * (XCHAL_DTLB_SET(XCHAL_DTLB_ARF_SET0,WAYS))) - - -/* - * SMALLEST_NTLB_ENTRIES is the smaller of ITLB_ENTRIES and DTLB_ENTRIES. - * In practice, they are probably equal. This macro simplifies function - * flush_tlb_range(). - */ - -#if (DTLB_ENTRIES < ITLB_ENTRIES) -# define SMALLEST_NTLB_ENTRIES DTLB_ENTRIES -#else -# define SMALLEST_NTLB_ENTRIES ITLB_ENTRIES -#endif - - -/* - * asid_cache tracks only the ASID[USER_RING] field of the RASID special - * register, which is the current user-task asid allocation value. - * mm->context has the same meaning. When it comes time to write the - * asid_cache or mm->context values to the RASID special register, we first - * shift the value left by 8, then insert the value. - * ASID[0] always contains the kernel's asid value, and we reserve three - * other asid values that we never assign to user tasks. - */ - -#define ASID_INC 0x1 -#define ASID_MASK ((1 << XCHAL_MMU_ASID_BITS) - 1) - -/* - * XCHAL_MMU_ASID_INVALID is a configurable Xtensa processor constant - * indicating invalid address space. XCHAL_MMU_ASID_KERNEL is a configurable - * Xtensa processor constant indicating the kernel address space. They can - * be arbitrary values. - * - * We identify three more unique, reserved ASID values to use in the unused - * ring positions. No other user process will be assigned these reserved - * ASID values. - * - * For example, given that - * - * XCHAL_MMU_ASID_INVALID == 0 - * XCHAL_MMU_ASID_KERNEL == 1 - * - * the following maze of #if statements would generate - * - * ASID_RESERVED_1 == 2 - * ASID_RESERVED_2 == 3 - * ASID_RESERVED_3 == 4 - * ASID_FIRST_NONRESERVED == 5 - */ - -#if (XCHAL_MMU_ASID_INVALID != XCHAL_MMU_ASID_KERNEL + 1) -# define ASID_RESERVED_1 ((XCHAL_MMU_ASID_KERNEL + 1) & ASID_MASK) -#else -# define ASID_RESERVED_1 ((XCHAL_MMU_ASID_KERNEL + 2) & ASID_MASK) -#endif - -#if (XCHAL_MMU_ASID_INVALID != ASID_RESERVED_1 + 1) -# define ASID_RESERVED_2 ((ASID_RESERVED_1 + 1) & ASID_MASK) -#else -# define ASID_RESERVED_2 ((ASID_RESERVED_1 + 2) & ASID_MASK) -#endif - -#if (XCHAL_MMU_ASID_INVALID != ASID_RESERVED_2 + 1) -# define ASID_RESERVED_3 ((ASID_RESERVED_2 + 1) & ASID_MASK) -#else -# define ASID_RESERVED_3 ((ASID_RESERVED_2 + 2) & ASID_MASK) -#endif - -#if (XCHAL_MMU_ASID_INVALID != ASID_RESERVED_3 + 1) -# define ASID_FIRST_NONRESERVED ((ASID_RESERVED_3 + 1) & ASID_MASK) -#else -# define ASID_FIRST_NONRESERVED ((ASID_RESERVED_3 + 2) & ASID_MASK) -#endif - -#define ASID_ALL_RESERVED ( ((ASID_RESERVED_1) << 24) + \ - ((ASID_RESERVED_2) << 16) + \ - ((ASID_RESERVED_3) << 8) + \ - ((XCHAL_MMU_ASID_KERNEL)) ) - /* * NO_CONTEXT is the invalid ASID value that we don't ever assign to - * any user or kernel context. NO_CONTEXT is a better mnemonic than - * XCHAL_MMU_ASID_INVALID, so we use it in code instead. - */ - -#define NO_CONTEXT XCHAL_MMU_ASID_INVALID - -#if (KERNEL_RING != 0) -# error The KERNEL_RING really should be zero. -#endif - -#if (USER_RING >= XCHAL_MMU_RINGS) -# error USER_RING cannot be greater than the highest numbered ring. -#endif - -#if (USER_RING == KERNEL_RING) -# error The user and kernel rings really should not be equal. -#endif - -#if (USER_RING == 1) -#define ASID_INSERT(x) ( ((ASID_RESERVED_1) << 24) + \ - ((ASID_RESERVED_2) << 16) + \ - (((x) & (ASID_MASK)) << 8) + \ - ((XCHAL_MMU_ASID_KERNEL)) ) - -#elif (USER_RING == 2) -#define ASID_INSERT(x) ( ((ASID_RESERVED_1) << 24) + \ - (((x) & (ASID_MASK)) << 16) + \ - ((ASID_RESERVED_2) << 8) + \ - ((XCHAL_MMU_ASID_KERNEL)) ) - -#elif (USER_RING == 3) -#define ASID_INSERT(x) ( (((x) & (ASID_MASK)) << 24) + \ - ((ASID_RESERVED_1) << 16) + \ - ((ASID_RESERVED_2) << 8) + \ - ((XCHAL_MMU_ASID_KERNEL)) ) - -#else -#error Goofy value for USER_RING - -#endif /* USER_RING == 1 */ - - -/* - * All unused by hardware upper bits will be considered - * as a software asid extension. + * any user or kernel context. + * + * 0 invalid + * 1 kernel + * 2 reserved + * 3 reserved + * 4...255 available */ -#define ASID_VERSION_MASK ((unsigned long)~(ASID_MASK|(ASID_MASK-1))) -#define ASID_FIRST_VERSION \ - ((unsigned long)(~ASID_VERSION_MASK) + 1 + ASID_FIRST_NONRESERVED) +#define NO_CONTEXT 0 +#define ASID_USER_FIRST 4 +#define ASID_MASK ((1 << XCHAL_MMU_ASID_BITS) - 1) +#define ASID_INSERT(x) (0x03020001 | (((x) & ASID_MASK) << 8)) static inline void set_rasid_register (unsigned long val) { @@ -207,67 +52,28 @@ static inline void set_rasid_register (unsigned long val) static inline unsigned long get_rasid_register (void) { unsigned long tmp; - __asm__ __volatile__ (" rsr %0, "__stringify(RASID)"\n\t" : "=a" (tmp)); + __asm__ __volatile__ (" rsr %0,"__stringify(RASID)"\n\t" : "=a" (tmp)); return tmp; } - -#if ((XCHAL_MMU_ASID_INVALID == 0) && (XCHAL_MMU_ASID_KERNEL == 1)) - static inline void -get_new_mmu_context(struct mm_struct *mm, unsigned long asid) +__get_new_mmu_context(struct mm_struct *mm) { extern void flush_tlb_all(void); - if (! ((asid += ASID_INC) & ASID_MASK) ) { + if (! (++asid_cache & ASID_MASK) ) { flush_tlb_all(); /* start new asid cycle */ - if (!asid) /* fix version if needed */ - asid = ASID_FIRST_VERSION - ASID_FIRST_NONRESERVED; - asid += ASID_FIRST_NONRESERVED; + asid_cache += ASID_USER_FIRST; } - mm->context = asid_cache = asid; -} - -#else -#warning ASID_{INVALID,KERNEL} values impose non-optimal get_new_mmu_context implementation - -/* XCHAL_MMU_ASID_INVALID == 0 and XCHAL_MMU_ASID_KERNEL ==1 are - really the best, but if you insist... */ - -static inline int validate_asid (unsigned long asid) -{ - switch (asid) { - case XCHAL_MMU_ASID_INVALID: - case XCHAL_MMU_ASID_KERNEL: - case ASID_RESERVED_1: - case ASID_RESERVED_2: - case ASID_RESERVED_3: - return 0; /* can't use these values as ASIDs */ - } - return 1; /* valid */ + mm->context = asid_cache; } static inline void -get_new_mmu_context(struct mm_struct *mm, unsigned long asid) +__load_mmu_context(struct mm_struct *mm) { - extern void flush_tlb_all(void); - while (1) { - asid += ASID_INC; - if ( ! (asid & ASID_MASK) ) { - flush_tlb_all(); /* start new asid cycle */ - if (!asid) /* fix version if needed */ - asid = ASID_FIRST_VERSION - ASID_FIRST_NONRESERVED; - asid += ASID_FIRST_NONRESERVED; - break; /* no need to validate here */ - } - if (validate_asid (asid & ASID_MASK)) - break; - } - mm->context = asid_cache = asid; + set_rasid_register(ASID_INSERT(mm->context)); + invalidate_page_directory(); } -#endif - - /* * Initialize the context related info for a new mm_struct * instance. @@ -280,6 +86,20 @@ init_new_context(struct task_struct *tsk, struct mm_struct *mm) return 0; } +/* + * After we have set current->mm to a new value, this activates + * the context for the new mm so we see the new mappings. + */ +static inline void +activate_mm(struct mm_struct *prev, struct mm_struct *next) +{ + /* Unconditionally get a new ASID. */ + + __get_new_mmu_context(next); + __load_mmu_context(next); +} + + static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, struct task_struct *tsk) { @@ -287,11 +107,10 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, /* Check if our ASID is of an older version and thus invalid */ - if ((next->context ^ asid) & ASID_VERSION_MASK) - get_new_mmu_context(next, asid); + if (next->context == NO_CONTEXT || ((next->context^asid) & ~ASID_MASK)) + __get_new_mmu_context(next); - set_rasid_register (ASID_INSERT(next->context)); - invalidate_page_directory(); + __load_mmu_context(next); } #define deactivate_mm(tsk, mm) do { } while(0) @@ -302,20 +121,6 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, */ static inline void destroy_context(struct mm_struct *mm) { - /* Nothing to do. */ -} - -/* - * After we have set current->mm to a new value, this activates - * the context for the new mm so we see the new mappings. - */ -static inline void -activate_mm(struct mm_struct *prev, struct mm_struct *next) -{ - /* Unconditionally get a new ASID. */ - - get_new_mmu_context(next, asid_cache); - set_rasid_register (ASID_INSERT(next->context)); invalidate_page_directory(); } diff --git a/include/asm-xtensa/page.h b/include/asm-xtensa/page.h index 40f4c6c3f58..c631d006194 100644 --- a/include/asm-xtensa/page.h +++ b/include/asm-xtensa/page.h @@ -15,18 +15,24 @@ #include <asm/processor.h> +#define XCHAL_KSEG_CACHED_VADDR 0xd0000000 +#define XCHAL_KSEG_BYPASS_VADDR 0xd8000000 +#define XCHAL_KSEG_PADDR 0x00000000 +#define XCHAL_KSEG_SIZE 0x08000000 + /* * PAGE_SHIFT determines the page size * PAGE_ALIGN(x) aligns the pointer to the (next) page boundary */ -#define PAGE_SHIFT XCHAL_MMU_MIN_PTE_PAGE_SIZE +#define PAGE_SHIFT 12 #define PAGE_SIZE (1 << PAGE_SHIFT) #define PAGE_MASK (~(PAGE_SIZE-1)) #define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE - 1) & PAGE_MASK) -#define DCACHE_WAY_SIZE (XCHAL_DCACHE_SIZE / XCHAL_DCACHE_WAYS) #define PAGE_OFFSET XCHAL_KSEG_CACHED_VADDR +#define MAX_MEM_PFN XCHAL_KSEG_SIZE +#define PGTABLE_START 0x80000000 #ifdef __ASSEMBLY__ diff --git a/include/asm-xtensa/param.h b/include/asm-xtensa/param.h index c0eec8260b0..6f281392e3f 100644 --- a/include/asm-xtensa/param.h +++ b/include/asm-xtensa/param.h @@ -11,7 +11,7 @@ #ifndef _XTENSA_PARAM_H #define _XTENSA_PARAM_H -#include <xtensa/config/core.h> +#include <asm/variant/core.h> #ifdef __KERNEL__ # define HZ 100 /* internal timer frequency */ diff --git a/include/asm-xtensa/pgtable.h b/include/asm-xtensa/pgtable.h index b4318934b10..2d4b5db6ea6 100644 --- a/include/asm-xtensa/pgtable.h +++ b/include/asm-xtensa/pgtable.h @@ -14,45 +14,6 @@ #include <asm-generic/pgtable-nopmd.h> #include <asm/page.h> -/* Assertions. */ - -#ifdef CONFIG_MMU - - -#if (XCHAL_MMU_RINGS < 2) -# error Linux build assumes at least 2 ring levels. -#endif - -#if (XCHAL_MMU_CA_BITS != 4) -# error We assume exactly four bits for CA. -#endif - -#if (XCHAL_MMU_SR_BITS != 0) -# error We have no room for SR bits. -#endif - -/* - * Use the first min-wired way for mapping page-table pages. - * Page coloring requires a second min-wired way. - */ - -#if (XCHAL_DTLB_MINWIRED_SETS == 0) -# error Need a min-wired way for mapping page-table pages -#endif - -#define DTLB_WAY_PGTABLE XCHAL_DTLB_SET(XCHAL_DTLB_MINWIRED_SET0, WAY) - -#if (DCACHE_WAY_SIZE > PAGE_SIZE) && XCHAL_DCACHE_IS_WRITEBACK -# if XCHAL_DTLB_SET(XCHAL_DTLB_MINWIRED_SET0, WAYS) >= 2 -# define DTLB_WAY_DCACHE_ALIAS0 (DTLB_WAY_PGTABLE + 1) -# define DTLB_WAY_DCACHE_ALIAS1 (DTLB_WAY_PGTABLE + 2) -# else -# error Page coloring requires its own wired dtlb way! -# endif -#endif - -#endif /* CONFIG_MMU */ - /* * We only use two ring levels, user and kernel space. */ @@ -97,7 +58,7 @@ #define PGD_ORDER 0 #define PMD_ORDER 0 #define USER_PTRS_PER_PGD (TASK_SIZE/PGDIR_SIZE) -#define FIRST_USER_ADDRESS XCHAL_SEG_MAPPABLE_VADDR +#define FIRST_USER_ADDRESS 0 #define FIRST_USER_PGD_NR (FIRST_USER_ADDRESS >> PGDIR_SHIFT) /* virtual memory area. We keep a distance to other memory regions to be diff --git a/include/asm-xtensa/platform-iss/hardware.h b/include/asm-xtensa/platform-iss/hardware.h index 22240f00180..6930c12adc1 100644 --- a/include/asm-xtensa/platform-iss/hardware.h +++ b/include/asm-xtensa/platform-iss/hardware.h @@ -12,18 +12,18 @@ * This file contains the default configuration of ISS. */ -#ifndef __ASM_XTENSA_ISS_HARDWARE -#define __ASM_XTENSA_ISS_HARDWARE +#ifndef _XTENSA_PLATFORM_ISS_HARDWARE_H +#define _XTENSA_PLATFORM_ISS_HARDWARE_H /* * Memory configuration. */ -#define PLATFORM_DEFAULT_MEM_START XSHAL_RAM_PADDR -#define PLATFORM_DEFAULT_MEM_SIZE XSHAL_RAM_VSIZE +#define PLATFORM_DEFAULT_MEM_START 0x00000000 +#define PLATFORM_DEFAULT_MEM_SIZE 0x08000000 /* * Interrupt configuration. */ -#endif /* __ASM_XTENSA_ISS_HARDWARE */ +#endif /* _XTENSA_PLATFORM_ISS_HARDWARE_H */ diff --git a/include/asm-xtensa/platform-iss/simcall.h b/include/asm-xtensa/platform-iss/simcall.h new file mode 100644 index 00000000000..6acb572759a --- /dev/null +++ b/include/asm-xtensa/platform-iss/simcall.h @@ -0,0 +1,62 @@ +/* + * include/asm-xtensa/platform-iss/hardware.h + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2001 Tensilica Inc. + */ + +#ifndef _XTENSA_PLATFORM_ISS_SIMCALL_H +#define _XTENSA_PLATFORM_ISS_SIMCALL_H + + +/* + * System call like services offered by the simulator host. + */ + +#define SYS_nop 0 /* unused */ +#define SYS_exit 1 /*x*/ +#define SYS_fork 2 +#define SYS_read 3 /*x*/ +#define SYS_write 4 /*x*/ +#define SYS_open 5 /*x*/ +#define SYS_close 6 /*x*/ +#define SYS_rename 7 /*x 38 - waitpid */ +#define SYS_creat 8 /*x*/ +#define SYS_link 9 /*x (not implemented on WIN32) */ +#define SYS_unlink 10 /*x*/ +#define SYS_execv 11 /* n/a - execve */ +#define SYS_execve 12 /* 11 - chdir */ +#define SYS_pipe 13 /* 42 - time */ +#define SYS_stat 14 /* 106 - mknod */ +#define SYS_chmod 15 +#define SYS_chown 16 /* 202 - lchown */ +#define SYS_utime 17 /* 30 - break */ +#define SYS_wait 18 /* n/a - oldstat */ +#define SYS_lseek 19 /*x*/ +#define SYS_getpid 20 +#define SYS_isatty 21 /* n/a - mount */ +#define SYS_fstat 22 /* 108 - oldumount */ +#define SYS_time 23 /* 13 - setuid */ +#define SYS_gettimeofday 24 /*x 78 - getuid (not implemented on WIN32) */ +#define SYS_times 25 /*X 43 - stime (Xtensa-specific implementation) */ +#define SYS_socket 26 +#define SYS_sendto 27 +#define SYS_recvfrom 28 +#define SYS_select_one 29 /* not compitible select, one file descriptor at the time */ +#define SYS_bind 30 +#define SYS_ioctl 31 + +/* + * SYS_select_one specifiers + */ + +#define XTISS_SELECT_ONE_READ 1 +#define XTISS_SELECT_ONE_WRITE 2 +#define XTISS_SELECT_ONE_EXCEPT 3 + + +#endif /* _XTENSA_PLATFORM_ISS_SIMCALL_H */ + diff --git a/include/asm-xtensa/posix_types.h b/include/asm-xtensa/posix_types.h index 2c816b0e776..4ad77dda6d5 100644 --- a/include/asm-xtensa/posix_types.h +++ b/include/asm-xtensa/posix_types.h @@ -21,7 +21,7 @@ typedef unsigned long __kernel_ino_t; typedef unsigned int __kernel_mode_t; -typedef unsigned short __kernel_nlink_t; +typedef unsigned long __kernel_nlink_t; typedef long __kernel_off_t; typedef int __kernel_pid_t; typedef unsigned short __kernel_ipc_pid_t; @@ -60,7 +60,7 @@ typedef struct { #define __FD_CLR(d, set) ((set)->fds_bits[__FDELT(d)] &= ~__FDMASK(d)) #define __FD_ISSET(d, set) ((set)->fds_bits[__FDELT(d)] & __FDMASK(d)) #define __FD_ZERO(set) \ - ((void) memset ((__ptr_t) (set), 0, sizeof (__kernel_fd_set))) + ((void) memset ((void *) (set), 0, sizeof (__kernel_fd_set))) #else /* __GNUC__ */ diff --git a/include/asm-xtensa/processor.h b/include/asm-xtensa/processor.h index 8b96e77c9d8..4feb9f7f35a 100644 --- a/include/asm-xtensa/processor.h +++ b/include/asm-xtensa/processor.h @@ -11,24 +11,18 @@ #ifndef _XTENSA_PROCESSOR_H #define _XTENSA_PROCESSOR_H -#ifdef __ASSEMBLY__ -#define _ASMLANGUAGE -#endif - -#include <xtensa/config/core.h> -#include <xtensa/config/specreg.h> -#include <xtensa/config/tie.h> -#include <xtensa/config/system.h> +#include <asm/variant/core.h> +#include <asm/coprocessor.h> #include <linux/compiler.h> #include <asm/ptrace.h> #include <asm/types.h> -#include <asm/coprocessor.h> +#include <asm/regs.h> /* Assertions. */ #if (XCHAL_HAVE_WINDOWED != 1) -#error Linux requires the Xtensa Windowed Registers Option. +# error Linux requires the Xtensa Windowed Registers Option. #endif /* @@ -145,11 +139,11 @@ struct thread_struct { * Note: We set-up ps as if we did a call4 to the new pc. * set_thread_state in signal.c depends on it. */ -#define USER_PS_VALUE ( (1 << XCHAL_PS_WOE_SHIFT) + \ - (1 << XCHAL_PS_CALLINC_SHIFT) + \ - (USER_RING << XCHAL_PS_RING_SHIFT) + \ - (1 << XCHAL_PS_PROGSTACK_SHIFT) + \ - (1 << XCHAL_PS_EXCM_SHIFT) ) +#define USER_PS_VALUE ((1 << PS_WOE_BIT) | \ + (1 << PS_CALLINC_SHIFT) | \ + (USER_RING << PS_RING_SHIFT) | \ + (1 << PS_UM_BIT) | \ + (1 << PS_EXCM_BIT)) /* Clearing a0 terminates the backtrace. */ #define start_thread(regs, new_pc, new_sp) \ diff --git a/include/asm-xtensa/ptrace.h b/include/asm-xtensa/ptrace.h index a5ac71a5205..1b7fe363fad 100644 --- a/include/asm-xtensa/ptrace.h +++ b/include/asm-xtensa/ptrace.h @@ -11,7 +11,7 @@ #ifndef _XTENSA_PTRACE_H #define _XTENSA_PTRACE_H -#include <xtensa/config/core.h> +#include <asm/variant/core.h> /* * Kernel stack diff --git a/include/asm-xtensa/regs.h b/include/asm-xtensa/regs.h new file mode 100644 index 00000000000..c913d259faa --- /dev/null +++ b/include/asm-xtensa/regs.h @@ -0,0 +1,138 @@ +/* + * Copyright (c) 2006 Tensilica, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of version 2.1 of the GNU Lesser General Public + * License as published by the Free Software Foundation. + * + * This program is distributed in the hope that it would be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + * + * Further, this software is distributed without any warranty that it is + * free of the rightful claim of any third person regarding infringement + * or the like. Any license provided herein, whether implied or + * otherwise, applies only to this software file. Patent licenses, if + * any, provided herein do not apply to combinations of this program with + * other software, or any other product whatsoever. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this program; if not, write the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston MA 02111-1307, + * USA. + */ + +#ifndef _XTENSA_REGS_H +#define _XTENSA_REGS_H + +/* Special registers. */ + +#define LBEG 0 +#define LEND 1 +#define LCOUNT 2 +#define SAR 3 +#define BR 4 +#define SCOMPARE1 12 +#define ACCHI 16 +#define ACCLO 17 +#define MR 32 +#define WINDOWBASE 72 +#define WINDOWSTART 73 +#define PTEVADDR 83 +#define RASID 90 +#define ITLBCFG 91 +#define DTLBCFG 92 +#define IBREAKENABLE 96 +#define DDR 104 +#define IBREAKA 128 +#define DBREAKA 144 +#define DBREAKC 160 +#define EPC 176 +#define EPC_1 177 +#define DEPC 192 +#define EPS 192 +#define EPS_1 193 +#define EXCSAVE 208 +#define EXCSAVE_1 209 +#define INTERRUPT 226 +#define INTENABLE 228 +#define PS 230 +#define THREADPTR 231 +#define EXCCAUSE 232 +#define DEBUGCAUSE 233 +#define CCOUNT 234 +#define PRID 235 +#define ICOUNT 236 +#define ICOUNTLEVEL 237 +#define EXCVADDR 238 +#define CCOMPARE 240 +#define MISC 244 + +/* Special names for read-only and write-only interrupt registers. */ + +#define INTREAD 226 +#define INTSET 226 +#define INTCLEAR 227 + +/* EXCCAUSE register fields */ + +#define EXCCAUSE_EXCCAUSE_SHIFT 0 +#define EXCCAUSE_EXCCAUSE_MASK 0x3F + +#define EXCCAUSE_ILLEGAL_INSTRUCTION 0 +#define EXCCAUSE_SYSTEM_CALL 1 +#define EXCCAUSE_INSTRUCTION_FETCH_ERROR 2 +#define EXCCAUSE_LOAD_STORE_ERROR 3 +#define EXCCAUSE_LEVEL1_INTERRUPT 4 +#define EXCCAUSE_ALLOCA 5 +#define EXCCAUSE_INTEGER_DIVIDE_BY_ZERO 6 +#define EXCCAUSE_SPECULATION 7 +#define EXCCAUSE_PRIVILEGED 8 +#define EXCCAUSE_UNALIGNED 9 +#define EXCCAUSE_ITLB_MISS 16 +#define EXCCAUSE_ITLB_MULTIHIT 17 +#define EXCCAUSE_ITLB_PRIVILEGE 18 +#define EXCCAUSE_ITLB_SIZE_RESTRICTION 19 +#define EXCCAUSE_FETCH_CACHE_ATTRIBUTE 20 +#define EXCCAUSE_DTLB_MISS 24 +#define EXCCAUSE_DTLB_MULTIHIT 25 +#define EXCCAUSE_DTLB_PRIVILEGE 26 +#define EXCCAUSE_DTLB_SIZE_RESTRICTION 27 +#define EXCCAUSE_LOAD_CACHE_ATTRIBUTE 28 +#define EXCCAUSE_STORE_CACHE_ATTRIBUTE 29 +#define EXCCAUSE_FLOATING_POINT 40 + +/* PS register fields. */ + +#define PS_WOE_BIT 18 +#define PS_CALLINC_SHIFT 16 +#define PS_CALLINC_MASK 0x00030000 +#define PS_OWB_SHIFT 8 +#define PS_OWB_MASK 0x00000F00 +#define PS_RING_SHIFT 6 +#define PS_RING_MASK 0x000000C0 +#define PS_UM_BIT 5 +#define PS_EXCM_BIT 4 +#define PS_INTLEVEL_SHIFT 0 +#define PS_INTLEVEL_MASK 0x0000000F + +/* DBREAKCn register fields. */ + +#define DBREAKC_MASK_BIT 0 +#define DBREAKC_MASK_MASK 0x0000003F +#define DBREAKC_LOAD_BIT 30 +#define DBREAKC_LOAD_MASK 0x40000000 +#define DBREAKC_STOR_BIT 31 +#define DBREAKC_STOR_MASK 0x80000000 + +/* DEBUGCAUSE register fields. */ + +#define DEBUGCAUSE_DEBUGINT_BIT 5 /* External debug interrupt */ +#define DEBUGCAUSE_BREAKN_BIT 4 /* BREAK.N instruction */ +#define DEBUGCAUSE_BREAK_BIT 3 /* BREAK instruction */ +#define DEBUGCAUSE_DBREAK_BIT 2 /* DBREAK match */ +#define DEBUGCAUSE_IBREAK_BIT 1 /* IBREAK match */ +#define DEBUGCAUSE_ICOUNT_BIT 0 /* ICOUNT would incr. to zero */ + +#endif /* _XTENSA_SPECREG_H */ + diff --git a/include/asm-xtensa/sembuf.h b/include/asm-xtensa/sembuf.h index 2d26c47666f..c15870493b3 100644 --- a/include/asm-xtensa/sembuf.h +++ b/include/asm-xtensa/sembuf.h @@ -25,7 +25,7 @@ struct semid64_ds { struct ipc64_perm sem_perm; /* permissions .. see ipc.h */ -#if XCHAL_HAVE_LE +#ifdef __XTENSA_EL__ __kernel_time_t sem_otime; /* last semop time */ unsigned long __unused1; __kernel_time_t sem_ctime; /* last change time */ diff --git a/include/asm-xtensa/shmbuf.h b/include/asm-xtensa/shmbuf.h index a30b81a4b93..ad4b0121782 100644 --- a/include/asm-xtensa/shmbuf.h +++ b/include/asm-xtensa/shmbuf.h @@ -19,6 +19,7 @@ #ifndef _XTENSA_SHMBUF_H #define _XTENSA_SHMBUF_H +#if defined (__XTENSA_EL__) struct shmid64_ds { struct ipc64_perm shm_perm; /* operation perms */ size_t shm_segsz; /* size of segment (bytes) */ @@ -34,6 +35,26 @@ struct shmid64_ds { unsigned long __unused4; unsigned long __unused5; }; +#elif defined (__XTENSA_EB__) +struct shmid64_ds { + struct ipc64_perm shm_perm; /* operation perms */ + size_t shm_segsz; /* size of segment (bytes) */ + __kernel_time_t shm_atime; /* last attach time */ + unsigned long __unused1; + __kernel_time_t shm_dtime; /* last detach time */ + unsigned long __unused2; + __kernel_time_t shm_ctime; /* last change time */ + unsigned long __unused3; + __kernel_pid_t shm_cpid; /* pid of creator */ + __kernel_pid_t shm_lpid; /* pid of last operator */ + unsigned long shm_nattch; /* no. of current attaches */ + unsigned long __unused4; + unsigned long __unused5; +}; +#else +# error endian order not defined +#endif + struct shminfo64 { unsigned long shmmax; diff --git a/include/asm-xtensa/stat.h b/include/asm-xtensa/stat.h index 2f4662ff6c3..149f4bce092 100644 --- a/include/asm-xtensa/stat.h +++ b/include/asm-xtensa/stat.h @@ -13,93 +13,57 @@ #include <linux/types.h> -struct __old_kernel_stat { - unsigned short st_dev; - unsigned short st_ino; - unsigned short st_mode; - unsigned short st_nlink; - unsigned short st_uid; - unsigned short st_gid; - unsigned short st_rdev; - unsigned long st_size; - unsigned long st_atime; - unsigned long st_mtime; - unsigned long st_ctime; -}; - #define STAT_HAVE_NSEC 1 struct stat { - unsigned short st_dev; - unsigned short __pad1; - unsigned long st_ino; - unsigned short st_mode; - unsigned short st_nlink; - unsigned short st_uid; - unsigned short st_gid; - unsigned short st_rdev; - unsigned short __pad2; - unsigned long st_size; - unsigned long st_blksize; - unsigned long st_blocks; - unsigned long st_atime; - unsigned long st_atime_nsec; - unsigned long st_mtime; - unsigned long st_mtime_nsec; - unsigned long st_ctime; - unsigned long st_ctime_nsec; - unsigned long __unused4; - unsigned long __unused5; + unsigned long st_dev; + ino_t st_ino; + mode_t st_mode; + nlink_t st_nlink; + uid_t st_uid; + gid_t st_gid; + unsigned int st_rdev; + off_t st_size; + unsigned long st_blksize; + unsigned long st_blocks; + unsigned long st_atime; + unsigned long st_atime_nsec; + unsigned long st_mtime; + unsigned long st_mtime_nsec; + unsigned long st_ctime; + unsigned long st_ctime_nsec; + unsigned long __unused4; + unsigned long __unused5; }; -/* This matches struct stat64 in glibc-2.2.3. */ +/* This matches struct stat64 in glibc-2.3 */ struct stat64 { -#ifdef __XTENSA_EL__ - unsigned short st_dev; /* Device */ - unsigned char __pad0[10]; -#else - unsigned char __pad0[6]; - unsigned short st_dev; - unsigned char __pad1[2]; -#endif - -#define STAT64_HAS_BROKEN_ST_INO 1 - unsigned long __st_ino; /* 32bit file serial number. */ - + unsigned long long st_dev; /* Device */ + unsigned long long st_ino; /* File serial number */ unsigned int st_mode; /* File mode. */ unsigned int st_nlink; /* Link count. */ unsigned int st_uid; /* User ID of the file's owner. */ unsigned int st_gid; /* Group ID of the file's group. */ - -#ifdef __XTENSA_EL__ - unsigned short st_rdev; /* Device number, if device. */ - unsigned char __pad3[10]; -#else - unsigned char __pad2[6]; - unsigned short st_rdev; - unsigned char __pad3[2]; -#endif - - long long int st_size; /* Size of file, in bytes. */ - long int st_blksize; /* Optimal block size for I/O. */ - -#ifdef __XTENSA_EL__ - unsigned long st_blocks; /* Number 512-byte blocks allocated. */ - unsigned long __pad4; + unsigned long long st_rdev; /* Device number, if device. */ + long long st_size; /* Size of file, in bytes. */ + long st_blksize; /* Optimal block size for I/O. */ + unsigned long __unused2; +#ifdef __XTENSA_EB__ + unsigned long __unused3; + long st_blocks; /* Number 512-byte blocks allocated. */ #else - unsigned long __pad4; - unsigned long st_blocks; + long st_blocks; /* Number 512-byte blocks allocated. */ + unsigned long __unused3; #endif - - unsigned long __pad5; - long int st_atime; /* Time of last access. */ - unsigned long st_atime_nsec; - long int st_mtime; /* Time of last modification. */ - unsigned long st_mtime_nsec; - long int st_ctime; /* Time of last status change. */ - unsigned long st_ctime_nsec; - unsigned long long int st_ino; /* File serial number. */ + long st_atime; /* Time of last access. */ + unsigned long st_atime_nsec; + long st_mtime; /* Time of last modification. */ + unsigned long st_mtime_nsec; + long st_ctime; /* Time of last status change. */ + unsigned long st_ctime_nsec; + unsigned long __unused4; + unsigned long __unused5; }; #endif /* _XTENSA_STAT_H */ diff --git a/include/asm-xtensa/syscall.h b/include/asm-xtensa/syscall.h new file mode 100644 index 00000000000..6cb0d42f11c --- /dev/null +++ b/include/asm-xtensa/syscall.h @@ -0,0 +1,20 @@ +struct pt_regs; +struct sigaction; +asmlinkage long xtensa_execve(char*, char**, char**, struct pt_regs*); +asmlinkage long xtensa_clone(unsigned long, unsigned long, struct pt_regs*); +asmlinkage long xtensa_pipe(int __user *); +asmlinkage long xtensa_mmap2(unsigned long, unsigned long, unsigned long, + unsigned long, unsigned long, unsigned long); +asmlinkage long xtensa_ptrace(long, long, long, long); +asmlinkage long xtensa_sigreturn(struct pt_regs*); +asmlinkage long xtensa_rt_sigreturn(struct pt_regs*); +asmlinkage long xtensa_sigsuspend(struct pt_regs*); +asmlinkage long xtensa_rt_sigsuspend(struct pt_regs*); +asmlinkage long xtensa_sigaction(int, const struct old_sigaction*, + struct old_sigaction*); +asmlinkage long xtensa_sigaltstack(struct pt_regs *regs); +asmlinkage long sys_rt_sigaction(int, + const struct sigaction __user *, + struct sigaction __user *, + size_t); +asmlinkage long xtensa_shmat(int shmid, char __user *shmaddr, int shmflg); diff --git a/include/asm-xtensa/system.h b/include/asm-xtensa/system.h index 932bda92a21..4aaed7fe6cf 100644 --- a/include/asm-xtensa/system.h +++ b/include/asm-xtensa/system.h @@ -213,7 +213,7 @@ static inline void spill_registers(void) unsigned int a0, ps; __asm__ __volatile__ ( - "movi a14," __stringify (PS_EXCM_MASK) " | 1\n\t" + "movi a14," __stringify (PS_EXCM_BIT) " | 1\n\t" "mov a12, a0\n\t" "rsr a13," __stringify(SAR) "\n\t" "xsr a14," __stringify(PS) "\n\t" diff --git a/include/asm-xtensa/termbits.h b/include/asm-xtensa/termbits.h index c780593ff5f..057b9a3d8f8 100644 --- a/include/asm-xtensa/termbits.h +++ b/include/asm-xtensa/termbits.h @@ -30,6 +30,17 @@ struct termios { cc_t c_cc[NCCS]; /* control characters */ }; +struct ktermios { + tcflag_t c_iflag; /* input mode flags */ + tcflag_t c_oflag; /* output mode flags */ + tcflag_t c_cflag; /* control mode flags */ + tcflag_t c_lflag; /* local mode flags */ + cc_t c_line; /* line discipline */ + cc_t c_cc[NCCS]; /* control characters */ + speed_t c_ispeed; /* input speed */ + speed_t c_ospeed; /* output speed */ +}; + /* c_cc characters */ #define VINTR 0 diff --git a/include/asm-xtensa/timex.h b/include/asm-xtensa/timex.h index c7b705e6665..28c7985a400 100644 --- a/include/asm-xtensa/timex.h +++ b/include/asm-xtensa/timex.h @@ -16,17 +16,22 @@ #include <asm/processor.h> #include <linux/stringify.h> -#if XCHAL_INT_LEVEL(XCHAL_TIMER0_INTERRUPT) == 1 +#define _INTLEVEL(x) XCHAL_INT ## x ## _LEVEL +#define INTLEVEL(x) _INTLEVEL(x) + +#if INTLEVEL(XCHAL_TIMER0_INTERRUPT) == 1 # define LINUX_TIMER 0 -#elif XCHAL_INT_LEVEL(XCHAL_TIMER1_INTERRUPT) == 1 +# define LINUX_TIMER_INT XCHAL_TIMER0_INTERRUPT +#elif INTLEVEL(XCHAL_TIMER1_INTERRUPT) == 1 # define LINUX_TIMER 1 -#elif XCHAL_INT_LEVEL(XCHAL_TIMER2_INTERRUPT) == 1 +# define LINUX_TIMER_INT XCHAL_TIMER1_INTERRUPT +#elif INTLEVEL(XCHAL_TIMER2_INTERRUPT) == 1 # define LINUX_TIMER 2 +# define LINUX_TIMER_INT XCHAL_TIMER2_INTERRUPT #else # error "Bad timer number for Linux configurations!" #endif -#define LINUX_TIMER_INT XCHAL_TIMER_INTERRUPT(LINUX_TIMER) #define LINUX_TIMER_MASK (1L << LINUX_TIMER_INT) #define CLOCK_TICK_RATE 1193180 /* (everyone is using this value) */ @@ -60,8 +65,8 @@ extern cycles_t cacheflush_time; #define WSR_CCOUNT(r) __asm__("wsr %0,"__stringify(CCOUNT) :: "a" (r)) #define RSR_CCOUNT(r) __asm__("rsr %0,"__stringify(CCOUNT) : "=a" (r)) -#define WSR_CCOMPARE(x,r) __asm__("wsr %0,"__stringify(CCOMPARE_0)"+"__stringify(x) :: "a"(r)) -#define RSR_CCOMPARE(x,r) __asm__("rsr %0,"__stringify(CCOMPARE_0)"+"__stringify(x) : "=a"(r)) +#define WSR_CCOMPARE(x,r) __asm__("wsr %0,"__stringify(CCOMPARE)"+"__stringify(x) :: "a"(r)) +#define RSR_CCOMPARE(x,r) __asm__("rsr %0,"__stringify(CCOMPARE)"+"__stringify(x) : "=a"(r)) static inline unsigned long get_ccount (void) { diff --git a/include/asm-xtensa/tlbflush.h b/include/asm-xtensa/tlbflush.h index 43f6ec859af..7c637b3c352 100644 --- a/include/asm-xtensa/tlbflush.h +++ b/include/asm-xtensa/tlbflush.h @@ -11,12 +11,20 @@ #ifndef _XTENSA_TLBFLUSH_H #define _XTENSA_TLBFLUSH_H -#define DEBUG_TLB - #ifdef __KERNEL__ -#include <asm/processor.h> #include <linux/stringify.h> +#include <asm/processor.h> + +#define DTLB_WAY_PGD 7 + +#define ITLB_ARF_WAYS 4 +#define DTLB_ARF_WAYS 4 + +#define ITLB_HIT_BIT 3 +#define DTLB_HIT_BIT 4 + +#ifndef __ASSEMBLY__ /* TLB flushing: * @@ -46,11 +54,6 @@ static inline void flush_tlb_pgtables(struct mm_struct *mm, /* TLB operations. */ -#define ITLB_WAYS_LOG2 XCHAL_ITLB_WAY_BITS -#define DTLB_WAYS_LOG2 XCHAL_DTLB_WAY_BITS -#define ITLB_PROBE_SUCCESS (1 << ITLB_WAYS_LOG2) -#define DTLB_PROBE_SUCCESS (1 << DTLB_WAYS_LOG2) - static inline unsigned long itlb_probe(unsigned long addr) { unsigned long tmp; @@ -131,29 +134,30 @@ static inline void write_itlb_entry (pte_t entry, int way) static inline void invalidate_page_directory (void) { - invalidate_dtlb_entry (DTLB_WAY_PGTABLE); + invalidate_dtlb_entry (DTLB_WAY_PGD); + invalidate_dtlb_entry (DTLB_WAY_PGD+1); + invalidate_dtlb_entry (DTLB_WAY_PGD+2); } static inline void invalidate_itlb_mapping (unsigned address) { unsigned long tlb_entry; - while ((tlb_entry = itlb_probe (address)) & ITLB_PROBE_SUCCESS) - invalidate_itlb_entry (tlb_entry); + if (((tlb_entry = itlb_probe(address)) & (1 << ITLB_HIT_BIT)) != 0) + invalidate_itlb_entry(tlb_entry); } static inline void invalidate_dtlb_mapping (unsigned address) { unsigned long tlb_entry; - while ((tlb_entry = dtlb_probe (address)) & DTLB_PROBE_SUCCESS) - invalidate_dtlb_entry (tlb_entry); + if (((tlb_entry = dtlb_probe(address)) & (1 << DTLB_HIT_BIT)) != 0) + invalidate_dtlb_entry(tlb_entry); } #define check_pgt_cache() do { } while (0) -#ifdef DEBUG_TLB - -/* DO NOT USE THESE FUNCTIONS. These instructions aren't part of the Xtensa +/* + * DO NOT USE THESE FUNCTIONS. These instructions aren't part of the Xtensa * ISA and exist only for test purposes.. * You may find it helpful for MMU debugging, however. * @@ -193,8 +197,6 @@ static inline unsigned long read_itlb_translation (int way) return tmp; } -#endif /* DEBUG_TLB */ - - +#endif /* __ASSEMBLY__ */ #endif /* __KERNEL__ */ -#endif /* _XTENSA_PGALLOC_H */ +#endif /* _XTENSA_TLBFLUSH_H */ diff --git a/include/asm-xtensa/uaccess.h b/include/asm-xtensa/uaccess.h index 88a64e1144d..d6352da05b1 100644 --- a/include/asm-xtensa/uaccess.h +++ b/include/asm-xtensa/uaccess.h @@ -23,7 +23,6 @@ #ifdef __ASSEMBLY__ -#define _ASMLANGUAGE #include <asm/current.h> #include <asm/asm-offsets.h> #include <asm/processor.h> diff --git a/include/asm-xtensa/unistd.h b/include/asm-xtensa/unistd.h index 411f810a55c..8a7fb6964ce 100644 --- a/include/asm-xtensa/unistd.h +++ b/include/asm-xtensa/unistd.h @@ -11,396 +11,593 @@ #ifndef _XTENSA_UNISTD_H #define _XTENSA_UNISTD_H -#define __NR_spill 0 -#define __NR_exit 1 -#define __NR_read 3 -#define __NR_write 4 -#define __NR_open 5 -#define __NR_close 6 -#define __NR_creat 8 -#define __NR_link 9 -#define __NR_unlink 10 -#define __NR_execve 11 -#define __NR_chdir 12 -#define __NR_mknod 14 -#define __NR_chmod 15 -#define __NR_lchown 16 -#define __NR_break 17 -#define __NR_lseek 19 -#define __NR_getpid 20 -#define __NR_mount 21 -#define __NR_setuid 23 -#define __NR_getuid 24 -#define __NR_ptrace 26 -#define __NR_utime 30 -#define __NR_stty 31 -#define __NR_gtty 32 -#define __NR_access 33 -#define __NR_ftime 35 -#define __NR_sync 36 -#define __NR_kill 37 -#define __NR_rename 38 -#define __NR_mkdir 39 -#define __NR_rmdir 40 -#define __NR_dup 41 -#define __NR_pipe 42 -#define __NR_times 43 -#define __NR_prof 44 -#define __NR_brk 45 -#define __NR_setgid 46 -#define __NR_getgid 47 -#define __NR_signal 48 -#define __NR_geteuid 49 -#define __NR_getegid 50 -#define __NR_acct 51 -#define __NR_lock 53 -#define __NR_ioctl 54 -#define __NR_fcntl 55 -#define __NR_setpgid 57 -#define __NR_ulimit 58 -#define __NR_umask 60 -#define __NR_chroot 61 -#define __NR_ustat 62 -#define __NR_dup2 63 -#define __NR_getppid 64 -#define __NR_setsid 66 -#define __NR_sigaction 67 -#define __NR_setreuid 70 -#define __NR_setregid 71 -#define __NR_sigsuspend 72 -#define __NR_sigpending 73 -#define __NR_sethostname 74 -#define __NR_setrlimit 75 -#define __NR_getrlimit 76 /* Back compatible 2Gig limited rlimit */ -#define __NR_getrusage 77 -#define __NR_gettimeofday 78 -#define __NR_settimeofday 79 -#define __NR_getgroups 80 -#define __NR_setgroups 81 -#define __NR_select 82 -#define __NR_symlink 83 -#define __NR_readlink 85 -#define __NR_uselib 86 -#define __NR_swapon 87 -#define __NR_reboot 88 -#define __NR_munmap 91 -#define __NR_truncate 92 -#define __NR_ftruncate 93 -#define __NR_fchmod 94 -#define __NR_fchown 95 -#define __NR_getpriority 96 -#define __NR_setpriority 97 -#define __NR_profil 98 -#define __NR_statfs 99 -#define __NR_fstatfs 100 -#define __NR_ioperm 101 -#define __NR_syslog 103 -#define __NR_setitimer 104 -#define __NR_getitimer 105 -#define __NR_stat 106 -#define __NR_lstat 107 -#define __NR_fstat 108 -#define __NR_iopl 110 -#define __NR_vhangup 111 -#define __NR_idle 112 -#define __NR_wait4 114 -#define __NR_swapoff 115 -#define __NR_sysinfo 116 -#define __NR_fsync 118 -#define __NR_sigreturn 119 -#define __NR_clone 120 -#define __NR_setdomainname 121 -#define __NR_uname 122 -#define __NR_modify_ldt 123 -#define __NR_adjtimex 124 -#define __NR_mprotect 125 -#define __NR_create_module 127 -#define __NR_init_module 128 -#define __NR_delete_module 129 -#define __NR_quotactl 131 -#define __NR_getpgid 132 -#define __NR_fchdir 133 -#define __NR_bdflush 134 -#define __NR_sysfs 135 -#define __NR_personality 136 -#define __NR_setfsuid 138 -#define __NR_setfsgid 139 -#define __NR__llseek 140 -#define __NR_getdents 141 -#define __NR__newselect 142 -#define __NR_flock 143 -#define __NR_msync 144 -#define __NR_readv 145 -#define __NR_writev 146 -#define __NR_cacheflush 147 -#define __NR_cachectl 148 -#define __NR_sysxtensa 149 -#define __NR_sysdummy 150 -#define __NR_getsid 151 -#define __NR_fdatasync 152 -#define __NR__sysctl 153 -#define __NR_mlock 154 -#define __NR_munlock 155 -#define __NR_mlockall 156 -#define __NR_munlockall 157 -#define __NR_sched_setparam 158 -#define __NR_sched_getparam 159 -#define __NR_sched_setscheduler 160 -#define __NR_sched_getscheduler 161 -#define __NR_sched_yield 162 -#define __NR_sched_get_priority_max 163 -#define __NR_sched_get_priority_min 164 -#define __NR_sched_rr_get_interval 165 -#define __NR_nanosleep 166 -#define __NR_mremap 167 -#define __NR_accept 168 -#define __NR_bind 169 -#define __NR_connect 170 -#define __NR_getpeername 171 -#define __NR_getsockname 172 -#define __NR_getsockopt 173 -#define __NR_listen 174 -#define __NR_recv 175 -#define __NR_recvfrom 176 -#define __NR_recvmsg 177 -#define __NR_send 178 -#define __NR_sendmsg 179 -#define __NR_sendto 180 -#define __NR_setsockopt 181 -#define __NR_shutdown 182 -#define __NR_socket 183 -#define __NR_socketpair 184 -#define __NR_setresuid 185 -#define __NR_getresuid 186 -#define __NR_query_module 187 -#define __NR_poll 188 -#define __NR_nfsservctl 189 -#define __NR_setresgid 190 -#define __NR_getresgid 191 -#define __NR_prctl 192 -#define __NR_rt_sigreturn 193 -#define __NR_rt_sigaction 194 -#define __NR_rt_sigprocmask 195 -#define __NR_rt_sigpending 196 -#define __NR_rt_sigtimedwait 197 -#define __NR_rt_sigqueueinfo 198 -#define __NR_rt_sigsuspend 199 -#define __NR_pread 200 -#define __NR_pwrite 201 -#define __NR_chown 202 -#define __NR_getcwd 203 -#define __NR_capget 204 -#define __NR_capset 205 -#define __NR_sigaltstack 206 -#define __NR_sendfile 207 -#define __NR_mmap2 210 -#define __NR_truncate64 211 -#define __NR_ftruncate64 212 -#define __NR_stat64 213 -#define __NR_lstat64 214 -#define __NR_fstat64 215 -#define __NR_pivot_root 216 -#define __NR_mincore 217 -#define __NR_madvise 218 -#define __NR_getdents64 219 - -/* Keep this last; should always equal the last valid call number. */ -#define __NR_Linux_syscalls 220 - -/* user-visible error numbers are in the range -1 - -125: see - * <asm-xtensa/errno.h> */ - -#define SYSXTENSA_RESERVED 0 /* don't use this */ -#define SYSXTENSA_ATOMIC_SET 1 /* set variable */ -#define SYSXTENSA_ATOMIC_EXG_ADD 2 /* exchange memory and add */ -#define SYSXTENSA_ATOMIC_ADD 3 /* add to memory */ -#define SYSXTENSA_ATOMIC_CMP_SWP 4 /* compare and swap */ - -#define SYSXTENSA_COUNT 5 /* count of syscall0 functions*/ +#ifndef __SYSCALL +# define __SYSCALL(nr,func,nargs) +#endif -#ifdef __KERNEL__ -#include <linux/linkage.h> +#define __NR_spill 0 +__SYSCALL( 0, sys_ni_syscall, 0) +#define __NR_xtensa 1 +__SYSCALL( 1, sys_ni_syscall, 0) +#define __NR_available4 2 +__SYSCALL( 2, sys_ni_syscall, 0) +#define __NR_available5 3 +__SYSCALL( 3, sys_ni_syscall, 0) +#define __NR_available6 4 +__SYSCALL( 4, sys_ni_syscall, 0) +#define __NR_available7 5 +__SYSCALL( 5, sys_ni_syscall, 0) +#define __NR_available8 6 +__SYSCALL( 6, sys_ni_syscall, 0) +#define __NR_available9 7 +__SYSCALL( 7, sys_ni_syscall, 0) -#define __syscall_return(type, res) return ((type)(res)) +/* File Operations */ -/* Tensilica's xt-xcc compiler is much more agressive at code - * optimization than gcc. Multiple __asm__ statements are - * insufficient for xt-xcc because subsequent optimization passes - * (beyond the front-end that knows of __asm__ statements and other - * such GNU Extensions to C) can modify the register selection for - * containment of C variables. - * - * xt-xcc cannot modify the contents of a single __asm__ statement, so - * we create single-asm versions of the syscall macros that are - * suitable and optimal for both xt-xcc and gcc. - * - * Linux takes system-call arguments in registers. The following - * design is optimized for user-land apps (e.g., glibc) which - * typically have a function wrapper around the "syscall" assembly - * instruction. It satisfies the Xtensa ABI while minizing argument - * shifting. - * - * The Xtensa ABI and software conventions require the system-call - * number in a2. If an argument exists in a2, we move it to the next - * available register. Note that for improved efficiency, we do NOT - * shift all parameters down one register to maintain the original - * order. - * - * At best case (zero arguments), we just write the syscall number to - * a2. At worst case (1 to 6 arguments), we move the argument in a2 - * to the next available register, then write the syscall number to - * a2. - * - * For clarity, the following truth table enumerates all possibilities. +#define __NR_open 8 +__SYSCALL( 8, sys_open, 3) +#define __NR_close 9 +__SYSCALL( 9, sys_close, 1) +#define __NR_dup 10 +__SYSCALL( 10, sys_dup, 1) +#define __NR_dup2 11 +__SYSCALL( 11, sys_dup2, 2) +#define __NR_read 12 +__SYSCALL( 12, sys_read, 3) +#define __NR_write 13 +__SYSCALL( 13, sys_write, 3) +#define __NR_select 14 +__SYSCALL( 14, sys_select, 5) +#define __NR_lseek 15 +__SYSCALL( 15, sys_lseek, 3) +#define __NR_poll 16 +__SYSCALL( 16, sys_poll, 3) +#define __NR__llseek 17 +__SYSCALL( 17, sys_llseek, 5) +#define __NR_epoll_wait 18 +__SYSCALL( 18, sys_epoll_wait, 4) +#define __NR_epoll_ctl 19 +__SYSCALL( 19, sys_epoll_ctl, 4) +#define __NR_epoll_create 20 +__SYSCALL( 20, sys_epoll_create, 1) +#define __NR_creat 21 +__SYSCALL( 21, sys_creat, 2) +#define __NR_truncate 22 +__SYSCALL( 22, sys_truncate, 2) +#define __NR_ftruncate 23 +__SYSCALL( 23, sys_ftruncate, 2) +#define __NR_readv 24 +__SYSCALL( 24, sys_readv, 3) +#define __NR_writev 25 +__SYSCALL( 25, sys_writev, 3) +#define __NR_fsync 26 +__SYSCALL( 26, sys_fsync, 1) +#define __NR_fdatasync 27 +__SYSCALL( 27, sys_fdatasync, 1) +#define __NR_truncate64 28 +__SYSCALL( 28, sys_truncate64, 2) +#define __NR_ftruncate64 29 +__SYSCALL( 29, sys_ftruncate64, 2) +#define __NR_pread64 30 +__SYSCALL( 30, sys_pread64, 6) +#define __NR_pwrite64 31 +__SYSCALL( 31, sys_pwrite64, 6) + +#define __NR_link 32 +__SYSCALL( 32, sys_link, 2) +#define __NR_rename 33 +__SYSCALL( 33, sys_rename, 2) +#define __NR_symlink 34 +__SYSCALL( 34, sys_symlink, 2) +#define __NR_readlink 35 +__SYSCALL( 35, sys_readlink, 3) +#define __NR_mknod 36 +__SYSCALL( 36, sys_mknod, 3) +#define __NR_pipe 37 +__SYSCALL( 37, xtensa_pipe, 1) +#define __NR_unlink 38 +__SYSCALL( 38, sys_unlink, 1) +#define __NR_rmdir 39 +__SYSCALL( 39, sys_rmdir, 1) + +#define __NR_mkdir 40 +__SYSCALL( 40, sys_mkdir, 2) +#define __NR_chdir 41 +__SYSCALL( 41, sys_chdir, 1) +#define __NR_fchdir 42 +__SYSCALL( 42, sys_fchdir, 1) +#define __NR_getcwd 43 +__SYSCALL( 43, sys_getcwd, 2) + +#define __NR_chmod 44 +__SYSCALL( 44, sys_chmod, 2) +#define __NR_chown 45 +__SYSCALL( 45, sys_chown, 3) +#define __NR_stat 46 +__SYSCALL( 46, sys_newstat, 2) +#define __NR_stat64 47 +__SYSCALL( 47, sys_stat64, 2) + +#define __NR_lchown 48 +__SYSCALL( 48, sys_lchown, 3) +#define __NR_lstat 49 +__SYSCALL( 49, sys_newlstat, 2) +#define __NR_lstat64 50 +__SYSCALL( 50, sys_lstat64, 2) +#define __NR_available51 51 +__SYSCALL( 51, sys_ni_syscall, 0) + +#define __NR_fchmod 52 +__SYSCALL( 52, sys_fchmod, 2) +#define __NR_fchown 53 +__SYSCALL( 53, sys_fchown, 3) +#define __NR_fstat 54 +__SYSCALL( 54, sys_newfstat, 2) +#define __NR_fstat64 55 +__SYSCALL( 55, sys_fstat64, 2) + +#define __NR_flock 56 +__SYSCALL( 56, sys_flock, 2) +#define __NR_access 57 +__SYSCALL( 57, sys_access, 2) +#define __NR_umask 58 +__SYSCALL( 58, sys_umask, 1) +#define __NR_getdents 59 +__SYSCALL( 59, sys_getdents, 3) +#define __NR_getdents64 60 +__SYSCALL( 60, sys_getdents64, 3) +#define __NR_fcntl64 61 +__SYSCALL( 61, sys_fcntl64, 3) +#define __NR_available62 62 +__SYSCALL( 62, sys_ni_syscall, 0) +#define __NR_fadvise64_64 63 +__SYSCALL( 63, sys_fadvise64_64, 6) +#define __NR_utime 64 /* glibc 2.3.3 ?? */ +__SYSCALL( 64, sys_utime, 2) +#define __NR_utimes 65 +__SYSCALL( 65, sys_utimes, 2) +#define __NR_ioctl 66 +__SYSCALL( 66, sys_ioctl, 3) +#define __NR_fcntl 67 +__SYSCALL( 67, sys_fcntl, 3) + +#define __NR_setxattr 68 +__SYSCALL( 68, sys_setxattr, 5) +#define __NR_getxattr 69 +__SYSCALL( 69, sys_getxattr, 4) +#define __NR_listxattr 70 +__SYSCALL( 70, sys_listxattr, 3) +#define __NR_removexattr 71 +__SYSCALL( 71, sys_removexattr, 2) +#define __NR_lsetxattr 72 +__SYSCALL( 72, sys_lsetxattr, 5) +#define __NR_lgetxattr 73 +__SYSCALL( 73, sys_lgetxattr, 4) +#define __NR_llistxattr 74 +__SYSCALL( 74, sys_llistxattr, 3) +#define __NR_lremovexattr 75 +__SYSCALL( 75, sys_lremovexattr, 2) +#define __NR_fsetxattr 76 +__SYSCALL( 76, sys_fsetxattr, 5) +#define __NR_fgetxattr 77 +__SYSCALL( 77, sys_fgetxattr, 4) +#define __NR_flistxattr 78 +__SYSCALL( 78, sys_flistxattr, 3) +#define __NR_fremovexattr 79 +__SYSCALL( 79, sys_fremovexattr, 2) + +/* File Map / Shared Memory Operations */ + +#define __NR_mmap2 80 +__SYSCALL( 80, xtensa_mmap2, 6) +#define __NR_munmap 81 +__SYSCALL( 81, sys_munmap, 2) +#define __NR_mprotect 82 +__SYSCALL( 82, sys_mprotect, 3) +#define __NR_brk 83 +__SYSCALL( 83, sys_brk, 1) +#define __NR_mlock 84 +__SYSCALL( 84, sys_mlock, 2) +#define __NR_munlock 85 +__SYSCALL( 85, sys_munlock, 2) +#define __NR_mlockall 86 +__SYSCALL( 86, sys_mlockall, 1) +#define __NR_munlockall 87 +__SYSCALL( 87, sys_munlockall, 0) +#define __NR_mremap 88 +__SYSCALL( 88, sys_mremap, 4) +#define __NR_msync 89 +__SYSCALL( 89, sys_msync, 3) +#define __NR_mincore 90 +__SYSCALL( 90, sys_mincore, 3) +#define __NR_madvise 91 +__SYSCALL( 91, sys_madvise, 3) +#define __NR_shmget 92 +__SYSCALL( 92, sys_shmget, 4) +#define __NR_shmat 93 +__SYSCALL( 93, xtensa_shmat, 4) +#define __NR_shmctl 94 +__SYSCALL( 94, sys_shmctl, 4) +#define __NR_shmdt 95 +__SYSCALL( 95, sys_shmdt, 4) + +/* Socket Operations */ + +#define __NR_socket 96 +__SYSCALL( 96, sys_socket, 3) +#define __NR_setsockopt 97 +__SYSCALL( 97, sys_setsockopt, 5) +#define __NR_getsockopt 98 +__SYSCALL( 98, sys_getsockopt, 5) +#define __NR_shutdown 99 +__SYSCALL( 99, sys_shutdown, 2) + +#define __NR_bind 100 +__SYSCALL(100, sys_bind, 3) +#define __NR_connect 101 +__SYSCALL(101, sys_connect, 3) +#define __NR_listen 102 +__SYSCALL(102, sys_listen, 2) +#define __NR_accept 103 +__SYSCALL(103, sys_accept, 3) + +#define __NR_getsockname 104 +__SYSCALL(104, sys_getsockname, 3) +#define __NR_getpeername 105 +__SYSCALL(105, sys_getpeername, 3) +#define __NR_sendmsg 106 +__SYSCALL(106, sys_sendmsg, 3) +#define __NR_recvmsg 107 +__SYSCALL(107, sys_recvmsg, 3) +#define __NR_send 108 +__SYSCALL(108, sys_send, 4) +#define __NR_recv 109 +__SYSCALL(109, sys_recv, 4) +#define __NR_sendto 110 +__SYSCALL(110, sys_sendto, 6) +#define __NR_recvfrom 111 +__SYSCALL(111, sys_recvfrom, 6) + +#define __NR_socketpair 112 +__SYSCALL(112, sys_socketpair, 4) +#define __NR_sendfile 113 +__SYSCALL(113, sys_sendfile, 4) +#define __NR_sendfile64 114 +__SYSCALL(114, sys_sendfile64, 4) +#define __NR_available115 115 +__SYSCALL(115, sys_ni_syscall, 0) + +/* Process Operations */ + +#define __NR_clone 116 +__SYSCALL(116, xtensa_clone, 5) +#define __NR_execve 117 +__SYSCALL(117, xtensa_execve, 3) +#define __NR_exit 118 +__SYSCALL(118, sys_exit, 1) +#define __NR_exit_group 119 +__SYSCALL(119, sys_exit_group, 1) +#define __NR_getpid 120 +__SYSCALL(120, sys_getpid, 0) +#define __NR_wait4 121 +__SYSCALL(121, sys_wait4, 4) +#define __NR_waitid 122 +__SYSCALL(122, sys_waitid, 5) +#define __NR_kill 123 +__SYSCALL(123, sys_kill, 2) +#define __NR_tkill 124 +__SYSCALL(124, sys_tkill, 2) +#define __NR_tgkill 125 +__SYSCALL(125, sys_tgkill, 3) +#define __NR_set_tid_address 126 +__SYSCALL(126, sys_set_tid_address, 1) +#define __NR_gettid 127 +__SYSCALL(127, sys_gettid, 0) +#define __NR_setsid 128 +__SYSCALL(128, sys_setsid, 0) +#define __NR_getsid 129 +__SYSCALL(129, sys_getsid, 1) +#define __NR_prctl 130 +__SYSCALL(130, sys_prctl, 5) +#define __NR_personality 131 +__SYSCALL(131, sys_personality, 1) +#define __NR_getpriority 132 +__SYSCALL(132, sys_getpriority, 2) +#define __NR_setpriority 133 +__SYSCALL(133, sys_setpriority, 3) +#define __NR_setitimer 134 +__SYSCALL(134, sys_setitimer, 3) +#define __NR_getitimer 135 +__SYSCALL(135, sys_getitimer, 2) +#define __NR_setuid 136 +__SYSCALL(136, sys_setuid, 1) +#define __NR_getuid 137 +__SYSCALL(137, sys_getuid, 0) +#define __NR_setgid 138 +__SYSCALL(138, sys_setgid, 1) +#define __NR_getgid 139 +__SYSCALL(139, sys_getgid, 0) +#define __NR_geteuid 140 +__SYSCALL(140, sys_geteuid, 0) +#define __NR_getegid 141 +__SYSCALL(141, sys_getegid, 0) +#define __NR_setreuid 142 +__SYSCALL(142, sys_setreuid, 2) +#define __NR_setregid 143 +__SYSCALL(143, sys_setregid, 2) +#define __NR_setresuid 144 +__SYSCALL(144, sys_setresuid, 3) +#define __NR_getresuid 145 +__SYSCALL(145, sys_getresuid, 3) +#define __NR_setresgid 146 +__SYSCALL(146, sys_setresgid, 3) +#define __NR_getresgid 147 +__SYSCALL(147, sys_getresgid, 3) +#define __NR_setpgid 148 +__SYSCALL(148, sys_setpgid, 2) +#define __NR_getpgid 149 +__SYSCALL(149, sys_getpgid, 1) +#define __NR_getppid 150 +__SYSCALL(150, sys_getppid, 0) +#define __NR_available151 151 +__SYSCALL(151, sys_ni_syscall, 0) + +#define __NR_reserved152 152 /* set_thread_area */ +__SYSCALL(152, sys_ni_syscall, 0) +#define __NR_reserved153 153 /* get_thread_area */ +__SYSCALL(153, sys_ni_syscall, 0) +#define __NR_times 154 +__SYSCALL(154, sys_times, 1) +#define __NR_acct 155 +__SYSCALL(155, sys_acct, 1) +#define __NR_sched_setaffinity 156 +__SYSCALL(156, sys_sched_setaffinity, 3) +#define __NR_sched_getaffinity 157 +__SYSCALL(157, sys_sched_getaffinity, 3) +#define __NR_capget 158 +__SYSCALL(158, sys_capget, 2) +#define __NR_capset 159 +__SYSCALL(159, sys_capset, 2) +#define __NR_ptrace 160 +__SYSCALL(160, sys_ptrace, 4) +#define __NR_semtimedop 161 +__SYSCALL(161, sys_semtimedop, 5) +#define __NR_semget 162 +__SYSCALL(162, sys_semget, 4) +#define __NR_semop 163 +__SYSCALL(163, sys_semop, 4) +#define __NR_semctl 164 +__SYSCALL(164, sys_semctl, 4) +#define __NR_available165 165 +__SYSCALL(165, sys_ni_syscall, 0) +#define __NR_msgget 166 +__SYSCALL(166, sys_msgget, 4) +#define __NR_msgsnd 167 +__SYSCALL(167, sys_msgsnd, 4) +#define __NR_msgrcv 168 +__SYSCALL(168, sys_msgrcv, 4) +#define __NR_msgctl 169 +__SYSCALL(169, sys_msgctl, 4) +#define __NR_available170 170 +__SYSCALL(170, sys_ni_syscall, 0) +#define __NR_available171 171 +__SYSCALL(171, sys_ni_syscall, 0) + +/* File System */ + +#define __NR_mount 172 +__SYSCALL(172, sys_mount, 5) +#define __NR_swapon 173 +__SYSCALL(173, sys_swapon, 2) +#define __NR_chroot 174 +__SYSCALL(174, sys_chroot, 1) +#define __NR_pivot_root 175 +__SYSCALL(175, sys_pivot_root, 2) +#define __NR_umount 176 +__SYSCALL(176, sys_umount, 2) +#define __NR_swapoff 177 +__SYSCALL(177, sys_swapoff, 1) +#define __NR_sync 178 +__SYSCALL(178, sys_sync, 0) +#define __NR_available179 179 +__SYSCALL(179, sys_ni_syscall, 0) +#define __NR_setfsuid 180 +__SYSCALL(180, sys_setfsuid, 1) +#define __NR_setfsgid 181 +__SYSCALL(181, sys_setfsgid, 1) +#define __NR_sysfs 182 +__SYSCALL(182, sys_sysfs, 3) +#define __NR_ustat 183 +__SYSCALL(183, sys_ustat, 2) +#define __NR_statfs 184 +__SYSCALL(184, sys_statfs, 2) +#define __NR_fstatfs 185 +__SYSCALL(185, sys_fstatfs, 2) +#define __NR_statfs64 186 +__SYSCALL(186, sys_statfs64, 3) +#define __NR_fstatfs64 187 +__SYSCALL(187, sys_fstatfs64, 3) + +/* System */ + +#define __NR_setrlimit 188 +__SYSCALL(188, sys_setrlimit, 2) +#define __NR_getrlimit 189 +__SYSCALL(189, sys_getrlimit, 2) +#define __NR_getrusage 190 +__SYSCALL(190, sys_getrusage, 2) +#define __NR_futex 191 +__SYSCALL(191, sys_futex, 5) +#define __NR_gettimeofday 192 +__SYSCALL(192, sys_gettimeofday, 2) +#define __NR_settimeofday 193 +__SYSCALL(193, sys_settimeofday, 2) +#define __NR_adjtimex 194 +__SYSCALL(194, sys_adjtimex, 1) +#define __NR_nanosleep 195 +__SYSCALL(195, sys_nanosleep, 2) +#define __NR_getgroups 196 +__SYSCALL(196, sys_getgroups, 2) +#define __NR_setgroups 197 +__SYSCALL(197, sys_setgroups, 2) +#define __NR_sethostname 198 +__SYSCALL(198, sys_sethostname, 2) +#define __NR_setdomainname 199 +__SYSCALL(199, sys_setdomainname, 2) +#define __NR_syslog 200 +__SYSCALL(200, sys_syslog, 3) +#define __NR_vhangup 201 +__SYSCALL(201, sys_vhangup, 0) +#define __NR_uselib 202 +__SYSCALL(202, sys_uselib, 1) +#define __NR_reboot 203 +__SYSCALL(203, sys_reboot, 3) +#define __NR_quotactl 204 +__SYSCALL(204, sys_quotactl, 4) +#define __NR_nfsservctl 205 +__SYSCALL(205, sys_nfsservctl, 3) +#define __NR__sysctl 206 +__SYSCALL(206, sys_sysctl, 1) +#define __NR_bdflush 207 +__SYSCALL(207, sys_bdflush, 2) +#define __NR_uname 208 +__SYSCALL(208, sys_newuname, 1) +#define __NR_sysinfo 209 +__SYSCALL(209, sys_sysinfo, 1) +#define __NR_init_module 210 +__SYSCALL(210, sys_init_module, 2) +#define __NR_delete_module 211 +__SYSCALL(211, sys_delete_module, 1) + +#define __NR_sched_setparam 212 +__SYSCALL(212, sys_sched_setparam, 2) +#define __NR_sched_getparam 213 +__SYSCALL(213, sys_sched_getparam, 2) +#define __NR_sched_setscheduler 214 +__SYSCALL(214, sys_sched_setscheduler, 3) +#define __NR_sched_getscheduler 215 +__SYSCALL(215, sys_sched_getscheduler, 1) +#define __NR_sched_get_priority_max 216 +__SYSCALL(216, sys_sched_get_priority_max, 1) +#define __NR_sched_get_priority_min 217 +__SYSCALL(217, sys_sched_get_priority_min, 1) +#define __NR_sched_rr_get_interval 218 +__SYSCALL(218, sys_sched_rr_get_interval, 2) +#define __NR_sched_yield 219 +__SYSCALL(219, sys_sched_yield, 0) +#define __NR_sigreturn 222 +__SYSCALL(222, xtensa_sigreturn, 0) + +/* Signal Handling */ + +#define __NR_restart_syscall 223 +__SYSCALL(223, sys_restart_syscall, 0) +#define __NR_sigaltstack 224 +__SYSCALL(224, xtensa_sigaltstack, 2) +#define __NR_rt_sigreturn 225 +__SYSCALL(225, xtensa_rt_sigreturn, 1) +#define __NR_rt_sigaction 226 +__SYSCALL(226, sys_rt_sigaction, 4) +#define __NR_rt_sigprocmask 227 +__SYSCALL(227, sys_rt_sigprocmask, 4) +#define __NR_rt_sigpending 228 +__SYSCALL(228, sys_rt_sigpending, 2) +#define __NR_rt_sigtimedwait 229 +__SYSCALL(229, sys_rt_sigtimedwait, 4) +#define __NR_rt_sigqueueinfo 230 +__SYSCALL(230, sys_rt_sigqueueinfo, 3) +#define __NR_rt_sigsuspend 231 +__SYSCALL(231, xtensa_rt_sigsuspend, 2) + +/* Message */ + +#define __NR_mq_open 232 +__SYSCALL(232, sys_mq_open, 4) +#define __NR_mq_unlink 233 +__SYSCALL(233, sys_mq_unlink, 1) +#define __NR_mq_timedsend 234 +__SYSCALL(234, sys_mq_timedsend, 5) +#define __NR_mq_timedreceive 235 +__SYSCALL(235, sys_mq_timedreceive, 5) +#define __NR_mq_notify 236 +__SYSCALL(236, sys_mq_notify, 2) +#define __NR_mq_getsetattr 237 +__SYSCALL(237, sys_mq_getsetattr, 3) +#define __NR_available238 238 +__SYSCALL(238, sys_ni_syscall, 0) + +/* IO */ + +#define __NR_io_setup 239 +__SYSCALL(239, sys_io_setup, 2) +#define __NR_io_destroy 240 +__SYSCALL(240, sys_io_destroy, 1) +#define __NR_io_submit 241 +__SYSCALL(241, sys_io_submit, 3) +#define __NR_io_getevents 242 +__SYSCALL(242, sys_io_getevents, 5) +#define __NR_io_cancel 243 +__SYSCALL(243, sys_io_cancel, 3) +#define __NR_clock_settime 244 +__SYSCALL(244, sys_clock_settime, 2) +#define __NR_clock_gettime 245 +__SYSCALL(245, sys_clock_gettime, 2) +#define __NR_clock_getres 246 +__SYSCALL(246, sys_clock_getres, 2) +#define __NR_clock_nanosleep 247 +__SYSCALL(247, sys_clock_nanosleep, 4) + +/* Timer */ + +#define __NR_timer_create 248 +__SYSCALL(248, sys_timer_create, 3) +#define __NR_timer_delete 249 +__SYSCALL(249, sys_timer_delete, 1) +#define __NR_timer_settime 250 +__SYSCALL(250, sys_timer_settime, 4) +#define __NR_timer_gettime 251 +__SYSCALL(251, sys_timer_gettime, 2) +#define __NR_timer_getoverrun 252 +__SYSCALL(252, sys_timer_getoverrun, 1) + +/* System */ + +#define __NR_reserved244 253 +__SYSCALL(253, sys_ni_syscall, 0) +#define __NR_lookup_dcookie 254 +__SYSCALL(254, sys_lookup_dcookie, 4) +#define __NR_available255 255 +__SYSCALL(255, sys_ni_syscall, 0) +#define __NR_add_key 256 +__SYSCALL(256, sys_add_key, 5) +#define __NR_request_key 257 +__SYSCALL(257, sys_request_key, 5) +#define __NR_keyctl 258 +__SYSCALL(258, sys_keyctl, 5) +#define __NR_available259 259 +__SYSCALL(259, sys_ni_syscall, 0) + +#define __NR_syscall_count 261 + +/* + * sysxtensa syscall handler * - * arguments syscall number arg0, arg1, arg2, arg3, arg4, arg5 - * --------- -------------- ---------------------------------- - * 0 a2 - * 1 a2 a3 - * 2 a2 a4, a3 - * 3 a2 a5, a3, a4 - * 4 a2 a6, a3, a4, a5 - * 5 a2 a7, a3, a4, a5, a6 - * 6 a2 a8, a3, a4, a5, a6, a7 + * int sysxtensa (SYS_XTENSA_ATOMIC_SET, ptr, val, unused); + * int sysxtensa (SYS_XTENSA_ATOMIC_ADD, ptr, val, unused); + * int sysxtensa (SYS_XTENSA_ATOMIC_EXG_ADD, ptr, val, unused); + * int sysxtensa (SYS_XTENSA_ATOMIC_CMP_SWP, ptr, oldval, newval); + * a2 a6 a3 a4 a5 */ -#define _syscall0(type,name) \ -type name(void) \ -{ \ -long __res; \ -__asm__ __volatile__ ( \ - " movi a2, %1 \n" \ - " syscall \n" \ - " mov %0, a2 \n" \ - : "=a" (__res) \ - : "i" (__NR_##name) \ - : "a2" \ - ); \ -__syscall_return(type,__res); \ -} - -#define _syscall1(type,name,type0,arg0) \ -type name(type0 arg0) \ -{ \ -long __res; \ -__asm__ __volatile__ ( \ - " mov a3, %2 \n" \ - " movi a2, %1 \n" \ - " syscall \n" \ - " mov %0, a2 \n" \ - : "=a" (__res) \ - : "i" (__NR_##name), "a" (arg0) \ - : "a2", "a3" \ - ); \ -__syscall_return(type,__res); \ -} - -#define _syscall2(type,name,type0,arg0,type1,arg1) \ -type name(type0 arg0,type1 arg1) \ -{ \ -long __res; \ -__asm__ __volatile__ ( \ - " mov a4, %2 \n" \ - " mov a3, %3 \n" \ - " movi a2, %1 \n" \ - " syscall \n" \ - " mov %0, a2 \n" \ - : "=a" (__res) \ - : "i" (__NR_##name), "a" (arg0), "a" (arg1) \ - : "a2", "a3", "a4" \ - ); \ -__syscall_return(type,__res); \ -} - -#define _syscall3(type,name,type0,arg0,type1,arg1,type2,arg2) \ -type name(type0 arg0,type1 arg1,type2 arg2) \ -{ \ -long __res; \ -__asm__ __volatile__ ( \ - " mov a5, %2 \n" \ - " mov a4, %4 \n" \ - " mov a3, %3 \n" \ - " movi a2, %1 \n" \ - " syscall \n" \ - " mov %0, a2 \n" \ - : "=a" (__res) \ - : "i" (__NR_##name), "a" (arg0), "a" (arg1), "a" (arg2) \ - : "a2", "a3", "a4", "a5" \ - ); \ -__syscall_return(type,__res); \ -} - -#define _syscall4(type,name,type0,arg0,type1,arg1,type2,arg2,type3,arg3) \ -type name(type0 arg0,type1 arg1,type2 arg2,type3 arg3) \ -{ \ -long __res; \ -__asm__ __volatile__ ( \ - " mov a6, %2 \n" \ - " mov a5, %5 \n" \ - " mov a4, %4 \n" \ - " mov a3, %3 \n" \ - " movi a2, %1 \n" \ - " syscall \n" \ - " mov %0, a2 \n" \ - : "=a" (__res) \ - : "i" (__NR_##name), "a" (arg0), "a" (arg1), "a" (arg2), "a" (arg3) \ - : "a2", "a3", "a4", "a5", "a6" \ - ); \ -__syscall_return(type,__res); \ -} - -/* Note that we save and restore the a7 frame pointer. - * Including a7 in the clobber list doesn't do what you'd expect. - */ -#define _syscall5(type,name,type0,arg0,type1,arg1,type2,arg2,type3,arg3,type4,arg4) \ -type name(type0 arg0,type1 arg1,type2 arg2,type3 arg3,type4 arg4) \ -{ \ -long __res; \ -__asm__ __volatile__ ( \ - " mov a9, a7 \n" \ - " mov a7, %2 \n" \ - " mov a6, %6 \n" \ - " mov a5, %5 \n" \ - " mov a4, %4 \n" \ - " mov a3, %3 \n" \ - " movi a2, %1 \n" \ - " syscall \n" \ - " mov a7, a9 \n" \ - " mov %0, a2 \n" \ - : "=a" (__res) \ - : "i" (__NR_##name), "a" (arg0), "a" (arg1), "a" (arg2), \ - "a" (arg3), "a" (arg4) \ - : "a2", "a3", "a4", "a5", "a6", "a9" \ - ); \ -__syscall_return(type,__res); \ -} - -/* Note that we save and restore the a7 frame pointer. - * Including a7 in the clobber list doesn't do what you'd expect. - */ -#define _syscall6(type,name,type0,arg0,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5) \ -type name(type0 arg0,type1 arg1,type2 arg2,type3 arg3,type4 arg4,type5 arg5) \ -{ \ -long __res; \ -__asm__ __volatile__ ( \ - " mov a9, a7 \n" \ - " mov a8, %2 \n" \ - " mov a7, %7 \n" \ - " mov a6, %6 \n" \ - " mov a5, %5 \n" \ - " mov a4, %4 \n" \ - " mov a3, %3 \n" \ - " movi a2, %1 \n" \ - " syscall \n" \ - " mov a7, a9 \n" \ - " mov %0, a2 \n" \ - : "=a" (__res) \ - : "i" (__NR_##name), "a" (arg0), "a" (arg1), "a" (arg2), \ - "a" (arg3), "a" (arg4), "a" (arg5) \ - : "a2", "a3", "a4", "a5", "a6", "a8", "a9" \ - ); \ -__syscall_return(type,__res); \ -} +#define SYS_XTENSA_RESERVED 0 /* don't use this */ +#define SYS_XTENSA_ATOMIC_SET 1 /* set variable */ +#define SYS_XTENSA_ATOMIC_EXG_ADD 2 /* exchange memory and add */ +#define SYS_XTENSA_ATOMIC_ADD 3 /* add to memory */ +#define SYS_XTENSA_ATOMIC_CMP_SWP 4 /* compare and swap */ + +#define SYS_XTENSA_COUNT 5 /* count */ + +#ifdef __KERNEL__ /* * "Conditional" syscalls @@ -414,6 +611,9 @@ __syscall_return(type,__res); \ #define __ARCH_WANT_SYS_UTIME #define __ARCH_WANT_SYS_LLSEEK #define __ARCH_WANT_SYS_RT_SIGACTION -#endif /* __KERNEL__ */ +#define __ARCH_WANT_SYS_RT_SIGSUSPEND + +#endif /* __KERNEL__ */ #endif /* _XTENSA_UNISTD_H */ + diff --git a/include/asm-xtensa/variant-fsf/core.h b/include/asm-xtensa/variant-fsf/core.h new file mode 100644 index 00000000000..2f337605c74 --- /dev/null +++ b/include/asm-xtensa/variant-fsf/core.h @@ -0,0 +1,359 @@ +/* + * Xtensa processor core configuration information. + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 1999-2006 Tensilica Inc. + */ + +#ifndef _XTENSA_CORE_H +#define _XTENSA_CORE_H + + +/**************************************************************************** + Parameters Useful for Any Code, USER or PRIVILEGED + ****************************************************************************/ + +/* + * Note: Macros of the form XCHAL_HAVE_*** have a value of 1 if the option is + * configured, and a value of 0 otherwise. These macros are always defined. + */ + + +/*---------------------------------------------------------------------- + ISA + ----------------------------------------------------------------------*/ + +#define XCHAL_HAVE_BE 1 /* big-endian byte ordering */ +#define XCHAL_HAVE_WINDOWED 1 /* windowed registers option */ +#define XCHAL_NUM_AREGS 64 /* num of physical addr regs */ +#define XCHAL_NUM_AREGS_LOG2 6 /* log2(XCHAL_NUM_AREGS) */ +#define XCHAL_MAX_INSTRUCTION_SIZE 3 /* max instr bytes (3..8) */ +#define XCHAL_HAVE_DEBUG 1 /* debug option */ +#define XCHAL_HAVE_DENSITY 1 /* 16-bit instructions */ +#define XCHAL_HAVE_LOOPS 1 /* zero-overhead loops */ +#define XCHAL_HAVE_NSA 1 /* NSA/NSAU instructions */ +#define XCHAL_HAVE_MINMAX 0 /* MIN/MAX instructions */ +#define XCHAL_HAVE_SEXT 0 /* SEXT instruction */ +#define XCHAL_HAVE_CLAMPS 0 /* CLAMPS instruction */ +#define XCHAL_HAVE_MUL16 0 /* MUL16S/MUL16U instructions */ +#define XCHAL_HAVE_MUL32 0 /* MULL instruction */ +#define XCHAL_HAVE_MUL32_HIGH 0 /* MULUH/MULSH instructions */ +#define XCHAL_HAVE_L32R 1 /* L32R instruction */ +#define XCHAL_HAVE_ABSOLUTE_LITERALS 1 /* non-PC-rel (extended) L32R */ +#define XCHAL_HAVE_CONST16 0 /* CONST16 instruction */ +#define XCHAL_HAVE_ADDX 1 /* ADDX#/SUBX# instructions */ +#define XCHAL_HAVE_WIDE_BRANCHES 0 /* B*.W18 or B*.W15 instr's */ +#define XCHAL_HAVE_PREDICTED_BRANCHES 0 /* B[EQ/EQZ/NE/NEZ]T instr's */ +#define XCHAL_HAVE_CALL4AND12 1 /* (obsolete option) */ +#define XCHAL_HAVE_ABS 1 /* ABS instruction */ +/*#define XCHAL_HAVE_POPC 0*/ /* POPC instruction */ +/*#define XCHAL_HAVE_CRC 0*/ /* CRC instruction */ +#define XCHAL_HAVE_RELEASE_SYNC 0 /* L32AI/S32RI instructions */ +#define XCHAL_HAVE_S32C1I 0 /* S32C1I instruction */ +#define XCHAL_HAVE_SPECULATION 0 /* speculation */ +#define XCHAL_HAVE_FULL_RESET 1 /* all regs/state reset */ +#define XCHAL_NUM_CONTEXTS 1 /* */ +#define XCHAL_NUM_MISC_REGS 2 /* num of scratch regs (0..4) */ +#define XCHAL_HAVE_TAP_MASTER 0 /* JTAG TAP control instr's */ +#define XCHAL_HAVE_PRID 1 /* processor ID register */ +#define XCHAL_HAVE_THREADPTR 1 /* THREADPTR register */ +#define XCHAL_HAVE_BOOLEANS 0 /* boolean registers */ +#define XCHAL_HAVE_CP 0 /* CPENABLE reg (coprocessor) */ +#define XCHAL_CP_MAXCFG 0 /* max allowed cp id plus one */ +#define XCHAL_HAVE_MAC16 0 /* MAC16 package */ +#define XCHAL_HAVE_VECTORFPU2005 0 /* vector floating-point pkg */ +#define XCHAL_HAVE_FP 0 /* floating point pkg */ +#define XCHAL_HAVE_VECTRA1 0 /* Vectra I pkg */ +#define XCHAL_HAVE_VECTRALX 0 /* Vectra LX pkg */ +#define XCHAL_HAVE_HIFI2 0 /* HiFi2 Audio Engine pkg */ + + +/*---------------------------------------------------------------------- + MISC + ----------------------------------------------------------------------*/ + +#define XCHAL_NUM_WRITEBUFFER_ENTRIES 4 /* size of write buffer */ +#define XCHAL_INST_FETCH_WIDTH 4 /* instr-fetch width in bytes */ +#define XCHAL_DATA_WIDTH 4 /* data width in bytes */ +/* In T1050, applies to selected core load and store instructions (see ISA): */ +#define XCHAL_UNALIGNED_LOAD_EXCEPTION 1 /* unaligned loads cause exc. */ +#define XCHAL_UNALIGNED_STORE_EXCEPTION 1 /* unaligned stores cause exc.*/ + +#define XCHAL_CORE_ID "fsf" /* alphanum core name + (CoreID) set in the Xtensa + Processor Generator */ + +#define XCHAL_BUILD_UNIQUE_ID 0x00006700 /* 22-bit sw build ID */ + +/* + * These definitions describe the hardware targeted by this software. + */ +#define XCHAL_HW_CONFIGID0 0xC103C3FF /* ConfigID hi 32 bits*/ +#define XCHAL_HW_CONFIGID1 0x0C006700 /* ConfigID lo 32 bits*/ +#define XCHAL_HW_VERSION_NAME "LX2.0.0" /* full version name */ +#define XCHAL_HW_VERSION_MAJOR 2200 /* major ver# of targeted hw */ +#define XCHAL_HW_VERSION_MINOR 0 /* minor ver# of targeted hw */ +#define XTHAL_HW_REL_LX2 1 +#define XTHAL_HW_REL_LX2_0 1 +#define XTHAL_HW_REL_LX2_0_0 1 +#define XCHAL_HW_CONFIGID_RELIABLE 1 +/* If software targets a *range* of hardware versions, these are the bounds: */ +#define XCHAL_HW_MIN_VERSION_MAJOR 2200 /* major v of earliest tgt hw */ +#define XCHAL_HW_MIN_VERSION_MINOR 0 /* minor v of earliest tgt hw */ +#define XCHAL_HW_MAX_VERSION_MAJOR 2200 /* major v of latest tgt hw */ +#define XCHAL_HW_MAX_VERSION_MINOR 0 /* minor v of latest tgt hw */ + + +/*---------------------------------------------------------------------- + CACHE + ----------------------------------------------------------------------*/ + +#define XCHAL_ICACHE_LINESIZE 16 /* I-cache line size in bytes */ +#define XCHAL_DCACHE_LINESIZE 16 /* D-cache line size in bytes */ +#define XCHAL_ICACHE_LINEWIDTH 4 /* log2(I line size in bytes) */ +#define XCHAL_DCACHE_LINEWIDTH 4 /* log2(D line size in bytes) */ + +#define XCHAL_ICACHE_SIZE 8192 /* I-cache size in bytes or 0 */ +#define XCHAL_DCACHE_SIZE 8192 /* D-cache size in bytes or 0 */ + +#define XCHAL_DCACHE_IS_WRITEBACK 0 /* writeback feature */ + + + + +/**************************************************************************** + Parameters Useful for PRIVILEGED (Supervisory or Non-Virtualized) Code + ****************************************************************************/ + + +#ifndef XTENSA_HAL_NON_PRIVILEGED_ONLY + +/*---------------------------------------------------------------------- + CACHE + ----------------------------------------------------------------------*/ + +#define XCHAL_HAVE_PIF 1 /* any outbound PIF present */ + +/* If present, cache size in bytes == (ways * 2^(linewidth + setwidth)). */ + +/* Number of cache sets in log2(lines per way): */ +#define XCHAL_ICACHE_SETWIDTH 8 +#define XCHAL_DCACHE_SETWIDTH 8 + +/* Cache set associativity (number of ways): */ +#define XCHAL_ICACHE_WAYS 2 +#define XCHAL_DCACHE_WAYS 2 + +/* Cache features: */ +#define XCHAL_ICACHE_LINE_LOCKABLE 0 +#define XCHAL_DCACHE_LINE_LOCKABLE 0 +#define XCHAL_ICACHE_ECC_PARITY 0 +#define XCHAL_DCACHE_ECC_PARITY 0 + +/* Number of encoded cache attr bits (see <xtensa/hal.h> for decoded bits): */ +#define XCHAL_CA_BITS 4 + + +/*---------------------------------------------------------------------- + INTERNAL I/D RAM/ROMs and XLMI + ----------------------------------------------------------------------*/ + +#define XCHAL_NUM_INSTROM 0 /* number of core instr. ROMs */ +#define XCHAL_NUM_INSTRAM 0 /* number of core instr. RAMs */ +#define XCHAL_NUM_DATAROM 0 /* number of core data ROMs */ +#define XCHAL_NUM_DATARAM 0 /* number of core data RAMs */ +#define XCHAL_NUM_URAM 0 /* number of core unified RAMs*/ +#define XCHAL_NUM_XLMI 0 /* number of core XLMI ports */ + + +/*---------------------------------------------------------------------- + INTERRUPTS and TIMERS + ----------------------------------------------------------------------*/ + +#define XCHAL_HAVE_INTERRUPTS 1 /* interrupt option */ +#define XCHAL_HAVE_HIGHPRI_INTERRUPTS 1 /* med/high-pri. interrupts */ +#define XCHAL_HAVE_NMI 0 /* non-maskable interrupt */ +#define XCHAL_HAVE_CCOUNT 1 /* CCOUNT reg. (timer option) */ +#define XCHAL_NUM_TIMERS 3 /* number of CCOMPAREn regs */ +#define XCHAL_NUM_INTERRUPTS 17 /* number of interrupts */ +#define XCHAL_NUM_INTERRUPTS_LOG2 5 /* ceil(log2(NUM_INTERRUPTS)) */ +#define XCHAL_NUM_EXTINTERRUPTS 10 /* num of external interrupts */ +#define XCHAL_NUM_INTLEVELS 4 /* number of interrupt levels + (not including level zero) */ +#define XCHAL_EXCM_LEVEL 1 /* level masked by PS.EXCM */ + /* (always 1 in XEA1; levels 2 .. EXCM_LEVEL are "medium priority") */ + +/* Masks of interrupts at each interrupt level: */ +#define XCHAL_INTLEVEL1_MASK 0x000064F9 +#define XCHAL_INTLEVEL2_MASK 0x00008902 +#define XCHAL_INTLEVEL3_MASK 0x00011204 +#define XCHAL_INTLEVEL4_MASK 0x00000000 +#define XCHAL_INTLEVEL5_MASK 0x00000000 +#define XCHAL_INTLEVEL6_MASK 0x00000000 +#define XCHAL_INTLEVEL7_MASK 0x00000000 + +/* Masks of interrupts at each range 1..n of interrupt levels: */ +#define XCHAL_INTLEVEL1_ANDBELOW_MASK 0x000064F9 +#define XCHAL_INTLEVEL2_ANDBELOW_MASK 0x0000EDFB +#define XCHAL_INTLEVEL3_ANDBELOW_MASK 0x0001FFFF +#define XCHAL_INTLEVEL4_ANDBELOW_MASK 0x0001FFFF +#define XCHAL_INTLEVEL5_ANDBELOW_MASK 0x0001FFFF +#define XCHAL_INTLEVEL6_ANDBELOW_MASK 0x0001FFFF +#define XCHAL_INTLEVEL7_ANDBELOW_MASK 0x0001FFFF + +/* Level of each interrupt: */ +#define XCHAL_INT0_LEVEL 1 +#define XCHAL_INT1_LEVEL 2 +#define XCHAL_INT2_LEVEL 3 +#define XCHAL_INT3_LEVEL 1 +#define XCHAL_INT4_LEVEL 1 +#define XCHAL_INT5_LEVEL 1 +#define XCHAL_INT6_LEVEL 1 +#define XCHAL_INT7_LEVEL 1 +#define XCHAL_INT8_LEVEL 2 +#define XCHAL_INT9_LEVEL 3 +#define XCHAL_INT10_LEVEL 1 +#define XCHAL_INT11_LEVEL 2 +#define XCHAL_INT12_LEVEL 3 +#define XCHAL_INT13_LEVEL 1 +#define XCHAL_INT14_LEVEL 1 +#define XCHAL_INT15_LEVEL 2 +#define XCHAL_INT16_LEVEL 3 +#define XCHAL_DEBUGLEVEL 4 /* debug interrupt level */ +#define XCHAL_HAVE_DEBUG_EXTERN_INT 0 /* OCD external db interrupt */ + +/* Type of each interrupt: */ +#define XCHAL_INT0_TYPE XTHAL_INTTYPE_EXTERN_LEVEL +#define XCHAL_INT1_TYPE XTHAL_INTTYPE_EXTERN_LEVEL +#define XCHAL_INT2_TYPE XTHAL_INTTYPE_EXTERN_LEVEL +#define XCHAL_INT3_TYPE XTHAL_INTTYPE_EXTERN_LEVEL +#define XCHAL_INT4_TYPE XTHAL_INTTYPE_EXTERN_LEVEL +#define XCHAL_INT5_TYPE XTHAL_INTTYPE_EXTERN_LEVEL +#define XCHAL_INT6_TYPE XTHAL_INTTYPE_EXTERN_LEVEL +#define XCHAL_INT7_TYPE XTHAL_INTTYPE_EXTERN_EDGE +#define XCHAL_INT8_TYPE XTHAL_INTTYPE_EXTERN_EDGE +#define XCHAL_INT9_TYPE XTHAL_INTTYPE_EXTERN_EDGE +#define XCHAL_INT10_TYPE XTHAL_INTTYPE_TIMER +#define XCHAL_INT11_TYPE XTHAL_INTTYPE_TIMER +#define XCHAL_INT12_TYPE XTHAL_INTTYPE_TIMER +#define XCHAL_INT13_TYPE XTHAL_INTTYPE_SOFTWARE +#define XCHAL_INT14_TYPE XTHAL_INTTYPE_SOFTWARE +#define XCHAL_INT15_TYPE XTHAL_INTTYPE_SOFTWARE +#define XCHAL_INT16_TYPE XTHAL_INTTYPE_SOFTWARE + +/* Masks of interrupts for each type of interrupt: */ +#define XCHAL_INTTYPE_MASK_UNCONFIGURED 0xFFFE0000 +#define XCHAL_INTTYPE_MASK_SOFTWARE 0x0001E000 +#define XCHAL_INTTYPE_MASK_EXTERN_EDGE 0x00000380 +#define XCHAL_INTTYPE_MASK_EXTERN_LEVEL 0x0000007F +#define XCHAL_INTTYPE_MASK_TIMER 0x00001C00 +#define XCHAL_INTTYPE_MASK_NMI 0x00000000 +#define XCHAL_INTTYPE_MASK_WRITE_ERROR 0x00000000 + +/* Interrupt numbers assigned to specific interrupt sources: */ +#define XCHAL_TIMER0_INTERRUPT 10 /* CCOMPARE0 */ +#define XCHAL_TIMER1_INTERRUPT 11 /* CCOMPARE1 */ +#define XCHAL_TIMER2_INTERRUPT 12 /* CCOMPARE2 */ +#define XCHAL_TIMER3_INTERRUPT XTHAL_TIMER_UNCONFIGURED + +/* Interrupt numbers for levels at which only one interrupt is configured: */ +/* (There are many interrupts each at level(s) 1, 2, 3.) */ + + +/* + * External interrupt vectors/levels. + * These macros describe how Xtensa processor interrupt numbers + * (as numbered internally, eg. in INTERRUPT and INTENABLE registers) + * map to external BInterrupt<n> pins, for those interrupts + * configured as external (level-triggered, edge-triggered, or NMI). + * See the Xtensa processor databook for more details. + */ + +/* Core interrupt numbers mapped to each EXTERNAL interrupt number: */ +#define XCHAL_EXTINT0_NUM 0 /* (intlevel 1) */ +#define XCHAL_EXTINT1_NUM 1 /* (intlevel 2) */ +#define XCHAL_EXTINT2_NUM 2 /* (intlevel 3) */ +#define XCHAL_EXTINT3_NUM 3 /* (intlevel 1) */ +#define XCHAL_EXTINT4_NUM 4 /* (intlevel 1) */ +#define XCHAL_EXTINT5_NUM 5 /* (intlevel 1) */ +#define XCHAL_EXTINT6_NUM 6 /* (intlevel 1) */ +#define XCHAL_EXTINT7_NUM 7 /* (intlevel 1) */ +#define XCHAL_EXTINT8_NUM 8 /* (intlevel 2) */ +#define XCHAL_EXTINT9_NUM 9 /* (intlevel 3) */ + + +/*---------------------------------------------------------------------- + EXCEPTIONS and VECTORS + ----------------------------------------------------------------------*/ + +#define XCHAL_XEA_VERSION 2 /* Xtensa Exception Architecture + number: 1 == XEA1 (old) + 2 == XEA2 (new) + 0 == XEAX (extern) */ +#define XCHAL_HAVE_XEA1 0 /* Exception Architecture 1 */ +#define XCHAL_HAVE_XEA2 1 /* Exception Architecture 2 */ +#define XCHAL_HAVE_XEAX 0 /* External Exception Arch. */ +#define XCHAL_HAVE_EXCEPTIONS 1 /* exception option */ +#define XCHAL_HAVE_MEM_ECC_PARITY 0 /* local memory ECC/parity */ + +#define XCHAL_RESET_VECTOR_VADDR 0xFE000020 +#define XCHAL_RESET_VECTOR_PADDR 0xFE000020 +#define XCHAL_USER_VECTOR_VADDR 0xD0000220 +#define XCHAL_USER_VECTOR_PADDR 0x00000220 +#define XCHAL_KERNEL_VECTOR_VADDR 0xD0000200 +#define XCHAL_KERNEL_VECTOR_PADDR 0x00000200 +#define XCHAL_DOUBLEEXC_VECTOR_VADDR 0xD0000290 +#define XCHAL_DOUBLEEXC_VECTOR_PADDR 0x00000290 +#define XCHAL_WINDOW_VECTORS_VADDR 0xD0000000 +#define XCHAL_WINDOW_VECTORS_PADDR 0x00000000 +#define XCHAL_INTLEVEL2_VECTOR_VADDR 0xD0000240 +#define XCHAL_INTLEVEL2_VECTOR_PADDR 0x00000240 +#define XCHAL_INTLEVEL3_VECTOR_VADDR 0xD0000250 +#define XCHAL_INTLEVEL3_VECTOR_PADDR 0x00000250 +#define XCHAL_INTLEVEL4_VECTOR_VADDR 0xFE000520 +#define XCHAL_INTLEVEL4_VECTOR_PADDR 0xFE000520 +#define XCHAL_DEBUG_VECTOR_VADDR XCHAL_INTLEVEL4_VECTOR_VADDR +#define XCHAL_DEBUG_VECTOR_PADDR XCHAL_INTLEVEL4_VECTOR_PADDR + + +/*---------------------------------------------------------------------- + DEBUG + ----------------------------------------------------------------------*/ + +#define XCHAL_HAVE_OCD 1 /* OnChipDebug option */ +#define XCHAL_NUM_IBREAK 2 /* number of IBREAKn regs */ +#define XCHAL_NUM_DBREAK 2 /* number of DBREAKn regs */ +#define XCHAL_HAVE_OCD_DIR_ARRAY 1 /* faster OCD option */ + + +/*---------------------------------------------------------------------- + MMU + ----------------------------------------------------------------------*/ + +/* See <xtensa/config/core-matmap.h> header file for more details. */ + +#define XCHAL_HAVE_TLBS 1 /* inverse of HAVE_CACHEATTR */ +#define XCHAL_HAVE_SPANNING_WAY 0 /* one way maps I+D 4GB vaddr */ +#define XCHAL_HAVE_IDENTITY_MAP 0 /* vaddr == paddr always */ +#define XCHAL_HAVE_CACHEATTR 0 /* CACHEATTR register present */ +#define XCHAL_HAVE_MIMIC_CACHEATTR 0 /* region protection */ +#define XCHAL_HAVE_XLT_CACHEATTR 0 /* region prot. w/translation */ +#define XCHAL_HAVE_PTP_MMU 1 /* full MMU (with page table + [autorefill] and protection) + usable for an MMU-based OS */ +/* If none of the above last 4 are set, it's a custom TLB configuration. */ +#define XCHAL_ITLB_ARF_ENTRIES_LOG2 2 /* log2(autorefill way size) */ +#define XCHAL_DTLB_ARF_ENTRIES_LOG2 2 /* log2(autorefill way size) */ + +#define XCHAL_MMU_ASID_BITS 8 /* number of bits in ASIDs */ +#define XCHAL_MMU_RINGS 4 /* number of rings (1..4) */ +#define XCHAL_MMU_RING_BITS 2 /* num of bits in RING field */ + +#endif /* !XTENSA_HAL_NON_PRIVILEGED_ONLY */ + + +#endif /* _XTENSA_CORE_CONFIGURATION_H */ + diff --git a/include/asm-xtensa/variant-fsf/tie.h b/include/asm-xtensa/variant-fsf/tie.h new file mode 100644 index 00000000000..a73c7166491 --- /dev/null +++ b/include/asm-xtensa/variant-fsf/tie.h @@ -0,0 +1,22 @@ +/* + * Xtensa processor core configuration information. + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 1999-2006 Tensilica Inc. + */ + +#ifndef XTENSA_TIE_H +#define XTENSA_TIE_H + +/*---------------------------------------------------------------------- + COPROCESSORS and EXTRA STATE + ----------------------------------------------------------------------*/ + +#define XCHAL_CP_NUM 0 /* number of coprocessors */ +#define XCHAL_CP_MASK 0x00 + +#endif /*XTENSA_CONFIG_TIE_H*/ + diff --git a/include/asm-xtensa/xtensa/cacheasm.h b/include/asm-xtensa/xtensa/cacheasm.h deleted file mode 100644 index 0cdbb0bf180..00000000000 --- a/include/asm-xtensa/xtensa/cacheasm.h +++ /dev/null @@ -1,708 +0,0 @@ -#ifndef XTENSA_CACHEASM_H -#define XTENSA_CACHEASM_H - -/* - * THIS FILE IS GENERATED -- DO NOT MODIFY BY HAND - * - * include/asm-xtensa/xtensa/cacheasm.h -- assembler-specific cache - * related definitions that depend on CORE configuration. - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2002 Tensilica Inc. - */ - - -#include <xtensa/coreasm.h> - - -/* - * This header file defines assembler macros of the form: - * <x>cache_<func> - * where <x> is 'i' or 'd' for instruction and data caches, - * and <func> indicates the function of the macro. - * - * The following functions <func> are defined, - * and apply only to the specified cache (I or D): - * - * reset - * Resets the cache. - * - * sync - * Makes sure any previous cache instructions have been completed; - * ie. makes sure any previous cache control operations - * have had full effect and been synchronized to memory. - * Eg. any invalidate completed [so as not to generate a hit], - * any writebacks or other pipelined writes written to memory, etc. - * - * invalidate_line (single cache line) - * invalidate_region (specified memory range) - * invalidate_all (entire cache) - * Invalidates all cache entries that cache - * data from the specified memory range. - * NOTE: locked entries are not invalidated. - * - * writeback_line (single cache line) - * writeback_region (specified memory range) - * writeback_all (entire cache) - * Writes back to memory all dirty cache entries - * that cache data from the specified memory range, - * and marks these entries as clean. - * NOTE: on some future implementations, this might - * also invalidate. - * NOTE: locked entries are written back, but never invalidated. - * NOTE: instruction caches never implement writeback. - * - * writeback_inv_line (single cache line) - * writeback_inv_region (specified memory range) - * writeback_inv_all (entire cache) - * Writes back to memory all dirty cache entries - * that cache data from the specified memory range, - * and invalidates these entries (including all clean - * cache entries that cache data from that range). - * NOTE: locked entries are written back but not invalidated. - * NOTE: instruction caches never implement writeback. - * - * lock_line (single cache line) - * lock_region (specified memory range) - * Prefetch and lock the specified memory range into cache. - * NOTE: if any part of the specified memory range cannot - * be locked, a ??? exception occurs. These macros don't - * do anything special (yet anyway) to handle this situation. - * - * unlock_line (single cache line) - * unlock_region (specified memory range) - * unlock_all (entire cache) - * Unlock cache entries that cache the specified memory range. - * Entries not already locked are unaffected. - */ - - - -/*************************** GENERIC -- ALL CACHES ***************************/ - - -/* - * The following macros assume the following cache size/parameter limits - * in the current Xtensa core implementation: - * cache size: 1024 bytes minimum - * line size: 16 - 64 bytes - * way count: 1 - 4 - * - * Minimum entries per way (ie. per associativity) = 1024 / 64 / 4 = 4 - * Hence the assumption that each loop can execute four cache instructions. - * - * Correspondingly, the offset range of instructions is assumed able to cover - * four lines, ie. offsets {0,1,2,3} * line_size are assumed valid for - * both hit and indexed cache instructions. Ie. these offsets are all - * valid: 0, 16, 32, 48, 64, 96, 128, 192 (for line sizes 16, 32, 64). - * This is true of all original cache instructions - * (dhi, ihi, dhwb, dhwbi, dii, iii) which have offsets - * of 0 to 1020 in multiples of 4 (ie. 8 bits shifted by 2). - * This is also true of subsequent cache instructions - * (dhu, ihu, diu, iiu, diwb, diwbi, dpfl, ipfl) which have offsets - * of 0 to 240 in multiples of 16 (ie. 4 bits shifted by 4). - * - * (Maximum cache size, currently 32k, doesn't affect the following macros. - * Cache ways > MMU min page size cause aliasing but that's another matter.) - */ - - - -/* - * Macro to apply an 'indexed' cache instruction to the entire cache. - * - * Parameters: - * cainst instruction/ that takes an address register parameter - * and an offset parameter (in range 0 .. 3*linesize). - * size size of cache in bytes - * linesize size of cache line in bytes - * assoc_or1 number of associativities (ways/sets) in cache - * if all sets affected by cainst, - * or 1 if only one set (or not all sets) of the cache - * is affected by cainst (eg. DIWB or DIWBI [not yet ISA defined]). - * aa, ab unique address registers (temporaries) - */ - - .macro cache_index_all cainst, size, linesize, assoc_or1, aa, ab - - // Sanity-check on cache parameters: - .ifne (\size % (\linesize * \assoc_or1 * 4)) - .err // cache configuration outside expected/supported range! - .endif - - // \size byte cache, \linesize byte lines, \assoc_or1 way(s) affected by each \cainst. - movi \aa, (\size / (\linesize * \assoc_or1 * 4)) - // Possible improvement: need only loop if \aa > 1 ; - // however that particular condition is highly unlikely. - movi \ab, 0 // to iterate over cache - floop \aa, cachex\@ - \cainst \ab, 0*\linesize - \cainst \ab, 1*\linesize - \cainst \ab, 2*\linesize - \cainst \ab, 3*\linesize - addi \ab, \ab, 4*\linesize // move to next line - floopend \aa, cachex\@ - - .endm - - -/* - * Macro to apply a 'hit' cache instruction to a memory region, - * ie. to any cache entries that cache a specified portion (region) of memory. - * Takes care of the unaligned cases, ie. may apply to one - * more cache line than $asize / lineSize if $aaddr is not aligned. - * - * - * Parameters are: - * cainst instruction/macro that takes an address register parameter - * and an offset parameter (currently always zero) - * and generates a cache instruction (eg. "dhi", "dhwb", "ihi", etc.) - * linesize_log2 log2(size of cache line in bytes) - * addr register containing start address of region (clobbered) - * asize register containing size of the region in bytes (clobbered) - * askew unique register used as temporary - * - * !?!?! 2DO: optimization: iterate max(cache_size and \asize) / linesize - */ - - .macro cache_hit_region cainst, linesize_log2, addr, asize, askew - - // Make \asize the number of iterations: - extui \askew, \addr, 0, \linesize_log2 // get unalignment amount of \addr - add \asize, \asize, \askew // ... and add it to \asize - addi \asize, \asize, (1 << \linesize_log2) - 1 // round up! - srli \asize, \asize, \linesize_log2 - - // Iterate over region: - floopnez \asize, cacheh\@ - \cainst \addr, 0 - addi \addr, \addr, (1 << \linesize_log2) // move to next line - floopend \asize, cacheh\@ - - .endm - - - - - -/*************************** INSTRUCTION CACHE ***************************/ - - -/* - * Reset/initialize the instruction cache by simply invalidating it: - * (need to unlock first also, if cache locking implemented): - * - * Parameters: - * aa, ab unique address registers (temporaries) - */ - .macro icache_reset aa, ab - icache_unlock_all \aa, \ab - icache_invalidate_all \aa, \ab - .endm - - -/* - * Synchronize after an instruction cache operation, - * to be sure everything is in sync with memory as to be - * expected following any previous instruction cache control operations. - * - * Parameters are: - * ar an address register (temporary) (currently unused, but may be used in future) - */ - .macro icache_sync ar -#if XCHAL_ICACHE_SIZE > 0 - isync -#endif - .endm - - - -/* - * Invalidate a single line of the instruction cache. - * Parameters are: - * ar address register that contains (virtual) address to invalidate - * (may get clobbered in a future implementation, but not currently) - * offset (optional) offset to add to \ar to compute effective address to invalidate - * (note: some number of lsbits are ignored) - */ - .macro icache_invalidate_line ar, offset -#if XCHAL_ICACHE_SIZE > 0 - ihi \ar, \offset // invalidate icache line - /* - * NOTE: in some version of the silicon [!!!SHOULD HAVE BEEN DOCUMENTED!!!] - * 'ihi' doesn't work, so it had been replaced with 'iii' - * (which would just invalidate more than it should, - * which should be okay other than the performance hit - * because cache locking did not exist in that version, - * unless user somehow relies on something being cached). - * [WHAT VERSION IS IT!!?!? - * IS THERE ANY WAY TO TEST FOR THAT HERE, TO OUTPUT 'III' ONLY IF NEEDED!?!?]. - * - * iii \ar, \offset - */ - icache_sync \ar -#endif - .endm - - - - -/* - * Invalidate instruction cache entries that cache a specified portion of memory. - * Parameters are: - * astart start address (register gets clobbered) - * asize size of the region in bytes (register gets clobbered) - * ac unique register used as temporary - */ - .macro icache_invalidate_region astart, asize, ac -#if XCHAL_ICACHE_SIZE > 0 - // Instruction cache region invalidation: - cache_hit_region ihi, XCHAL_ICACHE_LINEWIDTH, \astart, \asize, \ac - icache_sync \ac - // End of instruction cache region invalidation -#endif - .endm - - - -/* - * Invalidate entire instruction cache. - * - * Parameters: - * aa, ab unique address registers (temporaries) - */ - .macro icache_invalidate_all aa, ab -#if XCHAL_ICACHE_SIZE > 0 - // Instruction cache invalidation: - cache_index_all iii, XCHAL_ICACHE_SIZE, XCHAL_ICACHE_LINESIZE, XCHAL_ICACHE_WAYS, \aa, \ab - icache_sync \aa - // End of instruction cache invalidation -#endif - .endm - - - -/* - * Lock (prefetch & lock) a single line of the instruction cache. - * - * Parameters are: - * ar address register that contains (virtual) address to lock - * (may get clobbered in a future implementation, but not currently) - * offset offset to add to \ar to compute effective address to lock - * (note: some number of lsbits are ignored) - */ - .macro icache_lock_line ar, offset -#if XCHAL_ICACHE_SIZE > 0 && XCHAL_ICACHE_LINE_LOCKABLE - ipfl \ar, \offset /* prefetch and lock icache line */ - icache_sync \ar -#endif - .endm - - - -/* - * Lock (prefetch & lock) a specified portion of memory into the instruction cache. - * Parameters are: - * astart start address (register gets clobbered) - * asize size of the region in bytes (register gets clobbered) - * ac unique register used as temporary - */ - .macro icache_lock_region astart, asize, ac -#if XCHAL_ICACHE_SIZE > 0 && XCHAL_ICACHE_LINE_LOCKABLE - // Instruction cache region lock: - cache_hit_region ipfl, XCHAL_ICACHE_LINEWIDTH, \astart, \asize, \ac - icache_sync \ac - // End of instruction cache region lock -#endif - .endm - - - -/* - * Unlock a single line of the instruction cache. - * - * Parameters are: - * ar address register that contains (virtual) address to unlock - * (may get clobbered in a future implementation, but not currently) - * offset offset to add to \ar to compute effective address to unlock - * (note: some number of lsbits are ignored) - */ - .macro icache_unlock_line ar, offset -#if XCHAL_ICACHE_SIZE > 0 && XCHAL_ICACHE_LINE_LOCKABLE - ihu \ar, \offset /* unlock icache line */ - icache_sync \ar -#endif - .endm - - - -/* - * Unlock a specified portion of memory from the instruction cache. - * Parameters are: - * astart start address (register gets clobbered) - * asize size of the region in bytes (register gets clobbered) - * ac unique register used as temporary - */ - .macro icache_unlock_region astart, asize, ac -#if XCHAL_ICACHE_SIZE > 0 && XCHAL_ICACHE_LINE_LOCKABLE - // Instruction cache region unlock: - cache_hit_region ihu, XCHAL_ICACHE_LINEWIDTH, \astart, \asize, \ac - icache_sync \ac - // End of instruction cache region unlock -#endif - .endm - - - -/* - * Unlock entire instruction cache. - * - * Parameters: - * aa, ab unique address registers (temporaries) - */ - .macro icache_unlock_all aa, ab -#if XCHAL_ICACHE_SIZE > 0 && XCHAL_ICACHE_LINE_LOCKABLE - // Instruction cache unlock: - cache_index_all iiu, XCHAL_ICACHE_SIZE, XCHAL_ICACHE_LINESIZE, 1, \aa, \ab - icache_sync \aa - // End of instruction cache unlock -#endif - .endm - - - - - -/*************************** DATA CACHE ***************************/ - - - -/* - * Reset/initialize the data cache by simply invalidating it - * (need to unlock first also, if cache locking implemented): - * - * Parameters: - * aa, ab unique address registers (temporaries) - */ - .macro dcache_reset aa, ab - dcache_unlock_all \aa, \ab - dcache_invalidate_all \aa, \ab - .endm - - - - -/* - * Synchronize after a data cache operation, - * to be sure everything is in sync with memory as to be - * expected following any previous data cache control operations. - * - * Parameters are: - * ar an address register (temporary) (currently unused, but may be used in future) - */ - .macro dcache_sync ar -#if XCHAL_DCACHE_SIZE > 0 - // This previous sequence errs on the conservative side (too much so); a DSYNC should be sufficient: - //memw // synchronize data cache changes relative to subsequent memory accesses - //isync // be conservative and ISYNC as well (just to be sure) - - dsync -#endif - .endm - - - -/* - * Synchronize after a data store operation, - * to be sure the stored data is completely off the processor - * (and assuming there is no buffering outside the processor, - * that the data is in memory). This may be required to - * ensure that the processor's write buffers are emptied. - * A MEMW followed by a read guarantees this, by definition. - * We also try to make sure the read itself completes. - * - * Parameters are: - * ar an address register (temporary) - */ - .macro write_sync ar - memw // ensure previous memory accesses are complete prior to subsequent memory accesses - l32i \ar, sp, 0 // completing this read ensures any previous write has completed, because of MEMW - //slot - add \ar, \ar, \ar // use the result of the read to help ensure the read completes (in future architectures) - .endm - - -/* - * Invalidate a single line of the data cache. - * Parameters are: - * ar address register that contains (virtual) address to invalidate - * (may get clobbered in a future implementation, but not currently) - * offset (optional) offset to add to \ar to compute effective address to invalidate - * (note: some number of lsbits are ignored) - */ - .macro dcache_invalidate_line ar, offset -#if XCHAL_DCACHE_SIZE > 0 - dhi \ar, \offset - dcache_sync \ar -#endif - .endm - - - - - -/* - * Invalidate data cache entries that cache a specified portion of memory. - * Parameters are: - * astart start address (register gets clobbered) - * asize size of the region in bytes (register gets clobbered) - * ac unique register used as temporary - */ - .macro dcache_invalidate_region astart, asize, ac -#if XCHAL_DCACHE_SIZE > 0 - // Data cache region invalidation: - cache_hit_region dhi, XCHAL_DCACHE_LINEWIDTH, \astart, \asize, \ac - dcache_sync \ac - // End of data cache region invalidation -#endif - .endm - - - -#if 0 -/* - * This is a work-around for a bug in SiChip1 (???). - * There should be a proper mechanism for not outputting - * these instructions when not needed. - * To enable work-around, uncomment this and replace 'dii' - * with 'dii_s1' everywhere, eg. in dcache_invalidate_all - * macro below. - */ - .macro dii_s1 ar, offset - dii \ar, \offset - or \ar, \ar, \ar - or \ar, \ar, \ar - or \ar, \ar, \ar - or \ar, \ar, \ar - .endm -#endif - - -/* - * Invalidate entire data cache. - * - * Parameters: - * aa, ab unique address registers (temporaries) - */ - .macro dcache_invalidate_all aa, ab -#if XCHAL_DCACHE_SIZE > 0 - // Data cache invalidation: - cache_index_all dii, XCHAL_DCACHE_SIZE, XCHAL_DCACHE_LINESIZE, XCHAL_DCACHE_WAYS, \aa, \ab - dcache_sync \aa - // End of data cache invalidation -#endif - .endm - - - -/* - * Writeback a single line of the data cache. - * Parameters are: - * ar address register that contains (virtual) address to writeback - * (may get clobbered in a future implementation, but not currently) - * offset offset to add to \ar to compute effective address to writeback - * (note: some number of lsbits are ignored) - */ - .macro dcache_writeback_line ar, offset -#if XCHAL_DCACHE_SIZE > 0 && XCHAL_DCACHE_IS_WRITEBACK - dhwb \ar, \offset - dcache_sync \ar -#endif - .endm - - - -/* - * Writeback dirty data cache entries that cache a specified portion of memory. - * Parameters are: - * astart start address (register gets clobbered) - * asize size of the region in bytes (register gets clobbered) - * ac unique register used as temporary - */ - .macro dcache_writeback_region astart, asize, ac -#if XCHAL_DCACHE_SIZE > 0 && XCHAL_DCACHE_IS_WRITEBACK - // Data cache region writeback: - cache_hit_region dhwb, XCHAL_DCACHE_LINEWIDTH, \astart, \asize, \ac - dcache_sync \ac - // End of data cache region writeback -#endif - .endm - - - -/* - * Writeback entire data cache. - * Parameters: - * aa, ab unique address registers (temporaries) - */ - .macro dcache_writeback_all aa, ab -#if XCHAL_DCACHE_SIZE > 0 && XCHAL_DCACHE_IS_WRITEBACK - // Data cache writeback: - cache_index_all diwb, XCHAL_DCACHE_SIZE, XCHAL_DCACHE_LINESIZE, 1, \aa, \ab - dcache_sync \aa - // End of data cache writeback -#endif - .endm - - - -/* - * Writeback and invalidate a single line of the data cache. - * Parameters are: - * ar address register that contains (virtual) address to writeback and invalidate - * (may get clobbered in a future implementation, but not currently) - * offset offset to add to \ar to compute effective address to writeback and invalidate - * (note: some number of lsbits are ignored) - */ - .macro dcache_writeback_inv_line ar, offset -#if XCHAL_DCACHE_SIZE > 0 - dhwbi \ar, \offset /* writeback and invalidate dcache line */ - dcache_sync \ar -#endif - .endm - - - -/* - * Writeback and invalidate data cache entries that cache a specified portion of memory. - * Parameters are: - * astart start address (register gets clobbered) - * asize size of the region in bytes (register gets clobbered) - * ac unique register used as temporary - */ - .macro dcache_writeback_inv_region astart, asize, ac -#if XCHAL_DCACHE_SIZE > 0 - // Data cache region writeback and invalidate: - cache_hit_region dhwbi, XCHAL_DCACHE_LINEWIDTH, \astart, \asize, \ac - dcache_sync \ac - // End of data cache region writeback and invalidate -#endif - .endm - - - -/* - * Writeback and invalidate entire data cache. - * Parameters: - * aa, ab unique address registers (temporaries) - */ - .macro dcache_writeback_inv_all aa, ab -#if XCHAL_DCACHE_SIZE > 0 - // Data cache writeback and invalidate: -#if XCHAL_DCACHE_IS_WRITEBACK - cache_index_all diwbi, XCHAL_DCACHE_SIZE, XCHAL_DCACHE_LINESIZE, 1, \aa, \ab - dcache_sync \aa -#else /*writeback*/ - // Data cache does not support writeback, so just invalidate: */ - dcache_invalidate_all \aa, \ab -#endif /*writeback*/ - // End of data cache writeback and invalidate -#endif - .endm - - - - -/* - * Lock (prefetch & lock) a single line of the data cache. - * - * Parameters are: - * ar address register that contains (virtual) address to lock - * (may get clobbered in a future implementation, but not currently) - * offset offset to add to \ar to compute effective address to lock - * (note: some number of lsbits are ignored) - */ - .macro dcache_lock_line ar, offset -#if XCHAL_DCACHE_SIZE > 0 && XCHAL_DCACHE_LINE_LOCKABLE - dpfl \ar, \offset /* prefetch and lock dcache line */ - dcache_sync \ar -#endif - .endm - - - -/* - * Lock (prefetch & lock) a specified portion of memory into the data cache. - * Parameters are: - * astart start address (register gets clobbered) - * asize size of the region in bytes (register gets clobbered) - * ac unique register used as temporary - */ - .macro dcache_lock_region astart, asize, ac -#if XCHAL_DCACHE_SIZE > 0 && XCHAL_DCACHE_LINE_LOCKABLE - // Data cache region lock: - cache_hit_region dpfl, XCHAL_DCACHE_LINEWIDTH, \astart, \asize, \ac - dcache_sync \ac - // End of data cache region lock -#endif - .endm - - - -/* - * Unlock a single line of the data cache. - * - * Parameters are: - * ar address register that contains (virtual) address to unlock - * (may get clobbered in a future implementation, but not currently) - * offset offset to add to \ar to compute effective address to unlock - * (note: some number of lsbits are ignored) - */ - .macro dcache_unlock_line ar, offset -#if XCHAL_DCACHE_SIZE > 0 && XCHAL_DCACHE_LINE_LOCKABLE - dhu \ar, \offset /* unlock dcache line */ - dcache_sync \ar -#endif - .endm - - - -/* - * Unlock a specified portion of memory from the data cache. - * Parameters are: - * astart start address (register gets clobbered) - * asize size of the region in bytes (register gets clobbered) - * ac unique register used as temporary - */ - .macro dcache_unlock_region astart, asize, ac -#if XCHAL_DCACHE_SIZE > 0 && XCHAL_DCACHE_LINE_LOCKABLE - // Data cache region unlock: - cache_hit_region dhu, XCHAL_DCACHE_LINEWIDTH, \astart, \asize, \ac - dcache_sync \ac - // End of data cache region unlock -#endif - .endm - - - -/* - * Unlock entire data cache. - * - * Parameters: - * aa, ab unique address registers (temporaries) - */ - .macro dcache_unlock_all aa, ab -#if XCHAL_DCACHE_SIZE > 0 && XCHAL_DCACHE_LINE_LOCKABLE - // Data cache unlock: - cache_index_all diu, XCHAL_DCACHE_SIZE, XCHAL_DCACHE_LINESIZE, 1, \aa, \ab - dcache_sync \aa - // End of data cache unlock -#endif - .endm - - -#endif /*XTENSA_CACHEASM_H*/ - diff --git a/include/asm-xtensa/xtensa/cacheattrasm.h b/include/asm-xtensa/xtensa/cacheattrasm.h deleted file mode 100644 index 1c3e117b359..00000000000 --- a/include/asm-xtensa/xtensa/cacheattrasm.h +++ /dev/null @@ -1,432 +0,0 @@ -#ifndef XTENSA_CACHEATTRASM_H -#define XTENSA_CACHEATTRASM_H - -/* - * THIS FILE IS GENERATED -- DO NOT MODIFY BY HAND - * - * include/asm-xtensa/xtensa/cacheattrasm.h -- assembler-specific - * CACHEATTR register related definitions that depend on CORE - * configuration. - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2002 Tensilica Inc. - */ - - -#include <xtensa/coreasm.h> - - -/* - * This header file defines assembler macros of the form: - * <x>cacheattr_<func> - * where: - * <x> is 'i', 'd' or absent for instruction, data - * or both caches; and - * <func> indicates the function of the macro. - * - * The following functions are defined: - * - * icacheattr_get - * Reads I-cache CACHEATTR into a2 (clobbers a3-a5). - * - * dcacheattr_get - * Reads D-cache CACHEATTR into a2 (clobbers a3-a5). - * (Note: for configs with a real CACHEATTR register, the - * above two macros are identical.) - * - * cacheattr_set - * Writes both I-cache and D-cache CACHEATTRs from a2 (a3-a8 clobbered). - * Works even when changing one's own code's attributes. - * - * icacheattr_is_enabled label - * Branches to \label if I-cache appears to have been enabled - * (eg. if CACHEATTR contains a cache-enabled attribute). - * (clobbers a2-a5,SAR) - * - * dcacheattr_is_enabled label - * Branches to \label if D-cache appears to have been enabled - * (eg. if CACHEATTR contains a cache-enabled attribute). - * (clobbers a2-a5,SAR) - * - * cacheattr_is_enabled label - * Branches to \label if either I-cache or D-cache appears to have been enabled - * (eg. if CACHEATTR contains a cache-enabled attribute). - * (clobbers a2-a5,SAR) - * - * The following macros are only defined under certain conditions: - * - * icacheattr_set (if XCHAL_HAVE_MIMIC_CACHEATTR || XCHAL_HAVE_XLT_CACHEATTR) - * Writes I-cache CACHEATTR from a2 (a3-a8 clobbered). - * - * dcacheattr_set (if XCHAL_HAVE_MIMIC_CACHEATTR || XCHAL_HAVE_XLT_CACHEATTR) - * Writes D-cache CACHEATTR from a2 (a3-a8 clobbered). - */ - - - -/*************************** GENERIC -- ALL CACHES ***************************/ - -/* - * _cacheattr_get - * - * (Internal macro.) - * Returns value of CACHEATTR register (or closest equivalent) in a2. - * - * Entry: - * (none) - * Exit: - * a2 value read from CACHEATTR - * a3-a5 clobbered (temporaries) - */ - .macro _cacheattr_get tlb -#if XCHAL_HAVE_CACHEATTR - rsr a2, CACHEATTR -#elif XCHAL_HAVE_MIMIC_CACHEATTR || XCHAL_HAVE_XLT_CACHEATTR - // We have a config that "mimics" CACHEATTR using a simplified - // "MMU" composed of a single statically-mapped way. - // DTLB and ITLB are independent, so there's no single - // cache attribute that can describe both. So for now - // just return the DTLB state. - movi a5, 0xE0000000 - movi a2, 0 - movi a3, 0 -1: add a3, a3, a5 // next segment - r&tlb&1 a4, a3 // get PPN+CA of segment at 0xE0000000, 0xC0000000, ..., 0 - dsync // interlock??? - slli a2, a2, 4 - extui a4, a4, 0, 4 // extract CA - or a2, a2, a4 - bnez a3, 1b -#else - // This macro isn't applicable to arbitrary MMU configurations. - // Just return zero. - movi a2, 0 -#endif - .endm - - .macro icacheattr_get - _cacheattr_get itlb - .endm - - .macro dcacheattr_get - _cacheattr_get dtlb - .endm - - -#define XCHAL_CACHEATTR_ALL_BYPASS 0x22222222 /* default (powerup/reset) value of CACHEATTR, all BYPASS - mode (ie. disabled/bypassed caches) */ - -#if XCHAL_HAVE_CACHEATTR || XCHAL_HAVE_MIMIC_CACHEATTR || XCHAL_HAVE_XLT_CACHEATTR - -#define XCHAL_FCA_ENAMASK 0x001A /* bitmap of fetch attributes that require enabled icache */ -#define XCHAL_LCA_ENAMASK 0x0003 /* bitmap of load attributes that require enabled dcache */ -#define XCHAL_SCA_ENAMASK 0x0003 /* bitmap of store attributes that require enabled dcache */ -#define XCHAL_LSCA_ENAMASK (XCHAL_LCA_ENAMASK|XCHAL_SCA_ENAMASK) /* l/s attrs requiring enabled dcache */ -#define XCHAL_ALLCA_ENAMASK (XCHAL_FCA_ENAMASK|XCHAL_LSCA_ENAMASK) /* all attrs requiring enabled caches */ - -/* - * _cacheattr_is_enabled - * - * (Internal macro.) - * Branches to \label if CACHEATTR in a2 indicates an enabled - * cache, using mask in a3. - * - * Parameters: - * label where to branch to if cache is enabled - * Entry: - * a2 contains CACHEATTR value used to determine whether - * caches are enabled - * a3 16-bit constant where each bit correspond to - * one of the 16 possible CA values (in a CACHEATTR mask); - * CA values that indicate the cache is enabled - * have their corresponding bit set in this mask - * (eg. use XCHAL_xCA_ENAMASK , above) - * Exit: - * a2,a4,a5 clobbered - * SAR clobbered - */ - .macro _cacheattr_is_enabled label - movi a4, 8 // loop 8 times -.Lcaife\@: - extui a5, a2, 0, 4 // get CA nibble - ssr a5 // index into mask according to CA... - srl a5, a3 // ...and get CA's mask bit in a5 bit 0 - bbsi.l a5, 0, \label // if CA indicates cache enabled, jump to label - srli a2, a2, 4 // next nibble - addi a4, a4, -1 - bnez a4, .Lcaife\@ // loop for each nibble - .endm - -#else /* XCHAL_HAVE_CACHEATTR || XCHAL_HAVE_MIMIC_CACHEATTR || XCHAL_HAVE_XLT_CACHEATTR */ - .macro _cacheattr_is_enabled label - j \label // macro not applicable, assume caches always enabled - .endm -#endif /* XCHAL_HAVE_CACHEATTR || XCHAL_HAVE_MIMIC_CACHEATTR || XCHAL_HAVE_XLT_CACHEATTR */ - - - -/* - * icacheattr_is_enabled - * - * Branches to \label if I-cache is enabled. - * - * Parameters: - * label where to branch to if icache is enabled - * Entry: - * (none) - * Exit: - * a2-a5, SAR clobbered (temporaries) - */ - .macro icacheattr_is_enabled label -#if XCHAL_HAVE_CACHEATTR || XCHAL_HAVE_MIMIC_CACHEATTR || XCHAL_HAVE_XLT_CACHEATTR - icacheattr_get - movi a3, XCHAL_FCA_ENAMASK -#endif - _cacheattr_is_enabled \label - .endm - -/* - * dcacheattr_is_enabled - * - * Branches to \label if D-cache is enabled. - * - * Parameters: - * label where to branch to if dcache is enabled - * Entry: - * (none) - * Exit: - * a2-a5, SAR clobbered (temporaries) - */ - .macro dcacheattr_is_enabled label -#if XCHAL_HAVE_CACHEATTR || XCHAL_HAVE_MIMIC_CACHEATTR || XCHAL_HAVE_XLT_CACHEATTR - dcacheattr_get - movi a3, XCHAL_LSCA_ENAMASK -#endif - _cacheattr_is_enabled \label - .endm - -/* - * cacheattr_is_enabled - * - * Branches to \label if either I-cache or D-cache is enabled. - * - * Parameters: - * label where to branch to if a cache is enabled - * Entry: - * (none) - * Exit: - * a2-a5, SAR clobbered (temporaries) - */ - .macro cacheattr_is_enabled label -#if XCHAL_HAVE_CACHEATTR - rsr a2, CACHEATTR - movi a3, XCHAL_ALLCA_ENAMASK -#elif XCHAL_HAVE_MIMIC_CACHEATTR || XCHAL_HAVE_XLT_CACHEATTR - icacheattr_get - movi a3, XCHAL_FCA_ENAMASK - _cacheattr_is_enabled \label - dcacheattr_get - movi a3, XCHAL_LSCA_ENAMASK -#endif - _cacheattr_is_enabled \label - .endm - - - -/* - * The ISA does not have a defined way to change the - * instruction cache attributes of the running code, - * ie. of the memory area that encloses the current PC. - * However, each micro-architecture (or class of - * configurations within a micro-architecture) - * provides a way to deal with this issue. - * - * Here are a few macros used to implement the relevant - * approach taken. - */ - -#if XCHAL_HAVE_MIMIC_CACHEATTR || XCHAL_HAVE_XLT_CACHEATTR - // We have a config that "mimics" CACHEATTR using a simplified - // "MMU" composed of a single statically-mapped way. - -/* - * icacheattr_set - * - * Entry: - * a2 cacheattr value to set - * Exit: - * a2 unchanged - * a3-a8 clobbered (temporaries) - */ - .macro icacheattr_set - - movi a5, 0xE0000000 // mask of upper 3 bits - movi a6, 3f // PC where ITLB is set - movi a3, 0 // start at region 0 (0 .. 7) - and a6, a6, a5 // upper 3 bits of local PC area - mov a7, a2 // copy a2 so it doesn't get clobbered - j 3f - -# if XCHAL_HAVE_XLT_CACHEATTR - // Can do translations, use generic method: -1: sub a6, a3, a5 // address of some other segment - ritlb1 a8, a6 // save its PPN+CA - dsync // interlock?? - witlb a4, a6 // make it translate to this code area - movi a6, 5f // where to jump into it - isync - sub a6, a6, a5 // adjust jump address within that other segment - jx a6 - - // Note that in the following code snippet, which runs at a different virtual - // address than it is assembled for, we avoid using literals (eg. via movi/l32r) - // just in case literals end up in a different 512 MB segment, and we avoid - // instructions that rely on the current PC being what is expected. - // - .align 4 - _j 6f // this is at label '5' minus 4 bytes - .align 4 -5: witlb a4, a3 // we're in other segment, now can write previous segment's CA - isync - add a6, a6, a5 // back to previous segment - addi a6, a6, -4 // next jump label - jx a6 - -6: sub a6, a3, a5 // address of some other segment - witlb a8, a6 // restore PPN+CA of other segment - mov a6, a3 // restore a6 - isync -# else /* XCHAL_HAVE_XLT_CACHEATTR */ - // Use micro-architecture specific method. - // The following 4-instruction sequence is aligned such that - // it all fits within a single I-cache line. Sixteen byte - // alignment is sufficient for this (using XCHAL_ICACHE_LINESIZE - // actually causes problems because that can be greater than - // the alignment of the reset vector, where this macro is often - // invoked, which would cause the linker to align the reset - // vector code away from the reset vector!!). - .align 16 /*XCHAL_ICACHE_LINESIZE*/ -1: _witlb a4, a3 // write wired PTE (CA, no PPN) of 512MB segment to ITLB - _isync - nop - nop -# endif /* XCHAL_HAVE_XLT_CACHEATTR */ - beq a3, a5, 4f // done? - - // Note that in the WITLB loop, we don't do any load/stores - // (may not be an issue here, but it is important in the DTLB case). -2: srli a7, a7, 4 // next CA - sub a3, a3, a5 // next segment (add 0x20000000) -3: -# if XCHAL_HAVE_XLT_CACHEATTR /* if have translation, preserve it */ - ritlb1 a8, a3 // get current PPN+CA of segment - dsync // interlock??? - extui a4, a7, 0, 4 // extract CA to set - srli a8, a8, 4 // clear CA but keep PPN ... - slli a8, a8, 4 // ... - add a4, a4, a8 // combine new CA with PPN to preserve -# else - extui a4, a7, 0, 4 // extract CA -# endif - beq a3, a6, 1b // current PC's region? if so, do it in a safe way - witlb a4, a3 // write wired PTE (CA [+PPN]) of 512MB segment to ITLB - bne a3, a5, 2b - isync // make sure all ifetch changes take effect -4: - .endm // icacheattr_set - - -/* - * dcacheattr_set - * - * Entry: - * a2 cacheattr value to set - * Exit: - * a2 unchanged - * a3-a8 clobbered (temporaries) - */ - - .macro dcacheattr_set - - movi a5, 0xE0000000 // mask of upper 3 bits - movi a3, 0 // start at region 0 (0 .. 7) - mov a7, a2 // copy a2 so it doesn't get clobbered - j 3f - // Note that in the WDTLB loop, we don't do any load/stores - // (including implicit l32r via movi) because it isn't safe. -2: srli a7, a7, 4 // next CA - sub a3, a3, a5 // next segment (add 0x20000000) -3: -# if XCHAL_HAVE_XLT_CACHEATTR /* if have translation, preserve it */ - rdtlb1 a8, a3 // get current PPN+CA of segment - dsync // interlock??? - extui a4, a7, 0, 4 // extract CA to set - srli a8, a8, 4 // clear CA but keep PPN ... - slli a8, a8, 4 // ... - add a4, a4, a8 // combine new CA with PPN to preserve -# else - extui a4, a7, 0, 4 // extract CA to set -# endif - wdtlb a4, a3 // write wired PTE (CA [+PPN]) of 512MB segment to DTLB - bne a3, a5, 2b - dsync // make sure all data path changes take effect - .endm // dcacheattr_set - -#endif /* XCHAL_HAVE_MIMIC_CACHEATTR || XCHAL_HAVE_XLT_CACHEATTR */ - - - -/* - * cacheattr_set - * - * Macro that sets the current CACHEATTR safely - * (both i and d) according to the current contents of a2. - * It works even when changing the cache attributes of - * the currently running code. - * - * Entry: - * a2 cacheattr value to set - * Exit: - * a2 unchanged - * a3-a8 clobbered (temporaries) - */ - .macro cacheattr_set - -#if XCHAL_HAVE_CACHEATTR -# if XCHAL_ICACHE_LINESIZE < 4 - // No i-cache, so can always safely write to CACHEATTR: - wsr a2, CACHEATTR -# else - // The Athens micro-architecture, when using the old - // exception architecture option (ie. with the CACHEATTR register) - // allows changing the cache attributes of the running code - // using the following exact sequence aligned to be within - // an instruction cache line. (NOTE: using XCHAL_ICACHE_LINESIZE - // alignment actually causes problems because that can be greater - // than the alignment of the reset vector, where this macro is often - // invoked, which would cause the linker to align the reset - // vector code away from the reset vector!!). - j 1f - .align 16 /*XCHAL_ICACHE_LINESIZE*/ // align to within an I-cache line -1: _wsr a2, CACHEATTR - _isync - nop - nop -# endif -#elif XCHAL_HAVE_MIMIC_CACHEATTR || XCHAL_HAVE_XLT_CACHEATTR - // DTLB and ITLB are independent, but to keep semantics - // of this macro we simply write to both. - icacheattr_set - dcacheattr_set -#else - // This macro isn't applicable to arbitrary MMU configurations. - // Do nothing in this case. -#endif - .endm - - -#endif /*XTENSA_CACHEATTRASM_H*/ - diff --git a/include/asm-xtensa/xtensa/config-linux_be/core.h b/include/asm-xtensa/xtensa/config-linux_be/core.h deleted file mode 100644 index d54fe5eb106..00000000000 --- a/include/asm-xtensa/xtensa/config-linux_be/core.h +++ /dev/null @@ -1,1270 +0,0 @@ -/* - * xtensa/config/core.h -- HAL definitions that are dependent on CORE configuration - * - * This header file is sometimes referred to as the "compile-time HAL" or CHAL. - * It was generated for a specific Xtensa processor configuration. - * - * Source for configuration-independent binaries (which link in a - * configuration-specific HAL library) must NEVER include this file. - * It is perfectly normal, however, for the HAL source itself to include this file. - */ - -/* - * Copyright (c) 2003 Tensilica, Inc. All Rights Reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of version 2.1 of the GNU Lesser General Public - * License as published by the Free Software Foundation. - * - * This program is distributed in the hope that it would be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. - * - * Further, this software is distributed without any warranty that it is - * free of the rightful claim of any third person regarding infringement - * or the like. Any license provided herein, whether implied or - * otherwise, applies only to this software file. Patent licenses, if - * any, provided herein do not apply to combinations of this program with - * other software, or any other product whatsoever. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this program; if not, write the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston MA 02111-1307, - * USA. - */ - - -#ifndef XTENSA_CONFIG_CORE_H -#define XTENSA_CONFIG_CORE_H - -#include <xtensa/hal.h> - - -/*---------------------------------------------------------------------- - GENERAL - ----------------------------------------------------------------------*/ - -/* - * Separators for macros that expand into arrays. - * These can be predefined by files that #include this one, - * when different separators are required. - */ -/* Element separator for macros that expand into 1-dimensional arrays: */ -#ifndef XCHAL_SEP -#define XCHAL_SEP , -#endif -/* Array separator for macros that expand into 2-dimensional arrays: */ -#ifndef XCHAL_SEP2 -#define XCHAL_SEP2 },{ -#endif - - -/*---------------------------------------------------------------------- - ENDIANNESS - ----------------------------------------------------------------------*/ - -#define XCHAL_HAVE_BE 1 -#define XCHAL_HAVE_LE 0 -#define XCHAL_MEMORY_ORDER XTHAL_BIGENDIAN - - -/*---------------------------------------------------------------------- - REGISTER WINDOWS - ----------------------------------------------------------------------*/ - -#define XCHAL_HAVE_WINDOWED 1 /* 1 if windowed registers option configured, 0 otherwise */ -#define XCHAL_NUM_AREGS 64 /* number of physical address regs */ -#define XCHAL_NUM_AREGS_LOG2 6 /* log2(XCHAL_NUM_AREGS) */ - - -/*---------------------------------------------------------------------- - ADDRESS ALIGNMENT - ----------------------------------------------------------------------*/ - -/* These apply to a selected set of core load and store instructions only (see ISA): */ -#define XCHAL_UNALIGNED_LOAD_EXCEPTION 1 /* 1 if unaligned loads cause an exception, 0 otherwise */ -#define XCHAL_UNALIGNED_STORE_EXCEPTION 1 /* 1 if unaligned stores cause an exception, 0 otherwise */ - - -/*---------------------------------------------------------------------- - INTERRUPTS - ----------------------------------------------------------------------*/ - -#define XCHAL_HAVE_INTERRUPTS 1 /* 1 if interrupt option configured, 0 otherwise */ -#define XCHAL_HAVE_HIGHPRI_INTERRUPTS 1 /* 1 if high-priority interrupt option configured, 0 otherwise */ -#define XCHAL_HAVE_HIGHLEVEL_INTERRUPTS XCHAL_HAVE_HIGHPRI_INTERRUPTS -#define XCHAL_HAVE_NMI 0 /* 1 if NMI option configured, 0 otherwise */ -#define XCHAL_NUM_INTERRUPTS 17 /* number of interrupts */ -#define XCHAL_NUM_INTERRUPTS_LOG2 5 /* number of bits to hold an interrupt number: roundup(log2(number of interrupts)) */ -#define XCHAL_NUM_EXTINTERRUPTS 10 /* number of external interrupts */ -#define XCHAL_NUM_INTLEVELS 4 /* number of interrupt levels (not including level zero!) */ -#define XCHAL_NUM_LOWPRI_LEVELS 1 /* number of low-priority interrupt levels (always 1) */ -#define XCHAL_FIRST_HIGHPRI_LEVEL (XCHAL_NUM_LOWPRI_LEVELS+1) /* level of first high-priority interrupt (always 2) */ -#define XCHAL_EXCM_LEVEL 1 /* level of interrupts masked by PS.EXCM (XEA2 only; always 1 in T10xx); - for XEA1, where there is no PS.EXCM, this is always 1; - interrupts at levels FIRST_HIGHPRI <= n <= EXCM_LEVEL, if any, - are termed "medium priority" interrupts (post T10xx only) */ -/* Note: 1 <= LOWPRI_LEVELS <= EXCM_LEVEL < DEBUGLEVEL <= NUM_INTLEVELS < NMILEVEL <= 15 */ - -/* Masks of interrupts at each interrupt level: */ -#define XCHAL_INTLEVEL0_MASK 0x00000000 -#define XCHAL_INTLEVEL1_MASK 0x000064F9 -#define XCHAL_INTLEVEL2_MASK 0x00008902 -#define XCHAL_INTLEVEL3_MASK 0x00011204 -#define XCHAL_INTLEVEL4_MASK 0x00000000 -#define XCHAL_INTLEVEL5_MASK 0x00000000 -#define XCHAL_INTLEVEL6_MASK 0x00000000 -#define XCHAL_INTLEVEL7_MASK 0x00000000 -#define XCHAL_INTLEVEL8_MASK 0x00000000 -#define XCHAL_INTLEVEL9_MASK 0x00000000 -#define XCHAL_INTLEVEL10_MASK 0x00000000 -#define XCHAL_INTLEVEL11_MASK 0x00000000 -#define XCHAL_INTLEVEL12_MASK 0x00000000 -#define XCHAL_INTLEVEL13_MASK 0x00000000 -#define XCHAL_INTLEVEL14_MASK 0x00000000 -#define XCHAL_INTLEVEL15_MASK 0x00000000 -/* As an array of entries (eg. for C constant arrays): */ -#define XCHAL_INTLEVEL_MASKS 0x00000000 XCHAL_SEP \ - 0x000064F9 XCHAL_SEP \ - 0x00008902 XCHAL_SEP \ - 0x00011204 XCHAL_SEP \ - 0x00000000 XCHAL_SEP \ - 0x00000000 XCHAL_SEP \ - 0x00000000 XCHAL_SEP \ - 0x00000000 XCHAL_SEP \ - 0x00000000 XCHAL_SEP \ - 0x00000000 XCHAL_SEP \ - 0x00000000 XCHAL_SEP \ - 0x00000000 XCHAL_SEP \ - 0x00000000 XCHAL_SEP \ - 0x00000000 XCHAL_SEP \ - 0x00000000 XCHAL_SEP \ - 0x00000000 - -/* Masks of interrupts at each range 1..n of interrupt levels: */ -#define XCHAL_INTLEVEL0_ANDBELOW_MASK 0x00000000 -#define XCHAL_INTLEVEL1_ANDBELOW_MASK 0x000064F9 -#define XCHAL_INTLEVEL2_ANDBELOW_MASK 0x0000EDFB -#define XCHAL_INTLEVEL3_ANDBELOW_MASK 0x0001FFFF -#define XCHAL_INTLEVEL4_ANDBELOW_MASK 0x0001FFFF -#define XCHAL_INTLEVEL5_ANDBELOW_MASK 0x0001FFFF -#define XCHAL_INTLEVEL6_ANDBELOW_MASK 0x0001FFFF -#define XCHAL_INTLEVEL7_ANDBELOW_MASK 0x0001FFFF -#define XCHAL_INTLEVEL8_ANDBELOW_MASK 0x0001FFFF -#define XCHAL_INTLEVEL9_ANDBELOW_MASK 0x0001FFFF -#define XCHAL_INTLEVEL10_ANDBELOW_MASK 0x0001FFFF -#define XCHAL_INTLEVEL11_ANDBELOW_MASK 0x0001FFFF -#define XCHAL_INTLEVEL12_ANDBELOW_MASK 0x0001FFFF -#define XCHAL_INTLEVEL13_ANDBELOW_MASK 0x0001FFFF -#define XCHAL_INTLEVEL14_ANDBELOW_MASK 0x0001FFFF -#define XCHAL_INTLEVEL15_ANDBELOW_MASK 0x0001FFFF -#define XCHAL_LOWPRI_MASK XCHAL_INTLEVEL1_ANDBELOW_MASK /* mask of all low-priority interrupts */ -#define XCHAL_EXCM_MASK XCHAL_INTLEVEL1_ANDBELOW_MASK /* mask of all interrupts masked by PS.EXCM (or CEXCM) */ -/* As an array of entries (eg. for C constant arrays): */ -#define XCHAL_INTLEVEL_ANDBELOW_MASKS 0x00000000 XCHAL_SEP \ - 0x000064F9 XCHAL_SEP \ - 0x0000EDFB XCHAL_SEP \ - 0x0001FFFF XCHAL_SEP \ - 0x0001FFFF XCHAL_SEP \ - 0x0001FFFF XCHAL_SEP \ - 0x0001FFFF XCHAL_SEP \ - 0x0001FFFF XCHAL_SEP \ - 0x0001FFFF XCHAL_SEP \ - 0x0001FFFF XCHAL_SEP \ - 0x0001FFFF XCHAL_SEP \ - 0x0001FFFF XCHAL_SEP \ - 0x0001FFFF XCHAL_SEP \ - 0x0001FFFF XCHAL_SEP \ - 0x0001FFFF XCHAL_SEP \ - 0x0001FFFF - -/* Interrupt numbers for each interrupt level at which only one interrupt was configured: */ -/*#define XCHAL_INTLEVEL1_NUM ...more than one interrupt at this level...*/ -/*#define XCHAL_INTLEVEL2_NUM ...more than one interrupt at this level...*/ -/*#define XCHAL_INTLEVEL3_NUM ...more than one interrupt at this level...*/ - -/* Level of each interrupt: */ -#define XCHAL_INT0_LEVEL 1 -#define XCHAL_INT1_LEVEL 2 -#define XCHAL_INT2_LEVEL 3 -#define XCHAL_INT3_LEVEL 1 -#define XCHAL_INT4_LEVEL 1 -#define XCHAL_INT5_LEVEL 1 -#define XCHAL_INT6_LEVEL 1 -#define XCHAL_INT7_LEVEL 1 -#define XCHAL_INT8_LEVEL 2 -#define XCHAL_INT9_LEVEL 3 -#define XCHAL_INT10_LEVEL 1 -#define XCHAL_INT11_LEVEL 2 -#define XCHAL_INT12_LEVEL 3 -#define XCHAL_INT13_LEVEL 1 -#define XCHAL_INT14_LEVEL 1 -#define XCHAL_INT15_LEVEL 2 -#define XCHAL_INT16_LEVEL 3 -#define XCHAL_INT17_LEVEL 0 -#define XCHAL_INT18_LEVEL 0 -#define XCHAL_INT19_LEVEL 0 -#define XCHAL_INT20_LEVEL 0 -#define XCHAL_INT21_LEVEL 0 -#define XCHAL_INT22_LEVEL 0 -#define XCHAL_INT23_LEVEL 0 -#define XCHAL_INT24_LEVEL 0 -#define XCHAL_INT25_LEVEL 0 -#define XCHAL_INT26_LEVEL 0 -#define XCHAL_INT27_LEVEL 0 -#define XCHAL_INT28_LEVEL 0 -#define XCHAL_INT29_LEVEL 0 -#define XCHAL_INT30_LEVEL 0 -#define XCHAL_INT31_LEVEL 0 -/* As an array of entries (eg. for C constant arrays): */ -#define XCHAL_INT_LEVELS 1 XCHAL_SEP \ - 2 XCHAL_SEP \ - 3 XCHAL_SEP \ - 1 XCHAL_SEP \ - 1 XCHAL_SEP \ - 1 XCHAL_SEP \ - 1 XCHAL_SEP \ - 1 XCHAL_SEP \ - 2 XCHAL_SEP \ - 3 XCHAL_SEP \ - 1 XCHAL_SEP \ - 2 XCHAL_SEP \ - 3 XCHAL_SEP \ - 1 XCHAL_SEP \ - 1 XCHAL_SEP \ - 2 XCHAL_SEP \ - 3 XCHAL_SEP \ - 0 XCHAL_SEP \ - 0 XCHAL_SEP \ - 0 XCHAL_SEP \ - 0 XCHAL_SEP \ - 0 XCHAL_SEP \ - 0 XCHAL_SEP \ - 0 XCHAL_SEP \ - 0 XCHAL_SEP \ - 0 XCHAL_SEP \ - 0 XCHAL_SEP \ - 0 XCHAL_SEP \ - 0 XCHAL_SEP \ - 0 XCHAL_SEP \ - 0 XCHAL_SEP \ - 0 - -/* Type of each interrupt: */ -#define XCHAL_INT0_TYPE XTHAL_INTTYPE_EXTERN_LEVEL -#define XCHAL_INT1_TYPE XTHAL_INTTYPE_EXTERN_LEVEL -#define XCHAL_INT2_TYPE XTHAL_INTTYPE_EXTERN_LEVEL -#define XCHAL_INT3_TYPE XTHAL_INTTYPE_EXTERN_LEVEL -#define XCHAL_INT4_TYPE XTHAL_INTTYPE_EXTERN_LEVEL -#define XCHAL_INT5_TYPE XTHAL_INTTYPE_EXTERN_LEVEL -#define XCHAL_INT6_TYPE XTHAL_INTTYPE_EXTERN_LEVEL -#define XCHAL_INT7_TYPE XTHAL_INTTYPE_EXTERN_EDGE -#define XCHAL_INT8_TYPE XTHAL_INTTYPE_EXTERN_EDGE -#define XCHAL_INT9_TYPE XTHAL_INTTYPE_EXTERN_EDGE -#define XCHAL_INT10_TYPE XTHAL_INTTYPE_TIMER -#define XCHAL_INT11_TYPE XTHAL_INTTYPE_TIMER -#define XCHAL_INT12_TYPE XTHAL_INTTYPE_TIMER -#define XCHAL_INT13_TYPE XTHAL_INTTYPE_SOFTWARE -#define XCHAL_INT14_TYPE XTHAL_INTTYPE_SOFTWARE -#define XCHAL_INT15_TYPE XTHAL_INTTYPE_SOFTWARE -#define XCHAL_INT16_TYPE XTHAL_INTTYPE_SOFTWARE -#define XCHAL_INT17_TYPE XTHAL_INTTYPE_UNCONFIGURED -#define XCHAL_INT18_TYPE XTHAL_INTTYPE_UNCONFIGURED -#define XCHAL_INT19_TYPE XTHAL_INTTYPE_UNCONFIGURED -#define XCHAL_INT20_TYPE XTHAL_INTTYPE_UNCONFIGURED -#define XCHAL_INT21_TYPE XTHAL_INTTYPE_UNCONFIGURED -#define XCHAL_INT22_TYPE XTHAL_INTTYPE_UNCONFIGURED -#define XCHAL_INT23_TYPE XTHAL_INTTYPE_UNCONFIGURED -#define XCHAL_INT24_TYPE XTHAL_INTTYPE_UNCONFIGURED -#define XCHAL_INT25_TYPE XTHAL_INTTYPE_UNCONFIGURED -#define XCHAL_INT26_TYPE XTHAL_INTTYPE_UNCONFIGURED -#define XCHAL_INT27_TYPE XTHAL_INTTYPE_UNCONFIGURED -#define XCHAL_INT28_TYPE XTHAL_INTTYPE_UNCONFIGURED -#define XCHAL_INT29_TYPE XTHAL_INTTYPE_UNCONFIGURED -#define XCHAL_INT30_TYPE XTHAL_INTTYPE_UNCONFIGURED -#define XCHAL_INT31_TYPE XTHAL_INTTYPE_UNCONFIGURED -/* As an array of entries (eg. for C constant arrays): */ -#define XCHAL_INT_TYPES XTHAL_INTTYPE_EXTERN_LEVEL XCHAL_SEP \ - XTHAL_INTTYPE_EXTERN_LEVEL XCHAL_SEP \ - XTHAL_INTTYPE_EXTERN_LEVEL XCHAL_SEP \ - XTHAL_INTTYPE_EXTERN_LEVEL XCHAL_SEP \ - XTHAL_INTTYPE_EXTERN_LEVEL XCHAL_SEP \ - XTHAL_INTTYPE_EXTERN_LEVEL XCHAL_SEP \ - XTHAL_INTTYPE_EXTERN_LEVEL XCHAL_SEP \ - XTHAL_INTTYPE_EXTERN_EDGE XCHAL_SEP \ - XTHAL_INTTYPE_EXTERN_EDGE XCHAL_SEP \ - XTHAL_INTTYPE_EXTERN_EDGE XCHAL_SEP \ - XTHAL_INTTYPE_TIMER XCHAL_SEP \ - XTHAL_INTTYPE_TIMER XCHAL_SEP \ - XTHAL_INTTYPE_TIMER XCHAL_SEP \ - XTHAL_INTTYPE_SOFTWARE XCHAL_SEP \ - XTHAL_INTTYPE_SOFTWARE XCHAL_SEP \ - XTHAL_INTTYPE_SOFTWARE XCHAL_SEP \ - XTHAL_INTTYPE_SOFTWARE XCHAL_SEP \ - XTHAL_INTTYPE_UNCONFIGURED XCHAL_SEP \ - XTHAL_INTTYPE_UNCONFIGURED XCHAL_SEP \ - XTHAL_INTTYPE_UNCONFIGURED XCHAL_SEP \ - XTHAL_INTTYPE_UNCONFIGURED XCHAL_SEP \ - XTHAL_INTTYPE_UNCONFIGURED XCHAL_SEP \ - XTHAL_INTTYPE_UNCONFIGURED XCHAL_SEP \ - XTHAL_INTTYPE_UNCONFIGURED XCHAL_SEP \ - XTHAL_INTTYPE_UNCONFIGURED XCHAL_SEP \ - XTHAL_INTTYPE_UNCONFIGURED XCHAL_SEP \ - XTHAL_INTTYPE_UNCONFIGURED XCHAL_SEP \ - XTHAL_INTTYPE_UNCONFIGURED XCHAL_SEP \ - XTHAL_INTTYPE_UNCONFIGURED XCHAL_SEP \ - XTHAL_INTTYPE_UNCONFIGURED XCHAL_SEP \ - XTHAL_INTTYPE_UNCONFIGURED XCHAL_SEP \ - XTHAL_INTTYPE_UNCONFIGURED - -/* Masks of interrupts for each type of interrupt: */ -#define XCHAL_INTTYPE_MASK_UNCONFIGURED 0xFFFE0000 -#define XCHAL_INTTYPE_MASK_SOFTWARE 0x0001E000 -#define XCHAL_INTTYPE_MASK_EXTERN_EDGE 0x00000380 -#define XCHAL_INTTYPE_MASK_EXTERN_LEVEL 0x0000007F -#define XCHAL_INTTYPE_MASK_TIMER 0x00001C00 -#define XCHAL_INTTYPE_MASK_NMI 0x00000000 -/* As an array of entries (eg. for C constant arrays): */ -#define XCHAL_INTTYPE_MASKS 0xFFFE0000 XCHAL_SEP \ - 0x0001E000 XCHAL_SEP \ - 0x00000380 XCHAL_SEP \ - 0x0000007F XCHAL_SEP \ - 0x00001C00 XCHAL_SEP \ - 0x00000000 - -/* Interrupts assigned to each timer (CCOMPARE0 to CCOMPARE3), -1 if unassigned */ -#define XCHAL_TIMER0_INTERRUPT 10 -#define XCHAL_TIMER1_INTERRUPT 11 -#define XCHAL_TIMER2_INTERRUPT 12 -#define XCHAL_TIMER3_INTERRUPT XTHAL_TIMER_UNCONFIGURED -/* As an array of entries (eg. for C constant arrays): */ -#define XCHAL_TIMER_INTERRUPTS 10 XCHAL_SEP \ - 11 XCHAL_SEP \ - 12 XCHAL_SEP \ - XTHAL_TIMER_UNCONFIGURED - -/* Indexing macros: */ -#define _XCHAL_INTLEVEL_MASK(n) XCHAL_INTLEVEL ## n ## _MASK -#define XCHAL_INTLEVEL_MASK(n) _XCHAL_INTLEVEL_MASK(n) /* n = 0 .. 15 */ -#define _XCHAL_INTLEVEL_ANDBELOWMASK(n) XCHAL_INTLEVEL ## n ## _ANDBELOW_MASK -#define XCHAL_INTLEVEL_ANDBELOW_MASK(n) _XCHAL_INTLEVEL_ANDBELOWMASK(n) /* n = 0 .. 15 */ -#define _XCHAL_INT_LEVEL(n) XCHAL_INT ## n ## _LEVEL -#define XCHAL_INT_LEVEL(n) _XCHAL_INT_LEVEL(n) /* n = 0 .. 31 */ -#define _XCHAL_INT_TYPE(n) XCHAL_INT ## n ## _TYPE -#define XCHAL_INT_TYPE(n) _XCHAL_INT_TYPE(n) /* n = 0 .. 31 */ -#define _XCHAL_TIMER_INTERRUPT(n) XCHAL_TIMER ## n ## _INTERRUPT -#define XCHAL_TIMER_INTERRUPT(n) _XCHAL_TIMER_INTERRUPT(n) /* n = 0 .. 3 */ - - - -/* - * External interrupt vectors/levels. - * These macros describe how Xtensa processor interrupt numbers - * (as numbered internally, eg. in INTERRUPT and INTENABLE registers) - * map to external BInterrupt<n> pins, for those interrupts - * configured as external (level-triggered, edge-triggered, or NMI). - * See the Xtensa processor databook for more details. - */ - -/* Core interrupt numbers mapped to each EXTERNAL interrupt number: */ -#define XCHAL_EXTINT0_NUM 0 /* (intlevel 1) */ -#define XCHAL_EXTINT1_NUM 1 /* (intlevel 2) */ -#define XCHAL_EXTINT2_NUM 2 /* (intlevel 3) */ -#define XCHAL_EXTINT3_NUM 3 /* (intlevel 1) */ -#define XCHAL_EXTINT4_NUM 4 /* (intlevel 1) */ -#define XCHAL_EXTINT5_NUM 5 /* (intlevel 1) */ -#define XCHAL_EXTINT6_NUM 6 /* (intlevel 1) */ -#define XCHAL_EXTINT7_NUM 7 /* (intlevel 1) */ -#define XCHAL_EXTINT8_NUM 8 /* (intlevel 2) */ -#define XCHAL_EXTINT9_NUM 9 /* (intlevel 3) */ - -/* Corresponding interrupt masks: */ -#define XCHAL_EXTINT0_MASK 0x00000001 -#define XCHAL_EXTINT1_MASK 0x00000002 -#define XCHAL_EXTINT2_MASK 0x00000004 -#define XCHAL_EXTINT3_MASK 0x00000008 -#define XCHAL_EXTINT4_MASK 0x00000010 -#define XCHAL_EXTINT5_MASK 0x00000020 -#define XCHAL_EXTINT6_MASK 0x00000040 -#define XCHAL_EXTINT7_MASK 0x00000080 -#define XCHAL_EXTINT8_MASK 0x00000100 -#define XCHAL_EXTINT9_MASK 0x00000200 - -/* Core config interrupt levels mapped to each external interrupt: */ -#define XCHAL_EXTINT0_LEVEL 1 /* (int number 0) */ -#define XCHAL_EXTINT1_LEVEL 2 /* (int number 1) */ -#define XCHAL_EXTINT2_LEVEL 3 /* (int number 2) */ -#define XCHAL_EXTINT3_LEVEL 1 /* (int number 3) */ -#define XCHAL_EXTINT4_LEVEL 1 /* (int number 4) */ -#define XCHAL_EXTINT5_LEVEL 1 /* (int number 5) */ -#define XCHAL_EXTINT6_LEVEL 1 /* (int number 6) */ -#define XCHAL_EXTINT7_LEVEL 1 /* (int number 7) */ -#define XCHAL_EXTINT8_LEVEL 2 /* (int number 8) */ -#define XCHAL_EXTINT9_LEVEL 3 /* (int number 9) */ - - -/*---------------------------------------------------------------------- - EXCEPTIONS and VECTORS - ----------------------------------------------------------------------*/ - -#define XCHAL_HAVE_EXCEPTIONS 1 /* 1 if exception option configured, 0 otherwise */ - -#define XCHAL_XEA_VERSION 2 /* Xtensa Exception Architecture number: 1 for XEA1 (old), 2 for XEA2 (new) */ -#define XCHAL_HAVE_XEA1 0 /* 1 if XEA1, 0 otherwise */ -#define XCHAL_HAVE_XEA2 1 /* 1 if XEA2, 0 otherwise */ -/* For backward compatibility ONLY -- DO NOT USE (will be removed in future release): */ -#define XCHAL_HAVE_OLD_EXC_ARCH XCHAL_HAVE_XEA1 /* (DEPRECATED) 1 if old exception architecture (XEA1), 0 otherwise (eg. XEA2) */ -#define XCHAL_HAVE_EXCM XCHAL_HAVE_XEA2 /* (DEPRECATED) 1 if PS.EXCM bit exists (currently equals XCHAL_HAVE_TLBS) */ - -#define XCHAL_RESET_VECTOR_VADDR 0xFE000020 -#define XCHAL_RESET_VECTOR_PADDR 0xFE000020 -#define XCHAL_USER_VECTOR_VADDR 0xD0000220 -#define XCHAL_PROGRAMEXC_VECTOR_VADDR XCHAL_USER_VECTOR_VADDR /* for backward compatibility */ -#define XCHAL_USEREXC_VECTOR_VADDR XCHAL_USER_VECTOR_VADDR /* for backward compatibility */ -#define XCHAL_USER_VECTOR_PADDR 0x00000220 -#define XCHAL_PROGRAMEXC_VECTOR_PADDR XCHAL_USER_VECTOR_PADDR /* for backward compatibility */ -#define XCHAL_USEREXC_VECTOR_PADDR XCHAL_USER_VECTOR_PADDR /* for backward compatibility */ -#define XCHAL_KERNEL_VECTOR_VADDR 0xD0000200 -#define XCHAL_STACKEDEXC_VECTOR_VADDR XCHAL_KERNEL_VECTOR_VADDR /* for backward compatibility */ -#define XCHAL_KERNELEXC_VECTOR_VADDR XCHAL_KERNEL_VECTOR_VADDR /* for backward compatibility */ -#define XCHAL_KERNEL_VECTOR_PADDR 0x00000200 -#define XCHAL_STACKEDEXC_VECTOR_PADDR XCHAL_KERNEL_VECTOR_PADDR /* for backward compatibility */ -#define XCHAL_KERNELEXC_VECTOR_PADDR XCHAL_KERNEL_VECTOR_PADDR /* for backward compatibility */ -#define XCHAL_DOUBLEEXC_VECTOR_VADDR 0xD0000290 -#define XCHAL_DOUBLEEXC_VECTOR_PADDR 0x00000290 -#define XCHAL_WINDOW_VECTORS_VADDR 0xD0000000 -#define XCHAL_WINDOW_VECTORS_PADDR 0x00000000 -#define XCHAL_INTLEVEL2_VECTOR_VADDR 0xD0000240 -#define XCHAL_INTLEVEL2_VECTOR_PADDR 0x00000240 -#define XCHAL_INTLEVEL3_VECTOR_VADDR 0xD0000250 -#define XCHAL_INTLEVEL3_VECTOR_PADDR 0x00000250 -#define XCHAL_INTLEVEL4_VECTOR_VADDR 0xFE000520 -#define XCHAL_INTLEVEL4_VECTOR_PADDR 0xFE000520 -#define XCHAL_DEBUG_VECTOR_VADDR XCHAL_INTLEVEL4_VECTOR_VADDR -#define XCHAL_DEBUG_VECTOR_PADDR XCHAL_INTLEVEL4_VECTOR_PADDR - -/* Indexing macros: */ -#define _XCHAL_INTLEVEL_VECTOR_VADDR(n) XCHAL_INTLEVEL ## n ## _VECTOR_VADDR -#define XCHAL_INTLEVEL_VECTOR_VADDR(n) _XCHAL_INTLEVEL_VECTOR_VADDR(n) /* n = 0 .. 15 */ - -/* - * General Exception Causes - * (values of EXCCAUSE special register set by general exceptions, - * which vector to the user, kernel, or double-exception vectors): - */ -#define XCHAL_EXCCAUSE_ILLEGAL_INSTRUCTION 0 /* Illegal Instruction (IllegalInstruction) */ -#define XCHAL_EXCCAUSE_SYSTEM_CALL 1 /* System Call (SystemCall) */ -#define XCHAL_EXCCAUSE_INSTRUCTION_FETCH_ERROR 2 /* Instruction Fetch Error (InstructionFetchError) */ -#define XCHAL_EXCCAUSE_LOAD_STORE_ERROR 3 /* Load Store Error (LoadStoreError) */ -#define XCHAL_EXCCAUSE_LEVEL1_INTERRUPT 4 /* Level 1 Interrupt (Level1Interrupt) */ -#define XCHAL_EXCCAUSE_ALLOCA 5 /* Stack Extension Assist (Alloca) */ -#define XCHAL_EXCCAUSE_INTEGER_DIVIDE_BY_ZERO 6 /* Integer Divide by Zero (IntegerDivideByZero) */ -#define XCHAL_EXCCAUSE_SPECULATION 7 /* Speculation (Speculation) */ -#define XCHAL_EXCCAUSE_PRIVILEGED 8 /* Privileged Instruction (Privileged) */ -#define XCHAL_EXCCAUSE_UNALIGNED 9 /* Unaligned Load Store (Unaligned) */ -#define XCHAL_EXCCAUSE_ITLB_MISS 16 /* ITlb Miss Exception (ITlbMiss) */ -#define XCHAL_EXCCAUSE_ITLB_MULTIHIT 17 /* ITlb Mutltihit Exception (ITlbMultihit) */ -#define XCHAL_EXCCAUSE_ITLB_PRIVILEGE 18 /* ITlb Privilege Exception (ITlbPrivilege) */ -#define XCHAL_EXCCAUSE_ITLB_SIZE_RESTRICTION 19 /* ITlb Size Restriction Exception (ITlbSizeRestriction) */ -#define XCHAL_EXCCAUSE_FETCH_CACHE_ATTRIBUTE 20 /* Fetch Cache Attribute Exception (FetchCacheAttribute) */ -#define XCHAL_EXCCAUSE_DTLB_MISS 24 /* DTlb Miss Exception (DTlbMiss) */ -#define XCHAL_EXCCAUSE_DTLB_MULTIHIT 25 /* DTlb Multihit Exception (DTlbMultihit) */ -#define XCHAL_EXCCAUSE_DTLB_PRIVILEGE 26 /* DTlb Privilege Exception (DTlbPrivilege) */ -#define XCHAL_EXCCAUSE_DTLB_SIZE_RESTRICTION 27 /* DTlb Size Restriction Exception (DTlbSizeRestriction) */ -#define XCHAL_EXCCAUSE_LOAD_CACHE_ATTRIBUTE 28 /* Load Cache Attribute Exception (LoadCacheAttribute) */ -#define XCHAL_EXCCAUSE_STORE_CACHE_ATTRIBUTE 29 /* Store Cache Attribute Exception (StoreCacheAttribute) */ -#define XCHAL_EXCCAUSE_FLOATING_POINT 40 /* Floating Point Exception (FloatingPoint) */ - - - -/*---------------------------------------------------------------------- - TIMERS - ----------------------------------------------------------------------*/ - -#define XCHAL_HAVE_CCOUNT 1 /* 1 if have CCOUNT, 0 otherwise */ -/*#define XCHAL_HAVE_TIMERS XCHAL_HAVE_CCOUNT*/ -#define XCHAL_NUM_TIMERS 3 /* number of CCOMPAREn regs */ - - - -/*---------------------------------------------------------------------- - DEBUG - ----------------------------------------------------------------------*/ - -#define XCHAL_HAVE_DEBUG 1 /* 1 if debug option configured, 0 otherwise */ -#define XCHAL_HAVE_OCD 1 /* 1 if OnChipDebug option configured, 0 otherwise */ -#define XCHAL_NUM_IBREAK 2 /* number of IBREAKn regs */ -#define XCHAL_NUM_DBREAK 2 /* number of DBREAKn regs */ -#define XCHAL_DEBUGLEVEL 4 /* debug interrupt level */ -/*DebugExternalInterrupt 0 0|1*/ -/*DebugUseDIRArray 0 0|1*/ - - - - -/*---------------------------------------------------------------------- - COPROCESSORS and EXTRA STATE - ----------------------------------------------------------------------*/ - -#define XCHAL_HAVE_CP 0 /* 1 if coprocessor option configured (CPENABLE present) */ -#define XCHAL_CP_MAXCFG 0 /* max allowed cp id plus one (per cfg) */ - -#include <xtensa/config/tie.h> - - - - -/*---------------------------------------------------------------------- - INTERNAL I/D RAM/ROMs and XLMI - ----------------------------------------------------------------------*/ - -#define XCHAL_NUM_INSTROM 0 /* number of core instruction ROMs configured */ -#define XCHAL_NUM_INSTRAM 0 /* number of core instruction RAMs configured */ -#define XCHAL_NUM_DATAROM 0 /* number of core data ROMs configured */ -#define XCHAL_NUM_DATARAM 0 /* number of core data RAMs configured */ -#define XCHAL_NUM_XLMI 0 /* number of core XLMI ports configured */ -#define XCHAL_NUM_IROM XCHAL_NUM_INSTROM /* (DEPRECATED) */ -#define XCHAL_NUM_IRAM XCHAL_NUM_INSTRAM /* (DEPRECATED) */ -#define XCHAL_NUM_DROM XCHAL_NUM_DATAROM /* (DEPRECATED) */ -#define XCHAL_NUM_DRAM XCHAL_NUM_DATARAM /* (DEPRECATED) */ - - - -/*---------------------------------------------------------------------- - CACHE - ----------------------------------------------------------------------*/ - -/* Size of the cache lines in log2(bytes): */ -#define XCHAL_ICACHE_LINEWIDTH 4 -#define XCHAL_DCACHE_LINEWIDTH 4 -/* Size of the cache lines in bytes: */ -#define XCHAL_ICACHE_LINESIZE 16 -#define XCHAL_DCACHE_LINESIZE 16 -/* Max for both I-cache and D-cache (used for general alignment): */ -#define XCHAL_CACHE_LINEWIDTH_MAX 4 -#define XCHAL_CACHE_LINESIZE_MAX 16 - -/* Number of cache sets in log2(lines per way): */ -#define XCHAL_ICACHE_SETWIDTH 8 -#define XCHAL_DCACHE_SETWIDTH 8 -/* Max for both I-cache and D-cache (used for general cache-coherency page alignment): */ -#define XCHAL_CACHE_SETWIDTH_MAX 8 -#define XCHAL_CACHE_SETSIZE_MAX 256 - -/* Cache set associativity (number of ways): */ -#define XCHAL_ICACHE_WAYS 2 -#define XCHAL_DCACHE_WAYS 2 - -/* Size of the caches in bytes (ways * 2^(linewidth + setwidth)): */ -#define XCHAL_ICACHE_SIZE 8192 -#define XCHAL_DCACHE_SIZE 8192 - -/* Cache features: */ -#define XCHAL_DCACHE_IS_WRITEBACK 0 -/* Whether cache locking feature is available: */ -#define XCHAL_ICACHE_LINE_LOCKABLE 0 -#define XCHAL_DCACHE_LINE_LOCKABLE 0 - -/* Number of (encoded) cache attribute bits: */ -#define XCHAL_CA_BITS 4 /* number of bits needed to hold cache attribute encoding */ -/* (The number of access mode bits (decoded cache attribute bits) is defined by the architecture; see xtensa/hal.h?) */ - - -/* Cache Attribute encodings -- lists of access modes for each cache attribute: */ -#define XCHAL_FCA_LIST XTHAL_FAM_EXCEPTION XCHAL_SEP \ - XTHAL_FAM_BYPASS XCHAL_SEP \ - XTHAL_FAM_EXCEPTION XCHAL_SEP \ - XTHAL_FAM_BYPASS XCHAL_SEP \ - XTHAL_FAM_EXCEPTION XCHAL_SEP \ - XTHAL_FAM_CACHED XCHAL_SEP \ - XTHAL_FAM_EXCEPTION XCHAL_SEP \ - XTHAL_FAM_CACHED XCHAL_SEP \ - XTHAL_FAM_EXCEPTION XCHAL_SEP \ - XTHAL_FAM_CACHED XCHAL_SEP \ - XTHAL_FAM_EXCEPTION XCHAL_SEP \ - XTHAL_FAM_CACHED XCHAL_SEP \ - XTHAL_FAM_EXCEPTION XCHAL_SEP \ - XTHAL_FAM_EXCEPTION XCHAL_SEP \ - XTHAL_FAM_EXCEPTION XCHAL_SEP \ - XTHAL_FAM_EXCEPTION -#define XCHAL_LCA_LIST XTHAL_LAM_EXCEPTION XCHAL_SEP \ - XTHAL_LAM_BYPASSG XCHAL_SEP \ - XTHAL_LAM_EXCEPTION XCHAL_SEP \ - XTHAL_LAM_BYPASSG XCHAL_SEP \ - XTHAL_LAM_EXCEPTION XCHAL_SEP \ - XTHAL_LAM_CACHED XCHAL_SEP \ - XTHAL_LAM_EXCEPTION XCHAL_SEP \ - XTHAL_LAM_CACHED XCHAL_SEP \ - XTHAL_LAM_EXCEPTION XCHAL_SEP \ - XTHAL_LAM_NACACHED XCHAL_SEP \ - XTHAL_LAM_EXCEPTION XCHAL_SEP \ - XTHAL_LAM_NACACHED XCHAL_SEP \ - XTHAL_LAM_EXCEPTION XCHAL_SEP \ - XTHAL_LAM_ISOLATE XCHAL_SEP \ - XTHAL_LAM_EXCEPTION XCHAL_SEP \ - XTHAL_LAM_CACHED -#define XCHAL_SCA_LIST XTHAL_SAM_EXCEPTION XCHAL_SEP \ - XTHAL_SAM_EXCEPTION XCHAL_SEP \ - XTHAL_SAM_EXCEPTION XCHAL_SEP \ - XTHAL_SAM_BYPASS XCHAL_SEP \ - XTHAL_SAM_EXCEPTION XCHAL_SEP \ - XTHAL_SAM_EXCEPTION XCHAL_SEP \ - XTHAL_SAM_EXCEPTION XCHAL_SEP \ - XTHAL_SAM_WRITETHRU XCHAL_SEP \ - XTHAL_SAM_EXCEPTION XCHAL_SEP \ - XTHAL_SAM_EXCEPTION XCHAL_SEP \ - XTHAL_SAM_EXCEPTION XCHAL_SEP \ - XTHAL_SAM_WRITETHRU XCHAL_SEP \ - XTHAL_SAM_EXCEPTION XCHAL_SEP \ - XTHAL_SAM_ISOLATE XCHAL_SEP \ - XTHAL_SAM_EXCEPTION XCHAL_SEP \ - XTHAL_SAM_WRITETHRU - -/* Test: - read/only: 0 + 1 + 2 + 4 + 5 + 6 + 8 + 9 + 10 + 12 + 14 - read/only: 0 + 1 + 2 + 4 + 5 + 6 + 8 + 9 + 10 + 12 + 14 - all: 0 + 1 + 2 + 3 + 4 + 5 + 6 + 7 + 8 + 9 + 10 + 11 + 12 + 13 + 14 + 15 - fault: 0 + 2 + 4 + 6 + 8 + 10 + 12 + 14 - r/w/x cached: - r/w/x dcached: - I-bypass: 1 + 3 - - load guard bit set: 1 + 3 - load guard bit clr: 0 + 2 + 4 + 5 + 6 + 7 + 8 + 9 + 10 + 11 + 12 + 13 + 14 + 15 - hit-cache r/w/x: 7 + 11 - - fams: 5 - fams: 0 / 6 / 18 / 1 / 2 - fams: Bypass / Isolate / Cached / Exception / NACached - - MMU okay: yes -*/ - - -/*---------------------------------------------------------------------- - MMU - ----------------------------------------------------------------------*/ - -/* - * General notes on MMU parameters. - * - * Terminology: - * ASID = address-space ID (acts as an "extension" of virtual addresses) - * VPN = virtual page number - * PPN = physical page number - * CA = encoded cache attribute (access modes) - * TLB = translation look-aside buffer (term is stretched somewhat here) - * I = instruction (fetch accesses) - * D = data (load and store accesses) - * way = each TLB (ITLB and DTLB) consists of a number of "ways" - * that simultaneously match the virtual address of an access; - * a TLB successfully translates a virtual address if exactly - * one way matches the vaddr; if none match, it is a miss; - * if multiple match, one gets a "multihit" exception; - * each way can be independently configured in terms of number of - * entries, page sizes, which fields are writable or constant, etc. - * set = group of contiguous ways with exactly identical parameters - * ARF = auto-refill; hardware services a 1st-level miss by loading a PTE - * from the page table and storing it in one of the auto-refill ways; - * if this PTE load also misses, a miss exception is posted for s/w. - * min-wired = a "min-wired" way can be used to map a single (minimum-sized) - * page arbitrarily under program control; it has a single entry, - * is non-auto-refill (some other way(s) must be auto-refill), - * all its fields (VPN, PPN, ASID, CA) are all writable, and it - * supports the XCHAL_MMU_MIN_PTE_PAGE_SIZE page size (a current - * restriction is that this be the only page size it supports). - * - * TLB way entries are virtually indexed. - * TLB ways that support multiple page sizes: - * - must have all writable VPN and PPN fields; - * - can only use one page size at any given time (eg. setup at startup), - * selected by the respective ITLBCFG or DTLBCFG special register, - * whose bits n*4+3 .. n*4 index the list of page sizes for way n - * (XCHAL_xTLB_SETm_PAGESZ_LOG2_LIST for set m corresponding to way n); - * this list may be sparse for auto-refill ways because auto-refill - * ways have independent lists of supported page sizes sharing a - * common encoding with PTE entries; the encoding is the index into - * this list; unsupported sizes for a given way are zero in the list; - * selecting unsupported sizes results in undefined hardware behaviour; - * - is only possible for ways 0 thru 7 (due to ITLBCFG/DTLBCFG definition). - */ - -#define XCHAL_HAVE_CACHEATTR 0 /* 1 if CACHEATTR register present, 0 if TLBs present instead */ -#define XCHAL_HAVE_TLBS 1 /* 1 if TLBs present, 0 if CACHEATTR present instead */ -#define XCHAL_HAVE_MMU XCHAL_HAVE_TLBS /* (DEPRECATED; use XCHAL_HAVE_TLBS instead; will be removed in future release) */ -#define XCHAL_HAVE_SPANNING_WAY 0 /* 1 if single way maps entire virtual address space in I+D */ -#define XCHAL_HAVE_IDENTITY_MAP 0 /* 1 if virtual addr == physical addr always, 0 otherwise */ -#define XCHAL_HAVE_MIMIC_CACHEATTR 0 /* 1 if have MMU that mimics a CACHEATTR config (CaMMU) */ -#define XCHAL_HAVE_XLT_CACHEATTR 0 /* 1 if have MMU that mimics a CACHEATTR config, but with translation (CaXltMMU) */ - -#define XCHAL_MMU_ASID_BITS 8 /* number of bits in ASIDs (address space IDs) */ -#define XCHAL_MMU_ASID_INVALID 0 /* ASID value indicating invalid address space */ -#define XCHAL_MMU_ASID_KERNEL 1 /* ASID value indicating kernel (ring 0) address space */ -#define XCHAL_MMU_RINGS 4 /* number of rings supported (1..4) */ -#define XCHAL_MMU_RING_BITS 2 /* number of bits needed to hold ring number */ -#define XCHAL_MMU_SR_BITS 0 /* number of size-restriction bits supported */ -#define XCHAL_MMU_CA_BITS 4 /* number of bits needed to hold cache attribute encoding */ -#define XCHAL_MMU_MAX_PTE_PAGE_SIZE 12 /* max page size in a PTE structure (log2) */ -#define XCHAL_MMU_MIN_PTE_PAGE_SIZE 12 /* min page size in a PTE structure (log2) */ - - -/*** Instruction TLB: ***/ - -#define XCHAL_ITLB_WAY_BITS 3 /* number of bits holding the ways */ -#define XCHAL_ITLB_WAYS 7 /* number of ways (n-way set-associative TLB) */ -#define XCHAL_ITLB_ARF_WAYS 4 /* number of auto-refill ways */ -#define XCHAL_ITLB_SETS 4 /* number of sets (groups of ways with identical settings) */ - -/* Way set to which each way belongs: */ -#define XCHAL_ITLB_WAY0_SET 0 -#define XCHAL_ITLB_WAY1_SET 0 -#define XCHAL_ITLB_WAY2_SET 0 -#define XCHAL_ITLB_WAY3_SET 0 -#define XCHAL_ITLB_WAY4_SET 1 -#define XCHAL_ITLB_WAY5_SET 2 -#define XCHAL_ITLB_WAY6_SET 3 - -/* Ways sets that are used by hardware auto-refill (ARF): */ -#define XCHAL_ITLB_ARF_SETS 1 /* number of auto-refill sets */ -#define XCHAL_ITLB_ARF_SET0 0 /* index of n'th auto-refill set */ - -/* Way sets that are "min-wired" (see terminology comment above): */ -#define XCHAL_ITLB_MINWIRED_SETS 0 /* number of "min-wired" sets */ - - -/* ITLB way set 0 (group of ways 0 thru 3): */ -#define XCHAL_ITLB_SET0_WAY 0 /* index of first way in this way set */ -#define XCHAL_ITLB_SET0_WAYS 4 /* number of (contiguous) ways in this way set */ -#define XCHAL_ITLB_SET0_ENTRIES_LOG2 2 /* log2(number of entries in this way) */ -#define XCHAL_ITLB_SET0_ENTRIES 4 /* number of entries in this way (always a power of 2) */ -#define XCHAL_ITLB_SET0_ARF 1 /* 1=autorefill by h/w, 0=non-autorefill (wired/constant/static) */ -#define XCHAL_ITLB_SET0_PAGESIZES 1 /* number of supported page sizes in this way */ -#define XCHAL_ITLB_SET0_PAGESZ_BITS 0 /* number of bits to encode the page size */ -#define XCHAL_ITLB_SET0_PAGESZ_LOG2_MIN 12 /* log2(minimum supported page size) */ -#define XCHAL_ITLB_SET0_PAGESZ_LOG2_MAX 12 /* log2(maximum supported page size) */ -#define XCHAL_ITLB_SET0_PAGESZ_LOG2_LIST 12 /* list of log2(page size)s, separated by XCHAL_SEP; - 2^PAGESZ_BITS entries in list, unsupported entries are zero */ -#define XCHAL_ITLB_SET0_ASID_CONSTMASK 0 /* constant ASID bits; 0 if all writable */ -#define XCHAL_ITLB_SET0_VPN_CONSTMASK 0 /* constant VPN bits, not including entry index bits; 0 if all writable */ -#define XCHAL_ITLB_SET0_PPN_CONSTMASK 0 /* constant PPN bits, including entry index bits; 0 if all writable */ -#define XCHAL_ITLB_SET0_CA_CONSTMASK 0 /* constant CA bits; 0 if all writable */ -#define XCHAL_ITLB_SET0_ASID_RESET 0 /* 1 if ASID reset values defined (and all writable); 0 otherwise */ -#define XCHAL_ITLB_SET0_VPN_RESET 0 /* 1 if VPN reset values defined (and all writable); 0 otherwise */ -#define XCHAL_ITLB_SET0_PPN_RESET 0 /* 1 if PPN reset values defined (and all writable); 0 otherwise */ -#define XCHAL_ITLB_SET0_CA_RESET 0 /* 1 if CA reset values defined (and all writable); 0 otherwise */ - -/* ITLB way set 1 (group of ways 4 thru 4): */ -#define XCHAL_ITLB_SET1_WAY 4 /* index of first way in this way set */ -#define XCHAL_ITLB_SET1_WAYS 1 /* number of (contiguous) ways in this way set */ -#define XCHAL_ITLB_SET1_ENTRIES_LOG2 2 /* log2(number of entries in this way) */ -#define XCHAL_ITLB_SET1_ENTRIES 4 /* number of entries in this way (always a power of 2) */ -#define XCHAL_ITLB_SET1_ARF 0 /* 1=autorefill by h/w, 0=non-autorefill (wired/constant/static) */ -#define XCHAL_ITLB_SET1_PAGESIZES 4 /* number of supported page sizes in this way */ -#define XCHAL_ITLB_SET1_PAGESZ_BITS 2 /* number of bits to encode the page size */ -#define XCHAL_ITLB_SET1_PAGESZ_LOG2_MIN 20 /* log2(minimum supported page size) */ -#define XCHAL_ITLB_SET1_PAGESZ_LOG2_MAX 26 /* log2(maximum supported page size) */ -#define XCHAL_ITLB_SET1_PAGESZ_LOG2_LIST 20 XCHAL_SEP 22 XCHAL_SEP 24 XCHAL_SEP 26 /* list of log2(page size)s, separated by XCHAL_SEP; - 2^PAGESZ_BITS entries in list, unsupported entries are zero */ -#define XCHAL_ITLB_SET1_ASID_CONSTMASK 0 /* constant ASID bits; 0 if all writable */ -#define XCHAL_ITLB_SET1_VPN_CONSTMASK 0 /* constant VPN bits, not including entry index bits; 0 if all writable */ -#define XCHAL_ITLB_SET1_PPN_CONSTMASK 0 /* constant PPN bits, including entry index bits; 0 if all writable */ -#define XCHAL_ITLB_SET1_CA_CONSTMASK 0 /* constant CA bits; 0 if all writable */ -#define XCHAL_ITLB_SET1_ASID_RESET 0 /* 1 if ASID reset values defined (and all writable); 0 otherwise */ -#define XCHAL_ITLB_SET1_VPN_RESET 0 /* 1 if VPN reset values defined (and all writable); 0 otherwise */ -#define XCHAL_ITLB_SET1_PPN_RESET 0 /* 1 if PPN reset values defined (and all writable); 0 otherwise */ -#define XCHAL_ITLB_SET1_CA_RESET 0 /* 1 if CA reset values defined (and all writable); 0 otherwise */ - -/* ITLB way set 2 (group of ways 5 thru 5): */ -#define XCHAL_ITLB_SET2_WAY 5 /* index of first way in this way set */ -#define XCHAL_ITLB_SET2_WAYS 1 /* number of (contiguous) ways in this way set */ -#define XCHAL_ITLB_SET2_ENTRIES_LOG2 1 /* log2(number of entries in this way) */ -#define XCHAL_ITLB_SET2_ENTRIES 2 /* number of entries in this way (always a power of 2) */ -#define XCHAL_ITLB_SET2_ARF 0 /* 1=autorefill by h/w, 0=non-autorefill (wired/constant/static) */ -#define XCHAL_ITLB_SET2_PAGESIZES 1 /* number of supported page sizes in this way */ -#define XCHAL_ITLB_SET2_PAGESZ_BITS 0 /* number of bits to encode the page size */ -#define XCHAL_ITLB_SET2_PAGESZ_LOG2_MIN 27 /* log2(minimum supported page size) */ -#define XCHAL_ITLB_SET2_PAGESZ_LOG2_MAX 27 /* log2(maximum supported page size) */ -#define XCHAL_ITLB_SET2_PAGESZ_LOG2_LIST 27 /* list of log2(page size)s, separated by XCHAL_SEP; - 2^PAGESZ_BITS entries in list, unsupported entries are zero */ -#define XCHAL_ITLB_SET2_ASID_CONSTMASK 0xFF /* constant ASID bits; 0 if all writable */ -#define XCHAL_ITLB_SET2_VPN_CONSTMASK 0xF0000000 /* constant VPN bits, not including entry index bits; 0 if all writable */ -#define XCHAL_ITLB_SET2_PPN_CONSTMASK 0xF8000000 /* constant PPN bits, including entry index bits; 0 if all writable */ -#define XCHAL_ITLB_SET2_CA_CONSTMASK 0x0000000F /* constant CA bits; 0 if all writable */ -#define XCHAL_ITLB_SET2_ASID_RESET 0 /* 1 if ASID reset values defined (and all writable); 0 otherwise */ -#define XCHAL_ITLB_SET2_VPN_RESET 0 /* 1 if VPN reset values defined (and all writable); 0 otherwise */ -#define XCHAL_ITLB_SET2_PPN_RESET 0 /* 1 if PPN reset values defined (and all writable); 0 otherwise */ -#define XCHAL_ITLB_SET2_CA_RESET 0 /* 1 if CA reset values defined (and all writable); 0 otherwise */ -/* Constant ASID values for each entry of ITLB way set 2 (because ASID_CONSTMASK is non-zero): */ -#define XCHAL_ITLB_SET2_E0_ASID_CONST 0x01 -#define XCHAL_ITLB_SET2_E1_ASID_CONST 0x01 -/* Constant VPN values for each entry of ITLB way set 2 (because VPN_CONSTMASK is non-zero): */ -#define XCHAL_ITLB_SET2_E0_VPN_CONST 0xD0000000 -#define XCHAL_ITLB_SET2_E1_VPN_CONST 0xD8000000 -/* Constant PPN values for each entry of ITLB way set 2 (because PPN_CONSTMASK is non-zero): */ -#define XCHAL_ITLB_SET2_E0_PPN_CONST 0x00000000 -#define XCHAL_ITLB_SET2_E1_PPN_CONST 0x00000000 -/* Constant CA values for each entry of ITLB way set 2 (because CA_CONSTMASK is non-zero): */ -#define XCHAL_ITLB_SET2_E0_CA_CONST 0x07 -#define XCHAL_ITLB_SET2_E1_CA_CONST 0x03 - -/* ITLB way set 3 (group of ways 6 thru 6): */ -#define XCHAL_ITLB_SET3_WAY 6 /* index of first way in this way set */ -#define XCHAL_ITLB_SET3_WAYS 1 /* number of (contiguous) ways in this way set */ -#define XCHAL_ITLB_SET3_ENTRIES_LOG2 1 /* log2(number of entries in this way) */ -#define XCHAL_ITLB_SET3_ENTRIES 2 /* number of entries in this way (always a power of 2) */ -#define XCHAL_ITLB_SET3_ARF 0 /* 1=autorefill by h/w, 0=non-autorefill (wired/constant/static) */ -#define XCHAL_ITLB_SET3_PAGESIZES 1 /* number of supported page sizes in this way */ -#define XCHAL_ITLB_SET3_PAGESZ_BITS 0 /* number of bits to encode the page size */ -#define XCHAL_ITLB_SET3_PAGESZ_LOG2_MIN 28 /* log2(minimum supported page size) */ -#define XCHAL_ITLB_SET3_PAGESZ_LOG2_MAX 28 /* log2(maximum supported page size) */ -#define XCHAL_ITLB_SET3_PAGESZ_LOG2_LIST 28 /* list of log2(page size)s, separated by XCHAL_SEP; - 2^PAGESZ_BITS entries in list, unsupported entries are zero */ -#define XCHAL_ITLB_SET3_ASID_CONSTMASK 0xFF /* constant ASID bits; 0 if all writable */ -#define XCHAL_ITLB_SET3_VPN_CONSTMASK 0xE0000000 /* constant VPN bits, not including entry index bits; 0 if all writable */ -#define XCHAL_ITLB_SET3_PPN_CONSTMASK 0xF0000000 /* constant PPN bits, including entry index bits; 0 if all writable */ -#define XCHAL_ITLB_SET3_CA_CONSTMASK 0x0000000F /* constant CA bits; 0 if all writable */ -#define XCHAL_ITLB_SET3_ASID_RESET 0 /* 1 if ASID reset values defined (and all writable); 0 otherwise */ -#define XCHAL_ITLB_SET3_VPN_RESET 0 /* 1 if VPN reset values defined (and all writable); 0 otherwise */ -#define XCHAL_ITLB_SET3_PPN_RESET 0 /* 1 if PPN reset values defined (and all writable); 0 otherwise */ -#define XCHAL_ITLB_SET3_CA_RESET 0 /* 1 if CA reset values defined (and all writable); 0 otherwise */ -/* Constant ASID values for each entry of ITLB way set 3 (because ASID_CONSTMASK is non-zero): */ -#define XCHAL_ITLB_SET3_E0_ASID_CONST 0x01 -#define XCHAL_ITLB_SET3_E1_ASID_CONST 0x01 -/* Constant VPN values for each entry of ITLB way set 3 (because VPN_CONSTMASK is non-zero): */ -#define XCHAL_ITLB_SET3_E0_VPN_CONST 0xE0000000 -#define XCHAL_ITLB_SET3_E1_VPN_CONST 0xF0000000 -/* Constant PPN values for each entry of ITLB way set 3 (because PPN_CONSTMASK is non-zero): */ -#define XCHAL_ITLB_SET3_E0_PPN_CONST 0xF0000000 -#define XCHAL_ITLB_SET3_E1_PPN_CONST 0xF0000000 -/* Constant CA values for each entry of ITLB way set 3 (because CA_CONSTMASK is non-zero): */ -#define XCHAL_ITLB_SET3_E0_CA_CONST 0x07 -#define XCHAL_ITLB_SET3_E1_CA_CONST 0x03 - -/* Indexing macros: */ -#define _XCHAL_ITLB_SET(n,_what) XCHAL_ITLB_SET ## n ## _what -#define XCHAL_ITLB_SET(n,what) _XCHAL_ITLB_SET(n, _ ## what ) -#define _XCHAL_ITLB_SET_E(n,i,_what) XCHAL_ITLB_SET ## n ## _E ## i ## _what -#define XCHAL_ITLB_SET_E(n,i,what) _XCHAL_ITLB_SET_E(n,i, _ ## what ) -/* - * Example use: XCHAL_ITLB_SET(XCHAL_ITLB_ARF_SET0,ENTRIES) - * to get the value of XCHAL_ITLB_SET<n>_ENTRIES where <n> is the first auto-refill set. - */ - - -/*** Data TLB: ***/ - -#define XCHAL_DTLB_WAY_BITS 4 /* number of bits holding the ways */ -#define XCHAL_DTLB_WAYS 10 /* number of ways (n-way set-associative TLB) */ -#define XCHAL_DTLB_ARF_WAYS 4 /* number of auto-refill ways */ -#define XCHAL_DTLB_SETS 5 /* number of sets (groups of ways with identical settings) */ - -/* Way set to which each way belongs: */ -#define XCHAL_DTLB_WAY0_SET 0 -#define XCHAL_DTLB_WAY1_SET 0 -#define XCHAL_DTLB_WAY2_SET 0 -#define XCHAL_DTLB_WAY3_SET 0 -#define XCHAL_DTLB_WAY4_SET 1 -#define XCHAL_DTLB_WAY5_SET 2 -#define XCHAL_DTLB_WAY6_SET 3 -#define XCHAL_DTLB_WAY7_SET 4 -#define XCHAL_DTLB_WAY8_SET 4 -#define XCHAL_DTLB_WAY9_SET 4 - -/* Ways sets that are used by hardware auto-refill (ARF): */ -#define XCHAL_DTLB_ARF_SETS 1 /* number of auto-refill sets */ -#define XCHAL_DTLB_ARF_SET0 0 /* index of n'th auto-refill set */ - -/* Way sets that are "min-wired" (see terminology comment above): */ -#define XCHAL_DTLB_MINWIRED_SETS 1 /* number of "min-wired" sets */ -#define XCHAL_DTLB_MINWIRED_SET0 4 /* index of n'th "min-wired" set */ - - -/* DTLB way set 0 (group of ways 0 thru 3): */ -#define XCHAL_DTLB_SET0_WAY 0 /* index of first way in this way set */ -#define XCHAL_DTLB_SET0_WAYS 4 /* number of (contiguous) ways in this way set */ -#define XCHAL_DTLB_SET0_ENTRIES_LOG2 2 /* log2(number of entries in this way) */ -#define XCHAL_DTLB_SET0_ENTRIES 4 /* number of entries in this way (always a power of 2) */ -#define XCHAL_DTLB_SET0_ARF 1 /* 1=autorefill by h/w, 0=non-autorefill (wired/constant/static) */ -#define XCHAL_DTLB_SET0_PAGESIZES 1 /* number of supported page sizes in this way */ -#define XCHAL_DTLB_SET0_PAGESZ_BITS 0 /* number of bits to encode the page size */ -#define XCHAL_DTLB_SET0_PAGESZ_LOG2_MIN 12 /* log2(minimum supported page size) */ -#define XCHAL_DTLB_SET0_PAGESZ_LOG2_MAX 12 /* log2(maximum supported page size) */ -#define XCHAL_DTLB_SET0_PAGESZ_LOG2_LIST 12 /* list of log2(page size)s, separated by XCHAL_SEP; - 2^PAGESZ_BITS entries in list, unsupported entries are zero */ -#define XCHAL_DTLB_SET0_ASID_CONSTMASK 0 /* constant ASID bits; 0 if all writable */ -#define XCHAL_DTLB_SET0_VPN_CONSTMASK 0 /* constant VPN bits, not including entry index bits; 0 if all writable */ -#define XCHAL_DTLB_SET0_PPN_CONSTMASK 0 /* constant PPN bits, including entry index bits; 0 if all writable */ -#define XCHAL_DTLB_SET0_CA_CONSTMASK 0 /* constant CA bits; 0 if all writable */ -#define XCHAL_DTLB_SET0_ASID_RESET 0 /* 1 if ASID reset values defined (and all writable); 0 otherwise */ -#define XCHAL_DTLB_SET0_VPN_RESET 0 /* 1 if VPN reset values defined (and all writable); 0 otherwise */ -#define XCHAL_DTLB_SET0_PPN_RESET 0 /* 1 if PPN reset values defined (and all writable); 0 otherwise */ -#define XCHAL_DTLB_SET0_CA_RESET 0 /* 1 if CA reset values defined (and all writable); 0 otherwise */ - -/* DTLB way set 1 (group of ways 4 thru 4): */ -#define XCHAL_DTLB_SET1_WAY 4 /* index of first way in this way set */ -#define XCHAL_DTLB_SET1_WAYS 1 /* number of (contiguous) ways in this way set */ -#define XCHAL_DTLB_SET1_ENTRIES_LOG2 2 /* log2(number of entries in this way) */ -#define XCHAL_DTLB_SET1_ENTRIES 4 /* number of entries in this way (always a power of 2) */ -#define XCHAL_DTLB_SET1_ARF 0 /* 1=autorefill by h/w, 0=non-autorefill (wired/constant/static) */ -#define XCHAL_DTLB_SET1_PAGESIZES 4 /* number of supported page sizes in this way */ -#define XCHAL_DTLB_SET1_PAGESZ_BITS 2 /* number of bits to encode the page size */ -#define XCHAL_DTLB_SET1_PAGESZ_LOG2_MIN 20 /* log2(minimum supported page size) */ -#define XCHAL_DTLB_SET1_PAGESZ_LOG2_MAX 26 /* log2(maximum supported page size) */ -#define XCHAL_DTLB_SET1_PAGESZ_LOG2_LIST 20 XCHAL_SEP 22 XCHAL_SEP 24 XCHAL_SEP 26 /* list of log2(page size)s, separated by XCHAL_SEP; - 2^PAGESZ_BITS entries in list, unsupported entries are zero */ -#define XCHAL_DTLB_SET1_ASID_CONSTMASK 0 /* constant ASID bits; 0 if all writable */ -#define XCHAL_DTLB_SET1_VPN_CONSTMASK 0 /* constant VPN bits, not including entry index bits; 0 if all writable */ -#define XCHAL_DTLB_SET1_PPN_CONSTMASK 0 /* constant PPN bits, including entry index bits; 0 if all writable */ -#define XCHAL_DTLB_SET1_CA_CONSTMASK 0 /* constant CA bits; 0 if all writable */ -#define XCHAL_DTLB_SET1_ASID_RESET 0 /* 1 if ASID reset values defined (and all writable); 0 otherwise */ -#define XCHAL_DTLB_SET1_VPN_RESET 0 /* 1 if VPN reset values defined (and all writable); 0 otherwise */ -#define XCHAL_DTLB_SET1_PPN_RESET 0 /* 1 if PPN reset values defined (and all writable); 0 otherwise */ -#define XCHAL_DTLB_SET1_CA_RESET 0 /* 1 if CA reset values defined (and all writable); 0 otherwise */ - -/* DTLB way set 2 (group of ways 5 thru 5): */ -#define XCHAL_DTLB_SET2_WAY 5 /* index of first way in this way set */ -#define XCHAL_DTLB_SET2_WAYS 1 /* number of (contiguous) ways in this way set */ -#define XCHAL_DTLB_SET2_ENTRIES_LOG2 1 /* log2(number of entries in this way) */ -#define XCHAL_DTLB_SET2_ENTRIES 2 /* number of entries in this way (always a power of 2) */ -#define XCHAL_DTLB_SET2_ARF 0 /* 1=autorefill by h/w, 0=non-autorefill (wired/constant/static) */ -#define XCHAL_DTLB_SET2_PAGESIZES 1 /* number of supported page sizes in this way */ -#define XCHAL_DTLB_SET2_PAGESZ_BITS 0 /* number of bits to encode the page size */ -#define XCHAL_DTLB_SET2_PAGESZ_LOG2_MIN 27 /* log2(minimum supported page size) */ -#define XCHAL_DTLB_SET2_PAGESZ_LOG2_MAX 27 /* log2(maximum supported page size) */ -#define XCHAL_DTLB_SET2_PAGESZ_LOG2_LIST 27 /* list of log2(page size)s, separated by XCHAL_SEP; - 2^PAGESZ_BITS entries in list, unsupported entries are zero */ -#define XCHAL_DTLB_SET2_ASID_CONSTMASK 0xFF /* constant ASID bits; 0 if all writable */ -#define XCHAL_DTLB_SET2_VPN_CONSTMASK 0xF0000000 /* constant VPN bits, not including entry index bits; 0 if all writable */ -#define XCHAL_DTLB_SET2_PPN_CONSTMASK 0xF8000000 /* constant PPN bits, including entry index bits; 0 if all writable */ -#define XCHAL_DTLB_SET2_CA_CONSTMASK 0x0000000F /* constant CA bits; 0 if all writable */ -#define XCHAL_DTLB_SET2_ASID_RESET 0 /* 1 if ASID reset values defined (and all writable); 0 otherwise */ -#define XCHAL_DTLB_SET2_VPN_RESET 0 /* 1 if VPN reset values defined (and all writable); 0 otherwise */ -#define XCHAL_DTLB_SET2_PPN_RESET 0 /* 1 if PPN reset values defined (and all writable); 0 otherwise */ -#define XCHAL_DTLB_SET2_CA_RESET 0 /* 1 if CA reset values defined (and all writable); 0 otherwise */ -/* Constant ASID values for each entry of DTLB way set 2 (because ASID_CONSTMASK is non-zero): */ -#define XCHAL_DTLB_SET2_E0_ASID_CONST 0x01 -#define XCHAL_DTLB_SET2_E1_ASID_CONST 0x01 -/* Constant VPN values for each entry of DTLB way set 2 (because VPN_CONSTMASK is non-zero): */ -#define XCHAL_DTLB_SET2_E0_VPN_CONST 0xD0000000 -#define XCHAL_DTLB_SET2_E1_VPN_CONST 0xD8000000 -/* Constant PPN values for each entry of DTLB way set 2 (because PPN_CONSTMASK is non-zero): */ -#define XCHAL_DTLB_SET2_E0_PPN_CONST 0x00000000 -#define XCHAL_DTLB_SET2_E1_PPN_CONST 0x00000000 -/* Constant CA values for each entry of DTLB way set 2 (because CA_CONSTMASK is non-zero): */ -#define XCHAL_DTLB_SET2_E0_CA_CONST 0x07 -#define XCHAL_DTLB_SET2_E1_CA_CONST 0x03 - -/* DTLB way set 3 (group of ways 6 thru 6): */ -#define XCHAL_DTLB_SET3_WAY 6 /* index of first way in this way set */ -#define XCHAL_DTLB_SET3_WAYS 1 /* number of (contiguous) ways in this way set */ -#define XCHAL_DTLB_SET3_ENTRIES_LOG2 1 /* log2(number of entries in this way) */ -#define XCHAL_DTLB_SET3_ENTRIES 2 /* number of entries in this way (always a power of 2) */ -#define XCHAL_DTLB_SET3_ARF 0 /* 1=autorefill by h/w, 0=non-autorefill (wired/constant/static) */ -#define XCHAL_DTLB_SET3_PAGESIZES 1 /* number of supported page sizes in this way */ -#define XCHAL_DTLB_SET3_PAGESZ_BITS 0 /* number of bits to encode the page size */ -#define XCHAL_DTLB_SET3_PAGESZ_LOG2_MIN 28 /* log2(minimum supported page size) */ -#define XCHAL_DTLB_SET3_PAGESZ_LOG2_MAX 28 /* log2(maximum supported page size) */ -#define XCHAL_DTLB_SET3_PAGESZ_LOG2_LIST 28 /* list of log2(page size)s, separated by XCHAL_SEP; - 2^PAGESZ_BITS entries in list, unsupported entries are zero */ -#define XCHAL_DTLB_SET3_ASID_CONSTMASK 0xFF /* constant ASID bits; 0 if all writable */ -#define XCHAL_DTLB_SET3_VPN_CONSTMASK 0xE0000000 /* constant VPN bits, not including entry index bits; 0 if all writable */ -#define XCHAL_DTLB_SET3_PPN_CONSTMASK 0xF0000000 /* constant PPN bits, including entry index bits; 0 if all writable */ -#define XCHAL_DTLB_SET3_CA_CONSTMASK 0x0000000F /* constant CA bits; 0 if all writable */ -#define XCHAL_DTLB_SET3_ASID_RESET 0 /* 1 if ASID reset values defined (and all writable); 0 otherwise */ -#define XCHAL_DTLB_SET3_VPN_RESET 0 /* 1 if VPN reset values defined (and all writable); 0 otherwise */ -#define XCHAL_DTLB_SET3_PPN_RESET 0 /* 1 if PPN reset values defined (and all writable); 0 otherwise */ -#define XCHAL_DTLB_SET3_CA_RESET 0 /* 1 if CA reset values defined (and all writable); 0 otherwise */ -/* Constant ASID values for each entry of DTLB way set 3 (because ASID_CONSTMASK is non-zero): */ -#define XCHAL_DTLB_SET3_E0_ASID_CONST 0x01 -#define XCHAL_DTLB_SET3_E1_ASID_CONST 0x01 -/* Constant VPN values for each entry of DTLB way set 3 (because VPN_CONSTMASK is non-zero): */ -#define XCHAL_DTLB_SET3_E0_VPN_CONST 0xE0000000 -#define XCHAL_DTLB_SET3_E1_VPN_CONST 0xF0000000 -/* Constant PPN values for each entry of DTLB way set 3 (because PPN_CONSTMASK is non-zero): */ -#define XCHAL_DTLB_SET3_E0_PPN_CONST 0xF0000000 -#define XCHAL_DTLB_SET3_E1_PPN_CONST 0xF0000000 -/* Constant CA values for each entry of DTLB way set 3 (because CA_CONSTMASK is non-zero): */ -#define XCHAL_DTLB_SET3_E0_CA_CONST 0x07 -#define XCHAL_DTLB_SET3_E1_CA_CONST 0x03 - -/* DTLB way set 4 (group of ways 7 thru 9): */ -#define XCHAL_DTLB_SET4_WAY 7 /* index of first way in this way set */ -#define XCHAL_DTLB_SET4_WAYS 3 /* number of (contiguous) ways in this way set */ -#define XCHAL_DTLB_SET4_ENTRIES_LOG2 0 /* log2(number of entries in this way) */ -#define XCHAL_DTLB_SET4_ENTRIES 1 /* number of entries in this way (always a power of 2) */ -#define XCHAL_DTLB_SET4_ARF 0 /* 1=autorefill by h/w, 0=non-autorefill (wired/constant/static) */ -#define XCHAL_DTLB_SET4_PAGESIZES 1 /* number of supported page sizes in this way */ -#define XCHAL_DTLB_SET4_PAGESZ_BITS 0 /* number of bits to encode the page size */ -#define XCHAL_DTLB_SET4_PAGESZ_LOG2_MIN 12 /* log2(minimum supported page size) */ -#define XCHAL_DTLB_SET4_PAGESZ_LOG2_MAX 12 /* log2(maximum supported page size) */ -#define XCHAL_DTLB_SET4_PAGESZ_LOG2_LIST 12 /* list of log2(page size)s, separated by XCHAL_SEP; - 2^PAGESZ_BITS entries in list, unsupported entries are zero */ -#define XCHAL_DTLB_SET4_ASID_CONSTMASK 0 /* constant ASID bits; 0 if all writable */ -#define XCHAL_DTLB_SET4_VPN_CONSTMASK 0 /* constant VPN bits, not including entry index bits; 0 if all writable */ -#define XCHAL_DTLB_SET4_PPN_CONSTMASK 0 /* constant PPN bits, including entry index bits; 0 if all writable */ -#define XCHAL_DTLB_SET4_CA_CONSTMASK 0 /* constant CA bits; 0 if all writable */ -#define XCHAL_DTLB_SET4_ASID_RESET 0 /* 1 if ASID reset values defined (and all writable); 0 otherwise */ -#define XCHAL_DTLB_SET4_VPN_RESET 0 /* 1 if VPN reset values defined (and all writable); 0 otherwise */ -#define XCHAL_DTLB_SET4_PPN_RESET 0 /* 1 if PPN reset values defined (and all writable); 0 otherwise */ -#define XCHAL_DTLB_SET4_CA_RESET 0 /* 1 if CA reset values defined (and all writable); 0 otherwise */ - -/* Indexing macros: */ -#define _XCHAL_DTLB_SET(n,_what) XCHAL_DTLB_SET ## n ## _what -#define XCHAL_DTLB_SET(n,what) _XCHAL_DTLB_SET(n, _ ## what ) -#define _XCHAL_DTLB_SET_E(n,i,_what) XCHAL_DTLB_SET ## n ## _E ## i ## _what -#define XCHAL_DTLB_SET_E(n,i,what) _XCHAL_DTLB_SET_E(n,i, _ ## what ) -/* - * Example use: XCHAL_DTLB_SET(XCHAL_DTLB_ARF_SET0,ENTRIES) - * to get the value of XCHAL_DTLB_SET<n>_ENTRIES where <n> is the first auto-refill set. - */ - - -/* - * Determine whether we have a full MMU (with Page Table and Protection) - * usable for an MMU-based OS: - */ -#if XCHAL_HAVE_TLBS && !XCHAL_HAVE_SPANNING_WAY && XCHAL_ITLB_ARF_WAYS > 0 && XCHAL_DTLB_ARF_WAYS > 0 && XCHAL_MMU_RINGS >= 2 -# define XCHAL_HAVE_PTP_MMU 1 /* have full MMU (with page table [autorefill] and protection) */ -#else -# define XCHAL_HAVE_PTP_MMU 0 /* don't have full MMU */ -#endif - -/* - * For full MMUs, report kernel RAM segment and kernel I/O segment static page mappings: - */ -#if XCHAL_HAVE_PTP_MMU -#define XCHAL_KSEG_CACHED_VADDR 0xD0000000 /* virt.addr of kernel RAM cached static map */ -#define XCHAL_KSEG_CACHED_PADDR 0x00000000 /* phys.addr of kseg_cached */ -#define XCHAL_KSEG_CACHED_SIZE 0x08000000 /* size in bytes of kseg_cached (assumed power of 2!!!) */ -#define XCHAL_KSEG_BYPASS_VADDR 0xD8000000 /* virt.addr of kernel RAM bypass (uncached) static map */ -#define XCHAL_KSEG_BYPASS_PADDR 0x00000000 /* phys.addr of kseg_bypass */ -#define XCHAL_KSEG_BYPASS_SIZE 0x08000000 /* size in bytes of kseg_bypass (assumed power of 2!!!) */ - -#define XCHAL_KIO_CACHED_VADDR 0xE0000000 /* virt.addr of kernel I/O cached static map */ -#define XCHAL_KIO_CACHED_PADDR 0xF0000000 /* phys.addr of kio_cached */ -#define XCHAL_KIO_CACHED_SIZE 0x10000000 /* size in bytes of kio_cached (assumed power of 2!!!) */ -#define XCHAL_KIO_BYPASS_VADDR 0xF0000000 /* virt.addr of kernel I/O bypass (uncached) static map */ -#define XCHAL_KIO_BYPASS_PADDR 0xF0000000 /* phys.addr of kio_bypass */ -#define XCHAL_KIO_BYPASS_SIZE 0x10000000 /* size in bytes of kio_bypass (assumed power of 2!!!) */ - -#define XCHAL_SEG_MAPPABLE_VADDR 0x00000000 /* start of largest non-static-mapped virtual addr area */ -#define XCHAL_SEG_MAPPABLE_SIZE 0xD0000000 /* size in bytes of " */ -/* define XCHAL_SEG_MAPPABLE2_xxx if more areas present, sorted in order of descending size. */ -#endif - - -/*---------------------------------------------------------------------- - MISC - ----------------------------------------------------------------------*/ - -#define XCHAL_NUM_WRITEBUFFER_ENTRIES 4 /* number of write buffer entries */ - -#define XCHAL_CORE_ID "linux_be" /* configuration's alphanumeric core identifier - (CoreID) set in the Xtensa Processor Generator */ - -#define XCHAL_BUILD_UNIQUE_ID 0x00003256 /* software build-unique ID (22-bit) */ - -/* These definitions describe the hardware targeted by this software: */ -#define XCHAL_HW_CONFIGID0 0xC103D1FF /* config ID reg 0 value (upper 32 of 64 bits) */ -#define XCHAL_HW_CONFIGID1 0x00803256 /* config ID reg 1 value (lower 32 of 64 bits) */ -#define XCHAL_CONFIGID0 XCHAL_HW_CONFIGID0 /* for backward compatibility only -- don't use! */ -#define XCHAL_CONFIGID1 XCHAL_HW_CONFIGID1 /* for backward compatibility only -- don't use! */ -#define XCHAL_HW_RELEASE_MAJOR 1050 /* major release of targeted hardware */ -#define XCHAL_HW_RELEASE_MINOR 1 /* minor release of targeted hardware */ -#define XCHAL_HW_RELEASE_NAME "T1050.1" /* full release name of targeted hardware */ -#define XTHAL_HW_REL_T1050 1 -#define XTHAL_HW_REL_T1050_1 1 -#define XCHAL_HW_CONFIGID_RELIABLE 1 - - -/* - * Miscellaneous special register fields: - */ - - -/* DBREAKC (special register number 160): */ -#define XCHAL_DBREAKC_VALIDMASK 0xC000003F /* bits of DBREAKC that are defined */ -/* MASK field: */ -#define XCHAL_DBREAKC_MASK_BITS 6 /* number of bits in MASK field */ -#define XCHAL_DBREAKC_MASK_NUM 64 /* max number of possible causes (2^bits) */ -#define XCHAL_DBREAKC_MASK_SHIFT 0 /* position of MASK bits in DBREAKC, starting from lsbit */ -#define XCHAL_DBREAKC_MASK_MASK 0x0000003F /* mask of bits in MASK field of DBREAKC */ -/* LOADBREAK field: */ -#define XCHAL_DBREAKC_LOADBREAK_BITS 1 /* number of bits in LOADBREAK field */ -#define XCHAL_DBREAKC_LOADBREAK_NUM 2 /* max number of possible causes (2^bits) */ -#define XCHAL_DBREAKC_LOADBREAK_SHIFT 30 /* position of LOADBREAK bits in DBREAKC, starting from lsbit */ -#define XCHAL_DBREAKC_LOADBREAK_MASK 0x40000000 /* mask of bits in LOADBREAK field of DBREAKC */ -/* STOREBREAK field: */ -#define XCHAL_DBREAKC_STOREBREAK_BITS 1 /* number of bits in STOREBREAK field */ -#define XCHAL_DBREAKC_STOREBREAK_NUM 2 /* max number of possible causes (2^bits) */ -#define XCHAL_DBREAKC_STOREBREAK_SHIFT 31 /* position of STOREBREAK bits in DBREAKC, starting from lsbit */ -#define XCHAL_DBREAKC_STOREBREAK_MASK 0x80000000 /* mask of bits in STOREBREAK field of DBREAKC */ - -/* PS (special register number 230): */ -#define XCHAL_PS_VALIDMASK 0x00070FFF /* bits of PS that are defined */ -/* INTLEVEL field: */ -#define XCHAL_PS_INTLEVEL_BITS 4 /* number of bits in INTLEVEL field */ -#define XCHAL_PS_INTLEVEL_NUM 16 /* max number of possible causes (2^bits) */ -#define XCHAL_PS_INTLEVEL_SHIFT 0 /* position of INTLEVEL bits in PS, starting from lsbit */ -#define XCHAL_PS_INTLEVEL_MASK 0x0000000F /* mask of bits in INTLEVEL field of PS */ -/* EXCM field: */ -#define XCHAL_PS_EXCM_BITS 1 /* number of bits in EXCM field */ -#define XCHAL_PS_EXCM_NUM 2 /* max number of possible causes (2^bits) */ -#define XCHAL_PS_EXCM_SHIFT 4 /* position of EXCM bits in PS, starting from lsbit */ -#define XCHAL_PS_EXCM_MASK 0x00000010 /* mask of bits in EXCM field of PS */ -/* PROGSTACK field: */ -#define XCHAL_PS_PROGSTACK_BITS 1 /* number of bits in PROGSTACK field */ -#define XCHAL_PS_PROGSTACK_NUM 2 /* max number of possible causes (2^bits) */ -#define XCHAL_PS_PROGSTACK_SHIFT 5 /* position of PROGSTACK bits in PS, starting from lsbit */ -#define XCHAL_PS_PROGSTACK_MASK 0x00000020 /* mask of bits in PROGSTACK field of PS */ -/* RING field: */ -#define XCHAL_PS_RING_BITS 2 /* number of bits in RING field */ -#define XCHAL_PS_RING_NUM 4 /* max number of possible causes (2^bits) */ -#define XCHAL_PS_RING_SHIFT 6 /* position of RING bits in PS, starting from lsbit */ -#define XCHAL_PS_RING_MASK 0x000000C0 /* mask of bits in RING field of PS */ -/* OWB field: */ -#define XCHAL_PS_OWB_BITS 4 /* number of bits in OWB field */ -#define XCHAL_PS_OWB_NUM 16 /* max number of possible causes (2^bits) */ -#define XCHAL_PS_OWB_SHIFT 8 /* position of OWB bits in PS, starting from lsbit */ -#define XCHAL_PS_OWB_MASK 0x00000F00 /* mask of bits in OWB field of PS */ -/* CALLINC field: */ -#define XCHAL_PS_CALLINC_BITS 2 /* number of bits in CALLINC field */ -#define XCHAL_PS_CALLINC_NUM 4 /* max number of possible causes (2^bits) */ -#define XCHAL_PS_CALLINC_SHIFT 16 /* position of CALLINC bits in PS, starting from lsbit */ -#define XCHAL_PS_CALLINC_MASK 0x00030000 /* mask of bits in CALLINC field of PS */ -/* WOE field: */ -#define XCHAL_PS_WOE_BITS 1 /* number of bits in WOE field */ -#define XCHAL_PS_WOE_NUM 2 /* max number of possible causes (2^bits) */ -#define XCHAL_PS_WOE_SHIFT 18 /* position of WOE bits in PS, starting from lsbit */ -#define XCHAL_PS_WOE_MASK 0x00040000 /* mask of bits in WOE field of PS */ - -/* EXCCAUSE (special register number 232): */ -#define XCHAL_EXCCAUSE_VALIDMASK 0x0000003F /* bits of EXCCAUSE that are defined */ -/* EXCCAUSE field: */ -#define XCHAL_EXCCAUSE_BITS 6 /* number of bits in EXCCAUSE register */ -#define XCHAL_EXCCAUSE_NUM 64 /* max number of possible causes (2^bits) */ -#define XCHAL_EXCCAUSE_SHIFT 0 /* position of EXCCAUSE bits in register, starting from lsbit */ -#define XCHAL_EXCCAUSE_MASK 0x0000003F /* mask of bits in EXCCAUSE register */ - -/* DEBUGCAUSE (special register number 233): */ -#define XCHAL_DEBUGCAUSE_VALIDMASK 0x0000003F /* bits of DEBUGCAUSE that are defined */ -/* ICOUNT field: */ -#define XCHAL_DEBUGCAUSE_ICOUNT_BITS 1 /* number of bits in ICOUNT field */ -#define XCHAL_DEBUGCAUSE_ICOUNT_NUM 2 /* max number of possible causes (2^bits) */ -#define XCHAL_DEBUGCAUSE_ICOUNT_SHIFT 0 /* position of ICOUNT bits in DEBUGCAUSE, starting from lsbit */ -#define XCHAL_DEBUGCAUSE_ICOUNT_MASK 0x00000001 /* mask of bits in ICOUNT field of DEBUGCAUSE */ -/* IBREAK field: */ -#define XCHAL_DEBUGCAUSE_IBREAK_BITS 1 /* number of bits in IBREAK field */ -#define XCHAL_DEBUGCAUSE_IBREAK_NUM 2 /* max number of possible causes (2^bits) */ -#define XCHAL_DEBUGCAUSE_IBREAK_SHIFT 1 /* position of IBREAK bits in DEBUGCAUSE, starting from lsbit */ -#define XCHAL_DEBUGCAUSE_IBREAK_MASK 0x00000002 /* mask of bits in IBREAK field of DEBUGCAUSE */ -/* DBREAK field: */ -#define XCHAL_DEBUGCAUSE_DBREAK_BITS 1 /* number of bits in DBREAK field */ -#define XCHAL_DEBUGCAUSE_DBREAK_NUM 2 /* max number of possible causes (2^bits) */ -#define XCHAL_DEBUGCAUSE_DBREAK_SHIFT 2 /* position of DBREAK bits in DEBUGCAUSE, starting from lsbit */ -#define XCHAL_DEBUGCAUSE_DBREAK_MASK 0x00000004 /* mask of bits in DBREAK field of DEBUGCAUSE */ -/* BREAK field: */ -#define XCHAL_DEBUGCAUSE_BREAK_BITS 1 /* number of bits in BREAK field */ -#define XCHAL_DEBUGCAUSE_BREAK_NUM 2 /* max number of possible causes (2^bits) */ -#define XCHAL_DEBUGCAUSE_BREAK_SHIFT 3 /* position of BREAK bits in DEBUGCAUSE, starting from lsbit */ -#define XCHAL_DEBUGCAUSE_BREAK_MASK 0x00000008 /* mask of bits in BREAK field of DEBUGCAUSE */ -/* BREAKN field: */ -#define XCHAL_DEBUGCAUSE_BREAKN_BITS 1 /* number of bits in BREAKN field */ -#define XCHAL_DEBUGCAUSE_BREAKN_NUM 2 /* max number of possible causes (2^bits) */ -#define XCHAL_DEBUGCAUSE_BREAKN_SHIFT 4 /* position of BREAKN bits in DEBUGCAUSE, starting from lsbit */ -#define XCHAL_DEBUGCAUSE_BREAKN_MASK 0x00000010 /* mask of bits in BREAKN field of DEBUGCAUSE */ -/* DEBUGINT field: */ -#define XCHAL_DEBUGCAUSE_DEBUGINT_BITS 1 /* number of bits in DEBUGINT field */ -#define XCHAL_DEBUGCAUSE_DEBUGINT_NUM 2 /* max number of possible causes (2^bits) */ -#define XCHAL_DEBUGCAUSE_DEBUGINT_SHIFT 5 /* position of DEBUGINT bits in DEBUGCAUSE, starting from lsbit */ -#define XCHAL_DEBUGCAUSE_DEBUGINT_MASK 0x00000020 /* mask of bits in DEBUGINT field of DEBUGCAUSE */ - - - -/*---------------------------------------------------------------------- - ISA - ----------------------------------------------------------------------*/ - -#define XCHAL_HAVE_DENSITY 1 /* 1 if density option configured, 0 otherwise */ -#define XCHAL_HAVE_LOOPS 1 /* 1 if zero-overhead loops option configured, 0 otherwise */ -/* Misc instructions: */ -#define XCHAL_HAVE_NSA 0 /* 1 if NSA/NSAU instructions option configured, 0 otherwise */ -#define XCHAL_HAVE_MINMAX 0 /* 1 if MIN/MAX instructions option configured, 0 otherwise */ -#define XCHAL_HAVE_SEXT 0 /* 1 if sign-extend instruction option configured, 0 otherwise */ -#define XCHAL_HAVE_CLAMPS 0 /* 1 if CLAMPS instruction option configured, 0 otherwise */ -#define XCHAL_HAVE_MAC16 0 /* 1 if MAC16 option configured, 0 otherwise */ -#define XCHAL_HAVE_MUL16 0 /* 1 if 16-bit integer multiply option configured, 0 otherwise */ -/*#define XCHAL_HAVE_POPC 0*/ /* 1 if CRC instruction option configured, 0 otherwise */ -/*#define XCHAL_HAVE_CRC 0*/ /* 1 if POPC instruction option configured, 0 otherwise */ - -#define XCHAL_HAVE_SPECULATION 0 /* 1 if speculation option configured, 0 otherwise */ -/*#define XCHAL_HAVE_MP_SYNC 0*/ /* 1 if multiprocessor sync. option configured, 0 otherwise */ -#define XCHAL_HAVE_PRID 0 /* 1 if processor ID register configured, 0 otherwise */ - -#define XCHAL_NUM_MISC_REGS 2 /* number of miscellaneous registers (0..4) */ - -/* These relate a bit more to TIE: */ -#define XCHAL_HAVE_BOOLEANS 0 /* 1 if booleans option configured, 0 otherwise */ -#define XCHAL_HAVE_MUL32 0 /* 1 if 32-bit integer multiply option configured, 0 otherwise */ -#define XCHAL_HAVE_MUL32_HIGH 0 /* 1 if MUL32 option includes MULUH and MULSH, 0 otherwise */ -#define XCHAL_HAVE_FP 0 /* 1 if floating point option configured, 0 otherwise */ - - -/*---------------------------------------------------------------------- - DERIVED - ----------------------------------------------------------------------*/ - -#if XCHAL_HAVE_BE -#define XCHAL_INST_ILLN 0xD60F /* 2-byte illegal instruction, msb-first */ -#define XCHAL_INST_ILLN_BYTE0 0xD6 /* 2-byte illegal instruction, 1st byte */ -#define XCHAL_INST_ILLN_BYTE1 0x0F /* 2-byte illegal instruction, 2nd byte */ -#else -#define XCHAL_INST_ILLN 0xF06D /* 2-byte illegal instruction, lsb-first */ -#define XCHAL_INST_ILLN_BYTE0 0x6D /* 2-byte illegal instruction, 1st byte */ -#define XCHAL_INST_ILLN_BYTE1 0xF0 /* 2-byte illegal instruction, 2nd byte */ -#endif -/* Belongs in xtensa/hal.h: */ -#define XTHAL_INST_ILL 0x000000 /* 3-byte illegal instruction */ - - -/* - * Because information as to exactly which hardware release is targeted - * by a given software build is not always available, compile-time HAL - * Hardware-Release "_AT" macros are fuzzy (return 0, 1, or XCHAL_MAYBE): - */ -#ifndef XCHAL_HW_RELEASE_MAJOR -# define XCHAL_HW_CONFIGID_RELIABLE 0 -#endif -#if XCHAL_HW_CONFIGID_RELIABLE -# define XCHAL_HW_RELEASE_AT_OR_BELOW(major,minor) (XTHAL_REL_LE( XCHAL_HW_RELEASE_MAJOR,XCHAL_HW_RELEASE_MINOR, major,minor ) ? 1 : 0) -# define XCHAL_HW_RELEASE_AT_OR_ABOVE(major,minor) (XTHAL_REL_GE( XCHAL_HW_RELEASE_MAJOR,XCHAL_HW_RELEASE_MINOR, major,minor ) ? 1 : 0) -# define XCHAL_HW_RELEASE_AT(major,minor) (XTHAL_REL_EQ( XCHAL_HW_RELEASE_MAJOR,XCHAL_HW_RELEASE_MINOR, major,minor ) ? 1 : 0) -# define XCHAL_HW_RELEASE_MAJOR_AT(major) ((XCHAL_HW_RELEASE_MAJOR == (major)) ? 1 : 0) -#else -# define XCHAL_HW_RELEASE_AT_OR_BELOW(major,minor) ( ((major) < 1040 && XCHAL_HAVE_XEA2) ? 0 \ - : ((major) > 1050 && XCHAL_HAVE_XEA1) ? 1 \ - : XTHAL_MAYBE ) -# define XCHAL_HW_RELEASE_AT_OR_ABOVE(major,minor) ( ((major) >= 2000 && XCHAL_HAVE_XEA1) ? 0 \ - : (XTHAL_REL_LE(major,minor, 1040,0) && XCHAL_HAVE_XEA2) ? 1 \ - : XTHAL_MAYBE ) -# define XCHAL_HW_RELEASE_AT(major,minor) ( (((major) < 1040 && XCHAL_HAVE_XEA2) || \ - ((major) >= 2000 && XCHAL_HAVE_XEA1)) ? 0 : XTHAL_MAYBE) -# define XCHAL_HW_RELEASE_MAJOR_AT(major) XCHAL_HW_RELEASE_AT(major,0) -#endif - -/* - * Specific errata: - */ - -/* - * Erratum T1020.H13, T1030.H7, T1040.H10, T1050.H4 (fixed in T1040.3 and T1050.1; - * relevant only in XEA1, kernel-vector mode, level-one interrupts and overflows enabled): - */ -#define XCHAL_MAYHAVE_ERRATUM_XEA1KWIN (XCHAL_HAVE_XEA1 && \ - (XCHAL_HW_RELEASE_AT_OR_BELOW(1040,2) != 0 \ - || XCHAL_HW_RELEASE_AT(1050,0))) - - - -#endif /*XTENSA_CONFIG_CORE_H*/ - diff --git a/include/asm-xtensa/xtensa/config-linux_be/defs.h b/include/asm-xtensa/xtensa/config-linux_be/defs.h deleted file mode 100644 index f7c58b27337..00000000000 --- a/include/asm-xtensa/xtensa/config-linux_be/defs.h +++ /dev/null @@ -1,270 +0,0 @@ -/* Definitions for Xtensa instructions, types, and protos. */ - -/* - * Copyright (c) 2003 Tensilica, Inc. All Rights Reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of version 2.1 of the GNU Lesser General Public - * License as published by the Free Software Foundation. - * - * This program is distributed in the hope that it would be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. - * - * Further, this software is distributed without any warranty that it is - * free of the rightful claim of any third person regarding infringement - * or the like. Any license provided herein, whether implied or - * otherwise, applies only to this software file. Patent licenses, if - * any, provided herein do not apply to combinations of this program with - * other software, or any other product whatsoever. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this program; if not, write the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston MA 02111-1307, - * USA. - */ - -/* Do not modify. This is automatically generated.*/ - -#ifndef _XTENSA_BASE_HEADER -#define _XTENSA_BASE_HEADER - -#ifdef __XTENSA__ -#if defined(__GNUC__) && !defined(__XCC__) - -#define L8UI_ASM(arr, ars, imm) { \ - __asm__ volatile("l8ui %0, %1, %2" : "=a" (arr) : "a" (ars) , "i" (imm)); \ -} - -#define XT_L8UI(ars, imm) \ -({ \ - unsigned char _arr; \ - const unsigned char *_ars = ars; \ - L8UI_ASM(_arr, _ars, imm); \ - _arr; \ -}) - -#define L16UI_ASM(arr, ars, imm) { \ - __asm__ volatile("l16ui %0, %1, %2" : "=a" (arr) : "a" (ars) , "i" (imm)); \ -} - -#define XT_L16UI(ars, imm) \ -({ \ - unsigned short _arr; \ - const unsigned short *_ars = ars; \ - L16UI_ASM(_arr, _ars, imm); \ - _arr; \ -}) - -#define L16SI_ASM(arr, ars, imm) {\ - __asm__ volatile("l16si %0, %1, %2" : "=a" (arr) : "a" (ars) , "i" (imm)); \ -} - -#define XT_L16SI(ars, imm) \ -({ \ - signed short _arr; \ - const signed short *_ars = ars; \ - L16SI_ASM(_arr, _ars, imm); \ - _arr; \ -}) - -#define L32I_ASM(arr, ars, imm) { \ - __asm__ volatile("l32i %0, %1, %2" : "=a" (arr) : "a" (ars) , "i" (imm)); \ -} - -#define XT_L32I(ars, imm) \ -({ \ - unsigned _arr; \ - const unsigned *_ars = ars; \ - L32I_ASM(_arr, _ars, imm); \ - _arr; \ -}) - -#define S8I_ASM(arr, ars, imm) {\ - __asm__ volatile("s8i %0, %1, %2" : : "a" (arr), "a" (ars) , "i" (imm) : "memory" ); \ -} - -#define XT_S8I(arr, ars, imm) \ -({ \ - signed char _arr = arr; \ - const signed char *_ars = ars; \ - S8I_ASM(_arr, _ars, imm); \ -}) - -#define S16I_ASM(arr, ars, imm) {\ - __asm__ volatile("s16i %0, %1, %2" : : "a" (arr), "a" (ars) , "i" (imm) : "memory" ); \ -} - -#define XT_S16I(arr, ars, imm) \ -({ \ - signed short _arr = arr; \ - const signed short *_ars = ars; \ - S16I_ASM(_arr, _ars, imm); \ -}) - -#define S32I_ASM(arr, ars, imm) { \ - __asm__ volatile("s32i %0, %1, %2" : : "a" (arr), "a" (ars) , "i" (imm) : "memory" ); \ -} - -#define XT_S32I(arr, ars, imm) \ -({ \ - signed int _arr = arr; \ - const signed int *_ars = ars; \ - S32I_ASM(_arr, _ars, imm); \ -}) - -#define ADDI_ASM(art, ars, imm) {\ - __asm__ ("addi %0, %1, %2" : "=a" (art) : "a" (ars), "i" (imm)); \ -} - -#define XT_ADDI(ars, imm) \ -({ \ - unsigned _art; \ - unsigned _ars = ars; \ - ADDI_ASM(_art, _ars, imm); \ - _art; \ -}) - -#define ABS_ASM(arr, art) {\ - __asm__ ("abs %0, %1" : "=a" (arr) : "a" (art)); \ -} - -#define XT_ABS(art) \ -({ \ - unsigned _arr; \ - signed _art = art; \ - ABS_ASM(_arr, _art); \ - _arr; \ -}) - -/* Note: In the following macros that reference SAR, the magic "state" - register is used to capture the dependency on SAR. This is because - SAR is a 5-bit register and thus there are no C types that can be - used to represent it. It doesn't appear that the SAR register is - even relevant to GCC, but it is marked as "clobbered" just in - case. */ - -#define SRC_ASM(arr, ars, art) {\ - register int _xt_sar __asm__ ("state"); \ - __asm__ ("src %0, %1, %2" \ - : "=a" (arr) : "a" (ars), "a" (art), "t" (_xt_sar)); \ -} - -#define XT_SRC(ars, art) \ -({ \ - unsigned _arr; \ - unsigned _ars = ars; \ - unsigned _art = art; \ - SRC_ASM(_arr, _ars, _art); \ - _arr; \ -}) - -#define SSR_ASM(ars) {\ - register int _xt_sar __asm__ ("state"); \ - __asm__ ("ssr %1" : "=t" (_xt_sar) : "a" (ars) : "sar"); \ -} - -#define XT_SSR(ars) \ -({ \ - unsigned _ars = ars; \ - SSR_ASM(_ars); \ -}) - -#define SSL_ASM(ars) {\ - register int _xt_sar __asm__ ("state"); \ - __asm__ ("ssl %1" : "=t" (_xt_sar) : "a" (ars) : "sar"); \ -} - -#define XT_SSL(ars) \ -({ \ - unsigned _ars = ars; \ - SSL_ASM(_ars); \ -}) - -#define SSA8B_ASM(ars) {\ - register int _xt_sar __asm__ ("state"); \ - __asm__ ("ssa8b %1" : "=t" (_xt_sar) : "a" (ars) : "sar"); \ -} - -#define XT_SSA8B(ars) \ -({ \ - unsigned _ars = ars; \ - SSA8B_ASM(_ars); \ -}) - -#define SSA8L_ASM(ars) {\ - register int _xt_sar __asm__ ("state"); \ - __asm__ ("ssa8l %1" : "=t" (_xt_sar) : "a" (ars) : "sar"); \ -} - -#define XT_SSA8L(ars) \ -({ \ - unsigned _ars = ars; \ - SSA8L_ASM(_ars); \ -}) - -#define SSAI_ASM(imm) {\ - register int _xt_sar __asm__ ("state"); \ - __asm__ ("ssai %1" : "=t" (_xt_sar) : "i" (imm) : "sar"); \ -} - -#define XT_SSAI(imm) \ -({ \ - SSAI_ASM(imm); \ -}) - - - - - - - - -#endif /* __GNUC__ && !__XCC__ */ - -#ifdef __XCC__ - -/* Core load/store instructions */ -extern unsigned char _TIE_L8UI(const unsigned char * ars, immediate imm); -extern unsigned short _TIE_L16UI(const unsigned short * ars, immediate imm); -extern signed short _TIE_L16SI(const signed short * ars, immediate imm); -extern unsigned _TIE_L32I(const unsigned * ars, immediate imm); -extern void _TIE_S8I(unsigned char arr, unsigned char * ars, immediate imm); -extern void _TIE_S16I(unsigned short arr, unsigned short * ars, immediate imm); -extern void _TIE_S32I(unsigned arr, unsigned * ars, immediate imm); - -#define XT_L8UI _TIE_L8UI -#define XT_L16UI _TIE_L16UI -#define XT_L16SI _TIE_L16SI -#define XT_L32I _TIE_L32I -#define XT_S8I _TIE_S8I -#define XT_S16I _TIE_S16I -#define XT_S32I _TIE_S32I - -/* Add-immediate instruction */ -extern unsigned _TIE_ADDI(unsigned ars, immediate imm); -#define XT_ADDI _TIE_ADDI - -/* Absolute value instruction */ -extern unsigned _TIE_ABS(int art); -#define XT_ABS _TIE_ABS - -/* funnel shift instructions */ -extern unsigned _TIE_SRC(unsigned ars, unsigned art); -#define XT_SRC _TIE_SRC -extern void _TIE_SSR(unsigned ars); -#define XT_SSR _TIE_SSR -extern void _TIE_SSL(unsigned ars); -#define XT_SSL _TIE_SSL -extern void _TIE_SSA8B(unsigned ars); -#define XT_SSA8B _TIE_SSA8B -extern void _TIE_SSA8L(unsigned ars); -#define XT_SSA8L _TIE_SSA8L -extern void _TIE_SSAI(immediate imm); -#define XT_SSAI _TIE_SSAI - - -#endif /* __XCC__ */ - -#endif /* __XTENSA__ */ -#endif /* !_XTENSA_BASE_HEADER */ diff --git a/include/asm-xtensa/xtensa/config-linux_be/specreg.h b/include/asm-xtensa/xtensa/config-linux_be/specreg.h deleted file mode 100644 index fa4106aa9a0..00000000000 --- a/include/asm-xtensa/xtensa/config-linux_be/specreg.h +++ /dev/null @@ -1,99 +0,0 @@ -/* - * Xtensa Special Register symbolic names - */ - -/* $Id: specreg.h,v 1.2 2003/03/07 19:15:18 joetaylor Exp $ */ - -/* - * Copyright (c) 2003 Tensilica, Inc. All Rights Reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of version 2.1 of the GNU Lesser General Public - * License as published by the Free Software Foundation. - * - * This program is distributed in the hope that it would be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. - * - * Further, this software is distributed without any warranty that it is - * free of the rightful claim of any third person regarding infringement - * or the like. Any license provided herein, whether implied or - * otherwise, applies only to this software file. Patent licenses, if - * any, provided herein do not apply to combinations of this program with - * other software, or any other product whatsoever. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this program; if not, write the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston MA 02111-1307, - * USA. - */ - -#ifndef XTENSA_SPECREG_H -#define XTENSA_SPECREG_H - -/* Include these special register bitfield definitions, for historical reasons: */ -#include <xtensa/corebits.h> - - -/* Special registers: */ -#define LBEG 0 -#define LEND 1 -#define LCOUNT 2 -#define SAR 3 -#define WINDOWBASE 72 -#define WINDOWSTART 73 -#define PTEVADDR 83 -#define RASID 90 -#define ITLBCFG 91 -#define DTLBCFG 92 -#define IBREAKENABLE 96 -#define DDR 104 -#define IBREAKA_0 128 -#define IBREAKA_1 129 -#define DBREAKA_0 144 -#define DBREAKA_1 145 -#define DBREAKC_0 160 -#define DBREAKC_1 161 -#define EPC_1 177 -#define EPC_2 178 -#define EPC_3 179 -#define EPC_4 180 -#define DEPC 192 -#define EPS_2 194 -#define EPS_3 195 -#define EPS_4 196 -#define EXCSAVE_1 209 -#define EXCSAVE_2 210 -#define EXCSAVE_3 211 -#define EXCSAVE_4 212 -#define INTERRUPT 226 -#define INTENABLE 228 -#define PS 230 -#define EXCCAUSE 232 -#define DEBUGCAUSE 233 -#define CCOUNT 234 -#define ICOUNT 236 -#define ICOUNTLEVEL 237 -#define EXCVADDR 238 -#define CCOMPARE_0 240 -#define CCOMPARE_1 241 -#define CCOMPARE_2 242 -#define MISC_REG_0 244 -#define MISC_REG_1 245 - -/* Special cases (bases of special register series): */ -#define IBREAKA 128 -#define DBREAKA 144 -#define DBREAKC 160 -#define EPC 176 -#define EPS 192 -#define EXCSAVE 208 -#define CCOMPARE 240 - -/* Special names for read-only and write-only interrupt registers: */ -#define INTREAD 226 -#define INTSET 226 -#define INTCLEAR 227 - -#endif /* XTENSA_SPECREG_H */ - diff --git a/include/asm-xtensa/xtensa/config-linux_be/system.h b/include/asm-xtensa/xtensa/config-linux_be/system.h deleted file mode 100644 index cf9d4d308e3..00000000000 --- a/include/asm-xtensa/xtensa/config-linux_be/system.h +++ /dev/null @@ -1,198 +0,0 @@ -/* - * xtensa/config/system.h -- HAL definitions that are dependent on SYSTEM configuration - * - * NOTE: The location and contents of this file are highly subject to change. - * - * Source for configuration-independent binaries (which link in a - * configuration-specific HAL library) must NEVER include this file. - * The HAL itself has historically included this file in some instances, - * but this is not appropriate either, because the HAL is meant to be - * core-specific but system independent. - */ - -/* - * Copyright (c) 2003 Tensilica, Inc. All Rights Reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of version 2.1 of the GNU Lesser General Public - * License as published by the Free Software Foundation. - * - * This program is distributed in the hope that it would be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. - * - * Further, this software is distributed without any warranty that it is - * free of the rightful claim of any third person regarding infringement - * or the like. Any license provided herein, whether implied or - * otherwise, applies only to this software file. Patent licenses, if - * any, provided herein do not apply to combinations of this program with - * other software, or any other product whatsoever. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this program; if not, write the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston MA 02111-1307, - * USA. - */ - - -#ifndef XTENSA_CONFIG_SYSTEM_H -#define XTENSA_CONFIG_SYSTEM_H - -/*#include <xtensa/hal.h>*/ - - - -/*---------------------------------------------------------------------- - DEVICE ADDRESSES - ----------------------------------------------------------------------*/ - -/* - * Strange place to find these, but the configuration GUI - * allows moving these around to account for various core - * configurations. Specific boards (and their BSP software) - * will have specific meanings for these components. - */ - -/* I/O Block areas: */ -#define XSHAL_IOBLOCK_CACHED_VADDR 0xE0000000 -#define XSHAL_IOBLOCK_CACHED_PADDR 0xF0000000 -#define XSHAL_IOBLOCK_CACHED_SIZE 0x0E000000 - -#define XSHAL_IOBLOCK_BYPASS_VADDR 0xF0000000 -#define XSHAL_IOBLOCK_BYPASS_PADDR 0xF0000000 -#define XSHAL_IOBLOCK_BYPASS_SIZE 0x0E000000 - -/* System ROM: */ -#define XSHAL_ROM_VADDR 0xEE000000 -#define XSHAL_ROM_PADDR 0xFE000000 -#define XSHAL_ROM_SIZE 0x00400000 -/* Largest available area (free of vectors): */ -#define XSHAL_ROM_AVAIL_VADDR 0xEE00052C -#define XSHAL_ROM_AVAIL_VSIZE 0x003FFAD4 - -/* System RAM: */ -#define XSHAL_RAM_VADDR 0xD0000000 -#define XSHAL_RAM_PADDR 0x00000000 -#define XSHAL_RAM_VSIZE 0x08000000 -#define XSHAL_RAM_PSIZE 0x10000000 -#define XSHAL_RAM_SIZE XSHAL_RAM_PSIZE -/* Largest available area (free of vectors): */ -#define XSHAL_RAM_AVAIL_VADDR 0xD0000370 -#define XSHAL_RAM_AVAIL_VSIZE 0x07FFFC90 - -/* - * Shadow system RAM (same device as system RAM, at different address). - * (Emulation boards need this for the SONIC Ethernet driver - * when data caches are configured for writeback mode.) - * NOTE: on full MMU configs, this points to the BYPASS virtual address - * of system RAM, ie. is the same as XSHAL_RAM_* except that virtual - * addresses are viewed through the BYPASS static map rather than - * the CACHED static map. - */ -#define XSHAL_RAM_BYPASS_VADDR 0xD8000000 -#define XSHAL_RAM_BYPASS_PADDR 0x00000000 -#define XSHAL_RAM_BYPASS_PSIZE 0x08000000 - -/* Alternate system RAM (different device than system RAM): */ -#define XSHAL_ALTRAM_VADDR 0xCEE00000 -#define XSHAL_ALTRAM_PADDR 0xC0000000 -#define XSHAL_ALTRAM_SIZE 0x00200000 - - -/*---------------------------------------------------------------------- - * DEVICE-ADDRESS DEPENDENT... - * - * Values written to CACHEATTR special register (or its equivalent) - * to enable and disable caches in various modes. - *----------------------------------------------------------------------*/ - -/*---------------------------------------------------------------------- - BACKWARD COMPATIBILITY ... - ----------------------------------------------------------------------*/ - -/* - * NOTE: the following two macros are DEPRECATED. Use the latter - * board-specific macros instead, which are specially tuned for the - * particular target environments' memory maps. - */ -#define XSHAL_CACHEATTR_BYPASS XSHAL_XT2000_CACHEATTR_BYPASS /* disable caches in bypass mode */ -#define XSHAL_CACHEATTR_DEFAULT XSHAL_XT2000_CACHEATTR_DEFAULT /* default setting to enable caches (no writeback!) */ - -/*---------------------------------------------------------------------- - ISS (Instruction Set Simulator) SPECIFIC ... - ----------------------------------------------------------------------*/ - -#define XSHAL_ISS_CACHEATTR_WRITEBACK 0x1122222F /* enable caches in write-back mode */ -#define XSHAL_ISS_CACHEATTR_WRITEALLOC 0x1122222F /* enable caches in write-allocate mode */ -#define XSHAL_ISS_CACHEATTR_WRITETHRU 0x1122222F /* enable caches in write-through mode */ -#define XSHAL_ISS_CACHEATTR_BYPASS 0x2222222F /* disable caches in bypass mode */ -#define XSHAL_ISS_CACHEATTR_DEFAULT XSHAL_ISS_CACHEATTR_WRITEBACK /* default setting to enable caches */ - -/* For Coware only: */ -#define XSHAL_COWARE_CACHEATTR_WRITEBACK 0x11222222 /* enable caches in write-back mode */ -#define XSHAL_COWARE_CACHEATTR_WRITEALLOC 0x11222222 /* enable caches in write-allocate mode */ -#define XSHAL_COWARE_CACHEATTR_WRITETHRU 0x11222222 /* enable caches in write-through mode */ -#define XSHAL_COWARE_CACHEATTR_BYPASS 0x22222222 /* disable caches in bypass mode */ -#define XSHAL_COWARE_CACHEATTR_DEFAULT XSHAL_COWARE_CACHEATTR_WRITEBACK /* default setting to enable caches */ - -/* For BFM and other purposes: */ -#define XSHAL_ALLVALID_CACHEATTR_WRITEBACK 0x11222222 /* enable caches without any invalid regions */ -#define XSHAL_ALLVALID_CACHEATTR_DEFAULT XSHAL_ALLVALID_CACHEATTR_WRITEBACK /* default setting for caches without any invalid regions */ - -#define XSHAL_ISS_PIPE_REGIONS 0 -#define XSHAL_ISS_SDRAM_REGIONS 0 - - -/*---------------------------------------------------------------------- - XT2000 BOARD SPECIFIC ... - ----------------------------------------------------------------------*/ - -#define XSHAL_XT2000_CACHEATTR_WRITEBACK 0x22FFFFFF /* enable caches in write-back mode */ -#define XSHAL_XT2000_CACHEATTR_WRITEALLOC 0x22FFFFFF /* enable caches in write-allocate mode */ -#define XSHAL_XT2000_CACHEATTR_WRITETHRU 0x22FFFFFF /* enable caches in write-through mode */ -#define XSHAL_XT2000_CACHEATTR_BYPASS 0x22FFFFFF /* disable caches in bypass mode */ -#define XSHAL_XT2000_CACHEATTR_DEFAULT XSHAL_XT2000_CACHEATTR_WRITEBACK /* default setting to enable caches */ - -#define XSHAL_XT2000_PIPE_REGIONS 0x00001000 /* BusInt pipeline regions */ -#define XSHAL_XT2000_SDRAM_REGIONS 0x00000005 /* BusInt SDRAM regions */ - - -/*---------------------------------------------------------------------- - VECTOR SIZES - ----------------------------------------------------------------------*/ - -/* - * Sizes allocated to vectors by the system (memory map) configuration. - * These sizes are constrained by core configuration (eg. one vector's - * code cannot overflow into another vector) but are dependent on the - * system or board (or LSP) memory map configuration. - * - * Whether or not each vector happens to be in a system ROM is also - * a system configuration matter, sometimes useful, included here also: - */ -#define XSHAL_RESET_VECTOR_SIZE 0x000004E0 -#define XSHAL_RESET_VECTOR_ISROM 1 -#define XSHAL_USER_VECTOR_SIZE 0x0000001C -#define XSHAL_USER_VECTOR_ISROM 0 -#define XSHAL_PROGRAMEXC_VECTOR_SIZE XSHAL_USER_VECTOR_SIZE /* for backward compatibility */ -#define XSHAL_USEREXC_VECTOR_SIZE XSHAL_USER_VECTOR_SIZE /* for backward compatibility */ -#define XSHAL_KERNEL_VECTOR_SIZE 0x0000001C -#define XSHAL_KERNEL_VECTOR_ISROM 0 -#define XSHAL_STACKEDEXC_VECTOR_SIZE XSHAL_KERNEL_VECTOR_SIZE /* for backward compatibility */ -#define XSHAL_KERNELEXC_VECTOR_SIZE XSHAL_KERNEL_VECTOR_SIZE /* for backward compatibility */ -#define XSHAL_DOUBLEEXC_VECTOR_SIZE 0x000000E0 -#define XSHAL_DOUBLEEXC_VECTOR_ISROM 0 -#define XSHAL_WINDOW_VECTORS_SIZE 0x00000180 -#define XSHAL_WINDOW_VECTORS_ISROM 0 -#define XSHAL_INTLEVEL2_VECTOR_SIZE 0x0000000C -#define XSHAL_INTLEVEL2_VECTOR_ISROM 0 -#define XSHAL_INTLEVEL3_VECTOR_SIZE 0x0000000C -#define XSHAL_INTLEVEL3_VECTOR_ISROM 0 -#define XSHAL_INTLEVEL4_VECTOR_SIZE 0x0000000C -#define XSHAL_INTLEVEL4_VECTOR_ISROM 1 -#define XSHAL_DEBUG_VECTOR_SIZE XSHAL_INTLEVEL4_VECTOR_SIZE -#define XSHAL_DEBUG_VECTOR_ISROM XSHAL_INTLEVEL4_VECTOR_ISROM - - -#endif /*XTENSA_CONFIG_SYSTEM_H*/ - diff --git a/include/asm-xtensa/xtensa/config-linux_be/tie.h b/include/asm-xtensa/xtensa/config-linux_be/tie.h deleted file mode 100644 index 3c2e514602f..00000000000 --- a/include/asm-xtensa/xtensa/config-linux_be/tie.h +++ /dev/null @@ -1,275 +0,0 @@ -/* - * xtensa/config/tie.h -- HAL definitions that are dependent on CORE and TIE configuration - * - * This header file is sometimes referred to as the "compile-time HAL" or CHAL. - * It was generated for a specific Xtensa processor configuration, - * and furthermore for a specific set of TIE source files that extend - * basic core functionality. - * - * Source for configuration-independent binaries (which link in a - * configuration-specific HAL library) must NEVER include this file. - * It is perfectly normal, however, for the HAL source itself to include this file. - */ - -/* - * Copyright (c) 2003 Tensilica, Inc. All Rights Reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of version 2.1 of the GNU Lesser General Public - * License as published by the Free Software Foundation. - * - * This program is distributed in the hope that it would be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. - * - * Further, this software is distributed without any warranty that it is - * free of the rightful claim of any third person regarding infringement - * or the like. Any license provided herein, whether implied or - * otherwise, applies only to this software file. Patent licenses, if - * any, provided herein do not apply to combinations of this program with - * other software, or any other product whatsoever. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this program; if not, write the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston MA 02111-1307, - * USA. - */ - - -#ifndef XTENSA_CONFIG_TIE_H -#define XTENSA_CONFIG_TIE_H - -#include <xtensa/hal.h> - - -/*---------------------------------------------------------------------- - GENERAL - ----------------------------------------------------------------------*/ - -/* - * Separators for macros that expand into arrays. - * These can be predefined by files that #include this one, - * when different separators are required. - */ -/* Element separator for macros that expand into 1-dimensional arrays: */ -#ifndef XCHAL_SEP -#define XCHAL_SEP , -#endif -/* Array separator for macros that expand into 2-dimensional arrays: */ -#ifndef XCHAL_SEP2 -#define XCHAL_SEP2 },{ -#endif - - - - - - -/*---------------------------------------------------------------------- - COPROCESSORS and EXTRA STATE - ----------------------------------------------------------------------*/ - -#define XCHAL_CP_NUM 0 /* number of coprocessors */ -#define XCHAL_CP_MAX 0 /* max coprocessor id plus one (0 if none) */ -#define XCHAL_CP_MASK 0x00 /* bitmask of coprocessors by id */ - -/* Space for coprocessors' state save areas: */ -#define XCHAL_CP0_SA_SIZE 0 -#define XCHAL_CP1_SA_SIZE 0 -#define XCHAL_CP2_SA_SIZE 0 -#define XCHAL_CP3_SA_SIZE 0 -#define XCHAL_CP4_SA_SIZE 0 -#define XCHAL_CP5_SA_SIZE 0 -#define XCHAL_CP6_SA_SIZE 0 -#define XCHAL_CP7_SA_SIZE 0 -/* Minimum required alignments of CP state save areas: */ -#define XCHAL_CP0_SA_ALIGN 1 -#define XCHAL_CP1_SA_ALIGN 1 -#define XCHAL_CP2_SA_ALIGN 1 -#define XCHAL_CP3_SA_ALIGN 1 -#define XCHAL_CP4_SA_ALIGN 1 -#define XCHAL_CP5_SA_ALIGN 1 -#define XCHAL_CP6_SA_ALIGN 1 -#define XCHAL_CP7_SA_ALIGN 1 - -/* Indexing macros: */ -#define _XCHAL_CP_SA_SIZE(n) XCHAL_CP ## n ## _SA_SIZE -#define XCHAL_CP_SA_SIZE(n) _XCHAL_CP_SA_SIZE(n) /* n = 0 .. 7 */ -#define _XCHAL_CP_SA_ALIGN(n) XCHAL_CP ## n ## _SA_ALIGN -#define XCHAL_CP_SA_ALIGN(n) _XCHAL_CP_SA_ALIGN(n) /* n = 0 .. 7 */ - - -/* Space for "extra" state (user special registers and non-cp TIE) save area: */ -#define XCHAL_EXTRA_SA_SIZE 0 -#define XCHAL_EXTRA_SA_ALIGN 1 - -/* Total save area size (extra + all coprocessors) */ -/* (not useful until xthal_{save,restore}_all_extra() is implemented, */ -/* but included for Tor2 beta; doesn't account for alignment!): */ -#define XCHAL_CPEXTRA_SA_SIZE_TOR2 0 /* Tor2Beta temporary definition -- do not use */ - -/* Combined required alignment for all CP and EXTRA state save areas */ -/* (does not include required alignment for any base config registers): */ -#define XCHAL_CPEXTRA_SA_ALIGN 1 - -/* ... */ - - -#ifdef _ASMLANGUAGE -/* - * Assembly-language specific definitions (assembly macros, etc.). - */ -#include <xtensa/config/specreg.h> - -/******************** - * Macros to save and restore the non-coprocessor TIE portion of EXTRA state. - */ - -/* (none) */ - - -/******************** - * Macros to create functions that save and restore all EXTRA (non-coprocessor) state - * (does not include zero-overhead loop registers and non-optional registers). - */ - - /* - * Macro that expands to the body of a function that - * stores the extra (non-coprocessor) optional/custom state. - * Entry: a2 = ptr to save area in which to save extra state - * Exit: any register a2-a15 (?) may have been clobbered. - */ - .macro xchal_extra_store_funcbody - .endm - - - /* - * Macro that expands to the body of a function that - * loads the extra (non-coprocessor) optional/custom state. - * Entry: a2 = ptr to save area from which to restore extra state - * Exit: any register a2-a15 (?) may have been clobbered. - */ - .macro xchal_extra_load_funcbody - .endm - - -/******************** - * Macros to save and restore the state of each TIE coprocessor. - */ - - - -/******************** - * Macros to create functions that save and restore the state of *any* TIE coprocessor. - */ - - /* - * Macro that expands to the body of a function - * that stores the selected coprocessor's state (registers etc). - * Entry: a2 = ptr to save area in which to save cp state - * a3 = coprocessor number - * Exit: any register a2-a15 (?) may have been clobbered. - */ - .macro xchal_cpi_store_funcbody - .endm - - - /* - * Macro that expands to the body of a function - * that loads the selected coprocessor's state (registers etc). - * Entry: a2 = ptr to save area from which to restore cp state - * a3 = coprocessor number - * Exit: any register a2-a15 (?) may have been clobbered. - */ - .macro xchal_cpi_load_funcbody - .endm - -#endif /*_ASMLANGUAGE*/ - - -/* - * Contents of save areas in terms of libdb register numbers. - * NOTE: CONTENTS_LIBDB_{UREG,REGF} macros are not defined in this file; - * it is up to the user of this header file to define these macros - * usefully before each expansion of the CONTENTS_LIBDB macros. - * (Fields rsv[123] are reserved for future additions; they are currently - * set to zero but may be set to some useful values in the future.) - * - * CONTENTS_LIBDB_SREG(libdbnum, offset, size, align, rsv1, name, sregnum, bitmask, rsv2, rsv3) - * CONTENTS_LIBDB_UREG(libdbnum, offset, size, align, rsv1, name, uregnum, bitmask, rsv2, rsv3) - * CONTENTS_LIBDB_REGF(libdbnum, offset, size, align, rsv1, name, index, numentries, contentsize, regname_base, regfile_name, rsv2, rsv3) - */ - -#define XCHAL_EXTRA_SA_CONTENTS_LIBDB_NUM 0 -#define XCHAL_EXTRA_SA_CONTENTS_LIBDB /* empty */ - -#define XCHAL_CP0_SA_CONTENTS_LIBDB_NUM 0 -#define XCHAL_CP0_SA_CONTENTS_LIBDB /* empty */ - -#define XCHAL_CP1_SA_CONTENTS_LIBDB_NUM 0 -#define XCHAL_CP1_SA_CONTENTS_LIBDB /* empty */ - -#define XCHAL_CP2_SA_CONTENTS_LIBDB_NUM 0 -#define XCHAL_CP2_SA_CONTENTS_LIBDB /* empty */ - -#define XCHAL_CP3_SA_CONTENTS_LIBDB_NUM 0 -#define XCHAL_CP3_SA_CONTENTS_LIBDB /* empty */ - -#define XCHAL_CP4_SA_CONTENTS_LIBDB_NUM 0 -#define XCHAL_CP4_SA_CONTENTS_LIBDB /* empty */ - -#define XCHAL_CP5_SA_CONTENTS_LIBDB_NUM 0 -#define XCHAL_CP5_SA_CONTENTS_LIBDB /* empty */ - -#define XCHAL_CP6_SA_CONTENTS_LIBDB_NUM 0 -#define XCHAL_CP6_SA_CONTENTS_LIBDB /* empty */ - -#define XCHAL_CP7_SA_CONTENTS_LIBDB_NUM 0 -#define XCHAL_CP7_SA_CONTENTS_LIBDB /* empty */ - - - - - - -/*---------------------------------------------------------------------- - MISC - ----------------------------------------------------------------------*/ - -#if 0 /* is there something equivalent for user TIE? */ -#define XCHAL_CORE_ID "linux_be" /* configuration's alphanumeric core identifier - (CoreID) set in the Xtensa Processor Generator */ - -#define XCHAL_BUILD_UNIQUE_ID 0x00003256 /* software build-unique ID (22-bit) */ - -/* These definitions describe the hardware targeted by this software: */ -#define XCHAL_HW_CONFIGID0 0xC103D1FF /* config ID reg 0 value (upper 32 of 64 bits) */ -#define XCHAL_HW_CONFIGID1 0x00803256 /* config ID reg 1 value (lower 32 of 64 bits) */ -#define XCHAL_CONFIGID0 XCHAL_HW_CONFIGID0 /* for backward compatibility only -- don't use! */ -#define XCHAL_CONFIGID1 XCHAL_HW_CONFIGID1 /* for backward compatibility only -- don't use! */ -#define XCHAL_HW_RELEASE_MAJOR 1050 /* major release of targeted hardware */ -#define XCHAL_HW_RELEASE_MINOR 1 /* minor release of targeted hardware */ -#define XCHAL_HW_RELEASE_NAME "T1050.1" /* full release name of targeted hardware */ -#define XTHAL_HW_REL_T1050 1 -#define XTHAL_HW_REL_T1050_1 1 -#define XCHAL_HW_CONFIGID_RELIABLE 1 -#endif /*0*/ - - - -/*---------------------------------------------------------------------- - ISA - ----------------------------------------------------------------------*/ - -#if 0 /* these probably don't belong here, but are related to or implemented using TIE */ -#define XCHAL_HAVE_BOOLEANS 0 /* 1 if booleans option configured, 0 otherwise */ -/* Misc instructions: */ -#define XCHAL_HAVE_MUL32 0 /* 1 if 32-bit integer multiply option configured, 0 otherwise */ -#define XCHAL_HAVE_MUL32_HIGH 0 /* 1 if MUL32 option includes MULUH and MULSH, 0 otherwise */ - -#define XCHAL_HAVE_FP 0 /* 1 if floating point option configured, 0 otherwise */ -#endif /*0*/ - - -#endif /*XTENSA_CONFIG_TIE_H*/ - diff --git a/include/asm-xtensa/xtensa/coreasm.h b/include/asm-xtensa/xtensa/coreasm.h deleted file mode 100644 index a8cfb54c20a..00000000000 --- a/include/asm-xtensa/xtensa/coreasm.h +++ /dev/null @@ -1,526 +0,0 @@ -#ifndef XTENSA_COREASM_H -#define XTENSA_COREASM_H - -/* - * THIS FILE IS GENERATED -- DO NOT MODIFY BY HAND - * - * include/asm-xtensa/xtensa/coreasm.h -- assembler-specific - * definitions that depend on CORE configuration. - * - * Source for configuration-independent binaries (which link in a - * configuration-specific HAL library) must NEVER include this file. - * It is perfectly normal, however, for the HAL itself to include this - * file. - * - * This file must NOT include xtensa/config/system.h. Any assembler - * header file that depends on system information should likely go in - * a new systemasm.h (or sysasm.h) header file. - * - * NOTE: macro beqi32 is NOT configuration-dependent, and is placed - * here til we will have configuration-independent header file. - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file "COPYING" in the main directory of - * this archive for more details. - * - * Copyright (C) 2002 Tensilica Inc. - */ - - -#include <xtensa/config/core.h> -#include <xtensa/config/specreg.h> - -/* - * Assembly-language specific definitions (assembly macros, etc.). - */ - -/*---------------------------------------------------------------------- - * find_ms_setbit - * - * This macro finds the most significant bit that is set in <as> - * and return its index + <base> in <ad>, or <base> - 1 if <as> is zero. - * The index counts starting at zero for the lsbit, so the return - * value ranges from <base>-1 (no bit set) to <base>+31 (msbit set). - * - * Parameters: - * <ad> destination address register (any register) - * <as> source address register - * <at> temporary address register (must be different than <as>) - * <base> constant value added to result (usually 0 or 1) - * On entry: - * <ad> = undefined if different than <as> - * <as> = value whose most significant set bit is to be found - * <at> = undefined - * no other registers are used by this macro. - * On exit: - * <ad> = <base> + index of msbit set in original <as>, - * = <base> - 1 if original <as> was zero. - * <as> clobbered (if not <ad>) - * <at> clobbered (if not <ad>) - * Example: - * find_ms_setbit a0, a4, a0, 0 -- return in a0 index of msbit set in a4 - */ - - .macro find_ms_setbit ad, as, at, base -#if XCHAL_HAVE_NSA - movi \at, 31+\base - nsau \as, \as // get index of \as, numbered from msbit (32 if absent) - sub \ad, \at, \as // get numbering from lsbit (0..31, -1 if absent) -#else /* XCHAL_HAVE_NSA */ - movi \at, \base // start with result of 0 (point to lsbit of 32) - - beqz \as, 2f // special case for zero argument: return -1 - bltui \as, 0x10000, 1f // is it one of the 16 lsbits? (if so, check lower 16 bits) - addi \at, \at, 16 // no, increment result to upper 16 bits (of 32) - //srli \as, \as, 16 // check upper half (shift right 16 bits) - extui \as, \as, 16, 16 // check upper half (shift right 16 bits) -1: bltui \as, 0x100, 1f // is it one of the 8 lsbits? (if so, check lower 8 bits) - addi \at, \at, 8 // no, increment result to upper 8 bits (of 16) - srli \as, \as, 8 // shift right to check upper 8 bits -1: bltui \as, 0x10, 1f // is it one of the 4 lsbits? (if so, check lower 4 bits) - addi \at, \at, 4 // no, increment result to upper 4 bits (of 8) - srli \as, \as, 4 // shift right 4 bits to check upper half -1: bltui \as, 0x4, 1f // is it one of the 2 lsbits? (if so, check lower 2 bits) - addi \at, \at, 2 // no, increment result to upper 2 bits (of 4) - srli \as, \as, 2 // shift right 2 bits to check upper half -1: bltui \as, 0x2, 1f // is it the lsbit? - addi \at, \at, 2 // no, increment result to upper bit (of 2) -2: addi \at, \at, -1 // (from just above: add 1; from beqz: return -1) - //srli \as, \as, 1 -1: // done! \at contains index of msbit set (or -1 if none set) - .if 0x\ad - 0x\at // destination different than \at ? (works because regs are a0-a15) - mov \ad, \at // then move result to \ad - .endif -#endif /* XCHAL_HAVE_NSA */ - .endm // find_ms_setbit - -/*---------------------------------------------------------------------- - * find_ls_setbit - * - * This macro finds the least significant bit that is set in <as>, - * and return its index in <ad>. - * Usage is the same as for the find_ms_setbit macro. - * Example: - * find_ls_setbit a0, a4, a0, 0 -- return in a0 index of lsbit set in a4 - */ - - .macro find_ls_setbit ad, as, at, base - neg \at, \as // keep only the least-significant bit that is set... - and \as, \at, \as // ... in \as - find_ms_setbit \ad, \as, \at, \base - .endm // find_ls_setbit - -/*---------------------------------------------------------------------- - * find_ls_one - * - * Same as find_ls_setbit with base zero. - * Source (as) and destination (ad) registers must be different. - * Provided for backward compatibility. - */ - - .macro find_ls_one ad, as - find_ls_setbit \ad, \as, \ad, 0 - .endm // find_ls_one - -/*---------------------------------------------------------------------- - * floop, floopnez, floopgtz, floopend - * - * These macros are used for fast inner loops that - * work whether or not the Loops options is configured. - * If the Loops option is configured, they simply use - * the zero-overhead LOOP instructions; otherwise - * they use explicit decrement and branch instructions. - * - * They are used in pairs, with floop, floopnez or floopgtz - * at the beginning of the loop, and floopend at the end. - * - * Each pair of loop macro calls must be given the loop count - * address register and a unique label for that loop. - * - * Example: - * - * movi a3, 16 // loop 16 times - * floop a3, myloop1 - * : - * bnez a7, end1 // exit loop if a7 != 0 - * : - * floopend a3, myloop1 - * end1: - * - * Like the LOOP instructions, these macros cannot be - * nested, must include at least one instruction, - * cannot call functions inside the loop, etc. - * The loop can be exited by jumping to the instruction - * following floopend (or elsewhere outside the loop), - * or continued by jumping to a NOP instruction placed - * immediately before floopend. - * - * Unlike LOOP instructions, the register passed to floop* - * cannot be used inside the loop, because it is used as - * the loop counter if the Loops option is not configured. - * And its value is undefined after exiting the loop. - * And because the loop counter register is active inside - * the loop, you can't easily use this construct to loop - * across a register file using ROTW as you might with LOOP - * instructions, unless you copy the loop register along. - */ - - /* Named label version of the macros: */ - - .macro floop ar, endlabel - floop_ \ar, .Lfloopstart_\endlabel, .Lfloopend_\endlabel - .endm - - .macro floopnez ar, endlabel - floopnez_ \ar, .Lfloopstart_\endlabel, .Lfloopend_\endlabel - .endm - - .macro floopgtz ar, endlabel - floopgtz_ \ar, .Lfloopstart_\endlabel, .Lfloopend_\endlabel - .endm - - .macro floopend ar, endlabel - floopend_ \ar, .Lfloopstart_\endlabel, .Lfloopend_\endlabel - .endm - - /* Numbered local label version of the macros: */ -#if 0 /*UNTESTED*/ - .macro floop89 ar - floop_ \ar, 8, 9f - .endm - - .macro floopnez89 ar - floopnez_ \ar, 8, 9f - .endm - - .macro floopgtz89 ar - floopgtz_ \ar, 8, 9f - .endm - - .macro floopend89 ar - floopend_ \ar, 8b, 9 - .endm -#endif /*0*/ - - /* Underlying version of the macros: */ - - .macro floop_ ar, startlabel, endlabelref - .ifdef _infloop_ - .if _infloop_ - .err // Error: floop cannot be nested - .endif - .endif - .set _infloop_, 1 -#if XCHAL_HAVE_LOOPS - loop \ar, \endlabelref -#else /* XCHAL_HAVE_LOOPS */ -\startlabel: - addi \ar, \ar, -1 -#endif /* XCHAL_HAVE_LOOPS */ - .endm // floop_ - - .macro floopnez_ ar, startlabel, endlabelref - .ifdef _infloop_ - .if _infloop_ - .err // Error: floopnez cannot be nested - .endif - .endif - .set _infloop_, 1 -#if XCHAL_HAVE_LOOPS - loopnez \ar, \endlabelref -#else /* XCHAL_HAVE_LOOPS */ - beqz \ar, \endlabelref -\startlabel: - addi \ar, \ar, -1 -#endif /* XCHAL_HAVE_LOOPS */ - .endm // floopnez_ - - .macro floopgtz_ ar, startlabel, endlabelref - .ifdef _infloop_ - .if _infloop_ - .err // Error: floopgtz cannot be nested - .endif - .endif - .set _infloop_, 1 -#if XCHAL_HAVE_LOOPS - loopgtz \ar, \endlabelref -#else /* XCHAL_HAVE_LOOPS */ - bltz \ar, \endlabelref - beqz \ar, \endlabelref -\startlabel: - addi \ar, \ar, -1 -#endif /* XCHAL_HAVE_LOOPS */ - .endm // floopgtz_ - - - .macro floopend_ ar, startlabelref, endlabel - .ifndef _infloop_ - .err // Error: floopend without matching floopXXX - .endif - .ifeq _infloop_ - .err // Error: floopend without matching floopXXX - .endif - .set _infloop_, 0 -#if ! XCHAL_HAVE_LOOPS - bnez \ar, \startlabelref -#endif /* XCHAL_HAVE_LOOPS */ -\endlabel: - .endm // floopend_ - -/*---------------------------------------------------------------------- - * crsil -- conditional RSIL (read/set interrupt level) - * - * Executes the RSIL instruction if it exists, else just reads PS. - * The RSIL instruction does not exist in the new exception architecture - * if the interrupt option is not selected. - */ - - .macro crsil ar, newlevel -#if XCHAL_HAVE_OLD_EXC_ARCH || XCHAL_HAVE_INTERRUPTS - rsil \ar, \newlevel -#else - rsr \ar, PS -#endif - .endm // crsil - -/*---------------------------------------------------------------------- - * window_spill{4,8,12} - * - * These macros spill callers' register windows to the stack. - * They work for both privileged and non-privileged tasks. - * Must be called from a windowed ABI context, eg. within - * a windowed ABI function (ie. valid stack frame, window - * exceptions enabled, not in exception mode, etc). - * - * This macro requires a single invocation of the window_spill_common - * macro in the same assembly unit and section. - * - * Note that using window_spill{4,8,12} macros is more efficient - * than calling a function implemented using window_spill_function, - * because the latter needs extra code to figure out the size of - * the call to the spilling function. - * - * Example usage: - * - * .text - * .align 4 - * .global some_function - * .type some_function,@function - * some_function: - * entry a1, 16 - * : - * : - * - * window_spill4 // spill windows of some_function's callers; preserves a0..a3 only; - * // to use window_spill{8,12} in this example function we'd have - * // to increase space allocated by the entry instruction, because - * // 16 bytes only allows call4; 32 or 48 bytes (+locals) are needed - * // for call8/window_spill8 or call12/window_spill12 respectively. - * : - * - * retw - * - * window_spill_common // instantiates code used by window_spill4 - * - * - * On entry: - * none (if window_spill4) - * stack frame has enough space allocated for call8 (if window_spill8) - * stack frame has enough space allocated for call12 (if window_spill12) - * On exit: - * a4..a15 clobbered (if window_spill4) - * a8..a15 clobbered (if window_spill8) - * a12..a15 clobbered (if window_spill12) - * no caller windows are in live registers - */ - - .macro window_spill4 -#if XCHAL_HAVE_WINDOWED -# if XCHAL_NUM_AREGS == 16 - movi a15, 0 // for 16-register files, no need to call to reach the end -# elif XCHAL_NUM_AREGS == 32 - call4 .L__wdwspill_assist28 // call deep enough to clear out any live callers -# elif XCHAL_NUM_AREGS == 64 - call4 .L__wdwspill_assist60 // call deep enough to clear out any live callers -# endif -#endif - .endm // window_spill4 - - .macro window_spill8 -#if XCHAL_HAVE_WINDOWED -# if XCHAL_NUM_AREGS == 16 - movi a15, 0 // for 16-register files, no need to call to reach the end -# elif XCHAL_NUM_AREGS == 32 - call8 .L__wdwspill_assist24 // call deep enough to clear out any live callers -# elif XCHAL_NUM_AREGS == 64 - call8 .L__wdwspill_assist56 // call deep enough to clear out any live callers -# endif -#endif - .endm // window_spill8 - - .macro window_spill12 -#if XCHAL_HAVE_WINDOWED -# if XCHAL_NUM_AREGS == 16 - movi a15, 0 // for 16-register files, no need to call to reach the end -# elif XCHAL_NUM_AREGS == 32 - call12 .L__wdwspill_assist20 // call deep enough to clear out any live callers -# elif XCHAL_NUM_AREGS == 64 - call12 .L__wdwspill_assist52 // call deep enough to clear out any live callers -# endif -#endif - .endm // window_spill12 - -/*---------------------------------------------------------------------- - * window_spill_function - * - * This macro outputs a function that will spill its caller's callers' - * register windows to the stack. Eg. it could be used to implement - * a version of xthal_window_spill() that works in non-privileged tasks. - * This works for both privileged and non-privileged tasks. - * - * Typical usage: - * - * .text - * .align 4 - * .global my_spill_function - * .type my_spill_function,@function - * my_spill_function: - * window_spill_function - * - * On entry to resulting function: - * none - * On exit from resulting function: - * none (no caller windows are in live registers) - */ - - .macro window_spill_function -#if XCHAL_HAVE_WINDOWED -# if XCHAL_NUM_AREGS == 32 - entry sp, 48 - bbci.l a0, 31, 1f // branch if called with call4 - bbsi.l a0, 30, 2f // branch if called with call12 - call8 .L__wdwspill_assist16 // called with call8, only need another 8 - retw -1: call12 .L__wdwspill_assist16 // called with call4, only need another 12 - retw -2: call4 .L__wdwspill_assist16 // called with call12, only need another 4 - retw -# elif XCHAL_NUM_AREGS == 64 - entry sp, 48 - bbci.l a0, 31, 1f // branch if called with call4 - bbsi.l a0, 30, 2f // branch if called with call12 - call4 .L__wdwspill_assist52 // called with call8, only need a call4 - retw -1: call8 .L__wdwspill_assist52 // called with call4, only need a call8 - retw -2: call12 .L__wdwspill_assist40 // called with call12, can skip a call12 - retw -# elif XCHAL_NUM_AREGS == 16 - entry sp, 16 - bbci.l a0, 31, 1f // branch if called with call4 - bbsi.l a0, 30, 2f // branch if called with call12 - movi a7, 0 // called with call8 - retw -1: movi a11, 0 // called with call4 -2: retw // if called with call12, everything already spilled - -// movi a15, 0 // trick to spill all but the direct caller -// j 1f -// // The entry instruction is magical in the assembler (gets auto-aligned) -// // so we have to jump to it to avoid falling through the padding. -// // We need entry/retw to know where to return. -//1: entry sp, 16 -// retw -# else -# error "unrecognized address register file size" -# endif -#endif /* XCHAL_HAVE_WINDOWED */ - window_spill_common - .endm // window_spill_function - -/*---------------------------------------------------------------------- - * window_spill_common - * - * Common code used by any number of invocations of the window_spill## - * and window_spill_function macros. - * - * Must be instantiated exactly once within a given assembly unit, - * within call/j range of and same section as window_spill## - * macro invocations for that assembly unit. - * (Is automatically instantiated by the window_spill_function macro.) - */ - - .macro window_spill_common -#if XCHAL_HAVE_WINDOWED && (XCHAL_NUM_AREGS == 32 || XCHAL_NUM_AREGS == 64) - .ifndef .L__wdwspill_defined -# if XCHAL_NUM_AREGS >= 64 -.L__wdwspill_assist60: - entry sp, 32 - call8 .L__wdwspill_assist52 - retw -.L__wdwspill_assist56: - entry sp, 16 - call4 .L__wdwspill_assist52 - retw -.L__wdwspill_assist52: - entry sp, 48 - call12 .L__wdwspill_assist40 - retw -.L__wdwspill_assist40: - entry sp, 48 - call12 .L__wdwspill_assist28 - retw -# endif -.L__wdwspill_assist28: - entry sp, 48 - call12 .L__wdwspill_assist16 - retw -.L__wdwspill_assist24: - entry sp, 32 - call8 .L__wdwspill_assist16 - retw -.L__wdwspill_assist20: - entry sp, 16 - call4 .L__wdwspill_assist16 - retw -.L__wdwspill_assist16: - entry sp, 16 - movi a15, 0 - retw - .set .L__wdwspill_defined, 1 - .endif -#endif /* XCHAL_HAVE_WINDOWED with 32 or 64 aregs */ - .endm // window_spill_common - -/*---------------------------------------------------------------------- - * beqi32 - * - * macro implements version of beqi for arbitrary 32-bit immidiate value - * - * beqi32 ax, ay, imm32, label - * - * Compares value in register ax with imm32 value and jumps to label if - * equal. Clobberes register ay if needed - * - */ - .macro beqi32 ax, ay, imm, label - .ifeq ((\imm-1) & ~7) // 1..8 ? - beqi \ax, \imm, \label - .else - .ifeq (\imm+1) // -1 ? - beqi \ax, \imm, \label - .else - .ifeq (\imm) // 0 ? - beqz \ax, \label - .else - // We could also handle immediates 10,12,16,32,64,128,256 - // but it would be a long macro... - movi \ay, \imm - beq \ax, \ay, \label - .endif - .endif - .endif - .endm // beqi32 - -#endif /*XTENSA_COREASM_H*/ - diff --git a/include/asm-xtensa/xtensa/corebits.h b/include/asm-xtensa/xtensa/corebits.h deleted file mode 100644 index e578ade4163..00000000000 --- a/include/asm-xtensa/xtensa/corebits.h +++ /dev/null @@ -1,77 +0,0 @@ -#ifndef XTENSA_COREBITS_H -#define XTENSA_COREBITS_H - -/* - * THIS FILE IS GENERATED -- DO NOT MODIFY BY HAND - * - * xtensa/corebits.h - Xtensa Special Register field positions and masks. - * - * (In previous releases, these were defined in specreg.h, a generated file. - * This file is not generated, i.e. it is processor configuration independent.) - */ - - -/* EXCCAUSE register fields: */ -#define EXCCAUSE_EXCCAUSE_SHIFT 0 -#define EXCCAUSE_EXCCAUSE_MASK 0x3F -/* Exception causes (mostly incomplete!): */ -#define EXCCAUSE_ILLEGAL 0 -#define EXCCAUSE_SYSCALL 1 -#define EXCCAUSE_IFETCHERROR 2 -#define EXCCAUSE_LOADSTOREERROR 3 -#define EXCCAUSE_LEVEL1INTERRUPT 4 -#define EXCCAUSE_ALLOCA 5 - -/* PS register fields: */ -#define PS_WOE_SHIFT 18 -#define PS_WOE_MASK 0x00040000 -#define PS_WOE PS_WOE_MASK -#define PS_CALLINC_SHIFT 16 -#define PS_CALLINC_MASK 0x00030000 -#define PS_CALLINC(n) (((n)&3)<<PS_CALLINC_SHIFT) /* n = 0..3 */ -#define PS_OWB_SHIFT 8 -#define PS_OWB_MASK 0x00000F00 -#define PS_OWB(n) (((n)&15)<<PS_OWB_SHIFT) /* n = 0..15 (or 0..7) */ -#define PS_RING_SHIFT 6 -#define PS_RING_MASK 0x000000C0 -#define PS_RING(n) (((n)&3)<<PS_RING_SHIFT) /* n = 0..3 */ -#define PS_UM_SHIFT 5 -#define PS_UM_MASK 0x00000020 -#define PS_UM PS_UM_MASK -#define PS_EXCM_SHIFT 4 -#define PS_EXCM_MASK 0x00000010 -#define PS_EXCM PS_EXCM_MASK -#define PS_INTLEVEL_SHIFT 0 -#define PS_INTLEVEL_MASK 0x0000000F -#define PS_INTLEVEL(n) ((n)&PS_INTLEVEL_MASK) /* n = 0..15 */ -/* Backward compatibility (deprecated): */ -#define PS_PROGSTACK_SHIFT PS_UM_SHIFT -#define PS_PROGSTACK_MASK PS_UM_MASK -#define PS_PROG_SHIFT PS_UM_SHIFT -#define PS_PROG_MASK PS_UM_MASK -#define PS_PROG PS_UM - -/* DBREAKCn register fields: */ -#define DBREAKC_MASK_SHIFT 0 -#define DBREAKC_MASK_MASK 0x0000003F -#define DBREAKC_LOADBREAK_SHIFT 30 -#define DBREAKC_LOADBREAK_MASK 0x40000000 -#define DBREAKC_STOREBREAK_SHIFT 31 -#define DBREAKC_STOREBREAK_MASK 0x80000000 - -/* DEBUGCAUSE register fields: */ -#define DEBUGCAUSE_DEBUGINT_SHIFT 5 -#define DEBUGCAUSE_DEBUGINT_MASK 0x20 /* debug interrupt */ -#define DEBUGCAUSE_BREAKN_SHIFT 4 -#define DEBUGCAUSE_BREAKN_MASK 0x10 /* BREAK.N instruction */ -#define DEBUGCAUSE_BREAK_SHIFT 3 -#define DEBUGCAUSE_BREAK_MASK 0x08 /* BREAK instruction */ -#define DEBUGCAUSE_DBREAK_SHIFT 2 -#define DEBUGCAUSE_DBREAK_MASK 0x04 /* DBREAK match */ -#define DEBUGCAUSE_IBREAK_SHIFT 1 -#define DEBUGCAUSE_IBREAK_MASK 0x02 /* IBREAK match */ -#define DEBUGCAUSE_ICOUNT_SHIFT 0 -#define DEBUGCAUSE_ICOUNT_MASK 0x01 /* ICOUNT would increment to zero */ - -#endif /*XTENSA_COREBITS_H*/ - diff --git a/include/asm-xtensa/xtensa/hal.h b/include/asm-xtensa/xtensa/hal.h deleted file mode 100644 index d1047250545..00000000000 --- a/include/asm-xtensa/xtensa/hal.h +++ /dev/null @@ -1,822 +0,0 @@ -#ifndef XTENSA_HAL_H -#define XTENSA_HAL_H - -/* - * THIS FILE IS GENERATED -- DO NOT MODIFY BY HAND - * - * include/asm-xtensa/xtensa/hal.h -- contains a definition of the - * Core HAL interface. - * - * All definitions in this header file are independent of any specific - * Xtensa processor configuration. Thus an OS or other software can - * include this header file and be compiled into configuration- - * independent objects that can be distributed and eventually linked - * to the HAL library (libhal.a) to create a configuration-specific - * final executable. - * - * Certain definitions, however, are release-specific -- such as the - * XTHAL_RELEASE_xxx macros (or additions made in later releases). - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2002 Tensilica Inc. - */ - - -/*---------------------------------------------------------------------- - Constant Definitions - (shared with assembly) - ----------------------------------------------------------------------*/ - -/* Software release information (not configuration-specific!): */ -#define XTHAL_RELEASE_MAJOR 1050 -#define XTHAL_RELEASE_MINOR 0 -#define XTHAL_RELEASE_NAME "T1050.0-2002-08-06-eng0" -#define XTHAL_RELEASE_INTERNAL "2002-08-06-eng0" -#define XTHAL_REL_T1050 1 -#define XTHAL_REL_T1050_0 1 -#define XTHAL_REL_T1050_0_2002 1 -#define XTHAL_REL_T1050_0_2002_08 1 -#define XTHAL_REL_T1050_0_2002_08_06 1 -#define XTHAL_REL_T1050_0_2002_08_06_ENG0 1 - -/* HAL version numbers (these names are for backward compatibility): */ -#define XTHAL_MAJOR_REV XTHAL_RELEASE_MAJOR -#define XTHAL_MINOR_REV XTHAL_RELEASE_MINOR -/* - * A bit of software release history on values of XTHAL_{MAJOR,MINOR}_REV: - * - * Release MAJOR MINOR Comment - * ======= ===== ===== ======= - * T1015.n n/a n/a (HAL not yet available) - * T1020.{0,1,2} 0 1 (HAL beta) - * T1020.{3,4} 0 2 First release. - * T1020.n (n>4) 0 2 or >3 (TBD) - * T1030.0 0 1 (HAL beta) - * T1030.{1,2} 0 3 Equivalent to first release. - * T1030.n (n>=3) 0 >= 3 (TBD) - * T1040.n 1040 n Full CHAL available from T1040.2 - * T1050.n 1050 n Current release. - * - * - * Note: there is a distinction between the software release with - * which something is compiled (accessible using XTHAL_RELEASE_* macros) - * and the software release with which the HAL library was compiled - * (accessible using Xthal_release_* global variables). This - * distinction is particularly relevant for vendors that distribute - * configuration-independent binaries (eg. an OS), where their customer - * might link it with a HAL of a different Xtensa software release. - * In this case, it may be appropriate for the OS to verify at run-time - * whether XTHAL_RELEASE_* and Xthal_release_* are compatible. - * [Guidelines as to which release is compatible with which are not - * currently provided explicitly, but might be inferred from reading - * OSKit documentation for all releases -- compatibility is also highly - * dependent on which HAL features are used. Each release is usually - * backward compatible, with very few exceptions if any.] - * - * Notes: - * Tornado 2.0 supported in T1020.3+, T1030.1+, and T1040.{0,1} only. - * Tornado 2.0.2 supported in T1040.2+, and T1050. - * Compile-time HAL port of NucleusPlus supported by T1040.2+ and T1050. - */ - - -/* - * Architectural limits, independent of configuration. - * Note that these are ISA-defined limits, not micro-architecture implementation - * limits enforced by the Xtensa Processor Generator (which may be stricter than - * these below). - */ -#define XTHAL_MAX_CPS 8 /* max number of coprocessors (0..7) */ -#define XTHAL_MAX_INTERRUPTS 32 /* max number of interrupts (0..31) */ -#define XTHAL_MAX_INTLEVELS 16 /* max number of interrupt levels (0..15) */ - /* (as of T1040, implementation limit is 7: 0..6) */ -#define XTHAL_MAX_TIMERS 4 /* max number of timers (CCOMPARE0..CCOMPARE3) */ - /* (as of T1040, implementation limit is 3: 0..2) */ - -/* Misc: */ -#define XTHAL_LITTLEENDIAN 0 -#define XTHAL_BIGENDIAN 1 - - -/* Interrupt types: */ -#define XTHAL_INTTYPE_UNCONFIGURED 0 -#define XTHAL_INTTYPE_SOFTWARE 1 -#define XTHAL_INTTYPE_EXTERN_EDGE 2 -#define XTHAL_INTTYPE_EXTERN_LEVEL 3 -#define XTHAL_INTTYPE_TIMER 4 -#define XTHAL_INTTYPE_NMI 5 -#define XTHAL_MAX_INTTYPES 6 /* number of interrupt types */ - -/* Timer related: */ -#define XTHAL_TIMER_UNCONFIGURED -1 /* Xthal_timer_interrupt[] value for non-existent timers */ -#define XTHAL_TIMER_UNASSIGNED XTHAL_TIMER_UNCONFIGURED /* (for backwards compatibility only) */ - - -/* Access Mode bits (tentative): */ /* bit abbr unit short_name PPC equ - Description */ -#define XTHAL_AMB_EXCEPTION 0 /* 001 E EX fls: EXception none - generate exception on any access (aka "illegal") */ -#define XTHAL_AMB_HITCACHE 1 /* 002 C CH fls: use Cache on Hit ~(I CI) - use cache on hit -- way from tag match [or H HC, or U UC] (ISA: same, except for Isolate case) */ -#define XTHAL_AMB_ALLOCATE 2 /* 004 A AL fl?: ALlocate none - refill cache on miss -- way from LRU [or F FI fill] (ISA: Read/Write Miss Refill) */ -#define XTHAL_AMB_WRITETHRU 3 /* 008 W WT --s: WriteThrough W WT - store immediately to memory (ISA: same) */ -#define XTHAL_AMB_ISOLATE 4 /* 010 I IS fls: ISolate none - use cache regardless of hit-vs-miss -- way from vaddr (ISA: use-cache-on-miss+hit) */ -#define XTHAL_AMB_GUARD 5 /* 020 G GU ?l?: GUard G * - non-speculative; spec/replay refs not permitted */ -#if 0 -#define XTHAL_AMB_ORDERED x /* 000 O OR fls: ORdered G * - mem accesses cannot be out of order */ -#define XTHAL_AMB_FUSEWRITES x /* 000 F FW --s: FuseWrites none - allow combining/merging multiple writes (to same datapath data unit) into one (implied by writeback) */ -#define XTHAL_AMB_COHERENT x /* 000 M MC fl?: Mem/MP Coherent M - on reads, other CPUs/bus-masters may need to supply data */ -#define XTHAL_AMB_TRUSTED x /* 000 T TR ?l?: TRusted none - memory will not bus error (if it does, handle as fatal imprecise interrupt) */ -#define XTHAL_AMB_PREFETCH x /* 000 P PR fl?: PRefetch none - on refill, read line+1 into prefetch buffers */ -#define XTHAL_AMB_STREAM x /* 000 S ST ???: STreaming none - access one of N stream buffers */ -#endif /*0*/ - -#define XTHAL_AM_EXCEPTION (1<<XTHAL_AMB_EXCEPTION) -#define XTHAL_AM_HITCACHE (1<<XTHAL_AMB_HITCACHE) -#define XTHAL_AM_ALLOCATE (1<<XTHAL_AMB_ALLOCATE) -#define XTHAL_AM_WRITETHRU (1<<XTHAL_AMB_WRITETHRU) -#define XTHAL_AM_ISOLATE (1<<XTHAL_AMB_ISOLATE) -#define XTHAL_AM_GUARD (1<<XTHAL_AMB_GUARD) -#if 0 -#define XTHAL_AM_ORDERED (1<<XTHAL_AMB_ORDERED) -#define XTHAL_AM_FUSEWRITES (1<<XTHAL_AMB_FUSEWRITES) -#define XTHAL_AM_COHERENT (1<<XTHAL_AMB_COHERENT) -#define XTHAL_AM_TRUSTED (1<<XTHAL_AMB_TRUSTED) -#define XTHAL_AM_PREFETCH (1<<XTHAL_AMB_PREFETCH) -#define XTHAL_AM_STREAM (1<<XTHAL_AMB_STREAM) -#endif /*0*/ - -/* - * Allowed Access Modes (bit combinations). - * - * Columns are: - * "FOGIWACE" - * Access mode bits (see XTHAL_AMB_xxx above). - * <letter> = bit is set - * '-' = bit is clear - * '.' = bit is irrelevant / don't care, as follows: - * E=1 makes all others irrelevant - * W,F relevant only for stores - * "2345" - * Indicates which Xtensa releases support the corresponding - * access mode. Releases for each character column are: - * 2 = prior to T1020.2: T1015 (V1.5), T1020.0, T1020.1 - * 3 = T1020.2 and later: T1020.2+, T1030 - * 4 = T1040 - * 5 = T1050 (maybe) - * And the character column contents are: - * <number> = support by release(s) - * "." = unsupported by release(s) - * "?" = support unknown - */ - /* FOGIWACE 2345 */ -/* For instruction fetch: */ -#define XTHAL_FAM_EXCEPTION 0x001 /* .......E 2345 exception */ -#define XTHAL_FAM_ISOLATE 0x012 /* .--I.-C- .... isolate */ -#define XTHAL_FAM_BYPASS 0x000 /* .---.--- 2345 bypass */ -#define XTHAL_FAM_NACACHED 0x002 /* .---.-C- .... cached no-allocate (frozen) */ -#define XTHAL_FAM_CACHED 0x006 /* .---.AC- 2345 cached */ -/* For data load: */ -#define XTHAL_LAM_EXCEPTION 0x001 /* .......E 2345 exception */ -#define XTHAL_LAM_ISOLATE 0x012 /* .--I.-C- 2345 isolate */ -#define XTHAL_LAM_BYPASS 0x000 /* .O--.--- 2... bypass speculative */ -#define XTHAL_LAM_BYPASSG 0x020 /* .OG-.--- .345 bypass guarded */ -#define XTHAL_LAM_NACACHED 0x002 /* .O--.-C- 2... cached no-allocate speculative */ -#define XTHAL_LAM_NACACHEDG 0x022 /* .OG-.-C- .345 cached no-allocate guarded */ -#define XTHAL_LAM_CACHED 0x006 /* .---.AC- 2345 cached speculative */ -#define XTHAL_LAM_CACHEDG 0x026 /* .?G-.AC- .... cached guarded */ -/* For data store: */ -#define XTHAL_SAM_EXCEPTION 0x001 /* .......E 2345 exception */ -#define XTHAL_SAM_ISOLATE 0x032 /* .-GI--C- 2345 isolate */ -#define XTHAL_SAM_BYPASS 0x028 /* -OG-W--- 2345 bypass */ -/*efine XTHAL_SAM_BYPASSF 0x028*/ /* F-G-W--- ...? bypass write-combined */ -#define XTHAL_SAM_WRITETHRU 0x02A /* -OG-W-C- 234? writethrough */ -/*efine XTHAL_SAM_WRITETHRUF 0x02A*/ /* F-G-W-C- ...5 writethrough write-combined */ -#define XTHAL_SAM_WRITEALLOC 0x02E /* -OG-WAC- ...? writethrough-allocate */ -/*efine XTHAL_SAM_WRITEALLOCF 0x02E*/ /* F-G-WAC- ...? writethrough-allocate write-combined */ -#define XTHAL_SAM_WRITEBACK 0x026 /* F-G--AC- ...5 writeback */ - -#if 0 -/* - Cache attribute encoding for CACHEATTR (per ISA): - (Note: if this differs from ISA Ref Manual, ISA has precedence) - - Inst-fetches Loads Stores - ------------- ------------ ------------- -0x0 FCA_EXCEPTION ?LCA_NACACHED_G* SCA_WRITETHRU "uncached" -0x1 FCA_CACHED LCA_CACHED SCA_WRITETHRU cached -0x2 FCA_BYPASS LCA_BYPASS_G* SCA_BYPASS bypass -0x3 FCA_CACHED LCA_CACHED SCA_WRITEALLOCF write-allocate - or LCA_EXCEPTION SCA_EXCEPTION (if unimplemented) -0x4 FCA_CACHED LCA_CACHED SCA_WRITEBACK write-back - or LCA_EXCEPTION SCA_EXCEPTION (if unimplemented) -0x5..D FCA_EXCEPTION LCA_EXCEPTION SCA_EXCEPTION (reserved) -0xE FCA_EXCEPTION LCA_ISOLATE SCA_ISOLATE isolate -0xF FCA_EXCEPTION LCA_EXCEPTION SCA_EXCEPTION illegal - * Prior to T1020.2?, guard feature not supported, this defaulted to speculative (no _G) -*/ -#endif /*0*/ - - -#if !defined(__ASSEMBLY__) && !defined(_NOCLANGUAGE) -#ifdef __cplusplus -extern "C" { -#endif - -/*---------------------------------------------------------------------- - HAL - ----------------------------------------------------------------------*/ - -/* Constant to be checked in build = (XTHAL_MAJOR_REV<<16)|XTHAL_MINOR_REV */ -extern const unsigned int Xthal_rev_no; - - -/*---------------------------------------------------------------------- - Processor State - ----------------------------------------------------------------------*/ -/* save & restore the extra processor state */ -extern void xthal_save_extra(void *base); -extern void xthal_restore_extra(void *base); - -extern void xthal_save_cpregs(void *base, int); -extern void xthal_restore_cpregs(void *base, int); - -/*extern void xthal_save_all_extra(void *base);*/ -/*extern void xthal_restore_all_extra(void *base);*/ - -/* space for processor state */ -extern const unsigned int Xthal_extra_size; -extern const unsigned int Xthal_extra_align; -/* space for TIE register files */ -extern const unsigned int Xthal_cpregs_size[XTHAL_MAX_CPS]; -extern const unsigned int Xthal_cpregs_align[XTHAL_MAX_CPS]; - -/* total of space for the processor state (for Tor2) */ -extern const unsigned int Xthal_all_extra_size; -extern const unsigned int Xthal_all_extra_align; - -/* initialize the extra processor */ -/*extern void xthal_init_extra(void);*/ -/* initialize the TIE coprocessor */ -/*extern void xthal_init_cp(int);*/ - -/* initialize the extra processor */ -extern void xthal_init_mem_extra(void *); -/* initialize the TIE coprocessor */ -extern void xthal_init_mem_cp(void *, int); - -/* validate & invalidate the TIE register file */ -extern void xthal_validate_cp(int); -extern void xthal_invalidate_cp(int); - -/* the number of TIE coprocessors contiguous from zero (for Tor2) */ -extern const unsigned int Xthal_num_coprocessors; - -/* actual number of coprocessors */ -extern const unsigned char Xthal_cp_num; -/* index of highest numbered coprocessor, plus one */ -extern const unsigned char Xthal_cp_max; -/* index of highest allowed coprocessor number, per cfg, plus one */ -/*extern const unsigned char Xthal_cp_maxcfg;*/ -/* bitmask of which coprocessors are present */ -extern const unsigned int Xthal_cp_mask; - -/* read and write cpenable register */ -extern void xthal_set_cpenable(unsigned); -extern unsigned xthal_get_cpenable(void); - -/* read & write extra state register */ -/*extern int xthal_read_extra(void *base, unsigned reg, unsigned *value);*/ -/*extern int xthal_write_extra(void *base, unsigned reg, unsigned value);*/ - -/* read & write a TIE coprocessor register */ -/*extern int xthal_read_cpreg(void *base, int cp, unsigned reg, unsigned *value);*/ -/*extern int xthal_write_cpreg(void *base, int cp, unsigned reg, unsigned value);*/ - -/* return coprocessor number based on register */ -/*extern int xthal_which_cp(unsigned reg);*/ - -/*---------------------------------------------------------------------- - Interrupts - ----------------------------------------------------------------------*/ - -/* the number of interrupt levels */ -extern const unsigned char Xthal_num_intlevels; -/* the number of interrupts */ -extern const unsigned char Xthal_num_interrupts; - -/* mask for level of interrupts */ -extern const unsigned int Xthal_intlevel_mask[XTHAL_MAX_INTLEVELS]; -/* mask for level 0 to N interrupts */ -extern const unsigned int Xthal_intlevel_andbelow_mask[XTHAL_MAX_INTLEVELS]; - -/* level of each interrupt */ -extern const unsigned char Xthal_intlevel[XTHAL_MAX_INTERRUPTS]; - -/* type per interrupt */ -extern const unsigned char Xthal_inttype[XTHAL_MAX_INTERRUPTS]; - -/* masks of each type of interrupt */ -extern const unsigned int Xthal_inttype_mask[XTHAL_MAX_INTTYPES]; - -/* interrupt numbers assigned to each timer interrupt */ -extern const int Xthal_timer_interrupt[XTHAL_MAX_TIMERS]; - -/*** Virtual interrupt prioritization: ***/ - -/* Convert between interrupt levels (as per PS.INTLEVEL) and virtual interrupt priorities: */ -extern unsigned xthal_vpri_to_intlevel(unsigned vpri); -extern unsigned xthal_intlevel_to_vpri(unsigned intlevel); - -/* Enables/disables given set (mask) of interrupts; returns previous enabled-mask of all ints: */ -extern unsigned xthal_int_enable(unsigned); -extern unsigned xthal_int_disable(unsigned); - -/* Set/get virtual priority of an interrupt: */ -extern int xthal_set_int_vpri(int intnum, int vpri); -extern int xthal_get_int_vpri(int intnum); - -/* Set/get interrupt lockout level for exclusive access to virtual priority data structures: */ -extern void xthal_set_vpri_locklevel(unsigned intlevel); -extern unsigned xthal_get_vpri_locklevel(void); - -/* Set/get current virtual interrupt priority: */ -extern unsigned xthal_set_vpri(unsigned vpri); -extern unsigned xthal_get_vpri(unsigned vpri); -extern unsigned xthal_set_vpri_intlevel(unsigned intlevel); -extern unsigned xthal_set_vpri_lock(void); - - - -/*---------------------------------------------------------------------- - Generic Interrupt Trampolining Support - ----------------------------------------------------------------------*/ - -typedef void (XtHalVoidFunc)(void); - -/* - * Bitmask of interrupts currently trampolining down: - */ -extern unsigned Xthal_tram_pending; - -/* - * Bitmask of which interrupts currently trampolining down - * synchronously are actually enabled; this bitmask is necessary - * because INTENABLE cannot hold that state (sync-trampolining - * interrupts must be kept disabled while trampolining); - * in the current implementation, any bit set here is not set - * in INTENABLE, and vice-versa; once a sync-trampoline is - * handled (at level one), its enable bit must be moved from - * here to INTENABLE: - */ -extern unsigned Xthal_tram_enabled; - -/* - * Bitmask of interrupts configured for sync trampolining: - */ -extern unsigned Xthal_tram_sync; - - -/* Trampoline support functions: */ -extern unsigned xthal_tram_pending_to_service( void ); -extern void xthal_tram_done( unsigned serviced_mask ); -extern int xthal_tram_set_sync( int intnum, int sync ); -extern XtHalVoidFunc* xthal_set_tram_trigger_func( XtHalVoidFunc *trigger_fn ); - -/* INTENABLE,INTREAD,INTSET,INTCLEAR register access functions: */ -extern unsigned xthal_get_intenable( void ); -extern void xthal_set_intenable( unsigned ); -extern unsigned xthal_get_intread( void ); -extern void xthal_set_intset( unsigned ); -extern void xthal_set_intclear( unsigned ); - - -/*---------------------------------------------------------------------- - Register Windows - ----------------------------------------------------------------------*/ - -/* number of registers in register window */ -extern const unsigned int Xthal_num_aregs; -extern const unsigned char Xthal_num_aregs_log2; - -/* This spill any live register windows (other than the caller's): */ -extern void xthal_window_spill( void ); - - -/*---------------------------------------------------------------------- - Cache - ----------------------------------------------------------------------*/ - -/* size of the cache lines in log2(bytes) */ -extern const unsigned char Xthal_icache_linewidth; -extern const unsigned char Xthal_dcache_linewidth; -/* size of the cache lines in bytes */ -extern const unsigned short Xthal_icache_linesize; -extern const unsigned short Xthal_dcache_linesize; -/* number of cache sets in log2(lines per way) */ -extern const unsigned char Xthal_icache_setwidth; -extern const unsigned char Xthal_dcache_setwidth; -/* cache set associativity (number of ways) */ -extern const unsigned int Xthal_icache_ways; -extern const unsigned int Xthal_dcache_ways; -/* size of the caches in bytes (ways * 2^(linewidth + setwidth)) */ -extern const unsigned int Xthal_icache_size; -extern const unsigned int Xthal_dcache_size; -/* cache features */ -extern const unsigned char Xthal_dcache_is_writeback; -extern const unsigned char Xthal_icache_line_lockable; -extern const unsigned char Xthal_dcache_line_lockable; - -/* cache attribute register control (used by other HAL routines) */ -extern unsigned xthal_get_cacheattr( void ); -extern unsigned xthal_get_icacheattr( void ); -extern unsigned xthal_get_dcacheattr( void ); -extern void xthal_set_cacheattr( unsigned ); -extern void xthal_set_icacheattr( unsigned ); -extern void xthal_set_dcacheattr( unsigned ); - -/* initialize cache support (must be called once at startup, before all other cache calls) */ -/*extern void xthal_cache_startinit( void );*/ -/* reset caches */ -/*extern void xthal_icache_reset( void );*/ -/*extern void xthal_dcache_reset( void );*/ -/* enable caches */ -extern void xthal_icache_enable( void ); /* DEPRECATED */ -extern void xthal_dcache_enable( void ); /* DEPRECATED */ -/* disable caches */ -extern void xthal_icache_disable( void ); /* DEPRECATED */ -extern void xthal_dcache_disable( void ); /* DEPRECATED */ - -/* invalidate the caches */ -extern void xthal_icache_all_invalidate( void ); -extern void xthal_dcache_all_invalidate( void ); -extern void xthal_icache_region_invalidate( void *addr, unsigned size ); -extern void xthal_dcache_region_invalidate( void *addr, unsigned size ); -extern void xthal_icache_line_invalidate(void *addr); -extern void xthal_dcache_line_invalidate(void *addr); -/* write dirty data back */ -extern void xthal_dcache_all_writeback( void ); -extern void xthal_dcache_region_writeback( void *addr, unsigned size ); -extern void xthal_dcache_line_writeback(void *addr); -/* write dirty data back and invalidate */ -extern void xthal_dcache_all_writeback_inv( void ); -extern void xthal_dcache_region_writeback_inv( void *addr, unsigned size ); -extern void xthal_dcache_line_writeback_inv(void *addr); -/* prefetch and lock specified memory range into cache */ -extern void xthal_icache_region_lock( void *addr, unsigned size ); -extern void xthal_dcache_region_lock( void *addr, unsigned size ); -extern void xthal_icache_line_lock(void *addr); -extern void xthal_dcache_line_lock(void *addr); -/* unlock from cache */ -extern void xthal_icache_all_unlock( void ); -extern void xthal_dcache_all_unlock( void ); -extern void xthal_icache_region_unlock( void *addr, unsigned size ); -extern void xthal_dcache_region_unlock( void *addr, unsigned size ); -extern void xthal_icache_line_unlock(void *addr); -extern void xthal_dcache_line_unlock(void *addr); - - -/* sync icache and memory */ -extern void xthal_icache_sync( void ); -/* sync dcache and memory */ -extern void xthal_dcache_sync( void ); - -/*---------------------------------------------------------------------- - Debug - ----------------------------------------------------------------------*/ - -/* 1 if debug option configured, 0 if not: */ -extern const int Xthal_debug_configured; - -/* Number of instruction and data break registers: */ -extern const int Xthal_num_ibreak; -extern const int Xthal_num_dbreak; - -/* Set (plant) and remove software breakpoint, both synchronizing cache: */ -extern unsigned int xthal_set_soft_break(void *addr); -extern void xthal_remove_soft_break(void *addr, unsigned int); - - -/*---------------------------------------------------------------------- - Disassembler - ----------------------------------------------------------------------*/ - -/* Max expected size of the return buffer for a disassembled instruction (hint only): */ -#define XTHAL_DISASM_BUFSIZE 80 - -/* Disassembly option bits for selecting what to return: */ -#define XTHAL_DISASM_OPT_ADDR 0x0001 /* display address */ -#define XTHAL_DISASM_OPT_OPHEX 0x0002 /* display opcode bytes in hex */ -#define XTHAL_DISASM_OPT_OPCODE 0x0004 /* display opcode name (mnemonic) */ -#define XTHAL_DISASM_OPT_PARMS 0x0008 /* display parameters */ -#define XTHAL_DISASM_OPT_ALL 0x0FFF /* display everything */ - -/* routine to get a string for the disassembled instruction */ -extern int xthal_disassemble( unsigned char *instr_buf, void *tgt_addr, - char *buffer, unsigned buflen, unsigned options ); - -/* routine to get the size of the next instruction. Returns 0 for - illegal instruction */ -extern int xthal_disassemble_size( unsigned char *instr_buf ); - - -/*---------------------------------------------------------------------- - Core Counter - ----------------------------------------------------------------------*/ - -/* counter info */ -extern const unsigned char Xthal_have_ccount; /* set if CCOUNT register present */ -extern const unsigned char Xthal_num_ccompare; /* number of CCOMPAREn registers */ - -/* get CCOUNT register (if not present return 0) */ -extern unsigned xthal_get_ccount(void); - -/* set and get CCOMPAREn registers (if not present, get returns 0) */ -extern void xthal_set_ccompare(int, unsigned); -extern unsigned xthal_get_ccompare(int); - - -/*---------------------------------------------------------------------- - Instruction/Data RAM/ROM Access - ----------------------------------------------------------------------*/ - -extern void* xthal_memcpy(void *dst, const void *src, unsigned len); -extern void* xthal_bcopy(const void *src, void *dst, unsigned len); - -/*---------------------------------------------------------------------- - MP Synchronization - ----------------------------------------------------------------------*/ -extern int xthal_compare_and_set( int *addr, int test_val, int compare_val ); -extern unsigned xthal_get_prid( void ); - -/*extern const char Xthal_have_s32c1i;*/ -extern const unsigned char Xthal_have_prid; - - -/*---------------------------------------------------------------------- - Miscellaneous - ----------------------------------------------------------------------*/ - -extern const unsigned int Xthal_release_major; -extern const unsigned int Xthal_release_minor; -extern const char * const Xthal_release_name; -extern const char * const Xthal_release_internal; - -extern const unsigned char Xthal_memory_order; -extern const unsigned char Xthal_have_windowed; -extern const unsigned char Xthal_have_density; -extern const unsigned char Xthal_have_booleans; -extern const unsigned char Xthal_have_loops; -extern const unsigned char Xthal_have_nsa; -extern const unsigned char Xthal_have_minmax; -extern const unsigned char Xthal_have_sext; -extern const unsigned char Xthal_have_clamps; -extern const unsigned char Xthal_have_mac16; -extern const unsigned char Xthal_have_mul16; -extern const unsigned char Xthal_have_fp; -extern const unsigned char Xthal_have_speculation; -extern const unsigned char Xthal_have_exceptions; -extern const unsigned char Xthal_xea_version; -extern const unsigned char Xthal_have_interrupts; -extern const unsigned char Xthal_have_highlevel_interrupts; -extern const unsigned char Xthal_have_nmi; - -extern const unsigned short Xthal_num_writebuffer_entries; - -extern const unsigned int Xthal_build_unique_id; -/* Release info for hardware targeted by software upgrades: */ -extern const unsigned int Xthal_hw_configid0; -extern const unsigned int Xthal_hw_configid1; -extern const unsigned int Xthal_hw_release_major; -extern const unsigned int Xthal_hw_release_minor; -extern const char * const Xthal_hw_release_name; -extern const char * const Xthal_hw_release_internal; - - -/* Internal memories... */ - -extern const unsigned char Xthal_num_instrom; -extern const unsigned char Xthal_num_instram; -extern const unsigned char Xthal_num_datarom; -extern const unsigned char Xthal_num_dataram; -extern const unsigned char Xthal_num_xlmi; -extern const unsigned int Xthal_instrom_vaddr[1]; -extern const unsigned int Xthal_instrom_paddr[1]; -extern const unsigned int Xthal_instrom_size [1]; -extern const unsigned int Xthal_instram_vaddr[1]; -extern const unsigned int Xthal_instram_paddr[1]; -extern const unsigned int Xthal_instram_size [1]; -extern const unsigned int Xthal_datarom_vaddr[1]; -extern const unsigned int Xthal_datarom_paddr[1]; -extern const unsigned int Xthal_datarom_size [1]; -extern const unsigned int Xthal_dataram_vaddr[1]; -extern const unsigned int Xthal_dataram_paddr[1]; -extern const unsigned int Xthal_dataram_size [1]; -extern const unsigned int Xthal_xlmi_vaddr[1]; -extern const unsigned int Xthal_xlmi_paddr[1]; -extern const unsigned int Xthal_xlmi_size [1]; - - - -/*---------------------------------------------------------------------- - Memory Management Unit - ----------------------------------------------------------------------*/ - -extern const unsigned char Xthal_have_spanning_way; -extern const unsigned char Xthal_have_identity_map; -extern const unsigned char Xthal_have_mimic_cacheattr; -extern const unsigned char Xthal_have_xlt_cacheattr; -extern const unsigned char Xthal_have_cacheattr; -extern const unsigned char Xthal_have_tlbs; - -extern const unsigned char Xthal_mmu_asid_bits; /* 0 .. 8 */ -extern const unsigned char Xthal_mmu_asid_kernel; -extern const unsigned char Xthal_mmu_rings; /* 1 .. 4 (perhaps 0 if no MMU and/or no protection?) */ -extern const unsigned char Xthal_mmu_ring_bits; -extern const unsigned char Xthal_mmu_sr_bits; -extern const unsigned char Xthal_mmu_ca_bits; -extern const unsigned int Xthal_mmu_max_pte_page_size; -extern const unsigned int Xthal_mmu_min_pte_page_size; - -extern const unsigned char Xthal_itlb_way_bits; -extern const unsigned char Xthal_itlb_ways; -extern const unsigned char Xthal_itlb_arf_ways; -extern const unsigned char Xthal_dtlb_way_bits; -extern const unsigned char Xthal_dtlb_ways; -extern const unsigned char Xthal_dtlb_arf_ways; - -/* Convert between virtual and physical addresses (through static maps only): */ -/*** WARNING: these two functions may go away in a future release; don't depend on them! ***/ -extern int xthal_static_v2p( unsigned vaddr, unsigned *paddrp ); -extern int xthal_static_p2v( unsigned paddr, unsigned *vaddrp, unsigned cached ); - -#if 0 -/******************* EXPERIMENTAL AND TENTATIVE ONLY ********************/ - -#define XTHAL_MMU_PAGESZ_COUNT_MAX 8 /* maximum number of different page sizes */ -extern const char Xthal_mmu_pagesz_count; /* 0 .. 8 number of different page sizes configured */ - -/* Note: the following table doesn't necessarily have page sizes in increasing order: */ -extern const char Xthal_mmu_pagesz_log2[XTHAL_MMU_PAGESZ_COUNT_MAX]; /* 10 .. 28 (0 past count) */ - -/* Sorted (increasing) table of page sizes, that indexes into the above table: */ -extern const char Xthal_mmu_pagesz_sorted[XTHAL_MMU_PAGESZ_COUNT_MAX]; /* 0 .. 7 (0 past count) */ - -/*u32 Xthal_virtual_exceptions;*/ /* bitmask of which exceptions execute in virtual mode... */ - -extern const char Xthal_mmu_pte_pagesz_log2_min; /* ?? minimum page size in PTEs */ -extern const char Xthal_mmu_pte_pagesz_log2_max; /* ?? maximum page size in PTEs */ - -/* Cache Attribute Bits Implemented by the Cache (part of the cache abstraction) */ -extern const char Xthal_icache_fca_bits_implemented; /* ITLB/UTLB only! */ -extern const char Xthal_dcache_lca_bits_implemented; /* DTLB/UTLB only! */ -extern const char Xthal_dcache_sca_bits_implemented; /* DTLB/UTLB only! */ - -/* Per TLB Parameters (Instruction, Data, Unified) */ -struct XtHalMmuTlb Xthal_itlb; /* description of MMU I-TLB generic features */ -struct XtHalMmuTlb Xthal_dtlb; /* description of MMU D-TLB generic features */ -struct XtHalMmuTlb Xthal_utlb; /* description of MMU U-TLB generic features */ - -#define XTHAL_MMU_WAYS_MAX 8 /* maximum number of ways (associativities) for each TLB */ - -/* Structure for common information described for each possible TLB (instruction, data and unified): */ -typedef struct XtHalMmuTlb { - u8 va_bits; /* 32 (number of virtual address bits) */ - u8 pa_bits; /* 32 (number of physical address bits) */ - bool tlb_va_indexed; /* 1 (set if TLB is indexed by virtual address) */ - bool tlb_va_tagged; /* 0 (set if TLB is tagged by virtual address) */ - bool cache_va_indexed; /* 1 (set if cache is indexed by virtual address) */ - bool cache_va_tagged; /* 0 (set if cache is tagged by virtual address) */ - /*bool (whether page tables are traversed in vaddr sorted order, paddr sorted order, ...) */ - /*u8 (set of available page attribute bits, other than cache attribute bits defined above) */ - /*u32 (various masks for pages, MMU table/TLB entries, etc.) */ - u8 way_count; /* 0 .. 8 (number of ways, a.k.a. associativities, for this TLB) */ - XtHalMmuTlbWay * ways[XTHAL_MMU_WAYS_MAX]; /* pointers to per-way parms for each way */ -} XtHalMmuTlb; - -/* Per TLB Way (Per Associativity) Parameters */ -typedef struct XtHalMmuTlbWay { - u32 index_count_log2; /* 0 .. 4 */ - u32 pagesz_mask; /* 0 .. 2^pagesz_count - 1 (each bit corresponds to a size */ - /* defined in the Xthal_mmu_pagesz_log2[] table) */ - u32 vpn_const_mask; - u32 vpn_const_value; - u64 ppn_const_mask; /* future may support pa_bits > 32 */ - u64 ppn_const_value; - u32 ppn_id_mask; /* paddr bits taken directly from vaddr */ - bool backgnd_match; /* 0 or 1 */ - /* These are defined in terms of the XTHAL_CACHE_xxx bits: */ - u8 fca_const_mask; /* ITLB/UTLB only! */ - u8 fca_const_value; /* ITLB/UTLB only! */ - u8 lca_const_mask; /* DTLB/UTLB only! */ - u8 lca_const_value; /* DTLB/UTLB only! */ - u8 sca_const_mask; /* DTLB/UTLB only! */ - u8 sca_const_value; /* DTLB/UTLB only! */ - /* These define an encoding that map 5 bits in TLB and PTE entries to */ - /* 8 bits (FCA, ITLB), 16 bits (LCA+SCA, DTLB) or 24 bits (FCA+LCA+SCA, UTLB): */ - /* (they may be moved to struct XtHalMmuTlb) */ - u8 ca_bits; /* number of bits in TLB/PTE entries for cache attributes */ - u32 * ca_map; /* pointer to array of 2^ca_bits entries of FCA+LCA+SCA bits */ -} XtHalMmuTlbWay; - -/* - * The way to determine whether protection support is present in core - * is to [look at Xthal_mmu_rings ???]. - * Give info on memory requirements for MMU tables and other in-memory - * data structures (globally, per task, base and per page, etc.) - whatever bounds can be calculated. - */ - - -/* Default vectors: */ -xthal_immu_fetch_miss_vector -xthal_dmmu_load_miss_vector -xthal_dmmu_store_miss_vector - -/* Functions called when a fault is detected: */ -typedef void (XtHalMmuFaultFunc)( unsigned vaddr, ...context... ); -/* Or, */ -/* a? = vaddr */ -/* a? = context... */ -/* PS.xxx = xxx */ -XtHalMMuFaultFunc *Xthal_immu_fetch_fault_func; -XtHalMMuFaultFunc *Xthal_dmmu_load_fault_func; -XtHalMMuFaultFunc *Xthal_dmmu_store_fault_func; - -/* Default Handlers: */ -/* The user and/or kernel exception handlers may jump to these handlers to handle the relevant exceptions, - * according to the value of EXCCAUSE. The exact register state on entry to these handlers is TBD. */ -/* When multiple TLB entries match (hit) on the same access: */ -xthal_immu_fetch_multihit_handler -xthal_dmmu_load_multihit_handler -xthal_dmmu_store_multihit_handler -/* Protection violations according to cache attributes, and other cache attribute mismatches: */ -xthal_immu_fetch_attr_handler -xthal_dmmu_load_attr_handler -xthal_dmmu_store_attr_handler -/* Protection violations due to insufficient ring level: */ -xthal_immu_fetch_priv_handler -xthal_dmmu_load_priv_handler -xthal_dmmu_store_priv_handler -/* Alignment exception handlers (if supported by the particular Xtensa MMU configuration): */ -xthal_dmmu_load_align_handler -xthal_dmmu_store_align_handler - -/* Or, alternatively, the OS user and/or kernel exception handlers may simply jump to the - * following entry points which will handle any values of EXCCAUSE not handled by the OS: */ -xthal_user_exc_default_handler -xthal_kernel_exc_default_handler - -#endif /*0*/ - -#ifdef INCLUDE_DEPRECATED_HAL_CODE -extern const unsigned char Xthal_have_old_exc_arch; -extern const unsigned char Xthal_have_mmu; -extern const unsigned int Xthal_num_regs; -extern const unsigned char Xthal_num_iroms; -extern const unsigned char Xthal_num_irams; -extern const unsigned char Xthal_num_droms; -extern const unsigned char Xthal_num_drams; -extern const unsigned int Xthal_configid0; -extern const unsigned int Xthal_configid1; -#endif - -#ifdef INCLUDE_DEPRECATED_HAL_DEBUG_CODE -#define XTHAL_24_BIT_BREAK 0x80000000 -#define XTHAL_16_BIT_BREAK 0x40000000 -extern const unsigned short Xthal_ill_inst_16[16]; -#define XTHAL_DEST_REG 0xf0000000 /* Mask for destination register */ -#define XTHAL_DEST_REG_INST 0x08000000 /* Branch address is in register */ -#define XTHAL_DEST_REL_INST 0x04000000 /* Branch address is relative */ -#define XTHAL_RFW_INST 0x00000800 -#define XTHAL_RFUE_INST 0x00000400 -#define XTHAL_RFI_INST 0x00000200 -#define XTHAL_RFE_INST 0x00000100 -#define XTHAL_RET_INST 0x00000080 -#define XTHAL_BREAK_INST 0x00000040 -#define XTHAL_SYSCALL_INST 0x00000020 -#define XTHAL_LOOP_END 0x00000010 /* Not set by xthal_inst_type */ -#define XTHAL_JUMP_INST 0x00000008 /* Call or jump instruction */ -#define XTHAL_BRANCH_INST 0x00000004 /* Branch instruction */ -#define XTHAL_24_BIT_INST 0x00000002 -#define XTHAL_16_BIT_INST 0x00000001 -typedef struct xthal_state { - unsigned pc; - unsigned ar[16]; - unsigned lbeg; - unsigned lend; - unsigned lcount; - unsigned extra_ptr; - unsigned cpregs_ptr[XTHAL_MAX_CPS]; -} XTHAL_STATE; -extern unsigned int xthal_inst_type(void *addr); -extern unsigned int xthal_branch_addr(void *addr); -extern unsigned int xthal_get_npc(XTHAL_STATE *user_state); -#endif /* INCLUDE_DEPRECATED_HAL_DEBUG_CODE */ - -#ifdef __cplusplus -} -#endif -#endif /*!__ASSEMBLY__ */ - -#endif /*XTENSA_HAL_H*/ - diff --git a/include/asm-xtensa/xtensa/simcall.h b/include/asm-xtensa/xtensa/simcall.h deleted file mode 100644 index a2b868929a4..00000000000 --- a/include/asm-xtensa/xtensa/simcall.h +++ /dev/null @@ -1,130 +0,0 @@ -#ifndef SIMCALL_INCLUDED -#define SIMCALL_INCLUDED - -/* - * THIS FILE IS GENERATED -- DO NOT MODIFY BY HAND - * - * include/asm-xtensa/xtensa/simcall.h - Simulator call numbers - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file "COPYING" in the main directory of - * this archive for more details. - * - * Copyright (C) 2002 Tensilica Inc. - */ - - -/* - * System call like services offered by the simulator host. - * These are modeled after the Linux 2.4 kernel system calls - * for Xtensa processors. However not all system calls and - * not all functionality of a given system call are implemented, - * or necessarily have well defined or equivalent semantics in - * the context of a simulation (as opposed to a Unix kernel). - * - * These services behave largely as if they had been invoked - * as a task in the simulator host's operating system - * (eg. files accessed are those of the simulator host). - * However, these SIMCALLs model a virtual operating system - * so that various definitions, bit assignments etc - * (eg. open mode bits, errno values, etc) are independent - * of the host operating system used to run the simulation. - * Rather these definitions are specific to the Xtensa ISS. - * This way Xtensa ISA code written to use these SIMCALLs - * can (in principle) be simulated on any host. - * - * Up to 6 parameters are passed in registers a3 to a8 - * (note the 6th parameter isn't passed on the stack, - * unlike windowed function calling conventions). - * The return value is in a2. A negative value in the - * range -4096 to -1 indicates a negated error code to be - * reported in errno with a return value of -1, otherwise - * the value in a2 is returned as is. - */ - -/* These #defines need to match what's in Xtensa/OS/vxworks/xtiss/simcalls.c */ - -#define SYS_nop 0 /* n/a - setup; used to flush register windows */ -#define SYS_exit 1 /*x*/ -#define SYS_fork 2 -#define SYS_read 3 /*x*/ -#define SYS_write 4 /*x*/ -#define SYS_open 5 /*x*/ -#define SYS_close 6 /*x*/ -#define SYS_rename 7 /*x 38 - waitpid */ -#define SYS_creat 8 /*x*/ -#define SYS_link 9 /*x (not implemented on WIN32) */ -#define SYS_unlink 10 /*x*/ -#define SYS_execv 11 /* n/a - execve */ -#define SYS_execve 12 /* 11 - chdir */ -#define SYS_pipe 13 /* 42 - time */ -#define SYS_stat 14 /* 106 - mknod */ -#define SYS_chmod 15 -#define SYS_chown 16 /* 202 - lchown */ -#define SYS_utime 17 /* 30 - break */ -#define SYS_wait 18 /* n/a - oldstat */ -#define SYS_lseek 19 /*x*/ -#define SYS_getpid 20 -#define SYS_isatty 21 /* n/a - mount */ -#define SYS_fstat 22 /* 108 - oldumount */ -#define SYS_time 23 /* 13 - setuid */ -#define SYS_gettimeofday 24 /*x 78 - getuid (not implemented on WIN32) */ -#define SYS_times 25 /*X 43 - stime (Xtensa-specific implementation) */ -#define SYS_socket 26 -#define SYS_sendto 27 -#define SYS_recvfrom 28 -#define SYS_select_one 29 /* not compitible select, one file descriptor at the time */ -#define SYS_bind 30 -#define SYS_ioctl 31 - -/* - * Other... - */ -#define SYS_iss_argc 1000 /* returns value of argc */ -#define SYS_iss_argv_size 1001 /* bytes needed for argv & arg strings */ -#define SYS_iss_set_argv 1002 /* saves argv & arg strings at given addr */ - -/* - * SIMCALLs for the ferret memory debugger. All are invoked by - * libferret.a ... ( Xtensa/Target-Libs/ferret ) - */ -#define SYS_ferret 1010 -#define SYS_malloc 1011 -#define SYS_free 1012 -#define SYS_more_heap 1013 -#define SYS_no_heap 1014 - - -/* - * Extra SIMCALLs for GDB: - */ -#define SYS_gdb_break -1 /* invoked by XTOS on user exceptions if EPC points - to a break.n/break, regardless of cause! */ -#define SYS_xmon_out -2 /* invoked by XMON: ... */ -#define SYS_xmon_in -3 /* invoked by XMON: ... */ -#define SYS_xmon_flush -4 /* invoked by XMON: ... */ -#define SYS_gdb_abort -5 /* invoked by XTOS in _xtos_panic() */ -#define SYS_gdb_illegal_inst -6 /* invoked by XTOS for illegal instructions (too deeply) */ -#define SYS_xmon_init -7 /* invoked by XMON: ... */ -#define SYS_gdb_enter_sktloop -8 /* invoked by XTOS on debug exceptions */ - -/* - * SIMCALLs for vxWorks xtiss BSP: - */ -#define SYS_setup_ppp_pipes -83 -#define SYS_log_msg -84 - -/* - * Test SIMCALLs: - */ -#define SYS_test_write_state -100 -#define SYS_test_read_state -101 - -/* - * SYS_select_one specifiers - */ -#define XTISS_SELECT_ONE_READ 1 -#define XTISS_SELECT_ONE_WRITE 2 -#define XTISS_SELECT_ONE_EXCEPT 3 - -#endif /* !SIMCALL_INCLUDED */ diff --git a/include/asm-xtensa/xtensa/xt2000-uart.h b/include/asm-xtensa/xtensa/xt2000-uart.h deleted file mode 100644 index 0154460f0ed..00000000000 --- a/include/asm-xtensa/xtensa/xt2000-uart.h +++ /dev/null @@ -1,155 +0,0 @@ -#ifndef _uart_h_included_ -#define _uart_h_included_ - -/* - * THIS FILE IS GENERATED -- DO NOT MODIFY BY HAND - * - * include/asm-xtensa/xtensa/xt2000-uart.h -- NatSemi PC16552D DUART - * definitions - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2002 Tensilica Inc. - */ - - -#include <xtensa/xt2000.h> - - -/* 16550 UART DEVICE REGISTERS - The XT2000 board aligns each register to a 32-bit word but the UART device only uses - one byte of the word, which is the least-significant byte regardless of the - endianness of the core (ie. byte offset 0 for little-endian and 3 for big-endian). - So if using word accesses then endianness doesn't matter. - The macros provided here do that. -*/ -struct uart_dev_s { - union { - unsigned int rxb; /* DLAB=0: receive buffer, read-only */ - unsigned int txb; /* DLAB=0: transmit buffer, write-only */ - unsigned int dll; /* DLAB=1: divisor, least-significant byte latch (was write-only?) */ - } w0; - union { - unsigned int ier; /* DLAB=0: interrupt-enable register (was write-only?) */ - unsigned int dlm; /* DLAB=1: divisor, most-significant byte latch (was write-only?) */ - } w1; - - union { - unsigned int isr; /* DLAB=0: interrupt status register, read-only */ - unsigned int fcr; /* DLAB=0: FIFO control register, write-only */ - unsigned int afr; /* DLAB=1: alternate function register */ - } w2; - - unsigned int lcr; /* line control-register, write-only */ - unsigned int mcr; /* modem control-regsiter, write-only */ - unsigned int lsr; /* line status register, read-only */ - unsigned int msr; /* modem status register, read-only */ - unsigned int scr; /* scratch regsiter, read/write */ -}; - -#define _RXB(u) ((u)->w0.rxb) -#define _TXB(u) ((u)->w0.txb) -#define _DLL(u) ((u)->w0.dll) -#define _IER(u) ((u)->w1.ier) -#define _DLM(u) ((u)->w1.dlm) -#define _ISR(u) ((u)->w2.isr) -#define _FCR(u) ((u)->w2.fcr) -#define _AFR(u) ((u)->w2.afr) -#define _LCR(u) ((u)->lcr) -#define _MCR(u) ((u)->mcr) -#define _LSR(u) ((u)->lsr) -#define _MSR(u) ((u)->msr) -#define _SCR(u) ((u)->scr) - -typedef volatile struct uart_dev_s uart_dev_t; - -/* IER bits */ -#define RCVR_DATA_REG_INTENABLE 0x01 -#define XMIT_HOLD_REG_INTENABLE 0x02 -#define RCVR_STATUS_INTENABLE 0x04 -#define MODEM_STATUS_INTENABLE 0x08 - -/* FCR bits */ -#define _FIFO_ENABLE 0x01 -#define RCVR_FIFO_RESET 0x02 -#define XMIT_FIFO_RESET 0x04 -#define DMA_MODE_SELECT 0x08 -#define RCVR_TRIGGER_LSB 0x40 -#define RCVR_TRIGGER_MSB 0x80 - -/* AFR bits */ -#define AFR_CONC_WRITE 0x01 -#define AFR_BAUDOUT_SEL 0x02 -#define AFR_RXRDY_SEL 0x04 - -/* ISR bits */ -#define INT_STATUS(r) ((r)&1) -#define INT_PRIORITY(r) (((r)>>1)&0x7) - -/* LCR bits */ -#define WORD_LENGTH(n) (((n)-5)&0x3) -#define STOP_BIT_ENABLE 0x04 -#define PARITY_ENABLE 0x08 -#define EVEN_PARITY 0x10 -#define FORCE_PARITY 0x20 -#define XMIT_BREAK 0x40 -#define DLAB_ENABLE 0x80 - -/* MCR bits */ -#define _DTR 0x01 -#define _RTS 0x02 -#define _OP1 0x04 -#define _OP2 0x08 -#define LOOP_BACK 0x10 - -/* LSR Bits */ -#define RCVR_DATA_READY 0x01 -#define OVERRUN_ERROR 0x02 -#define PARITY_ERROR 0x04 -#define FRAMING_ERROR 0x08 -#define BREAK_INTERRUPT 0x10 -#define XMIT_HOLD_EMPTY 0x20 -#define XMIT_EMPTY 0x40 -#define FIFO_ERROR 0x80 -#define RCVR_READY(u) (_LSR(u)&RCVR_DATA_READY) -#define XMIT_READY(u) (_LSR(u)&XMIT_HOLD_EMPTY) - -/* MSR bits */ -#define _RDR 0x01 -#define DELTA_DSR 0x02 -#define DELTA_RI 0x04 -#define DELTA_CD 0x08 -#define _CTS 0x10 -#define _DSR 0x20 -#define _RI 0x40 -#define _CD 0x80 - -/* prototypes */ -void uart_init( uart_dev_t *u, int bitrate ); -void uart_out( uart_dev_t *u, char c ); -void uart_puts( uart_dev_t *u, char *s ); -char uart_in( uart_dev_t *u ); -void uart_enable_rcvr_int( uart_dev_t *u ); -void uart_disable_rcvr_int( uart_dev_t *u ); - -#ifdef DUART16552_1_VADDR -/* DUART present. */ -#define DUART_1_BASE (*(uart_dev_t*)DUART16552_1_VADDR) -#define DUART_2_BASE (*(uart_dev_t*)DUART16552_2_VADDR) -#define UART1_PUTS(s) uart_puts( &DUART_1_BASE, s ) -#define UART2_PUTS(s) uart_puts( &DUART_2_BASE, s ) -#else -/* DUART not configured, use dummy placeholders to allow compiles to work. */ -#define DUART_1_BASE (*(uart_dev_t*)0) -#define DUART_2_BASE (*(uart_dev_t*)0) -#define UART1_PUTS(s) -#define UART2_PUTS(s) -#endif - -/* Compute 16-bit divisor for baudrate generator, with rounding: */ -#define DUART_DIVISOR(crystal,speed) (((crystal)/16 + (speed)/2)/(speed)) - -#endif /*_uart_h_included_*/ - diff --git a/include/asm-xtensa/xtensa/xt2000.h b/include/asm-xtensa/xtensa/xt2000.h deleted file mode 100644 index 703a45002f8..00000000000 --- a/include/asm-xtensa/xtensa/xt2000.h +++ /dev/null @@ -1,408 +0,0 @@ -#ifndef _INC_XT2000_H_ -#define _INC_XT2000_H_ - -/* - * THIS FILE IS GENERATED -- DO NOT MODIFY BY HAND - * - * include/asm-xtensa/xtensa/xt2000.h - Definitions specific to the - * Tensilica XT2000 Emulation Board - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2002 Tensilica Inc. - */ - - -#include <xtensa/config/core.h> -#include <xtensa/config/system.h> - - -/* - * Default assignment of XT2000 devices to external interrupts. - */ - -/* Ethernet interrupt: */ -#ifdef XCHAL_EXTINT3_NUM -#define SONIC83934_INTNUM XCHAL_EXTINT3_NUM -#define SONIC83934_INTLEVEL XCHAL_EXTINT3_LEVEL -#define SONIC83934_INTMASK XCHAL_EXTINT3_MASK -#else -#define SONIC83934_INTMASK 0 -#endif - -/* DUART channel 1 interrupt (P1 - console): */ -#ifdef XCHAL_EXTINT4_NUM -#define DUART16552_1_INTNUM XCHAL_EXTINT4_NUM -#define DUART16552_1_INTLEVEL XCHAL_EXTINT4_LEVEL -#define DUART16552_1_INTMASK XCHAL_EXTINT4_MASK -#else -#define DUART16552_1_INTMASK 0 -#endif - -/* DUART channel 2 interrupt (P2 - 2nd serial port): */ -#ifdef XCHAL_EXTINT5_NUM -#define DUART16552_2_INTNUM XCHAL_EXTINT5_NUM -#define DUART16552_2_INTLEVEL XCHAL_EXTINT5_LEVEL -#define DUART16552_2_INTMASK XCHAL_EXTINT5_MASK -#else -#define DUART16552_2_INTMASK 0 -#endif - -/* FPGA-combined PCI/etc interrupts: */ -#ifdef XCHAL_EXTINT6_NUM -#define XT2000_FPGAPCI_INTNUM XCHAL_EXTINT6_NUM -#define XT2000_FPGAPCI_INTLEVEL XCHAL_EXTINT6_LEVEL -#define XT2000_FPGAPCI_INTMASK XCHAL_EXTINT6_MASK -#else -#define XT2000_FPGAPCI_INTMASK 0 -#endif - - - -/* - * Device addresses. - * - * Note: for endianness-independence, use 32-bit loads and stores for all - * register accesses to Ethernet, DUART and LED devices. Undefined bits - * may need to be masked out if needed when reading if the actual register - * size is smaller than 32 bits. - * - * Note: XT2000 bus byte lanes are defined in terms of msbyte and lsbyte - * relative to the processor. So 32-bit registers are accessed consistently - * from both big and little endian processors. However, this means byte - * sequences are not consistent between big and little endian processors. - * This is fine for RAM, and for ROM if ROM is created for a specific - * processor (and thus has correct byte sequences). However this may be - * unexpected for Flash, which might contain a file-system that one wants - * to use for multiple processor configurations (eg. the Flash might contain - * the Ethernet card's address, endianness-independent application data, etc). - * That is, byte sequences written in Flash by a core of a given endianness - * will be byte-swapped when seen by a core of the other endianness. - * Someone implementing an endianness-independent Flash file system will - * likely handle this byte-swapping issue in the Flash driver software. - */ - -#define DUART16552_XTAL_FREQ 18432000 /* crystal frequency in Hz */ -#define XTBOARD_FLASH_MAXSIZE 0x4000000 /* 64 MB (max; depends on what is socketed!) */ -#define XTBOARD_EPROM_MAXSIZE 0x0400000 /* 4 MB (max; depends on what is socketed!) */ -#define XTBOARD_EEPROM_MAXSIZE 0x0080000 /* 512 kB (max; depends on what is socketed!) */ -#define XTBOARD_ASRAM_SIZE 0x0100000 /* 1 MB */ -#define XTBOARD_PCI_MEM_SIZE 0x8000000 /* 128 MB (allocated) */ -#define XTBOARD_PCI_IO_SIZE 0x1000000 /* 16 MB (allocated) */ - -#ifdef XSHAL_IOBLOCK_BYPASS_PADDR -/* PCI memory space: */ -# define XTBOARD_PCI_MEM_PADDR (XSHAL_IOBLOCK_BYPASS_PADDR+0x0000000) -/* Socketed Flash (eg. 2 x 16-bit devices): */ -# define XTBOARD_FLASH_PADDR (XSHAL_IOBLOCK_BYPASS_PADDR+0x8000000) -/* PCI I/O space: */ -# define XTBOARD_PCI_IO_PADDR (XSHAL_IOBLOCK_BYPASS_PADDR+0xC000000) -/* V3 PCI interface chip register/config space: */ -# define XTBOARD_V3PCI_PADDR (XSHAL_IOBLOCK_BYPASS_PADDR+0xD000000) -/* Bus Interface registers: */ -# define XTBOARD_BUSINT_PADDR (XSHAL_IOBLOCK_BYPASS_PADDR+0xD010000) -/* FPGA registers: */ -# define XT2000_FPGAREGS_PADDR (XSHAL_IOBLOCK_BYPASS_PADDR+0xD020000) -/* SONIC SN83934 Ethernet controller/transceiver: */ -# define SONIC83934_PADDR (XSHAL_IOBLOCK_BYPASS_PADDR+0xD030000) -/* 8-character bitmapped LED display: */ -# define XTBOARD_LED_PADDR (XSHAL_IOBLOCK_BYPASS_PADDR+0xD040000) -/* National-Semi PC16552D DUART: */ -# define DUART16552_1_PADDR (XSHAL_IOBLOCK_BYPASS_PADDR+0xD050020) /* channel 1 (P1 - console) */ -# define DUART16552_2_PADDR (XSHAL_IOBLOCK_BYPASS_PADDR+0xD050000) /* channel 2 (P2) */ -/* Asynchronous Static RAM: */ -# define XTBOARD_ASRAM_PADDR (XSHAL_IOBLOCK_BYPASS_PADDR+0xD400000) -/* 8-bit EEPROM: */ -# define XTBOARD_EEPROM_PADDR (XSHAL_IOBLOCK_BYPASS_PADDR+0xD600000) -/* 2 x 16-bit EPROMs: */ -# define XTBOARD_EPROM_PADDR (XSHAL_IOBLOCK_BYPASS_PADDR+0xD800000) -#endif /* XSHAL_IOBLOCK_BYPASS_PADDR */ - -/* These devices might be accessed cached: */ -#ifdef XSHAL_IOBLOCK_CACHED_PADDR -# define XTBOARD_PCI_MEM_CACHED_PADDR (XSHAL_IOBLOCK_CACHED_PADDR+0x0000000) -# define XTBOARD_FLASH_CACHED_PADDR (XSHAL_IOBLOCK_CACHED_PADDR+0x8000000) -# define XTBOARD_ASRAM_CACHED_PADDR (XSHAL_IOBLOCK_CACHED_PADDR+0xD400000) -# define XTBOARD_EEPROM_CACHED_PADDR (XSHAL_IOBLOCK_CACHED_PADDR+0xD600000) -# define XTBOARD_EPROM_CACHED_PADDR (XSHAL_IOBLOCK_CACHED_PADDR+0xD800000) -#endif /* XSHAL_IOBLOCK_CACHED_PADDR */ - - -/*** Same thing over again, this time with virtual addresses: ***/ - -#ifdef XSHAL_IOBLOCK_BYPASS_VADDR -/* PCI memory space: */ -# define XTBOARD_PCI_MEM_VADDR (XSHAL_IOBLOCK_BYPASS_VADDR+0x0000000) -/* Socketed Flash (eg. 2 x 16-bit devices): */ -# define XTBOARD_FLASH_VADDR (XSHAL_IOBLOCK_BYPASS_VADDR+0x8000000) -/* PCI I/O space: */ -# define XTBOARD_PCI_IO_VADDR (XSHAL_IOBLOCK_BYPASS_VADDR+0xC000000) -/* V3 PCI interface chip register/config space: */ -# define XTBOARD_V3PCI_VADDR (XSHAL_IOBLOCK_BYPASS_VADDR+0xD000000) -/* Bus Interface registers: */ -# define XTBOARD_BUSINT_VADDR (XSHAL_IOBLOCK_BYPASS_VADDR+0xD010000) -/* FPGA registers: */ -# define XT2000_FPGAREGS_VADDR (XSHAL_IOBLOCK_BYPASS_VADDR+0xD020000) -/* SONIC SN83934 Ethernet controller/transceiver: */ -# define SONIC83934_VADDR (XSHAL_IOBLOCK_BYPASS_VADDR+0xD030000) -/* 8-character bitmapped LED display: */ -# define XTBOARD_LED_VADDR (XSHAL_IOBLOCK_BYPASS_VADDR+0xD040000) -/* National-Semi PC16552D DUART: */ -# define DUART16552_1_VADDR (XSHAL_IOBLOCK_BYPASS_VADDR+0xD050020) /* channel 1 (P1 - console) */ -# define DUART16552_2_VADDR (XSHAL_IOBLOCK_BYPASS_VADDR+0xD050000) /* channel 2 (P2) */ -/* Asynchronous Static RAM: */ -# define XTBOARD_ASRAM_VADDR (XSHAL_IOBLOCK_BYPASS_VADDR+0xD400000) -/* 8-bit EEPROM: */ -# define XTBOARD_EEPROM_VADDR (XSHAL_IOBLOCK_BYPASS_VADDR+0xD600000) -/* 2 x 16-bit EPROMs: */ -# define XTBOARD_EPROM_VADDR (XSHAL_IOBLOCK_BYPASS_VADDR+0xD800000) -#endif /* XSHAL_IOBLOCK_BYPASS_VADDR */ - -/* These devices might be accessed cached: */ -#ifdef XSHAL_IOBLOCK_CACHED_VADDR -# define XTBOARD_PCI_MEM_CACHED_VADDR (XSHAL_IOBLOCK_CACHED_VADDR+0x0000000) -# define XTBOARD_FLASH_CACHED_VADDR (XSHAL_IOBLOCK_CACHED_VADDR+0x8000000) -# define XTBOARD_ASRAM_CACHED_VADDR (XSHAL_IOBLOCK_CACHED_VADDR+0xD400000) -# define XTBOARD_EEPROM_CACHED_VADDR (XSHAL_IOBLOCK_CACHED_VADDR+0xD600000) -# define XTBOARD_EPROM_CACHED_VADDR (XSHAL_IOBLOCK_CACHED_VADDR+0xD800000) -#endif /* XSHAL_IOBLOCK_CACHED_VADDR */ - - -/* System ROM: */ -#define XTBOARD_ROM_SIZE XSHAL_ROM_SIZE -#ifdef XSHAL_ROM_VADDR -#define XTBOARD_ROM_VADDR XSHAL_ROM_VADDR -#endif -#ifdef XSHAL_ROM_PADDR -#define XTBOARD_ROM_PADDR XSHAL_ROM_PADDR -#endif - -/* System RAM: */ -#define XTBOARD_RAM_SIZE XSHAL_RAM_SIZE -#ifdef XSHAL_RAM_VADDR -#define XTBOARD_RAM_VADDR XSHAL_RAM_VADDR -#endif -#ifdef XSHAL_RAM_PADDR -#define XTBOARD_RAM_PADDR XSHAL_RAM_PADDR -#endif -#define XTBOARD_RAM_BYPASS_VADDR XSHAL_RAM_BYPASS_VADDR -#define XTBOARD_RAM_BYPASS_PADDR XSHAL_RAM_BYPASS_PADDR - - - -/* - * Things that depend on device addresses. - */ - - -#define XTBOARD_CACHEATTR_WRITEBACK XSHAL_XT2000_CACHEATTR_WRITEBACK -#define XTBOARD_CACHEATTR_WRITEALLOC XSHAL_XT2000_CACHEATTR_WRITEALLOC -#define XTBOARD_CACHEATTR_WRITETHRU XSHAL_XT2000_CACHEATTR_WRITETHRU -#define XTBOARD_CACHEATTR_BYPASS XSHAL_XT2000_CACHEATTR_BYPASS -#define XTBOARD_CACHEATTR_DEFAULT XSHAL_XT2000_CACHEATTR_DEFAULT - -#define XTBOARD_BUSINT_PIPE_REGIONS XSHAL_XT2000_PIPE_REGIONS -#define XTBOARD_BUSINT_SDRAM_REGIONS XSHAL_XT2000_SDRAM_REGIONS - - - -/* - * BusLogic (FPGA) registers. - * All these registers are normally accessed using 32-bit loads/stores. - */ - -/* Register offsets: */ -#define XT2000_DATECD_OFS 0x00 /* date code (read-only) */ -#define XT2000_STSREG_OFS 0x04 /* status (read-only) */ -#define XT2000_SYSLED_OFS 0x08 /* system LED */ -#define XT2000_WRPROT_OFS 0x0C /* write protect */ -#define XT2000_SWRST_OFS 0x10 /* software reset */ -#define XT2000_SYSRST_OFS 0x14 /* system (peripherals) reset */ -#define XT2000_IMASK_OFS 0x18 /* interrupt mask */ -#define XT2000_ISTAT_OFS 0x1C /* interrupt status */ -#define XT2000_V3CFG_OFS 0x20 /* V3 config (V320 PCI) */ - -/* Physical register addresses: */ -#ifdef XT2000_FPGAREGS_PADDR -#define XT2000_DATECD_PADDR (XT2000_FPGAREGS_PADDR+XT2000_DATECD_OFS) -#define XT2000_STSREG_PADDR (XT2000_FPGAREGS_PADDR+XT2000_STSREG_OFS) -#define XT2000_SYSLED_PADDR (XT2000_FPGAREGS_PADDR+XT2000_SYSLED_OFS) -#define XT2000_WRPROT_PADDR (XT2000_FPGAREGS_PADDR+XT2000_WRPROT_OFS) -#define XT2000_SWRST_PADDR (XT2000_FPGAREGS_PADDR+XT2000_SWRST_OFS) -#define XT2000_SYSRST_PADDR (XT2000_FPGAREGS_PADDR+XT2000_SYSRST_OFS) -#define XT2000_IMASK_PADDR (XT2000_FPGAREGS_PADDR+XT2000_IMASK_OFS) -#define XT2000_ISTAT_PADDR (XT2000_FPGAREGS_PADDR+XT2000_ISTAT_OFS) -#define XT2000_V3CFG_PADDR (XT2000_FPGAREGS_PADDR+XT2000_V3CFG_OFS) -#endif - -/* Virtual register addresses: */ -#ifdef XT2000_FPGAREGS_VADDR -#define XT2000_DATECD_VADDR (XT2000_FPGAREGS_VADDR+XT2000_DATECD_OFS) -#define XT2000_STSREG_VADDR (XT2000_FPGAREGS_VADDR+XT2000_STSREG_OFS) -#define XT2000_SYSLED_VADDR (XT2000_FPGAREGS_VADDR+XT2000_SYSLED_OFS) -#define XT2000_WRPROT_VADDR (XT2000_FPGAREGS_VADDR+XT2000_WRPROT_OFS) -#define XT2000_SWRST_VADDR (XT2000_FPGAREGS_VADDR+XT2000_SWRST_OFS) -#define XT2000_SYSRST_VADDR (XT2000_FPGAREGS_VADDR+XT2000_SYSRST_OFS) -#define XT2000_IMASK_VADDR (XT2000_FPGAREGS_VADDR+XT2000_IMASK_OFS) -#define XT2000_ISTAT_VADDR (XT2000_FPGAREGS_VADDR+XT2000_ISTAT_OFS) -#define XT2000_V3CFG_VADDR (XT2000_FPGAREGS_VADDR+XT2000_V3CFG_OFS) -/* Register access (for C code): */ -#define XT2000_DATECD_REG (*(volatile unsigned*) XT2000_DATECD_VADDR) -#define XT2000_STSREG_REG (*(volatile unsigned*) XT2000_STSREG_VADDR) -#define XT2000_SYSLED_REG (*(volatile unsigned*) XT2000_SYSLED_VADDR) -#define XT2000_WRPROT_REG (*(volatile unsigned*) XT2000_WRPROT_VADDR) -#define XT2000_SWRST_REG (*(volatile unsigned*) XT2000_SWRST_VADDR) -#define XT2000_SYSRST_REG (*(volatile unsigned*) XT2000_SYSRST_VADDR) -#define XT2000_IMASK_REG (*(volatile unsigned*) XT2000_IMASK_VADDR) -#define XT2000_ISTAT_REG (*(volatile unsigned*) XT2000_ISTAT_VADDR) -#define XT2000_V3CFG_REG (*(volatile unsigned*) XT2000_V3CFG_VADDR) -#endif - -/* DATECD (date code) bit fields: */ - -/* BCD-coded month (01..12): */ -#define XT2000_DATECD_MONTH_SHIFT 24 -#define XT2000_DATECD_MONTH_BITS 8 -#define XT2000_DATECD_MONTH_MASK 0xFF000000 -/* BCD-coded day (01..31): */ -#define XT2000_DATECD_DAY_SHIFT 16 -#define XT2000_DATECD_DAY_BITS 8 -#define XT2000_DATECD_DAY_MASK 0x00FF0000 -/* BCD-coded year (2001..9999): */ -#define XT2000_DATECD_YEAR_SHIFT 0 -#define XT2000_DATECD_YEAR_BITS 16 -#define XT2000_DATECD_YEAR_MASK 0x0000FFFF - -/* STSREG (status) bit fields: */ - -/* Switch SW3 setting bit fields (0=off/up, 1=on/down): */ -#define XT2000_STSREG_SW3_SHIFT 0 -#define XT2000_STSREG_SW3_BITS 4 -#define XT2000_STSREG_SW3_MASK 0x0000000F -/* Boot-select bits of switch SW3: */ -#define XT2000_STSREG_BOOTSEL_SHIFT 0 -#define XT2000_STSREG_BOOTSEL_BITS 2 -#define XT2000_STSREG_BOOTSEL_MASK 0x00000003 -/* Boot-select values: */ -#define XT2000_STSREG_BOOTSEL_FLASH 0 -#define XT2000_STSREG_BOOTSEL_EPROM16 1 -#define XT2000_STSREG_BOOTSEL_PROM8 2 -#define XT2000_STSREG_BOOTSEL_ASRAM 3 -/* User-defined bits of switch SW3: */ -#define XT2000_STSREG_SW3_2_SHIFT 2 -#define XT2000_STSREG_SW3_2_MASK 0x00000004 -#define XT2000_STSREG_SW3_3_SHIFT 3 -#define XT2000_STSREG_SW3_3_MASK 0x00000008 - -/* SYSLED (system LED) bit fields: */ - -/* LED control bit (0=off, 1=on): */ -#define XT2000_SYSLED_LEDON_SHIFT 0 -#define XT2000_SYSLED_LEDON_MASK 0x00000001 - -/* WRPROT (write protect) bit fields (0=writable, 1=write-protected [default]): */ - -/* Flash write protect: */ -#define XT2000_WRPROT_FLWP_SHIFT 0 -#define XT2000_WRPROT_FLWP_MASK 0x00000001 -/* Reserved but present write protect bits: */ -#define XT2000_WRPROT_WRP_SHIFT 1 -#define XT2000_WRPROT_WRP_BITS 7 -#define XT2000_WRPROT_WRP_MASK 0x000000FE - -/* SWRST (software reset; allows s/w to generate power-on equivalent reset): */ - -/* Software reset bits: */ -#define XT2000_SWRST_SWR_SHIFT 0 -#define XT2000_SWRST_SWR_BITS 16 -#define XT2000_SWRST_SWR_MASK 0x0000FFFF -/* Software reset value -- writing this value resets the board: */ -#define XT2000_SWRST_RESETVALUE 0x0000DEAD - -/* SYSRST (system reset; controls reset of individual peripherals): */ - -/* All-device reset: */ -#define XT2000_SYSRST_ALL_SHIFT 0 -#define XT2000_SYSRST_ALL_BITS 4 -#define XT2000_SYSRST_ALL_MASK 0x0000000F -/* HDSP-2534 LED display reset (1=reset, 0=nothing): */ -#define XT2000_SYSRST_LED_SHIFT 0 -#define XT2000_SYSRST_LED_MASK 0x00000001 -/* Sonic DP83934 Ethernet controller reset (1=reset, 0=nothing): */ -#define XT2000_SYSRST_SONIC_SHIFT 1 -#define XT2000_SYSRST_SONIC_MASK 0x00000002 -/* DP16552 DUART reset (1=reset, 0=nothing): */ -#define XT2000_SYSRST_DUART_SHIFT 2 -#define XT2000_SYSRST_DUART_MASK 0x00000004 -/* V3 V320 PCI bridge controller reset (1=reset, 0=nothing): */ -#define XT2000_SYSRST_V3_SHIFT 3 -#define XT2000_SYSRST_V3_MASK 0x00000008 - -/* IMASK (interrupt mask; 0=disable, 1=enable): */ -/* ISTAT (interrupt status; 0=inactive, 1=pending): */ - -/* PCI INTP interrupt: */ -#define XT2000_INTMUX_PCI_INTP_SHIFT 2 -#define XT2000_INTMUX_PCI_INTP_MASK 0x00000004 -/* PCI INTS interrupt: */ -#define XT2000_INTMUX_PCI_INTS_SHIFT 3 -#define XT2000_INTMUX_PCI_INTS_MASK 0x00000008 -/* PCI INTD interrupt: */ -#define XT2000_INTMUX_PCI_INTD_SHIFT 4 -#define XT2000_INTMUX_PCI_INTD_MASK 0x00000010 -/* V320 PCI controller interrupt: */ -#define XT2000_INTMUX_V3_SHIFT 5 -#define XT2000_INTMUX_V3_MASK 0x00000020 -/* PCI ENUM interrupt: */ -#define XT2000_INTMUX_PCI_ENUM_SHIFT 6 -#define XT2000_INTMUX_PCI_ENUM_MASK 0x00000040 -/* PCI DEG interrupt: */ -#define XT2000_INTMUX_PCI_DEG_SHIFT 7 -#define XT2000_INTMUX_PCI_DEG_MASK 0x00000080 - -/* V3CFG (V3 config, V320 PCI controller): */ - -/* V3 address control (0=pass-thru, 1=V3 address bits 31:28 set to 4'b0001 [default]): */ -#define XT2000_V3CFG_V3ADC_SHIFT 0 -#define XT2000_V3CFG_V3ADC_MASK 0x00000001 - -/* I2C Devices */ - -#define XT2000_I2C_RTC_ID 0x68 -#define XT2000_I2C_NVRAM0_ID 0x56 /* 1st 256 byte block */ -#define XT2000_I2C_NVRAM1_ID 0x57 /* 2nd 256 byte block */ - -/* NVRAM Board Info structure: */ - -#define XT2000_NVRAM_SIZE 512 - -#define XT2000_NVRAM_BINFO_START 0x100 -#define XT2000_NVRAM_BINFO_SIZE 0x20 -#define XT2000_NVRAM_BINFO_VERSION 0x10 /* version 1.0 */ -#if 0 -#define XT2000_NVRAM_BINFO_VERSION_OFFSET 0x00 -#define XT2000_NVRAM_BINFO_VERSION_SIZE 0x1 -#define XT2000_NVRAM_BINFO_ETH_ADDR_OFFSET 0x02 -#define XT2000_NVRAM_BINFO_ETH_ADDR_SIZE 0x6 -#define XT2000_NVRAM_BINFO_SN_OFFSET 0x10 -#define XT2000_NVRAM_BINFO_SN_SIZE 0xE -#define XT2000_NVRAM_BINFO_CRC_OFFSET 0x1E -#define XT2000_NVRAM_BINFO_CRC_SIZE 0x2 -#endif /*0*/ - -#if !defined(__ASSEMBLY__) && !defined(_NOCLANGUAGE) -typedef struct xt2000_nvram_binfo { - unsigned char version; - unsigned char reserved1; - unsigned char eth_addr[6]; - unsigned char reserved8[8]; - unsigned char serialno[14]; - unsigned char crc[2]; /* 16-bit CRC */ -} xt2000_nvram_binfo; -#endif /*!__ASSEMBLY__ && !_NOCLANGUAGE*/ - - -#endif /*_INC_XT2000_H_*/ - diff --git a/include/asm-xtensa/xtensa/xtboard.h b/include/asm-xtensa/xtensa/xtboard.h deleted file mode 100644 index 22469c17530..00000000000 --- a/include/asm-xtensa/xtensa/xtboard.h +++ /dev/null @@ -1,120 +0,0 @@ -#ifndef _xtboard_h_included_ -#define _xtboard_h_included_ - -/* - * THIS FILE IS GENERATED -- DO NOT MODIFY BY HAND - * - * xtboard.h -- Routines for getting useful information from the board. - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2002 Tensilica Inc. - */ - - -#include <xtensa/xt2000.h> - -#define XTBOARD_RTC_ERROR -1 -#define XTBOARD_RTC_STOPPED -2 - - -/* xt2000-i2cdev.c: */ -typedef void XtboardDelayFunc( unsigned ); -extern XtboardDelayFunc* xtboard_set_nsdelay_func( XtboardDelayFunc *delay_fn ); -extern int xtboard_i2c_read (unsigned id, unsigned char *buf, unsigned addr, unsigned size); -extern int xtboard_i2c_write(unsigned id, unsigned char *buf, unsigned addr, unsigned size); -extern int xtboard_i2c_wait_nvram_ack(unsigned id, unsigned swtimer); - -/* xtboard.c: */ -extern int xtboard_nvram_read (unsigned addr, unsigned len, unsigned char *buf); -extern int xtboard_nvram_write(unsigned addr, unsigned len, unsigned char *buf); -extern int xtboard_nvram_binfo_read (xt2000_nvram_binfo *buf); -extern int xtboard_nvram_binfo_write(xt2000_nvram_binfo *buf); -extern int xtboard_nvram_binfo_valid(xt2000_nvram_binfo *buf); -extern int xtboard_ethermac_get(unsigned char *buf); -extern int xtboard_ethermac_set(unsigned char *buf); - -/*+*---------------------------------------------------------------------------- -/ Function: xtboard_get_rtc_time -/ -/ Description: Get time stored in real-time clock. -/ -/ Returns: time in seconds stored in real-time clock. -/-**----------------------------------------------------------------------------*/ - -extern unsigned xtboard_get_rtc_time(void); - -/*+*---------------------------------------------------------------------------- -/ Function: xtboard_set_rtc_time -/ -/ Description: Set time stored in real-time clock. -/ -/ Parameters: time -- time in seconds to store to real-time clock -/ -/ Returns: 0 on success, xtboard_i2c_write() error code otherwise. -/-**----------------------------------------------------------------------------*/ - -extern int xtboard_set_rtc_time(unsigned time); - - -/* xtfreq.c: */ -/*+*---------------------------------------------------------------------------- -/ Function: xtboard_measure_sys_clk -/ -/ Description: Get frequency of system clock. -/ -/ Parameters: none -/ -/ Returns: frequency of system clock. -/-**----------------------------------------------------------------------------*/ - -extern unsigned xtboard_measure_sys_clk(void); - - -#if 0 /* old stuff from xtboard.c: */ - -/*+*---------------------------------------------------------------------------- -/ Function: xtboard_nvram valid -/ -/ Description: Determines if data in NVRAM is valid. -/ -/ Parameters: delay -- 10us delay function -/ -/ Returns: 1 if NVRAM is valid, 0 otherwise -/-**----------------------------------------------------------------------------*/ - -extern unsigned xtboard_nvram_valid(void (*delay)( void )); - -/*+*---------------------------------------------------------------------------- -/ Function: xtboard_get_nvram_contents -/ -/ Description: Returns contents of NVRAM. -/ -/ Parameters: buf -- buffer to NVRAM contents. -/ delay -- 10us delay function -/ -/ Returns: 1 if NVRAM is valid, 0 otherwise -/-**----------------------------------------------------------------------------*/ - -extern unsigned xtboard_get_nvram_contents(unsigned char *buf, void (*delay)( void )); - -/*+*---------------------------------------------------------------------------- -/ Function: xtboard_get_ether_addr -/ -/ Description: Returns ethernet address of board. -/ -/ Parameters: buf -- buffer to store ethernet address -/ delay -- 10us delay function -/ -/ Returns: nothing. -/-**----------------------------------------------------------------------------*/ - -extern void xtboard_get_ether_addr(unsigned char *buf, void (*delay)( void )); - -#endif /*0*/ - - -#endif /*_xtboard_h_included_*/ - diff --git a/include/crypto/b128ops.h b/include/crypto/b128ops.h new file mode 100644 index 00000000000..0b8e6bc5530 --- /dev/null +++ b/include/crypto/b128ops.h @@ -0,0 +1,80 @@ +/* b128ops.h - common 128-bit block operations + * + * Copyright (c) 2003, Dr Brian Gladman, Worcester, UK. + * Copyright (c) 2006, Rik Snel <rsnel@cube.dyndns.org> + * + * Based on Dr Brian Gladman's (GPL'd) work published at + * http://fp.gladman.plus.com/cryptography_technology/index.htm + * See the original copyright notice below. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the Free + * Software Foundation; either version 2 of the License, or (at your option) + * any later version. + */ +/* + --------------------------------------------------------------------------- + Copyright (c) 2003, Dr Brian Gladman, Worcester, UK. All rights reserved. + + LICENSE TERMS + + The free distribution and use of this software in both source and binary + form is allowed (with or without changes) provided that: + + 1. distributions of this source code include the above copyright + notice, this list of conditions and the following disclaimer; + + 2. distributions in binary form include the above copyright + notice, this list of conditions and the following disclaimer + in the documentation and/or other associated materials; + + 3. the copyright holder's name is not used to endorse products + built using this software without specific written permission. + + ALTERNATIVELY, provided that this notice is retained in full, this product + may be distributed under the terms of the GNU General Public License (GPL), + in which case the provisions of the GPL apply INSTEAD OF those given above. + + DISCLAIMER + + This software is provided 'as is' with no explicit or implied warranties + in respect of its properties, including, but not limited to, correctness + and/or fitness for purpose. + --------------------------------------------------------------------------- + Issue Date: 13/06/2006 +*/ + +#ifndef _CRYPTO_B128OPS_H +#define _CRYPTO_B128OPS_H + +#include <linux/types.h> + +typedef struct { + u64 a, b; +} u128; + +typedef struct { + __be64 a, b; +} be128; + +typedef struct { + __le64 b, a; +} le128; + +static inline void u128_xor(u128 *r, const u128 *p, const u128 *q) +{ + r->a = p->a ^ q->a; + r->b = p->b ^ q->b; +} + +static inline void be128_xor(be128 *r, const be128 *p, const be128 *q) +{ + u128_xor((u128 *)r, (u128 *)p, (u128 *)q); +} + +static inline void le128_xor(le128 *r, const le128 *p, const le128 *q) +{ + u128_xor((u128 *)r, (u128 *)p, (u128 *)q); +} + +#endif /* _CRYPTO_B128OPS_H */ diff --git a/include/crypto/gf128mul.h b/include/crypto/gf128mul.h new file mode 100644 index 00000000000..4fd31520244 --- /dev/null +++ b/include/crypto/gf128mul.h @@ -0,0 +1,198 @@ +/* gf128mul.h - GF(2^128) multiplication functions + * + * Copyright (c) 2003, Dr Brian Gladman, Worcester, UK. + * Copyright (c) 2006 Rik Snel <rsnel@cube.dyndns.org> + * + * Based on Dr Brian Gladman's (GPL'd) work published at + * http://fp.gladman.plus.com/cryptography_technology/index.htm + * See the original copyright notice below. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the Free + * Software Foundation; either version 2 of the License, or (at your option) + * any later version. + */ +/* + --------------------------------------------------------------------------- + Copyright (c) 2003, Dr Brian Gladman, Worcester, UK. All rights reserved. + + LICENSE TERMS + + The free distribution and use of this software in both source and binary + form is allowed (with or without changes) provided that: + + 1. distributions of this source code include the above copyright + notice, this list of conditions and the following disclaimer; + + 2. distributions in binary form include the above copyright + notice, this list of conditions and the following disclaimer + in the documentation and/or other associated materials; + + 3. the copyright holder's name is not used to endorse products + built using this software without specific written permission. + + ALTERNATIVELY, provided that this notice is retained in full, this product + may be distributed under the terms of the GNU General Public License (GPL), + in which case the provisions of the GPL apply INSTEAD OF those given above. + + DISCLAIMER + + This software is provided 'as is' with no explicit or implied warranties + in respect of its properties, including, but not limited to, correctness + and/or fitness for purpose. + --------------------------------------------------------------------------- + Issue Date: 31/01/2006 + + An implementation of field multiplication in Galois Field GF(128) +*/ + +#ifndef _CRYPTO_GF128MUL_H +#define _CRYPTO_GF128MUL_H + +#include <crypto/b128ops.h> +#include <linux/slab.h> + +/* Comment by Rik: + * + * For some background on GF(2^128) see for example: http://- + * csrc.nist.gov/CryptoToolkit/modes/proposedmodes/gcm/gcm-revised-spec.pdf + * + * The elements of GF(2^128) := GF(2)[X]/(X^128-X^7-X^2-X^1-1) can + * be mapped to computer memory in a variety of ways. Let's examine + * three common cases. + * + * Take a look at the 16 binary octets below in memory order. The msb's + * are left and the lsb's are right. char b[16] is an array and b[0] is + * the first octet. + * + * 80000000 00000000 00000000 00000000 .... 00000000 00000000 00000000 + * b[0] b[1] b[2] b[3] b[13] b[14] b[15] + * + * Every bit is a coefficient of some power of X. We can store the bits + * in every byte in little-endian order and the bytes themselves also in + * little endian order. I will call this lle (little-little-endian). + * The above buffer represents the polynomial 1, and X^7+X^2+X^1+1 looks + * like 11100001 00000000 .... 00000000 = { 0xE1, 0x00, }. + * This format was originally implemented in gf128mul and is used + * in GCM (Galois/Counter mode) and in ABL (Arbitrary Block Length). + * + * Another convention says: store the bits in bigendian order and the + * bytes also. This is bbe (big-big-endian). Now the buffer above + * represents X^127. X^7+X^2+X^1+1 looks like 00000000 .... 10000111, + * b[15] = 0x87 and the rest is 0. LRW uses this convention and bbe + * is partly implemented. + * + * Both of the above formats are easy to implement on big-endian + * machines. + * + * EME (which is patent encumbered) uses the ble format (bits are stored + * in big endian order and the bytes in little endian). The above buffer + * represents X^7 in this case and the primitive polynomial is b[0] = 0x87. + * + * The common machine word-size is smaller than 128 bits, so to make + * an efficient implementation we must split into machine word sizes. + * This file uses one 32bit for the moment. Machine endianness comes into + * play. The lle format in relation to machine endianness is discussed + * below by the original author of gf128mul Dr Brian Gladman. + * + * Let's look at the bbe and ble format on a little endian machine. + * + * bbe on a little endian machine u32 x[4]: + * + * MS x[0] LS MS x[1] LS + * ms ls ms ls ms ls ms ls ms ls ms ls ms ls ms ls + * 103..96 111.104 119.112 127.120 71...64 79...72 87...80 95...88 + * + * MS x[2] LS MS x[3] LS + * ms ls ms ls ms ls ms ls ms ls ms ls ms ls ms ls + * 39...32 47...40 55...48 63...56 07...00 15...08 23...16 31...24 + * + * ble on a little endian machine + * + * MS x[0] LS MS x[1] LS + * ms ls ms ls ms ls ms ls ms ls ms ls ms ls ms ls + * 31...24 23...16 15...08 07...00 63...56 55...48 47...40 39...32 + * + * MS x[2] LS MS x[3] LS + * ms ls ms ls ms ls ms ls ms ls ms ls ms ls ms ls + * 95...88 87...80 79...72 71...64 127.120 199.112 111.104 103..96 + * + * Multiplications in GF(2^128) are mostly bit-shifts, so you see why + * ble (and lbe also) are easier to implement on a little-endian + * machine than on a big-endian machine. The converse holds for bbe + * and lle. + * + * Note: to have good alignment, it seems to me that it is sufficient + * to keep elements of GF(2^128) in type u64[2]. On 32-bit wordsize + * machines this will automatically aligned to wordsize and on a 64-bit + * machine also. + */ +/* Multiply a GF128 field element by x. Field elements are held in arrays + of bytes in which field bits 8n..8n + 7 are held in byte[n], with lower + indexed bits placed in the more numerically significant bit positions + within bytes. + + On little endian machines the bit indexes translate into the bit + positions within four 32-bit words in the following way + + MS x[0] LS MS x[1] LS + ms ls ms ls ms ls ms ls ms ls ms ls ms ls ms ls + 24...31 16...23 08...15 00...07 56...63 48...55 40...47 32...39 + + MS x[2] LS MS x[3] LS + ms ls ms ls ms ls ms ls ms ls ms ls ms ls ms ls + 88...95 80...87 72...79 64...71 120.127 112.119 104.111 96..103 + + On big endian machines the bit indexes translate into the bit + positions within four 32-bit words in the following way + + MS x[0] LS MS x[1] LS + ms ls ms ls ms ls ms ls ms ls ms ls ms ls ms ls + 00...07 08...15 16...23 24...31 32...39 40...47 48...55 56...63 + + MS x[2] LS MS x[3] LS + ms ls ms ls ms ls ms ls ms ls ms ls ms ls ms ls + 64...71 72...79 80...87 88...95 96..103 104.111 112.119 120.127 +*/ + +/* A slow generic version of gf_mul, implemented for lle and bbe + * It multiplies a and b and puts the result in a */ +void gf128mul_lle(be128 *a, const be128 *b); + +void gf128mul_bbe(be128 *a, const be128 *b); + + +/* 4k table optimization */ + +struct gf128mul_4k { + be128 t[256]; +}; + +struct gf128mul_4k *gf128mul_init_4k_lle(const be128 *g); +struct gf128mul_4k *gf128mul_init_4k_bbe(const be128 *g); +void gf128mul_4k_lle(be128 *a, struct gf128mul_4k *t); +void gf128mul_4k_bbe(be128 *a, struct gf128mul_4k *t); + +static inline void gf128mul_free_4k(struct gf128mul_4k *t) +{ + kfree(t); +} + + +/* 64k table optimization, implemented for lle and bbe */ + +struct gf128mul_64k { + struct gf128mul_4k *t[16]; +}; + +/* first initialize with the constant factor with which you + * want to multiply and then call gf128_64k_lle with the other + * factor in the first argument, the table in the second and a + * scratch register in the third. Afterwards *a = *r. */ +struct gf128mul_64k *gf128mul_init_64k_lle(const be128 *g); +struct gf128mul_64k *gf128mul_init_64k_bbe(const be128 *g); +void gf128mul_free_64k(struct gf128mul_64k *t); +void gf128mul_64k_lle(be128 *a, struct gf128mul_64k *t); +void gf128mul_64k_bbe(be128 *a, struct gf128mul_64k *t); + +#endif /* _CRYPTO_GF128MUL_H */ diff --git a/include/linux/Kbuild b/include/linux/Kbuild index a1155a2beb3..862e483cce8 100644 --- a/include/linux/Kbuild +++ b/include/linux/Kbuild @@ -60,10 +60,7 @@ header-y += fadvise.h header-y += fd.h header-y += fdreg.h header-y += fib_rules.h -header-y += ftape-header-segment.h -header-y += ftape-vendors.h header-y += fuse.h -header-y += futex.h header-y += genetlink.h header-y += gen_stats.h header-y += gigaset_dev.h @@ -122,7 +119,6 @@ header-y += nfs4_mount.h header-y += nfs_mount.h header-y += oom.h header-y += param.h -header-y += pci_ids.h header-y += pci_regs.h header-y += personality.h header-y += pfkeyv2.h @@ -141,7 +137,6 @@ header-y += radeonfb.h header-y += raw.h header-y += resource.h header-y += rose.h -header-y += sctp.h header-y += smbno.h header-y += snmp.h header-y += sockios.h @@ -165,7 +160,6 @@ header-y += vt.h header-y += wireless.h header-y += xattr.h header-y += x25.h -header-y += zorro_ids.h unifdef-y += acct.h unifdef-y += adb.h @@ -193,7 +187,6 @@ unifdef-y += cuda.h unifdef-y += cyclades.h unifdef-y += dccp.h unifdef-y += dirent.h -unifdef-y += divert.h unifdef-y += dlm.h unifdef-y += elfcore.h unifdef-y += errno.h @@ -206,8 +199,8 @@ unifdef-y += fb.h unifdef-y += fcntl.h unifdef-y += filter.h unifdef-y += flat.h +unifdef-y += futex.h unifdef-y += fs.h -unifdef-y += ftape.h unifdef-y += gameport.h unifdef-y += generic_serial.h unifdef-y += genhd.h @@ -225,6 +218,7 @@ unifdef-y += if_bridge.h unifdef-y += if_ec.h unifdef-y += if_eql.h unifdef-y += if_ether.h +unifdef-y += if_fddi.h unifdef-y += if_frad.h unifdef-y += if_ltalk.h unifdef-y += if_pppox.h @@ -286,6 +280,7 @@ unifdef-y += nvram.h unifdef-y += parport.h unifdef-y += patchkey.h unifdef-y += pci.h +unifdef-y += personality.h unifdef-y += pktcdvd.h unifdef-y += pmu.h unifdef-y += poll.h @@ -341,7 +336,7 @@ unifdef-y += videodev.h unifdef-y += wait.h unifdef-y += wanrouter.h unifdef-y += watchdog.h +unifdef-y += wireless.h unifdef-y += xfrm.h -unifdef-y += zftape.h objhdr-y += version.h diff --git a/include/linux/acct.h b/include/linux/acct.h index 0496d1f0995..302eb727ecb 100644 --- a/include/linux/acct.h +++ b/include/linux/acct.h @@ -119,6 +119,7 @@ struct acct_v3 #ifdef CONFIG_BSD_PROCESS_ACCT struct vfsmount; struct super_block; +struct pacct_struct; extern void acct_auto_close_mnt(struct vfsmount *m); extern void acct_auto_close(struct super_block *sb); extern void acct_init_pacct(struct pacct_struct *pacct); diff --git a/include/linux/acpi.h b/include/linux/acpi.h index 2b0c955590f..91f1f236387 100644 --- a/include/linux/acpi.h +++ b/include/linux/acpi.h @@ -47,6 +47,7 @@ enum acpi_irq_model_id { ACPI_IRQ_MODEL_PIC = 0, ACPI_IRQ_MODEL_IOAPIC, ACPI_IRQ_MODEL_IOSAPIC, + ACPI_IRQ_MODEL_PLATFORM, ACPI_IRQ_MODEL_COUNT }; diff --git a/include/linux/aio.h b/include/linux/aio.h index 0d71c0041f1..a30ef13c9e6 100644 --- a/include/linux/aio.h +++ b/include/linux/aio.h @@ -105,13 +105,13 @@ struct kiocb { wait_queue_t ki_wait; loff_t ki_pos; + atomic_t ki_bio_count; /* num bio used for this iocb */ void *private; /* State that we remember to be able to restart/retry */ unsigned short ki_opcode; size_t ki_nbytes; /* copy of iocb->aio_nbytes */ char __user *ki_buf; /* remaining iocb->aio_buf */ size_t ki_left; /* remaining bytes */ - long ki_retried; /* just for testing */ struct iovec ki_inline_vec; /* inline vector */ struct iovec *ki_iovec; unsigned long ki_nr_segs; @@ -194,7 +194,7 @@ struct kioctx { struct aio_ring_info ring_info; - struct work_struct wq; + struct delayed_work wq; }; /* prototypes */ @@ -238,7 +238,6 @@ do { \ } while (0) #define io_wait_to_kiocb(wait) container_of(wait, struct kiocb, ki_wait) -#define is_retried_kiocb(iocb) ((iocb)->ki_retried > 1) #include <linux/aio_abi.h> diff --git a/include/linux/ata.h b/include/linux/ata.h index d8944190702..1df941648a5 100644 --- a/include/linux/ata.h +++ b/include/linux/ata.h @@ -200,8 +200,9 @@ enum { ATA_CBL_NONE = 0, ATA_CBL_PATA40 = 1, ATA_CBL_PATA80 = 2, - ATA_CBL_PATA_UNK = 3, - ATA_CBL_SATA = 4, + ATA_CBL_PATA40_SHORT = 3, /* 40 wire cable to high UDMA spec */ + ATA_CBL_PATA_UNK = 4, + ATA_CBL_SATA = 5, /* SATA Status and Control Registers */ SCR_STATUS = 0, @@ -342,6 +343,15 @@ static inline int ata_id_is_cfa(const u16 *id) return 0; } +static inline int ata_drive_40wire(const u16 *dev_id) +{ + if (ata_id_major_version(dev_id) >= 5 && ata_id_is_sata(dev_id)) + return 0; /* SATA */ + if (dev_id[93] & 0x4000) + return 0; /* 80 wire */ + return 1; +} + static inline int atapi_cdb_len(const u16 *dev_id) { u16 tmp = dev_id[0] & 0x3; diff --git a/include/linux/atmarp.h b/include/linux/atmarp.h index 24f82338f59..ee108f9e9cb 100644 --- a/include/linux/atmarp.h +++ b/include/linux/atmarp.h @@ -37,7 +37,7 @@ enum atmarp_ctrl_type { struct atmarp_ctrl { enum atmarp_ctrl_type type; /* message type */ int itf_num;/* interface number (if present) */ - uint32_t ip; /* IP address (act_need only) */ + __be32 ip; /* IP address (act_need only) */ }; #endif diff --git a/include/linux/atmbr2684.h b/include/linux/atmbr2684.h index 7981b733f1e..969fb6c9e1c 100644 --- a/include/linux/atmbr2684.h +++ b/include/linux/atmbr2684.h @@ -86,8 +86,8 @@ struct atm_backend_br2684 { * efficient per-if in/out filters, this support will be removed */ struct br2684_filter { - __u32 prefix; /* network byte order */ - __u32 netmask; /* 0 = disable filter */ + __be32 prefix; /* network byte order */ + __be32 netmask; /* 0 = disable filter */ }; struct br2684_filter_set { diff --git a/include/linux/atmmpc.h b/include/linux/atmmpc.h index 5fbfa68136d..ea1650425a1 100644 --- a/include/linux/atmmpc.h +++ b/include/linux/atmmpc.h @@ -13,7 +13,7 @@ struct atmmpc_ioc { int dev_num; - uint32_t ipaddr; /* the IP address of the shortcut */ + __be32 ipaddr; /* the IP address of the shortcut */ int type; /* ingress or egress */ }; @@ -21,8 +21,8 @@ typedef struct in_ctrl_info { uint8_t Last_NHRP_CIE_code; uint8_t Last_Q2931_cause_value; uint8_t eg_MPC_ATM_addr[ATM_ESA_LEN]; - uint32_t tag; - uint32_t in_dst_ip; /* IP address this ingress MPC sends packets to */ + __be32 tag; + __be32 in_dst_ip; /* IP address this ingress MPC sends packets to */ uint16_t holding_time; uint32_t request_id; } in_ctrl_info; @@ -30,10 +30,10 @@ typedef struct in_ctrl_info { typedef struct eg_ctrl_info { uint8_t DLL_header[256]; uint8_t DH_length; - uint32_t cache_id; - uint32_t tag; - uint32_t mps_ip; - uint32_t eg_dst_ip; /* IP address to which ingress MPC sends packets */ + __be32 cache_id; + __be32 tag; + __be32 mps_ip; + __be32 eg_dst_ip; /* IP address to which ingress MPC sends packets */ uint8_t in_MPC_data_ATM_addr[ATM_ESA_LEN]; uint16_t holding_time; } eg_ctrl_info; @@ -49,7 +49,7 @@ struct mpc_parameters { struct k_message { uint16_t type; - uint32_t ip_mask; + __be32 ip_mask; uint8_t MPS_ctrl[ATM_ESA_LEN]; union { in_ctrl_info in_info; diff --git a/include/linux/audit.h b/include/linux/audit.h index b2ca666d999..0e07db6cc0d 100644 --- a/include/linux/audit.h +++ b/include/linux/audit.h @@ -101,6 +101,10 @@ #define AUDIT_MAC_CIPSOV4_DEL 1408 /* NetLabel: del CIPSOv4 DOI entry */ #define AUDIT_MAC_MAP_ADD 1409 /* NetLabel: add LSM domain mapping */ #define AUDIT_MAC_MAP_DEL 1410 /* NetLabel: del LSM domain mapping */ +#define AUDIT_MAC_IPSEC_ADDSA 1411 /* Add a XFRM state */ +#define AUDIT_MAC_IPSEC_DELSA 1412 /* Delete a XFRM state */ +#define AUDIT_MAC_IPSEC_ADDSPD 1413 /* Add a XFRM policy */ +#define AUDIT_MAC_IPSEC_DELSPD 1414 /* Delete a XFRM policy */ #define AUDIT_FIRST_KERN_ANOM_MSG 1700 #define AUDIT_LAST_KERN_ANOM_MSG 1799 @@ -377,6 +381,7 @@ extern void auditsc_get_stamp(struct audit_context *ctx, struct timespec *t, unsigned int *serial); extern int audit_set_loginuid(struct task_struct *task, uid_t loginuid); extern uid_t audit_get_loginuid(struct audit_context *ctx); +extern void audit_log_task_context(struct audit_buffer *ab); extern int __audit_ipc_obj(struct kern_ipc_perm *ipcp); extern int __audit_ipc_set_perm(unsigned long qbytes, uid_t uid, gid_t gid, mode_t mode); extern int audit_bprm(struct linux_binprm *bprm); @@ -449,6 +454,7 @@ extern int audit_n_rules; #define audit_inode_update(i) do { ; } while (0) #define auditsc_get_stamp(c,t,s) do { BUG(); } while (0) #define audit_get_loginuid(c) ({ -1; }) +#define audit_log_task_context(b) do { ; } while (0) #define audit_ipc_obj(i) ({ 0; }) #define audit_ipc_set_perm(q,u,g,m) ({ 0; }) #define audit_bprm(p) ({ 0; }) diff --git a/include/linux/backlight.h b/include/linux/backlight.h index 75e91f5b6a0..a5cf1beacb4 100644 --- a/include/linux/backlight.h +++ b/include/linux/backlight.h @@ -54,7 +54,7 @@ struct backlight_device { }; extern struct backlight_device *backlight_device_register(const char *name, - void *devdata, struct backlight_properties *bp); + struct device *dev,void *devdata,struct backlight_properties *bp); extern void backlight_device_unregister(struct backlight_device *bd); #define to_backlight_device(obj) container_of(obj, struct backlight_device, class_dev) diff --git a/include/linux/bio.h b/include/linux/bio.h index 092dbd0e765..08daf3272c0 100644 --- a/include/linux/bio.h +++ b/include/linux/bio.h @@ -309,6 +309,7 @@ extern struct bio *bio_map_kern(struct request_queue *, void *, unsigned int, gfp_t); extern void bio_set_pages_dirty(struct bio *bio); extern void bio_check_pages_dirty(struct bio *bio); +extern void bio_release_pages(struct bio *bio); extern struct bio *bio_copy_user(struct request_queue *, unsigned long, unsigned int, int); extern int bio_uncopy_user(struct bio *); void zero_fill_bio(struct bio *bio); diff --git a/include/linux/bitrev.h b/include/linux/bitrev.h new file mode 100644 index 00000000000..05e540d6963 --- /dev/null +++ b/include/linux/bitrev.h @@ -0,0 +1,15 @@ +#ifndef _LINUX_BITREV_H +#define _LINUX_BITREV_H + +#include <linux/types.h> + +extern u8 const byte_rev_table[256]; + +static inline u8 bitrev8(u8 byte) +{ + return byte_rev_table[byte]; +} + +extern u32 bitrev32(u32 in); + +#endif /* _LINUX_BITREV_H */ diff --git a/include/linux/blkdev.h b/include/linux/blkdev.h index 7bfcde2d557..36a6eacefe2 100644 --- a/include/linux/blkdev.h +++ b/include/linux/blkdev.h @@ -331,10 +331,6 @@ struct request_pm_state #include <linux/elevator.h> -typedef int (merge_request_fn) (request_queue_t *, struct request *, - struct bio *); -typedef int (merge_requests_fn) (request_queue_t *, struct request *, - struct request *); typedef void (request_fn_proc) (request_queue_t *q); typedef int (make_request_fn) (request_queue_t *q, struct bio *bio); typedef int (prep_rq_fn) (request_queue_t *, struct request *); @@ -342,7 +338,6 @@ typedef void (unplug_fn) (request_queue_t *); struct bio_vec; typedef int (merge_bvec_fn) (request_queue_t *, struct bio *, struct bio_vec *); -typedef void (activity_fn) (void *data, int rw); typedef int (issue_flush_fn) (request_queue_t *, struct gendisk *, sector_t *); typedef void (prepare_flush_fn) (request_queue_t *, struct request *); typedef void (softirq_done_fn)(struct request *); @@ -377,14 +372,10 @@ struct request_queue struct request_list rq; request_fn_proc *request_fn; - merge_request_fn *back_merge_fn; - merge_request_fn *front_merge_fn; - merge_requests_fn *merge_requests_fn; make_request_fn *make_request_fn; prep_rq_fn *prep_rq_fn; unplug_fn *unplug_fn; merge_bvec_fn *merge_bvec_fn; - activity_fn *activity_fn; issue_flush_fn *issue_flush_fn; prepare_flush_fn *prepare_flush_fn; softirq_done_fn *softirq_done_fn; @@ -411,8 +402,6 @@ struct request_queue */ void *queuedata; - void *activity_data; - /* * queue needs bounce pages for pages above this limit */ @@ -653,6 +642,11 @@ extern int sg_scsi_ioctl(struct file *, struct request_queue *, struct gendisk *, struct scsi_ioctl_command __user *); /* + * Temporary export, until SCSI gets fixed up. + */ +extern int ll_back_merge_fn(request_queue_t *, struct request *, struct bio *); + +/* * A queue has just exitted congestion. Note this in the global counter of * congested queues, and wake up anyone who was waiting for requests to be * put back. @@ -677,11 +671,11 @@ extern void blk_sync_queue(struct request_queue *q); extern void __blk_stop_queue(request_queue_t *q); extern void blk_run_queue(request_queue_t *); extern void blk_start_queueing(request_queue_t *); -extern void blk_queue_activity_fn(request_queue_t *, activity_fn *, void *); -extern int blk_rq_map_user(request_queue_t *, struct request *, void __user *, unsigned int); -extern int blk_rq_unmap_user(struct bio *, unsigned int); +extern int blk_rq_map_user(request_queue_t *, struct request *, void __user *, unsigned long); +extern int blk_rq_unmap_user(struct bio *); extern int blk_rq_map_kern(request_queue_t *, struct request *, void *, unsigned int, gfp_t); -extern int blk_rq_map_user_iov(request_queue_t *, struct request *, struct sg_iovec *, int); +extern int blk_rq_map_user_iov(request_queue_t *, struct request *, + struct sg_iovec *, int, unsigned int); extern int blk_execute_rq(request_queue_t *, struct gendisk *, struct request *, int); extern void blk_execute_rq_nowait(request_queue_t *, struct gendisk *, diff --git a/include/linux/blktrace_api.h b/include/linux/blktrace_api.h index b99a714fcac..3680ff9a30e 100644 --- a/include/linux/blktrace_api.h +++ b/include/linux/blktrace_api.h @@ -50,6 +50,15 @@ enum blktrace_act { }; /* + * Notify events. + */ +enum blktrace_notify { + __BLK_TN_PROCESS = 0, /* establish pid/name mapping */ + __BLK_TN_TIMESTAMP, /* include system clock */ +}; + + +/* * Trace actions in full. Additionally, read or write is masked */ #define BLK_TA_QUEUE (__BLK_TA_QUEUE | BLK_TC_ACT(BLK_TC_QUEUE)) @@ -68,6 +77,9 @@ enum blktrace_act { #define BLK_TA_BOUNCE (__BLK_TA_BOUNCE) #define BLK_TA_REMAP (__BLK_TA_REMAP | BLK_TC_ACT(BLK_TC_QUEUE)) +#define BLK_TN_PROCESS (__BLK_TN_PROCESS | BLK_TC_ACT(BLK_TC_NOTIFY)) +#define BLK_TN_TIMESTAMP (__BLK_TN_TIMESTAMP | BLK_TC_ACT(BLK_TC_NOTIFY)) + #define BLK_IO_TRACE_MAGIC 0x65617400 #define BLK_IO_TRACE_VERSION 0x07 diff --git a/include/linux/bootmem.h b/include/linux/bootmem.h index 31e9abb6d97..2275f274870 100644 --- a/include/linux/bootmem.h +++ b/include/linux/bootmem.h @@ -119,8 +119,7 @@ extern void *alloc_large_system_hash(const char *tablename, unsigned int *_hash_mask, unsigned long limit); -#define HASH_HIGHMEM 0x00000001 /* Consider highmem? */ -#define HASH_EARLY 0x00000002 /* Allocating during early boot? */ +#define HASH_EARLY 0x00000001 /* Allocating during early boot? */ /* Only NUMA needs hash distribution. * IA64 is known to have sufficient vmalloc space. diff --git a/include/linux/bottom_half.h b/include/linux/bottom_half.h new file mode 100644 index 00000000000..777dbf695d4 --- /dev/null +++ b/include/linux/bottom_half.h @@ -0,0 +1,10 @@ +#ifndef _LINUX_BH_H +#define _LINUX_BH_H + +extern void local_bh_disable(void); +extern void __local_bh_enable(void); +extern void _local_bh_enable(void); +extern void local_bh_enable(void); +extern void local_bh_enable_ip(unsigned long ip); + +#endif /* _LINUX_BH_H */ diff --git a/include/linux/bug.h b/include/linux/bug.h new file mode 100644 index 00000000000..42aa0a54b6f --- /dev/null +++ b/include/linux/bug.h @@ -0,0 +1,47 @@ +#ifndef _LINUX_BUG_H +#define _LINUX_BUG_H + +#include <linux/module.h> +#include <asm/bug.h> + +enum bug_trap_type { + BUG_TRAP_TYPE_NONE = 0, + BUG_TRAP_TYPE_WARN = 1, + BUG_TRAP_TYPE_BUG = 2, +}; + +#ifdef CONFIG_GENERIC_BUG +#include <asm-generic/bug.h> + +static inline int is_warning_bug(const struct bug_entry *bug) +{ + return bug->flags & BUGFLAG_WARNING; +} + +const struct bug_entry *find_bug(unsigned long bugaddr); + +enum bug_trap_type report_bug(unsigned long bug_addr); + +int module_bug_finalize(const Elf_Ehdr *, const Elf_Shdr *, + struct module *); +void module_bug_cleanup(struct module *); + +/* These are defined by the architecture */ +int is_valid_bugaddr(unsigned long addr); + +#else /* !CONFIG_GENERIC_BUG */ + +static inline enum bug_trap_type report_bug(unsigned long bug_addr) +{ + return BUG_TRAP_TYPE_BUG; +} +static inline int module_bug_finalize(const Elf_Ehdr *hdr, + const Elf_Shdr *sechdrs, + struct module *mod) +{ + return 0; +} +static inline void module_bug_cleanup(struct module *mod) {} + +#endif /* CONFIG_GENERIC_BUG */ +#endif /* _LINUX_BUG_H */ diff --git a/include/linux/carta_random32.h b/include/linux/carta_random32.h deleted file mode 100644 index f6f3bd9f20b..00000000000 --- a/include/linux/carta_random32.h +++ /dev/null @@ -1,29 +0,0 @@ -/* - * Fast, simple, yet decent quality random number generator based on - * a paper by David G. Carta ("Two Fast Implementations of the - * `Minimal Standard' Random Number Generator," Communications of the - * ACM, January, 1990). - * - * Copyright (c) 2002-2006 Hewlett-Packard Development Company, L.P. - * Contributed by Stephane Eranian <eranian@hpl.hp.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of version 2 of the GNU General Public - * License as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA - * 02111-1307 USA - */ -#ifndef _LINUX_CARTA_RANDOM32_H_ -#define _LINUX_CARTA_RANDOM32_H_ - -u64 carta_random32(u64 seed); - -#endif /* _LINUX_CARTA_RANDOM32_H_ */ diff --git a/include/linux/cciss_ioctl.h b/include/linux/cciss_ioctl.h index 6e27f42e3a5..cb57c30081a 100644 --- a/include/linux/cciss_ioctl.h +++ b/include/linux/cciss_ioctl.h @@ -80,7 +80,7 @@ typedef __u32 DriverVer_type; #define HWORD __u16 #define DWORD __u32 -#define CISS_MAX_LUN 16 +#define CISS_MAX_LUN 1024 #define LEVEL2LUN 1 // index into Target(x) structure, due to byte swapping #define LEVEL3LUN 0 diff --git a/include/linux/cdev.h b/include/linux/cdev.h index ee5f53f2ca1..f309b00e986 100644 --- a/include/linux/cdev.h +++ b/include/linux/cdev.h @@ -2,6 +2,10 @@ #define _LINUX_CDEV_H #ifdef __KERNEL__ +#include <linux/kobject.h> +#include <linux/kdev_t.h> +#include <linux/list.h> + struct cdev { struct kobject kobj; struct module *owner; diff --git a/include/linux/clocksource.h b/include/linux/clocksource.h index d852024ed09..1622d23a8dc 100644 --- a/include/linux/clocksource.h +++ b/include/linux/clocksource.h @@ -159,7 +159,7 @@ static inline s64 cyc2ns(struct clocksource *cs, cycle_t cycles) * Unless you're the timekeeping code, you should not be using this! */ static inline void clocksource_calculate_interval(struct clocksource *c, - unsigned long length_nsec) + unsigned long length_nsec) { u64 tmp; diff --git a/include/linux/coda_linux.h b/include/linux/coda_linux.h index be512cc9879..4c2632a8d31 100644 --- a/include/linux/coda_linux.h +++ b/include/linux/coda_linux.h @@ -64,7 +64,7 @@ void coda_sysctl_clean(void); #define CODA_ALLOC(ptr, cast, size) do { \ if (size < PAGE_SIZE) \ - ptr = (cast)kmalloc((unsigned long) size, GFP_KERNEL); \ + ptr = kmalloc((unsigned long) size, GFP_KERNEL); \ else \ ptr = (cast)vmalloc((unsigned long) size); \ if (!ptr) \ diff --git a/include/linux/compiler.h b/include/linux/compiler.h index 538423d4a86..aca66984aaf 100644 --- a/include/linux/compiler.h +++ b/include/linux/compiler.h @@ -40,7 +40,7 @@ extern void __chk_io_ptr(void __iomem *); #error no compiler-gcc.h file for this gcc version #elif __GNUC__ == 4 # include <linux/compiler-gcc4.h> -#elif __GNUC__ == 3 +#elif __GNUC__ == 3 && __GNUC_MINOR__ >= 2 # include <linux/compiler-gcc3.h> #else # error Sorry, your compiler is too old/not recognized. diff --git a/include/linux/configfs.h b/include/linux/configfs.h index a7f01502753..fef6f3d0a4a 100644 --- a/include/linux/configfs.h +++ b/include/linux/configfs.h @@ -160,31 +160,6 @@ struct configfs_group_operations { void (*drop_item)(struct config_group *group, struct config_item *item); }; - - -/** - * Use these macros to make defining attributes easier. See include/linux/device.h - * for examples.. - */ - -#if 0 -#define __ATTR(_name,_mode,_show,_store) { \ - .attr = {.ca_name = __stringify(_name), .ca_mode = _mode, .ca_owner = THIS_MODULE }, \ - .show = _show, \ - .store = _store, \ -} - -#define __ATTR_RO(_name) { \ - .attr = { .ca_name = __stringify(_name), .ca_mode = 0444, .ca_owner = THIS_MODULE }, \ - .show = _name##_show, \ -} - -#define __ATTR_NULL { .attr = { .name = NULL } } - -#define attr_name(_attr) (_attr).attr.name -#endif - - struct configfs_subsystem { struct config_group su_group; struct semaphore su_sem; diff --git a/include/linux/connector.h b/include/linux/connector.h index 4c02119c6ab..10eb56b2940 100644 --- a/include/linux/connector.h +++ b/include/linux/connector.h @@ -170,7 +170,7 @@ void cn_queue_free_dev(struct cn_queue_dev *dev); int cn_cb_equal(struct cb_id *, struct cb_id *); -void cn_queue_wrapper(void *data); +void cn_queue_wrapper(struct work_struct *work); extern int cn_already_initialized; diff --git a/include/linux/cpu.h b/include/linux/cpu.h index 3fef7d67aed..bfb520212d7 100644 --- a/include/linux/cpu.h +++ b/include/linux/cpu.h @@ -24,15 +24,24 @@ #include <linux/compiler.h> #include <linux/cpumask.h> #include <asm/semaphore.h> +#include <linux/mutex.h> struct cpu { int node_id; /* The node which contains the CPU */ - int no_control; /* Should the sysfs control file be created? */ + int hotpluggable; /* creates sysfs control file if hotpluggable */ struct sys_device sysdev; }; extern int register_cpu(struct cpu *cpu, int num); extern struct sys_device *get_cpu_sysdev(unsigned cpu); + +extern int cpu_add_sysdev_attr(struct sysdev_attribute *attr); +extern void cpu_remove_sysdev_attr(struct sysdev_attribute *attr); + +extern int cpu_add_sysdev_attr_group(struct attribute_group *attrs); +extern void cpu_remove_sysdev_attr_group(struct attribute_group *attrs); + + #ifdef CONFIG_HOTPLUG_CPU extern void unregister_cpu(struct cpu *cpu); #endif @@ -66,6 +75,17 @@ extern struct sysdev_class cpu_sysdev_class; #ifdef CONFIG_HOTPLUG_CPU /* Stop CPUs going up and down. */ + +static inline void cpuhotplug_mutex_lock(struct mutex *cpu_hp_mutex) +{ + mutex_lock(cpu_hp_mutex); +} + +static inline void cpuhotplug_mutex_unlock(struct mutex *cpu_hp_mutex) +{ + mutex_unlock(cpu_hp_mutex); +} + extern void lock_cpu_hotplug(void); extern void unlock_cpu_hotplug(void); #define hotcpu_notifier(fn, pri) { \ @@ -77,17 +97,24 @@ extern void unlock_cpu_hotplug(void); #define unregister_hotcpu_notifier(nb) unregister_cpu_notifier(nb) int cpu_down(unsigned int cpu); #define cpu_is_offline(cpu) unlikely(!cpu_online(cpu)) -#else + +#else /* CONFIG_HOTPLUG_CPU */ + +static inline void cpuhotplug_mutex_lock(struct mutex *cpu_hp_mutex) +{ } +static inline void cpuhotplug_mutex_unlock(struct mutex *cpu_hp_mutex) +{ } + #define lock_cpu_hotplug() do { } while (0) #define unlock_cpu_hotplug() do { } while (0) #define lock_cpu_hotplug_interruptible() 0 -#define hotcpu_notifier(fn, pri) do { } while (0) -#define register_hotcpu_notifier(nb) do { } while (0) -#define unregister_hotcpu_notifier(nb) do { } while (0) +#define hotcpu_notifier(fn, pri) do { (void)(fn); } while (0) +#define register_hotcpu_notifier(nb) do { (void)(nb); } while (0) +#define unregister_hotcpu_notifier(nb) do { (void)(nb); } while (0) /* CPUs don't go offline once they're online w/o CONFIG_HOTPLUG_CPU */ static inline int cpu_is_offline(int cpu) { return 0; } -#endif +#endif /* CONFIG_HOTPLUG_CPU */ #ifdef CONFIG_SUSPEND_SMP extern int disable_nonboot_cpus(void); diff --git a/include/linux/cpufreq.h b/include/linux/cpufreq.h index 4ea39fee99c..7f008f6bfdc 100644 --- a/include/linux/cpufreq.h +++ b/include/linux/cpufreq.h @@ -172,6 +172,8 @@ extern int __cpufreq_driver_target(struct cpufreq_policy *policy, unsigned int relation); +extern int cpufreq_driver_getavg(struct cpufreq_policy *policy); + int cpufreq_register_governor(struct cpufreq_governor *governor); void cpufreq_unregister_governor(struct cpufreq_governor *governor); @@ -204,6 +206,7 @@ struct cpufreq_driver { unsigned int (*get) (unsigned int cpu); /* optional */ + unsigned int (*getavg) (unsigned int cpu); int (*exit) (struct cpufreq_policy *policy); int (*suspend) (struct cpufreq_policy *policy, pm_message_t pmsg); int (*resume) (struct cpufreq_policy *policy); diff --git a/include/linux/cpuset.h b/include/linux/cpuset.h index 4d8adf66368..fd404416f31 100644 --- a/include/linux/cpuset.h +++ b/include/linux/cpuset.h @@ -23,16 +23,26 @@ extern void cpuset_fork(struct task_struct *p); extern void cpuset_exit(struct task_struct *p); extern cpumask_t cpuset_cpus_allowed(struct task_struct *p); extern nodemask_t cpuset_mems_allowed(struct task_struct *p); +#define cpuset_current_mems_allowed (current->mems_allowed) void cpuset_init_current_mems_allowed(void); void cpuset_update_task_memory_state(void); #define cpuset_nodes_subset_current_mems_allowed(nodes) \ nodes_subset((nodes), current->mems_allowed) int cpuset_zonelist_valid_mems_allowed(struct zonelist *zl); -extern int __cpuset_zone_allowed(struct zone *z, gfp_t gfp_mask); -static int inline cpuset_zone_allowed(struct zone *z, gfp_t gfp_mask) +extern int __cpuset_zone_allowed_softwall(struct zone *z, gfp_t gfp_mask); +extern int __cpuset_zone_allowed_hardwall(struct zone *z, gfp_t gfp_mask); + +static int inline cpuset_zone_allowed_softwall(struct zone *z, gfp_t gfp_mask) +{ + return number_of_cpusets <= 1 || + __cpuset_zone_allowed_softwall(z, gfp_mask); +} + +static int inline cpuset_zone_allowed_hardwall(struct zone *z, gfp_t gfp_mask) { - return number_of_cpusets <= 1 || __cpuset_zone_allowed(z, gfp_mask); + return number_of_cpusets <= 1 || + __cpuset_zone_allowed_hardwall(z, gfp_mask); } extern int cpuset_excl_nodes_overlap(const struct task_struct *p); @@ -83,6 +93,7 @@ static inline nodemask_t cpuset_mems_allowed(struct task_struct *p) return node_possible_map; } +#define cpuset_current_mems_allowed (node_online_map) static inline void cpuset_init_current_mems_allowed(void) {} static inline void cpuset_update_task_memory_state(void) {} #define cpuset_nodes_subset_current_mems_allowed(nodes) (1) @@ -92,7 +103,12 @@ static inline int cpuset_zonelist_valid_mems_allowed(struct zonelist *zl) return 1; } -static inline int cpuset_zone_allowed(struct zone *z, gfp_t gfp_mask) +static inline int cpuset_zone_allowed_softwall(struct zone *z, gfp_t gfp_mask) +{ + return 1; +} + +static inline int cpuset_zone_allowed_hardwall(struct zone *z, gfp_t gfp_mask) { return 1; } diff --git a/include/linux/crc32.h b/include/linux/crc32.h index 56c0645789a..e20dd1f9b40 100644 --- a/include/linux/crc32.h +++ b/include/linux/crc32.h @@ -6,10 +6,10 @@ #define _LINUX_CRC32_H #include <linux/types.h> +#include <linux/bitrev.h> extern u32 crc32_le(u32 crc, unsigned char const *p, size_t len); extern u32 crc32_be(u32 crc, unsigned char const *p, size_t len); -extern u32 bitreverse(u32 in); #define crc32(seed, data, length) crc32_le(seed, (unsigned char const *)data, length) @@ -21,7 +21,7 @@ extern u32 bitreverse(u32 in); * is in bit nr 0], thus it must be reversed before use. Except for * nics that bit swap the result internally... */ -#define ether_crc(length, data) bitreverse(crc32_le(~0, data, length)) +#define ether_crc(length, data) bitrev32(crc32_le(~0, data, length)) #define ether_crc_le(length, data) crc32_le(~0, data, length) #endif /* _LINUX_CRC32_H */ diff --git a/include/linux/crypto.h b/include/linux/crypto.h index 6485e9716b3..4aa9046601d 100644 --- a/include/linux/crypto.h +++ b/include/linux/crypto.h @@ -241,12 +241,8 @@ int crypto_unregister_alg(struct crypto_alg *alg); * Algorithm query interface. */ #ifdef CONFIG_CRYPTO -int crypto_alg_available(const char *name, u32 flags) - __deprecated_for_modules; int crypto_has_alg(const char *name, u32 type, u32 mask); #else -static int crypto_alg_available(const char *name, u32 flags) - __deprecated_for_modules; static inline int crypto_alg_available(const char *name, u32 flags) { return 0; @@ -707,16 +703,6 @@ static inline void crypto_cipher_decrypt_one(struct crypto_cipher *tfm, dst, src); } -void crypto_digest_init(struct crypto_tfm *tfm) __deprecated_for_modules; -void crypto_digest_update(struct crypto_tfm *tfm, - struct scatterlist *sg, unsigned int nsg) - __deprecated_for_modules; -void crypto_digest_final(struct crypto_tfm *tfm, u8 *out) - __deprecated_for_modules; -void crypto_digest_digest(struct crypto_tfm *tfm, - struct scatterlist *sg, unsigned int nsg, u8 *out) - __deprecated_for_modules; - static inline struct crypto_hash *__crypto_hash_cast(struct crypto_tfm *tfm) { return (struct crypto_hash *)tfm; @@ -729,14 +715,6 @@ static inline struct crypto_hash *crypto_hash_cast(struct crypto_tfm *tfm) return __crypto_hash_cast(tfm); } -static int crypto_digest_setkey(struct crypto_tfm *tfm, const u8 *key, - unsigned int keylen) __deprecated; -static inline int crypto_digest_setkey(struct crypto_tfm *tfm, - const u8 *key, unsigned int keylen) -{ - return tfm->crt_hash.setkey(crypto_hash_cast(tfm), key, keylen); -} - static inline struct crypto_hash *crypto_alloc_hash(const char *alg_name, u32 type, u32 mask) { diff --git a/include/linux/dccp.h b/include/linux/dccp.h index 53553c99cad..1cb054bd93f 100644 --- a/include/linux/dccp.h +++ b/include/linux/dccp.h @@ -30,7 +30,7 @@ struct dccp_hdr { #else #error "Adjust your <asm/byteorder.h> defines" #endif - __u16 dccph_checksum; + __sum16 dccph_checksum; #if defined(__LITTLE_ENDIAN_BITFIELD) __u8 dccph_x:1, dccph_type:4, @@ -175,14 +175,18 @@ enum { DCCPC_CCID3 = 3, }; -/* DCCP features */ +/* DCCP features (RFC 4340 section 6.4) */ enum { DCCPF_RESERVED = 0, DCCPF_CCID = 1, + DCCPF_SHORT_SEQNOS = 2, /* XXX: not yet implemented */ DCCPF_SEQUENCE_WINDOW = 3, + DCCPF_ECN_INCAPABLE = 4, /* XXX: not yet implemented */ DCCPF_ACK_RATIO = 5, DCCPF_SEND_ACK_VECTOR = 6, DCCPF_SEND_NDP_COUNT = 7, + DCCPF_MIN_CSUM_COVER = 8, + DCCPF_DATA_CHECKSUM = 9, /* XXX: not yet implemented */ /* 10-127 reserved */ DCCPF_MIN_CCID_SPECIFIC = 128, DCCPF_MAX_CCID_SPECIFIC = 255, @@ -196,13 +200,16 @@ struct dccp_so_feat { }; /* DCCP socket options */ -#define DCCP_SOCKOPT_PACKET_SIZE 1 +#define DCCP_SOCKOPT_PACKET_SIZE 1 /* XXX deprecated, without effect */ #define DCCP_SOCKOPT_SERVICE 2 #define DCCP_SOCKOPT_CHANGE_L 3 #define DCCP_SOCKOPT_CHANGE_R 4 +#define DCCP_SOCKOPT_SEND_CSCOV 10 +#define DCCP_SOCKOPT_RECV_CSCOV 11 #define DCCP_SOCKOPT_CCID_RX_INFO 128 #define DCCP_SOCKOPT_CCID_TX_INFO 192 +/* maximum number of services provided on the same listening port */ #define DCCP_SERVICE_LIST_MAX_LEN 32 #ifdef __KERNEL__ @@ -256,6 +263,13 @@ static inline struct dccp_hdr *dccp_hdr(const struct sk_buff *skb) return (struct dccp_hdr *)skb->h.raw; } +static inline struct dccp_hdr *dccp_zeroed_hdr(struct sk_buff *skb, int headlen) +{ + skb->h.raw = skb_push(skb, headlen); + memset(skb->h.raw, 0, headlen); + return dccp_hdr(skb); +} + static inline struct dccp_hdr_ext *dccp_hdrx(const struct sk_buff *skb) { return (struct dccp_hdr_ext *)(skb->h.raw + sizeof(struct dccp_hdr)); @@ -342,6 +356,9 @@ static inline unsigned int dccp_hdr_len(const struct sk_buff *skb) * @dccpms_ccid - Congestion Control Id (CCID) (section 10) * @dccpms_send_ack_vector - Send Ack Vector Feature (section 11.5) * @dccpms_send_ndp_count - Send NDP Count Feature (7.7.2) + * @dccpms_ack_ratio - Ack Ratio Feature (section 11.3) + * @dccpms_pending - List of features being negotiated + * @dccpms_conf - */ struct dccp_minisock { __u64 dccpms_sequence_window; @@ -410,7 +427,7 @@ struct dccp_service_list { }; #define DCCP_SERVICE_INVALID_VALUE htonl((__u32)-1) -#define DCCP_SERVICE_CODE_IS_ABSENT 0 +#define DCCP_SERVICE_CODE_IS_ABSENT 0 static inline int dccp_list_has_service(const struct dccp_service_list *sl, const __be32 service) @@ -419,7 +436,7 @@ static inline int dccp_list_has_service(const struct dccp_service_list *sl, u32 i = sl->dccpsl_nr; while (i--) if (sl->dccpsl_list[i] == service) - return 1; + return 1; } return 0; } @@ -439,12 +456,25 @@ struct dccp_ackvec; * @dccps_gss - greatest sequence number sent * @dccps_gsr - greatest valid sequence number received * @dccps_gar - greatest valid ack number received on a non-Sync; initialized to %dccps_iss + * @dccps_service - first (passive sock) or unique (active sock) service code + * @dccps_service_list - second .. last service code on passive socket * @dccps_timestamp_time - time of latest TIMESTAMP option * @dccps_timestamp_echo - latest timestamp received on a TIMESTAMP option - * @dccps_packet_size - Set thru setsockopt - * @dccps_role - Role of this sock, one of %dccp_role + * @dccps_l_ack_ratio - + * @dccps_r_ack_ratio - + * @dccps_pcslen - sender partial checksum coverage (via sockopt) + * @dccps_pcrlen - receiver partial checksum coverage (via sockopt) * @dccps_ndp_count - number of Non Data Packets since last data packet + * @dccps_mss_cache - + * @dccps_minisock - * @dccps_hc_rx_ackvec - rx half connection ack vector + * @dccps_hc_rx_ccid - + * @dccps_hc_tx_ccid - + * @dccps_options_received - + * @dccps_epoch - + * @dccps_role - Role of this sock, one of %dccp_role + * @dccps_hc_rx_insert_options - + * @dccps_hc_tx_insert_options - * @dccps_xmit_timer - timer for when CCID is not ready to send */ struct dccp_sock { @@ -464,9 +494,10 @@ struct dccp_sock { struct dccp_service_list *dccps_service_list; struct timeval dccps_timestamp_time; __u32 dccps_timestamp_echo; - __u32 dccps_packet_size; __u16 dccps_l_ack_ratio; __u16 dccps_r_ack_ratio; + __u16 dccps_pcslen; + __u16 dccps_pcrlen; unsigned long dccps_ndp_count; __u32 dccps_mss_cache; struct dccp_minisock dccps_minisock; @@ -480,7 +511,7 @@ struct dccp_sock { __u8 dccps_hc_tx_insert_options:1; struct timer_list dccps_xmit_timer; }; - + static inline struct dccp_sock *dccp_sk(const struct sock *sk) { return (struct dccp_sock *)sk; diff --git a/include/linux/debug_locks.h b/include/linux/debug_locks.h index 952bee79a8f..1678a5de701 100644 --- a/include/linux/debug_locks.h +++ b/include/linux/debug_locks.h @@ -24,7 +24,7 @@ extern int debug_locks_off(void); int __ret = 0; \ \ if (unlikely(c)) { \ - if (debug_locks_off()) \ + if (debug_locks_off() && !debug_locks_silent) \ WARN_ON(1); \ __ret = 1; \ } \ diff --git a/include/linux/delayacct.h b/include/linux/delayacct.h index 561e2a77805..55d1ca5e60f 100644 --- a/include/linux/delayacct.h +++ b/include/linux/delayacct.h @@ -30,7 +30,7 @@ #ifdef CONFIG_TASK_DELAY_ACCT extern int delayacct_on; /* Delay accounting turned on/off */ -extern kmem_cache_t *delayacct_cache; +extern struct kmem_cache *delayacct_cache; extern void delayacct_init(void); extern void __delayacct_tsk_init(struct task_struct *); extern void __delayacct_tsk_exit(struct task_struct *); diff --git a/include/linux/device-mapper.h b/include/linux/device-mapper.h index 03ef41c1eaa..499f5373e21 100644 --- a/include/linux/device-mapper.h +++ b/include/linux/device-mapper.h @@ -39,7 +39,8 @@ typedef void (*dm_dtr_fn) (struct dm_target *ti); * The map function must return: * < 0: error * = 0: The target will handle the io by resubmitting it later - * > 0: simple remap complete + * = 1: simple remap complete + * = 2: The target wants to push back the io */ typedef int (*dm_map_fn) (struct dm_target *ti, struct bio *bio, union map_info *map_context); @@ -50,6 +51,7 @@ typedef int (*dm_map_fn) (struct dm_target *ti, struct bio *bio, * 0 : ended successfully * 1 : for some reason the io has still not completed (eg, * multipath target might want to requeue a failed io). + * 2 : The target wants to push back the io */ typedef int (*dm_endio_fn) (struct dm_target *ti, struct bio *bio, int error, @@ -173,7 +175,7 @@ void *dm_get_mdptr(struct mapped_device *md); /* * A device can still be used while suspended, but I/O is deferred. */ -int dm_suspend(struct mapped_device *md, int with_lockfs); +int dm_suspend(struct mapped_device *md, unsigned suspend_flags); int dm_resume(struct mapped_device *md); /* @@ -188,6 +190,7 @@ int dm_wait_event(struct mapped_device *md, int event_nr); const char *dm_device_name(struct mapped_device *md); struct gendisk *dm_disk(struct mapped_device *md); int dm_suspended(struct mapped_device *md); +int dm_noflush_suspending(struct dm_target *ti); /* * Geometry functions. diff --git a/include/linux/device.h b/include/linux/device.h index 9d4f6a96393..f44247fe813 100644 --- a/include/linux/device.h +++ b/include/linux/device.h @@ -21,6 +21,7 @@ #include <linux/pm.h> #include <asm/semaphore.h> #include <asm/atomic.h> +#include <asm/device.h> #define DEVICE_NAME_SIZE 50 #define DEVICE_NAME_HALF __stringify(20) /* Less than half to accommodate slop */ @@ -42,6 +43,8 @@ struct bus_type { struct klist klist_devices; struct klist klist_drivers; + struct blocking_notifier_head bus_notifier; + struct bus_attribute * bus_attrs; struct device_attribute * dev_attrs; struct driver_attribute * drv_attrs; @@ -75,6 +78,29 @@ int __must_check bus_for_each_drv(struct bus_type *bus, struct device_driver *start, void *data, int (*fn)(struct device_driver *, void *)); +/* + * Bus notifiers: Get notified of addition/removal of devices + * and binding/unbinding of drivers to devices. + * In the long run, it should be a replacement for the platform + * notify hooks. + */ +struct notifier_block; + +extern int bus_register_notifier(struct bus_type *bus, + struct notifier_block *nb); +extern int bus_unregister_notifier(struct bus_type *bus, + struct notifier_block *nb); + +/* All 4 notifers below get called with the target struct device * + * as an argument. Note that those functions are likely to be called + * with the device semaphore held in the core, so be careful. + */ +#define BUS_NOTIFY_ADD_DEVICE 0x00000001 /* device added */ +#define BUS_NOTIFY_DEL_DEVICE 0x00000002 /* device removed */ +#define BUS_NOTIFY_BOUND_DRIVER 0x00000003 /* driver bound to device */ +#define BUS_NOTIFY_UNBIND_DRIVER 0x00000004 /* driver about to be + unbound */ + /* driverfs interface for exporting bus attributes */ struct bus_attribute { @@ -343,10 +369,11 @@ struct device { void *driver_data; /* data private to the driver */ void *platform_data; /* Platform specific data, device core doesn't touch it */ - void *firmware_data; /* Firmware specific data (e.g. ACPI, - BIOS data),reserved for device core*/ struct dev_pm_info power; +#ifdef CONFIG_NUMA + int numa_node; /* NUMA node this device is close to */ +#endif u64 *dma_mask; /* dma mask (if dma'able device) */ u64 coherent_dma_mask;/* Like dma_mask, but for alloc_coherent mappings as @@ -358,6 +385,8 @@ struct device { struct dma_coherent_mem *dma_mem; /* internal for coherent mem override */ + /* arch specific additions */ + struct dev_archdata archdata; /* class_device migration path */ struct list_head node; @@ -368,6 +397,25 @@ struct device { void (*release)(struct device * dev); }; +#ifdef CONFIG_NUMA +static inline int dev_to_node(struct device *dev) +{ + return dev->numa_node; +} +static inline void set_dev_node(struct device *dev, int node) +{ + dev->numa_node = node; +} +#else +static inline int dev_to_node(struct device *dev) +{ + return -1; +} +static inline void set_dev_node(struct device *dev, int node) +{ +} +#endif + static inline void * dev_get_drvdata (struct device *dev) { @@ -385,6 +433,8 @@ static inline int device_is_registered(struct device *dev) return dev->is_registered; } +void driver_init(void); + /* * High level routines for use by the bus drivers */ @@ -395,7 +445,10 @@ extern int __must_check device_add(struct device * dev); extern void device_del(struct device * dev); extern int device_for_each_child(struct device *, void *, int (*fn)(struct device *, void *)); +extern struct device *device_find_child(struct device *, void *data, + int (*match)(struct device *, void *)); extern int device_rename(struct device *dev, char *new_name); +extern int device_move(struct device *dev, struct device *new_parent); /* * Manual binding of a device to driver. See drivers/base/bus.c @@ -415,8 +468,6 @@ extern struct device *device_create(struct class *cls, struct device *parent, __attribute__((format(printf,4,5))); extern void device_destroy(struct class *cls, dev_t devt); -extern int virtual_device_parent(struct device *dev); - /* * Platform "fixup" functions - allow the platform to have their say * about devices and actions that the general device layer doesn't diff --git a/include/linux/divert.h b/include/linux/divert.h deleted file mode 100644 index 8fb4e9de684..00000000000 --- a/include/linux/divert.h +++ /dev/null @@ -1,132 +0,0 @@ -/* - * Frame Diversion, Benoit Locher <Benoit.Locher@skf.com> - * - * Changes: - * 06/09/2000 BL: initial version - * - */ - -#ifndef _LINUX_DIVERT_H -#define _LINUX_DIVERT_H - -#include <asm/types.h> - -#define MAX_DIVERT_PORTS 8 /* Max number of ports to divert (tcp, udp) */ - -/* Divertable protocols */ -#define DIVERT_PROTO_NONE 0x0000 -#define DIVERT_PROTO_IP 0x0001 -#define DIVERT_PROTO_ICMP 0x0002 -#define DIVERT_PROTO_TCP 0x0004 -#define DIVERT_PROTO_UDP 0x0008 - -/* - * This is an Ethernet Frame Diverter option block - */ -struct divert_blk -{ - int divert; /* are we active */ - unsigned int protos; /* protocols */ - __u16 tcp_dst[MAX_DIVERT_PORTS]; /* specific tcp dst ports to divert */ - __u16 tcp_src[MAX_DIVERT_PORTS]; /* specific tcp src ports to divert */ - __u16 udp_dst[MAX_DIVERT_PORTS]; /* specific udp dst ports to divert */ - __u16 udp_src[MAX_DIVERT_PORTS]; /* specific udp src ports to divert */ -}; - -/* - * Diversion control block, for configuration with the userspace tool - * divert - */ - -typedef union _divert_cf_arg -{ - __s16 int16; - __u16 uint16; - __s32 int32; - __u32 uint32; - __s64 int64; - __u64 uint64; - void __user *ptr; -} divert_cf_arg; - - -struct divert_cf -{ - int cmd; /* Command */ - divert_cf_arg arg1, - arg2, - arg3; - int dev_index; /* device index (eth0=0, etc...) */ -}; - - -/* Diversion commands */ -#define DIVCMD_DIVERT 1 /* ENABLE/DISABLE diversion */ -#define DIVCMD_IP 2 /* ENABLE/DISABLE whold IP diversion */ -#define DIVCMD_TCP 3 /* ENABLE/DISABLE whold TCP diversion */ -#define DIVCMD_TCPDST 4 /* ADD/REMOVE TCP DST port for diversion */ -#define DIVCMD_TCPSRC 5 /* ADD/REMOVE TCP SRC port for diversion */ -#define DIVCMD_UDP 6 /* ENABLE/DISABLE whole UDP diversion */ -#define DIVCMD_UDPDST 7 /* ADD/REMOVE UDP DST port for diversion */ -#define DIVCMD_UDPSRC 8 /* ADD/REMOVE UDP SRC port for diversion */ -#define DIVCMD_ICMP 9 /* ENABLE/DISABLE whole ICMP diversion */ -#define DIVCMD_GETSTATUS 10 /* GET the status of the diverter */ -#define DIVCMD_RESET 11 /* Reset the diverter on the specified dev */ -#define DIVCMD_GETVERSION 12 /* Retrieve the diverter code version (char[32]) */ - -/* General syntax of the commands: - * - * DIVCMD_xxxxxx(arg1, arg2, arg3, dev_index) - * - * SIOCSIFDIVERT: - * DIVCMD_DIVERT(DIVARG1_ENABLE|DIVARG1_DISABLE, , ,ifindex) - * DIVCMD_IP(DIVARG1_ENABLE|DIVARG1_DISABLE, , , ifindex) - * DIVCMD_TCP(DIVARG1_ENABLE|DIVARG1_DISABLE, , , ifindex) - * DIVCMD_TCPDST(DIVARG1_ADD|DIVARG1_REMOVE, port, , ifindex) - * DIVCMD_TCPSRC(DIVARG1_ADD|DIVARG1_REMOVE, port, , ifindex) - * DIVCMD_UDP(DIVARG1_ENABLE|DIVARG1_DISABLE, , , ifindex) - * DIVCMD_UDPDST(DIVARG1_ADD|DIVARG1_REMOVE, port, , ifindex) - * DIVCMD_UDPSRC(DIVARG1_ADD|DIVARG1_REMOVE, port, , ifindex) - * DIVCMD_ICMP(DIVARG1_ENABLE|DIVARG1_DISABLE, , , ifindex) - * DIVCMD_RESET(, , , ifindex) - * - * SIOGIFDIVERT: - * DIVCMD_GETSTATUS(divert_blk, , , ifindex) - * DIVCMD_GETVERSION(string[3]) - */ - - -/* Possible values for arg1 */ -#define DIVARG1_ENABLE 0 /* ENABLE something */ -#define DIVARG1_DISABLE 1 /* DISABLE something */ -#define DIVARG1_ADD 2 /* ADD something */ -#define DIVARG1_REMOVE 3 /* REMOVE something */ - - -#ifdef __KERNEL__ - -/* diverter functions */ -#include <linux/skbuff.h> - -#ifdef CONFIG_NET_DIVERT -#include <linux/netdevice.h> - -int alloc_divert_blk(struct net_device *); -void free_divert_blk(struct net_device *); -int divert_ioctl(unsigned int cmd, struct divert_cf __user *arg); -void divert_frame(struct sk_buff *skb); -static inline void handle_diverter(struct sk_buff *skb) -{ - /* if diversion is supported on device, then divert */ - if (skb->dev->divert && skb->dev->divert->divert) - divert_frame(skb); -} - -#else -# define alloc_divert_blk(dev) (0) -# define free_divert_blk(dev) do {} while (0) -# define divert_ioctl(cmd, arg) (-ENOPKG) -# define handle_diverter(skb) do {} while (0) -#endif -#endif -#endif /* _LINUX_DIVERT_H */ diff --git a/include/linux/dm-ioctl.h b/include/linux/dm-ioctl.h index 8853fc4d1c5..b9348610782 100644 --- a/include/linux/dm-ioctl.h +++ b/include/linux/dm-ioctl.h @@ -285,9 +285,9 @@ typedef char ioctl_struct[308]; #define DM_DEV_SET_GEOMETRY _IOWR(DM_IOCTL, DM_DEV_SET_GEOMETRY_CMD, struct dm_ioctl) #define DM_VERSION_MAJOR 4 -#define DM_VERSION_MINOR 10 +#define DM_VERSION_MINOR 11 #define DM_VERSION_PATCHLEVEL 0 -#define DM_VERSION_EXTRA "-ioctl (2006-09-14)" +#define DM_VERSION_EXTRA "-ioctl (2006-10-12)" /* Status bits */ #define DM_READONLY_FLAG (1 << 0) /* In/Out */ @@ -323,4 +323,9 @@ typedef char ioctl_struct[308]; */ #define DM_SKIP_LOCKFS_FLAG (1 << 10) /* In */ +/* + * Set this to suspend without flushing queued ios. + */ +#define DM_NOFLUSH_FLAG (1 << 11) /* In */ + #endif /* _LINUX_DM_IOCTL_H */ diff --git a/include/linux/efi.h b/include/linux/efi.h index 66d621dbcb6..df1c91855f0 100644 --- a/include/linux/efi.h +++ b/include/linux/efi.h @@ -300,8 +300,9 @@ extern int efi_mem_attribute_range (unsigned long phys_addr, unsigned long size, extern int __init efi_uart_console_only (void); extern void efi_initialize_iomem_resources(struct resource *code_resource, struct resource *data_resource); -extern unsigned long __init efi_get_time(void); +extern unsigned long efi_get_time(void); extern int __init efi_set_rtc_mmss(unsigned long nowtime); +extern int is_available_memory(efi_memory_desc_t * md); extern struct efi_memory_map memmap; /** diff --git a/include/linux/elevator.h b/include/linux/elevator.h index 2fa9f114422..e88fcbc77f8 100644 --- a/include/linux/elevator.h +++ b/include/linux/elevator.h @@ -12,6 +12,8 @@ typedef void (elevator_merge_req_fn) (request_queue_t *, struct request *, struc typedef void (elevator_merged_fn) (request_queue_t *, struct request *, int); +typedef int (elevator_allow_merge_fn) (request_queue_t *, struct request *, struct bio *); + typedef int (elevator_dispatch_fn) (request_queue_t *, int); typedef void (elevator_add_req_fn) (request_queue_t *, struct request *); @@ -21,11 +23,11 @@ typedef void (elevator_completed_req_fn) (request_queue_t *, struct request *); typedef int (elevator_may_queue_fn) (request_queue_t *, int); typedef int (elevator_set_req_fn) (request_queue_t *, struct request *, gfp_t); -typedef void (elevator_put_req_fn) (request_queue_t *, struct request *); +typedef void (elevator_put_req_fn) (struct request *); typedef void (elevator_activate_req_fn) (request_queue_t *, struct request *); typedef void (elevator_deactivate_req_fn) (request_queue_t *, struct request *); -typedef void *(elevator_init_fn) (request_queue_t *, elevator_t *); +typedef void *(elevator_init_fn) (request_queue_t *); typedef void (elevator_exit_fn) (elevator_t *); struct elevator_ops @@ -33,6 +35,7 @@ struct elevator_ops elevator_merge_fn *elevator_merge_fn; elevator_merged_fn *elevator_merged_fn; elevator_merge_req_fn *elevator_merge_req_fn; + elevator_allow_merge_fn *elevator_allow_merge_fn; elevator_dispatch_fn *elevator_dispatch_fn; elevator_add_req_fn *elevator_add_req_fn; diff --git a/include/linux/elf.h b/include/linux/elf.h index b70d1d2c8d2..60713e6ea29 100644 --- a/include/linux/elf.h +++ b/include/linux/elf.h @@ -6,6 +6,8 @@ #include <linux/elf-em.h> #include <asm/elf.h> +struct file; + #ifndef elf_read_implies_exec /* Executables for which elf_read_implies_exec() returns TRUE will have the READ_IMPLIES_EXEC personality flag set automatically. @@ -358,6 +360,7 @@ extern Elf32_Dyn _DYNAMIC []; #define elfhdr elf32_hdr #define elf_phdr elf32_phdr #define elf_note elf32_note +#define elf_addr_t Elf32_Off #else @@ -365,8 +368,16 @@ extern Elf64_Dyn _DYNAMIC []; #define elfhdr elf64_hdr #define elf_phdr elf64_phdr #define elf_note elf64_note +#define elf_addr_t Elf64_Off #endif +#ifndef ARCH_HAVE_EXTRA_ELF_NOTES +static inline int arch_notes_size(void) { return 0; } +static inline void arch_write_notes(struct file *file) { } + +#define ELF_CORE_EXTRA_NOTES_SIZE arch_notes_size() +#define ELF_CORE_WRITE_EXTRA_NOTES arch_write_notes(file) +#endif /* ARCH_HAVE_EXTRA_ELF_NOTES */ #endif /* _LINUX_ELF_H */ diff --git a/include/linux/ext3_jbd.h b/include/linux/ext3_jbd.h index ce0e6109aff..8c43b13a02f 100644 --- a/include/linux/ext3_jbd.h +++ b/include/linux/ext3_jbd.h @@ -109,74 +109,32 @@ int ext3_mark_inode_dirty(handle_t *handle, struct inode *inode); * been done yet. */ -void ext3_journal_abort_handle(const char *caller, const char *err_fn, - struct buffer_head *bh, handle_t *handle, int err); - -static inline int -__ext3_journal_get_undo_access(const char *where, handle_t *handle, - struct buffer_head *bh) +static inline void ext3_journal_release_buffer(handle_t *handle, + struct buffer_head *bh) { - int err = journal_get_undo_access(handle, bh); - if (err) - ext3_journal_abort_handle(where, __FUNCTION__, bh, handle,err); - return err; + journal_release_buffer(handle, bh); } -static inline int -__ext3_journal_get_write_access(const char *where, handle_t *handle, - struct buffer_head *bh) -{ - int err = journal_get_write_access(handle, bh); - if (err) - ext3_journal_abort_handle(where, __FUNCTION__, bh, handle,err); - return err; -} +void ext3_journal_abort_handle(const char *caller, const char *err_fn, + struct buffer_head *bh, handle_t *handle, int err); -static inline void -ext3_journal_release_buffer(handle_t *handle, struct buffer_head *bh) -{ - journal_release_buffer(handle, bh); -} +int __ext3_journal_get_undo_access(const char *where, handle_t *handle, + struct buffer_head *bh); -static inline int -__ext3_journal_forget(const char *where, handle_t *handle, struct buffer_head *bh) -{ - int err = journal_forget(handle, bh); - if (err) - ext3_journal_abort_handle(where, __FUNCTION__, bh, handle,err); - return err; -} +int __ext3_journal_get_write_access(const char *where, handle_t *handle, + struct buffer_head *bh); -static inline int -__ext3_journal_revoke(const char *where, handle_t *handle, - unsigned long blocknr, struct buffer_head *bh) -{ - int err = journal_revoke(handle, blocknr, bh); - if (err) - ext3_journal_abort_handle(where, __FUNCTION__, bh, handle,err); - return err; -} +int __ext3_journal_forget(const char *where, handle_t *handle, + struct buffer_head *bh); -static inline int -__ext3_journal_get_create_access(const char *where, - handle_t *handle, struct buffer_head *bh) -{ - int err = journal_get_create_access(handle, bh); - if (err) - ext3_journal_abort_handle(where, __FUNCTION__, bh, handle,err); - return err; -} +int __ext3_journal_revoke(const char *where, handle_t *handle, + unsigned long blocknr, struct buffer_head *bh); -static inline int -__ext3_journal_dirty_metadata(const char *where, - handle_t *handle, struct buffer_head *bh) -{ - int err = journal_dirty_metadata(handle, bh); - if (err) - ext3_journal_abort_handle(where, __FUNCTION__, bh, handle,err); - return err; -} +int __ext3_journal_get_create_access(const char *where, + handle_t *handle, struct buffer_head *bh); +int __ext3_journal_dirty_metadata(const char *where, + handle_t *handle, struct buffer_head *bh); #define ext3_journal_get_undo_access(handle, bh) \ __ext3_journal_get_undo_access(__FUNCTION__, (handle), (bh)) diff --git a/include/linux/ext4_jbd2.h b/include/linux/ext4_jbd2.h index 72dd631912e..d716e6392cf 100644 --- a/include/linux/ext4_jbd2.h +++ b/include/linux/ext4_jbd2.h @@ -114,74 +114,32 @@ int ext4_mark_inode_dirty(handle_t *handle, struct inode *inode); * been done yet. */ -void ext4_journal_abort_handle(const char *caller, const char *err_fn, - struct buffer_head *bh, handle_t *handle, int err); - -static inline int -__ext4_journal_get_undo_access(const char *where, handle_t *handle, - struct buffer_head *bh) +static inline void ext4_journal_release_buffer(handle_t *handle, + struct buffer_head *bh) { - int err = jbd2_journal_get_undo_access(handle, bh); - if (err) - ext4_journal_abort_handle(where, __FUNCTION__, bh, handle,err); - return err; + jbd2_journal_release_buffer(handle, bh); } -static inline int -__ext4_journal_get_write_access(const char *where, handle_t *handle, - struct buffer_head *bh) -{ - int err = jbd2_journal_get_write_access(handle, bh); - if (err) - ext4_journal_abort_handle(where, __FUNCTION__, bh, handle,err); - return err; -} +void ext4_journal_abort_handle(const char *caller, const char *err_fn, + struct buffer_head *bh, handle_t *handle, int err); -static inline void -ext4_journal_release_buffer(handle_t *handle, struct buffer_head *bh) -{ - jbd2_journal_release_buffer(handle, bh); -} +int __ext4_journal_get_undo_access(const char *where, handle_t *handle, + struct buffer_head *bh); -static inline int -__ext4_journal_forget(const char *where, handle_t *handle, struct buffer_head *bh) -{ - int err = jbd2_journal_forget(handle, bh); - if (err) - ext4_journal_abort_handle(where, __FUNCTION__, bh, handle,err); - return err; -} +int __ext4_journal_get_write_access(const char *where, handle_t *handle, + struct buffer_head *bh); -static inline int -__ext4_journal_revoke(const char *where, handle_t *handle, - ext4_fsblk_t blocknr, struct buffer_head *bh) -{ - int err = jbd2_journal_revoke(handle, blocknr, bh); - if (err) - ext4_journal_abort_handle(where, __FUNCTION__, bh, handle,err); - return err; -} +int __ext4_journal_forget(const char *where, handle_t *handle, + struct buffer_head *bh); -static inline int -__ext4_journal_get_create_access(const char *where, - handle_t *handle, struct buffer_head *bh) -{ - int err = jbd2_journal_get_create_access(handle, bh); - if (err) - ext4_journal_abort_handle(where, __FUNCTION__, bh, handle,err); - return err; -} +int __ext4_journal_revoke(const char *where, handle_t *handle, + ext4_fsblk_t blocknr, struct buffer_head *bh); -static inline int -__ext4_journal_dirty_metadata(const char *where, - handle_t *handle, struct buffer_head *bh) -{ - int err = jbd2_journal_dirty_metadata(handle, bh); - if (err) - ext4_journal_abort_handle(where, __FUNCTION__, bh, handle,err); - return err; -} +int __ext4_journal_get_create_access(const char *where, + handle_t *handle, struct buffer_head *bh); +int __ext4_journal_dirty_metadata(const char *where, + handle_t *handle, struct buffer_head *bh); #define ext4_journal_get_undo_access(handle, bh) \ __ext4_journal_get_undo_access(__FUNCTION__, (handle), (bh)) diff --git a/include/linux/fault-inject.h b/include/linux/fault-inject.h new file mode 100644 index 00000000000..32368c4f032 --- /dev/null +++ b/include/linux/fault-inject.h @@ -0,0 +1,84 @@ +#ifndef _LINUX_FAULT_INJECT_H +#define _LINUX_FAULT_INJECT_H + +#ifdef CONFIG_FAULT_INJECTION + +#include <linux/types.h> +#include <linux/debugfs.h> +#include <asm/atomic.h> + +/* + * For explanation of the elements of this struct, see + * Documentation/fault-injection/fault-injection.txt + */ +struct fault_attr { + unsigned long probability; + unsigned long interval; + atomic_t times; + atomic_t space; + unsigned long verbose; + u32 task_filter; + unsigned long stacktrace_depth; + unsigned long require_start; + unsigned long require_end; + unsigned long reject_start; + unsigned long reject_end; + + unsigned long count; + +#ifdef CONFIG_FAULT_INJECTION_DEBUG_FS + + struct { + struct dentry *dir; + + struct dentry *probability_file; + struct dentry *interval_file; + struct dentry *times_file; + struct dentry *space_file; + struct dentry *verbose_file; + struct dentry *task_filter_file; + struct dentry *stacktrace_depth_file; + struct dentry *require_start_file; + struct dentry *require_end_file; + struct dentry *reject_start_file; + struct dentry *reject_end_file; + } dentries; + +#endif +}; + +#define FAULT_ATTR_INITIALIZER { \ + .interval = 1, \ + .times = ATOMIC_INIT(1), \ + .require_end = ULONG_MAX, \ + .stacktrace_depth = 32, \ + .verbose = 2, \ + } + +#define DECLARE_FAULT_ATTR(name) struct fault_attr name = FAULT_ATTR_INITIALIZER +int setup_fault_attr(struct fault_attr *attr, char *str); +void should_fail_srandom(unsigned long entropy); +bool should_fail(struct fault_attr *attr, ssize_t size); + +#ifdef CONFIG_FAULT_INJECTION_DEBUG_FS + +int init_fault_attr_dentries(struct fault_attr *attr, const char *name); +void cleanup_fault_attr_dentries(struct fault_attr *attr); + +#else /* CONFIG_FAULT_INJECTION_DEBUG_FS */ + +static inline int init_fault_attr_dentries(struct fault_attr *attr, + const char *name) +{ + return -ENODEV; +} + +static inline void cleanup_fault_attr_dentries(struct fault_attr *attr) +{ +} + +#endif /* CONFIG_FAULT_INJECTION_DEBUG_FS */ + +#endif /* CONFIG_FAULT_INJECTION */ + +#endif /* _LINUX_FAULT_INJECT_H */ diff --git a/include/linux/fb.h b/include/linux/fb.h index 3e69241e6a8..64177ec9a01 100644 --- a/include/linux/fb.h +++ b/include/linux/fb.h @@ -774,8 +774,8 @@ struct fb_info { #endif struct fb_ops *fbops; - struct device *device; - struct class_device *class_device; /* sysfs per device attrs */ + struct device *device; /* This is the parent */ + struct device *dev; /* This is this fb device */ int class_flag; /* private sysfs flags */ #ifdef CONFIG_FB_TILEBLITTING struct fb_tile_ops *tileops; /* Tile Blitting */ @@ -910,8 +910,8 @@ static inline void __fb_pad_aligned_buffer(u8 *dst, u32 d_pitch, /* drivers/video/fbsysfs.c */ extern struct fb_info *framebuffer_alloc(size_t size, struct device *dev); extern void framebuffer_release(struct fb_info *info); -extern int fb_init_class_device(struct fb_info *fb_info); -extern void fb_cleanup_class_device(struct fb_info *head); +extern int fb_init_device(struct fb_info *fb_info); +extern void fb_cleanup_device(struct fb_info *head); extern void fb_bl_default_curve(struct fb_info *fb_info, u8 off, u8 min, u8 max); /* drivers/video/fbmon.c */ @@ -929,8 +929,6 @@ extern void fb_bl_default_curve(struct fb_info *fb_info, u8 off, u8 min, u8 max) #define FB_MODE_IS_FIRST 16 #define FB_MODE_IS_FROM_VAR 32 -extern int fbmon_valid_timings(u_int pixclock, u_int htotal, u_int vtotal, - const struct fb_info *fb_info); extern int fbmon_dpms(const struct fb_info *fb_info); extern int fb_get_mode(int flags, u32 val, struct fb_var_screeninfo *var, struct fb_info *info); @@ -970,11 +968,11 @@ extern struct fb_videomode *fb_find_best_display(struct fb_monspecs *specs, /* drivers/video/fbcmap.c */ extern int fb_alloc_cmap(struct fb_cmap *cmap, int len, int transp); extern void fb_dealloc_cmap(struct fb_cmap *cmap); -extern int fb_copy_cmap(struct fb_cmap *from, struct fb_cmap *to); -extern int fb_cmap_to_user(struct fb_cmap *from, struct fb_cmap_user *to); +extern int fb_copy_cmap(const struct fb_cmap *from, struct fb_cmap *to); +extern int fb_cmap_to_user(const struct fb_cmap *from, struct fb_cmap_user *to); extern int fb_set_cmap(struct fb_cmap *cmap, struct fb_info *fb_info); extern int fb_set_user_cmap(struct fb_cmap_user *cmap, struct fb_info *fb_info); -extern struct fb_cmap *fb_default_cmap(int len); +extern const struct fb_cmap *fb_default_cmap(int len); extern void fb_invert_cmaps(void); struct fb_videomode { diff --git a/include/linux/fib_rules.h b/include/linux/fib_rules.h index 4418c8d9d47..8270aac2aa5 100644 --- a/include/linux/fib_rules.h +++ b/include/linux/fib_rules.h @@ -6,6 +6,7 @@ /* rule is permanent, and cannot be deleted */ #define FIB_RULE_PERMANENT 1 +#define FIB_RULE_INVERT 2 struct fib_rule_hdr { @@ -34,7 +35,7 @@ enum FRA_UNUSED3, FRA_UNUSED4, FRA_UNUSED5, - FRA_FWMARK, /* netfilter mark */ + FRA_FWMARK, /* mark */ FRA_FLOW, /* flow/class id */ FRA_UNUSED6, FRA_UNUSED7, diff --git a/include/linux/file.h b/include/linux/file.h index 74183e6f7f4..a59001e9ea5 100644 --- a/include/linux/file.h +++ b/include/linux/file.h @@ -26,19 +26,12 @@ struct embedded_fd_set { unsigned long fds_bits[1]; }; -/* - * More than this number of fds: we use a separately allocated fd_set - */ -#define EMBEDDED_FD_SET_SIZE (BITS_PER_BYTE * sizeof(struct embedded_fd_set)) - struct fdtable { unsigned int max_fds; - int max_fdset; struct file ** fd; /* current fd array */ fd_set *close_on_exec; fd_set *open_fds; struct rcu_head rcu; - struct files_struct *free_files; struct fdtable *next; }; @@ -64,6 +57,8 @@ struct files_struct { #define files_fdtable(files) (rcu_dereference((files)->fdt)) +extern struct kmem_cache *filp_cachep; + extern void FASTCALL(__fput(struct file *)); extern void FASTCALL(fput(struct file *)); @@ -81,16 +76,15 @@ extern int get_unused_fd(void); extern void FASTCALL(put_unused_fd(unsigned int fd)); struct kmem_cache; -extern struct file ** alloc_fd_array(int); -extern void free_fd_array(struct file **, int); - -extern fd_set *alloc_fdset(int); -extern void free_fdset(fd_set *, int); - extern int expand_files(struct files_struct *, int nr); -extern void free_fdtable(struct fdtable *fdt); +extern void free_fdtable_rcu(struct rcu_head *rcu); extern void __init files_defer_init(void); +static inline void free_fdtable(struct fdtable *fdt) +{ + call_rcu(&fdt->rcu, free_fdtable_rcu); +} + static inline struct file * fcheck_files(struct files_struct *files, unsigned int fd) { struct file * file = NULL; @@ -114,4 +108,6 @@ struct files_struct *get_files_struct(struct task_struct *); void FASTCALL(put_files_struct(struct files_struct *fs)); void reset_files_struct(struct task_struct *, struct files_struct *); +extern struct kmem_cache *files_cachep; + #endif /* __LINUX_FILE_H */ diff --git a/include/linux/freezer.h b/include/linux/freezer.h new file mode 100644 index 00000000000..5e75e26d478 --- /dev/null +++ b/include/linux/freezer.h @@ -0,0 +1,90 @@ +/* Freezer declarations */ + +#include <linux/sched.h> + +#ifdef CONFIG_PM +/* + * Check if a process has been frozen + */ +static inline int frozen(struct task_struct *p) +{ + return p->flags & PF_FROZEN; +} + +/* + * Check if there is a request to freeze a process + */ +static inline int freezing(struct task_struct *p) +{ + return test_tsk_thread_flag(p, TIF_FREEZE); +} + +/* + * Request that a process be frozen + */ +static inline void freeze(struct task_struct *p) +{ + set_tsk_thread_flag(p, TIF_FREEZE); +} + +/* + * Sometimes we may need to cancel the previous 'freeze' request + */ +static inline void do_not_freeze(struct task_struct *p) +{ + clear_tsk_thread_flag(p, TIF_FREEZE); +} + +/* + * Wake up a frozen process + */ +static inline int thaw_process(struct task_struct *p) +{ + if (frozen(p)) { + p->flags &= ~PF_FROZEN; + wake_up_process(p); + return 1; + } + return 0; +} + +/* + * freezing is complete, mark process as frozen + */ +static inline void frozen_process(struct task_struct *p) +{ + p->flags |= PF_FROZEN; + wmb(); + clear_tsk_thread_flag(p, TIF_FREEZE); +} + +extern void refrigerator(void); +extern int freeze_processes(void); +extern void thaw_processes(void); + +static inline int try_to_freeze(void) +{ + if (freezing(current)) { + refrigerator(); + return 1; + } else + return 0; +} + +extern void thaw_some_processes(int all); + +#else +static inline int frozen(struct task_struct *p) { return 0; } +static inline int freezing(struct task_struct *p) { return 0; } +static inline void freeze(struct task_struct *p) { BUG(); } +static inline int thaw_process(struct task_struct *p) { return 1; } +static inline void frozen_process(struct task_struct *p) { BUG(); } + +static inline void refrigerator(void) {} +static inline int freeze_processes(void) { BUG(); return 0; } +static inline void thaw_processes(void) {} + +static inline int try_to_freeze(void) { return 0; } + + +#endif diff --git a/include/linux/fs.h b/include/linux/fs.h index 2fe6e3f900b..1410e5330c8 100644 --- a/include/linux/fs.h +++ b/include/linux/fs.h @@ -120,6 +120,7 @@ extern int dir_notify_enable; #define MS_PRIVATE (1<<18) /* change to private */ #define MS_SLAVE (1<<19) /* change to slave */ #define MS_SHARED (1<<20) /* change to shared */ +#define MS_RELATIME (1<<21) /* Update atime relative to mtime/ctime. */ #define MS_ACTIVE (1<<30) #define MS_NOUSER (1<<31) @@ -269,6 +270,7 @@ extern int dir_notify_enable; #include <linux/types.h> #include <linux/kdev_t.h> #include <linux/dcache.h> +#include <linux/namei.h> #include <linux/stat.h> #include <linux/cache.h> #include <linux/kobject.h> @@ -276,7 +278,7 @@ extern int dir_notify_enable; #include <linux/radix-tree.h> #include <linux/prio_tree.h> #include <linux/init.h> -#include <linux/sched.h> +#include <linux/pid.h> #include <linux/mutex.h> #include <asm/atomic.h> @@ -424,6 +426,7 @@ struct address_space_operations { /* migrate the contents of a page to the specified target */ int (*migratepage) (struct address_space *, struct page *, struct page *); + int (*launder_page) (struct page *); }; struct backing_dev_info; @@ -456,7 +459,7 @@ struct block_device { struct inode * bd_inode; /* will die */ int bd_openers; struct mutex bd_mutex; /* open/close mutex */ - struct mutex bd_mount_mutex; /* mount mutex */ + struct semaphore bd_mount_sem; struct list_head bd_inodes; void * bd_holder; int bd_holders; @@ -482,21 +485,6 @@ struct block_device { }; /* - * bdev->bd_mutex nesting subclasses for the lock validator: - * - * 0: normal - * 1: 'whole' - * 2: 'partition' - */ -enum bdev_bd_mutex_lock_class -{ - BD_MUTEX_NORMAL, - BD_MUTEX_WHOLE, - BD_MUTEX_PARTITION -}; - - -/* * Radix-tree tags, for tagging dirty and writeback pages within the pagecache * radix trees */ @@ -543,19 +531,22 @@ struct inode { struct list_head i_dentry; unsigned long i_ino; atomic_t i_count; - umode_t i_mode; unsigned int i_nlink; uid_t i_uid; gid_t i_gid; dev_t i_rdev; + unsigned long i_version; loff_t i_size; +#ifdef __NEED_I_SIZE_ORDERED + seqcount_t i_size_seqcount; +#endif struct timespec i_atime; struct timespec i_mtime; struct timespec i_ctime; unsigned int i_blkbits; - unsigned long i_version; blkcnt_t i_blocks; unsigned short i_bytes; + umode_t i_mode; spinlock_t i_lock; /* i_blocks, i_bytes, maybe i_size */ struct mutex i_mutex; struct rw_semaphore i_alloc_sem; @@ -598,9 +589,6 @@ struct inode { void *i_security; #endif void *i_private; /* fs or device private pointer */ -#ifdef __NEED_I_SIZE_ORDERED - seqcount_t i_size_seqcount; -#endif }; /* @@ -636,7 +624,7 @@ extern void inode_double_unlock(struct inode *inode1, struct inode *inode2); * cmpxchg8b without the need of the lock prefix). For SMP compiles * and 64bit archs it makes no difference if preempt is enabled or not. */ -static inline loff_t i_size_read(struct inode *inode) +static inline loff_t i_size_read(const struct inode *inode) { #if BITS_PER_LONG==32 && defined(CONFIG_SMP) loff_t i_size; @@ -679,12 +667,12 @@ static inline void i_size_write(struct inode *inode, loff_t i_size) #endif } -static inline unsigned iminor(struct inode *inode) +static inline unsigned iminor(const struct inode *inode) { return MINOR(inode->i_rdev); } -static inline unsigned imajor(struct inode *inode) +static inline unsigned imajor(const struct inode *inode) { return MAJOR(inode->i_rdev); } @@ -726,8 +714,9 @@ struct file { struct list_head fu_list; struct rcu_head fu_rcuhead; } f_u; - struct dentry *f_dentry; - struct vfsmount *f_vfsmnt; + struct path f_path; +#define f_dentry f_path.dentry +#define f_vfsmnt f_path.mnt const struct file_operations *f_op; atomic_t f_count; unsigned int f_flags; @@ -977,36 +966,13 @@ enum { #define vfs_check_frozen(sb, level) \ wait_event((sb)->s_wait_unfrozen, ((sb)->s_frozen < (level))) -static inline void get_fs_excl(void) -{ - atomic_inc(¤t->fs_excl); -} - -static inline void put_fs_excl(void) -{ - atomic_dec(¤t->fs_excl); -} - -static inline int has_fs_excl(void) -{ - return atomic_read(¤t->fs_excl); -} +#define get_fs_excl() atomic_inc(¤t->fs_excl) +#define put_fs_excl() atomic_dec(¤t->fs_excl) +#define has_fs_excl() atomic_read(¤t->fs_excl) - -/* - * Superblock locking. - */ -static inline void lock_super(struct super_block * sb) -{ - get_fs_excl(); - mutex_lock(&sb->s_lock); -} - -static inline void unlock_super(struct super_block * sb) -{ - put_fs_excl(); - mutex_unlock(&sb->s_lock); -} +/* not quite ready to be deprecated, but... */ +extern void lock_super(struct super_block *); +extern void unlock_super(struct super_block *); /* * VFS helper functions.. @@ -1262,7 +1228,7 @@ extern void touch_atime(struct vfsmount *mnt, struct dentry *dentry); static inline void file_accessed(struct file *file) { if (!(file->f_flags & O_NOATIME)) - touch_atime(file->f_vfsmnt, file->f_dentry); + touch_atime(file->f_path.mnt, file->f_path.dentry); } int sync_inode(struct inode *inode, struct writeback_control *wbc); @@ -1504,7 +1470,9 @@ extern char * getname(const char __user *); extern void __init vfs_caches_init_early(void); extern void __init vfs_caches_init(unsigned long); -#define __getname() kmem_cache_alloc(names_cachep, SLAB_KERNEL) +extern struct kmem_cache *names_cachep; + +#define __getname() kmem_cache_alloc(names_cachep, GFP_KERNEL) #define __putname(name) kmem_cache_free(names_cachep, (void *)(name)) #ifndef CONFIG_AUDITSYSCALL #define putname(name) __putname(name) @@ -1520,7 +1488,6 @@ extern void bd_set_size(struct block_device *, loff_t size); extern void bd_forget(struct inode *inode); extern void bdput(struct block_device *); extern struct block_device *open_by_devnum(dev_t, unsigned); -extern struct block_device *open_partition_by_devnum(dev_t, unsigned); extern const struct address_space_operations def_blk_aops; #else static inline void bd_forget(struct inode *inode) {} @@ -1538,7 +1505,6 @@ extern int blkdev_driver_ioctl(struct inode *inode, struct file *file, extern long compat_blkdev_ioctl(struct file *, unsigned, unsigned long); extern int blkdev_get(struct block_device *, mode_t, unsigned); extern int blkdev_put(struct block_device *); -extern int blkdev_put_partition(struct block_device *); extern int bd_claim(struct block_device *, void *); extern void bd_release(struct block_device *); #ifdef CONFIG_SYSFS @@ -1653,7 +1619,7 @@ static inline void put_write_access(struct inode * inode) static inline void allow_write_access(struct file *file) { if (file) - atomic_inc(&file->f_dentry->d_inode->i_writecount); + atomic_inc(&file->f_path.dentry->d_inode->i_writecount); } extern int do_pipe(int *); extern struct file *create_read_pipe(struct file *f); diff --git a/include/linux/fs_stack.h b/include/linux/fs_stack.h new file mode 100644 index 00000000000..bb516ceeefc --- /dev/null +++ b/include/linux/fs_stack.h @@ -0,0 +1,31 @@ +#ifndef _LINUX_FS_STACK_H +#define _LINUX_FS_STACK_H + +/* This file defines generic functions used primarily by stackable + * filesystems; none of these functions require i_mutex to be held. + */ + +#include <linux/fs.h> + +/* externs for fs/stack.c */ +extern void fsstack_copy_attr_all(struct inode *dest, const struct inode *src, + int (*get_nlinks)(struct inode *)); + +extern void fsstack_copy_inode_size(struct inode *dst, const struct inode *src); + +/* inlines */ +static inline void fsstack_copy_attr_atime(struct inode *dest, + const struct inode *src) +{ + dest->i_atime = src->i_atime; +} + +static inline void fsstack_copy_attr_times(struct inode *dest, + const struct inode *src) +{ + dest->i_atime = src->i_atime; + dest->i_mtime = src->i_mtime; + dest->i_ctime = src->i_ctime; +} + +#endif /* _LINUX_FS_STACK_H */ diff --git a/include/linux/fs_struct.h b/include/linux/fs_struct.h index c623d12a486..11a36ceddf7 100644 --- a/include/linux/fs_struct.h +++ b/include/linux/fs_struct.h @@ -18,6 +18,8 @@ struct fs_struct { .umask = 0022, \ } +extern struct kmem_cache *fs_cachep; + extern void exit_fs(struct task_struct *); extern void set_fs_altroot(void); extern void set_fs_root(struct fs_struct *, struct vfsmount *, struct dentry *); diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h index 3da29e2d524..abb64c437f6 100644 --- a/include/linux/fsl_devices.h +++ b/include/linux/fsl_devices.h @@ -19,6 +19,7 @@ #define _FSL_DEVICE_H_ #include <linux/types.h> +#include <linux/phy.h> /* * Some conventions on how we handle peripherals on Freescale chips diff --git a/include/linux/fsnotify.h b/include/linux/fsnotify.h index d4f219ffaa5..dfc4e4f68da 100644 --- a/include/linux/fsnotify.h +++ b/include/linux/fsnotify.h @@ -164,7 +164,7 @@ static inline void fsnotify_open(struct dentry *dentry) */ static inline void fsnotify_close(struct file *file) { - struct dentry *dentry = file->f_dentry; + struct dentry *dentry = file->f_path.dentry; struct inode *inode = dentry->d_inode; const char *name = dentry->d_name.name; mode_t mode = file->f_mode; diff --git a/include/linux/ftape-header-segment.h b/include/linux/ftape-header-segment.h deleted file mode 100644 index 4732218f070..00000000000 --- a/include/linux/ftape-header-segment.h +++ /dev/null @@ -1,122 +0,0 @@ -#ifndef _FTAPE_HEADER_SEGMENT_H -#define _FTAPE_HEADER_SEGMENT_H - -/* - * Copyright (C) 1996-1997 Claus-Justus Heine. - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2, or (at your option) - any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; see the file COPYING. If not, write to - the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. - - * - * $Source: /homes/cvs/ftape-stacked/include/linux/ftape-header-segment.h,v $ - * $Revision: 1.2 $ - * $Date: 1997/10/05 19:19:28 $ - * - * This file defines some offsets into the header segment of a - * floppy tape cartridge. For use with the QIC-40/80/3010/3020 - * floppy-tape driver "ftape" for Linux. - */ - -#define FT_SIGNATURE 0 /* must be 0xaa55aa55 */ -#define FT_FMT_CODE 4 -#define FT_REV_LEVEL 5 /* only for QIC-80 since. Rev. L (== 0x0c) */ -#define FT_HSEG_1 6 /* first header segment, except for format code 6 */ -#define FT_HSEG_2 8 /* second header segment, except for format code 6 */ -#define FT_FRST_SEG 10 /* first data segment, except for format code 6 */ -#define FT_LAST_SEG 12 /* last data segment, except for format code 6 */ -#define FT_FMT_DATE 14 /* date and time of most recent format, see below */ -#define FT_WR_DATE 18 /* date and time of most recent write or format */ -#define FT_SPT 24 /* segments per track */ -#define FT_TPC 26 /* tracks per cartridge */ -#define FT_FHM 27 /* floppy drive head (maximum of it) */ -#define FT_FTM 28 /* floppy track max. */ -#define FT_FSM 29 /* floppy sector max. (128) */ -#define FT_LABEL 30 /* floppy tape label */ -#define FT_LABEL_DATE 74 /* date and time the tape label was written */ -#define FT_LABEL_SZ (FT_LABEL_DATE - FT_LABEL) -#define FT_CMAP_START 78 /* starting segment of compression map */ -#define FT_FMT_ERROR 128 /* must be set to 0xff if remainder gets lost during - * tape format - */ -#define FT_SEG_CNT 130 /* number of seg. written, formatted or verified - * through lifetime of tape (why not read?) - */ -#define FT_INIT_DATE 138 /* date and time of initial tape format */ -#define FT_FMT_CNT 142 /* number of times tape has been formatted */ -#define FT_FSL_CNT 144 /* number of segments in failed sector log */ -#define FT_MK_CODE 146 /* id string of tape manufacturer */ -#define FT_LOT_CODE 190 /* tape manufacturer lot code */ -#define FT_6_HSEG_1 234 /* first header segment for format code 6 */ -#define FT_6_HSEG_2 238 /* second header segment for format code 6 */ -#define FT_6_FRST_SEG 242 /* first data segment for format code 6 */ -#define FT_6_LAST_SEG 246 /* last data segment for format code 6 */ - -#define FT_FSL 256 -#define FT_HEADER_END 256 /* space beyond this point: - * format codes 2, 3 and 5: - * - failed sector log until byte 2047 - * - bad sector map in the reamining part of segment - * format codes 4 and 6: - * - bad sector map starts hear - */ - - -/* value to be stored at the FT_SIGNATURE offset - */ -#define FT_HSEG_MAGIC 0xaa55aa55 -#define FT_D2G_MAGIC 0x82288228 /* Ditto 2GB */ - -/* data and time encoding: */ -#define FT_YEAR_SHIFT 25 -#define FT_YEAR_MASK 0xfe000000 -#define FT_YEAR_0 1970 -#define FT_YEAR_MAX 127 -#define FT_YEAR(year) ((((year)-FT_YEAR_0)<<FT_YEAR_SHIFT)&FT_YEAR_MASK) - -#define FT_TIME_SHIFT 0 -#define FT_TIME_MASK 0x01FFFFFF -#define FT_TIME_MAX 0x01ea6dff /* last second of a year */ -#define FT_TIME(mo,d,h,m,s) \ - ((((s)+60*((m)+60*((h)+24*((d)+31*(mo))))) & FT_TIME_MASK)) - -#define FT_TIME_STAMP(y,mo,d,h,m,s) (FT_YEAR(y) | FT_TIME(mo,d,h,m,s)) - -/* values for the format code field */ -typedef enum { - fmt_normal = 2, /* QIC-80 post Rev. B 205Ft or 307Ft tape */ - fmt_1100ft = 3, /* QIC-80 post Rev. B 1100Ft tape */ - fmt_var = 4, /* QIC-80 post Rev. B variabel length format */ - fmt_425ft = 5, /* QIC-80 post Rev. B 425Ft tape */ - fmt_big = 6 /* QIC-3010/3020 variable length tape with more - * than 2^16 segments per tape - */ -} ft_format_type; - -/* definitions for the failed sector log */ -#define FT_FSL_SIZE (2 * FT_SECTOR_SIZE - FT_HEADER_END) -#define FT_FSL_MAX_ENTRIES (FT_FSL_SIZE/sizeof(__u32)) - -typedef struct ft_fsl_entry { - __u16 segment; - __u16 date; -} __attribute__ ((packed)) ft_fsl_entry; - - -/* date encoding for the failed sector log - * month: 1..12, day: 1..31, year: 1970..2097 - */ -#define FT_FSL_TIME_STAMP(y,m,d) \ - (((((y) - FT_YEAR_0)<<9)&0xfe00) | (((m)<<5)&0x01e0) | ((d)&0x001f)) - -#endif /* _FTAPE_HEADER_SEGMENT_H */ diff --git a/include/linux/ftape-vendors.h b/include/linux/ftape-vendors.h deleted file mode 100644 index ec1a81f059e..00000000000 --- a/include/linux/ftape-vendors.h +++ /dev/null @@ -1,137 +0,0 @@ -#ifndef _FTAPE_VENDORS_H -#define _FTAPE_VENDORS_H - -/* - * Copyright (C) 1993-1996 Bas Laarhoven, - * (C) 1996-1997 Claus-Justus Heine. - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2, or (at your option) - any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; see the file COPYING. If not, write to - the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. - - * - * $Source: /homes/cvs/ftape-stacked/include/linux/ftape-vendors.h,v $ - * $Revision: 1.6 $ - * $Date: 1997/10/09 15:38:11 $ - * - * This file contains the supported drive types with their - * QIC-117 spec. vendor code and drive dependent configuration - * information. - */ - -typedef enum { - unknown_wake_up = 0, - no_wake_up, - wake_up_colorado, - wake_up_mountain, - wake_up_insight, -} wake_up_types; - -typedef struct { - wake_up_types wake_up; /* see wake_up_types */ - char *name; /* Text describing the drive */ -} wakeup_method; - -/* Note: order of entries in WAKEUP_METHODS must be so that a variable - * of type wake_up_types can be used as an index in the array. - */ -#define WAKEUP_METHODS { \ - { unknown_wake_up, "Unknown" }, \ - { no_wake_up, "None" }, \ - { wake_up_colorado, "Colorado" }, \ - { wake_up_mountain, "Mountain" }, \ - { wake_up_insight, "Motor-on" }, \ -} - -typedef struct { - unsigned int vendor_id; /* vendor id from drive */ - int speed; /* maximum tape transport speed (ips) */ - wake_up_types wake_up; /* see wake_up_types */ - char *name; /* Text describing the drive */ -} vendor_struct; - -#define UNKNOWN_VENDOR (-1) - -#define QIC117_VENDORS { \ -/* see _vendor_struct */ \ - { 0x00000, 82, wake_up_colorado, "Colorado DJ-10 (old)" }, \ - { 0x00047, 90, wake_up_colorado, "Colorado DJ-10/DJ-20" }, \ - { 0x011c2, 84, wake_up_colorado, "Colorado 700" }, \ - { 0x011c3, 90, wake_up_colorado, "Colorado 1400" }, \ - { 0x011c4, 84, wake_up_colorado, "Colorado DJ-10/DJ-20 (new)" }, \ - { 0x011c5, 84, wake_up_colorado, "HP Colorado T1000" }, \ - { 0x011c6, 90, wake_up_colorado, "HP Colorado T3000" }, \ - { 0x00005, 45, wake_up_mountain, "Archive 5580i" }, \ - { 0x10005, 50, wake_up_insight, "Insight 80Mb, Irwin 80SX" }, \ - { 0x00140, 74, wake_up_mountain, "Archive S.Hornet [Identity/Escom]" }, \ - { 0x00146, 72, wake_up_mountain, "Archive 31250Q [Escom]" }, \ - { 0x0014a, 100, wake_up_mountain, "Archive XL9250i [Conner/Escom]" }, \ - { 0x0014c, 98, wake_up_mountain, "Conner C250MQT" }, \ - { 0x0014e, 80, wake_up_mountain, "Conner C250MQ" }, \ - { 0x00150, 80, wake_up_mountain, "Conner TSM420R/TST800R" }, \ - { 0x00152, 80, wake_up_mountain, "Conner TSM850R" }, \ - { 0x00156, 80, wake_up_mountain, "Conner TSM850R/1700R/TST3200R" }, \ - { 0x00180, 0, wake_up_mountain, "Summit SE 150" }, \ - { 0x00181, 85, wake_up_mountain, "Summit SE 250, Mountain FS8000" }, \ - { 0x001c1, 82, no_wake_up, "Wangtek 3040F" }, \ - { 0x001c8, 64, no_wake_up, "Wangtek 3080F" }, \ - { 0x001c8, 64, wake_up_colorado, "Wangtek 3080F" }, \ - { 0x001ca, 67, no_wake_up, "Wangtek 3080F (new)" }, \ - { 0x001cc, 77, wake_up_colorado, "Wangtek 3200 / Teac 700" }, \ - { 0x001cd, 75, wake_up_colorado, "Reveal TB1400" }, \ - { 0x00380, 85, wake_up_colorado, "Exabyte Eagle-96" }, \ - { 0x00381, 85, wake_up_colorado, "Exabyte Eagle TR-3" }, \ - { 0x00382, 85, wake_up_colorado, "Exabyte Eagle TR-3" }, \ - { 0x003ce, 77, wake_up_colorado, "Teac 800" }, \ - { 0x003cf, 0, wake_up_colorado, "Teac FT3010TR" }, \ - { 0x08880, 64, no_wake_up, "Iomega 250, Ditto 800" }, \ - { 0x08880, 64, wake_up_colorado, "Iomega 250, Ditto 800" }, \ - { 0x08880, 64, wake_up_insight, "Iomega 250, Ditto 800" }, \ - { 0x08881, 80, wake_up_colorado, "Iomega 700" }, \ - { 0x08882, 80, wake_up_colorado, "Iomega 3200" }, \ - { 0x08883, 80, wake_up_colorado, "Iomega DITTO 2GB" }, \ - { 0x00021, 70, no_wake_up, "AIWA CT-803" }, \ - { 0x004c0, 80, no_wake_up, "AIWA TD-S1600" }, \ - { 0x00021, 0, wake_up_mountain, "COREtape QIC80" }, \ - { 0x00441, 0, wake_up_mountain, "ComByte DoublePlay" }, \ - { 0x00481, 127, wake_up_mountain, "PERTEC MyTape 800" }, \ - { 0x00483, 130, wake_up_mountain, "PERTEC MyTape 3200" }, \ - { UNKNOWN_VENDOR, 0, no_wake_up, "unknown" } \ -} - -#define QIC117_MAKE_CODES { \ - { 0, "Unassigned" }, \ - { 1, "Alloy Computer Products" }, \ - { 2, "3M" }, \ - { 3, "Tandberg Data" }, \ - { 4, "Colorado" }, \ - { 5, "Archive/Conner" }, \ - { 6, "Mountain/Summit Memory Systems" }, \ - { 7, "Wangtek/Rexon/Tecmar" }, \ - { 8, "Sony" }, \ - { 9, "Cipher Data Products" }, \ - { 10, "Irwin Magnetic Systems" }, \ - { 11, "Braemar" }, \ - { 12, "Verbatim" }, \ - { 13, "Core International" }, \ - { 14, "Exabyte" }, \ - { 15, "Teac" }, \ - { 16, "Gigatek" }, \ - { 17, "ComByte" }, \ - { 18, "PERTEC Memories" }, \ - { 19, "Aiwa" }, \ - { 71, "Colorado" }, \ - { 546, "Iomega Inc" }, \ -} - -#endif /* _FTAPE_VENDORS_H */ diff --git a/include/linux/ftape.h b/include/linux/ftape.h deleted file mode 100644 index 7e7038cba86..00000000000 --- a/include/linux/ftape.h +++ /dev/null @@ -1,201 +0,0 @@ -#ifndef _FTAPE_H -#define _FTAPE_H - -/* - * Copyright (C) 1994-1996 Bas Laarhoven, - * (C) 1996-1997 Claus-Justus Heine. - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2, or (at your option) - any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; see the file COPYING. If not, write to - the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. - - * - * $Source: /homes/cvs/ftape-stacked/include/linux/ftape.h,v $ - * $Revision: 1.17.6.4 $ - * $Date: 1997/11/25 01:52:54 $ - * - * This file contains global definitions, typedefs and macro's - * for the QIC-40/80/3010/3020 floppy-tape driver for Linux. - */ - -#define FTAPE_VERSION "ftape v3.04d 25/11/97" - -#ifdef __KERNEL__ -#include <linux/interrupt.h> -#include <linux/mm.h> -#endif -#include <linux/types.h> -#include <linux/mtio.h> - -#define FT_SECTOR(x) (x+1) /* sector offset into real sector */ -#define FT_SECTOR_SIZE 1024 -#define FT_SECTORS_PER_SEGMENT 32 -#define FT_ECC_SECTORS 3 -#define FT_SEGMENT_SIZE ((FT_SECTORS_PER_SEGMENT - FT_ECC_SECTORS) * FT_SECTOR_SIZE) -#define FT_BUFF_SIZE (FT_SECTORS_PER_SEGMENT * FT_SECTOR_SIZE) - -/* - * bits of the minor device number that define drive selection - * methods. Could be used one day to access multiple tape - * drives on the same controller. - */ -#define FTAPE_SEL_A 0 -#define FTAPE_SEL_B 1 -#define FTAPE_SEL_C 2 -#define FTAPE_SEL_D 3 -#define FTAPE_SEL_MASK 3 -#define FTAPE_SEL(unit) ((unit) & FTAPE_SEL_MASK) -#define FTAPE_NO_REWIND 4 /* mask for minor nr */ - -/* the following two may be reported when MTIOCGET is requested ... */ -typedef union { - struct { - __u8 error; - __u8 command; - } error; - long space; -} ft_drive_error; -typedef union { - struct { - __u8 drive_status; - __u8 drive_config; - __u8 tape_status; - } status; - long space; -} ft_drive_status; - -#ifdef __KERNEL__ - -#define FT_RQM_DELAY 12 -#define FT_MILLISECOND 1 -#define FT_SECOND 1000 -#define FT_FOREVER -1 -#ifndef HZ -#error "HZ undefined." -#endif -#define FT_USPT (1000000/HZ) /* microseconds per tick */ - -/* This defines the number of retries that the driver will allow - * before giving up (and letting a higher level handle the error). - */ -#ifdef TESTING -#define FT_SOFT_RETRIES 1 /* number of low level retries */ -#define FT_RETRIES_ON_ECC_ERROR 3 /* ecc error when correcting segment */ -#else -#define FT_SOFT_RETRIES 6 /* number of low level retries (triple) */ -#define FT_RETRIES_ON_ECC_ERROR 3 /* ecc error when correcting segment */ -#endif - -#ifndef THE_FTAPE_MAINTAINER -#define THE_FTAPE_MAINTAINER "the ftape maintainer" -#endif - -/* Initialize missing configuration parameters. - */ -#ifndef CONFIG_FT_NR_BUFFERS -# define CONFIG_FT_NR_BUFFERS 3 -#endif -#ifndef CONFIG_FT_FDC_THR -# define CONFIG_FT_FDC_THR 8 -#endif -#ifndef CONFIG_FT_FDC_MAX_RATE -# define CONFIG_FT_FDC_MAX_RATE 2000 -#endif -#ifndef CONFIG_FT_FDC_BASE -# define CONFIG_FT_FDC_BASE 0 -#endif -#ifndef CONFIG_FT_FDC_IRQ -# define CONFIG_FT_FDC_IRQ 0 -#endif -#ifndef CONFIG_FT_FDC_DMA -# define CONFIG_FT_FDC_DMA 0 -#endif - -/* Turn some booleans into numbers. - */ -#ifdef CONFIG_FT_PROBE_FC10 -# undef CONFIG_FT_PROBE_FC10 -# define CONFIG_FT_PROBE_FC10 1 -#else -# define CONFIG_FT_PROBE_FC10 0 -#endif -#ifdef CONFIG_FT_MACH2 -# undef CONFIG_FT_MACH2 -# define CONFIG_FT_MACH2 1 -#else -# define CONFIG_FT_MACH2 0 -#endif - -/* Insert default settings - */ -#if CONFIG_FT_PROBE_FC10 == 1 -# if CONFIG_FT_FDC_BASE == 0 -# undef CONFIG_FT_FDC_BASE -# define CONFIG_FT_FDC_BASE 0x180 -# endif -# if CONFIG_FT_FDC_IRQ == 0 -# undef CONFIG_FT_FDC_IRQ -# define CONFIG_FT_FDC_IRQ 9 -# endif -# if CONFIG_FT_FDC_DMA == 0 -# undef CONFIG_FT_FDC_DMA -# define CONFIG_FT_FDC_DMA 3 -# endif -#elif CONFIG_FT_MACH2 == 1 /* CONFIG_FT_PROBE_FC10 == 1 */ -# if CONFIG_FT_FDC_BASE == 0 -# undef CONFIG_FT_FDC_BASE -# define CONFIG_FT_FDC_BASE 0x1E0 -# endif -# if CONFIG_FT_FDC_IRQ == 0 -# undef CONFIG_FT_FDC_IRQ -# define CONFIG_FT_FDC_IRQ 6 -# endif -# if CONFIG_FT_FDC_DMA == 0 -# undef CONFIG_FT_FDC_DMA -# define CONFIG_FT_FDC_DMA 2 -# endif -#elif defined(CONFIG_FT_ALT_FDC) /* CONFIG_FT_MACH2 */ -# if CONFIG_FT_FDC_BASE == 0 -# undef CONFIG_FT_FDC_BASE -# define CONFIG_FT_FDC_BASE 0x370 -# endif -# if CONFIG_FT_FDC_IRQ == 0 -# undef CONFIG_FT_FDC_IRQ -# define CONFIG_FT_FDC_IRQ 6 -# endif -# if CONFIG_FT_FDC_DMA == 0 -# undef CONFIG_FT_FDC_DMA -# define CONFIG_FT_FDC_DMA 2 -# endif -#else /* CONFIG_FT_ALT_FDC */ -# if CONFIG_FT_FDC_BASE == 0 -# undef CONFIG_FT_FDC_BASE -# define CONFIG_FT_FDC_BASE 0x3f0 -# endif -# if CONFIG_FT_FDC_IRQ == 0 -# undef CONFIG_FT_FDC_IRQ -# define CONFIG_FT_FDC_IRQ 6 -# endif -# if CONFIG_FT_FDC_DMA == 0 -# undef CONFIG_FT_FDC_DMA -# define CONFIG_FT_FDC_DMA 2 -# endif -#endif /* standard FDC */ - -/* some useful macro's - */ -#define NR_ITEMS(x) (int)(sizeof(x)/ sizeof(*x)) - -#endif /* __KERNEL__ */ - -#endif diff --git a/include/linux/fuse.h b/include/linux/fuse.h index 9fc48a674b8..534744efe30 100644 --- a/include/linux/fuse.h +++ b/include/linux/fuse.h @@ -15,7 +15,7 @@ #define FUSE_KERNEL_VERSION 7 /** Minor version number of this interface */ -#define FUSE_KERNEL_MINOR_VERSION 7 +#define FUSE_KERNEL_MINOR_VERSION 8 /** The node ID of the root inode */ #define FUSE_ROOT_ID 1 @@ -92,6 +92,11 @@ struct fuse_file_lock { #define FUSE_ASYNC_READ (1 << 0) #define FUSE_POSIX_LOCKS (1 << 1) +/** + * Release flags + */ +#define FUSE_RELEASE_FLUSH (1 << 0) + enum fuse_opcode { FUSE_LOOKUP = 1, FUSE_FORGET = 2, /* no reply */ @@ -127,6 +132,8 @@ enum fuse_opcode { FUSE_ACCESS = 34, FUSE_CREATE = 35, FUSE_INTERRUPT = 36, + FUSE_BMAP = 37, + FUSE_DESTROY = 38, }; /* The read buffer is required to be at least 8k, but may be much larger */ @@ -205,12 +212,13 @@ struct fuse_open_out { struct fuse_release_in { __u64 fh; __u32 flags; - __u32 padding; + __u32 release_flags; + __u64 lock_owner; }; struct fuse_flush_in { __u64 fh; - __u32 flush_flags; + __u32 unused; __u32 padding; __u64 lock_owner; }; @@ -296,6 +304,16 @@ struct fuse_interrupt_in { __u64 unique; }; +struct fuse_bmap_in { + __u64 block; + __u32 blocksize; + __u32 padding; +}; + +struct fuse_bmap_out { + __u64 block; +}; + struct fuse_in_header { __u32 len; __u32 opcode; diff --git a/include/linux/futex.h b/include/linux/futex.h index d097b5b72bc..3f153b4e156 100644 --- a/include/linux/futex.h +++ b/include/linux/futex.h @@ -93,6 +93,7 @@ struct robust_list_head { */ #define ROBUST_LIST_LIMIT 2048 +#ifdef __KERNEL__ long do_futex(u32 __user *uaddr, int op, u32 val, unsigned long timeout, u32 __user *uaddr2, u32 val2, u32 val3); @@ -110,6 +111,7 @@ static inline void exit_pi_state_list(struct task_struct *curr) { } #endif +#endif /* __KERNEL__ */ #define FUTEX_OP_SET 0 /* *(int *)UADDR2 = OPARG; */ #define FUTEX_OP_ADD 1 /* *(int *)UADDR2 += OPARG; */ diff --git a/include/linux/gameport.h b/include/linux/gameport.h index 2cdba0c2395..afad9527284 100644 --- a/include/linux/gameport.h +++ b/include/linux/gameport.h @@ -105,7 +105,7 @@ static inline void gameport_set_phys(struct gameport *gameport, static inline struct gameport *gameport_allocate_port(void) { - struct gameport *gameport = kcalloc(1, sizeof(struct gameport), GFP_KERNEL); + struct gameport *gameport = kzalloc(sizeof(struct gameport), GFP_KERNEL); return gameport; } diff --git a/include/linux/generic_serial.h b/include/linux/generic_serial.h index e2538456195..5412da28fa4 100644 --- a/include/linux/generic_serial.h +++ b/include/linux/generic_serial.h @@ -91,7 +91,7 @@ void gs_hangup(struct tty_struct *tty); int gs_block_til_ready(void *port, struct file *filp); void gs_close(struct tty_struct *tty, struct file *filp); void gs_set_termios (struct tty_struct * tty, - struct termios * old_termios); + struct ktermios * old_termios); int gs_init_port(struct gs_port *port); int gs_setserial(struct gs_port *port, struct serial_struct __user *sp); int gs_getserial(struct gs_port *port, struct serial_struct __user *sp); diff --git a/include/linux/genetlink.h b/include/linux/genetlink.h index 9049dc65ae5..f7a93770e1b 100644 --- a/include/linux/genetlink.h +++ b/include/linux/genetlink.h @@ -17,6 +17,9 @@ struct genlmsghdr { #define GENL_HDRLEN NLMSG_ALIGN(sizeof(struct genlmsghdr)) #define GENL_ADMIN_PERM 0x01 +#define GENL_CMD_CAP_DO 0x02 +#define GENL_CMD_CAP_DUMP 0x04 +#define GENL_CMD_CAP_HASPOL 0x08 /* * List of reserved static generic netlink identifiers: @@ -58,9 +61,6 @@ enum { CTRL_ATTR_OP_UNSPEC, CTRL_ATTR_OP_ID, CTRL_ATTR_OP_FLAGS, - CTRL_ATTR_OP_POLICY, - CTRL_ATTR_OP_DOIT, - CTRL_ATTR_OP_DUMPIT, __CTRL_ATTR_OP_MAX, }; diff --git a/include/linux/genhd.h b/include/linux/genhd.h index 41f276fdd18..0a022b2f63f 100644 --- a/include/linux/genhd.h +++ b/include/linux/genhd.h @@ -83,6 +83,9 @@ struct hd_struct { struct kobject *holder_dir; unsigned ios[2], sectors[2]; /* READs and WRITEs */ int policy, partno; +#ifdef CONFIG_FAIL_MAKE_REQUEST + int make_it_fail; +#endif }; #define GENHD_FL_REMOVABLE 1 @@ -90,6 +93,7 @@ struct hd_struct { #define GENHD_FL_CD 8 #define GENHD_FL_UP 16 #define GENHD_FL_SUPPRESS_PARTITION_INFO 32 +#define GENHD_FL_FAIL 64 struct disk_stats { unsigned long sectors[2]; /* READs and WRITEs */ diff --git a/include/linux/gfp.h b/include/linux/gfp.h index bf2b6bc3f6f..00c314aedab 100644 --- a/include/linux/gfp.h +++ b/include/linux/gfp.h @@ -116,6 +116,9 @@ static inline enum zone_type gfp_zone(gfp_t flags) #ifndef HAVE_ARCH_FREE_PAGE static inline void arch_free_page(struct page *page, int order) { } #endif +#ifndef HAVE_ARCH_ALLOC_PAGE +static inline void arch_alloc_page(struct page *page, int order) { } +#endif extern struct page * FASTCALL(__alloc_pages(gfp_t, unsigned int, struct zonelist *)); diff --git a/include/linux/gfs2_ondisk.h b/include/linux/gfs2_ondisk.h index a7ae7c177ca..8b7e4c1e32a 100644 --- a/include/linux/gfs2_ondisk.h +++ b/include/linux/gfs2_ondisk.h @@ -54,8 +54,13 @@ struct gfs2_inum { __be64 no_addr; }; -static inline int gfs2_inum_equal(const struct gfs2_inum *ino1, - const struct gfs2_inum *ino2) +struct gfs2_inum_host { + __u64 no_formal_ino; + __u64 no_addr; +}; + +static inline int gfs2_inum_equal(const struct gfs2_inum_host *ino1, + const struct gfs2_inum_host *ino2) { return ino1->no_formal_ino == ino2->no_formal_ino && ino1->no_addr == ino2->no_addr; @@ -89,6 +94,12 @@ struct gfs2_meta_header { __be32 __pad1; /* Was incarnation number in gfs1 */ }; +struct gfs2_meta_header_host { + __u32 mh_magic; + __u32 mh_type; + __u32 mh_format; +}; + /* * super-block structure * @@ -128,6 +139,23 @@ struct gfs2_sb { /* In gfs1, quota and license dinodes followed */ }; +struct gfs2_sb_host { + struct gfs2_meta_header_host sb_header; + + __u32 sb_fs_format; + __u32 sb_multihost_format; + + __u32 sb_bsize; + __u32 sb_bsize_shift; + + struct gfs2_inum_host sb_master_dir; /* Was jindex dinode in gfs1 */ + struct gfs2_inum_host sb_root_dir; + + char sb_lockproto[GFS2_LOCKNAME_LEN]; + char sb_locktable[GFS2_LOCKNAME_LEN]; + /* In gfs1, quota and license dinodes followed */ +}; + /* * resource index structure */ @@ -145,6 +173,14 @@ struct gfs2_rindex { __u8 ri_reserved[64]; }; +struct gfs2_rindex_host { + __u64 ri_addr; /* grp block disk address */ + __u64 ri_data0; /* first data location */ + __u32 ri_length; /* length of rgrp header in fs blocks */ + __u32 ri_data; /* num of data blocks in rgrp */ + __u32 ri_bitbytes; /* number of bytes in data bitmaps */ +}; + /* * resource group header structure */ @@ -176,6 +212,13 @@ struct gfs2_rgrp { __u8 rg_reserved[80]; /* Several fields from gfs1 now reserved */ }; +struct gfs2_rgrp_host { + __u32 rg_flags; + __u32 rg_free; + __u32 rg_dinodes; + __u64 rg_igeneration; +}; + /* * quota structure */ @@ -187,6 +230,12 @@ struct gfs2_quota { __u8 qu_reserved[64]; }; +struct gfs2_quota_host { + __u64 qu_limit; + __u64 qu_warn; + __u64 qu_value; +}; + /* * dinode structure */ @@ -270,6 +319,27 @@ struct gfs2_dinode { __u8 di_reserved[56]; }; +struct gfs2_dinode_host { + __u64 di_size; /* number of bytes in file */ + __u64 di_blocks; /* number of blocks in file */ + + /* This section varies from gfs1. Padding added to align with + * remainder of dinode + */ + __u64 di_goal_meta; /* rgrp to alloc from next */ + __u64 di_goal_data; /* data block goal */ + __u64 di_generation; /* generation number for NFS */ + + __u32 di_flags; /* GFS2_DIF_... */ + __u16 di_height; /* height of metadata */ + + /* These only apply to directories */ + __u16 di_depth; /* Number of bits in the table */ + __u32 di_entries; /* The number of entries in the directory */ + + __u64 di_eattr; /* extended attribute block number */ +}; + /* * directory structure - many of these per directory file */ @@ -344,6 +414,16 @@ struct gfs2_log_header { __be32 lh_hash; }; +struct gfs2_log_header_host { + struct gfs2_meta_header_host lh_header; + + __u64 lh_sequence; /* Sequence number of this transaction */ + __u32 lh_flags; /* GFS2_LOG_HEAD_... */ + __u32 lh_tail; /* Block number of log tail */ + __u32 lh_blkno; + __u32 lh_hash; +}; + /* * Log type descriptor */ @@ -384,6 +464,11 @@ struct gfs2_inum_range { __be64 ir_length; }; +struct gfs2_inum_range_host { + __u64 ir_start; + __u64 ir_length; +}; + /* * Statfs change * Describes an change to the pool of free and allocated @@ -396,6 +481,12 @@ struct gfs2_statfs_change { __be64 sc_dinodes; }; +struct gfs2_statfs_change_host { + __u64 sc_total; + __u64 sc_free; + __u64 sc_dinodes; +}; + /* * Quota change * Describes an allocation change for a particular @@ -410,33 +501,38 @@ struct gfs2_quota_change { __be32 qc_id; }; +struct gfs2_quota_change_host { + __u64 qc_change; + __u32 qc_flags; /* GFS2_QCF_... */ + __u32 qc_id; +}; + #ifdef __KERNEL__ /* Translation functions */ -extern void gfs2_inum_in(struct gfs2_inum *no, const void *buf); -extern void gfs2_inum_out(const struct gfs2_inum *no, void *buf); -extern void gfs2_sb_in(struct gfs2_sb *sb, const void *buf); -extern void gfs2_rindex_in(struct gfs2_rindex *ri, const void *buf); -extern void gfs2_rindex_out(const struct gfs2_rindex *ri, void *buf); -extern void gfs2_rgrp_in(struct gfs2_rgrp *rg, const void *buf); -extern void gfs2_rgrp_out(const struct gfs2_rgrp *rg, void *buf); -extern void gfs2_quota_in(struct gfs2_quota *qu, const void *buf); -extern void gfs2_quota_out(const struct gfs2_quota *qu, void *buf); -extern void gfs2_dinode_in(struct gfs2_dinode *di, const void *buf); -extern void gfs2_dinode_out(const struct gfs2_dinode *di, void *buf); +extern void gfs2_inum_in(struct gfs2_inum_host *no, const void *buf); +extern void gfs2_inum_out(const struct gfs2_inum_host *no, void *buf); +extern void gfs2_sb_in(struct gfs2_sb_host *sb, const void *buf); +extern void gfs2_rindex_in(struct gfs2_rindex_host *ri, const void *buf); +extern void gfs2_rindex_out(const struct gfs2_rindex_host *ri, void *buf); +extern void gfs2_rgrp_in(struct gfs2_rgrp_host *rg, const void *buf); +extern void gfs2_rgrp_out(const struct gfs2_rgrp_host *rg, void *buf); +extern void gfs2_quota_in(struct gfs2_quota_host *qu, const void *buf); +struct gfs2_inode; +extern void gfs2_dinode_out(const struct gfs2_inode *ip, void *buf); extern void gfs2_ea_header_in(struct gfs2_ea_header *ea, const void *buf); extern void gfs2_ea_header_out(const struct gfs2_ea_header *ea, void *buf); -extern void gfs2_log_header_in(struct gfs2_log_header *lh, const void *buf); -extern void gfs2_inum_range_in(struct gfs2_inum_range *ir, const void *buf); -extern void gfs2_inum_range_out(const struct gfs2_inum_range *ir, void *buf); -extern void gfs2_statfs_change_in(struct gfs2_statfs_change *sc, const void *buf); -extern void gfs2_statfs_change_out(const struct gfs2_statfs_change *sc, void *buf); -extern void gfs2_quota_change_in(struct gfs2_quota_change *qc, const void *buf); +extern void gfs2_log_header_in(struct gfs2_log_header_host *lh, const void *buf); +extern void gfs2_inum_range_in(struct gfs2_inum_range_host *ir, const void *buf); +extern void gfs2_inum_range_out(const struct gfs2_inum_range_host *ir, void *buf); +extern void gfs2_statfs_change_in(struct gfs2_statfs_change_host *sc, const void *buf); +extern void gfs2_statfs_change_out(const struct gfs2_statfs_change_host *sc, void *buf); +extern void gfs2_quota_change_in(struct gfs2_quota_change_host *qc, const void *buf); /* Printing functions */ -extern void gfs2_rindex_print(const struct gfs2_rindex *ri); -extern void gfs2_dinode_print(const struct gfs2_dinode *di); +extern void gfs2_rindex_print(const struct gfs2_rindex_host *ri); +extern void gfs2_dinode_print(const struct gfs2_inode *ip); #endif /* __KERNEL__ */ diff --git a/include/linux/hid-debug.h b/include/linux/hid-debug.h new file mode 100644 index 00000000000..f04d6d75c09 --- /dev/null +++ b/include/linux/hid-debug.h @@ -0,0 +1,757 @@ +/* + * $Id: hid-debug.h,v 1.8 2001/09/25 09:37:57 vojtech Exp $ + * + * (c) 1999 Andreas Gal <gal@cs.uni-magdeburg.de> + * (c) 2000-2001 Vojtech Pavlik <vojtech@ucw.cz> + * + * Some debug stuff for the HID parser. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * Should you need to contact me, the author, you can do so either by + * e-mail - mail your message to <vojtech@ucw.cz>, or by paper mail: + * Vojtech Pavlik, Simunkova 1594, Prague 8, 182 00 Czech Republic + */ + +#include <linux/input.h> + +struct hid_usage_entry { + unsigned page; + unsigned usage; + char *description; +}; + +static const struct hid_usage_entry hid_usage_table[] = { + { 0, 0, "Undefined" }, + { 1, 0, "GenericDesktop" }, + {0, 0x01, "Pointer"}, + {0, 0x02, "Mouse"}, + {0, 0x04, "Joystick"}, + {0, 0x05, "GamePad"}, + {0, 0x06, "Keyboard"}, + {0, 0x07, "Keypad"}, + {0, 0x08, "MultiAxis"}, + {0, 0x30, "X"}, + {0, 0x31, "Y"}, + {0, 0x32, "Z"}, + {0, 0x33, "Rx"}, + {0, 0x34, "Ry"}, + {0, 0x35, "Rz"}, + {0, 0x36, "Slider"}, + {0, 0x37, "Dial"}, + {0, 0x38, "Wheel"}, + {0, 0x39, "HatSwitch"}, + {0, 0x3a, "CountedBuffer"}, + {0, 0x3b, "ByteCount"}, + {0, 0x3c, "MotionWakeup"}, + {0, 0x3d, "Start"}, + {0, 0x3e, "Select"}, + {0, 0x40, "Vx"}, + {0, 0x41, "Vy"}, + {0, 0x42, "Vz"}, + {0, 0x43, "Vbrx"}, + {0, 0x44, "Vbry"}, + {0, 0x45, "Vbrz"}, + {0, 0x46, "Vno"}, + {0, 0x80, "SystemControl"}, + {0, 0x81, "SystemPowerDown"}, + {0, 0x82, "SystemSleep"}, + {0, 0x83, "SystemWakeUp"}, + {0, 0x84, "SystemContextMenu"}, + {0, 0x85, "SystemMainMenu"}, + {0, 0x86, "SystemAppMenu"}, + {0, 0x87, "SystemMenuHelp"}, + {0, 0x88, "SystemMenuExit"}, + {0, 0x89, "SystemMenuSelect"}, + {0, 0x8a, "SystemMenuRight"}, + {0, 0x8b, "SystemMenuLeft"}, + {0, 0x8c, "SystemMenuUp"}, + {0, 0x8d, "SystemMenuDown"}, + {0, 0x90, "D-PadUp"}, + {0, 0x91, "D-PadDown"}, + {0, 0x92, "D-PadRight"}, + {0, 0x93, "D-PadLeft"}, + { 2, 0, "Simulation" }, + {0, 0xb0, "Aileron"}, + {0, 0xb1, "AileronTrim"}, + {0, 0xb2, "Anti-Torque"}, + {0, 0xb3, "Autopilot"}, + {0, 0xb4, "Chaff"}, + {0, 0xb5, "Collective"}, + {0, 0xb6, "DiveBrake"}, + {0, 0xb7, "ElectronicCountermeasures"}, + {0, 0xb8, "Elevator"}, + {0, 0xb9, "ElevatorTrim"}, + {0, 0xba, "Rudder"}, + {0, 0xbb, "Throttle"}, + {0, 0xbc, "FlightCommunications"}, + {0, 0xbd, "FlareRelease"}, + {0, 0xbe, "LandingGear"}, + {0, 0xbf, "ToeBrake"}, + { 7, 0, "Keyboard" }, + { 8, 0, "LED" }, + {0, 0x01, "NumLock"}, + {0, 0x02, "CapsLock"}, + {0, 0x03, "ScrollLock"}, + {0, 0x04, "Compose"}, + {0, 0x05, "Kana"}, + {0, 0x4b, "GenericIndicator"}, + { 9, 0, "Button" }, + { 10, 0, "Ordinal" }, + { 12, 0, "Consumer" }, + {0, 0x238, "HorizontalWheel"}, + { 13, 0, "Digitizers" }, + {0, 0x01, "Digitizer"}, + {0, 0x02, "Pen"}, + {0, 0x03, "LightPen"}, + {0, 0x04, "TouchScreen"}, + {0, 0x05, "TouchPad"}, + {0, 0x20, "Stylus"}, + {0, 0x21, "Puck"}, + {0, 0x22, "Finger"}, + {0, 0x30, "TipPressure"}, + {0, 0x31, "BarrelPressure"}, + {0, 0x32, "InRange"}, + {0, 0x33, "Touch"}, + {0, 0x34, "UnTouch"}, + {0, 0x35, "Tap"}, + {0, 0x39, "TabletFunctionKey"}, + {0, 0x3a, "ProgramChangeKey"}, + {0, 0x3c, "Invert"}, + {0, 0x42, "TipSwitch"}, + {0, 0x43, "SecondaryTipSwitch"}, + {0, 0x44, "BarrelSwitch"}, + {0, 0x45, "Eraser"}, + {0, 0x46, "TabletPick"}, + { 15, 0, "PhysicalInterfaceDevice" }, + {0, 0x00, "Undefined"}, + {0, 0x01, "Physical_Interface_Device"}, + {0, 0x20, "Normal"}, + {0, 0x21, "Set_Effect_Report"}, + {0, 0x22, "Effect_Block_Index"}, + {0, 0x23, "Parameter_Block_Offset"}, + {0, 0x24, "ROM_Flag"}, + {0, 0x25, "Effect_Type"}, + {0, 0x26, "ET_Constant_Force"}, + {0, 0x27, "ET_Ramp"}, + {0, 0x28, "ET_Custom_Force_Data"}, + {0, 0x30, "ET_Square"}, + {0, 0x31, "ET_Sine"}, + {0, 0x32, "ET_Triangle"}, + {0, 0x33, "ET_Sawtooth_Up"}, + {0, 0x34, "ET_Sawtooth_Down"}, + {0, 0x40, "ET_Spring"}, + {0, 0x41, "ET_Damper"}, + {0, 0x42, "ET_Inertia"}, + {0, 0x43, "ET_Friction"}, + {0, 0x50, "Duration"}, + {0, 0x51, "Sample_Period"}, + {0, 0x52, "Gain"}, + {0, 0x53, "Trigger_Button"}, + {0, 0x54, "Trigger_Repeat_Interval"}, + {0, 0x55, "Axes_Enable"}, + {0, 0x56, "Direction_Enable"}, + {0, 0x57, "Direction"}, + {0, 0x58, "Type_Specific_Block_Offset"}, + {0, 0x59, "Block_Type"}, + {0, 0x5A, "Set_Envelope_Report"}, + {0, 0x5B, "Attack_Level"}, + {0, 0x5C, "Attack_Time"}, + {0, 0x5D, "Fade_Level"}, + {0, 0x5E, "Fade_Time"}, + {0, 0x5F, "Set_Condition_Report"}, + {0, 0x60, "CP_Offset"}, + {0, 0x61, "Positive_Coefficient"}, + {0, 0x62, "Negative_Coefficient"}, + {0, 0x63, "Positive_Saturation"}, + {0, 0x64, "Negative_Saturation"}, + {0, 0x65, "Dead_Band"}, + {0, 0x66, "Download_Force_Sample"}, + {0, 0x67, "Isoch_Custom_Force_Enable"}, + {0, 0x68, "Custom_Force_Data_Report"}, + {0, 0x69, "Custom_Force_Data"}, + {0, 0x6A, "Custom_Force_Vendor_Defined_Data"}, + {0, 0x6B, "Set_Custom_Force_Report"}, + {0, 0x6C, "Custom_Force_Data_Offset"}, + {0, 0x6D, "Sample_Count"}, + {0, 0x6E, "Set_Periodic_Report"}, + {0, 0x6F, "Offset"}, + {0, 0x70, "Magnitude"}, + {0, 0x71, "Phase"}, + {0, 0x72, "Period"}, + {0, 0x73, "Set_Constant_Force_Report"}, + {0, 0x74, "Set_Ramp_Force_Report"}, + {0, 0x75, "Ramp_Start"}, + {0, 0x76, "Ramp_End"}, + {0, 0x77, "Effect_Operation_Report"}, + {0, 0x78, "Effect_Operation"}, + {0, 0x79, "Op_Effect_Start"}, + {0, 0x7A, "Op_Effect_Start_Solo"}, + {0, 0x7B, "Op_Effect_Stop"}, + {0, 0x7C, "Loop_Count"}, + {0, 0x7D, "Device_Gain_Report"}, + {0, 0x7E, "Device_Gain"}, + {0, 0x7F, "PID_Pool_Report"}, + {0, 0x80, "RAM_Pool_Size"}, + {0, 0x81, "ROM_Pool_Size"}, + {0, 0x82, "ROM_Effect_Block_Count"}, + {0, 0x83, "Simultaneous_Effects_Max"}, + {0, 0x84, "Pool_Alignment"}, + {0, 0x85, "PID_Pool_Move_Report"}, + {0, 0x86, "Move_Source"}, + {0, 0x87, "Move_Destination"}, + {0, 0x88, "Move_Length"}, + {0, 0x89, "PID_Block_Load_Report"}, + {0, 0x8B, "Block_Load_Status"}, + {0, 0x8C, "Block_Load_Success"}, + {0, 0x8D, "Block_Load_Full"}, + {0, 0x8E, "Block_Load_Error"}, + {0, 0x8F, "Block_Handle"}, + {0, 0x90, "PID_Block_Free_Report"}, + {0, 0x91, "Type_Specific_Block_Handle"}, + {0, 0x92, "PID_State_Report"}, + {0, 0x94, "Effect_Playing"}, + {0, 0x95, "PID_Device_Control_Report"}, + {0, 0x96, "PID_Device_Control"}, + {0, 0x97, "DC_Enable_Actuators"}, + {0, 0x98, "DC_Disable_Actuators"}, + {0, 0x99, "DC_Stop_All_Effects"}, + {0, 0x9A, "DC_Device_Reset"}, + {0, 0x9B, "DC_Device_Pause"}, + {0, 0x9C, "DC_Device_Continue"}, + {0, 0x9F, "Device_Paused"}, + {0, 0xA0, "Actuators_Enabled"}, + {0, 0xA4, "Safety_Switch"}, + {0, 0xA5, "Actuator_Override_Switch"}, + {0, 0xA6, "Actuator_Power"}, + {0, 0xA7, "Start_Delay"}, + {0, 0xA8, "Parameter_Block_Size"}, + {0, 0xA9, "Device_Managed_Pool"}, + {0, 0xAA, "Shared_Parameter_Blocks"}, + {0, 0xAB, "Create_New_Effect_Report"}, + {0, 0xAC, "RAM_Pool_Available"}, + { 0x84, 0, "Power Device" }, + { 0x84, 0x02, "PresentStatus" }, + { 0x84, 0x03, "ChangeStatus" }, + { 0x84, 0x04, "UPS" }, + { 0x84, 0x05, "PowerSupply" }, + { 0x84, 0x10, "BatterySystem" }, + { 0x84, 0x11, "BatterySystemID" }, + { 0x84, 0x12, "Battery" }, + { 0x84, 0x13, "BatteryID" }, + { 0x84, 0x14, "Charger" }, + { 0x84, 0x15, "ChargerID" }, + { 0x84, 0x16, "PowerConverter" }, + { 0x84, 0x17, "PowerConverterID" }, + { 0x84, 0x18, "OutletSystem" }, + { 0x84, 0x19, "OutletSystemID" }, + { 0x84, 0x1a, "Input" }, + { 0x84, 0x1b, "InputID" }, + { 0x84, 0x1c, "Output" }, + { 0x84, 0x1d, "OutputID" }, + { 0x84, 0x1e, "Flow" }, + { 0x84, 0x1f, "FlowID" }, + { 0x84, 0x20, "Outlet" }, + { 0x84, 0x21, "OutletID" }, + { 0x84, 0x22, "Gang" }, + { 0x84, 0x24, "PowerSummary" }, + { 0x84, 0x25, "PowerSummaryID" }, + { 0x84, 0x30, "Voltage" }, + { 0x84, 0x31, "Current" }, + { 0x84, 0x32, "Frequency" }, + { 0x84, 0x33, "ApparentPower" }, + { 0x84, 0x35, "PercentLoad" }, + { 0x84, 0x40, "ConfigVoltage" }, + { 0x84, 0x41, "ConfigCurrent" }, + { 0x84, 0x43, "ConfigApparentPower" }, + { 0x84, 0x53, "LowVoltageTransfer" }, + { 0x84, 0x54, "HighVoltageTransfer" }, + { 0x84, 0x56, "DelayBeforeStartup" }, + { 0x84, 0x57, "DelayBeforeShutdown" }, + { 0x84, 0x58, "Test" }, + { 0x84, 0x5a, "AudibleAlarmControl" }, + { 0x84, 0x60, "Present" }, + { 0x84, 0x61, "Good" }, + { 0x84, 0x62, "InternalFailure" }, + { 0x84, 0x65, "Overload" }, + { 0x84, 0x66, "OverCharged" }, + { 0x84, 0x67, "OverTemperature" }, + { 0x84, 0x68, "ShutdownRequested" }, + { 0x84, 0x69, "ShutdownImminent" }, + { 0x84, 0x6b, "SwitchOn/Off" }, + { 0x84, 0x6c, "Switchable" }, + { 0x84, 0x6d, "Used" }, + { 0x84, 0x6e, "Boost" }, + { 0x84, 0x73, "CommunicationLost" }, + { 0x84, 0xfd, "iManufacturer" }, + { 0x84, 0xfe, "iProduct" }, + { 0x84, 0xff, "iSerialNumber" }, + { 0x85, 0, "Battery System" }, + { 0x85, 0x01, "SMBBatteryMode" }, + { 0x85, 0x02, "SMBBatteryStatus" }, + { 0x85, 0x03, "SMBAlarmWarning" }, + { 0x85, 0x04, "SMBChargerMode" }, + { 0x85, 0x05, "SMBChargerStatus" }, + { 0x85, 0x06, "SMBChargerSpecInfo" }, + { 0x85, 0x07, "SMBSelectorState" }, + { 0x85, 0x08, "SMBSelectorPresets" }, + { 0x85, 0x09, "SMBSelectorInfo" }, + { 0x85, 0x29, "RemainingCapacityLimit" }, + { 0x85, 0x2c, "CapacityMode" }, + { 0x85, 0x42, "BelowRemainingCapacityLimit" }, + { 0x85, 0x44, "Charging" }, + { 0x85, 0x45, "Discharging" }, + { 0x85, 0x4b, "NeedReplacement" }, + { 0x85, 0x66, "RemainingCapacity" }, + { 0x85, 0x68, "RunTimeToEmpty" }, + { 0x85, 0x6a, "AverageTimeToFull" }, + { 0x85, 0x83, "DesignCapacity" }, + { 0x85, 0x85, "ManufacturerDate" }, + { 0x85, 0x89, "iDeviceChemistry" }, + { 0x85, 0x8b, "Rechargable" }, + { 0x85, 0x8f, "iOEMInformation" }, + { 0x85, 0x8d, "CapacityGranularity1" }, + { 0x85, 0xd0, "ACPresent" }, + /* pages 0xff00 to 0xffff are vendor-specific */ + { 0xffff, 0, "Vendor-specific-FF" }, + { 0, 0, NULL } +}; + +static void resolv_usage_page(unsigned page) { + const struct hid_usage_entry *p; + + for (p = hid_usage_table; p->description; p++) + if (p->page == page) { + printk("%s", p->description); + return; + } + printk("%04x", page); +} + +static void resolv_usage(unsigned usage) { + const struct hid_usage_entry *p; + + resolv_usage_page(usage >> 16); + printk("."); + for (p = hid_usage_table; p->description; p++) + if (p->page == (usage >> 16)) { + for(++p; p->description && p->usage != 0; p++) + if (p->usage == (usage & 0xffff)) { + printk("%s", p->description); + return; + } + break; + } + printk("%04x", usage & 0xffff); +} + +__inline__ static void tab(int n) { + while (n--) printk(" "); +} + +static void hid_dump_field(struct hid_field *field, int n) { + int j; + + if (field->physical) { + tab(n); + printk("Physical("); + resolv_usage(field->physical); printk(")\n"); + } + if (field->logical) { + tab(n); + printk("Logical("); + resolv_usage(field->logical); printk(")\n"); + } + tab(n); printk("Usage(%d)\n", field->maxusage); + for (j = 0; j < field->maxusage; j++) { + tab(n+2);resolv_usage(field->usage[j].hid); printk("\n"); + } + if (field->logical_minimum != field->logical_maximum) { + tab(n); printk("Logical Minimum(%d)\n", field->logical_minimum); + tab(n); printk("Logical Maximum(%d)\n", field->logical_maximum); + } + if (field->physical_minimum != field->physical_maximum) { + tab(n); printk("Physical Minimum(%d)\n", field->physical_minimum); + tab(n); printk("Physical Maximum(%d)\n", field->physical_maximum); + } + if (field->unit_exponent) { + tab(n); printk("Unit Exponent(%d)\n", field->unit_exponent); + } + if (field->unit) { + char *systems[5] = { "None", "SI Linear", "SI Rotation", "English Linear", "English Rotation" }; + char *units[5][8] = { + { "None", "None", "None", "None", "None", "None", "None", "None" }, + { "None", "Centimeter", "Gram", "Seconds", "Kelvin", "Ampere", "Candela", "None" }, + { "None", "Radians", "Gram", "Seconds", "Kelvin", "Ampere", "Candela", "None" }, + { "None", "Inch", "Slug", "Seconds", "Fahrenheit", "Ampere", "Candela", "None" }, + { "None", "Degrees", "Slug", "Seconds", "Fahrenheit", "Ampere", "Candela", "None" } + }; + + int i; + int sys; + __u32 data = field->unit; + + /* First nibble tells us which system we're in. */ + sys = data & 0xf; + data >>= 4; + + if(sys > 4) { + tab(n); printk("Unit(Invalid)\n"); + } + else { + int earlier_unit = 0; + + tab(n); printk("Unit(%s : ", systems[sys]); + + for (i=1 ; i<sizeof(__u32)*2 ; i++) { + char nibble = data & 0xf; + data >>= 4; + if (nibble != 0) { + if(earlier_unit++ > 0) + printk("*"); + printk("%s", units[sys][i]); + if(nibble != 1) { + /* This is a _signed_ nibble(!) */ + + int val = nibble & 0x7; + if(nibble & 0x08) + val = -((0x7 & ~val) +1); + printk("^%d", val); + } + } + } + printk(")\n"); + } + } + tab(n); printk("Report Size(%u)\n", field->report_size); + tab(n); printk("Report Count(%u)\n", field->report_count); + tab(n); printk("Report Offset(%u)\n", field->report_offset); + + tab(n); printk("Flags( "); + j = field->flags; + printk("%s", HID_MAIN_ITEM_CONSTANT & j ? "Constant " : ""); + printk("%s", HID_MAIN_ITEM_VARIABLE & j ? "Variable " : "Array "); + printk("%s", HID_MAIN_ITEM_RELATIVE & j ? "Relative " : "Absolute "); + printk("%s", HID_MAIN_ITEM_WRAP & j ? "Wrap " : ""); + printk("%s", HID_MAIN_ITEM_NONLINEAR & j ? "NonLinear " : ""); + printk("%s", HID_MAIN_ITEM_NO_PREFERRED & j ? "NoPrefferedState " : ""); + printk("%s", HID_MAIN_ITEM_NULL_STATE & j ? "NullState " : ""); + printk("%s", HID_MAIN_ITEM_VOLATILE & j ? "Volatile " : ""); + printk("%s", HID_MAIN_ITEM_BUFFERED_BYTE & j ? "BufferedByte " : ""); + printk(")\n"); +} + +static void __attribute__((unused)) hid_dump_device(struct hid_device *device) { + struct hid_report_enum *report_enum; + struct hid_report *report; + struct list_head *list; + unsigned i,k; + static char *table[] = {"INPUT", "OUTPUT", "FEATURE"}; + + for (i = 0; i < HID_REPORT_TYPES; i++) { + report_enum = device->report_enum + i; + list = report_enum->report_list.next; + while (list != &report_enum->report_list) { + report = (struct hid_report *) list; + tab(2); + printk("%s", table[i]); + if (report->id) + printk("(%d)", report->id); + printk("[%s]", table[report->type]); + printk("\n"); + for (k = 0; k < report->maxfield; k++) { + tab(4); + printk("Field(%d)\n", k); + hid_dump_field(report->field[k], 6); + } + list = list->next; + } + } +} + +static void __attribute__((unused)) hid_dump_input(struct hid_usage *usage, __s32 value) { + printk("hid-debug: input "); + resolv_usage(usage->hid); + printk(" = %d\n", value); +} + + +static char *events[EV_MAX + 1] = { + [EV_SYN] = "Sync", [EV_KEY] = "Key", + [EV_REL] = "Relative", [EV_ABS] = "Absolute", + [EV_MSC] = "Misc", [EV_LED] = "LED", + [EV_SND] = "Sound", [EV_REP] = "Repeat", + [EV_FF] = "ForceFeedback", [EV_PWR] = "Power", + [EV_FF_STATUS] = "ForceFeedbackStatus", +}; + +static char *syncs[2] = { + [SYN_REPORT] = "Report", [SYN_CONFIG] = "Config", +}; +static char *keys[KEY_MAX + 1] = { + [KEY_RESERVED] = "Reserved", [KEY_ESC] = "Esc", + [KEY_1] = "1", [KEY_2] = "2", + [KEY_3] = "3", [KEY_4] = "4", + [KEY_5] = "5", [KEY_6] = "6", + [KEY_7] = "7", [KEY_8] = "8", + [KEY_9] = "9", [KEY_0] = "0", + [KEY_MINUS] = "Minus", [KEY_EQUAL] = "Equal", + [KEY_BACKSPACE] = "Backspace", [KEY_TAB] = "Tab", + [KEY_Q] = "Q", [KEY_W] = "W", + [KEY_E] = "E", [KEY_R] = "R", + [KEY_T] = "T", [KEY_Y] = "Y", + [KEY_U] = "U", [KEY_I] = "I", + [KEY_O] = "O", [KEY_P] = "P", + [KEY_LEFTBRACE] = "LeftBrace", [KEY_RIGHTBRACE] = "RightBrace", + [KEY_ENTER] = "Enter", [KEY_LEFTCTRL] = "LeftControl", + [KEY_A] = "A", [KEY_S] = "S", + [KEY_D] = "D", [KEY_F] = "F", + [KEY_G] = "G", [KEY_H] = "H", + [KEY_J] = "J", [KEY_K] = "K", + [KEY_L] = "L", [KEY_SEMICOLON] = "Semicolon", + [KEY_APOSTROPHE] = "Apostrophe", [KEY_GRAVE] = "Grave", + [KEY_LEFTSHIFT] = "LeftShift", [KEY_BACKSLASH] = "BackSlash", + [KEY_Z] = "Z", [KEY_X] = "X", + [KEY_C] = "C", [KEY_V] = "V", + [KEY_B] = "B", [KEY_N] = "N", + [KEY_M] = "M", [KEY_COMMA] = "Comma", + [KEY_DOT] = "Dot", [KEY_SLASH] = "Slash", + [KEY_RIGHTSHIFT] = "RightShift", [KEY_KPASTERISK] = "KPAsterisk", + [KEY_LEFTALT] = "LeftAlt", [KEY_SPACE] = "Space", + [KEY_CAPSLOCK] = "CapsLock", [KEY_F1] = "F1", + [KEY_F2] = "F2", [KEY_F3] = "F3", + [KEY_F4] = "F4", [KEY_F5] = "F5", + [KEY_F6] = "F6", [KEY_F7] = "F7", + [KEY_F8] = "F8", [KEY_F9] = "F9", + [KEY_F10] = "F10", [KEY_NUMLOCK] = "NumLock", + [KEY_SCROLLLOCK] = "ScrollLock", [KEY_KP7] = "KP7", + [KEY_KP8] = "KP8", [KEY_KP9] = "KP9", + [KEY_KPMINUS] = "KPMinus", [KEY_KP4] = "KP4", + [KEY_KP5] = "KP5", [KEY_KP6] = "KP6", + [KEY_KPPLUS] = "KPPlus", [KEY_KP1] = "KP1", + [KEY_KP2] = "KP2", [KEY_KP3] = "KP3", + [KEY_KP0] = "KP0", [KEY_KPDOT] = "KPDot", + [KEY_ZENKAKUHANKAKU] = "Zenkaku/Hankaku", [KEY_102ND] = "102nd", + [KEY_F11] = "F11", [KEY_F12] = "F12", + [KEY_RO] = "RO", [KEY_KATAKANA] = "Katakana", + [KEY_HIRAGANA] = "HIRAGANA", [KEY_HENKAN] = "Henkan", + [KEY_KATAKANAHIRAGANA] = "Katakana/Hiragana", [KEY_MUHENKAN] = "Muhenkan", + [KEY_KPJPCOMMA] = "KPJpComma", [KEY_KPENTER] = "KPEnter", + [KEY_RIGHTCTRL] = "RightCtrl", [KEY_KPSLASH] = "KPSlash", + [KEY_SYSRQ] = "SysRq", [KEY_RIGHTALT] = "RightAlt", + [KEY_LINEFEED] = "LineFeed", [KEY_HOME] = "Home", + [KEY_UP] = "Up", [KEY_PAGEUP] = "PageUp", + [KEY_LEFT] = "Left", [KEY_RIGHT] = "Right", + [KEY_END] = "End", [KEY_DOWN] = "Down", + [KEY_PAGEDOWN] = "PageDown", [KEY_INSERT] = "Insert", + [KEY_DELETE] = "Delete", [KEY_MACRO] = "Macro", + [KEY_MUTE] = "Mute", [KEY_VOLUMEDOWN] = "VolumeDown", + [KEY_VOLUMEUP] = "VolumeUp", [KEY_POWER] = "Power", + [KEY_KPEQUAL] = "KPEqual", [KEY_KPPLUSMINUS] = "KPPlusMinus", + [KEY_PAUSE] = "Pause", [KEY_KPCOMMA] = "KPComma", + [KEY_HANGUEL] = "Hangeul", [KEY_HANJA] = "Hanja", + [KEY_YEN] = "Yen", [KEY_LEFTMETA] = "LeftMeta", + [KEY_RIGHTMETA] = "RightMeta", [KEY_COMPOSE] = "Compose", + [KEY_STOP] = "Stop", [KEY_AGAIN] = "Again", + [KEY_PROPS] = "Props", [KEY_UNDO] = "Undo", + [KEY_FRONT] = "Front", [KEY_COPY] = "Copy", + [KEY_OPEN] = "Open", [KEY_PASTE] = "Paste", + [KEY_FIND] = "Find", [KEY_CUT] = "Cut", + [KEY_HELP] = "Help", [KEY_MENU] = "Menu", + [KEY_CALC] = "Calc", [KEY_SETUP] = "Setup", + [KEY_SLEEP] = "Sleep", [KEY_WAKEUP] = "WakeUp", + [KEY_FILE] = "File", [KEY_SENDFILE] = "SendFile", + [KEY_DELETEFILE] = "DeleteFile", [KEY_XFER] = "X-fer", + [KEY_PROG1] = "Prog1", [KEY_PROG2] = "Prog2", + [KEY_WWW] = "WWW", [KEY_MSDOS] = "MSDOS", + [KEY_COFFEE] = "Coffee", [KEY_DIRECTION] = "Direction", + [KEY_CYCLEWINDOWS] = "CycleWindows", [KEY_MAIL] = "Mail", + [KEY_BOOKMARKS] = "Bookmarks", [KEY_COMPUTER] = "Computer", + [KEY_BACK] = "Back", [KEY_FORWARD] = "Forward", + [KEY_CLOSECD] = "CloseCD", [KEY_EJECTCD] = "EjectCD", + [KEY_EJECTCLOSECD] = "EjectCloseCD", [KEY_NEXTSONG] = "NextSong", + [KEY_PLAYPAUSE] = "PlayPause", [KEY_PREVIOUSSONG] = "PreviousSong", + [KEY_STOPCD] = "StopCD", [KEY_RECORD] = "Record", + [KEY_REWIND] = "Rewind", [KEY_PHONE] = "Phone", + [KEY_ISO] = "ISOKey", [KEY_CONFIG] = "Config", + [KEY_HOMEPAGE] = "HomePage", [KEY_REFRESH] = "Refresh", + [KEY_EXIT] = "Exit", [KEY_MOVE] = "Move", + [KEY_EDIT] = "Edit", [KEY_SCROLLUP] = "ScrollUp", + [KEY_SCROLLDOWN] = "ScrollDown", [KEY_KPLEFTPAREN] = "KPLeftParenthesis", + [KEY_KPRIGHTPAREN] = "KPRightParenthesis", [KEY_NEW] = "New", + [KEY_REDO] = "Redo", [KEY_F13] = "F13", + [KEY_F14] = "F14", [KEY_F15] = "F15", + [KEY_F16] = "F16", [KEY_F17] = "F17", + [KEY_F18] = "F18", [KEY_F19] = "F19", + [KEY_F20] = "F20", [KEY_F21] = "F21", + [KEY_F22] = "F22", [KEY_F23] = "F23", + [KEY_F24] = "F24", [KEY_PLAYCD] = "PlayCD", + [KEY_PAUSECD] = "PauseCD", [KEY_PROG3] = "Prog3", + [KEY_PROG4] = "Prog4", [KEY_SUSPEND] = "Suspend", + [KEY_CLOSE] = "Close", [KEY_PLAY] = "Play", + [KEY_FASTFORWARD] = "FastForward", [KEY_BASSBOOST] = "BassBoost", + [KEY_PRINT] = "Print", [KEY_HP] = "HP", + [KEY_CAMERA] = "Camera", [KEY_SOUND] = "Sound", + [KEY_QUESTION] = "Question", [KEY_EMAIL] = "Email", + [KEY_CHAT] = "Chat", [KEY_SEARCH] = "Search", + [KEY_CONNECT] = "Connect", [KEY_FINANCE] = "Finance", + [KEY_SPORT] = "Sport", [KEY_SHOP] = "Shop", + [KEY_ALTERASE] = "AlternateErase", [KEY_CANCEL] = "Cancel", + [KEY_BRIGHTNESSDOWN] = "BrightnessDown", [KEY_BRIGHTNESSUP] = "BrightnessUp", + [KEY_MEDIA] = "Media", [KEY_UNKNOWN] = "Unknown", + [BTN_0] = "Btn0", [BTN_1] = "Btn1", + [BTN_2] = "Btn2", [BTN_3] = "Btn3", + [BTN_4] = "Btn4", [BTN_5] = "Btn5", + [BTN_6] = "Btn6", [BTN_7] = "Btn7", + [BTN_8] = "Btn8", [BTN_9] = "Btn9", + [BTN_LEFT] = "LeftBtn", [BTN_RIGHT] = "RightBtn", + [BTN_MIDDLE] = "MiddleBtn", [BTN_SIDE] = "SideBtn", + [BTN_EXTRA] = "ExtraBtn", [BTN_FORWARD] = "ForwardBtn", + [BTN_BACK] = "BackBtn", [BTN_TASK] = "TaskBtn", + [BTN_TRIGGER] = "Trigger", [BTN_THUMB] = "ThumbBtn", + [BTN_THUMB2] = "ThumbBtn2", [BTN_TOP] = "TopBtn", + [BTN_TOP2] = "TopBtn2", [BTN_PINKIE] = "PinkieBtn", + [BTN_BASE] = "BaseBtn", [BTN_BASE2] = "BaseBtn2", + [BTN_BASE3] = "BaseBtn3", [BTN_BASE4] = "BaseBtn4", + [BTN_BASE5] = "BaseBtn5", [BTN_BASE6] = "BaseBtn6", + [BTN_DEAD] = "BtnDead", [BTN_A] = "BtnA", + [BTN_B] = "BtnB", [BTN_C] = "BtnC", + [BTN_X] = "BtnX", [BTN_Y] = "BtnY", + [BTN_Z] = "BtnZ", [BTN_TL] = "BtnTL", + [BTN_TR] = "BtnTR", [BTN_TL2] = "BtnTL2", + [BTN_TR2] = "BtnTR2", [BTN_SELECT] = "BtnSelect", + [BTN_START] = "BtnStart", [BTN_MODE] = "BtnMode", + [BTN_THUMBL] = "BtnThumbL", [BTN_THUMBR] = "BtnThumbR", + [BTN_TOOL_PEN] = "ToolPen", [BTN_TOOL_RUBBER] = "ToolRubber", + [BTN_TOOL_BRUSH] = "ToolBrush", [BTN_TOOL_PENCIL] = "ToolPencil", + [BTN_TOOL_AIRBRUSH] = "ToolAirbrush", [BTN_TOOL_FINGER] = "ToolFinger", + [BTN_TOOL_MOUSE] = "ToolMouse", [BTN_TOOL_LENS] = "ToolLens", + [BTN_TOUCH] = "Touch", [BTN_STYLUS] = "Stylus", + [BTN_STYLUS2] = "Stylus2", [BTN_TOOL_DOUBLETAP] = "ToolDoubleTap", + [BTN_TOOL_TRIPLETAP] = "ToolTripleTap", [BTN_GEAR_DOWN] = "WheelBtn", + [BTN_GEAR_UP] = "Gear up", [KEY_OK] = "Ok", + [KEY_SELECT] = "Select", [KEY_GOTO] = "Goto", + [KEY_CLEAR] = "Clear", [KEY_POWER2] = "Power2", + [KEY_OPTION] = "Option", [KEY_INFO] = "Info", + [KEY_TIME] = "Time", [KEY_VENDOR] = "Vendor", + [KEY_ARCHIVE] = "Archive", [KEY_PROGRAM] = "Program", + [KEY_CHANNEL] = "Channel", [KEY_FAVORITES] = "Favorites", + [KEY_EPG] = "EPG", [KEY_PVR] = "PVR", + [KEY_MHP] = "MHP", [KEY_LANGUAGE] = "Language", + [KEY_TITLE] = "Title", [KEY_SUBTITLE] = "Subtitle", + [KEY_ANGLE] = "Angle", [KEY_ZOOM] = "Zoom", + [KEY_MODE] = "Mode", [KEY_KEYBOARD] = "Keyboard", + [KEY_SCREEN] = "Screen", [KEY_PC] = "PC", + [KEY_TV] = "TV", [KEY_TV2] = "TV2", + [KEY_VCR] = "VCR", [KEY_VCR2] = "VCR2", + [KEY_SAT] = "Sat", [KEY_SAT2] = "Sat2", + [KEY_CD] = "CD", [KEY_TAPE] = "Tape", + [KEY_RADIO] = "Radio", [KEY_TUNER] = "Tuner", + [KEY_PLAYER] = "Player", [KEY_TEXT] = "Text", + [KEY_DVD] = "DVD", [KEY_AUX] = "Aux", + [KEY_MP3] = "MP3", [KEY_AUDIO] = "Audio", + [KEY_VIDEO] = "Video", [KEY_DIRECTORY] = "Directory", + [KEY_LIST] = "List", [KEY_MEMO] = "Memo", + [KEY_CALENDAR] = "Calendar", [KEY_RED] = "Red", + [KEY_GREEN] = "Green", [KEY_YELLOW] = "Yellow", + [KEY_BLUE] = "Blue", [KEY_CHANNELUP] = "ChannelUp", + [KEY_CHANNELDOWN] = "ChannelDown", [KEY_FIRST] = "First", + [KEY_LAST] = "Last", [KEY_AB] = "AB", + [KEY_NEXT] = "Next", [KEY_RESTART] = "Restart", + [KEY_SLOW] = "Slow", [KEY_SHUFFLE] = "Shuffle", + [KEY_BREAK] = "Break", [KEY_PREVIOUS] = "Previous", + [KEY_DIGITS] = "Digits", [KEY_TEEN] = "TEEN", + [KEY_TWEN] = "TWEN", [KEY_DEL_EOL] = "DeleteEOL", + [KEY_DEL_EOS] = "DeleteEOS", [KEY_INS_LINE] = "InsertLine", + [KEY_DEL_LINE] = "DeleteLine", + [KEY_SEND] = "Send", [KEY_REPLY] = "Reply", + [KEY_FORWARDMAIL] = "ForwardMail", [KEY_SAVE] = "Save", + [KEY_DOCUMENTS] = "Documents", + [KEY_FN] = "Fn", [KEY_FN_ESC] = "Fn+ESC", + [KEY_FN_1] = "Fn+1", [KEY_FN_2] = "Fn+2", + [KEY_FN_B] = "Fn+B", [KEY_FN_D] = "Fn+D", + [KEY_FN_E] = "Fn+E", [KEY_FN_F] = "Fn+F", + [KEY_FN_S] = "Fn+S", + [KEY_FN_F1] = "Fn+F1", [KEY_FN_F2] = "Fn+F2", + [KEY_FN_F3] = "Fn+F3", [KEY_FN_F4] = "Fn+F4", + [KEY_FN_F5] = "Fn+F5", [KEY_FN_F6] = "Fn+F6", + [KEY_FN_F7] = "Fn+F7", [KEY_FN_F8] = "Fn+F8", + [KEY_FN_F9] = "Fn+F9", [KEY_FN_F10] = "Fn+F10", + [KEY_FN_F11] = "Fn+F11", [KEY_FN_F12] = "Fn+F12", + [KEY_KBDILLUMTOGGLE] = "KbdIlluminationToggle", + [KEY_KBDILLUMDOWN] = "KbdIlluminationDown", + [KEY_KBDILLUMUP] = "KbdIlluminationUp", + [KEY_SWITCHVIDEOMODE] = "SwitchVideoMode", +}; + +static char *relatives[REL_MAX + 1] = { + [REL_X] = "X", [REL_Y] = "Y", + [REL_Z] = "Z", [REL_HWHEEL] = "HWheel", + [REL_DIAL] = "Dial", [REL_WHEEL] = "Wheel", + [REL_MISC] = "Misc", +}; + +static char *absolutes[ABS_MAX + 1] = { + [ABS_X] = "X", [ABS_Y] = "Y", + [ABS_Z] = "Z", [ABS_RX] = "Rx", + [ABS_RY] = "Ry", [ABS_RZ] = "Rz", + [ABS_THROTTLE] = "Throttle", [ABS_RUDDER] = "Rudder", + [ABS_WHEEL] = "Wheel", [ABS_GAS] = "Gas", + [ABS_BRAKE] = "Brake", [ABS_HAT0X] = "Hat0X", + [ABS_HAT0Y] = "Hat0Y", [ABS_HAT1X] = "Hat1X", + [ABS_HAT1Y] = "Hat1Y", [ABS_HAT2X] = "Hat2X", + [ABS_HAT2Y] = "Hat2Y", [ABS_HAT3X] = "Hat3X", + [ABS_HAT3Y] = "Hat 3Y", [ABS_PRESSURE] = "Pressure", + [ABS_DISTANCE] = "Distance", [ABS_TILT_X] = "XTilt", + [ABS_TILT_Y] = "YTilt", [ABS_TOOL_WIDTH] = "Tool Width", + [ABS_VOLUME] = "Volume", [ABS_MISC] = "Misc", +}; + +static char *misc[MSC_MAX + 1] = { + [MSC_SERIAL] = "Serial", [MSC_PULSELED] = "Pulseled", + [MSC_GESTURE] = "Gesture", [MSC_RAW] = "RawData" +}; + +static char *leds[LED_MAX + 1] = { + [LED_NUML] = "NumLock", [LED_CAPSL] = "CapsLock", + [LED_SCROLLL] = "ScrollLock", [LED_COMPOSE] = "Compose", + [LED_KANA] = "Kana", [LED_SLEEP] = "Sleep", + [LED_SUSPEND] = "Suspend", [LED_MUTE] = "Mute", + [LED_MISC] = "Misc", +}; + +static char *repeats[REP_MAX + 1] = { + [REP_DELAY] = "Delay", [REP_PERIOD] = "Period" +}; + +static char *sounds[SND_MAX + 1] = { + [SND_CLICK] = "Click", [SND_BELL] = "Bell", + [SND_TONE] = "Tone" +}; + +static char **names[EV_MAX + 1] = { + [EV_SYN] = syncs, [EV_KEY] = keys, + [EV_REL] = relatives, [EV_ABS] = absolutes, + [EV_MSC] = misc, [EV_LED] = leds, + [EV_SND] = sounds, [EV_REP] = repeats, +}; + +static void __attribute__((unused)) resolv_event(__u8 type, __u16 code) { + + printk("%s.%s", events[type] ? events[type] : "?", + names[type] ? (names[type][code] ? names[type][code] : "?") : "?"); +} diff --git a/include/linux/hid.h b/include/linux/hid.h new file mode 100644 index 00000000000..770120add15 --- /dev/null +++ b/include/linux/hid.h @@ -0,0 +1,528 @@ +#ifndef __HID_H +#define __HID_H + +/* + * $Id: hid.h,v 1.24 2001/12/27 10:37:41 vojtech Exp $ + * + * Copyright (c) 1999 Andreas Gal + * Copyright (c) 2000-2001 Vojtech Pavlik + * Copyright (c) 2006 Jiri Kosina + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * Should you need to contact me, the author, you can do so either by + * e-mail - mail your message to <vojtech@ucw.cz>, or by paper mail: + * Vojtech Pavlik, Simunkova 1594, Prague 8, 182 00 Czech Republic + */ + +#include <linux/types.h> +#include <linux/slab.h> +#include <linux/list.h> +#include <linux/timer.h> +#include <linux/workqueue.h> +#include <linux/input.h> + +/* + * USB HID (Human Interface Device) interface class code + */ + +#define USB_INTERFACE_CLASS_HID 3 + +/* + * USB HID interface subclass and protocol codes + */ + +#define USB_INTERFACE_SUBCLASS_BOOT 1 +#define USB_INTERFACE_PROTOCOL_KEYBOARD 1 +#define USB_INTERFACE_PROTOCOL_MOUSE 2 + +/* + * HID class requests + */ + +#define HID_REQ_GET_REPORT 0x01 +#define HID_REQ_GET_IDLE 0x02 +#define HID_REQ_GET_PROTOCOL 0x03 +#define HID_REQ_SET_REPORT 0x09 +#define HID_REQ_SET_IDLE 0x0A +#define HID_REQ_SET_PROTOCOL 0x0B + +/* + * HID class descriptor types + */ + +#define HID_DT_HID (USB_TYPE_CLASS | 0x01) +#define HID_DT_REPORT (USB_TYPE_CLASS | 0x02) +#define HID_DT_PHYSICAL (USB_TYPE_CLASS | 0x03) + +/* + * We parse each description item into this structure. Short items data + * values are expanded to 32-bit signed int, long items contain a pointer + * into the data area. + */ + +struct hid_item { + unsigned format; + __u8 size; + __u8 type; + __u8 tag; + union { + __u8 u8; + __s8 s8; + __u16 u16; + __s16 s16; + __u32 u32; + __s32 s32; + __u8 *longdata; + } data; +}; + +/* + * HID report item format + */ + +#define HID_ITEM_FORMAT_SHORT 0 +#define HID_ITEM_FORMAT_LONG 1 + +/* + * Special tag indicating long items + */ + +#define HID_ITEM_TAG_LONG 15 + +/* + * HID report descriptor item type (prefix bit 2,3) + */ + +#define HID_ITEM_TYPE_MAIN 0 +#define HID_ITEM_TYPE_GLOBAL 1 +#define HID_ITEM_TYPE_LOCAL 2 +#define HID_ITEM_TYPE_RESERVED 3 + +/* + * HID report descriptor main item tags + */ + +#define HID_MAIN_ITEM_TAG_INPUT 8 +#define HID_MAIN_ITEM_TAG_OUTPUT 9 +#define HID_MAIN_ITEM_TAG_FEATURE 11 +#define HID_MAIN_ITEM_TAG_BEGIN_COLLECTION 10 +#define HID_MAIN_ITEM_TAG_END_COLLECTION 12 + +/* + * HID report descriptor main item contents + */ + +#define HID_MAIN_ITEM_CONSTANT 0x001 +#define HID_MAIN_ITEM_VARIABLE 0x002 +#define HID_MAIN_ITEM_RELATIVE 0x004 +#define HID_MAIN_ITEM_WRAP 0x008 +#define HID_MAIN_ITEM_NONLINEAR 0x010 +#define HID_MAIN_ITEM_NO_PREFERRED 0x020 +#define HID_MAIN_ITEM_NULL_STATE 0x040 +#define HID_MAIN_ITEM_VOLATILE 0x080 +#define HID_MAIN_ITEM_BUFFERED_BYTE 0x100 + +/* + * HID report descriptor collection item types + */ + +#define HID_COLLECTION_PHYSICAL 0 +#define HID_COLLECTION_APPLICATION 1 +#define HID_COLLECTION_LOGICAL 2 + +/* + * HID report descriptor global item tags + */ + +#define HID_GLOBAL_ITEM_TAG_USAGE_PAGE 0 +#define HID_GLOBAL_ITEM_TAG_LOGICAL_MINIMUM 1 +#define HID_GLOBAL_ITEM_TAG_LOGICAL_MAXIMUM 2 +#define HID_GLOBAL_ITEM_TAG_PHYSICAL_MINIMUM 3 +#define HID_GLOBAL_ITEM_TAG_PHYSICAL_MAXIMUM 4 +#define HID_GLOBAL_ITEM_TAG_UNIT_EXPONENT 5 +#define HID_GLOBAL_ITEM_TAG_UNIT 6 +#define HID_GLOBAL_ITEM_TAG_REPORT_SIZE 7 +#define HID_GLOBAL_ITEM_TAG_REPORT_ID 8 +#define HID_GLOBAL_ITEM_TAG_REPORT_COUNT 9 +#define HID_GLOBAL_ITEM_TAG_PUSH 10 +#define HID_GLOBAL_ITEM_TAG_POP 11 + +/* + * HID report descriptor local item tags + */ + +#define HID_LOCAL_ITEM_TAG_USAGE 0 +#define HID_LOCAL_ITEM_TAG_USAGE_MINIMUM 1 +#define HID_LOCAL_ITEM_TAG_USAGE_MAXIMUM 2 +#define HID_LOCAL_ITEM_TAG_DESIGNATOR_INDEX 3 +#define HID_LOCAL_ITEM_TAG_DESIGNATOR_MINIMUM 4 +#define HID_LOCAL_ITEM_TAG_DESIGNATOR_MAXIMUM 5 +#define HID_LOCAL_ITEM_TAG_STRING_INDEX 7 +#define HID_LOCAL_ITEM_TAG_STRING_MINIMUM 8 +#define HID_LOCAL_ITEM_TAG_STRING_MAXIMUM 9 +#define HID_LOCAL_ITEM_TAG_DELIMITER 10 + +/* + * HID usage tables + */ + +#define HID_USAGE_PAGE 0xffff0000 + +#define HID_UP_UNDEFINED 0x00000000 +#define HID_UP_GENDESK 0x00010000 +#define HID_UP_SIMULATION 0x00020000 +#define HID_UP_KEYBOARD 0x00070000 +#define HID_UP_LED 0x00080000 +#define HID_UP_BUTTON 0x00090000 +#define HID_UP_ORDINAL 0x000a0000 +#define HID_UP_CONSUMER 0x000c0000 +#define HID_UP_DIGITIZER 0x000d0000 +#define HID_UP_PID 0x000f0000 +#define HID_UP_HPVENDOR 0xff7f0000 +#define HID_UP_MSVENDOR 0xff000000 +#define HID_UP_CUSTOM 0x00ff0000 +#define HID_UP_LOGIVENDOR 0xffbc0000 + +#define HID_USAGE 0x0000ffff + +#define HID_GD_POINTER 0x00010001 +#define HID_GD_MOUSE 0x00010002 +#define HID_GD_JOYSTICK 0x00010004 +#define HID_GD_GAMEPAD 0x00010005 +#define HID_GD_KEYBOARD 0x00010006 +#define HID_GD_KEYPAD 0x00010007 +#define HID_GD_MULTIAXIS 0x00010008 +#define HID_GD_X 0x00010030 +#define HID_GD_Y 0x00010031 +#define HID_GD_Z 0x00010032 +#define HID_GD_RX 0x00010033 +#define HID_GD_RY 0x00010034 +#define HID_GD_RZ 0x00010035 +#define HID_GD_SLIDER 0x00010036 +#define HID_GD_DIAL 0x00010037 +#define HID_GD_WHEEL 0x00010038 +#define HID_GD_HATSWITCH 0x00010039 +#define HID_GD_BUFFER 0x0001003a +#define HID_GD_BYTECOUNT 0x0001003b +#define HID_GD_MOTION 0x0001003c +#define HID_GD_START 0x0001003d +#define HID_GD_SELECT 0x0001003e +#define HID_GD_VX 0x00010040 +#define HID_GD_VY 0x00010041 +#define HID_GD_VZ 0x00010042 +#define HID_GD_VBRX 0x00010043 +#define HID_GD_VBRY 0x00010044 +#define HID_GD_VBRZ 0x00010045 +#define HID_GD_VNO 0x00010046 +#define HID_GD_FEATURE 0x00010047 +#define HID_GD_UP 0x00010090 +#define HID_GD_DOWN 0x00010091 +#define HID_GD_RIGHT 0x00010092 +#define HID_GD_LEFT 0x00010093 + +/* + * HID report types --- Ouch! HID spec says 1 2 3! + */ + +#define HID_INPUT_REPORT 0 +#define HID_OUTPUT_REPORT 1 +#define HID_FEATURE_REPORT 2 + +/* + * HID device quirks. + */ + +#define HID_QUIRK_INVERT 0x00000001 +#define HID_QUIRK_NOTOUCH 0x00000002 +#define HID_QUIRK_IGNORE 0x00000004 +#define HID_QUIRK_NOGET 0x00000008 +#define HID_QUIRK_HIDDEV 0x00000010 +#define HID_QUIRK_BADPAD 0x00000020 +#define HID_QUIRK_MULTI_INPUT 0x00000040 +#define HID_QUIRK_2WHEEL_MOUSE_HACK_7 0x00000080 +#define HID_QUIRK_2WHEEL_MOUSE_HACK_5 0x00000100 +#define HID_QUIRK_2WHEEL_MOUSE_HACK_ON 0x00000200 +#define HID_QUIRK_MIGHTYMOUSE 0x00000400 +#define HID_QUIRK_CYMOTION 0x00000800 +#define HID_QUIRK_POWERBOOK_HAS_FN 0x00001000 +#define HID_QUIRK_POWERBOOK_FN_ON 0x00002000 +#define HID_QUIRK_INVERT_HWHEEL 0x00004000 +#define HID_QUIRK_POWERBOOK_ISO_KEYBOARD 0x00008000 +#define HID_QUIRK_BAD_RELATIVE_KEYS 0x00010000 + +/* + * This is the global environment of the parser. This information is + * persistent for main-items. The global environment can be saved and + * restored with PUSH/POP statements. + */ + +struct hid_global { + unsigned usage_page; + __s32 logical_minimum; + __s32 logical_maximum; + __s32 physical_minimum; + __s32 physical_maximum; + __s32 unit_exponent; + unsigned unit; + unsigned report_id; + unsigned report_size; + unsigned report_count; +}; + +/* + * This is the local environment. It is persistent up the next main-item. + */ + +#define HID_MAX_DESCRIPTOR_SIZE 4096 +#define HID_MAX_USAGES 1024 +#define HID_DEFAULT_NUM_COLLECTIONS 16 + +struct hid_local { + unsigned usage[HID_MAX_USAGES]; /* usage array */ + unsigned collection_index[HID_MAX_USAGES]; /* collection index array */ + unsigned usage_index; + unsigned usage_minimum; + unsigned delimiter_depth; + unsigned delimiter_branch; +}; + +/* + * This is the collection stack. We climb up the stack to determine + * application and function of each field. + */ + +struct hid_collection { + unsigned type; + unsigned usage; + unsigned level; +}; + +struct hid_usage { + unsigned hid; /* hid usage code */ + unsigned collection_index; /* index into collection array */ + /* hidinput data */ + __u16 code; /* input driver code */ + __u8 type; /* input driver type */ + __s8 hat_min; /* hat switch fun */ + __s8 hat_max; /* ditto */ + __s8 hat_dir; /* ditto */ +}; + +struct hid_input; + +struct hid_field { + unsigned physical; /* physical usage for this field */ + unsigned logical; /* logical usage for this field */ + unsigned application; /* application usage for this field */ + struct hid_usage *usage; /* usage table for this function */ + unsigned maxusage; /* maximum usage index */ + unsigned flags; /* main-item flags (i.e. volatile,array,constant) */ + unsigned report_offset; /* bit offset in the report */ + unsigned report_size; /* size of this field in the report */ + unsigned report_count; /* number of this field in the report */ + unsigned report_type; /* (input,output,feature) */ + __s32 *value; /* last known value(s) */ + __s32 logical_minimum; + __s32 logical_maximum; + __s32 physical_minimum; + __s32 physical_maximum; + __s32 unit_exponent; + unsigned unit; + struct hid_report *report; /* associated report */ + unsigned index; /* index into report->field[] */ + /* hidinput data */ + struct hid_input *hidinput; /* associated input structure */ + __u16 dpad; /* dpad input code */ +}; + +#define HID_MAX_FIELDS 64 + +struct hid_report { + struct list_head list; + unsigned id; /* id of this report */ + unsigned type; /* report type */ + struct hid_field *field[HID_MAX_FIELDS]; /* fields of the report */ + unsigned maxfield; /* maximum valid field index */ + unsigned size; /* size of the report (bits) */ + struct hid_device *device; /* associated device */ +}; + +struct hid_report_enum { + unsigned numbered; + struct list_head report_list; + struct hid_report *report_id_hash[256]; +}; + +#define HID_REPORT_TYPES 3 + +#define HID_MIN_BUFFER_SIZE 64 /* make sure there is at least a packet size of space */ +#define HID_MAX_BUFFER_SIZE 4096 /* 4kb */ +#define HID_CONTROL_FIFO_SIZE 256 /* to init devices with >100 reports */ +#define HID_OUTPUT_FIFO_SIZE 64 + +struct hid_control_fifo { + unsigned char dir; + struct hid_report *report; +}; + +#define HID_CLAIMED_INPUT 1 +#define HID_CLAIMED_HIDDEV 2 + +#define HID_CTRL_RUNNING 1 +#define HID_OUT_RUNNING 2 +#define HID_IN_RUNNING 3 +#define HID_RESET_PENDING 4 +#define HID_SUSPENDED 5 +#define HID_CLEAR_HALT 6 + +struct hid_input { + struct list_head list; + struct hid_report *report; + struct input_dev *input; +}; + +struct hid_device { /* device report descriptor */ + __u8 *rdesc; + unsigned rsize; + struct hid_collection *collection; /* List of HID collections */ + unsigned collection_size; /* Number of allocated hid_collections */ + unsigned maxcollection; /* Number of parsed collections */ + unsigned maxapplication; /* Number of applications */ + unsigned short bus; /* BUS ID */ + unsigned short vendor; /* Vendor ID */ + unsigned short product; /* Product ID */ + unsigned version; /* HID version */ + unsigned country; /* HID country */ + struct hid_report_enum report_enum[HID_REPORT_TYPES]; + + struct device *dev; /* device */ + + unsigned claimed; /* Claimed by hidinput, hiddev? */ + unsigned quirks; /* Various quirks the device can pull on us */ + + struct list_head inputs; /* The list of inputs */ + void *hiddev; /* The hiddev structure */ + int minor; /* Hiddev minor number */ + + wait_queue_head_t wait; /* For sleeping */ + + int open; /* is the device open by anyone? */ + char name[128]; /* Device name */ + char phys[64]; /* Device physical location */ + char uniq[64]; /* Device unique identifier (serial #) */ + + void *driver_data; + + /* device-specific function pointers */ + int (*hidinput_input_event) (struct input_dev *, unsigned int, unsigned int, int); + int (*hidinput_open) (struct input_dev *); + void (*hidinput_close) (struct input_dev *); + + /* hiddev event handler */ + void (*hiddev_hid_event) (struct hid_device *, struct hid_field *field, + struct hid_usage *, __s32); + void (*hiddev_report_event) (struct hid_device *, struct hid_report *); +#ifdef CONFIG_USB_HIDINPUT_POWERBOOK + unsigned int pb_fnmode; + unsigned long pb_pressed_fn[NBITS(KEY_MAX)]; + unsigned long pb_pressed_numlock[NBITS(KEY_MAX)]; +#endif +}; + +#define HID_GLOBAL_STACK_SIZE 4 +#define HID_COLLECTION_STACK_SIZE 4 + +struct hid_parser { + struct hid_global global; + struct hid_global global_stack[HID_GLOBAL_STACK_SIZE]; + unsigned global_stack_ptr; + struct hid_local local; + unsigned collection_stack[HID_COLLECTION_STACK_SIZE]; + unsigned collection_stack_ptr; + struct hid_device *device; +}; + +struct hid_class_descriptor { + __u8 bDescriptorType; + __u16 wDescriptorLength; +} __attribute__ ((packed)); + +struct hid_descriptor { + __u8 bLength; + __u8 bDescriptorType; + __u16 bcdHID; + __u8 bCountryCode; + __u8 bNumDescriptors; + + struct hid_class_descriptor desc[1]; +} __attribute__ ((packed)); + +#ifdef DEBUG +#include "hid-debug.h" +#else +#define hid_dump_input(a,b) do { } while (0) +#define hid_dump_device(c) do { } while (0) +#define hid_dump_field(a,b) do { } while (0) +#define resolv_usage(a) do { } while (0) +#define resolv_event(a,b) do { } while (0) +#endif + +/* Applications from HID Usage Tables 4/8/99 Version 1.1 */ +/* We ignore a few input applications that are not widely used */ +#define IS_INPUT_APPLICATION(a) (((a >= 0x00010000) && (a <= 0x00010008)) || (a == 0x00010080) || (a == 0x000c0001)) + +/* HID core API */ +extern void hidinput_hid_event(struct hid_device *, struct hid_field *, struct hid_usage *, __s32); +extern void hidinput_report_event(struct hid_device *hid, struct hid_report *report); +extern int hidinput_connect(struct hid_device *); +extern void hidinput_disconnect(struct hid_device *); + +int hid_set_field(struct hid_field *, unsigned, __s32); +int hid_input_report(struct hid_device *, int type, u8 *, int, int); +int hidinput_find_field(struct hid_device *hid, unsigned int type, unsigned int code, struct hid_field **field); +void hid_input_field(struct hid_device *hid, struct hid_field *field, __u8 *data, int interrupt); +void hid_output_report(struct hid_report *report, __u8 *data); +void hid_free_device(struct hid_device *device); +struct hid_device *hid_parse_report(__u8 *start, unsigned size); + +#ifdef CONFIG_HID_FF +int hid_ff_init(struct hid_device *hid); + +int hid_lgff_init(struct hid_device *hid); +int hid_tmff_init(struct hid_device *hid); +int hid_zpff_init(struct hid_device *hid); +#ifdef CONFIG_HID_PID +int hid_pidff_init(struct hid_device *hid); +#else +static inline int hid_pidff_init(struct hid_device *hid) { return -ENODEV; } +#endif + +#else +static inline int hid_ff_init(struct hid_device *hid) { return -1; } +#endif +#ifdef DEBUG +#define dbg(format, arg...) printk(KERN_DEBUG "%s: " format "\n" , \ + __FILE__ , ## arg) +#else +#define dbg(format, arg...) do {} while (0) +#endif + +#define err(format, arg...) printk(KERN_ERR "%s: " format "\n" , \ + __FILE__ , ## arg) +#endif + diff --git a/include/linux/highmem.h b/include/linux/highmem.h index fd7d12daa94..645d440807c 100644 --- a/include/linux/highmem.h +++ b/include/linux/highmem.h @@ -3,11 +3,12 @@ #include <linux/fs.h> #include <linux/mm.h> +#include <linux/uaccess.h> #include <asm/cacheflush.h> #ifndef ARCH_HAS_FLUSH_ANON_PAGE -static inline void flush_anon_page(struct page *page, unsigned long vmaddr) +static inline void flush_anon_page(struct vm_area_struct *vma, struct page *page, unsigned long vmaddr) { } #endif @@ -41,9 +42,10 @@ static inline void *kmap(struct page *page) #define kunmap(page) do { (void) (page); } while (0) -#define kmap_atomic(page, idx) page_address(page) -#define kunmap_atomic(addr, idx) do { } while (0) -#define kmap_atomic_pfn(pfn, idx) page_address(pfn_to_page(pfn)) +#define kmap_atomic(page, idx) \ + ({ pagefault_disable(); page_address(page); }) +#define kunmap_atomic(addr, idx) do { pagefault_enable(); } while (0) +#define kmap_atomic_pfn(pfn, idx) kmap_atomic(pfn_to_page(pfn), (idx)) #define kmap_atomic_to_page(ptr) virt_to_page(ptr) #endif @@ -94,7 +96,10 @@ static inline void memclear_highpage_flush(struct page *page, unsigned int offse kunmap_atomic(kaddr, KM_USER0); } -static inline void copy_user_highpage(struct page *to, struct page *from, unsigned long vaddr) +#ifndef __HAVE_ARCH_COPY_USER_HIGHPAGE + +static inline void copy_user_highpage(struct page *to, struct page *from, + unsigned long vaddr, struct vm_area_struct *vma) { char *vfrom, *vto; @@ -107,6 +112,8 @@ static inline void copy_user_highpage(struct page *to, struct page *from, unsign smp_wmb(); } +#endif + static inline void copy_highpage(struct page *to, struct page *from) { char *vfrom, *vto; diff --git a/include/linux/hugetlb.h b/include/linux/hugetlb.h index ace64e57e17..a60995afe33 100644 --- a/include/linux/hugetlb.h +++ b/include/linux/hugetlb.h @@ -35,6 +35,7 @@ extern int sysctl_hugetlb_shm_group; pte_t *huge_pte_alloc(struct mm_struct *mm, unsigned long addr); pte_t *huge_pte_offset(struct mm_struct *mm, unsigned long addr); +int huge_pmd_unshare(struct mm_struct *mm, unsigned long *addr, pte_t *ptep); struct page *follow_huge_addr(struct mm_struct *mm, unsigned long address, int write); struct page *follow_huge_pmd(struct mm_struct *mm, unsigned long address, diff --git a/include/linux/i2c-algo-bit.h b/include/linux/i2c-algo-bit.h index c8f8df25c7e..937da70cb4c 100644 --- a/include/linux/i2c-algo-bit.h +++ b/include/linux/i2c-algo-bit.h @@ -26,9 +26,9 @@ /* --- Defines for bit-adapters --------------------------------------- */ /* - * This struct contains the hw-dependent functions of bit-style adapters to + * This struct contains the hw-dependent functions of bit-style adapters to * manipulate the line states, and to init any hw-specific features. This is - * only used if you have more than one hw-type of adapter running. + * only used if you have more than one hw-type of adapter running. */ struct i2c_algo_bit_data { void *data; /* private data for lowlevel routines */ @@ -44,6 +44,5 @@ struct i2c_algo_bit_data { }; int i2c_bit_add_bus(struct i2c_adapter *); -int i2c_bit_del_bus(struct i2c_adapter *); #endif /* _LINUX_I2C_ALGO_BIT_H */ diff --git a/include/linux/i2c-algo-ite.h b/include/linux/i2c-algo-ite.h deleted file mode 100644 index 0073fe96c76..00000000000 --- a/include/linux/i2c-algo-ite.h +++ /dev/null @@ -1,72 +0,0 @@ -/* ------------------------------------------------------------------------- */ -/* i2c-algo-ite.h i2c driver algorithms for ITE IIC adapters */ -/* ------------------------------------------------------------------------- */ -/* Copyright (C) 1995-97 Simon G. Vogl - 1998-99 Hans Berglund - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ -/* ------------------------------------------------------------------------- */ - -/* With some changes from Kyösti Mälkki <kmalkki@cc.hut.fi> and even - Frodo Looijaard <frodol@dds.nl> */ - -/* Modifications by MontaVista Software, 2001 - Changes made to support the ITE IIC peripheral */ - - -#ifndef I2C_ALGO_ITE_H -#define I2C_ALGO_ITE_H 1 - -#include <linux/types.h> - -/* Example of a sequential read request: - struct i2c_iic_msg s_msg; - - s_msg.addr=device_address; - s_msg.len=length; - s_msg.buf=buffer; - s_msg.waddr=word_address; - ioctl(file,I2C_SREAD, &s_msg); - */ -#define I2C_SREAD 0x780 /* SREAD ioctl command */ - -struct i2c_iic_msg { - __u16 addr; /* device address */ - __u16 waddr; /* word address */ - short len; /* msg length */ - char *buf; /* pointer to msg data */ -}; - -#ifdef __KERNEL__ -struct i2c_adapter; - -struct i2c_algo_iic_data { - void *data; /* private data for lolevel routines */ - void (*setiic) (void *data, int ctl, int val); - int (*getiic) (void *data, int ctl); - int (*getown) (void *data); - int (*getclock) (void *data); - void (*waitforpin) (void); - - /* local settings */ - int udelay; - int mdelay; - int timeout; -}; - -int i2c_iic_add_bus(struct i2c_adapter *); -int i2c_iic_del_bus(struct i2c_adapter *); -#endif /* __KERNEL__ */ -#endif /* I2C_ALGO_ITE_H */ diff --git a/include/linux/i2c-algo-pca.h b/include/linux/i2c-algo-pca.h index 226693e0d88..fce47c051bb 100644 --- a/include/linux/i2c-algo-pca.h +++ b/include/linux/i2c-algo-pca.h @@ -10,6 +10,5 @@ struct i2c_algo_pca_data { }; int i2c_pca_add_bus(struct i2c_adapter *); -int i2c_pca_del_bus(struct i2c_adapter *); #endif /* _LINUX_I2C_ALGO_PCA_H */ diff --git a/include/linux/i2c-algo-pcf.h b/include/linux/i2c-algo-pcf.h index 9908f3fc483..994eb86f882 100644 --- a/include/linux/i2c-algo-pcf.h +++ b/include/linux/i2c-algo-pcf.h @@ -31,7 +31,7 @@ struct i2c_algo_pcf_data { int (*getpcf) (void *data, int ctl); int (*getown) (void *data); int (*getclock) (void *data); - void (*waitforpin) (void); + void (*waitforpin) (void); /* local settings */ int udelay; @@ -39,6 +39,5 @@ struct i2c_algo_pcf_data { }; int i2c_pcf_add_bus(struct i2c_adapter *); -int i2c_pcf_del_bus(struct i2c_adapter *); #endif /* _LINUX_I2C_ALGO_PCF_H */ diff --git a/include/linux/i2c-algo-sgi.h b/include/linux/i2c-algo-sgi.h index 4a0113d6406..3b7715024e6 100644 --- a/include/linux/i2c-algo-sgi.h +++ b/include/linux/i2c-algo-sgi.h @@ -22,6 +22,5 @@ struct i2c_algo_sgi_data { }; int i2c_sgi_add_bus(struct i2c_adapter *); -int i2c_sgi_del_bus(struct i2c_adapter *); #endif /* I2C_ALGO_SGI_H */ diff --git a/include/linux/i2c-id.h b/include/linux/i2c-id.h index 0a8f750cbed..d38778f2fbe 100644 --- a/include/linux/i2c-id.h +++ b/include/linux/i2c-id.h @@ -1,7 +1,7 @@ /* ------------------------------------------------------------------------- */ -/* */ +/* */ /* i2c-id.h - identifier values for i2c drivers and adapters */ -/* */ +/* */ /* ------------------------------------------------------------------------- */ /* Copyright (C) 1995-1999 Simon G. Vogl @@ -40,10 +40,10 @@ #define I2C_DRIVERID_SAA7120 11 /* video encoder */ #define I2C_DRIVERID_SAA7121 12 /* video encoder */ #define I2C_DRIVERID_SAA7185B 13 /* video encoder */ -#define I2C_DRIVERID_CH7003 14 /* digital pc to tv encoder */ +#define I2C_DRIVERID_CH7003 14 /* digital pc to tv encoder */ #define I2C_DRIVERID_PCF8574A 15 /* i2c expander - 8 bit in/out */ #define I2C_DRIVERID_PCF8582C 16 /* eeprom */ -#define I2C_DRIVERID_AT24Cxx 17 /* eeprom 1/2/4/8/16 K */ +#define I2C_DRIVERID_AT24Cxx 17 /* eeprom 1/2/4/8/16 K */ #define I2C_DRIVERID_TEA6300 18 /* audio mixer */ #define I2C_DRIVERID_BT829 19 /* pc to tv encoder */ #define I2C_DRIVERID_TDA9850 20 /* audio mixer */ @@ -82,9 +82,8 @@ #define I2C_DRIVERID_STM41T00 52 /* real time clock */ #define I2C_DRIVERID_UDA1342 53 /* UDA1342 audio codec */ #define I2C_DRIVERID_ADV7170 54 /* video encoder */ -#define I2C_DRIVERID_RADEON 55 /* I2C bus on Radeon boards */ #define I2C_DRIVERID_MAX1617 56 /* temp sensor */ -#define I2C_DRIVERID_SAA7191 57 /* video encoder */ +#define I2C_DRIVERID_SAA7191 57 /* video decoder */ #define I2C_DRIVERID_INDYCAM 58 /* SGI IndyCam */ #define I2C_DRIVERID_BT832 59 /* CMOS camera video processor */ #define I2C_DRIVERID_TDA9887 60 /* TDA988x IF-PLL demodulator */ @@ -132,7 +131,6 @@ #define I2C_DRIVERID_ADM1021 1008 #define I2C_DRIVERID_ADM9240 1009 #define I2C_DRIVERID_LTC1710 1010 -#define I2C_DRIVERID_ICSPLL 1012 #define I2C_DRIVERID_BT869 1013 #define I2C_DRIVERID_MAXILIFE 1014 #define I2C_DRIVERID_MATORB 1015 @@ -144,7 +142,6 @@ #define I2C_DRIVERID_MTP008 1023 #define I2C_DRIVERID_DS1621 1024 #define I2C_DRIVERID_ADM1024 1025 -#define I2C_DRIVERID_IT87 1026 #define I2C_DRIVERID_CH700X 1027 /* single driver for CH7003-7009 digital pc to tv encoders */ #define I2C_DRIVERID_FSCPOS 1028 #define I2C_DRIVERID_FSCSCY 1029 @@ -159,12 +156,13 @@ #define I2C_DRIVERID_ASB100 1043 #define I2C_DRIVERID_FSCHER 1046 #define I2C_DRIVERID_W83L785TS 1047 +#define I2C_DRIVERID_OV7670 1048 /* Omnivision 7670 camera */ /* * ---- Adapter types ---------------------------------------------------- */ -/* --- Bit algorithm adapters */ +/* --- Bit algorithm adapters */ #define I2C_HW_B_LP 0x010000 /* Parallel port Philips style */ #define I2C_HW_B_SER 0x010002 /* Serial line interface */ #define I2C_HW_B_BT848 0x010005 /* BT848 video boards */ @@ -212,9 +210,6 @@ /* --- MPC8xx PowerPC adapters */ #define I2C_HW_MPC8XX_EPON 0x110000 /* Eponymous MPC8xx I2C adapter */ -/* --- ITE based algorithms */ -#define I2C_HW_I_IIC 0x080000 /* controller on the ITE */ - /* --- PowerPC on-chip adapters */ #define I2C_HW_OCP 0x120000 /* IBM on-chip I2C adapter */ @@ -250,6 +245,7 @@ #define I2C_HW_SMBUS_OV518 0x04000f /* OV518(+) USB 1.1 webcam ICs */ #define I2C_HW_SMBUS_OV519 0x040010 /* OV519 USB 1.1 webcam IC */ #define I2C_HW_SMBUS_OVFX2 0x040011 /* Cypress/OmniVision FX2 webcam */ +#define I2C_HW_SMBUS_CAFE 0x040012 /* Marvell 88ALP01 "CAFE" cam */ /* --- ISA pseudo-adapter */ #define I2C_HW_ISA 0x050000 diff --git a/include/linux/i2c-pnx.h b/include/linux/i2c-pnx.h new file mode 100644 index 00000000000..e6e9c814da6 --- /dev/null +++ b/include/linux/i2c-pnx.h @@ -0,0 +1,43 @@ +/* + * Header file for I2C support on PNX010x/4008. + * + * Author: Dennis Kovalev <dkovalev@ru.mvista.com> + * + * 2004-2006 (c) MontaVista Software, Inc. This file is licensed under + * the terms of the GNU General Public License version 2. This program + * is licensed "as is" without any warranty of any kind, whether express + * or implied. + */ + +#ifndef __I2C_PNX_H__ +#define __I2C_PNX_H__ + +#include <asm/arch/i2c.h> + +struct i2c_pnx_mif { + int ret; /* Return value */ + int mode; /* Interface mode */ + struct completion complete; /* I/O completion */ + struct timer_list timer; /* Timeout */ + char * buf; /* Data buffer */ + int len; /* Length of data buffer */ +}; + +struct i2c_pnx_algo_data { + u32 base; + u32 ioaddr; + int irq; + struct i2c_pnx_mif mif; + int last; +}; + +struct i2c_pnx_data { + int (*suspend) (struct platform_device *pdev, pm_message_t state); + int (*resume) (struct platform_device *pdev); + u32 (*calculate_input_freq) (struct platform_device *pdev); + int (*set_clock_run) (struct platform_device *pdev); + int (*set_clock_stop) (struct platform_device *pdev); + struct i2c_adapter *adapter; +}; + +#endif /* __I2C_PNX_H__ */ diff --git a/include/linux/i2c-pxa.h b/include/linux/i2c-pxa.h index 5f3eaf80222..41dcdfe7f62 100644 --- a/include/linux/i2c-pxa.h +++ b/include/linux/i2c-pxa.h @@ -1,29 +1,6 @@ #ifndef _LINUX_I2C_ALGO_PXA_H #define _LINUX_I2C_ALGO_PXA_H -struct i2c_eeprom_emu_watcher { - void (*write)(void *, unsigned int addr, unsigned char newval); -}; - -struct i2c_eeprom_emu_watch { - struct list_head node; - unsigned int start; - unsigned int end; - struct i2c_eeprom_emu_watcher *ops; - void *data; -}; - -#define I2C_EEPROM_EMU_SIZE (256) - -struct i2c_eeprom_emu { - unsigned int size; - unsigned int ptr; - unsigned int seen_start; - struct list_head watch; - - unsigned char bytes[I2C_EEPROM_EMU_SIZE]; -}; - typedef enum i2c_slave_event_e { I2C_SLAVE_EVENT_START_READ, I2C_SLAVE_EVENT_START_WRITE, @@ -37,12 +14,4 @@ struct i2c_slave_client { void (*write)(void *ptr, unsigned int val); }; -extern int i2c_eeprom_emu_addwatcher(struct i2c_eeprom_emu *, void *data, - unsigned int addr, unsigned int size, - struct i2c_eeprom_emu_watcher *); - -extern void i2c_eeprom_emu_delwatcher(struct i2c_eeprom_emu *, void *data, struct i2c_eeprom_emu_watcher *watcher); - -extern struct i2c_eeprom_emu *i2c_pxa_get_eeprom(void); - #endif /* _LINUX_I2C_ALGO_PXA_H */ diff --git a/include/linux/i2c.h b/include/linux/i2c.h index 9b5d04768c2..71e50d3e492 100644 --- a/include/linux/i2c.h +++ b/include/linux/i2c.h @@ -1,7 +1,7 @@ /* ------------------------------------------------------------------------- */ -/* */ +/* */ /* i2c.h - definitions for the i2c-bus interface */ -/* */ +/* */ /* ------------------------------------------------------------------------- */ /* Copyright (C) 1995-2000 Simon G. Vogl @@ -27,7 +27,7 @@ #define _LINUX_I2C_H #include <linux/types.h> -#ifdef __KERNEL__ +#ifdef __KERNEL__ #include <linux/module.h> #include <linux/i2c-id.h> #include <linux/mod_devicetable.h> @@ -53,8 +53,8 @@ union i2c_smbus_data; /* * The master routines are the ones normally used to transmit data to devices - * on a bus (or read from them). Apart from two basic transfer functions to - * transmit one message at a time, a more complex version can be used to + * on a bus (or read from them). Apart from two basic transfer functions to + * transmit one message at a time, a more complex version can be used to * transmit an arbitrary number of messages without interruption. */ extern int i2c_master_send(struct i2c_client *,const char* ,int); @@ -67,10 +67,10 @@ extern int i2c_transfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num) /* This is the very generalized SMBus access routine. You probably do not want to use this, though; one of the functions below may be much easier, - and probably just as fast. + and probably just as fast. Note that we use i2c_adapter here, because you do not need a specific smbus adapter to call this function. */ -extern s32 i2c_smbus_xfer (struct i2c_adapter * adapter, u16 addr, +extern s32 i2c_smbus_xfer (struct i2c_adapter * adapter, u16 addr, unsigned short flags, char read_write, u8 command, int size, union i2c_smbus_data * data); @@ -112,14 +112,14 @@ struct i2c_driver { /* Notifies the driver that a new bus has appeared. This routine * can be used by the driver to test if the bus meets its conditions - * & seek for the presence of the chip(s) it supports. If found, it + * & seek for the presence of the chip(s) it supports. If found, it * registers the client(s) that are on the bus to the i2c admin. via * i2c_attach_client. */ int (*attach_adapter)(struct i2c_adapter *); int (*detach_adapter)(struct i2c_adapter *); - /* tells the driver that a client is about to be deleted & gives it + /* tells the driver that a client is about to be deleted & gives it * the chance to remove its private data. Also, if the client struct * has been dynamically allocated by the driver in the function above, * it must be freed here. @@ -139,13 +139,13 @@ struct i2c_driver { #define I2C_NAME_SIZE 50 /* - * i2c_client identifies a single device (i.e. chip) that is connected to an + * i2c_client identifies a single device (i.e. chip) that is connected to an * i2c bus. The behaviour is defined by the routines of the driver. This * function is mainly used for lookup & other admin. functions. */ struct i2c_client { unsigned int flags; /* div., see below */ - unsigned short addr; /* chip address - NOTE: 7bit */ + unsigned short addr; /* chip address - NOTE: 7bit */ /* addresses are stored in the */ /* _LOWER_ 7 bits */ struct i2c_adapter *adapter; /* the adapter we sit on */ @@ -182,14 +182,14 @@ static inline void i2c_set_clientdata (struct i2c_client *dev, void *data) */ struct i2c_algorithm { /* If an adapter algorithm can't do I2C-level access, set master_xfer - to NULL. If an adapter algorithm can do SMBus access, set + to NULL. If an adapter algorithm can do SMBus access, set smbus_xfer. If set to NULL, the SMBus protocol is simulated using common I2C messages */ /* master_xfer should return the number of messages successfully processed, or a negative value on error */ - int (*master_xfer)(struct i2c_adapter *adap,struct i2c_msg *msgs, + int (*master_xfer)(struct i2c_adapter *adap,struct i2c_msg *msgs, int num); - int (*smbus_xfer) (struct i2c_adapter *adap, u16 addr, + int (*smbus_xfer) (struct i2c_adapter *adap, u16 addr, unsigned short flags, char read_write, u8 command, int size, union i2c_smbus_data * data); @@ -216,6 +216,7 @@ struct i2c_adapter { int (*client_unregister)(struct i2c_client *); /* data fields that are valid for all devices */ + u8 level; /* nesting level for lockdep */ struct mutex bus_lock; struct mutex clist_lock; @@ -316,7 +317,7 @@ extern int i2c_check_addr (struct i2c_adapter *adapter, int addr); * It will only call found_proc if some client is connected at the * specific address (unless a 'force' matched); */ -extern int i2c_probe(struct i2c_adapter *adapter, +extern int i2c_probe(struct i2c_adapter *adapter, struct i2c_client_address_data *address_data, int (*found_proc) (struct i2c_adapter *, int, int)); @@ -352,15 +353,15 @@ static inline int i2c_adapter_id(struct i2c_adapter *adap) */ struct i2c_msg { __u16 addr; /* slave address */ - __u16 flags; + __u16 flags; #define I2C_M_TEN 0x10 /* we have a ten bit chip address */ #define I2C_M_RD 0x01 #define I2C_M_NOSTART 0x4000 #define I2C_M_REV_DIR_ADDR 0x2000 #define I2C_M_IGNORE_NAK 0x1000 #define I2C_M_NO_RD_ACK 0x0800 - __u16 len; /* msg length */ - __u8 *buf; /* pointer to msg data */ + __u16 len; /* msg length */ + __u8 *buf; /* pointer to msg data */ }; /* To determine what functionality is present */ @@ -370,16 +371,16 @@ struct i2c_msg { #define I2C_FUNC_PROTOCOL_MANGLING 0x00000004 /* I2C_M_{REV_DIR_ADDR,NOSTART,..} */ #define I2C_FUNC_SMBUS_HWPEC_CALC 0x00000008 /* SMBus 2.0 */ #define I2C_FUNC_SMBUS_BLOCK_PROC_CALL 0x00008000 /* SMBus 2.0 */ -#define I2C_FUNC_SMBUS_QUICK 0x00010000 -#define I2C_FUNC_SMBUS_READ_BYTE 0x00020000 -#define I2C_FUNC_SMBUS_WRITE_BYTE 0x00040000 -#define I2C_FUNC_SMBUS_READ_BYTE_DATA 0x00080000 -#define I2C_FUNC_SMBUS_WRITE_BYTE_DATA 0x00100000 -#define I2C_FUNC_SMBUS_READ_WORD_DATA 0x00200000 -#define I2C_FUNC_SMBUS_WRITE_WORD_DATA 0x00400000 -#define I2C_FUNC_SMBUS_PROC_CALL 0x00800000 -#define I2C_FUNC_SMBUS_READ_BLOCK_DATA 0x01000000 -#define I2C_FUNC_SMBUS_WRITE_BLOCK_DATA 0x02000000 +#define I2C_FUNC_SMBUS_QUICK 0x00010000 +#define I2C_FUNC_SMBUS_READ_BYTE 0x00020000 +#define I2C_FUNC_SMBUS_WRITE_BYTE 0x00040000 +#define I2C_FUNC_SMBUS_READ_BYTE_DATA 0x00080000 +#define I2C_FUNC_SMBUS_WRITE_BYTE_DATA 0x00100000 +#define I2C_FUNC_SMBUS_READ_WORD_DATA 0x00200000 +#define I2C_FUNC_SMBUS_WRITE_WORD_DATA 0x00400000 +#define I2C_FUNC_SMBUS_PROC_CALL 0x00800000 +#define I2C_FUNC_SMBUS_READ_BLOCK_DATA 0x01000000 +#define I2C_FUNC_SMBUS_WRITE_BLOCK_DATA 0x02000000 #define I2C_FUNC_SMBUS_READ_I2C_BLOCK 0x04000000 /* I2C-like block xfer */ #define I2C_FUNC_SMBUS_WRITE_I2C_BLOCK 0x08000000 /* w/ 1-byte reg. addr. */ #define I2C_FUNC_SMBUS_READ_I2C_BLOCK_2 0x10000000 /* I2C-like block xfer */ @@ -406,10 +407,10 @@ struct i2c_msg { I2C_FUNC_SMBUS_WRITE_BLOCK_DATA | \ I2C_FUNC_SMBUS_I2C_BLOCK) -/* - * Data for SMBus Messages +/* + * Data for SMBus Messages */ -#define I2C_SMBUS_BLOCK_MAX 32 /* As specified in SMBus standard */ +#define I2C_SMBUS_BLOCK_MAX 32 /* As specified in SMBus standard */ union i2c_smbus_data { __u8 byte; __u16 word; @@ -421,11 +422,11 @@ union i2c_smbus_data { #define I2C_SMBUS_READ 1 #define I2C_SMBUS_WRITE 0 -/* SMBus transaction types (size parameter in the above functions) +/* SMBus transaction types (size parameter in the above functions) Note: these no longer correspond to the (arbitrary) PIIX4 internal codes! */ #define I2C_SMBUS_QUICK 0 #define I2C_SMBUS_BYTE 1 -#define I2C_SMBUS_BYTE_DATA 2 +#define I2C_SMBUS_BYTE_DATA 2 #define I2C_SMBUS_WORD_DATA 3 #define I2C_SMBUS_PROC_CALL 4 #define I2C_SMBUS_BLOCK_DATA 5 @@ -434,15 +435,15 @@ union i2c_smbus_data { /* ----- commands for the ioctl like i2c_command call: - * note that additional calls are defined in the algorithm and hw - * dependent layers - these can be listed here, or see the + * note that additional calls are defined in the algorithm and hw + * dependent layers - these can be listed here, or see the * corresponding header files. */ /* -> bit-adapter specific ioctls */ #define I2C_RETRIES 0x0701 /* number of times a device address */ /* should be polled when not */ - /* acknowledging */ -#define I2C_TIMEOUT 0x0702 /* set timeout - call with int */ + /* acknowledging */ +#define I2C_TIMEOUT 0x0702 /* set timeout - call with int */ /* this is for i2c-dev.c */ diff --git a/include/linux/i2o.h b/include/linux/i2o.h index c115e9e840b..52f53e2e70c 100644 --- a/include/linux/i2o.h +++ b/include/linux/i2o.h @@ -461,7 +461,7 @@ struct i2o_driver { int (*reply) (struct i2o_controller *, u32, struct i2o_message *); /* Event handler */ - void (*event) (struct i2o_event *); + work_func_t event; struct workqueue_struct *event_queue; /* Event queue */ @@ -490,7 +490,7 @@ struct i2o_dma { */ struct i2o_pool { char *name; - kmem_cache_t *slab; + struct kmem_cache *slab; mempool_t *mempool; }; @@ -986,7 +986,8 @@ extern void i2o_driver_unregister(struct i2o_driver *); /** * i2o_driver_notify_controller_add - Send notification of added controller - * to a single I2O driver + * @drv: I2O driver + * @c: I2O controller * * Send notification of added controller to a single registered driver. */ @@ -998,8 +999,9 @@ static inline void i2o_driver_notify_controller_add(struct i2o_driver *drv, }; /** - * i2o_driver_notify_controller_remove - Send notification of removed - * controller to a single I2O driver + * i2o_driver_notify_controller_remove - Send notification of removed controller + * @drv: I2O driver + * @c: I2O controller * * Send notification of removed controller to a single registered driver. */ @@ -1011,8 +1013,9 @@ static inline void i2o_driver_notify_controller_remove(struct i2o_driver *drv, }; /** - * i2o_driver_notify_device_add - Send notification of added device to a - * single I2O driver + * i2o_driver_notify_device_add - Send notification of added device + * @drv: I2O driver + * @i2o_dev: the added i2o_device * * Send notification of added device to a single registered driver. */ @@ -1025,7 +1028,8 @@ static inline void i2o_driver_notify_device_add(struct i2o_driver *drv, /** * i2o_driver_notify_device_remove - Send notification of removed device - * to a single I2O driver + * @drv: I2O driver + * @i2o_dev: the added i2o_device * * Send notification of removed device to a single registered driver. */ @@ -1148,7 +1152,7 @@ static inline void i2o_msg_post(struct i2o_controller *c, /** * i2o_msg_post_wait - Post and wait a message and wait until return * @c: controller - * @m: message to post + * @msg: message to post * @timeout: time in seconds to wait * * This API allows an OSM to post a message and then be told whether or diff --git a/include/linux/icmp.h b/include/linux/icmp.h index 878cfe4e587..24da4fbc1a2 100644 --- a/include/linux/icmp.h +++ b/include/linux/icmp.h @@ -68,7 +68,7 @@ struct icmphdr { __u8 type; __u8 code; - __be16 checksum; + __sum16 checksum; union { struct { __be16 id; diff --git a/include/linux/icmpv6.h b/include/linux/icmpv6.h index c771a7db987..68d3526c3a0 100644 --- a/include/linux/icmpv6.h +++ b/include/linux/icmpv6.h @@ -7,17 +7,17 @@ struct icmp6hdr { __u8 icmp6_type; __u8 icmp6_code; - __u16 icmp6_cksum; + __sum16 icmp6_cksum; union { - __u32 un_data32[1]; - __u16 un_data16[2]; + __be32 un_data32[1]; + __be16 un_data16[2]; __u8 un_data8[4]; struct icmpv6_echo { - __u16 identifier; - __u16 sequence; + __be16 identifier; + __be16 sequence; } u_echo; struct icmpv6_nd_advt { @@ -53,7 +53,7 @@ struct icmp6hdr { #else #error "Please fix <asm/byteorder.h>" #endif - __u16 rt_lifetime; + __be16 rt_lifetime; } u_nd_ra; } icmp6_dataun; diff --git a/include/linux/ide.h b/include/linux/ide.h index 9c2050293f1..e26a03981a9 100644 --- a/include/linux/ide.h +++ b/include/linux/ide.h @@ -796,6 +796,7 @@ typedef struct hwif_s { unsigned sg_mapped : 1; /* sg_table and sg_nents are ready */ unsigned no_io_32bit : 1; /* 1 = can not do 32-bit IO ops */ unsigned err_stops_fifo : 1; /* 1=data FIFO is cleared by an error */ + unsigned atapi_irq_bogon : 1; /* Generates spurious DMA interrupts in PIO mode */ struct device gendev; struct completion gendev_rel_comp; /* To deal with device release() */ @@ -803,8 +804,6 @@ typedef struct hwif_s { void *hwif_data; /* extra hwif data */ unsigned dma; - - void (*led_act)(void *data, int rw); } ____cacheline_internodealigned_in_smp ide_hwif_t; /* diff --git a/include/linux/if_addr.h b/include/linux/if_addr.h index dbe8f6120a4..d557e4ce9b6 100644 --- a/include/linux/if_addr.h +++ b/include/linux/if_addr.h @@ -52,4 +52,10 @@ struct ifa_cacheinfo __u32 tstamp; /* updated timestamp, hundredths of seconds */ }; +/* backwards compatibility for userspace */ +#ifndef __KERNEL__ +#define IFA_RTA(r) ((struct rtattr*)(((char*)(r)) + NLMSG_ALIGN(sizeof(struct ifaddrmsg)))) +#define IFA_PAYLOAD(n) NLMSG_PAYLOAD(n,sizeof(struct ifaddrmsg)) +#endif + #endif diff --git a/include/linux/if_fddi.h b/include/linux/if_fddi.h index e0a15004620..4aba6b0ad41 100644 --- a/include/linux/if_fddi.h +++ b/include/linux/if_fddi.h @@ -103,6 +103,8 @@ struct fddihdr } __attribute__ ((packed)); #ifdef __KERNEL__ +#include <linux/netdevice.h> + /* Define FDDI statistics structure */ struct fddi_statistics { diff --git a/include/linux/if_link.h b/include/linux/if_link.h index e963a077e6f..35ed3b5467f 100644 --- a/include/linux/if_link.h +++ b/include/linux/if_link.h @@ -82,6 +82,12 @@ enum #define IFLA_MAX (__IFLA_MAX - 1) +/* backwards compatibility for userspace */ +#ifndef __KERNEL__ +#define IFLA_RTA(r) ((struct rtattr*)(((char*)(r)) + NLMSG_ALIGN(sizeof(struct ifinfomsg)))) +#define IFLA_PAYLOAD(n) NLMSG_PAYLOAD(n,sizeof(struct ifinfomsg)) +#endif + /* ifi_flags. IFF_* flags. diff --git a/include/linux/if_packet.h b/include/linux/if_packet.h index b92558549d2..99393ef3af3 100644 --- a/include/linux/if_packet.h +++ b/include/linux/if_packet.h @@ -1,17 +1,19 @@ #ifndef __LINUX_IF_PACKET_H #define __LINUX_IF_PACKET_H +#include <linux/types.h> + struct sockaddr_pkt { unsigned short spkt_family; unsigned char spkt_device[14]; - unsigned short spkt_protocol; + __be16 spkt_protocol; }; struct sockaddr_ll { unsigned short sll_family; - unsigned short sll_protocol; + __be16 sll_protocol; int sll_ifindex; unsigned short sll_hatype; unsigned char sll_pkttype; diff --git a/include/linux/if_tunnel.h b/include/linux/if_tunnel.h index bef9f8fd93b..8de079ba110 100644 --- a/include/linux/if_tunnel.h +++ b/include/linux/if_tunnel.h @@ -19,10 +19,10 @@ struct ip_tunnel_parm { char name[IFNAMSIZ]; int link; - __u16 i_flags; - __u16 o_flags; - __u32 i_key; - __u32 o_key; + __be16 i_flags; + __be16 o_flags; + __be32 i_key; + __be32 o_key; struct iphdr iph; }; diff --git a/include/linux/igmp.h b/include/linux/igmp.h index 21dd5690527..9dbb525c517 100644 --- a/include/linux/igmp.h +++ b/include/linux/igmp.h @@ -30,7 +30,7 @@ struct igmphdr { __u8 type; __u8 code; /* For newer IGMP */ - __be16 csum; + __sum16 csum; __be32 group; }; @@ -127,6 +127,7 @@ struct igmpv3_query { #ifdef __KERNEL__ #include <linux/skbuff.h> +#include <linux/timer.h> #include <linux/in.h> extern int sysctl_igmp_max_memberships; diff --git a/include/linux/in.h b/include/linux/in.h index 2619859f6e1..1912e7c0bc2 100644 --- a/include/linux/in.h +++ b/include/linux/in.h @@ -45,6 +45,7 @@ enum { IPPROTO_COMP = 108, /* Compression Header protocol */ IPPROTO_SCTP = 132, /* Stream Control Transport Protocol */ + IPPROTO_UDPLITE = 136, /* UDP-Lite (RFC 3828) */ IPPROTO_RAW = 255, /* Raw IP packets */ IPPROTO_MAX diff --git a/include/linux/in6.h b/include/linux/in6.h index f28621f638e..4e8350ae886 100644 --- a/include/linux/in6.h +++ b/include/linux/in6.h @@ -54,7 +54,7 @@ extern const struct in6_addr in6addr_loopback; struct sockaddr_in6 { unsigned short int sin6_family; /* AF_INET6 */ __be16 sin6_port; /* Transport layer port # */ - __u32 sin6_flowinfo; /* IPv6 flow information */ + __be32 sin6_flowinfo; /* IPv6 flow information */ struct in6_addr sin6_addr; /* IPv6 address */ __u32 sin6_scope_id; /* scope id (new in RFC2553) */ }; @@ -72,7 +72,7 @@ struct ipv6_mreq { struct in6_flowlabel_req { struct in6_addr flr_dst; - __u32 flr_label; + __be32 flr_label; __u8 flr_action; __u8 flr_share; __u16 flr_flags; diff --git a/include/linux/inet.h b/include/linux/inet.h index b7c6da7d6d3..675a7dbe86f 100644 --- a/include/linux/inet.h +++ b/include/linux/inet.h @@ -46,7 +46,7 @@ #include <linux/types.h> extern __be32 in_aton(const char *str); -extern int in4_pton(const char *src, int srclen, u8 *dst, char delim, const char **end); -extern int in6_pton(const char *src, int srclen, u8 *dst, char delim, const char **end); +extern int in4_pton(const char *src, int srclen, u8 *dst, int delim, const char **end); +extern int in6_pton(const char *src, int srclen, u8 *dst, int delim, const char **end); #endif #endif /* _LINUX_INET_H */ diff --git a/include/linux/inetdevice.h b/include/linux/inetdevice.h index 5a0ab04627b..c0f7aec331c 100644 --- a/include/linux/inetdevice.h +++ b/include/linux/inetdevice.h @@ -124,12 +124,13 @@ static __inline__ int inet_ifa_match(__be32 addr, struct in_ifaddr *ifa) * Check if a mask is acceptable. */ -static __inline__ int bad_mask(u32 mask, u32 addr) +static __inline__ int bad_mask(__be32 mask, __be32 addr) { + __u32 hmask; if (addr & (mask = ~mask)) return 1; - mask = ntohl(mask); - if (mask & (mask+1)) + hmask = ntohl(mask); + if (hmask & (hmask+1)) return 1; return 0; } @@ -190,11 +191,12 @@ static __inline__ __be32 inet_make_mask(int logmask) return 0; } -static __inline__ int inet_mask_len(__u32 mask) +static __inline__ int inet_mask_len(__be32 mask) { - if (!(mask = ntohl(mask))) + __u32 hmask = ntohl(mask); + if (!hmask) return 0; - return 32 - ffz(~mask); + return 32 - ffz(~hmask); } diff --git a/include/linux/init.h b/include/linux/init.h index 5eb5d24b768..5a593a1dec1 100644 --- a/include/linux/init.h +++ b/include/linux/init.h @@ -111,6 +111,7 @@ extern void setup_arch(char **); #define subsys_initcall_sync(fn) __define_initcall("4s",fn,4s) #define fs_initcall(fn) __define_initcall("5",fn,5) #define fs_initcall_sync(fn) __define_initcall("5s",fn,5s) +#define rootfs_initcall(fn) __define_initcall("rootfs",fn,rootfs) #define device_initcall(fn) __define_initcall("6",fn,6) #define device_initcall_sync(fn) __define_initcall("6s",fn,6s) #define late_initcall(fn) __define_initcall("7",fn,7) diff --git a/include/linux/init_task.h b/include/linux/init_task.h index 33c5daacc74..6383d2d83bb 100644 --- a/include/linux/init_task.h +++ b/include/linux/init_task.h @@ -7,16 +7,15 @@ #include <linux/utsname.h> #include <linux/lockdep.h> #include <linux/ipc.h> +#include <linux/pid_namespace.h> #define INIT_FDTABLE \ { \ .max_fds = NR_OPEN_DEFAULT, \ - .max_fdset = EMBEDDED_FD_SET_SIZE, \ .fd = &init_files.fd_array[0], \ .close_on_exec = (fd_set *)&init_files.close_on_exec_init, \ .open_fds = (fd_set *)&init_files.open_fds_init, \ .rcu = RCU_HEAD_INIT, \ - .free_files = NULL, \ .next = NULL, \ } @@ -57,25 +56,27 @@ .cpu_vm_mask = CPU_MASK_ALL, \ } -#define INIT_SIGNALS(sig) { \ - .count = ATOMIC_INIT(1), \ +#define INIT_SIGNALS(sig) { \ + .count = ATOMIC_INIT(1), \ .wait_chldexit = __WAIT_QUEUE_HEAD_INITIALIZER(sig.wait_chldexit),\ - .shared_pending = { \ + .shared_pending = { \ .list = LIST_HEAD_INIT(sig.shared_pending.list), \ - .signal = {{0}}}, \ + .signal = {{0}}}, \ .posix_timers = LIST_HEAD_INIT(sig.posix_timers), \ .cpu_timers = INIT_CPU_TIMERS(sig.cpu_timers), \ .rlim = INIT_RLIMITS, \ .pgrp = 1, \ - .session = 1, \ + .tty_old_pgrp = 0, \ + { .__session = 1}, \ } extern struct nsproxy init_nsproxy; #define INIT_NSPROXY(nsproxy) { \ + .pid_ns = &init_pid_ns, \ .count = ATOMIC_INIT(1), \ - .nslock = SPIN_LOCK_UNLOCKED, \ + .nslock = __SPIN_LOCK_UNLOCKED(nsproxy.nslock), \ .uts_ns = &init_uts_ns, \ - .namespace = NULL, \ + .mnt_ns = NULL, \ INIT_IPC_NS(ipc_ns) \ } diff --git a/include/linux/input.h b/include/linux/input.h index c38507ba38b..bde65c8a351 100644 --- a/include/linux/input.h +++ b/include/linux/input.h @@ -491,6 +491,21 @@ struct input_absinfo { #define KEY_DIGITS 0x19d #define KEY_TEEN 0x19e #define KEY_TWEN 0x19f +#define KEY_VIDEOPHONE 0x1a0 +#define KEY_GAMES 0x1a1 +#define KEY_ZOOMIN 0x1a2 +#define KEY_ZOOMOUT 0x1a3 +#define KEY_ZOOMRESET 0x1a4 +#define KEY_WORDPROCESSOR 0x1a5 +#define KEY_EDITOR 0x1a6 +#define KEY_SPREADSHEET 0x1a7 +#define KEY_GRAPHICSEDITOR 0x1a8 +#define KEY_PRESENTATION 0x1a9 +#define KEY_DATABASE 0x1aa +#define KEY_NEWS 0x1ab +#define KEY_VOICEMAIL 0x1ac +#define KEY_ADDRESSBOOK 0x1ad +#define KEY_MESSENGER 0x1ae #define KEY_DEL_EOL 0x1c0 #define KEY_DEL_EOS 0x1c1 @@ -663,7 +678,7 @@ struct input_absinfo { #define BUS_GSC 0x1A /* - * Values describing the status of an effect + * Values describing the status of a force-feedback effect */ #define FF_STATUS_STOPPED 0x00 #define FF_STATUS_PLAYING 0x01 @@ -680,7 +695,7 @@ struct input_absinfo { */ /** - * struct ff_replay - defines scheduling of the effect + * struct ff_replay - defines scheduling of the force-feedback effect * @length: duration of the effect * @delay: delay before effect should start playing */ @@ -690,7 +705,7 @@ struct ff_replay { }; /** - * struct ff_trigger - defines what triggers the effect + * struct ff_trigger - defines what triggers the force-feedback effect * @button: number of the button triggering the effect * @interval: controls how soon the effect can be re-triggered */ @@ -700,7 +715,7 @@ struct ff_trigger { }; /** - * struct ff_envelope - generic effect envelope + * struct ff_envelope - generic force-feedback effect envelope * @attack_length: duration of the attack (ms) * @attack_level: level at the beginning of the attack * @fade_length: duration of fade (ms) @@ -719,7 +734,7 @@ struct ff_envelope { }; /** - * struct ff_constant_effect - defines parameters of a constant effect + * struct ff_constant_effect - defines parameters of a constant force-feedback effect * @level: strength of the effect; may be negative * @envelope: envelope data */ @@ -729,7 +744,7 @@ struct ff_constant_effect { }; /** - * struct ff_ramp_effect - defines parameters of a ramp effect + * struct ff_ramp_effect - defines parameters of a ramp force-feedback effect * @start_level: beginning strength of the effect; may be negative * @end_level: final strength of the effect; may be negative * @envelope: envelope data @@ -741,7 +756,7 @@ struct ff_ramp_effect { }; /** - * struct ff_condition_effect - defines a spring or friction effect + * struct ff_condition_effect - defines a spring or friction force-feedback effect * @right_saturation: maximum level when joystick moved all way to the right * @left_saturation: same for the left side * @right_coeff: controls how fast the force grows when the joystick moves @@ -762,7 +777,7 @@ struct ff_condition_effect { }; /** - * struct ff_periodic_effect - defines parameters of a periodic effect + * struct ff_periodic_effect - defines parameters of a periodic force-feedback effect * @waveform: kind of the effect (wave) * @period: period of the wave (ms) * @magnitude: peak value @@ -793,7 +808,7 @@ struct ff_periodic_effect { }; /** - * struct ff_rumble_effect - defines parameters of a periodic effect + * struct ff_rumble_effect - defines parameters of a periodic force-feedback effect * @strong_magnitude: magnitude of the heavy motor * @weak_magnitude: magnitude of the light one * diff --git a/include/linux/interrupt.h b/include/linux/interrupt.h index 5b83e7b5962..e36e86c869f 100644 --- a/include/linux/interrupt.h +++ b/include/linux/interrupt.h @@ -11,6 +11,7 @@ #include <linux/hardirq.h> #include <linux/sched.h> #include <linux/irqflags.h> +#include <linux/bottom_half.h> #include <asm/atomic.h> #include <asm/ptrace.h> #include <asm/system.h> @@ -217,12 +218,6 @@ static inline void __deprecated save_and_cli(unsigned long *x) #define save_and_cli(x) save_and_cli(&x) #endif /* CONFIG_SMP */ -extern void local_bh_disable(void); -extern void __local_bh_enable(void); -extern void _local_bh_enable(void); -extern void local_bh_enable(void); -extern void local_bh_enable_ip(unsigned long ip); - /* PLEASE, avoid to allocate new softirqs, if you need not _really_ high frequency threaded job scheduling. For almost all the purposes tasklets are more than enough. F.e. all serial device BHs et @@ -236,7 +231,8 @@ enum NET_TX_SOFTIRQ, NET_RX_SOFTIRQ, BLOCK_SOFTIRQ, - TASKLET_SOFTIRQ + TASKLET_SOFTIRQ, + SCHED_SOFTIRQ, }; /* softirq mask and active fields moved to irq_cpustat_t in diff --git a/include/linux/ioport.h b/include/linux/ioport.h index d42c8339907..15228d79c5b 100644 --- a/include/linux/ioport.h +++ b/include/linux/ioport.h @@ -89,6 +89,10 @@ struct resource_list { #define IORESOURCE_ROM_ENABLE (1<<0) /* ROM is enabled, same as PCI_ROM_ADDRESS_ENABLE */ #define IORESOURCE_ROM_SHADOW (1<<1) /* ROM is copy at C000:0 */ #define IORESOURCE_ROM_COPY (1<<2) /* ROM is alloc'd copy, resource field overlaid */ +#define IORESOURCE_ROM_BIOS_COPY (1<<3) /* ROM is BIOS copy, resource field overlaid */ + +/* PCI control bits. Shares IORESOURCE_BITS with above PCI ROM. */ +#define IORESOURCE_PCI_FIXED (1<<4) /* Do not move resource */ /* PC/ISA/whatever - the normal PC address spaces: IO and memory */ extern struct resource ioport_resource; diff --git a/include/linux/ip.h b/include/linux/ip.h index ecee9bb27d0..1d36b971a8b 100644 --- a/include/linux/ip.h +++ b/include/linux/ip.h @@ -98,7 +98,7 @@ struct iphdr { __be16 frag_off; __u8 ttl; __u8 protocol; - __be16 check; + __sum16 check; __be32 saddr; __be32 daddr; /*The options start here. */ diff --git a/include/linux/ip6_tunnel.h b/include/linux/ip6_tunnel.h index 5c23aeb104c..af3f4a70f3d 100644 --- a/include/linux/ip6_tunnel.h +++ b/include/linux/ip6_tunnel.h @@ -25,7 +25,7 @@ struct ip6_tnl_parm { __u8 proto; /* tunnel protocol */ __u8 encap_limit; /* encapsulation limit for tunnel */ __u8 hop_limit; /* hop limit for tunnel */ - __u32 flowinfo; /* traffic class and flowlabel for tunnel */ + __be32 flowinfo; /* traffic class and flowlabel for tunnel */ __u32 flags; /* tunnel flags */ struct in6_addr laddr; /* local tunnel end-point address */ struct in6_addr raddr; /* remote tunnel end-point address */ diff --git a/include/linux/ipmi.h b/include/linux/ipmi.h index 796ca009fd4..7a9db390c56 100644 --- a/include/linux/ipmi.h +++ b/include/linux/ipmi.h @@ -208,6 +208,15 @@ struct kernel_ipmi_msg code as the first byte of the incoming data, unlike a response. */ +/* + * Modes for ipmi_set_maint_mode() and the userland IOCTL. The AUTO + * setting is the default and means it will be set on certain + * commands. Hard setting it on and off will override automatic + * operation. + */ +#define IPMI_MAINTENANCE_MODE_AUTO 0 +#define IPMI_MAINTENANCE_MODE_OFF 1 +#define IPMI_MAINTENANCE_MODE_ON 2 #ifdef __KERNEL__ @@ -374,6 +383,35 @@ int ipmi_unregister_for_cmd(ipmi_user_t user, unsigned int chans); /* + * Go into a mode where the driver will not autonomously attempt to do + * things with the interface. It will still respond to attentions and + * interrupts, and it will expect that commands will complete. It + * will not automatcially check for flags, events, or things of that + * nature. + * + * This is primarily used for firmware upgrades. The idea is that + * when you go into firmware upgrade mode, you do this operation + * and the driver will not attempt to do anything but what you tell + * it or what the BMC asks for. + * + * Note that if you send a command that resets the BMC, the driver + * will still expect a response from that command. So the BMC should + * reset itself *after* the response is sent. Resetting before the + * response is just silly. + * + * If in auto maintenance mode, the driver will automatically go into + * maintenance mode for 30 seconds if it sees a cold reset, a warm + * reset, or a firmware NetFN. This means that code that uses only + * firmware NetFN commands to do upgrades will work automatically + * without change, assuming it sends a message every 30 seconds or + * less. + * + * See the IPMI_MAINTENANCE_MODE_xxx defines for what the mode means. + */ +int ipmi_get_maintenance_mode(ipmi_user_t user); +int ipmi_set_maintenance_mode(ipmi_user_t user, int mode); + +/* * Allow run-to-completion mode to be set for the interface of * a specific user. */ @@ -656,4 +694,11 @@ struct ipmi_timing_parms #define IPMICTL_GET_TIMING_PARMS_CMD _IOR(IPMI_IOC_MAGIC, 23, \ struct ipmi_timing_parms) +/* + * Set the maintenance mode. See ipmi_set_maintenance_mode() above + * for a description of what this does. + */ +#define IPMICTL_GET_MAINTENANCE_MODE_CMD _IOR(IPMI_IOC_MAGIC, 30, int) +#define IPMICTL_SET_MAINTENANCE_MODE_CMD _IOW(IPMI_IOC_MAGIC, 31, int) + #endif /* __LINUX_IPMI_H */ diff --git a/include/linux/ipmi_msgdefs.h b/include/linux/ipmi_msgdefs.h index 4d04d8b58a0..b56a158d587 100644 --- a/include/linux/ipmi_msgdefs.h +++ b/include/linux/ipmi_msgdefs.h @@ -46,6 +46,8 @@ #define IPMI_NETFN_APP_REQUEST 0x06 #define IPMI_NETFN_APP_RESPONSE 0x07 #define IPMI_GET_DEVICE_ID_CMD 0x01 +#define IPMI_COLD_RESET_CMD 0x02 +#define IPMI_WARM_RESET_CMD 0x03 #define IPMI_CLEAR_MSG_FLAGS_CMD 0x30 #define IPMI_GET_DEVICE_GUID_CMD 0x08 #define IPMI_GET_MSG_FLAGS_CMD 0x31 @@ -60,20 +62,27 @@ #define IPMI_NETFN_STORAGE_RESPONSE 0x0b #define IPMI_ADD_SEL_ENTRY_CMD 0x44 +#define IPMI_NETFN_FIRMWARE_REQUEST 0x08 +#define IPMI_NETFN_FIRMWARE_RESPONSE 0x09 + /* The default slave address */ #define IPMI_BMC_SLAVE_ADDR 0x20 /* The BT interface on high-end HP systems supports up to 255 bytes in * one transfer. Its "virtual" BMC supports some commands that are longer * than 128 bytes. Use the full 256, plus NetFn/LUN, Cmd, cCode, plus - * some overhead. It would be nice to base this on the "BT Capabilities" - * but that's too hard to propagate to the rest of the driver. */ + * some overhead; it's not worth the effort to dynamically size this based + * on the results of the "Get BT Capabilities" command. */ #define IPMI_MAX_MSG_LENGTH 272 /* multiple of 16 */ #define IPMI_CC_NO_ERROR 0x00 #define IPMI_NODE_BUSY_ERR 0xc0 #define IPMI_INVALID_COMMAND_ERR 0xc1 +#define IPMI_TIMEOUT_ERR 0xc3 #define IPMI_ERR_MSG_TRUNCATED 0xc6 +#define IPMI_REQ_LEN_INVALID_ERR 0xc7 +#define IPMI_REQ_LEN_EXCEEDED_ERR 0xc8 +#define IPMI_NOT_IN_MY_STATE_ERR 0xd5 /* IPMI 2.0 */ #define IPMI_LOST_ARBITRATION_ERR 0x81 #define IPMI_BUS_ERR 0x82 #define IPMI_NAK_ON_WRITE_ERR 0x83 diff --git a/include/linux/ipmi_smi.h b/include/linux/ipmi_smi.h index 6d9c7e4da47..c0633108d05 100644 --- a/include/linux/ipmi_smi.h +++ b/include/linux/ipmi_smi.h @@ -115,6 +115,13 @@ struct ipmi_smi_handlers poll for operations during things like crash dumps. */ void (*poll)(void *send_info); + /* Enable/disable firmware maintenance mode. Note that this + is *not* the modes defined, this is simply an on/off + setting. The message handler does the mode handling. Note + that this is called from interupt context, so it cannot + block. */ + void (*set_maintenance_mode)(void *send_info, int enable); + /* Tell the handler that we are using it/not using it. The message handler get the modules that this handler belongs to; this function lets the SMI claim any modules that it @@ -173,6 +180,7 @@ int ipmi_register_smi(struct ipmi_smi_handlers *handlers, void *send_info, struct ipmi_device_id *device_id, struct device *dev, + const char *sysfs_name, unsigned char slave_addr); /* diff --git a/include/linux/ipv6.h b/include/linux/ipv6.h index 4f435c59de0..f8241130f5e 100644 --- a/include/linux/ipv6.h +++ b/include/linux/ipv6.h @@ -274,7 +274,7 @@ struct ipv6_pinfo { struct in6_addr *saddr_cache; #endif - __u32 flow_label; + __be32 flow_label; __u32 frag_size; __s16 hop_limit; __s16 mcast_hops; diff --git a/include/linux/isdn.h b/include/linux/isdn.h index 62991148d5a..3c7875b7ab5 100644 --- a/include/linux/isdn.h +++ b/include/linux/isdn.h @@ -511,8 +511,8 @@ typedef struct modem_info { #endif struct tty_struct *tty; /* Pointer to corresponding tty */ atemu emu; /* AT-emulator data */ - struct termios normal_termios; /* For saving termios structs */ - struct termios callout_termios; + struct ktermios normal_termios; /* For saving termios structs */ + struct ktermios callout_termios; wait_queue_head_t open_wait, close_wait; struct semaphore write_sem; spinlock_t readlock; @@ -525,8 +525,8 @@ typedef struct _isdn_modem { int refcount; /* Number of opens */ struct tty_driver *tty_modem; /* tty-device */ struct tty_struct *modem_table[ISDN_MAX_CHANNELS]; /* ?? copied from Orig */ - struct termios *modem_termios[ISDN_MAX_CHANNELS]; - struct termios *modem_termios_locked[ISDN_MAX_CHANNELS]; + struct ktermios *modem_termios[ISDN_MAX_CHANNELS]; + struct ktermios *modem_termios_locked[ISDN_MAX_CHANNELS]; modem_info info[ISDN_MAX_CHANNELS]; /* Private data */ } isdn_modem_t; diff --git a/include/linux/istallion.h b/include/linux/istallion.h index b55e2a03560..106a5e85e5c 100644 --- a/include/linux/istallion.h +++ b/include/linux/istallion.h @@ -49,13 +49,13 @@ * communication with the slave board will always be on a per port * basis. */ -typedef struct { +struct stliport { unsigned long magic; - int portnr; - int panelnr; - int brdnr; + unsigned int portnr; + unsigned int panelnr; + unsigned int brdnr; unsigned long state; - int devnr; + unsigned int devnr; int flags; int baud_base; int custom_divisor; @@ -72,7 +72,7 @@ typedef struct { wait_queue_head_t close_wait; wait_queue_head_t raw_wait; struct work_struct tqhangup; - asysigs_t asig; + struct asysigs asig; unsigned long addr; unsigned long rxoffset; unsigned long txoffset; @@ -83,31 +83,31 @@ typedef struct { unsigned char reqbit; unsigned char portidx; unsigned char portbit; -} stliport_t; +}; /* * Use a structure of function pointers to do board level operations. * These include, enable/disable, paging shared memory, interrupting, etc. */ -typedef struct stlibrd { +struct stlibrd { unsigned long magic; - int brdnr; - int brdtype; - int state; - int nrpanels; - int nrports; - int nrdevs; + unsigned int brdnr; + unsigned int brdtype; + unsigned int state; + unsigned int nrpanels; + unsigned int nrports; + unsigned int nrdevs; unsigned int iobase; int iosize; unsigned long memaddr; void __iomem *membase; - int memsize; + unsigned long memsize; int pagesize; int hostoffset; int slaveoffset; int bitsize; int enabval; - int panels[STL_MAXPANELS]; + unsigned int panels[STL_MAXPANELS]; int panelids[STL_MAXPANELS]; void (*init)(struct stlibrd *brdp); void (*enable)(struct stlibrd *brdp); @@ -116,8 +116,8 @@ typedef struct stlibrd { void __iomem *(*getmemptr)(struct stlibrd *brdp, unsigned long offset, int line); void (*intr)(struct stlibrd *brdp); void (*reset)(struct stlibrd *brdp); - stliport_t *ports[STL_MAXPORTS]; -} stlibrd_t; + struct stliport *ports[STL_MAXPORTS]; +}; /* diff --git a/include/linux/ixjuser.h b/include/linux/ixjuser.h index fd1756d3a47..88b45895746 100644 --- a/include/linux/ixjuser.h +++ b/include/linux/ixjuser.h @@ -315,7 +315,7 @@ typedef struct { * structures. If the freq0 variable is non-zero, the tone table contents * for the tone_index are updated to the frequencies and gains defined. It * should be noted that DTMF tones cannot be reassigned, so if DTMF tone -* table indexs are used in a cadence the frequency and gain variables will +* table indexes are used in a cadence the frequency and gain variables will * be ignored. * * If the array elements contain frequency parameters the driver will diff --git a/include/linux/jbd.h b/include/linux/jbd.h index fe89444b1c6..45273755126 100644 --- a/include/linux/jbd.h +++ b/include/linux/jbd.h @@ -839,7 +839,6 @@ struct journal_s */ /* Filing buffers */ -extern void __journal_temp_unlink_buffer(struct journal_head *jh); extern void journal_unfile_buffer(journal_t *, struct journal_head *); extern void __journal_unfile_buffer(struct journal_head *); extern void __journal_refile_buffer(struct journal_head *); @@ -949,7 +948,7 @@ void journal_put_journal_head(struct journal_head *jh); /* * handle management */ -extern kmem_cache_t *jbd_handle_cache; +extern struct kmem_cache *jbd_handle_cache; static inline handle_t *jbd_alloc_handle(gfp_t gfp_flags) { diff --git a/include/linux/jbd2.h b/include/linux/jbd2.h index ddb12879578..0e0fedd2039 100644 --- a/include/linux/jbd2.h +++ b/include/linux/jbd2.h @@ -848,7 +848,6 @@ struct journal_s */ /* Filing buffers */ -extern void __jbd2_journal_temp_unlink_buffer(struct journal_head *jh); extern void jbd2_journal_unfile_buffer(journal_t *, struct journal_head *); extern void __jbd2_journal_unfile_buffer(struct journal_head *); extern void __jbd2_journal_refile_buffer(struct journal_head *); @@ -958,7 +957,7 @@ void jbd2_journal_put_journal_head(struct journal_head *jh); /* * handle management */ -extern kmem_cache_t *jbd2_handle_cache; +extern struct kmem_cache *jbd2_handle_cache; static inline handle_t *jbd_alloc_handle(gfp_t gfp_flags) { diff --git a/include/linux/jiffies.h b/include/linux/jiffies.h index c8d5f207c3d..0ec6e28bccd 100644 --- a/include/linux/jiffies.h +++ b/include/linux/jiffies.h @@ -74,7 +74,7 @@ #define __jiffy_data __attribute__((section(".data"))) /* - * The 64-bit value is not volatile - you MUST NOT read it + * The 64-bit value is not atomic - you MUST NOT read it * without sampling the sequence number in xtime_lock. * get_jiffies_64() will do this for you as appropriate. */ diff --git a/include/linux/kbd_kern.h b/include/linux/kbd_kern.h index efe0ee4cc80..06c58c423fe 100644 --- a/include/linux/kbd_kern.h +++ b/include/linux/kbd_kern.h @@ -158,7 +158,7 @@ static inline void con_schedule_flip(struct tty_struct *t) if (t->buf.tail != NULL) t->buf.tail->commit = t->buf.tail->used; spin_unlock_irqrestore(&t->buf.lock, flags); - schedule_work(&t->buf.work); + schedule_delayed_work(&t->buf.work, 0); } #endif diff --git a/include/linux/kernel.h b/include/linux/kernel.h index b9b5e4ba166..63fb18dcac3 100644 --- a/include/linux/kernel.h +++ b/include/linux/kernel.h @@ -13,10 +13,12 @@ #include <linux/types.h> #include <linux/compiler.h> #include <linux/bitops.h> +#include <linux/log2.h> #include <asm/byteorder.h> #include <asm/bug.h> extern const char linux_banner[]; +extern const char linux_proc_banner[]; #define INT_MAX ((int)(~0U>>1)) #define INT_MIN (-INT_MAX - 1) @@ -65,7 +67,7 @@ struct user; * context (spinlock, irq-handler, ...). * * This is a useful debugging help to be able to catch problems early and not - * be biten later when the calling function happens to sleep when it is not + * be bitten later when the calling function happens to sleep when it is not * supposed to. */ #ifdef CONFIG_PREEMPT_VOLUNTARY @@ -157,20 +159,6 @@ static inline int printk(const char *s, ...) { return 0; } unsigned long int_sqrt(unsigned long); -static inline int __attribute_pure__ long_log2(unsigned long x) -{ - int r = 0; - for (x >>= 1; x > 0; x >>= 1) - r++; - return r; -} - -static inline unsigned long -__attribute_const__ roundup_pow_of_two(unsigned long x) -{ - return 1UL << fls_long(x - 1); -} - extern int printk_ratelimit(void); extern int __printk_ratelimit(int ratelimit_jiffies, int ratelimit_burst); extern bool printk_timed_ratelimit(unsigned long *caller_jiffies, diff --git a/include/linux/kernelcapi.h b/include/linux/kernelcapi.h index 891bb2cf0aa..aea34e74c49 100644 --- a/include/linux/kernelcapi.h +++ b/include/linux/kernelcapi.h @@ -47,6 +47,8 @@ typedef struct kcapi_carddef { #include <linux/list.h> #include <linux/skbuff.h> +#include <linux/workqueue.h> +#include <asm/semaphore.h> #define KCI_CONTRUP 0 /* arg: struct capi_profile */ #define KCI_CONTRDOWN 1 /* arg: NULL */ diff --git a/include/linux/kexec.h b/include/linux/kexec.h index 6427949ddf9..d02425cdd80 100644 --- a/include/linux/kexec.h +++ b/include/linux/kexec.h @@ -105,9 +105,14 @@ extern struct page *kimage_alloc_control_pages(struct kimage *image, unsigned int order); extern void crash_kexec(struct pt_regs *); int kexec_should_crash(struct task_struct *); +void crash_save_cpu(struct pt_regs *regs, int cpu); extern struct kimage *kexec_image; extern struct kimage *kexec_crash_image; +#ifndef kexec_flush_icache_page +#define kexec_flush_icache_page(page) +#endif + #define KEXEC_ON_CRASH 0x00000001 #define KEXEC_ARCH_MASK 0xffff0000 @@ -122,6 +127,8 @@ extern struct kimage *kexec_crash_image; #define KEXEC_ARCH_IA_64 (50 << 16) #define KEXEC_ARCH_S390 (22 << 16) #define KEXEC_ARCH_SH (42 << 16) +#define KEXEC_ARCH_MIPS_LE (10 << 16) +#define KEXEC_ARCH_MIPS ( 8 << 16) #define KEXEC_FLAGS (KEXEC_ON_CRASH) /* List of defined/legal kexec flags */ @@ -131,6 +138,7 @@ extern struct resource crashk_res; typedef u32 note_buf_t[MAX_NOTE_BYTES/4]; extern note_buf_t *crash_notes; + #else /* !CONFIG_KEXEC */ struct pt_regs; struct task_struct; diff --git a/include/linux/kobject.h b/include/linux/kobject.h index bcd9cd173c2..76538fcf2c4 100644 --- a/include/linux/kobject.h +++ b/include/linux/kobject.h @@ -47,6 +47,7 @@ enum kobject_action { KOBJ_UMOUNT = (__force kobject_action_t) 0x05, /* umount event for block devices (broken) */ KOBJ_OFFLINE = (__force kobject_action_t) 0x06, /* device offline */ KOBJ_ONLINE = (__force kobject_action_t) 0x07, /* device online */ + KOBJ_MOVE = (__force kobject_action_t) 0x08, /* device move */ }; struct kobject { @@ -76,6 +77,7 @@ extern int __must_check kobject_add(struct kobject *); extern void kobject_del(struct kobject *); extern int __must_check kobject_rename(struct kobject *, const char *new_name); +extern int __must_check kobject_move(struct kobject *, struct kobject *); extern int __must_check kobject_register(struct kobject *); extern void kobject_unregister(struct kobject *); @@ -263,14 +265,21 @@ extern int __must_check subsys_create_file(struct subsystem * , struct subsys_attribute *); #if defined(CONFIG_HOTPLUG) -void kobject_uevent(struct kobject *kobj, enum kobject_action action); +int kobject_uevent(struct kobject *kobj, enum kobject_action action); +int kobject_uevent_env(struct kobject *kobj, enum kobject_action action, + char *envp[]); int add_uevent_var(char **envp, int num_envp, int *cur_index, char *buffer, int buffer_size, int *cur_len, const char *format, ...) __attribute__((format (printf, 7, 8))); #else -static inline void kobject_uevent(struct kobject *kobj, enum kobject_action action) { } +static inline int kobject_uevent(struct kobject *kobj, enum kobject_action action) +{ return 0; } +static inline int kobject_uevent_env(struct kobject *kobj, + enum kobject_action action, + char *envp[]) +{ return 0; } static inline int add_uevent_var(char **envp, int num_envp, int *cur_index, char *buffer, int buffer_size, int *cur_len, diff --git a/include/linux/kprobes.h b/include/linux/kprobes.h index ac4c0559f75..769be39b968 100644 --- a/include/linux/kprobes.h +++ b/include/linux/kprobes.h @@ -165,7 +165,7 @@ extern void arch_disarm_kprobe(struct kprobe *p); extern int arch_init_kprobes(void); extern void show_registers(struct pt_regs *regs); extern kprobe_opcode_t *get_insn_slot(void); -extern void free_insn_slot(kprobe_opcode_t *slot); +extern void free_insn_slot(kprobe_opcode_t *slot, int dirty); extern void kprobes_inc_nmissed_count(struct kprobe *p); /* Get the kprobe at this addr (if any) - called with preemption disabled */ diff --git a/include/linux/ktime.h b/include/linux/ktime.h index 84eeecd60a0..611f17f79ee 100644 --- a/include/linux/ktime.h +++ b/include/linux/ktime.h @@ -248,9 +248,9 @@ static inline struct timeval ktime_to_timeval(const ktime_t kt) * * Returns the scalar nanoseconds representation of kt */ -static inline u64 ktime_to_ns(const ktime_t kt) +static inline s64 ktime_to_ns(const ktime_t kt) { - return (u64) kt.tv.sec * NSEC_PER_SEC + kt.tv.nsec; + return (s64) kt.tv.sec * NSEC_PER_SEC + kt.tv.nsec; } #endif diff --git a/include/linux/kvm.h b/include/linux/kvm.h new file mode 100644 index 00000000000..bc8b4616bad --- /dev/null +++ b/include/linux/kvm.h @@ -0,0 +1,239 @@ +#ifndef __LINUX_KVM_H +#define __LINUX_KVM_H + +/* + * Userspace interface for /dev/kvm - kernel based virtual machine + * + * Note: this interface is considered experimental and may change without + * notice. + */ + +#include <asm/types.h> +#include <linux/ioctl.h> + +#define KVM_API_VERSION 2 + +/* + * Architectural interrupt line count, and the size of the bitmap needed + * to hold them. + */ +#define KVM_NR_INTERRUPTS 256 +#define KVM_IRQ_BITMAP_SIZE_BYTES ((KVM_NR_INTERRUPTS + 7) / 8) +#define KVM_IRQ_BITMAP_SIZE(type) (KVM_IRQ_BITMAP_SIZE_BYTES / sizeof(type)) + + +/* for KVM_CREATE_MEMORY_REGION */ +struct kvm_memory_region { + __u32 slot; + __u32 flags; + __u64 guest_phys_addr; + __u64 memory_size; /* bytes */ +}; + +/* for kvm_memory_region::flags */ +#define KVM_MEM_LOG_DIRTY_PAGES 1UL + + +#define KVM_EXIT_TYPE_FAIL_ENTRY 1 +#define KVM_EXIT_TYPE_VM_EXIT 2 + +enum kvm_exit_reason { + KVM_EXIT_UNKNOWN = 0, + KVM_EXIT_EXCEPTION = 1, + KVM_EXIT_IO = 2, + KVM_EXIT_CPUID = 3, + KVM_EXIT_DEBUG = 4, + KVM_EXIT_HLT = 5, + KVM_EXIT_MMIO = 6, + KVM_EXIT_IRQ_WINDOW_OPEN = 7, +}; + +/* for KVM_RUN */ +struct kvm_run { + /* in */ + __u32 vcpu; + __u32 emulated; /* skip current instruction */ + __u32 mmio_completed; /* mmio request completed */ + __u8 request_interrupt_window; + __u8 padding1[3]; + + /* out */ + __u32 exit_type; + __u32 exit_reason; + __u32 instruction_length; + __u8 ready_for_interrupt_injection; + __u8 if_flag; + __u16 padding2; + __u64 cr8; + __u64 apic_base; + + union { + /* KVM_EXIT_UNKNOWN */ + struct { + __u32 hardware_exit_reason; + } hw; + /* KVM_EXIT_EXCEPTION */ + struct { + __u32 exception; + __u32 error_code; + } ex; + /* KVM_EXIT_IO */ + struct { +#define KVM_EXIT_IO_IN 0 +#define KVM_EXIT_IO_OUT 1 + __u8 direction; + __u8 size; /* bytes */ + __u8 string; + __u8 string_down; + __u8 rep; + __u8 pad; + __u16 port; + __u64 count; + union { + __u64 address; + __u32 value; + }; + } io; + struct { + } debug; + /* KVM_EXIT_MMIO */ + struct { + __u64 phys_addr; + __u8 data[8]; + __u32 len; + __u8 is_write; + } mmio; + }; +}; + +/* for KVM_GET_REGS and KVM_SET_REGS */ +struct kvm_regs { + /* in */ + __u32 vcpu; + __u32 padding; + + /* out (KVM_GET_REGS) / in (KVM_SET_REGS) */ + __u64 rax, rbx, rcx, rdx; + __u64 rsi, rdi, rsp, rbp; + __u64 r8, r9, r10, r11; + __u64 r12, r13, r14, r15; + __u64 rip, rflags; +}; + +struct kvm_segment { + __u64 base; + __u32 limit; + __u16 selector; + __u8 type; + __u8 present, dpl, db, s, l, g, avl; + __u8 unusable; + __u8 padding; +}; + +struct kvm_dtable { + __u64 base; + __u16 limit; + __u16 padding[3]; +}; + +/* for KVM_GET_SREGS and KVM_SET_SREGS */ +struct kvm_sregs { + /* in */ + __u32 vcpu; + __u32 padding; + + /* out (KVM_GET_SREGS) / in (KVM_SET_SREGS) */ + struct kvm_segment cs, ds, es, fs, gs, ss; + struct kvm_segment tr, ldt; + struct kvm_dtable gdt, idt; + __u64 cr0, cr2, cr3, cr4, cr8; + __u64 efer; + __u64 apic_base; + __u64 interrupt_bitmap[KVM_IRQ_BITMAP_SIZE(__u64)]; +}; + +struct kvm_msr_entry { + __u32 index; + __u32 reserved; + __u64 data; +}; + +/* for KVM_GET_MSRS and KVM_SET_MSRS */ +struct kvm_msrs { + __u32 vcpu; + __u32 nmsrs; /* number of msrs in entries */ + + struct kvm_msr_entry entries[0]; +}; + +/* for KVM_GET_MSR_INDEX_LIST */ +struct kvm_msr_list { + __u32 nmsrs; /* number of msrs in entries */ + __u32 indices[0]; +}; + +/* for KVM_TRANSLATE */ +struct kvm_translation { + /* in */ + __u64 linear_address; + __u32 vcpu; + __u32 padding; + + /* out */ + __u64 physical_address; + __u8 valid; + __u8 writeable; + __u8 usermode; +}; + +/* for KVM_INTERRUPT */ +struct kvm_interrupt { + /* in */ + __u32 vcpu; + __u32 irq; +}; + +struct kvm_breakpoint { + __u32 enabled; + __u32 padding; + __u64 address; +}; + +/* for KVM_DEBUG_GUEST */ +struct kvm_debug_guest { + /* int */ + __u32 vcpu; + __u32 enabled; + struct kvm_breakpoint breakpoints[4]; + __u32 singlestep; +}; + +/* for KVM_GET_DIRTY_LOG */ +struct kvm_dirty_log { + __u32 slot; + __u32 padding; + union { + void __user *dirty_bitmap; /* one bit per page */ + __u64 padding; + }; +}; + +#define KVMIO 0xAE + +#define KVM_GET_API_VERSION _IO(KVMIO, 1) +#define KVM_RUN _IOWR(KVMIO, 2, struct kvm_run) +#define KVM_GET_REGS _IOWR(KVMIO, 3, struct kvm_regs) +#define KVM_SET_REGS _IOW(KVMIO, 4, struct kvm_regs) +#define KVM_GET_SREGS _IOWR(KVMIO, 5, struct kvm_sregs) +#define KVM_SET_SREGS _IOW(KVMIO, 6, struct kvm_sregs) +#define KVM_TRANSLATE _IOWR(KVMIO, 7, struct kvm_translation) +#define KVM_INTERRUPT _IOW(KVMIO, 8, struct kvm_interrupt) +#define KVM_DEBUG_GUEST _IOW(KVMIO, 9, struct kvm_debug_guest) +#define KVM_SET_MEMORY_REGION _IOW(KVMIO, 10, struct kvm_memory_region) +#define KVM_CREATE_VCPU _IOW(KVMIO, 11, int /* vcpu_slot */) +#define KVM_GET_DIRTY_LOG _IOW(KVMIO, 12, struct kvm_dirty_log) +#define KVM_GET_MSRS _IOWR(KVMIO, 13, struct kvm_msrs) +#define KVM_SET_MSRS _IOWR(KVMIO, 14, struct kvm_msrs) +#define KVM_GET_MSR_INDEX_LIST _IOWR(KVMIO, 15, struct kvm_msr_list) + +#endif diff --git a/include/linux/libata.h b/include/linux/libata.h index abd2debebca..ab275483032 100644 --- a/include/linux/libata.h +++ b/include/linux/libata.h @@ -140,6 +140,7 @@ enum { ATA_DFLAG_LBA48 = (1 << 1), /* device supports LBA48 */ ATA_DFLAG_CDB_INTR = (1 << 2), /* device asserts INTRQ when ready for CDB */ ATA_DFLAG_NCQ = (1 << 3), /* device supports NCQ */ + ATA_DFLAG_FLUSH_EXT = (1 << 4), /* do FLUSH_EXT instead of FLUSH */ ATA_DFLAG_CFG_MASK = (1 << 8) - 1, ATA_DFLAG_PIO = (1 << 8), /* device limited to PIO mode */ @@ -175,6 +176,7 @@ enum { ATA_FLAG_SKIP_D2H_BSY = (1 << 12), /* can't wait for the first D2H * Register FIS clearing BSY */ ATA_FLAG_DEBUGMSG = (1 << 13), + ATA_FLAG_SETXFER_POLLING= (1 << 14), /* use polling for SETXFER */ /* The following flag belongs to ap->pflags but is kept in * ap->flags because it's referenced in many LLDs and will be @@ -283,6 +285,9 @@ enum { ATA_EHI_QUIET = (1 << 3), /* be quiet */ ATA_EHI_DID_RESET = (1 << 16), /* already reset this port */ + ATA_EHI_PRINTINFO = (1 << 17), /* print configuration info */ + ATA_EHI_SETMODE = (1 << 18), /* configure transfer mode */ + ATA_EHI_POST_SETMODE = (1 << 19), /* revaildating after setmode */ ATA_EHI_RESET_MODIFIER_MASK = ATA_EHI_RESUME_LINK, @@ -307,10 +312,11 @@ enum { (some horkage may be drive/controller pair dependant */ ATA_HORKAGE_DIAGNOSTIC = (1 << 0), /* Failed boot diag */ + ATA_HORKAGE_NODMA = (1 << 1), /* DMA problems */ + ATA_HORKAGE_NONCQ = (1 << 2), /* Don't use NCQ */ }; enum hsm_task_states { - HSM_ST_UNKNOWN, /* state unknown */ HSM_ST_IDLE, /* no command on going */ HSM_ST, /* (waiting the device to) transfer data */ HSM_ST_LAST, /* (waiting the device to) complete command */ @@ -329,6 +335,7 @@ enum ata_completion_errors { AC_ERR_SYSTEM = (1 << 6), /* system error */ AC_ERR_INVALID = (1 << 7), /* invalid argument */ AC_ERR_OTHER = (1 << 8), /* unknown */ + AC_ERR_NODEV_HINT = (1 << 9), /* polling device detection hint */ }; /* forward declarations */ @@ -568,8 +575,9 @@ struct ata_port { struct ata_host *host; struct device *dev; - struct work_struct port_task; - struct work_struct hotplug_task; + void *port_task_data; + struct delayed_work port_task; + struct delayed_work hotplug_task; struct work_struct scsi_rescan_task; unsigned int hsm_task_state; @@ -700,6 +708,8 @@ extern int sata_phy_debounce(struct ata_port *ap, const unsigned long *param); extern int sata_phy_resume(struct ata_port *ap, const unsigned long *param); extern int ata_std_prereset(struct ata_port *ap); extern int ata_std_softreset(struct ata_port *ap, unsigned int *classes); +extern int sata_port_hardreset(struct ata_port *ap, + const unsigned long *timing); extern int sata_std_hardreset(struct ata_port *ap, unsigned int *class); extern void ata_std_postreset(struct ata_port *ap, unsigned int *classes); extern void ata_port_disable(struct ata_port *); @@ -744,10 +754,9 @@ extern int ata_scsi_device_suspend(struct scsi_device *, pm_message_t mesg); extern int ata_host_suspend(struct ata_host *host, pm_message_t mesg); extern void ata_host_resume(struct ata_host *host); extern int ata_ratelimit(void); -extern unsigned int ata_busy_sleep(struct ata_port *ap, - unsigned long timeout_pat, - unsigned long timeout); -extern void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *), +extern int ata_busy_sleep(struct ata_port *ap, + unsigned long timeout_pat, unsigned long timeout); +extern void ata_port_queue_task(struct ata_port *ap, work_func_t fn, void *data, unsigned long delay); extern u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val, unsigned long interval_msec, @@ -787,6 +796,7 @@ extern void ata_id_string(const u16 *id, unsigned char *s, unsigned int ofs, unsigned int len); extern void ata_id_c_string(const u16 *id, unsigned char *s, unsigned int ofs, unsigned int len); +extern unsigned long ata_device_blacklisted(const struct ata_device *dev); extern void ata_bmdma_setup (struct ata_queued_cmd *qc); extern void ata_bmdma_start (struct ata_queued_cmd *qc); extern void ata_bmdma_stop(struct ata_queued_cmd *qc); @@ -1061,7 +1071,7 @@ static inline u8 ata_busy_wait(struct ata_port *ap, unsigned int bits, udelay(10); status = ata_chk_status(ap); max--; - } while ((status & bits) && (max > 0)); + } while (status != 0xff && (status & bits) && (max > 0)); return status; } @@ -1082,7 +1092,7 @@ static inline u8 ata_wait_idle(struct ata_port *ap) { u8 status = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 1000); - if (status & (ATA_BUSY | ATA_DRQ)) { + if (status != 0xff && (status & (ATA_BUSY | ATA_DRQ))) { unsigned long l = ap->ioaddr.status_addr; if (ata_msg_warn(ap)) printk(KERN_WARNING "ATA: abnormal status 0x%X on port 0x%lX\n", @@ -1148,37 +1158,6 @@ static inline void ata_qc_reinit(struct ata_queued_cmd *qc) } /** - * ata_irq_on - Enable interrupts on a port. - * @ap: Port on which interrupts are enabled. - * - * Enable interrupts on a legacy IDE device using MMIO or PIO, - * wait for idle, clear any pending interrupts. - * - * LOCKING: - * Inherited from caller. - */ - -static inline u8 ata_irq_on(struct ata_port *ap) -{ - struct ata_ioports *ioaddr = &ap->ioaddr; - u8 tmp; - - ap->ctl &= ~ATA_NIEN; - ap->last_ctl = ap->ctl; - - if (ap->flags & ATA_FLAG_MMIO) - writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); - else - outb(ap->ctl, ioaddr->ctl_addr); - tmp = ata_wait_idle(ap); - - ap->ops->irq_clear(ap); - - return tmp; -} - - -/** * ata_irq_ack - Acknowledge a device interrupt. * @ap: Port on which interrupts are enabled. * diff --git a/include/linux/lockd/bind.h b/include/linux/lockd/bind.h index aa50d89eacd..246de1d84a2 100644 --- a/include/linux/lockd/bind.h +++ b/include/linux/lockd/bind.h @@ -23,7 +23,7 @@ struct svc_rqst; * This is the set of functions for lockd->nfsd communication */ struct nlmsvc_binding { - u32 (*fopen)(struct svc_rqst *, + __be32 (*fopen)(struct svc_rqst *, struct nfs_fh *, struct file **); void (*fclose)(struct file *); diff --git a/include/linux/lockd/lockd.h b/include/linux/lockd/lockd.h index 862d9730a60..ac25b5649c5 100644 --- a/include/linux/lockd/lockd.h +++ b/include/linux/lockd/lockd.h @@ -164,14 +164,12 @@ void nlmclnt_next_cookie(struct nlm_cookie *); */ struct nlm_host * nlmclnt_lookup_host(const struct sockaddr_in *, int, int, const char *, int); struct nlm_host * nlmsvc_lookup_host(struct svc_rqst *, const char *, int); -struct nlm_host * nlm_lookup_host(int server, const struct sockaddr_in *, int, int, const char *, int); struct rpc_clnt * nlm_bind_host(struct nlm_host *); void nlm_rebind_host(struct nlm_host *); struct nlm_host * nlm_get_host(struct nlm_host *); void nlm_release_host(struct nlm_host *); void nlm_shutdown_hosts(void); extern void nlm_host_rebooted(const struct sockaddr_in *, const char *, int, u32); -struct nsm_handle *nsm_find(const struct sockaddr_in *, const char *, int); void nsm_release(struct nsm_handle *); @@ -193,7 +191,7 @@ __be32 nlmsvc_cancel_blocked(struct nlm_file *, struct nlm_lock *); unsigned long nlmsvc_retry_blocked(void); void nlmsvc_traverse_blocks(struct nlm_host *, struct nlm_file *, nlm_host_match_fn_t match); -void nlmsvc_grant_reply(struct nlm_cookie *, u32); +void nlmsvc_grant_reply(struct nlm_cookie *, __be32); /* * File handling for the server personality @@ -208,7 +206,7 @@ void nlmsvc_invalidate_all(void); static __inline__ struct inode * nlmsvc_file_inode(struct nlm_file *file) { - return file->f_file->f_dentry->d_inode; + return file->f_file->f_path.dentry->d_inode; } /* diff --git a/include/linux/lockd/sm_inter.h b/include/linux/lockd/sm_inter.h index fc61d40964d..22a645828f2 100644 --- a/include/linux/lockd/sm_inter.h +++ b/include/linux/lockd/sm_inter.h @@ -24,7 +24,7 @@ * Arguments for all calls to statd */ struct nsm_args { - u32 addr; /* remote address */ + __be32 addr; /* remote address */ u32 prog; /* RPC callback info */ u32 vers; u32 proc; diff --git a/include/linux/lockd/xdr.h b/include/linux/lockd/xdr.h index 29e7d9fc9da..83a1f9f6237 100644 --- a/include/linux/lockd/xdr.h +++ b/include/linux/lockd/xdr.h @@ -69,7 +69,7 @@ typedef struct nlm_args nlm_args; */ struct nlm_res { struct nlm_cookie cookie; - u32 status; + __be32 status; struct nlm_lock lock; }; @@ -80,9 +80,9 @@ struct nlm_reboot { char * mon; int len; u32 state; - u32 addr; - u32 vers; - u32 proto; + __be32 addr; + __be32 vers; + __be32 proto; }; /* diff --git a/include/linux/lockdep.h b/include/linux/lockdep.h index 819f08f1310..ea097dddc44 100644 --- a/include/linux/lockdep.h +++ b/include/linux/lockdep.h @@ -193,7 +193,6 @@ extern void lockdep_free_key_range(void *start, unsigned long size); extern void lockdep_off(void); extern void lockdep_on(void); -extern int lockdep_internal(void); /* * These methods are used by specific locking variants (spinlocks, @@ -243,6 +242,8 @@ extern void lock_release(struct lockdep_map *lock, int nested, # define INIT_LOCKDEP .lockdep_recursion = 0, +#define lockdep_depth(tsk) ((tsk)->lockdep_depth) + #else /* !LOCKDEP */ static inline void lockdep_off(void) @@ -253,11 +254,6 @@ static inline void lockdep_on(void) { } -static inline int lockdep_internal(void) -{ - return 0; -} - # define lock_acquire(l, s, t, r, c, i) do { } while (0) # define lock_release(l, n, i) do { } while (0) # define lockdep_init() do { } while (0) @@ -277,20 +273,33 @@ static inline int lockdep_internal(void) * The class key takes no space if lockdep is disabled: */ struct lock_class_key { }; + +#define lockdep_depth(tsk) (0) + #endif /* !LOCKDEP */ #if defined(CONFIG_TRACE_IRQFLAGS) && defined(CONFIG_GENERIC_HARDIRQS) extern void early_init_irq_lock_class(void); #else -# define early_init_irq_lock_class() do { } while (0) +static inline void early_init_irq_lock_class(void) +{ +} #endif #ifdef CONFIG_TRACE_IRQFLAGS extern void early_boot_irqs_off(void); extern void early_boot_irqs_on(void); +extern void print_irqtrace_events(struct task_struct *curr); #else -# define early_boot_irqs_off() do { } while (0) -# define early_boot_irqs_on() do { } while (0) +static inline void early_boot_irqs_off(void) +{ +} +static inline void early_boot_irqs_on(void) +{ +} +static inline void print_irqtrace_events(struct task_struct *curr) +{ +} #endif /* diff --git a/include/linux/log2.h b/include/linux/log2.h new file mode 100644 index 00000000000..d02e1a547a7 --- /dev/null +++ b/include/linux/log2.h @@ -0,0 +1,157 @@ +/* Integer base 2 logarithm calculation + * + * Copyright (C) 2006 Red Hat, Inc. All Rights Reserved. + * Written by David Howells (dhowells@redhat.com) + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ + +#ifndef _LINUX_LOG2_H +#define _LINUX_LOG2_H + +#include <linux/types.h> +#include <linux/bitops.h> + +/* + * deal with unrepresentable constant logarithms + */ +extern __attribute__((const, noreturn)) +int ____ilog2_NaN(void); + +/* + * non-constant log of base 2 calculators + * - the arch may override these in asm/bitops.h if they can be implemented + * more efficiently than using fls() and fls64() + * - the arch is not required to handle n==0 if implementing the fallback + */ +#ifndef CONFIG_ARCH_HAS_ILOG2_U32 +static inline __attribute__((const)) +int __ilog2_u32(u32 n) +{ + return fls(n) - 1; +} +#endif + +#ifndef CONFIG_ARCH_HAS_ILOG2_U64 +static inline __attribute__((const)) +int __ilog2_u64(u64 n) +{ + return fls64(n) - 1; +} +#endif + +/* + * round up to nearest power of two + */ +static inline __attribute__((const)) +unsigned long __roundup_pow_of_two(unsigned long n) +{ + return 1UL << fls_long(n - 1); +} + +/** + * ilog2 - log of base 2 of 32-bit or a 64-bit unsigned value + * @n - parameter + * + * constant-capable log of base 2 calculation + * - this can be used to initialise global variables from constant data, hence + * the massive ternary operator construction + * + * selects the appropriately-sized optimised version depending on sizeof(n) + */ +#define ilog2(n) \ +( \ + __builtin_constant_p(n) ? ( \ + (n) < 1 ? ____ilog2_NaN() : \ + (n) & (1ULL << 63) ? 63 : \ + (n) & (1ULL << 62) ? 62 : \ + (n) & (1ULL << 61) ? 61 : \ + (n) & (1ULL << 60) ? 60 : \ + (n) & (1ULL << 59) ? 59 : \ + (n) & (1ULL << 58) ? 58 : \ + (n) & (1ULL << 57) ? 57 : \ + (n) & (1ULL << 56) ? 56 : \ + (n) & (1ULL << 55) ? 55 : \ + (n) & (1ULL << 54) ? 54 : \ + (n) & (1ULL << 53) ? 53 : \ + (n) & (1ULL << 52) ? 52 : \ + (n) & (1ULL << 51) ? 51 : \ + (n) & (1ULL << 50) ? 50 : \ + (n) & (1ULL << 49) ? 49 : \ + (n) & (1ULL << 48) ? 48 : \ + (n) & (1ULL << 47) ? 47 : \ + (n) & (1ULL << 46) ? 46 : \ + (n) & (1ULL << 45) ? 45 : \ + (n) & (1ULL << 44) ? 44 : \ + (n) & (1ULL << 43) ? 43 : \ + (n) & (1ULL << 42) ? 42 : \ + (n) & (1ULL << 41) ? 41 : \ + (n) & (1ULL << 40) ? 40 : \ + (n) & (1ULL << 39) ? 39 : \ + (n) & (1ULL << 38) ? 38 : \ + (n) & (1ULL << 37) ? 37 : \ + (n) & (1ULL << 36) ? 36 : \ + (n) & (1ULL << 35) ? 35 : \ + (n) & (1ULL << 34) ? 34 : \ + (n) & (1ULL << 33) ? 33 : \ + (n) & (1ULL << 32) ? 32 : \ + (n) & (1ULL << 31) ? 31 : \ + (n) & (1ULL << 30) ? 30 : \ + (n) & (1ULL << 29) ? 29 : \ + (n) & (1ULL << 28) ? 28 : \ + (n) & (1ULL << 27) ? 27 : \ + (n) & (1ULL << 26) ? 26 : \ + (n) & (1ULL << 25) ? 25 : \ + (n) & (1ULL << 24) ? 24 : \ + (n) & (1ULL << 23) ? 23 : \ + (n) & (1ULL << 22) ? 22 : \ + (n) & (1ULL << 21) ? 21 : \ + (n) & (1ULL << 20) ? 20 : \ + (n) & (1ULL << 19) ? 19 : \ + (n) & (1ULL << 18) ? 18 : \ + (n) & (1ULL << 17) ? 17 : \ + (n) & (1ULL << 16) ? 16 : \ + (n) & (1ULL << 15) ? 15 : \ + (n) & (1ULL << 14) ? 14 : \ + (n) & (1ULL << 13) ? 13 : \ + (n) & (1ULL << 12) ? 12 : \ + (n) & (1ULL << 11) ? 11 : \ + (n) & (1ULL << 10) ? 10 : \ + (n) & (1ULL << 9) ? 9 : \ + (n) & (1ULL << 8) ? 8 : \ + (n) & (1ULL << 7) ? 7 : \ + (n) & (1ULL << 6) ? 6 : \ + (n) & (1ULL << 5) ? 5 : \ + (n) & (1ULL << 4) ? 4 : \ + (n) & (1ULL << 3) ? 3 : \ + (n) & (1ULL << 2) ? 2 : \ + (n) & (1ULL << 1) ? 1 : \ + (n) & (1ULL << 0) ? 0 : \ + ____ilog2_NaN() \ + ) : \ + (sizeof(n) <= 4) ? \ + __ilog2_u32(n) : \ + __ilog2_u64(n) \ + ) + +/** + * roundup_pow_of_two - round the given value up to nearest power of two + * @n - parameter + * + * round the given balue up to the nearest power of two + * - the result is undefined when n == 0 + * - this can be used to initialise global variables from constant data + */ +#define roundup_pow_of_two(n) \ +( \ + __builtin_constant_p(n) ? ( \ + (n == 1) ? 0 : \ + (1UL << (ilog2((n) - 1) + 1)) \ + ) : \ + __roundup_pow_of_two(n) \ + ) + +#endif /* _LINUX_LOG2_H */ diff --git a/include/linux/magic.h b/include/linux/magic.h index 156c40fc664..b78bbf42135 100644 --- a/include/linux/magic.h +++ b/include/linux/magic.h @@ -3,6 +3,7 @@ #define ADFS_SUPER_MAGIC 0xadf5 #define AFFS_SUPER_MAGIC 0xadff +#define AFS_SUPER_MAGIC 0x5346414F #define AUTOFS_SUPER_MAGIC 0x0187 #define CODA_SUPER_MAGIC 0x73757245 #define EFS_SUPER_MAGIC 0x414A53 diff --git a/include/linux/miscdevice.h b/include/linux/miscdevice.h index b03cfb91e22..326da7d500c 100644 --- a/include/linux/miscdevice.h +++ b/include/linux/miscdevice.h @@ -31,15 +31,14 @@ #define HPET_MINOR 228 struct device; -struct class_device; struct miscdevice { int minor; const char *name; const struct file_operations *fops; struct list_head list; - struct device *dev; - struct class_device *class; + struct device *parent; + struct device *this_device; }; extern int misc_register(struct miscdevice * misc); diff --git a/include/linux/mm.h b/include/linux/mm.h index d538de90196..76912231af4 100644 --- a/include/linux/mm.h +++ b/include/linux/mm.h @@ -114,6 +114,8 @@ struct vm_area_struct { #endif }; +extern struct kmem_cache *vm_area_cachep; + /* * This struct defines the per-mm list of VMAs for uClinux. If CONFIG_MMU is * disabled, then there's a single shared list of VMAs maintained by the @@ -294,6 +296,24 @@ void put_pages_list(struct list_head *pages); void split_page(struct page *page, unsigned int order); /* + * Compound pages have a destructor function. Provide a + * prototype for that function and accessor functions. + * These are _only_ valid on the head of a PG_compound page. + */ +typedef void compound_page_dtor(struct page *); + +static inline void set_compound_page_dtor(struct page *page, + compound_page_dtor *dtor) +{ + page[1].lru.next = (void *)dtor; +} + +static inline compound_page_dtor *get_compound_page_dtor(struct page *page) +{ + return (compound_page_dtor *)page[1].lru.next; +} + +/* * Multiple processes may "see" the same page. E.g. for untouched * mappings of /dev/null, all processes see the same page full of * zeroes, and text pages of executables and shared libraries have @@ -396,7 +416,9 @@ void split_page(struct page *page, unsigned int order); * We are going to use the flags for the page to node mapping if its in * there. This includes the case where there is no node, so it is implicit. */ -#define FLAGS_HAS_NODE (NODES_WIDTH > 0 || NODES_SHIFT == 0) +#if !(NODES_WIDTH > 0 || NODES_SHIFT == 0) +#define NODE_NOT_IN_PAGE_FLAGS +#endif #ifndef PFN_SECTION_SHIFT #define PFN_SECTION_SHIFT 0 @@ -411,13 +433,18 @@ void split_page(struct page *page, unsigned int order); #define NODES_PGSHIFT (NODES_PGOFF * (NODES_WIDTH != 0)) #define ZONES_PGSHIFT (ZONES_PGOFF * (ZONES_WIDTH != 0)) -/* NODE:ZONE or SECTION:ZONE is used to lookup the zone from a page. */ -#if FLAGS_HAS_NODE -#define ZONETABLE_SHIFT (NODES_SHIFT + ZONES_SHIFT) +/* NODE:ZONE or SECTION:ZONE is used to ID a zone for the buddy allcator */ +#ifdef NODE_NOT_IN_PAGEFLAGS +#define ZONEID_SHIFT (SECTIONS_SHIFT + ZONES_SHIFT) +#else +#define ZONEID_SHIFT (NODES_SHIFT + ZONES_SHIFT) +#endif + +#if ZONES_WIDTH > 0 +#define ZONEID_PGSHIFT ZONES_PGSHIFT #else -#define ZONETABLE_SHIFT (SECTIONS_SHIFT + ZONES_SHIFT) +#define ZONEID_PGSHIFT NODES_PGOFF #endif -#define ZONETABLE_PGSHIFT ZONES_PGSHIFT #if SECTIONS_WIDTH+NODES_WIDTH+ZONES_WIDTH > FLAGS_RESERVED #error SECTIONS_WIDTH+NODES_WIDTH+ZONES_WIDTH > FLAGS_RESERVED @@ -426,26 +453,28 @@ void split_page(struct page *page, unsigned int order); #define ZONES_MASK ((1UL << ZONES_WIDTH) - 1) #define NODES_MASK ((1UL << NODES_WIDTH) - 1) #define SECTIONS_MASK ((1UL << SECTIONS_WIDTH) - 1) -#define ZONETABLE_MASK ((1UL << ZONETABLE_SHIFT) - 1) +#define ZONEID_MASK ((1UL << ZONEID_SHIFT) - 1) static inline enum zone_type page_zonenum(struct page *page) { return (page->flags >> ZONES_PGSHIFT) & ZONES_MASK; } -struct zone; -extern struct zone *zone_table[]; - +/* + * The identification function is only used by the buddy allocator for + * determining if two pages could be buddies. We are not really + * identifying a zone since we could be using a the section number + * id if we have not node id available in page flags. + * We guarantee only that it will return the same value for two + * combinable pages in a zone. + */ static inline int page_zone_id(struct page *page) { - return (page->flags >> ZONETABLE_PGSHIFT) & ZONETABLE_MASK; -} -static inline struct zone *page_zone(struct page *page) -{ - return zone_table[page_zone_id(page)]; + BUILD_BUG_ON(ZONEID_PGSHIFT == 0 && ZONEID_MASK); + return (page->flags >> ZONEID_PGSHIFT) & ZONEID_MASK; } -static inline unsigned long zone_to_nid(struct zone *zone) +static inline int zone_to_nid(struct zone *zone) { #ifdef CONFIG_NUMA return zone->node; @@ -454,13 +483,20 @@ static inline unsigned long zone_to_nid(struct zone *zone) #endif } -static inline unsigned long page_to_nid(struct page *page) +#ifdef NODE_NOT_IN_PAGE_FLAGS +extern int page_to_nid(struct page *page); +#else +static inline int page_to_nid(struct page *page) +{ + return (page->flags >> NODES_PGSHIFT) & NODES_MASK; +} +#endif + +static inline struct zone *page_zone(struct page *page) { - if (FLAGS_HAS_NODE) - return (page->flags >> NODES_PGSHIFT) & NODES_MASK; - else - return zone_to_nid(page_zone(page)); + return &NODE_DATA(page_to_nid(page))->node_zones[page_zonenum(page)]; } + static inline unsigned long page_to_section(struct page *page) { return (page->flags >> SECTIONS_PGSHIFT) & SECTIONS_MASK; @@ -477,6 +513,7 @@ static inline void set_page_node(struct page *page, unsigned long node) page->flags &= ~(NODES_MASK << NODES_PGSHIFT); page->flags |= (node & NODES_MASK) << NODES_PGSHIFT; } + static inline void set_page_section(struct page *page, unsigned long section) { page->flags &= ~(SECTIONS_MASK << SECTIONS_PGSHIFT); @@ -941,14 +978,13 @@ extern int early_pfn_to_nid(unsigned long pfn); #endif /* CONFIG_HAVE_ARCH_EARLY_PFN_TO_NID */ #endif /* CONFIG_ARCH_POPULATES_NODE_MAP */ extern void set_dma_reserve(unsigned long new_dma_reserve); -extern void memmap_init_zone(unsigned long, int, unsigned long, unsigned long); +extern void memmap_init_zone(unsigned long, int, unsigned long, + unsigned long, enum memmap_context); extern void setup_per_zone_pages_min(void); extern void mem_init(void); extern void show_mem(void); extern void si_meminfo(struct sysinfo * val); extern void si_meminfo_node(struct sysinfo *val, int nid); -extern void zonetable_add(struct zone *zone, int nid, enum zone_type zid, - unsigned long pfn, unsigned long size); #ifdef CONFIG_NUMA extern void setup_per_cpu_pageset(void); diff --git a/include/linux/mmc/card.h b/include/linux/mmc/card.h index 991a37382a2..d0e6a549761 100644 --- a/include/linux/mmc/card.h +++ b/include/linux/mmc/card.h @@ -39,6 +39,10 @@ struct mmc_csd { write_misalign:1; }; +struct mmc_ext_csd { + unsigned int hs_max_dtr; +}; + struct sd_scr { unsigned char sda_vsn; unsigned char bus_widths; @@ -46,6 +50,10 @@ struct sd_scr { #define SD_SCR_BUS_WIDTH_4 (1<<2) }; +struct sd_switch_caps { + unsigned int hs_max_dtr; +}; + struct mmc_host; /* @@ -62,12 +70,15 @@ struct mmc_card { #define MMC_STATE_BAD (1<<2) /* unrecognised device */ #define MMC_STATE_SDCARD (1<<3) /* is an SD card */ #define MMC_STATE_READONLY (1<<4) /* card is read-only */ +#define MMC_STATE_HIGHSPEED (1<<5) /* card is in high speed mode */ u32 raw_cid[4]; /* raw card CID */ u32 raw_csd[4]; /* raw card CSD */ u32 raw_scr[2]; /* raw card SCR */ struct mmc_cid cid; /* card identification */ struct mmc_csd csd; /* card specific */ + struct mmc_ext_csd ext_csd; /* mmc v4 extended card specific */ struct sd_scr scr; /* extra SD information */ + struct sd_switch_caps sw_caps; /* switch (CMD6) caps */ }; #define mmc_card_present(c) ((c)->state & MMC_STATE_PRESENT) @@ -75,12 +86,14 @@ struct mmc_card { #define mmc_card_bad(c) ((c)->state & MMC_STATE_BAD) #define mmc_card_sd(c) ((c)->state & MMC_STATE_SDCARD) #define mmc_card_readonly(c) ((c)->state & MMC_STATE_READONLY) +#define mmc_card_highspeed(c) ((c)->state & MMC_STATE_HIGHSPEED) #define mmc_card_set_present(c) ((c)->state |= MMC_STATE_PRESENT) #define mmc_card_set_dead(c) ((c)->state |= MMC_STATE_DEAD) #define mmc_card_set_bad(c) ((c)->state |= MMC_STATE_BAD) #define mmc_card_set_sd(c) ((c)->state |= MMC_STATE_SDCARD) #define mmc_card_set_readonly(c) ((c)->state |= MMC_STATE_READONLY) +#define mmc_card_set_highspeed(c) ((c)->state |= MMC_STATE_HIGHSPEED) #define mmc_card_name(c) ((c)->cid.prod_name) #define mmc_card_id(c) ((c)->dev.bus_id) diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h index 587264a58d5..c15ae1986b9 100644 --- a/include/linux/mmc/host.h +++ b/include/linux/mmc/host.h @@ -74,8 +74,8 @@ struct mmc_card; struct device; struct mmc_host { - struct device *dev; - struct class_device class_dev; + struct device *parent; + struct device class_dev; int index; const struct mmc_host_ops *ops; unsigned int f_min; @@ -110,7 +110,7 @@ struct mmc_host { struct mmc_card *card_busy; /* the MMC card claiming host */ struct mmc_card *card_selected; /* the selected MMC card */ - struct work_struct detect; + struct delayed_work detect; unsigned long private[0] ____cacheline_aligned; }; @@ -125,8 +125,8 @@ static inline void *mmc_priv(struct mmc_host *host) return (void *)host->private; } -#define mmc_dev(x) ((x)->dev) -#define mmc_hostname(x) ((x)->class_dev.class_id) +#define mmc_dev(x) ((x)->parent) +#define mmc_hostname(x) ((x)->class_dev.bus_id) extern int mmc_suspend_host(struct mmc_host *, pm_message_t); extern int mmc_resume_host(struct mmc_host *); diff --git a/include/linux/mmc/protocol.h b/include/linux/mmc/protocol.h index 08dec8d9e70..2dce60c43f4 100644 --- a/include/linux/mmc/protocol.h +++ b/include/linux/mmc/protocol.h @@ -25,14 +25,16 @@ #ifndef MMC_MMC_PROTOCOL_H #define MMC_MMC_PROTOCOL_H -/* Standard MMC commands (3.1) type argument response */ +/* Standard MMC commands (4.1) type argument response */ /* class 1 */ #define MMC_GO_IDLE_STATE 0 /* bc */ #define MMC_SEND_OP_COND 1 /* bcr [31:0] OCR R3 */ #define MMC_ALL_SEND_CID 2 /* bcr R2 */ #define MMC_SET_RELATIVE_ADDR 3 /* ac [31:16] RCA R1 */ #define MMC_SET_DSR 4 /* bc [31:16] RCA */ +#define MMC_SWITCH 6 /* ac [31:0] See below R1b */ #define MMC_SELECT_CARD 7 /* ac [31:16] RCA R1 */ +#define MMC_SEND_EXT_CSD 8 /* adtc R1 */ #define MMC_SEND_CSD 9 /* ac [31:16] RCA R2 */ #define MMC_SEND_CID 10 /* ac [31:16] RCA R2 */ #define MMC_READ_DAT_UNTIL_STOP 11 /* adtc [31:0] dadr R1 */ @@ -80,6 +82,7 @@ /* class 8 */ /* This is basically the same command as for MMC with some quirks. */ #define SD_SEND_RELATIVE_ADDR 3 /* bcr R6 */ +#define SD_SWITCH 6 /* adtc [31:0] See below R1 */ /* Application commands */ #define SD_APP_SET_BUS_WIDTH 6 /* ac [1:0] bus width R1 */ @@ -88,6 +91,30 @@ #define SD_APP_SEND_SCR 51 /* adtc R1 */ /* + * MMC_SWITCH argument format: + * + * [31:26] Always 0 + * [25:24] Access Mode + * [23:16] Location of target Byte in EXT_CSD + * [15:08] Value Byte + * [07:03] Always 0 + * [02:00] Command Set + */ + +/* + * SD_SWITCH argument format: + * + * [31] Check (0) or switch (1) + * [30:24] Reserved (0) + * [23:20] Function group 6 + * [19:16] Function group 5 + * [15:12] Function group 4 + * [11:8] Function group 3 + * [7:4] Function group 2 + * [3:0] Function group 1 + */ + +/* MMC status in R1 Type e : error bit @@ -230,13 +257,54 @@ struct _mmc_csd { #define CSD_STRUCT_VER_1_0 0 /* Valid for system specification 1.0 - 1.2 */ #define CSD_STRUCT_VER_1_1 1 /* Valid for system specification 1.4 - 2.2 */ -#define CSD_STRUCT_VER_1_2 2 /* Valid for system specification 3.1 */ +#define CSD_STRUCT_VER_1_2 2 /* Valid for system specification 3.1 - 3.2 - 3.31 - 4.0 - 4.1 */ +#define CSD_STRUCT_EXT_CSD 3 /* Version is coded in CSD_STRUCTURE in EXT_CSD */ #define CSD_SPEC_VER_0 0 /* Implements system specification 1.0 - 1.2 */ #define CSD_SPEC_VER_1 1 /* Implements system specification 1.4 */ #define CSD_SPEC_VER_2 2 /* Implements system specification 2.0 - 2.2 */ -#define CSD_SPEC_VER_3 3 /* Implements system specification 3.1 */ +#define CSD_SPEC_VER_3 3 /* Implements system specification 3.1 - 3.2 - 3.31 */ +#define CSD_SPEC_VER_4 4 /* Implements system specification 4.0 - 4.1 */ + +/* + * EXT_CSD fields + */ + +#define EXT_CSD_BUS_WIDTH 183 /* R/W */ +#define EXT_CSD_HS_TIMING 185 /* R/W */ +#define EXT_CSD_CARD_TYPE 196 /* RO */ + +/* + * EXT_CSD field definitions + */ + +#define EXT_CSD_CMD_SET_NORMAL (1<<0) +#define EXT_CSD_CMD_SET_SECURE (1<<1) +#define EXT_CSD_CMD_SET_CPSECURE (1<<2) + +#define EXT_CSD_CARD_TYPE_26 (1<<0) /* Card can run at 26MHz */ +#define EXT_CSD_CARD_TYPE_52 (1<<1) /* Card can run at 52MHz */ + +#define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */ +#define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */ +#define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */ + +/* + * MMC_SWITCH access modes + */ + +#define MMC_SWITCH_MODE_CMD_SET 0x00 /* Change the command set */ +#define MMC_SWITCH_MODE_SET_BITS 0x01 /* Set bits which are 1 in value */ +#define MMC_SWITCH_MODE_CLEAR_BITS 0x02 /* Clear bits which are 1 in value */ +#define MMC_SWITCH_MODE_WRITE_BYTE 0x03 /* Set target to value */ + +/* + * SCR field definitions + */ +#define SCR_SPEC_VER_0 0 /* Implements system specification 1.0 - 1.01 */ +#define SCR_SPEC_VER_1 1 /* Implements system specification 1.10 */ +#define SCR_SPEC_VER_2 2 /* Implements system specification 2.00 */ /* * SD bus widths diff --git a/include/linux/mmzone.h b/include/linux/mmzone.h index e06683e2bea..b262f47961f 100644 --- a/include/linux/mmzone.h +++ b/include/linux/mmzone.h @@ -278,7 +278,7 @@ struct zone { /* * rarely used fields: */ - char *name; + const char *name; } ____cacheline_internodealigned_in_smp; /* @@ -288,19 +288,94 @@ struct zone { */ #define DEF_PRIORITY 12 +/* Maximum number of zones on a zonelist */ +#define MAX_ZONES_PER_ZONELIST (MAX_NUMNODES * MAX_NR_ZONES) + +#ifdef CONFIG_NUMA +/* + * We cache key information from each zonelist for smaller cache + * footprint when scanning for free pages in get_page_from_freelist(). + * + * 1) The BITMAP fullzones tracks which zones in a zonelist have come + * up short of free memory since the last time (last_fullzone_zap) + * we zero'd fullzones. + * 2) The array z_to_n[] maps each zone in the zonelist to its node + * id, so that we can efficiently evaluate whether that node is + * set in the current tasks mems_allowed. + * + * Both fullzones and z_to_n[] are one-to-one with the zonelist, + * indexed by a zones offset in the zonelist zones[] array. + * + * The get_page_from_freelist() routine does two scans. During the + * first scan, we skip zones whose corresponding bit in 'fullzones' + * is set or whose corresponding node in current->mems_allowed (which + * comes from cpusets) is not set. During the second scan, we bypass + * this zonelist_cache, to ensure we look methodically at each zone. + * + * Once per second, we zero out (zap) fullzones, forcing us to + * reconsider nodes that might have regained more free memory. + * The field last_full_zap is the time we last zapped fullzones. + * + * This mechanism reduces the amount of time we waste repeatedly + * reexaming zones for free memory when they just came up low on + * memory momentarilly ago. + * + * The zonelist_cache struct members logically belong in struct + * zonelist. However, the mempolicy zonelists constructed for + * MPOL_BIND are intentionally variable length (and usually much + * shorter). A general purpose mechanism for handling structs with + * multiple variable length members is more mechanism than we want + * here. We resort to some special case hackery instead. + * + * The MPOL_BIND zonelists don't need this zonelist_cache (in good + * part because they are shorter), so we put the fixed length stuff + * at the front of the zonelist struct, ending in a variable length + * zones[], as is needed by MPOL_BIND. + * + * Then we put the optional zonelist cache on the end of the zonelist + * struct. This optional stuff is found by a 'zlcache_ptr' pointer in + * the fixed length portion at the front of the struct. This pointer + * both enables us to find the zonelist cache, and in the case of + * MPOL_BIND zonelists, (which will just set the zlcache_ptr to NULL) + * to know that the zonelist cache is not there. + * + * The end result is that struct zonelists come in two flavors: + * 1) The full, fixed length version, shown below, and + * 2) The custom zonelists for MPOL_BIND. + * The custom MPOL_BIND zonelists have a NULL zlcache_ptr and no zlcache. + * + * Even though there may be multiple CPU cores on a node modifying + * fullzones or last_full_zap in the same zonelist_cache at the same + * time, we don't lock it. This is just hint data - if it is wrong now + * and then, the allocator will still function, perhaps a bit slower. + */ + + +struct zonelist_cache { + unsigned short z_to_n[MAX_ZONES_PER_ZONELIST]; /* zone->nid */ + DECLARE_BITMAP(fullzones, MAX_ZONES_PER_ZONELIST); /* zone full? */ + unsigned long last_full_zap; /* when last zap'd (jiffies) */ +}; +#else +struct zonelist_cache; +#endif + /* * One allocation request operates on a zonelist. A zonelist * is a list of zones, the first one is the 'goal' of the * allocation, the other zones are fallback zones, in decreasing * priority. * - * Right now a zonelist takes up less than a cacheline. We never - * modify it apart from boot-up, and only a few indices are used, - * so despite the zonelist table being relatively big, the cache - * footprint of this construct is very small. + * If zlcache_ptr is not NULL, then it is just the address of zlcache, + * as explained above. If zlcache_ptr is NULL, there is no zlcache. */ + struct zonelist { - struct zone *zones[MAX_NUMNODES * MAX_NR_ZONES + 1]; // NULL delimited + struct zonelist_cache *zlcache_ptr; // NULL or &zlcache + struct zone *zones[MAX_ZONES_PER_ZONELIST + 1]; // NULL delimited +#ifdef CONFIG_NUMA + struct zonelist_cache zlcache; // optional ... +#endif }; #ifdef CONFIG_ARCH_POPULATES_NODE_MAP @@ -375,9 +450,13 @@ void build_all_zonelists(void); void wakeup_kswapd(struct zone *zone, int order); int zone_watermark_ok(struct zone *z, int order, unsigned long mark, int classzone_idx, int alloc_flags); - +enum memmap_context { + MEMMAP_EARLY, + MEMMAP_HOTPLUG, +}; extern int init_currently_empty_zone(struct zone *zone, unsigned long start_pfn, - unsigned long size); + unsigned long size, + enum memmap_context context); #ifdef CONFIG_HAVE_MEMORY_PRESENT void memory_present(int nid, unsigned long start, unsigned long end); diff --git a/include/linux/mnt_namespace.h b/include/linux/mnt_namespace.h new file mode 100644 index 00000000000..4af0b1fc282 --- /dev/null +++ b/include/linux/mnt_namespace.h @@ -0,0 +1,42 @@ +#ifndef _NAMESPACE_H_ +#define _NAMESPACE_H_ +#ifdef __KERNEL__ + +#include <linux/mount.h> +#include <linux/sched.h> +#include <linux/nsproxy.h> + +struct mnt_namespace { + atomic_t count; + struct vfsmount * root; + struct list_head list; + wait_queue_head_t poll; + int event; +}; + +extern int copy_mnt_ns(int, struct task_struct *); +extern void __put_mnt_ns(struct mnt_namespace *ns); +extern struct mnt_namespace *dup_mnt_ns(struct task_struct *, + struct fs_struct *); + +static inline void put_mnt_ns(struct mnt_namespace *ns) +{ + if (atomic_dec_and_lock(&ns->count, &vfsmount_lock)) + /* releases vfsmount_lock */ + __put_mnt_ns(ns); +} + +static inline void exit_mnt_ns(struct task_struct *p) +{ + struct mnt_namespace *ns = p->nsproxy->mnt_ns; + if (ns) + put_mnt_ns(ns); +} + +static inline void get_mnt_ns(struct mnt_namespace *ns) +{ + atomic_inc(&ns->count); +} + +#endif +#endif diff --git a/include/linux/module.h b/include/linux/module.h index d1d00ce8f4e..10f771a4999 100644 --- a/include/linux/module.h +++ b/include/linux/module.h @@ -6,7 +6,6 @@ * Rewritten by Richard Henderson <rth@tamu.edu> Dec 1996 * Rewritten again by Rusty Russell, 2002 */ -#include <linux/sched.h> #include <linux/spinlock.h> #include <linux/list.h> #include <linux/stat.h> @@ -264,6 +263,7 @@ struct module struct module_attribute *modinfo_attrs; const char *version; const char *srcversion; + struct kobject *drivers_dir; /* Exported symbols */ const struct kernel_symbol *syms; @@ -319,6 +319,13 @@ struct module unsigned int taints; /* same bits as kernel:tainted */ +#ifdef CONFIG_GENERIC_BUG + /* Support for BUG */ + struct list_head bug_list; + struct bug_entry *bug_table; + unsigned num_bugs; +#endif + #ifdef CONFIG_MODULE_UNLOAD /* Reference counts */ struct module_ref ref[NR_CPUS]; @@ -410,17 +417,7 @@ static inline int try_module_get(struct module *module) return ret; } -static inline void module_put(struct module *module) -{ - if (module) { - unsigned int cpu = get_cpu(); - local_dec(&module->ref[cpu].count); - /* Maybe they're waiting for us to drop reference? */ - if (unlikely(!module_is_live(module))) - wake_up_process(module->waiter); - put_cpu(); - } -} +extern void module_put(struct module *module); #else /*!CONFIG_MODULE_UNLOAD*/ static inline int try_module_get(struct module *module) diff --git a/include/linux/moduleparam.h b/include/linux/moduleparam.h index 7c0c2c198f1..4a189dadb16 100644 --- a/include/linux/moduleparam.h +++ b/include/linux/moduleparam.h @@ -63,6 +63,9 @@ struct kparam_array not there, read bits mean it's readable, write bits mean it's writable. */ #define __module_param_call(prefix, name, set, get, arg, perm) \ + /* Default value instead of permissions? */ \ + static int __param_perm_check_##name __attribute__((unused)) = \ + BUILD_BUG_ON_ZERO((perm) < 0 || (perm) > 0777 || ((perm) & 2)); \ static char __param_str_##name[] = prefix #name; \ static struct kernel_param const __param_##name \ __attribute_used__ \ diff --git a/include/linux/mount.h b/include/linux/mount.h index 403d1a97c51..1b7e178b0d8 100644 --- a/include/linux/mount.h +++ b/include/linux/mount.h @@ -20,13 +20,14 @@ struct super_block; struct vfsmount; struct dentry; -struct namespace; +struct mnt_namespace; #define MNT_NOSUID 0x01 #define MNT_NODEV 0x02 #define MNT_NOEXEC 0x04 #define MNT_NOATIME 0x08 #define MNT_NODIRATIME 0x10 +#define MNT_RELATIME 0x20 #define MNT_SHRINKABLE 0x100 @@ -52,7 +53,7 @@ struct vfsmount { struct list_head mnt_slave_list;/* list of slave mounts */ struct list_head mnt_slave; /* slave list entry */ struct vfsmount *mnt_master; /* slave is on master->mnt_slave_list */ - struct namespace *mnt_namespace; /* containing namespace */ + struct mnt_namespace *mnt_ns; /* containing namespace */ int mnt_pinned; }; diff --git a/include/linux/mqueue.h b/include/linux/mqueue.h index 8db9d75541a..8b5a79615fb 100644 --- a/include/linux/mqueue.h +++ b/include/linux/mqueue.h @@ -18,8 +18,6 @@ #ifndef _LINUX_MQUEUE_H #define _LINUX_MQUEUE_H -#include <linux/types.h> - #define MQ_PRIO_MAX 32768 /* per-uid limit of kernel memory used by mqueue, in bytes */ #define MQ_BYTES_MAX 819200 diff --git a/include/linux/msg.h b/include/linux/msg.h index acc7c174ff0..f1b60740d64 100644 --- a/include/linux/msg.h +++ b/include/linux/msg.h @@ -92,6 +92,12 @@ struct msg_queue { struct list_head q_senders; }; +/* Helper routines for sys_msgsnd and sys_msgrcv */ +extern long do_msgsnd(int msqid, long mtype, void __user *mtext, + size_t msgsz, int msgflg); +extern long do_msgrcv(int msqid, long *pmtype, void __user *mtext, + size_t msgsz, long msgtyp, int msgflg); + #endif /* __KERNEL__ */ #endif /* _LINUX_MSG_H */ diff --git a/include/linux/mutex.h b/include/linux/mutex.h index 27c48daa318..a7544afd758 100644 --- a/include/linux/mutex.h +++ b/include/linux/mutex.h @@ -94,7 +94,7 @@ do { \ #define __MUTEX_INITIALIZER(lockname) \ { .count = ATOMIC_INIT(1) \ - , .wait_lock = SPIN_LOCK_UNLOCKED \ + , .wait_lock = __SPIN_LOCK_UNLOCKED(lockname.wait_lock) \ , .wait_list = LIST_HEAD_INIT(lockname.wait_list) \ __DEBUG_MUTEX_INITIALIZER(lockname) \ __DEP_MAP_MUTEX_INITIALIZER(lockname) } @@ -125,8 +125,10 @@ extern int fastcall mutex_lock_interruptible(struct mutex *lock); #ifdef CONFIG_DEBUG_LOCK_ALLOC extern void mutex_lock_nested(struct mutex *lock, unsigned int subclass); +extern int mutex_lock_interruptible_nested(struct mutex *lock, unsigned int subclass); #else # define mutex_lock_nested(lock, subclass) mutex_lock(lock) +# define mutex_lock_interruptible_nested(lock, subclass) mutex_lock_interruptible(lock) #endif /* diff --git a/include/linux/mv643xx.h b/include/linux/mv643xx.h index edfa012fad3..aff25c000ab 100644 --- a/include/linux/mv643xx.h +++ b/include/linux/mv643xx.h @@ -724,7 +724,7 @@ #define MV643XX_ETH_RX_FIFO_URGENT_THRESHOLD_REG(port) (0x2470 + (port<<10)) #define MV643XX_ETH_TX_FIFO_URGENT_THRESHOLD_REG(port) (0x2474 + (port<<10)) #define MV643XX_ETH_RX_MINIMAL_FRAME_SIZE_REG(port) (0x247c + (port<<10)) -#define MV643XX_ETH_RX_DISCARDED_FRAMES_COUNTER(port) (0x2484 + (port<<10) +#define MV643XX_ETH_RX_DISCARDED_FRAMES_COUNTER(port) (0x2484 + (port<<10)) #define MV643XX_ETH_PORT_DEBUG_0_REG(port) (0x248c + (port<<10)) #define MV643XX_ETH_PORT_DEBUG_1_REG(port) (0x2490 + (port<<10)) #define MV643XX_ETH_PORT_INTERNAL_ADDR_ERROR_REG(port) (0x2494 + (port<<10)) @@ -1135,7 +1135,7 @@ struct mv64xxx_i2c_pdata { #define MV643XX_ETH_DEFAULT_RX_UDP_QUEUE_1 (1<<19) #define MV643XX_ETH_DEFAULT_RX_UDP_QUEUE_2 (1<<20) #define MV643XX_ETH_DEFAULT_RX_UDP_QUEUE_3 ((1<<20) | (1<<19)) -#define MV643XX_ETH_DEFAULT_RX_UDP_QUEUE_4 ((1<<21) +#define MV643XX_ETH_DEFAULT_RX_UDP_QUEUE_4 (1<<21) #define MV643XX_ETH_DEFAULT_RX_UDP_QUEUE_5 ((1<<21) | (1<<19)) #define MV643XX_ETH_DEFAULT_RX_UDP_QUEUE_6 ((1<<21) | (1<<20)) #define MV643XX_ETH_DEFAULT_RX_UDP_QUEUE_7 ((1<<21) | (1<<20) | (1<<19)) diff --git a/include/linux/n_r3964.h b/include/linux/n_r3964.h index db4f3776978..de24af79ebd 100644 --- a/include/linux/n_r3964.h +++ b/include/linux/n_r3964.h @@ -116,7 +116,7 @@ struct r3964_message; struct r3964_client_info { spinlock_t lock; - pid_t pid; + struct pid *pid; unsigned int sig_flags; struct r3964_client_info *next; diff --git a/include/linux/namei.h b/include/linux/namei.h index f5f19606eff..d39a5a67e97 100644 --- a/include/linux/namei.h +++ b/include/linux/namei.h @@ -29,6 +29,11 @@ struct nameidata { } intent; }; +struct path { + struct vfsmount *mnt; + struct dentry *dentry; +}; + /* * Type of the last component on LOOKUP_PARENT */ diff --git a/include/linux/namespace.h b/include/linux/namespace.h deleted file mode 100644 index d137009f0b2..00000000000 --- a/include/linux/namespace.h +++ /dev/null @@ -1,42 +0,0 @@ -#ifndef _NAMESPACE_H_ -#define _NAMESPACE_H_ -#ifdef __KERNEL__ - -#include <linux/mount.h> -#include <linux/sched.h> -#include <linux/nsproxy.h> - -struct namespace { - atomic_t count; - struct vfsmount * root; - struct list_head list; - wait_queue_head_t poll; - int event; -}; - -extern int copy_namespace(int, struct task_struct *); -extern void __put_namespace(struct namespace *namespace); -extern struct namespace *dup_namespace(struct task_struct *, struct fs_struct *); - -static inline void put_namespace(struct namespace *namespace) -{ - if (atomic_dec_and_lock(&namespace->count, &vfsmount_lock)) - /* releases vfsmount_lock */ - __put_namespace(namespace); -} - -static inline void exit_namespace(struct task_struct *p) -{ - struct namespace *namespace = p->nsproxy->namespace; - if (namespace) { - put_namespace(namespace); - } -} - -static inline void get_namespace(struct namespace *namespace) -{ - atomic_inc(&namespace->count); -} - -#endif -#endif diff --git a/include/linux/nbd.h b/include/linux/nbd.h index d6b6dc09ad9..0f3e6930254 100644 --- a/include/linux/nbd.h +++ b/include/linux/nbd.h @@ -64,6 +64,7 @@ struct nbd_device { struct gendisk *disk; int blksize; u64 bytesize; + pid_t pid; /* pid of nbd-client, if attached */ }; #endif diff --git a/include/linux/ncp_fs_sb.h b/include/linux/ncp_fs_sb.h index b089d950628..a503052138b 100644 --- a/include/linux/ncp_fs_sb.h +++ b/include/linux/ncp_fs_sb.h @@ -127,10 +127,10 @@ struct ncp_server { } unexpected_packet; }; -extern void ncp_tcp_rcv_proc(void *server); -extern void ncp_tcp_tx_proc(void *server); -extern void ncpdgram_rcv_proc(void *server); -extern void ncpdgram_timeout_proc(void *server); +extern void ncp_tcp_rcv_proc(struct work_struct *work); +extern void ncp_tcp_tx_proc(struct work_struct *work); +extern void ncpdgram_rcv_proc(struct work_struct *work); +extern void ncpdgram_timeout_proc(struct work_struct *work); extern void ncpdgram_timeout_call(unsigned long server); extern void ncp_tcp_data_ready(struct sock* sk, int len); extern void ncp_tcp_write_space(struct sock* sk); diff --git a/include/linux/ncp_mount.h b/include/linux/ncp_mount.h index f46bddcdbd3..a2b549eb1ec 100644 --- a/include/linux/ncp_mount.h +++ b/include/linux/ncp_mount.h @@ -75,7 +75,7 @@ struct ncp_mount_data_kernel { unsigned int int_flags; /* internal flags */ #define NCP_IMOUNT_LOGGEDIN_POSSIBLE 0x0001 __kernel_uid32_t mounted_uid; /* Who may umount() this filesystem? */ - __kernel_pid_t wdog_pid; /* Who cares for our watchdog packets? */ + struct pid *wdog_pid; /* Who cares for our watchdog packets? */ unsigned int ncp_fd; /* The socket to the ncp port */ unsigned int time_out; /* How long should I wait after sending a NCP request? */ diff --git a/include/linux/net.h b/include/linux/net.h index 15c733b816f..f28d8a2e2c9 100644 --- a/include/linux/net.h +++ b/include/linux/net.h @@ -19,7 +19,6 @@ #define _LINUX_NET_H #include <linux/wait.h> -#include <linux/random.h> #include <asm/socket.h> struct poll_table_struct; @@ -57,6 +56,7 @@ typedef enum { #ifdef __KERNEL__ #include <linux/stringify.h> +#include <linux/random.h> #define SOCK_ASYNC_NOSPACE 0 #define SOCK_ASYNC_WAITDATA 1 @@ -196,7 +196,7 @@ extern struct socket *sockfd_lookup(int fd, int *err); extern int net_ratelimit(void); #define net_random() random32() -#define net_srandom(seed) srandom32(seed) +#define net_srandom(seed) srandom32((__force u32)seed) extern int kernel_sendmsg(struct socket *sock, struct msghdr *msg, struct kvec *vec, size_t num, size_t len); diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h index 83b8c4f1d69..fea0d9db684 100644 --- a/include/linux/netdevice.h +++ b/include/linux/netdevice.h @@ -30,6 +30,7 @@ #include <linux/if_packet.h> #ifdef __KERNEL__ +#include <linux/timer.h> #include <asm/atomic.h> #include <asm/cache.h> #include <asm/byteorder.h> @@ -38,7 +39,6 @@ #include <linux/percpu.h> #include <linux/dmaengine.h> -struct divert_blk; struct vlan_group; struct ethtool_ops; struct netpoll_info; @@ -67,6 +67,10 @@ struct netpoll_info; #define NET_RX_CN_HIGH 4 /* The storm is here */ #define NET_RX_BAD 5 /* packet dropped due to kernel error */ +/* NET_XMIT_CN is special. It does not guarantee that this packet is lost. It + * indicates that the device will soon be dropping packets, or already drops + * some packets of the same priority; prompting us to send less aggressively. */ +#define net_xmit_eval(e) ((e) == NET_XMIT_CN? 0 : (e)) #define net_xmit_errno(e) ((e) != NET_XMIT_CN ? -ENOBUFS : 0) #endif @@ -189,13 +193,20 @@ struct hh_cache { struct hh_cache *hh_next; /* Next entry */ atomic_t hh_refcnt; /* number of users */ - __be16 hh_type; /* protocol identifier, f.e ETH_P_IP +/* + * We want hh_output, hh_len, hh_lock and hh_data be a in a separate + * cache line on SMP. + * They are mostly read, but hh_refcnt may be changed quite frequently, + * incurring cache line ping pongs. + */ + __be16 hh_type ____cacheline_aligned_in_smp; + /* protocol identifier, f.e ETH_P_IP * NOTE: For VLANs, this will be the * encapuslated type. --BLG */ - int hh_len; /* length of header */ + u16 hh_len; /* length of header */ int (*hh_output)(struct sk_buff *skb); - rwlock_t hh_lock; + seqlock_t hh_lock; /* cached hardware header; allow for machine alignment needs. */ #define HH_DATA_MOD 16 @@ -517,11 +528,6 @@ struct net_device /* bridge stuff */ struct net_bridge_port *br_port; -#ifdef CONFIG_NET_DIVERT - /* this will get initialized at each interface type init routine */ - struct divert_blk *divert; -#endif /* CONFIG_NET_DIVERT */ - /* class/net/name entry */ struct class_device class_dev; /* space for optional statistics and wireless sysfs groups */ @@ -900,6 +906,7 @@ static inline void netif_poll_disable(struct net_device *dev) static inline void netif_poll_enable(struct net_device *dev) { + smp_mb__before_clear_bit(); clear_bit(__LINK_STATE_RX_SCHED, &dev->state); } diff --git a/include/linux/netfilter.h b/include/linux/netfilter.h index b7e67d1d438..d4c4c5120bc 100644 --- a/include/linux/netfilter.h +++ b/include/linux/netfilter.h @@ -117,6 +117,16 @@ void nf_unregister_hooks(struct nf_hook_ops *reg, unsigned int n); int nf_register_sockopt(struct nf_sockopt_ops *reg); void nf_unregister_sockopt(struct nf_sockopt_ops *reg); +#ifdef CONFIG_SYSCTL +/* Sysctl registration */ +struct ctl_table_header *nf_register_sysctl_table(struct ctl_table *path, + struct ctl_table *table); +void nf_unregister_sysctl_table(struct ctl_table_header *header, + struct ctl_table *table); +extern struct ctl_table nf_net_netfilter_sysctl_path[]; +extern struct ctl_table nf_net_ipv4_netfilter_sysctl_path[]; +#endif /* CONFIG_SYSCTL */ + extern struct list_head nf_hooks[NPROTO][NF_MAX_HOOKS]; /* those NF_LOG_* defines and struct nf_loginfo are legacy definitios that will @@ -282,15 +292,31 @@ extern void nf_invalidate_cache(int pf); Returns true or false. */ extern int skb_make_writable(struct sk_buff **pskb, unsigned int writable_len); -extern u_int16_t nf_csum_update(u_int32_t oldval, u_int32_t newval, - u_int32_t csum); -extern u_int16_t nf_proto_csum_update(struct sk_buff *skb, - u_int32_t oldval, u_int32_t newval, - u_int16_t csum, int pseudohdr); +static inline void nf_csum_replace4(__sum16 *sum, __be32 from, __be32 to) +{ + __be32 diff[] = { ~from, to }; + + *sum = csum_fold(csum_partial((char *)diff, sizeof(diff), ~csum_unfold(*sum))); +} + +static inline void nf_csum_replace2(__sum16 *sum, __be16 from, __be16 to) +{ + nf_csum_replace4(sum, (__force __be32)from, (__force __be32)to); +} + +extern void nf_proto_csum_replace4(__sum16 *sum, struct sk_buff *skb, + __be32 from, __be32 to, int pseudohdr); + +static inline void nf_proto_csum_replace2(__sum16 *sum, struct sk_buff *skb, + __be16 from, __be16 to, int pseudohdr) +{ + nf_proto_csum_replace4(sum, skb, (__force __be32)from, + (__force __be32)to, pseudohdr); +} struct nf_afinfo { unsigned short family; - unsigned int (*checksum)(struct sk_buff *skb, unsigned int hook, + __sum16 (*checksum)(struct sk_buff *skb, unsigned int hook, unsigned int dataoff, u_int8_t protocol); void (*saveroute)(const struct sk_buff *skb, struct nf_info *info); @@ -305,12 +331,12 @@ static inline struct nf_afinfo *nf_get_afinfo(unsigned short family) return rcu_dereference(nf_afinfo[family]); } -static inline unsigned int +static inline __sum16 nf_checksum(struct sk_buff *skb, unsigned int hook, unsigned int dataoff, u_int8_t protocol, unsigned short family) { struct nf_afinfo *afinfo; - unsigned int csum = 0; + __sum16 csum = 0; rcu_read_lock(); afinfo = nf_get_afinfo(family); @@ -331,7 +357,7 @@ extern void (*ip_nat_decode_session)(struct sk_buff *, struct flowi *); static inline void nf_nat_decode_session(struct sk_buff *skb, struct flowi *fl, int family) { -#ifdef CONFIG_IP_NF_NAT_NEEDED +#if defined(CONFIG_IP_NF_NAT_NEEDED) || defined(CONFIG_NF_NAT_NEEDED) void (*decodefn)(struct sk_buff *, struct flowi *); if (family == AF_INET && (decodefn = ip_nat_decode_session) != NULL) diff --git a/include/linux/netfilter/Kbuild b/include/linux/netfilter/Kbuild index 312bd2ffee3..6328175a1c3 100644 --- a/include/linux/netfilter/Kbuild +++ b/include/linux/netfilter/Kbuild @@ -14,6 +14,7 @@ header-y += xt_dscp.h header-y += xt_DSCP.h header-y += xt_esp.h header-y += xt_helper.h +header-y += xt_hashlimit.h header-y += xt_length.h header-y += xt_limit.h header-y += xt_mac.h @@ -21,6 +22,7 @@ header-y += xt_mark.h header-y += xt_MARK.h header-y += xt_multiport.h header-y += xt_NFQUEUE.h +header-y += xt_NFLOG.h header-y += xt_pkttype.h header-y += xt_policy.h header-y += xt_realm.h diff --git a/include/linux/netfilter/nf_conntrack_amanda.h b/include/linux/netfilter/nf_conntrack_amanda.h new file mode 100644 index 00000000000..26c223544ae --- /dev/null +++ b/include/linux/netfilter/nf_conntrack_amanda.h @@ -0,0 +1,10 @@ +#ifndef _NF_CONNTRACK_AMANDA_H +#define _NF_CONNTRACK_AMANDA_H +/* AMANDA tracking. */ + +extern unsigned int (*nf_nat_amanda_hook)(struct sk_buff **pskb, + enum ip_conntrack_info ctinfo, + unsigned int matchoff, + unsigned int matchlen, + struct nf_conntrack_expect *exp); +#endif /* _NF_CONNTRACK_AMANDA_H */ diff --git a/include/linux/netfilter/nf_conntrack_ftp.h b/include/linux/netfilter/nf_conntrack_ftp.h index ad4a41c9ce9..81453ea7e4c 100644 --- a/include/linux/netfilter/nf_conntrack_ftp.h +++ b/include/linux/netfilter/nf_conntrack_ftp.h @@ -3,16 +3,16 @@ /* FTP tracking. */ /* This enum is exposed to userspace */ -enum ip_ct_ftp_type +enum nf_ct_ftp_type { /* PORT command from client */ - IP_CT_FTP_PORT, + NF_CT_FTP_PORT, /* PASV response from server */ - IP_CT_FTP_PASV, + NF_CT_FTP_PASV, /* EPRT command from client */ - IP_CT_FTP_EPRT, + NF_CT_FTP_EPRT, /* EPSV response from server */ - IP_CT_FTP_EPSV, + NF_CT_FTP_EPSV, }; #ifdef __KERNEL__ @@ -21,23 +21,23 @@ enum ip_ct_ftp_type #define NUM_SEQ_TO_REMEMBER 2 /* This structure exists only once per master */ -struct ip_ct_ftp_master { +struct nf_ct_ftp_master { /* Valid seq positions for cmd matching after newline */ u_int32_t seq_aft_nl[IP_CT_DIR_MAX][NUM_SEQ_TO_REMEMBER]; /* 0 means seq_match_aft_nl not set */ int seq_aft_nl_num[IP_CT_DIR_MAX]; }; -struct ip_conntrack_expect; +struct nf_conntrack_expect; /* For NAT to hook in when we find a packet which describes what other * connection we should expect. */ -extern unsigned int (*ip_nat_ftp_hook)(struct sk_buff **pskb, +extern unsigned int (*nf_nat_ftp_hook)(struct sk_buff **pskb, enum ip_conntrack_info ctinfo, - enum ip_ct_ftp_type type, + enum nf_ct_ftp_type type, unsigned int matchoff, unsigned int matchlen, - struct ip_conntrack_expect *exp, + struct nf_conntrack_expect *exp, u32 *seq); #endif /* __KERNEL__ */ diff --git a/include/linux/netfilter/nf_conntrack_h323.h b/include/linux/netfilter/nf_conntrack_h323.h new file mode 100644 index 00000000000..08e2f4977c2 --- /dev/null +++ b/include/linux/netfilter/nf_conntrack_h323.h @@ -0,0 +1,92 @@ +#ifndef _NF_CONNTRACK_H323_H +#define _NF_CONNTRACK_H323_H + +#ifdef __KERNEL__ + +#include <linux/netfilter/nf_conntrack_h323_asn1.h> + +#define RAS_PORT 1719 +#define Q931_PORT 1720 +#define H323_RTP_CHANNEL_MAX 4 /* Audio, video, FAX and other */ + +/* This structure exists only once per master */ +struct nf_ct_h323_master { + + /* Original and NATed Q.931 or H.245 signal ports */ + __be16 sig_port[IP_CT_DIR_MAX]; + + /* Original and NATed RTP ports */ + __be16 rtp_port[H323_RTP_CHANNEL_MAX][IP_CT_DIR_MAX]; + + union { + /* RAS connection timeout */ + u_int32_t timeout; + + /* Next TPKT length (for separate TPKT header and data) */ + u_int16_t tpkt_len[IP_CT_DIR_MAX]; + }; +}; + +struct nf_conn; + +extern int get_h225_addr(struct nf_conn *ct, unsigned char *data, + TransportAddress *taddr, + union nf_conntrack_address *addr, __be16 *port); +extern void nf_conntrack_h245_expect(struct nf_conn *new, + struct nf_conntrack_expect *this); +extern void nf_conntrack_q931_expect(struct nf_conn *new, + struct nf_conntrack_expect *this); +extern int (*set_h245_addr_hook) (struct sk_buff **pskb, + unsigned char **data, int dataoff, + H245_TransportAddress *taddr, + union nf_conntrack_address *addr, + __be16 port); +extern int (*set_h225_addr_hook) (struct sk_buff **pskb, + unsigned char **data, int dataoff, + TransportAddress *taddr, + union nf_conntrack_address *addr, + __be16 port); +extern int (*set_sig_addr_hook) (struct sk_buff **pskb, + struct nf_conn *ct, + enum ip_conntrack_info ctinfo, + unsigned char **data, + TransportAddress *taddr, int count); +extern int (*set_ras_addr_hook) (struct sk_buff **pskb, + struct nf_conn *ct, + enum ip_conntrack_info ctinfo, + unsigned char **data, + TransportAddress *taddr, int count); +extern int (*nat_rtp_rtcp_hook) (struct sk_buff **pskb, + struct nf_conn *ct, + enum ip_conntrack_info ctinfo, + unsigned char **data, int dataoff, + H245_TransportAddress *taddr, + __be16 port, __be16 rtp_port, + struct nf_conntrack_expect *rtp_exp, + struct nf_conntrack_expect *rtcp_exp); +extern int (*nat_t120_hook) (struct sk_buff **pskb, struct nf_conn *ct, + enum ip_conntrack_info ctinfo, + unsigned char **data, int dataoff, + H245_TransportAddress *taddr, __be16 port, + struct nf_conntrack_expect *exp); +extern int (*nat_h245_hook) (struct sk_buff **pskb, struct nf_conn *ct, + enum ip_conntrack_info ctinfo, + unsigned char **data, int dataoff, + TransportAddress *taddr, __be16 port, + struct nf_conntrack_expect *exp); +extern int (*nat_callforwarding_hook) (struct sk_buff **pskb, + struct nf_conn *ct, + enum ip_conntrack_info ctinfo, + unsigned char **data, int dataoff, + TransportAddress *taddr, + __be16 port, + struct nf_conntrack_expect *exp); +extern int (*nat_q931_hook) (struct sk_buff **pskb, struct nf_conn *ct, + enum ip_conntrack_info ctinfo, + unsigned char **data, TransportAddress *taddr, + int idx, __be16 port, + struct nf_conntrack_expect *exp); + +#endif + +#endif diff --git a/include/linux/netfilter_ipv4/ip_conntrack_helper_h323_asn1.h b/include/linux/netfilter/nf_conntrack_h323_asn1.h index c6e9a0b6d30..8dab5968fc7 100644 --- a/include/linux/netfilter_ipv4/ip_conntrack_helper_h323_asn1.h +++ b/include/linux/netfilter/nf_conntrack_h323_asn1.h @@ -1,6 +1,6 @@ /**************************************************************************** - * ip_conntrack_helper_h323_asn1.h - BER and PER decoding library for H.323 - * conntrack/NAT module. + * ip_conntrack_h323_asn1.h - BER and PER decoding library for H.323 + * conntrack/NAT module. * * Copyright (c) 2006 by Jing Min Zhao <zhaojingmin@users.sourceforge.net> * @@ -34,13 +34,13 @@ * ****************************************************************************/ -#ifndef _IP_CONNTRACK_HELPER_H323_ASN1_H_ -#define _IP_CONNTRACK_HELPER_H323_ASN1_H_ +#ifndef _NF_CONNTRACK_HELPER_H323_ASN1_H_ +#define _NF_CONNTRACK_HELPER_H323_ASN1_H_ /***************************************************************************** * H.323 Types ****************************************************************************/ -#include "ip_conntrack_helper_h323_types.h" +#include "nf_conntrack_h323_types.h" typedef struct { enum { diff --git a/include/linux/netfilter_ipv4/ip_conntrack_helper_h323_types.h b/include/linux/netfilter/nf_conntrack_h323_types.h index 3d4a773799f..38d74d5c970 100644 --- a/include/linux/netfilter_ipv4/ip_conntrack_helper_h323_types.h +++ b/include/linux/netfilter/nf_conntrack_h323_types.h @@ -10,6 +10,11 @@ typedef struct TransportAddress_ipAddress { /* SEQUENCE */ unsigned ip; } TransportAddress_ipAddress; +typedef struct TransportAddress_ip6Address { /* SEQUENCE */ + int options; /* No use */ + unsigned ip6; +} TransportAddress_ip6Address; + typedef struct TransportAddress { /* CHOICE */ enum { eTransportAddress_ipAddress, @@ -22,6 +27,7 @@ typedef struct TransportAddress { /* CHOICE */ } choice; union { TransportAddress_ipAddress ipAddress; + TransportAddress_ip6Address ip6Address; }; } TransportAddress; @@ -93,6 +99,11 @@ typedef struct UnicastAddress_iPAddress { /* SEQUENCE */ unsigned network; } UnicastAddress_iPAddress; +typedef struct UnicastAddress_iP6Address { /* SEQUENCE */ + int options; /* No use */ + unsigned network; +} UnicastAddress_iP6Address; + typedef struct UnicastAddress { /* CHOICE */ enum { eUnicastAddress_iPAddress, @@ -105,6 +116,7 @@ typedef struct UnicastAddress { /* CHOICE */ } choice; union { UnicastAddress_iPAddress iPAddress; + UnicastAddress_iP6Address iP6Address; }; } UnicastAddress; diff --git a/include/linux/netfilter/nf_conntrack_irc.h b/include/linux/netfilter/nf_conntrack_irc.h new file mode 100644 index 00000000000..2ab6b825591 --- /dev/null +++ b/include/linux/netfilter/nf_conntrack_irc.h @@ -0,0 +1,15 @@ +#ifndef _NF_CONNTRACK_IRC_H +#define _NF_CONNTRACK_IRC_H + +#ifdef __KERNEL__ + +#define IRC_PORT 6667 + +extern unsigned int (*nf_nat_irc_hook)(struct sk_buff **pskb, + enum ip_conntrack_info ctinfo, + unsigned int matchoff, + unsigned int matchlen, + struct nf_conntrack_expect *exp); + +#endif /* __KERNEL__ */ +#endif /* _NF_CONNTRACK_IRC_H */ diff --git a/include/linux/netfilter/nf_conntrack_pptp.h b/include/linux/netfilter/nf_conntrack_pptp.h new file mode 100644 index 00000000000..9d8144a488c --- /dev/null +++ b/include/linux/netfilter/nf_conntrack_pptp.h @@ -0,0 +1,322 @@ +/* PPTP constants and structs */ +#ifndef _NF_CONNTRACK_PPTP_H +#define _NF_CONNTRACK_PPTP_H + +#include <linux/netfilter/nf_conntrack_common.h> + +/* state of the control session */ +enum pptp_ctrlsess_state { + PPTP_SESSION_NONE, /* no session present */ + PPTP_SESSION_ERROR, /* some session error */ + PPTP_SESSION_STOPREQ, /* stop_sess request seen */ + PPTP_SESSION_REQUESTED, /* start_sess request seen */ + PPTP_SESSION_CONFIRMED, /* session established */ +}; + +/* state of the call inside the control session */ +enum pptp_ctrlcall_state { + PPTP_CALL_NONE, + PPTP_CALL_ERROR, + PPTP_CALL_OUT_REQ, + PPTP_CALL_OUT_CONF, + PPTP_CALL_IN_REQ, + PPTP_CALL_IN_REP, + PPTP_CALL_IN_CONF, + PPTP_CALL_CLEAR_REQ, +}; + +/* conntrack private data */ +struct nf_ct_pptp_master { + enum pptp_ctrlsess_state sstate; /* session state */ + enum pptp_ctrlcall_state cstate; /* call state */ + __be16 pac_call_id; /* call id of PAC */ + __be16 pns_call_id; /* call id of PNS */ + + /* in pre-2.6.11 this used to be per-expect. Now it is per-conntrack + * and therefore imposes a fixed limit on the number of maps */ + struct nf_ct_gre_keymap *keymap[IP_CT_DIR_MAX]; +}; + +struct nf_nat_pptp { + __be16 pns_call_id; /* NAT'ed PNS call id */ + __be16 pac_call_id; /* NAT'ed PAC call id */ +}; + +#ifdef __KERNEL__ + +#define PPTP_CONTROL_PORT 1723 + +#define PPTP_PACKET_CONTROL 1 +#define PPTP_PACKET_MGMT 2 + +#define PPTP_MAGIC_COOKIE 0x1a2b3c4d + +struct pptp_pkt_hdr { + __u16 packetLength; + __be16 packetType; + __be32 magicCookie; +}; + +/* PptpControlMessageType values */ +#define PPTP_START_SESSION_REQUEST 1 +#define PPTP_START_SESSION_REPLY 2 +#define PPTP_STOP_SESSION_REQUEST 3 +#define PPTP_STOP_SESSION_REPLY 4 +#define PPTP_ECHO_REQUEST 5 +#define PPTP_ECHO_REPLY 6 +#define PPTP_OUT_CALL_REQUEST 7 +#define PPTP_OUT_CALL_REPLY 8 +#define PPTP_IN_CALL_REQUEST 9 +#define PPTP_IN_CALL_REPLY 10 +#define PPTP_IN_CALL_CONNECT 11 +#define PPTP_CALL_CLEAR_REQUEST 12 +#define PPTP_CALL_DISCONNECT_NOTIFY 13 +#define PPTP_WAN_ERROR_NOTIFY 14 +#define PPTP_SET_LINK_INFO 15 + +#define PPTP_MSG_MAX 15 + +/* PptpGeneralError values */ +#define PPTP_ERROR_CODE_NONE 0 +#define PPTP_NOT_CONNECTED 1 +#define PPTP_BAD_FORMAT 2 +#define PPTP_BAD_VALUE 3 +#define PPTP_NO_RESOURCE 4 +#define PPTP_BAD_CALLID 5 +#define PPTP_REMOVE_DEVICE_ERROR 6 + +struct PptpControlHeader { + __be16 messageType; + __u16 reserved; +}; + +/* FramingCapability Bitmap Values */ +#define PPTP_FRAME_CAP_ASYNC 0x1 +#define PPTP_FRAME_CAP_SYNC 0x2 + +/* BearerCapability Bitmap Values */ +#define PPTP_BEARER_CAP_ANALOG 0x1 +#define PPTP_BEARER_CAP_DIGITAL 0x2 + +struct PptpStartSessionRequest { + __be16 protocolVersion; + __u16 reserved1; + __be32 framingCapability; + __be32 bearerCapability; + __be16 maxChannels; + __be16 firmwareRevision; + __u8 hostName[64]; + __u8 vendorString[64]; +}; + +/* PptpStartSessionResultCode Values */ +#define PPTP_START_OK 1 +#define PPTP_START_GENERAL_ERROR 2 +#define PPTP_START_ALREADY_CONNECTED 3 +#define PPTP_START_NOT_AUTHORIZED 4 +#define PPTP_START_UNKNOWN_PROTOCOL 5 + +struct PptpStartSessionReply { + __be16 protocolVersion; + __u8 resultCode; + __u8 generalErrorCode; + __be32 framingCapability; + __be32 bearerCapability; + __be16 maxChannels; + __be16 firmwareRevision; + __u8 hostName[64]; + __u8 vendorString[64]; +}; + +/* PptpStopReasons */ +#define PPTP_STOP_NONE 1 +#define PPTP_STOP_PROTOCOL 2 +#define PPTP_STOP_LOCAL_SHUTDOWN 3 + +struct PptpStopSessionRequest { + __u8 reason; + __u8 reserved1; + __u16 reserved2; +}; + +/* PptpStopSessionResultCode */ +#define PPTP_STOP_OK 1 +#define PPTP_STOP_GENERAL_ERROR 2 + +struct PptpStopSessionReply { + __u8 resultCode; + __u8 generalErrorCode; + __u16 reserved1; +}; + +struct PptpEchoRequest { + __be32 identNumber; +}; + +/* PptpEchoReplyResultCode */ +#define PPTP_ECHO_OK 1 +#define PPTP_ECHO_GENERAL_ERROR 2 + +struct PptpEchoReply { + __be32 identNumber; + __u8 resultCode; + __u8 generalErrorCode; + __u16 reserved; +}; + +/* PptpFramingType */ +#define PPTP_ASYNC_FRAMING 1 +#define PPTP_SYNC_FRAMING 2 +#define PPTP_DONT_CARE_FRAMING 3 + +/* PptpCallBearerType */ +#define PPTP_ANALOG_TYPE 1 +#define PPTP_DIGITAL_TYPE 2 +#define PPTP_DONT_CARE_BEARER_TYPE 3 + +struct PptpOutCallRequest { + __be16 callID; + __be16 callSerialNumber; + __be32 minBPS; + __be32 maxBPS; + __be32 bearerType; + __be32 framingType; + __be16 packetWindow; + __be16 packetProcDelay; + __be16 phoneNumberLength; + __u16 reserved1; + __u8 phoneNumber[64]; + __u8 subAddress[64]; +}; + +/* PptpCallResultCode */ +#define PPTP_OUTCALL_CONNECT 1 +#define PPTP_OUTCALL_GENERAL_ERROR 2 +#define PPTP_OUTCALL_NO_CARRIER 3 +#define PPTP_OUTCALL_BUSY 4 +#define PPTP_OUTCALL_NO_DIAL_TONE 5 +#define PPTP_OUTCALL_TIMEOUT 6 +#define PPTP_OUTCALL_DONT_ACCEPT 7 + +struct PptpOutCallReply { + __be16 callID; + __be16 peersCallID; + __u8 resultCode; + __u8 generalErrorCode; + __be16 causeCode; + __be32 connectSpeed; + __be16 packetWindow; + __be16 packetProcDelay; + __be32 physChannelID; +}; + +struct PptpInCallRequest { + __be16 callID; + __be16 callSerialNumber; + __be32 callBearerType; + __be32 physChannelID; + __be16 dialedNumberLength; + __be16 dialingNumberLength; + __u8 dialedNumber[64]; + __u8 dialingNumber[64]; + __u8 subAddress[64]; +}; + +/* PptpInCallResultCode */ +#define PPTP_INCALL_ACCEPT 1 +#define PPTP_INCALL_GENERAL_ERROR 2 +#define PPTP_INCALL_DONT_ACCEPT 3 + +struct PptpInCallReply { + __be16 callID; + __be16 peersCallID; + __u8 resultCode; + __u8 generalErrorCode; + __be16 packetWindow; + __be16 packetProcDelay; + __u16 reserved; +}; + +struct PptpInCallConnected { + __be16 peersCallID; + __u16 reserved; + __be32 connectSpeed; + __be16 packetWindow; + __be16 packetProcDelay; + __be32 callFramingType; +}; + +struct PptpClearCallRequest { + __be16 callID; + __u16 reserved; +}; + +struct PptpCallDisconnectNotify { + __be16 callID; + __u8 resultCode; + __u8 generalErrorCode; + __be16 causeCode; + __u16 reserved; + __u8 callStatistics[128]; +}; + +struct PptpWanErrorNotify { + __be16 peersCallID; + __u16 reserved; + __be32 crcErrors; + __be32 framingErrors; + __be32 hardwareOverRuns; + __be32 bufferOverRuns; + __be32 timeoutErrors; + __be32 alignmentErrors; +}; + +struct PptpSetLinkInfo { + __be16 peersCallID; + __u16 reserved; + __be32 sendAccm; + __be32 recvAccm; +}; + +union pptp_ctrl_union { + struct PptpStartSessionRequest sreq; + struct PptpStartSessionReply srep; + struct PptpStopSessionRequest streq; + struct PptpStopSessionReply strep; + struct PptpOutCallRequest ocreq; + struct PptpOutCallReply ocack; + struct PptpInCallRequest icreq; + struct PptpInCallReply icack; + struct PptpInCallConnected iccon; + struct PptpClearCallRequest clrreq; + struct PptpCallDisconnectNotify disc; + struct PptpWanErrorNotify wanerr; + struct PptpSetLinkInfo setlink; +}; + +/* crap needed for nf_conntrack_compat.h */ +struct nf_conn; +struct nf_conntrack_expect; + +extern int +(*nf_nat_pptp_hook_outbound)(struct sk_buff **pskb, + struct nf_conn *ct, enum ip_conntrack_info ctinfo, + struct PptpControlHeader *ctlh, + union pptp_ctrl_union *pptpReq); + +extern int +(*nf_nat_pptp_hook_inbound)(struct sk_buff **pskb, + struct nf_conn *ct, enum ip_conntrack_info ctinfo, + struct PptpControlHeader *ctlh, + union pptp_ctrl_union *pptpReq); + +extern void +(*nf_nat_pptp_hook_exp_gre)(struct nf_conntrack_expect *exp_orig, + struct nf_conntrack_expect *exp_reply); + +extern void +(*nf_nat_pptp_hook_expectfn)(struct nf_conn *ct, + struct nf_conntrack_expect *exp); + +#endif /* __KERNEL__ */ +#endif /* _NF_CONNTRACK_PPTP_H */ diff --git a/include/linux/netfilter/nf_conntrack_proto_gre.h b/include/linux/netfilter/nf_conntrack_proto_gre.h new file mode 100644 index 00000000000..4e6bbce04ff --- /dev/null +++ b/include/linux/netfilter/nf_conntrack_proto_gre.h @@ -0,0 +1,112 @@ +#ifndef _CONNTRACK_PROTO_GRE_H +#define _CONNTRACK_PROTO_GRE_H +#include <asm/byteorder.h> + +/* GRE PROTOCOL HEADER */ + +/* GRE Version field */ +#define GRE_VERSION_1701 0x0 +#define GRE_VERSION_PPTP 0x1 + +/* GRE Protocol field */ +#define GRE_PROTOCOL_PPTP 0x880B + +/* GRE Flags */ +#define GRE_FLAG_C 0x80 +#define GRE_FLAG_R 0x40 +#define GRE_FLAG_K 0x20 +#define GRE_FLAG_S 0x10 +#define GRE_FLAG_A 0x80 + +#define GRE_IS_C(f) ((f)&GRE_FLAG_C) +#define GRE_IS_R(f) ((f)&GRE_FLAG_R) +#define GRE_IS_K(f) ((f)&GRE_FLAG_K) +#define GRE_IS_S(f) ((f)&GRE_FLAG_S) +#define GRE_IS_A(f) ((f)&GRE_FLAG_A) + +/* GRE is a mess: Four different standards */ +struct gre_hdr { +#if defined(__LITTLE_ENDIAN_BITFIELD) + __u16 rec:3, + srr:1, + seq:1, + key:1, + routing:1, + csum:1, + version:3, + reserved:4, + ack:1; +#elif defined(__BIG_ENDIAN_BITFIELD) + __u16 csum:1, + routing:1, + key:1, + seq:1, + srr:1, + rec:3, + ack:1, + reserved:4, + version:3; +#else +#error "Adjust your <asm/byteorder.h> defines" +#endif + __be16 protocol; +}; + +/* modified GRE header for PPTP */ +struct gre_hdr_pptp { + __u8 flags; /* bitfield */ + __u8 version; /* should be GRE_VERSION_PPTP */ + __be16 protocol; /* should be GRE_PROTOCOL_PPTP */ + __be16 payload_len; /* size of ppp payload, not inc. gre header */ + __be16 call_id; /* peer's call_id for this session */ + __be32 seq; /* sequence number. Present if S==1 */ + __be32 ack; /* seq number of highest packet recieved by */ + /* sender in this session */ +}; + +struct nf_ct_gre { + unsigned int stream_timeout; + unsigned int timeout; +}; + +#ifdef __KERNEL__ +#include <net/netfilter/nf_conntrack_tuple.h> + +struct nf_conn; + +/* structure for original <-> reply keymap */ +struct nf_ct_gre_keymap { + struct list_head list; + struct nf_conntrack_tuple tuple; +}; + +/* add new tuple->key_reply pair to keymap */ +int nf_ct_gre_keymap_add(struct nf_conn *ct, enum ip_conntrack_dir dir, + struct nf_conntrack_tuple *t); + +/* delete keymap entries */ +void nf_ct_gre_keymap_destroy(struct nf_conn *ct); + +/* get pointer to gre key, if present */ +static inline __be32 *gre_key(struct gre_hdr *greh) +{ + if (!greh->key) + return NULL; + if (greh->csum || greh->routing) + return (__be32 *)(greh+sizeof(*greh)+4); + return (__be32 *)(greh+sizeof(*greh)); +} + +/* get pointer ot gre csum, if present */ +static inline __sum16 *gre_csum(struct gre_hdr *greh) +{ + if (!greh->csum) + return NULL; + return (__sum16 *)(greh+sizeof(*greh)); +} + +extern void nf_ct_gre_keymap_flush(void); +extern void nf_nat_need_gre(void); + +#endif /* __KERNEL__ */ +#endif /* _CONNTRACK_PROTO_GRE_H */ diff --git a/include/linux/netfilter/nf_conntrack_sctp.h b/include/linux/netfilter/nf_conntrack_sctp.h index b8994d9fd1a..5cf2c115cce 100644 --- a/include/linux/netfilter/nf_conntrack_sctp.h +++ b/include/linux/netfilter/nf_conntrack_sctp.h @@ -20,7 +20,7 @@ struct ip_ct_sctp { enum sctp_conntrack state; - u_int32_t vtag[IP_CT_DIR_MAX]; + __be32 vtag[IP_CT_DIR_MAX]; u_int32_t ttag[IP_CT_DIR_MAX]; }; diff --git a/include/linux/netfilter/nf_conntrack_sip.h b/include/linux/netfilter/nf_conntrack_sip.h new file mode 100644 index 00000000000..bb7f2041db7 --- /dev/null +++ b/include/linux/netfilter/nf_conntrack_sip.h @@ -0,0 +1,41 @@ +#ifndef __NF_CONNTRACK_SIP_H__ +#define __NF_CONNTRACK_SIP_H__ +#ifdef __KERNEL__ + +#define SIP_PORT 5060 +#define SIP_TIMEOUT 3600 + +enum sip_header_pos { + POS_REG_REQ_URI, + POS_REQ_URI, + POS_FROM, + POS_TO, + POS_VIA, + POS_CONTACT, + POS_CONTENT, + POS_MEDIA, + POS_OWNER_IP4, + POS_CONNECTION_IP4, + POS_OWNER_IP6, + POS_CONNECTION_IP6, + POS_SDP_HEADER, +}; + +extern unsigned int (*nf_nat_sip_hook)(struct sk_buff **pskb, + enum ip_conntrack_info ctinfo, + struct nf_conn *ct, + const char **dptr); +extern unsigned int (*nf_nat_sdp_hook)(struct sk_buff **pskb, + enum ip_conntrack_info ctinfo, + struct nf_conntrack_expect *exp, + const char *dptr); + +extern int ct_sip_get_info(struct nf_conn *ct, const char *dptr, size_t dlen, + unsigned int *matchoff, unsigned int *matchlen, + enum sip_header_pos pos); +extern int ct_sip_lnlen(const char *line, const char *limit); +extern const char *ct_sip_search(const char *needle, const char *haystack, + size_t needle_len, size_t haystack_len, + int case_sensitive); +#endif /* __KERNEL__ */ +#endif /* __NF_CONNTRACK_SIP_H__ */ diff --git a/include/linux/netfilter/nf_conntrack_tcp.h b/include/linux/netfilter/nf_conntrack_tcp.h index 6b01ba29772..2f4e98b90cc 100644 --- a/include/linux/netfilter/nf_conntrack_tcp.h +++ b/include/linux/netfilter/nf_conntrack_tcp.h @@ -25,7 +25,7 @@ enum tcp_conntrack { #define IP_CT_TCP_FLAG_SACK_PERM 0x02 /* This sender sent FIN first */ -#define IP_CT_TCP_FLAG_CLOSE_INIT 0x03 +#define IP_CT_TCP_FLAG_CLOSE_INIT 0x04 #ifdef __KERNEL__ diff --git a/include/linux/netfilter/nf_conntrack_tftp.h b/include/linux/netfilter/nf_conntrack_tftp.h new file mode 100644 index 00000000000..0d79b7ae051 --- /dev/null +++ b/include/linux/netfilter/nf_conntrack_tftp.h @@ -0,0 +1,20 @@ +#ifndef _NF_CONNTRACK_TFTP_H +#define _NF_CONNTRACK_TFTP_H + +#define TFTP_PORT 69 + +struct tftphdr { + __be16 opcode; +}; + +#define TFTP_OPCODE_READ 1 +#define TFTP_OPCODE_WRITE 2 +#define TFTP_OPCODE_DATA 3 +#define TFTP_OPCODE_ACK 4 +#define TFTP_OPCODE_ERROR 5 + +extern unsigned int (*nf_nat_tftp_hook)(struct sk_buff **pskb, + enum ip_conntrack_info ctinfo, + struct nf_conntrack_expect *exp); + +#endif /* _NF_CONNTRACK_TFTP_H */ diff --git a/include/linux/netfilter/nfnetlink.h b/include/linux/netfilter/nfnetlink.h index 6d8e3e5a80e..1e9c821f152 100644 --- a/include/linux/netfilter/nfnetlink.h +++ b/include/linux/netfilter/nfnetlink.h @@ -78,7 +78,7 @@ struct nfattr struct nfgenmsg { u_int8_t nfgen_family; /* AF_xxx */ u_int8_t version; /* nfnetlink version */ - u_int16_t res_id; /* resource id */ + __be16 res_id; /* resource id */ }; #define NFNETLINK_V0 0 diff --git a/include/linux/netfilter/nfnetlink_log.h b/include/linux/netfilter/nfnetlink_log.h index 87b92f8b988..5966afa026e 100644 --- a/include/linux/netfilter/nfnetlink_log.h +++ b/include/linux/netfilter/nfnetlink_log.h @@ -16,24 +16,22 @@ enum nfulnl_msg_types { }; struct nfulnl_msg_packet_hdr { - u_int16_t hw_protocol; /* hw protocol (network order) */ + __be16 hw_protocol; /* hw protocol (network order) */ u_int8_t hook; /* netfilter hook */ u_int8_t _pad; }; struct nfulnl_msg_packet_hw { - u_int16_t hw_addrlen; + __be16 hw_addrlen; u_int16_t _pad; u_int8_t hw_addr[8]; }; struct nfulnl_msg_packet_timestamp { - aligned_u64 sec; - aligned_u64 usec; + aligned_be64 sec; + aligned_be64 usec; }; -#define NFULNL_PREFIXLEN 30 /* just like old log target */ - enum nfulnl_attr_type { NFULA_UNSPEC, NFULA_PACKET_HDR, @@ -67,7 +65,7 @@ struct nfulnl_msg_config_cmd { } __attribute__ ((packed)); struct nfulnl_msg_config_mode { - u_int32_t copy_range; + __be32 copy_range; u_int8_t copy_mode; u_int8_t _pad; } __attribute__ ((packed)); diff --git a/include/linux/netfilter/nfnetlink_queue.h b/include/linux/netfilter/nfnetlink_queue.h index 36af0360b56..83e789633e3 100644 --- a/include/linux/netfilter/nfnetlink_queue.h +++ b/include/linux/netfilter/nfnetlink_queue.h @@ -13,20 +13,20 @@ enum nfqnl_msg_types { }; struct nfqnl_msg_packet_hdr { - u_int32_t packet_id; /* unique ID of packet in queue */ - u_int16_t hw_protocol; /* hw protocol (network order) */ + __be32 packet_id; /* unique ID of packet in queue */ + __be16 hw_protocol; /* hw protocol (network order) */ u_int8_t hook; /* netfilter hook */ } __attribute__ ((packed)); struct nfqnl_msg_packet_hw { - u_int16_t hw_addrlen; + __be16 hw_addrlen; u_int16_t _pad; u_int8_t hw_addr[8]; }; struct nfqnl_msg_packet_timestamp { - aligned_u64 sec; - aligned_u64 usec; + aligned_be64 sec; + aligned_be64 usec; }; enum nfqnl_attr_type { @@ -47,8 +47,8 @@ enum nfqnl_attr_type { #define NFQA_MAX (__NFQA_MAX - 1) struct nfqnl_msg_verdict_hdr { - u_int32_t verdict; - u_int32_t id; + __be32 verdict; + __be32 id; }; @@ -63,7 +63,7 @@ enum nfqnl_msg_config_cmds { struct nfqnl_msg_config_cmd { u_int8_t command; /* nfqnl_msg_config_cmds */ u_int8_t _pad; - u_int16_t pf; /* AF_xxx for PF_[UN]BIND */ + __be16 pf; /* AF_xxx for PF_[UN]BIND */ }; enum nfqnl_config_mode { @@ -73,7 +73,7 @@ enum nfqnl_config_mode { }; struct nfqnl_msg_config_params { - u_int32_t copy_range; + __be32 copy_range; u_int8_t copy_mode; /* enum nfqnl_config_mode */ } __attribute__ ((packed)); @@ -82,6 +82,7 @@ enum nfqnl_attr_config { NFQA_CFG_UNSPEC, NFQA_CFG_CMD, /* nfqnl_msg_config_cmd */ NFQA_CFG_PARAMS, /* nfqnl_msg_config_params */ + NFQA_CFG_QUEUE_MAXLEN, /* u_int32_t */ __NFQA_CFG_MAX }; #define NFQA_CFG_MAX (__NFQA_CFG_MAX-1) diff --git a/include/linux/netfilter/xt_NFLOG.h b/include/linux/netfilter/xt_NFLOG.h new file mode 100644 index 00000000000..cdcd0ed58f7 --- /dev/null +++ b/include/linux/netfilter/xt_NFLOG.h @@ -0,0 +1,18 @@ +#ifndef _XT_NFLOG_TARGET +#define _XT_NFLOG_TARGET + +#define XT_NFLOG_DEFAULT_GROUP 0x1 +#define XT_NFLOG_DEFAULT_THRESHOLD 1 + +#define XT_NFLOG_MASK 0x0 + +struct xt_nflog_info { + u_int32_t len; + u_int16_t group; + u_int16_t threshold; + u_int16_t flags; + u_int16_t pad; + char prefix[64]; +}; + +#endif /* _XT_NFLOG_TARGET */ diff --git a/include/linux/netfilter/xt_conntrack.h b/include/linux/netfilter/xt_conntrack.h index 4c2d9945ca5..70b6f718cf4 100644 --- a/include/linux/netfilter/xt_conntrack.h +++ b/include/linux/netfilter/xt_conntrack.h @@ -29,14 +29,14 @@ struct ip_conntrack_old_tuple { struct { - __u32 ip; + __be32 ip; union { __u16 all; } u; } src; struct { - __u32 ip; + __be32 ip; union { __u16 all; } u; diff --git a/include/linux/netfilter/xt_hashlimit.h b/include/linux/netfilter/xt_hashlimit.h new file mode 100644 index 00000000000..b4556b8edbf --- /dev/null +++ b/include/linux/netfilter/xt_hashlimit.h @@ -0,0 +1,40 @@ +#ifndef _XT_HASHLIMIT_H +#define _XT_HASHLIMIT_H + +/* timings are in milliseconds. */ +#define XT_HASHLIMIT_SCALE 10000 +/* 1/10,000 sec period => max of 10,000/sec. Min rate is then 429490 + seconds, or one every 59 hours. */ + +/* details of this structure hidden by the implementation */ +struct xt_hashlimit_htable; + +#define XT_HASHLIMIT_HASH_DIP 0x0001 +#define XT_HASHLIMIT_HASH_DPT 0x0002 +#define XT_HASHLIMIT_HASH_SIP 0x0004 +#define XT_HASHLIMIT_HASH_SPT 0x0008 + +struct hashlimit_cfg { + u_int32_t mode; /* bitmask of IPT_HASHLIMIT_HASH_* */ + u_int32_t avg; /* Average secs between packets * scale */ + u_int32_t burst; /* Period multiplier for upper limit. */ + + /* user specified */ + u_int32_t size; /* how many buckets */ + u_int32_t max; /* max number of entries */ + u_int32_t gc_interval; /* gc interval */ + u_int32_t expire; /* when do entries expire? */ +}; + +struct xt_hashlimit_info { + char name [IFNAMSIZ]; /* name */ + struct hashlimit_cfg cfg; + struct xt_hashlimit_htable *hinfo; + + /* Used internally by the kernel */ + union { + void *ptr; + struct xt_hashlimit_info *master; + } u; +}; +#endif /*_XT_HASHLIMIT_H*/ diff --git a/include/linux/netfilter/xt_policy.h b/include/linux/netfilter/xt_policy.h index a8132ec076f..45654d359a6 100644 --- a/include/linux/netfilter/xt_policy.h +++ b/include/linux/netfilter/xt_policy.h @@ -39,7 +39,7 @@ struct xt_policy_elem union xt_policy_addr smask; union xt_policy_addr daddr; union xt_policy_addr dmask; - u_int32_t spi; + __be32 spi; u_int32_t reqid; u_int8_t proto; u_int8_t mode; diff --git a/include/linux/netfilter_arp/arp_tables.h b/include/linux/netfilter_arp/arp_tables.h index 0be235418a2..24c8786d12e 100644 --- a/include/linux/netfilter_arp/arp_tables.h +++ b/include/linux/netfilter_arp/arp_tables.h @@ -190,6 +190,7 @@ struct arpt_replace /* The argument to ARPT_SO_ADD_COUNTERS. */ #define arpt_counters_info xt_counters_info +#define arpt_counters xt_counters /* The argument to ARPT_SO_GET_ENTRIES. */ struct arpt_get_entries diff --git a/include/linux/netfilter_bridge.h b/include/linux/netfilter_bridge.h index 9a4dd11af86..55689f39f77 100644 --- a/include/linux/netfilter_bridge.h +++ b/include/linux/netfilter_bridge.h @@ -64,11 +64,10 @@ static inline int nf_bridge_pad(const struct sk_buff *skb) struct bridge_skb_cb { union { - __u32 ipv4; + __be32 ipv4; } daddr; }; -extern int brnf_deferred_hooks; #else #define nf_bridge_maybe_copy_header(skb) (0) #define nf_bridge_pad(skb) (0) diff --git a/include/linux/netfilter_bridge/ebt_802_3.h b/include/linux/netfilter_bridge/ebt_802_3.h index b9f712c14a0..07f044ff1a6 100644 --- a/include/linux/netfilter_bridge/ebt_802_3.h +++ b/include/linux/netfilter_bridge/ebt_802_3.h @@ -28,21 +28,21 @@ struct hdr_ui { uint8_t ssap; uint8_t ctrl; uint8_t orig[3]; - uint16_t type; + __be16 type; }; struct hdr_ni { uint8_t dsap; uint8_t ssap; - uint16_t ctrl; + __be16 ctrl; uint8_t orig[3]; - uint16_t type; + __be16 type; }; struct ebt_802_3_hdr { uint8_t daddr[6]; uint8_t saddr[6]; - uint16_t len; + __be16 len; union { struct hdr_ui ui; struct hdr_ni ni; @@ -61,7 +61,7 @@ static inline struct ebt_802_3_hdr *ebt_802_3_hdr(const struct sk_buff *skb) struct ebt_802_3_info { uint8_t sap; - uint16_t type; + __be16 type; uint8_t bitmask; uint8_t invflags; }; diff --git a/include/linux/netfilter_bridge/ebt_among.h b/include/linux/netfilter_bridge/ebt_among.h index 307c1fed851..7654069233c 100644 --- a/include/linux/netfilter_bridge/ebt_among.h +++ b/include/linux/netfilter_bridge/ebt_among.h @@ -32,7 +32,7 @@ struct ebt_mac_wormhash_tuple { uint32_t cmp[2]; - uint32_t ip; + __be32 ip; }; struct ebt_mac_wormhash diff --git a/include/linux/netfilter_bridge/ebt_arp.h b/include/linux/netfilter_bridge/ebt_arp.h index 537ec6b487a..97e4dbde1f8 100644 --- a/include/linux/netfilter_bridge/ebt_arp.h +++ b/include/linux/netfilter_bridge/ebt_arp.h @@ -14,13 +14,13 @@ struct ebt_arp_info { - uint16_t htype; - uint16_t ptype; - uint16_t opcode; - uint32_t saddr; - uint32_t smsk; - uint32_t daddr; - uint32_t dmsk; + __be16 htype; + __be16 ptype; + __be16 opcode; + __be32 saddr; + __be32 smsk; + __be32 daddr; + __be32 dmsk; unsigned char smaddr[ETH_ALEN]; unsigned char smmsk[ETH_ALEN]; unsigned char dmaddr[ETH_ALEN]; diff --git a/include/linux/netfilter_bridge/ebt_ip.h b/include/linux/netfilter_bridge/ebt_ip.h index 7247385cdcb..d6847475bf2 100644 --- a/include/linux/netfilter_bridge/ebt_ip.h +++ b/include/linux/netfilter_bridge/ebt_ip.h @@ -28,10 +28,10 @@ /* the same values are used for the invflags */ struct ebt_ip_info { - uint32_t saddr; - uint32_t daddr; - uint32_t smsk; - uint32_t dmsk; + __be32 saddr; + __be32 daddr; + __be32 smsk; + __be32 dmsk; uint8_t tos; uint8_t protocol; uint8_t bitmask; diff --git a/include/linux/netfilter_bridge/ebt_nat.h b/include/linux/netfilter_bridge/ebt_nat.h index 26fd90da4cd..435b886a51a 100644 --- a/include/linux/netfilter_bridge/ebt_nat.h +++ b/include/linux/netfilter_bridge/ebt_nat.h @@ -1,6 +1,7 @@ #ifndef __LINUX_BRIDGE_EBT_NAT_H #define __LINUX_BRIDGE_EBT_NAT_H +#define NAT_ARP_BIT (0x00000010) struct ebt_nat_info { unsigned char mac[ETH_ALEN]; diff --git a/include/linux/netfilter_bridge/ebt_vlan.h b/include/linux/netfilter_bridge/ebt_vlan.h index cb1fcc41565..1d98be4031e 100644 --- a/include/linux/netfilter_bridge/ebt_vlan.h +++ b/include/linux/netfilter_bridge/ebt_vlan.h @@ -10,7 +10,7 @@ struct ebt_vlan_info { uint16_t id; /* VLAN ID {1-4095} */ uint8_t prio; /* VLAN User Priority {0-7} */ - uint16_t encap; /* VLAN Encapsulated frame code {0-65535} */ + __be16 encap; /* VLAN Encapsulated frame code {0-65535} */ uint8_t bitmask; /* Args bitmask bit 1=1 - ID arg, bit 2=1 User-Priority arg, bit 3=1 encap*/ uint8_t invflags; /* Inverse bitmask bit 1=1 - inversed ID arg, diff --git a/include/linux/netfilter_bridge/ebtables.h b/include/linux/netfilter_bridge/ebtables.h index b1a7cc90877..94e0a7dc0cb 100644 --- a/include/linux/netfilter_bridge/ebtables.h +++ b/include/linux/netfilter_bridge/ebtables.h @@ -26,6 +26,10 @@ #define EBT_CONTINUE -3 #define EBT_RETURN -4 #define NUM_STANDARD_TARGETS 4 +/* ebtables target modules store the verdict inside an int. We can + * reclaim a part of this int for backwards compatible extensions. + * The 4 lsb are more than enough to store the verdict. */ +#define EBT_VERDICT_BITS 0x0000000F struct ebt_counter { @@ -42,6 +46,23 @@ struct ebt_replace /* total size of the entries */ unsigned int entries_size; /* start of the chains */ + struct ebt_entries __user *hook_entry[NF_BR_NUMHOOKS]; + /* nr of counters userspace expects back */ + unsigned int num_counters; + /* where the kernel will put the old counters */ + struct ebt_counter __user *counters; + char __user *entries; +}; + +struct ebt_replace_kernel +{ + char name[EBT_TABLE_MAXNAMELEN]; + unsigned int valid_hooks; + /* nr of rules in the table */ + unsigned int nentries; + /* total size of the entries */ + unsigned int entries_size; + /* start of the chains */ struct ebt_entries *hook_entry[NF_BR_NUMHOOKS]; /* nr of counters userspace expects back */ unsigned int num_counters; @@ -141,7 +162,7 @@ struct ebt_entry { /* this needs to be the first field */ unsigned int bitmask; unsigned int invflags; - uint16_t ethproto; + __be16 ethproto; /* the physical in-dev */ char in[IFNAMSIZ]; /* the logical in-dev */ @@ -251,7 +272,7 @@ struct ebt_table { struct list_head list; char name[EBT_TABLE_MAXNAMELEN]; - struct ebt_replace *table; + struct ebt_replace_kernel *table; unsigned int valid_hooks; rwlock_t lock; /* e.g. could be the table explicitly only allows certain diff --git a/include/linux/netfilter_ipv4.h b/include/linux/netfilter_ipv4.h index 5b63a231a76..ceae87a4c89 100644 --- a/include/linux/netfilter_ipv4.h +++ b/include/linux/netfilter_ipv4.h @@ -57,10 +57,8 @@ enum nf_ip_hook_priorities { NF_IP_PRI_RAW = -300, NF_IP_PRI_SELINUX_FIRST = -225, NF_IP_PRI_CONNTRACK = -200, - NF_IP_PRI_BRIDGE_SABOTAGE_FORWARD = -175, NF_IP_PRI_MANGLE = -150, NF_IP_PRI_NAT_DST = -100, - NF_IP_PRI_BRIDGE_SABOTAGE_LOCAL_OUT = -50, NF_IP_PRI_FILTER = 0, NF_IP_PRI_NAT_SRC = 100, NF_IP_PRI_SELINUX_LAST = 225, @@ -79,7 +77,7 @@ enum nf_ip_hook_priorities { #ifdef __KERNEL__ extern int ip_route_me_harder(struct sk_buff **pskb, unsigned addr_type); extern int ip_xfrm_me_harder(struct sk_buff **pskb); -extern unsigned int nf_ip_checksum(struct sk_buff *skb, unsigned int hook, +extern __sum16 nf_ip_checksum(struct sk_buff *skb, unsigned int hook, unsigned int dataoff, u_int8_t protocol); #endif /*__KERNEL__*/ diff --git a/include/linux/netfilter_ipv4/Kbuild b/include/linux/netfilter_ipv4/Kbuild index 591c1a809c0..180337801a8 100644 --- a/include/linux/netfilter_ipv4/Kbuild +++ b/include/linux/netfilter_ipv4/Kbuild @@ -1,6 +1,4 @@ header-y += ip_conntrack_helper.h -header-y += ip_conntrack_helper_h323_asn1.h -header-y += ip_conntrack_helper_h323_types.h header-y += ip_conntrack_protocol.h header-y += ip_conntrack_sctp.h header-y += ip_conntrack_tcp.h diff --git a/include/linux/netfilter_ipv4/ip_conntrack.h b/include/linux/netfilter_ipv4/ip_conntrack.h index 64e868034c4..33581c13d94 100644 --- a/include/linux/netfilter_ipv4/ip_conntrack.h +++ b/include/linux/netfilter_ipv4/ip_conntrack.h @@ -9,6 +9,7 @@ #include <linux/compiler.h> #include <asm/atomic.h> +#include <linux/timer.h> #include <linux/netfilter_ipv4/ip_conntrack_tcp.h> #include <linux/netfilter_ipv4/ip_conntrack_icmp.h> #include <linux/netfilter_ipv4/ip_conntrack_proto_gre.h> @@ -277,7 +278,7 @@ extern struct ip_conntrack_expect * __ip_conntrack_expect_find(const struct ip_conntrack_tuple *tuple); extern struct ip_conntrack_expect * -ip_conntrack_expect_find(const struct ip_conntrack_tuple *tuple); +ip_conntrack_expect_find_get(const struct ip_conntrack_tuple *tuple); extern struct ip_conntrack_tuple_hash * __ip_conntrack_find(const struct ip_conntrack_tuple *tuple, diff --git a/include/linux/netfilter_ipv4/ip_conntrack_ftp.h b/include/linux/netfilter_ipv4/ip_conntrack_ftp.h index 63811934de4..2129fc3972a 100644 --- a/include/linux/netfilter_ipv4/ip_conntrack_ftp.h +++ b/include/linux/netfilter_ipv4/ip_conntrack_ftp.h @@ -1,6 +1,44 @@ #ifndef _IP_CONNTRACK_FTP_H #define _IP_CONNTRACK_FTP_H +/* FTP tracking. */ -#include <linux/netfilter/nf_conntrack_ftp.h> +/* This enum is exposed to userspace */ +enum ip_ct_ftp_type +{ + /* PORT command from client */ + IP_CT_FTP_PORT, + /* PASV response from server */ + IP_CT_FTP_PASV, + /* EPRT command from client */ + IP_CT_FTP_EPRT, + /* EPSV response from server */ + IP_CT_FTP_EPSV, +}; + +#ifdef __KERNEL__ + +#define FTP_PORT 21 + +#define NUM_SEQ_TO_REMEMBER 2 +/* This structure exists only once per master */ +struct ip_ct_ftp_master { + /* Valid seq positions for cmd matching after newline */ + u_int32_t seq_aft_nl[IP_CT_DIR_MAX][NUM_SEQ_TO_REMEMBER]; + /* 0 means seq_match_aft_nl not set */ + int seq_aft_nl_num[IP_CT_DIR_MAX]; +}; + +struct ip_conntrack_expect; + +/* For NAT to hook in when we find a packet which describes what other + * connection we should expect. */ +extern unsigned int (*ip_nat_ftp_hook)(struct sk_buff **pskb, + enum ip_conntrack_info ctinfo, + enum ip_ct_ftp_type type, + unsigned int matchoff, + unsigned int matchlen, + struct ip_conntrack_expect *exp, + u32 *seq); +#endif /* __KERNEL__ */ #endif /* _IP_CONNTRACK_FTP_H */ diff --git a/include/linux/netfilter_ipv4/ip_conntrack_h323.h b/include/linux/netfilter_ipv4/ip_conntrack_h323.h index 943cc6a4871..18f769818f4 100644 --- a/include/linux/netfilter_ipv4/ip_conntrack_h323.h +++ b/include/linux/netfilter_ipv4/ip_conntrack_h323.h @@ -3,7 +3,7 @@ #ifdef __KERNEL__ -#include <linux/netfilter_ipv4/ip_conntrack_helper_h323_asn1.h> +#include <linux/netfilter/nf_conntrack_h323_asn1.h> #define RAS_PORT 1719 #define Q931_PORT 1720 diff --git a/include/linux/netfilter_ipv4/ip_conntrack_proto_gre.h b/include/linux/netfilter_ipv4/ip_conntrack_proto_gre.h index 1d853aa873e..e371e0fc167 100644 --- a/include/linux/netfilter_ipv4/ip_conntrack_proto_gre.h +++ b/include/linux/netfilter_ipv4/ip_conntrack_proto_gre.h @@ -102,11 +102,11 @@ static inline __be32 *gre_key(struct gre_hdr *greh) } /* get pointer ot gre csum, if present */ -static inline u_int16_t *gre_csum(struct gre_hdr *greh) +static inline __sum16 *gre_csum(struct gre_hdr *greh) { if (!greh->csum) return NULL; - return (u_int16_t *) (greh+sizeof(*greh)); + return (__sum16 *) (greh+sizeof(*greh)); } #endif /* __KERNEL__ */ diff --git a/include/linux/netfilter_ipv4/ip_conntrack_sip.h b/include/linux/netfilter_ipv4/ip_conntrack_sip.h index 913dad66c0f..bef6c646def 100644 --- a/include/linux/netfilter_ipv4/ip_conntrack_sip.h +++ b/include/linux/netfilter_ipv4/ip_conntrack_sip.h @@ -5,23 +5,18 @@ #define SIP_PORT 5060 #define SIP_TIMEOUT 3600 -#define POS_VIA 0 -#define POS_CONTACT 1 -#define POS_CONTENT 2 -#define POS_MEDIA 3 -#define POS_OWNER 4 -#define POS_CONNECTION 5 -#define POS_REQ_HEADER 6 -#define POS_SDP_HEADER 7 - -struct sip_header_nfo { - const char *lname; - const char *sname; - const char *ln_str; - size_t lnlen; - size_t snlen; - size_t ln_strlen; - int (*match_len)(const char *, const char *, int *); +enum sip_header_pos { + POS_REG_REQ_URI, + POS_REQ_URI, + POS_FROM, + POS_TO, + POS_VIA, + POS_CONTACT, + POS_CONTENT, + POS_MEDIA, + POS_OWNER, + POS_CONNECTION, + POS_SDP_HEADER, }; extern unsigned int (*ip_nat_sip_hook)(struct sk_buff **pskb, @@ -36,9 +31,10 @@ extern unsigned int (*ip_nat_sdp_hook)(struct sk_buff **pskb, extern int ct_sip_get_info(const char *dptr, size_t dlen, unsigned int *matchoff, unsigned int *matchlen, - struct sip_header_nfo *hnfo); + enum sip_header_pos pos); extern int ct_sip_lnlen(const char *line, const char *limit); extern const char *ct_sip_search(const char *needle, const char *haystack, - size_t needle_len, size_t haystack_len); + size_t needle_len, size_t haystack_len, + int case_sensitive); #endif /* __KERNEL__ */ #endif /* __IP_CONNTRACK_SIP_H__ */ diff --git a/include/linux/netfilter_ipv4/ip_conntrack_tftp.h b/include/linux/netfilter_ipv4/ip_conntrack_tftp.h index cde9729aa17..a404fc0abf0 100644 --- a/include/linux/netfilter_ipv4/ip_conntrack_tftp.h +++ b/include/linux/netfilter_ipv4/ip_conntrack_tftp.h @@ -4,7 +4,7 @@ #define TFTP_PORT 69 struct tftphdr { - u_int16_t opcode; + __be16 opcode; }; #define TFTP_OPCODE_READ 1 diff --git a/include/linux/netfilter_ipv4/ipt_LOG.h b/include/linux/netfilter_ipv4/ipt_LOG.h index 892f9a33fea..90fa6525ef9 100644 --- a/include/linux/netfilter_ipv4/ipt_LOG.h +++ b/include/linux/netfilter_ipv4/ipt_LOG.h @@ -6,7 +6,7 @@ #define IPT_LOG_TCPOPT 0x02 /* Log TCP options */ #define IPT_LOG_IPOPT 0x04 /* Log IP options */ #define IPT_LOG_UID 0x08 /* Log UID owning local socket */ -#define IPT_LOG_NFLOG 0x10 /* Log using nf_log backend */ +#define IPT_LOG_NFLOG 0x10 /* Unsupported, don't reuse */ #define IPT_LOG_MASK 0x1f struct ipt_log_info { diff --git a/include/linux/netfilter_ipv4/ipt_hashlimit.h b/include/linux/netfilter_ipv4/ipt_hashlimit.h index ac2cb64ecd7..5662120a3d7 100644 --- a/include/linux/netfilter_ipv4/ipt_hashlimit.h +++ b/include/linux/netfilter_ipv4/ipt_hashlimit.h @@ -1,40 +1,14 @@ #ifndef _IPT_HASHLIMIT_H #define _IPT_HASHLIMIT_H -/* timings are in milliseconds. */ -#define IPT_HASHLIMIT_SCALE 10000 -/* 1/10,000 sec period => max of 10,000/sec. Min rate is then 429490 - seconds, or one every 59 hours. */ +#include <linux/netfilter/xt_hashlimit.h> -/* details of this structure hidden by the implementation */ -struct ipt_hashlimit_htable; +#define IPT_HASHLIMIT_SCALE XT_HASHLIMIT_SCALE +#define IPT_HASHLIMIT_HASH_DIP XT_HASHLIMIT_HASH_DIP +#define IPT_HASHLIMIT_HASH_DPT XT_HASHLIMIT_HASH_DPT +#define IPT_HASHLIMIT_HASH_SIP XT_HASHLIMIT_HASH_SIP +#define IPT_HASHLIMIT_HASH_SPT XT_HASHLIMIT_HASH_SPT -#define IPT_HASHLIMIT_HASH_DIP 0x0001 -#define IPT_HASHLIMIT_HASH_DPT 0x0002 -#define IPT_HASHLIMIT_HASH_SIP 0x0004 -#define IPT_HASHLIMIT_HASH_SPT 0x0008 +#define ipt_hashlimit_info xt_hashlimit_info -struct hashlimit_cfg { - u_int32_t mode; /* bitmask of IPT_HASHLIMIT_HASH_* */ - u_int32_t avg; /* Average secs between packets * scale */ - u_int32_t burst; /* Period multiplier for upper limit. */ - - /* user specified */ - u_int32_t size; /* how many buckets */ - u_int32_t max; /* max number of entries */ - u_int32_t gc_interval; /* gc interval */ - u_int32_t expire; /* when do entries expire? */ -}; - -struct ipt_hashlimit_info { - char name [IFNAMSIZ]; /* name */ - struct hashlimit_cfg cfg; - struct ipt_hashlimit_htable *hinfo; - - /* Used internally by the kernel */ - union { - void *ptr; - struct ipt_hashlimit_info *master; - } u; -}; -#endif /*_IPT_HASHLIMIT_H*/ +#endif /* _IPT_HASHLIMIT_H */ diff --git a/include/linux/netfilter_ipv6.h b/include/linux/netfilter_ipv6.h index d97e268cdfe..66ca8e3100d 100644 --- a/include/linux/netfilter_ipv6.h +++ b/include/linux/netfilter_ipv6.h @@ -62,10 +62,8 @@ enum nf_ip6_hook_priorities { NF_IP6_PRI_CONNTRACK_DEFRAG = -400, NF_IP6_PRI_SELINUX_FIRST = -225, NF_IP6_PRI_CONNTRACK = -200, - NF_IP6_PRI_BRIDGE_SABOTAGE_FORWARD = -175, NF_IP6_PRI_MANGLE = -150, NF_IP6_PRI_NAT_DST = -100, - NF_IP6_PRI_BRIDGE_SABOTAGE_LOCAL_OUT = -50, NF_IP6_PRI_FILTER = 0, NF_IP6_PRI_NAT_SRC = 100, NF_IP6_PRI_SELINUX_LAST = 225, @@ -74,7 +72,7 @@ enum nf_ip6_hook_priorities { #ifdef CONFIG_NETFILTER extern int ip6_route_me_harder(struct sk_buff *skb); -extern unsigned int nf_ip6_checksum(struct sk_buff *skb, unsigned int hook, +extern __sum16 nf_ip6_checksum(struct sk_buff *skb, unsigned int hook, unsigned int dataoff, u_int8_t protocol); extern int ipv6_netfilter_init(void); diff --git a/include/linux/netfilter_ipv6/ip6t_LOG.h b/include/linux/netfilter_ipv6/ip6t_LOG.h index 060c1a1c6c6..0d0119b0458 100644 --- a/include/linux/netfilter_ipv6/ip6t_LOG.h +++ b/include/linux/netfilter_ipv6/ip6t_LOG.h @@ -6,7 +6,7 @@ #define IP6T_LOG_TCPOPT 0x02 /* Log TCP options */ #define IP6T_LOG_IPOPT 0x04 /* Log IP options */ #define IP6T_LOG_UID 0x08 /* Log UID owning local socket */ -#define IP6T_LOG_NFLOG 0x10 /* Log using nf_log backend */ +#define IP6T_LOG_NFLOG 0x10 /* Unsupported, don't use */ #define IP6T_LOG_MASK 0x1f struct ip6t_log_info { diff --git a/include/linux/netlink.h b/include/linux/netlink.h index 66411622e06..b3b9b609ee8 100644 --- a/include/linux/netlink.h +++ b/include/linux/netlink.h @@ -141,7 +141,6 @@ struct netlink_skb_parms { struct ucred creds; /* Skb credentials */ __u32 pid; - __u32 dst_pid; __u32 dst_group; kernel_cap_t eff_cap; __u32 loginuid; /* Login (audit) uid */ @@ -174,6 +173,7 @@ int netlink_sendskb(struct sock *sk, struct sk_buff *skb, int protocol); */ #define NLMSG_GOODORDER 0 #define NLMSG_GOODSIZE (SKB_MAX_ORDER(0, NLMSG_GOODORDER)) +#define NLMSG_DEFAULT_SIZE (NLMSG_GOODSIZE - NLMSG_HDRLEN) struct netlink_callback diff --git a/include/linux/netpoll.h b/include/linux/netpoll.h index 1efe60c5c00..29930b71a9a 100644 --- a/include/linux/netpoll.h +++ b/include/linux/netpoll.h @@ -12,26 +12,27 @@ #include <linux/rcupdate.h> #include <linux/list.h> -struct netpoll; - struct netpoll { struct net_device *dev; - char dev_name[16], *name; + char dev_name[IFNAMSIZ]; + const char *name; void (*rx_hook)(struct netpoll *, int, char *, int); - void (*drop)(struct sk_buff *skb); + u32 local_ip, remote_ip; u16 local_port, remote_port; - unsigned char local_mac[6], remote_mac[6]; + u8 local_mac[ETH_ALEN], remote_mac[ETH_ALEN]; }; struct netpoll_info { + atomic_t refcnt; spinlock_t poll_lock; int poll_owner; - int tries; int rx_flags; spinlock_t rx_lock; struct netpoll *rx_np; /* netpoll that registered an rx_hook */ struct sk_buff_head arp_tx; /* list of arp requests to reply to */ + struct sk_buff_head txq; + struct delayed_work tx_work; }; void netpoll_poll(struct netpoll *np); @@ -42,7 +43,7 @@ int netpoll_trap(void); void netpoll_set_trap(int trap); void netpoll_cleanup(struct netpoll *np); int __netpoll_rx(struct sk_buff *skb); -void netpoll_queue(struct sk_buff *skb); + #ifdef CONFIG_NETPOLL static inline int netpoll_rx(struct sk_buff *skb) diff --git a/include/linux/nfs_fs.h b/include/linux/nfs_fs.h index 45228c1a119..04963063e62 100644 --- a/include/linux/nfs_fs.h +++ b/include/linux/nfs_fs.h @@ -33,6 +33,7 @@ #define FLUSH_HIGHPRI 16 /* high priority memory reclaim flush */ #define FLUSH_NOCOMMIT 32 /* Don't send the NFSv3/v4 COMMIT */ #define FLUSH_INVALIDATE 64 /* Invalidate the page cache */ +#define FLUSH_NOWRITEPAGE 128 /* Don't call writepage() */ #ifdef __KERNEL__ @@ -318,7 +319,7 @@ extern void put_nfs_open_context(struct nfs_open_context *ctx); extern struct nfs_open_context *nfs_find_open_context(struct inode *inode, struct rpc_cred *cred, int mode); /* linux/net/ipv4/ipconfig.c: trims ip addr off front of name, too. */ -extern u32 root_nfs_parse_addr(char *name); /*__init*/ +extern __be32 root_nfs_parse_addr(char *name); /*__init*/ static inline void nfs_fattr_init(struct nfs_fattr *fattr) { @@ -427,19 +428,21 @@ extern int nfs_flush_incompatible(struct file *file, struct page *page); extern int nfs_updatepage(struct file *, struct page *, unsigned int, unsigned int); extern int nfs_writeback_done(struct rpc_task *, struct nfs_write_data *); extern void nfs_writedata_release(void *); - -#if defined(CONFIG_NFS_V3) || defined(CONFIG_NFS_V4) -struct nfs_write_data *nfs_commit_alloc(void); -void nfs_commit_free(struct nfs_write_data *p); -#endif +extern int nfs_set_page_dirty(struct page *); /* * Try to write back everything synchronously (but check the * return value!) */ -extern int nfs_sync_inode_wait(struct inode *, unsigned long, unsigned int, int); +extern long nfs_sync_mapping_wait(struct address_space *, struct writeback_control *, int); +extern int nfs_sync_mapping_range(struct address_space *, loff_t, loff_t, int); +extern int nfs_wb_all(struct inode *inode); +extern int nfs_wb_page(struct inode *inode, struct page* page); +extern int nfs_wb_page_priority(struct inode *inode, struct page* page, int how); #if defined(CONFIG_NFS_V3) || defined(CONFIG_NFS_V4) extern int nfs_commit_inode(struct inode *, int); +extern struct nfs_write_data *nfs_commit_alloc(void); +extern void nfs_commit_free(struct nfs_write_data *wdata); extern void nfs_commit_release(void *wdata); #else static inline int @@ -455,28 +458,6 @@ nfs_have_writebacks(struct inode *inode) return NFS_I(inode)->npages != 0; } -static inline int -nfs_wb_all(struct inode *inode) -{ - int error = nfs_sync_inode_wait(inode, 0, 0, 0); - return (error < 0) ? error : 0; -} - -/* - * Write back all requests on one page - we do this before reading it. - */ -static inline int nfs_wb_page_priority(struct inode *inode, struct page* page, int how) -{ - int error = nfs_sync_inode_wait(inode, page->index, 1, - how | FLUSH_STABLE); - return (error < 0) ? error : 0; -} - -static inline int nfs_wb_page(struct inode *inode, struct page* page) -{ - return nfs_wb_page_priority(inode, page, 0); -} - /* * Allocate nfs_write_data structures */ diff --git a/include/linux/nfs_fs_sb.h b/include/linux/nfs_fs_sb.h index 7ccfc7ef0a8..95796e6924f 100644 --- a/include/linux/nfs_fs_sb.h +++ b/include/linux/nfs_fs_sb.h @@ -51,7 +51,7 @@ struct nfs_client { unsigned long cl_lease_time; unsigned long cl_last_renewal; - struct work_struct cl_renewd; + struct delayed_work cl_renewd; struct rpc_wait_queue cl_rpcwaitq; diff --git a/include/linux/nfs_page.h b/include/linux/nfs_page.h index 1f7bd287c23..2e555d49c9b 100644 --- a/include/linux/nfs_page.h +++ b/include/linux/nfs_page.h @@ -30,6 +30,8 @@ #define PG_BUSY 0 #define PG_NEED_COMMIT 1 #define PG_NEED_RESCHED 2 +#define PG_NEED_FLUSH 3 +#define PG_FLUSHING 4 struct nfs_inode; struct nfs_page { @@ -60,8 +62,9 @@ extern void nfs_clear_request(struct nfs_page *req); extern void nfs_release_request(struct nfs_page *req); -extern int nfs_scan_lock_dirty(struct nfs_inode *nfsi, struct list_head *dst, - unsigned long idx_start, unsigned int npages); +extern long nfs_scan_dirty(struct address_space *mapping, + struct writeback_control *wbc, + struct list_head *dst); extern int nfs_scan_list(struct nfs_inode *nfsi, struct list_head *head, struct list_head *dst, unsigned long idx_start, unsigned int npages); extern int nfs_coalesce_requests(struct list_head *, struct list_head *, diff --git a/include/linux/nfs_xdr.h b/include/linux/nfs_xdr.h index 768c1ad5ff6..9ee9da5e1cc 100644 --- a/include/linux/nfs_xdr.h +++ b/include/linux/nfs_xdr.h @@ -785,8 +785,6 @@ struct nfs_rpc_ops { int (*readlink)(struct inode *, struct page *, unsigned int, unsigned int); int (*read) (struct nfs_read_data *); - int (*write) (struct nfs_write_data *); - int (*commit) (struct nfs_write_data *); int (*create) (struct inode *, struct dentry *, struct iattr *, int, struct nameidata *); int (*remove) (struct inode *, struct qstr *); diff --git a/include/linux/nfsd/nfsd.h b/include/linux/nfsd/nfsd.h index edb54c3171b..0727774772b 100644 --- a/include/linux/nfsd/nfsd.h +++ b/include/linux/nfsd/nfsd.h @@ -275,12 +275,12 @@ static inline int is_fsid(struct svc_fh *fh, struct knfsd_fh *reffh) * we might process an operation with side effects, and be unable to * tell the client that the operation succeeded. * - * COMPOUND_SLACK_SPACE - this is the minimum amount of buffer space + * COMPOUND_SLACK_SPACE - this is the minimum bytes of buffer space * needed to encode an "ordinary" _successful_ operation. (GETATTR, * READ, READDIR, and READLINK have their own buffer checks.) if we * fall below this level, we fail the next operation with NFS4ERR_RESOURCE. * - * COMPOUND_ERR_SLACK_SPACE - this is the minimum amount of buffer space + * COMPOUND_ERR_SLACK_SPACE - this is the minimum bytes of buffer space * needed to encode an operation which has failed with NFS4ERR_RESOURCE. * care is taken to ensure that we never fall below this level for any * reason. diff --git a/include/linux/nfsd/state.h b/include/linux/nfsd/state.h index c3673f487e8..ab5c236bd9a 100644 --- a/include/linux/nfsd/state.h +++ b/include/linux/nfsd/state.h @@ -273,7 +273,6 @@ struct nfs4_stateid { ((err) != nfserr_stale_stateid) && \ ((err) != nfserr_bad_stateid)) -extern __be32 nfsd4_renew(clientid_t *clid); extern __be32 nfs4_preprocess_stateid_op(struct svc_fh *current_fh, stateid_t *stateid, int flags, struct file **filp); extern void nfs4_lock_state(void); diff --git a/include/linux/nfsd/xdr4.h b/include/linux/nfsd/xdr4.h index 45ca01b5f84..09799bcee0a 100644 --- a/include/linux/nfsd/xdr4.h +++ b/include/linux/nfsd/xdr4.h @@ -44,6 +44,12 @@ #define NFSD4_MAX_TAGLEN 128 #define XDR_LEN(n) (((n) + 3) & ~3) +struct nfsd4_compound_state { + struct svc_fh current_fh; + struct svc_fh save_fh; + struct nfs4_stateowner *replay_owner; +}; + struct nfsd4_change_info { u32 atomic; u32 before_ctime_sec; @@ -430,35 +436,39 @@ __be32 nfsd4_encode_fattr(struct svc_fh *fhp, struct svc_export *exp, struct dentry *dentry, __be32 *buffer, int *countp, u32 *bmval, struct svc_rqst *); extern __be32 nfsd4_setclientid(struct svc_rqst *rqstp, + struct nfsd4_compound_state *, struct nfsd4_setclientid *setclid); extern __be32 nfsd4_setclientid_confirm(struct svc_rqst *rqstp, + struct nfsd4_compound_state *, struct nfsd4_setclientid_confirm *setclientid_confirm); extern __be32 nfsd4_process_open1(struct nfsd4_open *open); extern __be32 nfsd4_process_open2(struct svc_rqst *rqstp, struct svc_fh *current_fh, struct nfsd4_open *open); extern __be32 nfsd4_open_confirm(struct svc_rqst *rqstp, - struct svc_fh *current_fh, struct nfsd4_open_confirm *oc, - struct nfs4_stateowner **); -extern __be32 nfsd4_close(struct svc_rqst *rqstp, struct svc_fh *current_fh, - struct nfsd4_close *close, - struct nfs4_stateowner **replay_owner); + struct nfsd4_compound_state *, struct nfsd4_open_confirm *oc); +extern __be32 nfsd4_close(struct svc_rqst *rqstp, + struct nfsd4_compound_state *, + struct nfsd4_close *close); extern __be32 nfsd4_open_downgrade(struct svc_rqst *rqstp, - struct svc_fh *current_fh, struct nfsd4_open_downgrade *od, - struct nfs4_stateowner **replay_owner); -extern __be32 nfsd4_lock(struct svc_rqst *rqstp, struct svc_fh *current_fh, - struct nfsd4_lock *lock, - struct nfs4_stateowner **replay_owner); -extern __be32 nfsd4_lockt(struct svc_rqst *rqstp, struct svc_fh *current_fh, + struct nfsd4_compound_state *, + struct nfsd4_open_downgrade *od); +extern __be32 nfsd4_lock(struct svc_rqst *rqstp, struct nfsd4_compound_state *, + struct nfsd4_lock *lock); +extern __be32 nfsd4_lockt(struct svc_rqst *rqstp, + struct nfsd4_compound_state *, struct nfsd4_lockt *lockt); -extern __be32 nfsd4_locku(struct svc_rqst *rqstp, struct svc_fh *current_fh, - struct nfsd4_locku *locku, - struct nfs4_stateowner **replay_owner); +extern __be32 nfsd4_locku(struct svc_rqst *rqstp, + struct nfsd4_compound_state *, + struct nfsd4_locku *locku); extern __be32 nfsd4_release_lockowner(struct svc_rqst *rqstp, + struct nfsd4_compound_state *, struct nfsd4_release_lockowner *rlockowner); extern void nfsd4_release_compoundargs(struct nfsd4_compoundargs *); extern __be32 nfsd4_delegreturn(struct svc_rqst *rqstp, - struct svc_fh *current_fh, struct nfsd4_delegreturn *dr); + struct nfsd4_compound_state *, struct nfsd4_delegreturn *dr); +extern __be32 nfsd4_renew(struct svc_rqst *rqstp, + struct nfsd4_compound_state *, clientid_t *clid); #endif /* diff --git a/include/linux/nmi.h b/include/linux/nmi.h index e16904e28c3..acb4ed13024 100644 --- a/include/linux/nmi.h +++ b/include/linux/nmi.h @@ -15,9 +15,14 @@ * disables interrupts for a long time. This call is stateless. */ #ifdef ARCH_HAS_NMI_WATCHDOG +#include <asm/nmi.h> extern void touch_nmi_watchdog(void); #else # define touch_nmi_watchdog() touch_softlockup_watchdog() #endif +#ifndef trigger_all_cpu_backtrace +#define trigger_all_cpu_backtrace() do { } while (0) +#endif + #endif diff --git a/include/linux/nsproxy.h b/include/linux/nsproxy.h index 971d1c6dfc4..0b9f0dc30d6 100644 --- a/include/linux/nsproxy.h +++ b/include/linux/nsproxy.h @@ -4,9 +4,10 @@ #include <linux/spinlock.h> #include <linux/sched.h> -struct namespace; +struct mnt_namespace; struct uts_namespace; struct ipc_namespace; +struct pid_namespace; /* * A structure to contain pointers to all per-process @@ -25,7 +26,8 @@ struct nsproxy { spinlock_t nslock; struct uts_namespace *uts_ns; struct ipc_namespace *ipc_ns; - struct namespace *namespace; + struct mnt_namespace *mnt_ns; + struct pid_namespace *pid_ns; }; extern struct nsproxy init_nsproxy; diff --git a/include/linux/page-flags.h b/include/linux/page-flags.h index 4830a3bedfb..350878a2d84 100644 --- a/include/linux/page-flags.h +++ b/include/linux/page-flags.h @@ -253,15 +253,11 @@ static inline void SetPageUptodate(struct page *page) struct page; /* forward declaration */ -int test_clear_page_dirty(struct page *page); +extern void cancel_dirty_page(struct page *page, unsigned int account_size); + int test_clear_page_writeback(struct page *page); int test_set_page_writeback(struct page *page); -static inline void clear_page_dirty(struct page *page) -{ - test_clear_page_dirty(page); -} - static inline void set_page_writeback(struct page *page) { test_set_page_writeback(page); diff --git a/include/linux/pata_platform.h b/include/linux/pata_platform.h new file mode 100644 index 00000000000..2d5fd647e0e --- /dev/null +++ b/include/linux/pata_platform.h @@ -0,0 +1,13 @@ +#ifndef __LINUX_PATA_PLATFORM_H +#define __LINUX_PATA_PLATFORM_H + +struct pata_platform_info { + /* + * I/O port shift, for platforms with ports that are + * constantly spaced and need larger than the 1-byte + * spacing used by ata_std_ports(). + */ + unsigned int ioport_shift; +}; + +#endif /* __LINUX_PATA_PLATFORM_H */ diff --git a/include/linux/pci.h b/include/linux/pci.h index 09be0f81b27..f3c617eabd8 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -20,9 +20,6 @@ /* Include the pci register defines */ #include <linux/pci_regs.h> -/* Include the ID list */ -#include <linux/pci_ids.h> - /* * The PCI interface treats multi-function devices as independent * devices. The slot/function address of each device is encoded @@ -51,8 +48,12 @@ #include <linux/list.h> #include <linux/compiler.h> #include <linux/errno.h> +#include <asm/atomic.h> #include <linux/device.h> +/* Include the ID list */ +#include <linux/pci_ids.h> + /* File state for mmap()s on /proc/bus/pci/X/Y */ enum pci_mmap_state { pci_mmap_io, @@ -159,7 +160,6 @@ struct pci_dev { unsigned int transparent:1; /* Transparent PCI bridge */ unsigned int multifunction:1;/* Part of multi-function device */ /* keep track of device state */ - unsigned int is_enabled:1; /* pci_enable_device has been called */ unsigned int is_busmaster:1; /* device is busmaster */ unsigned int no_msi:1; /* device may not use msi */ unsigned int no_d1d2:1; /* only allow d0 or d3 */ @@ -167,6 +167,7 @@ struct pci_dev { unsigned int broken_parity_status:1; /* Device generates false positive parity */ unsigned int msi_enabled:1; unsigned int msix_enabled:1; + atomic_t enable_cnt; /* pci_enable_device has been called */ u32 saved_config_space[16]; /* config space saved at suspend time */ struct hlist_head saved_cap_space; @@ -395,6 +396,21 @@ struct pci_driver { */ #define pci_module_init pci_register_driver +/** + * PCI_VDEVICE - macro used to describe a specific pci device in short form + * @vend: the vendor name + * @dev: the 16 bit PCI Device ID + * + * This macro is used to create a struct pci_device_id that matches a + * specific PCI device. The subvendor, and subdevice fields will be set + * to PCI_ANY_ID. The macro allows the next field to follow as the device + * private data. + */ + +#define PCI_VDEVICE(vendor, device) \ + PCI_VENDOR_ID_##vendor, (device), \ + PCI_ANY_ID, PCI_ANY_ID, 0, 0 + /* these external functions are only available when PCI support is enabled */ #ifdef CONFIG_PCI @@ -453,6 +469,8 @@ struct pci_dev *pci_find_slot (unsigned int bus, unsigned int devfn); int pci_find_capability (struct pci_dev *dev, int cap); int pci_find_next_capability (struct pci_dev *dev, u8 pos, int cap); int pci_find_ext_capability (struct pci_dev *dev, int cap); +int pci_find_ht_capability (struct pci_dev *dev, int ht_cap); +int pci_find_next_ht_capability (struct pci_dev *dev, int pos, int ht_cap); struct pci_bus *pci_find_next_bus(const struct pci_bus *from); struct pci_dev *pci_get_device(unsigned int vendor, unsigned int device, @@ -467,6 +485,7 @@ struct pci_dev *pci_get_slot (struct pci_bus *bus, unsigned int devfn); struct pci_dev *pci_get_bus_and_slot (unsigned int bus, unsigned int devfn); struct pci_dev *pci_get_class (unsigned int class, struct pci_dev *from); int pci_dev_present(const struct pci_device_id *ids); +const struct pci_device_id *pci_find_present(const struct pci_device_id *ids); int pci_bus_read_config_byte (struct pci_bus *bus, unsigned int devfn, int where, u8 *val); int pci_bus_read_config_word (struct pci_bus *bus, unsigned int devfn, int where, u16 *val); @@ -680,6 +699,7 @@ static inline struct pci_dev *pci_get_class(unsigned int class, struct pci_dev * { return NULL; } #define pci_dev_present(ids) (0) +#define pci_find_present(ids) (NULL) #define pci_dev_put(dev) do { } while (0) static inline void pci_set_master(struct pci_dev *dev) { } @@ -782,6 +802,7 @@ enum pci_fixup_pass { pci_fixup_header, /* After reading configuration header */ pci_fixup_final, /* Final phase of device fixups */ pci_fixup_enable, /* pci_enable_device() time */ + pci_fixup_resume, /* pci_enable_device() time */ }; /* Anonymous variables would be nice... */ @@ -800,6 +821,9 @@ enum pci_fixup_pass { #define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook) \ DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \ vendor##device##hook, vendor, device, hook) +#define DECLARE_PCI_FIXUP_RESUME(vendor, device, hook) \ + DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume, \ + resume##vendor##device##hook, vendor, device, hook) void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev); diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index fa4e1d79978..f7a416c52ed 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h @@ -104,6 +104,10 @@ #define PCI_CLASS_SERIAL_FIBER 0x0c04 #define PCI_CLASS_SERIAL_SMBUS 0x0c05 +#define PCI_BASE_CLASS_WIRELESS 0x0d +#define PCI_CLASS_WIRELESS_RF_CONTROLLER 0x0d10 +#define PCI_CLASS_WIRELESS_WHCI 0x0d1010 + #define PCI_BASE_CLASS_INTELLIGENT 0x0e #define PCI_CLASS_INTELLIGENT_I2O 0x0e00 @@ -390,7 +394,7 @@ #define PCI_DEVICE_ID_NS_CS5535_IDE 0x002d #define PCI_DEVICE_ID_NS_CS5535_AUDIO 0x002e #define PCI_DEVICE_ID_NS_CS5535_USB 0x002f -#define PCI_DEVICE_ID_NS_CS5535_VIDEO 0x0030 +#define PCI_DEVICE_ID_NS_GX_VIDEO 0x0030 #define PCI_DEVICE_ID_NS_SATURN 0x0035 #define PCI_DEVICE_ID_NS_SCx200_BRIDGE 0x0500 #define PCI_DEVICE_ID_NS_SCx200_SMI 0x0501 @@ -403,8 +407,7 @@ #define PCI_DEVICE_ID_NS_SC1100_XBUS 0x0515 #define PCI_DEVICE_ID_NS_87410 0xd001 -#define PCI_DEVICE_ID_NS_CS5535_HOST_BRIDGE 0x0028 -#define PCI_DEVICE_ID_NS_CS5535_ISA_BRIDGE 0x002b +#define PCI_DEVICE_ID_NS_GX_HOST_BRIDGE 0x0028 #define PCI_VENDOR_ID_TSENG 0x100c #define PCI_DEVICE_ID_TSENG_W32P_2 0x3202 @@ -1213,6 +1216,10 @@ #define PCI_DEVICE_ID_NVIDIA_NVENET_21 0x0451 #define PCI_DEVICE_ID_NVIDIA_NVENET_22 0x0452 #define PCI_DEVICE_ID_NVIDIA_NVENET_23 0x0453 +#define PCI_DEVICE_ID_NVIDIA_NVENET_24 0x054C +#define PCI_DEVICE_ID_NVIDIA_NVENET_25 0x054D +#define PCI_DEVICE_ID_NVIDIA_NVENET_26 0x054E +#define PCI_DEVICE_ID_NVIDIA_NVENET_27 0x054F #define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP67_IDE 0x0560 #define PCI_VENDOR_ID_IMS 0x10e0 @@ -1270,6 +1277,7 @@ #define PCI_DEVICE_ID_VIA_3296_0 0x0296 #define PCI_DEVICE_ID_VIA_8363_0 0x0305 #define PCI_DEVICE_ID_VIA_P4M800CE 0x0314 +#define PCI_DEVICE_ID_VIA_K8M890CE 0x0336 #define PCI_DEVICE_ID_VIA_8371_0 0x0391 #define PCI_DEVICE_ID_VIA_8501_0 0x0501 #define PCI_DEVICE_ID_VIA_82C561 0x0561 @@ -1782,14 +1790,17 @@ #define PCI_DEVICE_ID_MOXA_C104 0x1040 #define PCI_DEVICE_ID_MOXA_CP104U 0x1041 #define PCI_DEVICE_ID_MOXA_CP104JU 0x1042 +#define PCI_DEVICE_ID_MOXA_CP104EL 0x1043 #define PCI_DEVICE_ID_MOXA_CT114 0x1140 #define PCI_DEVICE_ID_MOXA_CP114 0x1141 #define PCI_DEVICE_ID_MOXA_CP118U 0x1180 +#define PCI_DEVICE_ID_MOXA_CP118EL 0x1181 #define PCI_DEVICE_ID_MOXA_CP132 0x1320 #define PCI_DEVICE_ID_MOXA_CP132U 0x1321 #define PCI_DEVICE_ID_MOXA_CP134U 0x1340 #define PCI_DEVICE_ID_MOXA_C168 0x1680 #define PCI_DEVICE_ID_MOXA_CP168U 0x1681 +#define PCI_DEVICE_ID_MOXA_CP168EL 0x1682 #define PCI_VENDOR_ID_CCD 0x1397 #define PCI_DEVICE_ID_CCD_2BD0 0x2bd0 @@ -1860,6 +1871,7 @@ #define PCI_DEVICE_ID_OXSEMI_16PCI95N 0x9511 #define PCI_DEVICE_ID_OXSEMI_16PCI954PP 0x9513 #define PCI_DEVICE_ID_OXSEMI_16PCI952 0x9521 +#define PCI_DEVICE_ID_OXSEMI_16PCI952PP 0x9523 #define PCI_VENDOR_ID_SAMSUNG 0x144d @@ -1893,6 +1905,7 @@ #define PCI_VENDOR_ID_BROADCOM 0x14e4 #define PCI_DEVICE_ID_TIGON3_5752 0x1600 #define PCI_DEVICE_ID_TIGON3_5752M 0x1601 +#define PCI_DEVICE_ID_NX2_5709 0x1639 #define PCI_DEVICE_ID_TIGON3_5700 0x1644 #define PCI_DEVICE_ID_TIGON3_5701 0x1645 #define PCI_DEVICE_ID_TIGON3_5702 0x1646 @@ -1926,6 +1939,7 @@ #define PCI_DEVICE_ID_TIGON3_5750M 0x167c #define PCI_DEVICE_ID_TIGON3_5751M 0x167d #define PCI_DEVICE_ID_TIGON3_5751F 0x167e +#define PCI_DEVICE_ID_TIGON3_5787F 0x167f #define PCI_DEVICE_ID_TIGON3_5787M 0x1693 #define PCI_DEVICE_ID_TIGON3_5782 0x1696 #define PCI_DEVICE_ID_TIGON3_5786 0x169a @@ -1997,6 +2011,8 @@ #define PCI_DEVICE_ID_FARSITE_TE1 0x1610 #define PCI_DEVICE_ID_FARSITE_TE1C 0x1612 +#define PCI_VENDOR_ID_ARIMA 0x161f + #define PCI_VENDOR_ID_SIBYTE 0x166d #define PCI_DEVICE_ID_BCM1250_PCI 0x0001 #define PCI_DEVICE_ID_BCM1250_HT 0x0002 @@ -2056,6 +2072,10 @@ #define PCI_DEVICE_ID_JMICRON_JMB366 0x2366 #define PCI_DEVICE_ID_JMICRON_JMB368 0x2368 +#define PCI_VENDOR_ID_KORENIX 0x1982 +#define PCI_DEVICE_ID_KORENIX_JETCARDF0 0x1600 +#define PCI_DEVICE_ID_KORENIX_JETCARDF1 0x16ff + #define PCI_VENDOR_ID_TEKRAM 0x1de1 #define PCI_DEVICE_ID_TEKRAM_DC290 0xdc29 @@ -2211,6 +2231,13 @@ #define PCI_DEVICE_ID_INTEL_ICH8_4 0x2815 #define PCI_DEVICE_ID_INTEL_ICH8_5 0x283e #define PCI_DEVICE_ID_INTEL_ICH8_6 0x2850 +#define PCI_DEVICE_ID_INTEL_ICH9_0 0x2910 +#define PCI_DEVICE_ID_INTEL_ICH9_1 0x2911 +#define PCI_DEVICE_ID_INTEL_ICH9_2 0x2912 +#define PCI_DEVICE_ID_INTEL_ICH9_3 0x2913 +#define PCI_DEVICE_ID_INTEL_ICH9_4 0x2914 +#define PCI_DEVICE_ID_INTEL_ICH9_5 0x2915 +#define PCI_DEVICE_ID_INTEL_ICH9_6 0x2930 #define PCI_DEVICE_ID_INTEL_82855PM_HB 0x3340 #define PCI_DEVICE_ID_INTEL_82830_HB 0x3575 #define PCI_DEVICE_ID_INTEL_82830_CGC 0x3577 diff --git a/include/linux/pci_regs.h b/include/linux/pci_regs.h index c321316f1bc..7a6d34ee5ab 100644 --- a/include/linux/pci_regs.h +++ b/include/linux/pci_regs.h @@ -292,6 +292,12 @@ #define PCI_MSI_DATA_64 12 /* 16 bits of data for 64-bit devices */ #define PCI_MSI_MASK_BIT 16 /* Mask bits register */ +/* MSI-X registers (these are at offset PCI_MSI_FLAGS) */ +#define PCI_MSIX_FLAGS_QSIZE 0x7FF +#define PCI_MSIX_FLAGS_ENABLE (1 << 15) +#define PCI_MSIX_FLAGS_BIRMASK (7 << 0) +#define PCI_MSIX_FLAGS_BITMASK (1 << 0) + /* CompactPCI Hotswap Register */ #define PCI_CHSWP_CSR 2 /* Control and Status Register */ @@ -469,15 +475,32 @@ #define PCI_PWR_CAP 12 /* Capability */ #define PCI_PWR_CAP_BUDGET(x) ((x) & 1) /* Included in system budget */ -/* Hypertransport sub capability types */ +/* + * Hypertransport sub capability types + * + * Unfortunately there are both 3 bit and 5 bit capability types defined + * in the HT spec, catering for that is a little messy. You probably don't + * want to use these directly, just use pci_find_ht_capability() and it + * will do the right thing for you. + */ +#define HT_3BIT_CAP_MASK 0xE0 #define HT_CAPTYPE_SLAVE 0x00 /* Slave/Primary link configuration */ #define HT_CAPTYPE_HOST 0x20 /* Host/Secondary link configuration */ + +#define HT_5BIT_CAP_MASK 0xF8 #define HT_CAPTYPE_IRQ 0x80 /* IRQ Configuration */ #define HT_CAPTYPE_REMAPPING_40 0xA0 /* 40 bit address remapping */ #define HT_CAPTYPE_REMAPPING_64 0xA2 /* 64 bit address remapping */ #define HT_CAPTYPE_UNITID_CLUMP 0x90 /* Unit ID clumping */ #define HT_CAPTYPE_EXTCONF 0x98 /* Extended Configuration Space Access */ #define HT_CAPTYPE_MSI_MAPPING 0xA8 /* MSI Mapping Capability */ +#define HT_MSI_FLAGS 0x02 /* Offset to flags */ +#define HT_MSI_FLAGS_ENABLE 0x1 /* Mapping enable */ +#define HT_MSI_FLAGS_FIXED 0x2 /* Fixed mapping only */ +#define HT_MSI_FIXED_ADDR 0x00000000FEE00000ULL /* Fixed addr */ +#define HT_MSI_ADDR_LO 0x04 /* Offset to low addr bits */ +#define HT_MSI_ADDR_LO_MASK 0xFFF00000 /* Low address bit mask */ +#define HT_MSI_ADDR_HI 0x08 /* Offset to high addr bits */ #define HT_CAPTYPE_DIRECT_ROUTE 0xB0 /* Direct routing configuration */ #define HT_CAPTYPE_VCSET 0xB8 /* Virtual Channel configuration */ #define HT_CAPTYPE_ERROR_RETRY 0xC0 /* Retry on error configuration */ diff --git a/include/linux/pfkeyv2.h b/include/linux/pfkeyv2.h index d5dd471da22..265bafab649 100644 --- a/include/linux/pfkeyv2.h +++ b/include/linux/pfkeyv2.h @@ -32,7 +32,7 @@ struct sadb_ext { struct sadb_sa { uint16_t sadb_sa_len; uint16_t sadb_sa_exttype; - uint32_t sadb_sa_spi; + __be32 sadb_sa_spi; uint8_t sadb_sa_replay; uint8_t sadb_sa_state; uint8_t sadb_sa_auth; @@ -211,7 +211,7 @@ struct sadb_x_nat_t_type { struct sadb_x_nat_t_port { uint16_t sadb_x_nat_t_port_len; uint16_t sadb_x_nat_t_port_exttype; - uint16_t sadb_x_nat_t_port_port; + __be16 sadb_x_nat_t_port_port; uint16_t sadb_x_nat_t_port_reserved; } __attribute__((packed)); /* sizeof(struct sadb_x_nat_t_port) == 8 */ @@ -285,6 +285,7 @@ struct sadb_x_sec_ctx { #define SADB_X_AALG_SHA2_384HMAC 6 #define SADB_X_AALG_SHA2_512HMAC 7 #define SADB_X_AALG_RIPEMD160HMAC 8 +#define SADB_X_AALG_AES_XCBC_MAC 9 #define SADB_X_AALG_NULL 251 /* kame */ #define SADB_AALG_MAX 251 diff --git a/include/linux/phy.h b/include/linux/phy.h index 9447a57ee8a..edd4c88ca7d 100644 --- a/include/linux/phy.h +++ b/include/linux/phy.h @@ -20,6 +20,10 @@ #include <linux/spinlock.h> #include <linux/device.h> +#include <linux/ethtool.h> +#include <linux/mii.h> +#include <linux/timer.h> +#include <linux/workqueue.h> #define PHY_BASIC_FEATURES (SUPPORTED_10baseT_Half | \ SUPPORTED_10baseT_Full | \ @@ -43,15 +47,26 @@ #define PHY_HAS_INTERRUPT 0x00000001 #define PHY_HAS_MAGICANEG 0x00000002 +/* Interface Mode definitions */ +typedef enum { + PHY_INTERFACE_MODE_MII, + PHY_INTERFACE_MODE_GMII, + PHY_INTERFACE_MODE_SGMII, + PHY_INTERFACE_MODE_TBI, + PHY_INTERFACE_MODE_RMII, + PHY_INTERFACE_MODE_RGMII, + PHY_INTERFACE_MODE_RTBI +} phy_interface_t; + #define MII_BUS_MAX 4 -#define PHY_INIT_TIMEOUT 100000 +#define PHY_INIT_TIMEOUT 100000 #define PHY_STATE_TIME 1 #define PHY_FORCE_TIMEOUT 10 #define PHY_AN_TIMEOUT 10 -#define PHY_MAX_ADDR 32 +#define PHY_MAX_ADDR 32 /* Used when trying to connect to a specific phy (mii bus id:phy device id) */ #define PHY_ID_FMT "%x:%02x" @@ -83,8 +98,8 @@ struct mii_bus { int *irq; }; -#define PHY_INTERRUPT_DISABLED 0x0 -#define PHY_INTERRUPT_ENABLED 0x80000000 +#define PHY_INTERRUPT_DISABLED 0x0 +#define PHY_INTERRUPT_ENABLED 0x80000000 /* PHY state machine states: * @@ -226,6 +241,8 @@ struct phy_device { u32 dev_flags; + phy_interface_t interface; + /* Bus address of the PHY (0-32) */ int addr; @@ -341,9 +358,10 @@ struct phy_device* get_phy_device(struct mii_bus *bus, int addr); int phy_clear_interrupt(struct phy_device *phydev); int phy_config_interrupt(struct phy_device *phydev, u32 interrupts); struct phy_device * phy_attach(struct net_device *dev, - const char *phy_id, u32 flags); + const char *phy_id, u32 flags, phy_interface_t interface); struct phy_device * phy_connect(struct net_device *dev, const char *phy_id, - void (*handler)(struct net_device *), u32 flags); + void (*handler)(struct net_device *), u32 flags, + phy_interface_t interface); void phy_disconnect(struct phy_device *phydev); void phy_detach(struct phy_device *phydev); void phy_start(struct phy_device *phydev); diff --git a/include/linux/pid.h b/include/linux/pid.h index 2c0007d1721..4dec047b183 100644 --- a/include/linux/pid.h +++ b/include/linux/pid.h @@ -35,8 +35,9 @@ enum pid_type * * Holding a reference to struct pid solves both of these problems. * It is small so holding a reference does not consume a lot of - * resources, and since a new struct pid is allocated when the numeric - * pid value is reused we don't mistakenly refer to new processes. + * resources, and since a new struct pid is allocated when the numeric pid + * value is reused (when pids wrap around) we don't mistakenly refer to new + * processes. */ struct pid diff --git a/include/linux/pid_namespace.h b/include/linux/pid_namespace.h new file mode 100644 index 00000000000..d2a9d419f01 --- /dev/null +++ b/include/linux/pid_namespace.h @@ -0,0 +1,45 @@ +#ifndef _LINUX_PID_NS_H +#define _LINUX_PID_NS_H + +#include <linux/sched.h> +#include <linux/mm.h> +#include <linux/threads.h> +#include <linux/pid.h> +#include <linux/nsproxy.h> +#include <linux/kref.h> + +struct pidmap { + atomic_t nr_free; + void *page; +}; + +#define PIDMAP_ENTRIES ((PID_MAX_LIMIT + 8*PAGE_SIZE - 1)/PAGE_SIZE/8) + +struct pid_namespace { + struct kref kref; + struct pidmap pidmap[PIDMAP_ENTRIES]; + int last_pid; + struct task_struct *child_reaper; +}; + +extern struct pid_namespace init_pid_ns; + +static inline void get_pid_ns(struct pid_namespace *ns) +{ + kref_get(&ns->kref); +} + +extern int copy_pid_ns(int flags, struct task_struct *tsk); +extern void free_pid_ns(struct kref *kref); + +static inline void put_pid_ns(struct pid_namespace *ns) +{ + kref_put(&ns->kref, free_pid_ns); +} + +static inline struct task_struct *child_reaper(struct task_struct *tsk) +{ + return tsk->nsproxy->pid_ns->child_reaper; +} + +#endif /* _LINUX_PID_NS_H */ diff --git a/include/linux/pipe_fs_i.h b/include/linux/pipe_fs_i.h index ea4f7cd7bfd..2e19478e9e8 100644 --- a/include/linux/pipe_fs_i.h +++ b/include/linux/pipe_fs_i.h @@ -12,7 +12,7 @@ struct pipe_buffer { struct page *page; unsigned int offset, len; - struct pipe_buf_operations *ops; + const struct pipe_buf_operations *ops; unsigned int flags; }; @@ -41,9 +41,7 @@ struct pipe_buf_operations { struct pipe_inode_info { wait_queue_head_t wait; unsigned int nrbufs, curbuf; - struct pipe_buffer bufs[PIPE_BUFFERS]; struct page *tmp_page; - unsigned int start; unsigned int readers; unsigned int writers; unsigned int waiting_writers; @@ -52,6 +50,7 @@ struct pipe_inode_info { struct fasync_struct *fasync_readers; struct fasync_struct *fasync_writers; struct inode *inode; + struct pipe_buffer bufs[PIPE_BUFFERS]; }; /* Differs from PIPE_BUF in that PIPE_SIZE is the length of the actual diff --git a/include/linux/pktcdvd.h b/include/linux/pktcdvd.h index 8a94c717c26..5ea4f05683f 100644 --- a/include/linux/pktcdvd.h +++ b/include/linux/pktcdvd.h @@ -111,6 +111,13 @@ struct pkt_ctrl_command { #include <linux/blkdev.h> #include <linux/completion.h> #include <linux/cdrom.h> +#include <linux/kobject.h> +#include <linux/sysfs.h> + +/* default bio write queue congestion marks */ +#define PKT_WRITE_CONGESTION_ON 10000 +#define PKT_WRITE_CONGESTION_OFF 9000 + struct packet_settings { @@ -241,6 +248,14 @@ struct packet_stacked_data }; #define PSD_POOL_SIZE 64 +struct pktcdvd_kobj +{ + struct kobject kobj; + struct pktcdvd_device *pd; +}; +#define to_pktcdvdkobj(_k) \ + ((struct pktcdvd_kobj*)container_of(_k,struct pktcdvd_kobj,kobj)) + struct pktcdvd_device { struct block_device *bdev; /* dev attached */ @@ -271,6 +286,16 @@ struct pktcdvd_device struct packet_iosched iosched; struct gendisk *disk; + + int write_congestion_off; + int write_congestion_on; + + struct class_device *clsdev; /* sysfs pktcdvd[0-7] class dev */ + struct pktcdvd_kobj *kobj_stat; /* sysfs pktcdvd[0-7]/stat/ */ + struct pktcdvd_kobj *kobj_wqueue; /* sysfs pktcdvd[0-7]/write_queue/ */ + + struct dentry *dfs_d_root; /* debugfs: devname directory */ + struct dentry *dfs_f_info; /* debugfs: info file */ }; #endif /* __KERNEL__ */ diff --git a/include/linux/platform_device.h b/include/linux/platform_device.h index 29cd6dee13d..8bbd459eafd 100644 --- a/include/linux/platform_device.h +++ b/include/linux/platform_device.h @@ -39,7 +39,7 @@ extern struct platform_device *platform_device_register_simple(char *, unsigned extern struct platform_device *platform_device_alloc(const char *name, unsigned int id); extern int platform_device_add_resources(struct platform_device *pdev, struct resource *res, unsigned int num); -extern int platform_device_add_data(struct platform_device *pdev, void *data, size_t size); +extern int platform_device_add_data(struct platform_device *pdev, const void *data, size_t size); extern int platform_device_add(struct platform_device *pdev); extern void platform_device_del(struct platform_device *pdev); extern void platform_device_put(struct platform_device *pdev); @@ -58,6 +58,12 @@ struct platform_driver { extern int platform_driver_register(struct platform_driver *); extern void platform_driver_unregister(struct platform_driver *); +/* non-hotpluggable platform devices may use this so that probe() and + * its support may live in __init sections, conserving runtime memory. + */ +extern int platform_driver_probe(struct platform_driver *driver, + int (*probe)(struct platform_device *)); + #define platform_get_drvdata(_dev) dev_get_drvdata(&(_dev)->dev) #define platform_set_drvdata(_dev,data) dev_set_drvdata(&(_dev)->dev, (data)) diff --git a/include/linux/poll.h b/include/linux/poll.h index 51e1b56741f..27690798623 100644 --- a/include/linux/poll.h +++ b/include/linux/poll.h @@ -8,7 +8,8 @@ #include <linux/compiler.h> #include <linux/wait.h> #include <linux/string.h> -#include <linux/mm.h> +#include <linux/fs.h> +#include <linux/sched.h> #include <asm/uaccess.h> /* ~832 bytes of stack space used max in sys_select/sys_poll before allocating diff --git a/include/linux/profile.h b/include/linux/profile.h index acce53fd38b..eec48f5f934 100644 --- a/include/linux/profile.h +++ b/include/linux/profile.h @@ -6,10 +6,16 @@ #include <linux/kernel.h> #include <linux/init.h> #include <linux/cpumask.h> +#include <linux/cache.h> + #include <asm/errno.h> +extern int prof_on __read_mostly; + #define CPU_PROFILING 1 #define SCHED_PROFILING 2 +#define SLEEP_PROFILING 3 +#define KVM_PROFILING 4 struct proc_dir_entry; struct pt_regs; @@ -18,7 +24,24 @@ struct notifier_block; /* init basic kernel profiler */ void __init profile_init(void); void profile_tick(int); -void profile_hit(int, void *); + +/* + * Add multiple profiler hits to a given address: + */ +void profile_hits(int, void *ip, unsigned int nr_hits); + +/* + * Single profiler hit: + */ +static inline void profile_hit(int type, void *ip) +{ + /* + * Speedup for the common (no profiling enabled) case: + */ + if (unlikely(prof_on == type)) + profile_hits(type, ip, 1); +} + #ifdef CONFIG_PROC_FS void create_prof_cpu_mask(struct proc_dir_entry *); #else diff --git a/include/linux/pspace.h b/include/linux/pspace.h deleted file mode 100644 index 91d48b8b2d9..00000000000 --- a/include/linux/pspace.h +++ /dev/null @@ -1,23 +0,0 @@ -#ifndef _LINUX_PSPACE_H -#define _LINUX_PSPACE_H - -#include <linux/sched.h> -#include <linux/mm.h> -#include <linux/threads.h> -#include <linux/pid.h> - -struct pidmap { - atomic_t nr_free; - void *page; -}; - -#define PIDMAP_ENTRIES ((PID_MAX_LIMIT + 8*PAGE_SIZE - 1)/PAGE_SIZE/8) - -struct pspace { - struct pidmap pidmap[PIDMAP_ENTRIES]; - int last_pid; -}; - -extern struct pspace init_pspace; - -#endif /* _LINUX_PSPACE_H */ diff --git a/include/linux/quotaops.h b/include/linux/quotaops.h index 5110201a415..90c23f690c0 100644 --- a/include/linux/quotaops.h +++ b/include/linux/quotaops.h @@ -37,6 +37,9 @@ extern int dquot_release(struct dquot *dquot); extern int dquot_commit_info(struct super_block *sb, int type); extern int dquot_mark_dquot_dirty(struct dquot *dquot); +int remove_inode_dquot_ref(struct inode *inode, int type, + struct list_head *tofree_head); + extern int vfs_quota_on(struct super_block *sb, int type, int format_id, char *path); extern int vfs_quota_on_mount(struct super_block *sb, char *qf_name, int format_id, int type); diff --git a/include/linux/radix-tree.h b/include/linux/radix-tree.h index 9158a68140c..0deb842541a 100644 --- a/include/linux/radix-tree.h +++ b/include/linux/radix-tree.h @@ -1,6 +1,7 @@ /* * Copyright (C) 2001 Momchil Velikov * Portions Copyright (C) 2001 Christoph Hellwig + * Copyright (C) 2006 Nick Piggin * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as @@ -19,9 +20,37 @@ #ifndef _LINUX_RADIX_TREE_H #define _LINUX_RADIX_TREE_H -#include <linux/sched.h> #include <linux/preempt.h> #include <linux/types.h> +#include <linux/kernel.h> +#include <linux/rcupdate.h> + +/* + * A direct pointer (root->rnode pointing directly to a data item, + * rather than another radix_tree_node) is signalled by the low bit + * set in the root->rnode pointer. + * + * In this case root->height is also NULL, but the direct pointer tests are + * needed for RCU lookups when root->height is unreliable. + */ +#define RADIX_TREE_DIRECT_PTR 1 + +static inline void *radix_tree_ptr_to_direct(void *ptr) +{ + return (void *)((unsigned long)ptr | RADIX_TREE_DIRECT_PTR); +} + +static inline void *radix_tree_direct_to_ptr(void *ptr) +{ + return (void *)((unsigned long)ptr & ~RADIX_TREE_DIRECT_PTR); +} + +static inline int radix_tree_is_direct_ptr(void *ptr) +{ + return (int)((unsigned long)ptr & RADIX_TREE_DIRECT_PTR); +} + +/*** radix-tree API starts here ***/ #define RADIX_TREE_MAX_TAGS 2 @@ -48,6 +77,77 @@ do { \ (root)->rnode = NULL; \ } while (0) +/** + * Radix-tree synchronization + * + * The radix-tree API requires that users provide all synchronisation (with + * specific exceptions, noted below). + * + * Synchronization of access to the data items being stored in the tree, and + * management of their lifetimes must be completely managed by API users. + * + * For API usage, in general, + * - any function _modifying_ the the tree or tags (inserting or deleting + * items, setting or clearing tags must exclude other modifications, and + * exclude any functions reading the tree. + * - any function _reading_ the the tree or tags (looking up items or tags, + * gang lookups) must exclude modifications to the tree, but may occur + * concurrently with other readers. + * + * The notable exceptions to this rule are the following functions: + * radix_tree_lookup + * radix_tree_tag_get + * radix_tree_gang_lookup + * radix_tree_gang_lookup_tag + * radix_tree_tagged + * + * The first 4 functions are able to be called locklessly, using RCU. The + * caller must ensure calls to these functions are made within rcu_read_lock() + * regions. Other readers (lock-free or otherwise) and modifications may be + * running concurrently. + * + * It is still required that the caller manage the synchronization and lifetimes + * of the items. So if RCU lock-free lookups are used, typically this would mean + * that the items have their own locks, or are amenable to lock-free access; and + * that the items are freed by RCU (or only freed after having been deleted from + * the radix tree *and* a synchronize_rcu() grace period). + * + * (Note, rcu_assign_pointer and rcu_dereference are not needed to control + * access to data items when inserting into or looking up from the radix tree) + * + * radix_tree_tagged is able to be called without locking or RCU. + */ + +/** + * radix_tree_deref_slot - dereference a slot + * @pslot: pointer to slot, returned by radix_tree_lookup_slot + * Returns: item that was stored in that slot with any direct pointer flag + * removed. + * + * For use with radix_tree_lookup_slot(). Caller must hold tree at least read + * locked across slot lookup and dereference. More likely, will be used with + * radix_tree_replace_slot(), as well, so caller will hold tree write locked. + */ +static inline void *radix_tree_deref_slot(void **pslot) +{ + return radix_tree_direct_to_ptr(*pslot); +} +/** + * radix_tree_replace_slot - replace item in a slot + * @pslot: pointer to slot, returned by radix_tree_lookup_slot + * @item: new item to store in the slot. + * + * For use with radix_tree_lookup_slot(). Caller must hold tree write locked + * across slot lookup and replacement. + */ +static inline void radix_tree_replace_slot(void **pslot, void *item) +{ + BUG_ON(radix_tree_is_direct_ptr(item)); + rcu_assign_pointer(*pslot, + (void *)((unsigned long)item | + ((unsigned long)*pslot & RADIX_TREE_DIRECT_PTR))); +} + int radix_tree_insert(struct radix_tree_root *, unsigned long, void *); void *radix_tree_lookup(struct radix_tree_root *, unsigned long); void **radix_tree_lookup_slot(struct radix_tree_root *, unsigned long); diff --git a/include/linux/raid/raid5.h b/include/linux/raid/raid5.h index f13299a1559..d8286db60b9 100644 --- a/include/linux/raid/raid5.h +++ b/include/linux/raid/raid5.h @@ -227,7 +227,10 @@ struct raid5_private_data { struct list_head handle_list; /* stripes needing handling */ struct list_head delayed_list; /* stripes that have plugged requests */ struct list_head bitmap_list; /* stripes delaying awaiting bitmap update */ + struct bio *retry_read_aligned; /* currently retrying aligned bios */ + struct bio *retry_read_aligned_list; /* aligned bios retry list */ atomic_t preread_active_stripes; /* stripes with scheduled io */ + atomic_t active_aligned_reads; atomic_t reshape_stripes; /* stripes with pending writes for reshape */ /* unfortunately we need two cache names as we temporarily have @@ -235,7 +238,7 @@ struct raid5_private_data { */ int active_name; char cache_name[2][20]; - kmem_cache_t *slab_cache; /* for allocating stripes */ + struct kmem_cache *slab_cache; /* for allocating stripes */ int seq_flush, seq_write; int quiesce; diff --git a/include/linux/random.h b/include/linux/random.h index 0248b30e306..01ad71033d6 100644 --- a/include/linux/random.h +++ b/include/linux/random.h @@ -51,16 +51,16 @@ extern void add_interrupt_randomness(int irq); extern void get_random_bytes(void *buf, int nbytes); void generate_random_uuid(unsigned char uuid_out[16]); -extern __u32 secure_ip_id(__u32 daddr); -extern u32 secure_ipv4_port_ephemeral(__u32 saddr, __u32 daddr, __u16 dport); -extern u32 secure_ipv6_port_ephemeral(const __u32 *saddr, const __u32 *daddr, - __u16 dport); -extern __u32 secure_tcp_sequence_number(__u32 saddr, __u32 daddr, - __u16 sport, __u16 dport); -extern __u32 secure_tcpv6_sequence_number(__u32 *saddr, __u32 *daddr, - __u16 sport, __u16 dport); -extern u64 secure_dccp_sequence_number(__u32 saddr, __u32 daddr, - __u16 sport, __u16 dport); +extern __u32 secure_ip_id(__be32 daddr); +extern u32 secure_ipv4_port_ephemeral(__be32 saddr, __be32 daddr, __be16 dport); +extern u32 secure_ipv6_port_ephemeral(const __be32 *saddr, const __be32 *daddr, + __be16 dport); +extern __u32 secure_tcp_sequence_number(__be32 saddr, __be32 daddr, + __be16 sport, __be16 dport); +extern __u32 secure_tcpv6_sequence_number(__be32 *saddr, __be32 *daddr, + __be16 sport, __be16 dport); +extern u64 secure_dccp_sequence_number(__be32 saddr, __be32 daddr, + __be16 sport, __be16 dport); #ifndef MODULE extern struct file_operations random_fops, urandom_fops; diff --git a/include/linux/reciprocal_div.h b/include/linux/reciprocal_div.h new file mode 100644 index 00000000000..f9c90b33285 --- /dev/null +++ b/include/linux/reciprocal_div.h @@ -0,0 +1,32 @@ +#ifndef _LINUX_RECIPROCAL_DIV_H +#define _LINUX_RECIPROCAL_DIV_H + +#include <linux/types.h> + +/* + * This file describes reciprocical division. + * + * This optimizes the (A/B) problem, when A and B are two u32 + * and B is a known value (but not known at compile time) + * + * The math principle used is : + * Let RECIPROCAL_VALUE(B) be (((1LL << 32) + (B - 1))/ B) + * Then A / B = (u32)(((u64)(A) * (R)) >> 32) + * + * This replaces a divide by a multiply (and a shift), and + * is generally less expensive in CPU cycles. + */ + +/* + * Computes the reciprocal value (R) for the value B of the divisor. + * Should not be called before each reciprocal_divide(), + * or else the performance is slower than a normal divide. + */ +extern u32 reciprocal_value(u32 B); + + +static inline u32 reciprocal_divide(u32 A, u32 R) +{ + return (u32)(((u64)A * R) >> 32); +} +#endif diff --git a/include/linux/reiserfs_fs.h b/include/linux/reiserfs_fs.h index 7bc6bfb8625..c3fc6caaad3 100644 --- a/include/linux/reiserfs_fs.h +++ b/include/linux/reiserfs_fs.h @@ -739,7 +739,7 @@ struct block_head { #define PUT_B_FREE_SPACE(p_s_bh,val) do { set_blkh_free_space(B_BLK_HEAD(p_s_bh),val); } while (0) /* Get right delimiting key. -- little endian */ -#define B_PRIGHT_DELIM_KEY(p_s_bh) (&(blk_right_delim_key(B_BLK_HEAD(p_s_bh)) +#define B_PRIGHT_DELIM_KEY(p_s_bh) (&(blk_right_delim_key(B_BLK_HEAD(p_s_bh)))) /* Does the buffer contain a disk leaf. */ #define B_IS_ITEMS_LEVEL(p_s_bh) (B_LEVEL(p_s_bh) == DISK_LEAF_NODE_LEVEL) @@ -1159,7 +1159,7 @@ znodes are the way! */ #define PATH_READA 0x1 /* do read ahead */ #define PATH_READA_BACK 0x2 /* read backwards */ -struct path { +struct treepath { int path_length; /* Length of the array above. */ int reada; struct path_element path_elements[EXTENDED_MAX_HEIGHT]; /* Array of the path elements. */ @@ -1169,7 +1169,7 @@ struct path { #define pos_in_item(path) ((path)->pos_in_item) #define INITIALIZE_PATH(var) \ -struct path var = {.path_length = ILLEGAL_PATH_ELEMENT_OFFSET, .reada = 0,} +struct treepath var = {.path_length = ILLEGAL_PATH_ELEMENT_OFFSET, .reada = 0,} /* Get path element by path and path position. */ #define PATH_OFFSET_PELEMENT(p_s_path,n_offset) ((p_s_path)->path_elements +(n_offset)) @@ -1327,7 +1327,7 @@ struct tree_balance { int need_balance_dirty; struct super_block *tb_sb; struct reiserfs_transaction_handle *transaction_handle; - struct path *tb_path; + struct treepath *tb_path; struct buffer_head *L[MAX_HEIGHT]; /* array of left neighbors of nodes in the path */ struct buffer_head *R[MAX_HEIGHT]; /* array of right neighbors of nodes in the path */ struct buffer_head *FL[MAX_HEIGHT]; /* array of fathers of the left neighbors */ @@ -1793,41 +1793,41 @@ static inline void copy_key(struct reiserfs_key *to, memcpy(to, from, KEY_SIZE); } -int comp_items(const struct item_head *stored_ih, const struct path *p_s_path); -const struct reiserfs_key *get_rkey(const struct path *p_s_chk_path, +int comp_items(const struct item_head *stored_ih, const struct treepath *p_s_path); +const struct reiserfs_key *get_rkey(const struct treepath *p_s_chk_path, const struct super_block *p_s_sb); int search_by_key(struct super_block *, const struct cpu_key *, - struct path *, int); + struct treepath *, int); #define search_item(s,key,path) search_by_key (s, key, path, DISK_LEAF_NODE_LEVEL) int search_for_position_by_key(struct super_block *p_s_sb, const struct cpu_key *p_s_cpu_key, - struct path *p_s_search_path); + struct treepath *p_s_search_path); extern void decrement_bcount(struct buffer_head *p_s_bh); -void decrement_counters_in_path(struct path *p_s_search_path); -void pathrelse(struct path *p_s_search_path); -int reiserfs_check_path(struct path *p); -void pathrelse_and_restore(struct super_block *s, struct path *p_s_search_path); +void decrement_counters_in_path(struct treepath *p_s_search_path); +void pathrelse(struct treepath *p_s_search_path); +int reiserfs_check_path(struct treepath *p); +void pathrelse_and_restore(struct super_block *s, struct treepath *p_s_search_path); int reiserfs_insert_item(struct reiserfs_transaction_handle *th, - struct path *path, + struct treepath *path, const struct cpu_key *key, struct item_head *ih, struct inode *inode, const char *body); int reiserfs_paste_into_item(struct reiserfs_transaction_handle *th, - struct path *path, + struct treepath *path, const struct cpu_key *key, struct inode *inode, const char *body, int paste_size); int reiserfs_cut_from_item(struct reiserfs_transaction_handle *th, - struct path *path, + struct treepath *path, struct cpu_key *key, struct inode *inode, struct page *page, loff_t new_file_size); int reiserfs_delete_item(struct reiserfs_transaction_handle *th, - struct path *path, + struct treepath *path, const struct cpu_key *key, struct inode *inode, struct buffer_head *p_s_un_bh); @@ -1858,7 +1858,7 @@ void padd_item(char *item, int total_length, int length); #define GET_BLOCK_NO_DANGLE 16 /* don't leave any transactions running */ int restart_transaction(struct reiserfs_transaction_handle *th, - struct inode *inode, struct path *path); + struct inode *inode, struct treepath *path); void reiserfs_read_locked_inode(struct inode *inode, struct reiserfs_iget_args *args); int reiserfs_find_actor(struct inode *inode, void *p); @@ -1905,7 +1905,7 @@ int reiserfs_setattr(struct dentry *dentry, struct iattr *attr); /* namei.c */ void set_de_name_and_namelen(struct reiserfs_dir_entry *de); int search_by_entry_key(struct super_block *sb, const struct cpu_key *key, - struct path *path, struct reiserfs_dir_entry *de); + struct treepath *path, struct reiserfs_dir_entry *de); struct dentry *reiserfs_get_parent(struct dentry *); /* procfs.c */ @@ -1956,9 +1956,9 @@ extern const struct file_operations reiserfs_dir_operations; /* tail_conversion.c */ int direct2indirect(struct reiserfs_transaction_handle *, struct inode *, - struct path *, struct buffer_head *, loff_t); + struct treepath *, struct buffer_head *, loff_t); int indirect2direct(struct reiserfs_transaction_handle *, struct inode *, - struct page *, struct path *, const struct cpu_key *, + struct page *, struct treepath *, const struct cpu_key *, loff_t, char *); void reiserfs_unmap_buffer(struct buffer_head *); @@ -2045,7 +2045,7 @@ struct __reiserfs_blocknr_hint { struct inode *inode; /* inode passed to allocator, if we allocate unf. nodes */ long block; /* file offset, in blocks */ struct in_core_key key; - struct path *path; /* search path, used by allocator to deternine search_start by + struct treepath *path; /* search path, used by allocator to deternine search_start by * various ways */ struct reiserfs_transaction_handle *th; /* transaction handle is needed to log super blocks and * bitmap blocks changes */ @@ -2101,7 +2101,7 @@ static inline int reiserfs_new_form_blocknrs(struct tree_balance *tb, static inline int reiserfs_new_unf_blocknrs(struct reiserfs_transaction_handle *th, struct inode *inode, b_blocknr_t * new_blocknrs, - struct path *path, long block) + struct treepath *path, long block) { reiserfs_blocknr_hint_t hint = { .th = th, @@ -2118,7 +2118,7 @@ static inline int reiserfs_new_unf_blocknrs(struct reiserfs_transaction_handle static inline int reiserfs_new_unf_blocknrs2(struct reiserfs_transaction_handle *th, struct inode *inode, b_blocknr_t * new_blocknrs, - struct path *path, long block) + struct treepath *path, long block) { reiserfs_blocknr_hint_t hint = { .th = th, diff --git a/include/linux/reiserfs_fs_sb.h b/include/linux/reiserfs_fs_sb.h index 73e0becec08..3a28742d86f 100644 --- a/include/linux/reiserfs_fs_sb.h +++ b/include/linux/reiserfs_fs_sb.h @@ -249,7 +249,8 @@ struct reiserfs_journal { int j_errno; /* when flushing ordered buffers, throttle new ordered writers */ - struct work_struct j_work; + struct delayed_work j_work; + struct super_block *j_work_sb; atomic_t j_async_throttle; }; @@ -429,7 +430,7 @@ enum reiserfs_mount_options { /* -o hash={tea, rupasov, r5, detect} is meant for properly mounting ** reiserfs disks from 3.5.19 or earlier. 99% of the time, this option ** is not required. If the normal autodection code can't determine which -** hash to use (because both hases had the same value for a file) +** hash to use (because both hashes had the same value for a file) ** use this option to force a specific hash. It won't allow you to override ** the existing hash on the FS, so if you have a tea hash disk, and mount ** with -o hash=rupasov, the mount will fail. diff --git a/include/linux/relay.h b/include/linux/relay.h index 24accb48384..c6a48bfc8b1 100644 --- a/include/linux/relay.h +++ b/include/linux/relay.h @@ -38,7 +38,7 @@ struct rchan_buf size_t subbufs_consumed; /* count of sub-buffers consumed */ struct rchan *chan; /* associated channel */ wait_queue_head_t read_wait; /* reader wait queue */ - struct work_struct wake_readers; /* reader wake-up work struct */ + struct delayed_work wake_readers; /* reader wake-up work struct */ struct dentry *dentry; /* channel file dentry */ struct kref kref; /* channel buffer refcount */ struct page **page_array; /* array of current buffer pages */ @@ -274,7 +274,7 @@ static inline void subbuf_start_reserve(struct rchan_buf *buf, /* * exported relay file operations, kernel/relay.c */ -extern struct file_operations relay_file_operations; +extern const struct file_operations relay_file_operations; #endif /* _LINUX_RELAY_H */ diff --git a/include/linux/rmap.h b/include/linux/rmap.h index db2c1df4fef..bdd277223af 100644 --- a/include/linux/rmap.h +++ b/include/linux/rmap.h @@ -30,11 +30,11 @@ struct anon_vma { #ifdef CONFIG_MMU -extern kmem_cache_t *anon_vma_cachep; +extern struct kmem_cache *anon_vma_cachep; static inline struct anon_vma *anon_vma_alloc(void) { - return kmem_cache_alloc(anon_vma_cachep, SLAB_KERNEL); + return kmem_cache_alloc(anon_vma_cachep, GFP_KERNEL); } static inline void anon_vma_free(struct anon_vma *anon_vma) @@ -72,7 +72,7 @@ void __anon_vma_link(struct vm_area_struct *); void page_add_anon_rmap(struct page *, struct vm_area_struct *, unsigned long); void page_add_new_anon_rmap(struct page *, struct vm_area_struct *, unsigned long); void page_add_file_rmap(struct page *); -void page_remove_rmap(struct page *); +void page_remove_rmap(struct page *, struct vm_area_struct *); /** * page_dup_rmap - duplicate pte mapping to a page diff --git a/include/linux/rtc.h b/include/linux/rtc.h index 09ff4c3e271..5e22d4510d1 100644 --- a/include/linux/rtc.h +++ b/include/linux/rtc.h @@ -106,6 +106,7 @@ extern int rtc_year_days(unsigned int day, unsigned int month, unsigned int year extern int rtc_valid_tm(struct rtc_time *tm); extern int rtc_tm_to_time(struct rtc_time *tm, unsigned long *time); extern void rtc_time_to_tm(unsigned long time, struct rtc_time *tm); +extern void rtc_merge_alarm(struct rtc_time *now, struct rtc_time *alarm); #include <linux/device.h> #include <linux/seq_file.h> diff --git a/include/linux/rtmutex.h b/include/linux/rtmutex.h index 5d41dee82f8..b0090e9f788 100644 --- a/include/linux/rtmutex.h +++ b/include/linux/rtmutex.h @@ -63,7 +63,7 @@ struct hrtimer_sleeper; #endif #define __RT_MUTEX_INITIALIZER(mutexname) \ - { .wait_lock = SPIN_LOCK_UNLOCKED \ + { .wait_lock = __SPIN_LOCK_UNLOCKED(mutexname.wait_lock) \ , .wait_list = PLIST_HEAD_INIT(mutexname.wait_list, mutexname.wait_lock) \ , .owner = NULL \ __DEBUG_RT_MUTEX_INITIALIZER(mutexname)} diff --git a/include/linux/rtnetlink.h b/include/linux/rtnetlink.h index 3a18addaed4..4a629ea70cc 100644 --- a/include/linux/rtnetlink.h +++ b/include/linux/rtnetlink.h @@ -3,6 +3,8 @@ #include <linux/netlink.h> #include <linux/if_link.h> +#include <linux/if_addr.h> +#include <linux/neighbour.h> /**** * Routing/neighbour discovery messages. @@ -81,8 +83,6 @@ enum { RTM_NEWPREFIX = 52, #define RTM_NEWPREFIX RTM_NEWPREFIX - RTM_GETPREFIX = 54, -#define RTM_GETPREFIX RTM_GETPREFIX RTM_GETMULTICAST = 58, #define RTM_GETMULTICAST RTM_GETMULTICAST @@ -587,6 +587,9 @@ extern int rtnl_notify(struct sk_buff *skb, u32 pid, u32 group, struct nlmsghdr *nlh, gfp_t flags); extern void rtnl_set_sk_err(u32 group, int error); extern int rtnetlink_put_metrics(struct sk_buff *skb, u32 *metrics); +extern int rtnl_put_cacheinfo(struct sk_buff *skb, struct dst_entry *dst, + u32 id, u32 ts, u32 tsage, long expires, + u32 error); extern void __rta_fill(struct sk_buff *skb, int attrtype, int attrlen, const void *data); diff --git a/include/linux/rwsem-spinlock.h b/include/linux/rwsem-spinlock.h index ae1fcadd598..813cee13da0 100644 --- a/include/linux/rwsem-spinlock.h +++ b/include/linux/rwsem-spinlock.h @@ -44,7 +44,8 @@ struct rw_semaphore { #endif #define __RWSEM_INITIALIZER(name) \ -{ 0, SPIN_LOCK_UNLOCKED, LIST_HEAD_INIT((name).wait_list) __RWSEM_DEP_MAP_INIT(name) } +{ 0, __SPIN_LOCK_UNLOCKED(name.wait_lock), LIST_HEAD_INIT((name).wait_list) \ + __RWSEM_DEP_MAP_INIT(name) } #define DECLARE_RWSEM(name) \ struct rw_semaphore name = __RWSEM_INITIALIZER(name) diff --git a/include/linux/sched.h b/include/linux/sched.h index eafe4a7b823..44637353519 100644 --- a/include/linux/sched.h +++ b/include/linux/sched.h @@ -82,6 +82,7 @@ struct sched_param { #include <linux/resource.h> #include <linux/timer.h> #include <linux/hrtimer.h> +#include <linux/task_io_accounting.h> #include <asm/processor.h> @@ -194,7 +195,16 @@ extern void init_idle(struct task_struct *idle, int cpu); extern cpumask_t nohz_cpu_mask; -extern void show_state(void); +/* + * Only dump TASK_* tasks. (-1 for all tasks) + */ +extern void show_state_filter(unsigned long state_filter); + +static inline void show_state(void) +{ + show_state_filter(-1); +} + extern void show_regs(struct pt_regs *); /* @@ -338,15 +348,23 @@ struct mm_struct { unsigned long saved_auxv[AT_VECTOR_SIZE]; /* for /proc/PID/auxv */ - unsigned dumpable:2; cpumask_t cpu_vm_mask; /* Architecture-specific MM context */ mm_context_t context; - /* Token based thrashing protection. */ - unsigned long swap_token_time; - char recent_pagein; + /* Swap token stuff */ + /* + * Last value of global fault stamp as seen by this process. + * In other words, this value gives an indication of how long + * it has been since this task got the token. + * Look at mm/thrash.c + */ + unsigned int faultstamp; + unsigned int token_priority; + unsigned int last_interval; + + unsigned char dumpable:2; /* coredumping support */ int core_waiters; @@ -419,7 +437,12 @@ struct signal_struct { /* job control IDs */ pid_t pgrp; pid_t tty_old_pgrp; - pid_t session; + + union { + pid_t session __deprecated; + pid_t __session; + }; + /* boolean value for session group leader */ int leader; @@ -556,7 +579,7 @@ struct sched_info { #endif /* defined(CONFIG_SCHEDSTATS) || defined(CONFIG_TASK_DELAY_ACCT) */ #ifdef CONFIG_SCHEDSTATS -extern struct file_operations proc_schedstat_operations; +extern const struct file_operations proc_schedstat_operations; #endif /* CONFIG_SCHEDSTATS */ #ifdef CONFIG_TASK_DELAY_ACCT @@ -625,6 +648,7 @@ enum idle_type #define SD_SHARE_CPUPOWER 128 /* Domain members share cpu power */ #define SD_POWERSAVINGS_BALANCE 256 /* Balance for power savings */ #define SD_SHARE_PKG_RESOURCES 512 /* Domain members share cpu pkg resources */ +#define SD_SERIALIZE 1024 /* Only a single load balancing instance */ #define BALANCE_FOR_MC_POWER \ (sched_smt_power_savings ? SD_POWERSAVINGS_BALANCE : 0) @@ -991,6 +1015,7 @@ struct task_struct { wait_queue_t *io_wait; /* i/o counters(bytes read/written, #syscalls */ u64 rchar, wchar, syscr, syscw; + struct task_io_accounting ioac; #if defined(CONFIG_TASK_XACCT) u64 acct_rss_mem1; /* accumulated rss usage */ u64 acct_vm_mem1; /* accumulated virtual memory usage */ @@ -1023,6 +1048,9 @@ struct task_struct { #ifdef CONFIG_TASK_DELAY_ACCT struct task_delay_info *delays; #endif +#ifdef CONFIG_FAULT_INJECTION + int make_it_fail; +#endif }; static inline pid_t process_group(struct task_struct *tsk) @@ -1030,6 +1058,21 @@ static inline pid_t process_group(struct task_struct *tsk) return tsk->signal->pgrp; } +static inline pid_t signal_session(struct signal_struct *sig) +{ + return sig->__session; +} + +static inline pid_t process_session(struct task_struct *tsk) +{ + return signal_session(tsk->signal); +} + +static inline void set_signal_session(struct signal_struct *sig, pid_t session) +{ + sig->__session = session; +} + static inline struct pid *task_pid(struct task_struct *task) { return task->pids[PIDTYPE_PID].pid; @@ -1101,7 +1144,6 @@ static inline void put_task_struct(struct task_struct *t) #define PF_MEMALLOC 0x00000800 /* Allocating memory */ #define PF_FLUSHER 0x00001000 /* responsible for disk writeback */ #define PF_USED_MATH 0x00002000 /* if unset the fpu must be initialized before use */ -#define PF_FREEZE 0x00004000 /* this task is being frozen for suspend now */ #define PF_NOFREEZE 0x00008000 /* this thread should not be frozen */ #define PF_FROZEN 0x00010000 /* frozen for system suspend */ #define PF_FSTRANS 0x00020000 /* inside a filesystem transaction */ @@ -1223,7 +1265,6 @@ extern struct mm_struct init_mm; #define find_task_by_pid(nr) find_task_by_pid_type(PIDTYPE_PID, nr) extern struct task_struct *find_task_by_pid_type(int type, int pid); -extern void set_special_pids(pid_t session, pid_t pgrp); extern void __set_special_pids(pid_t session, pid_t pgrp); /* per-UID process charging. */ @@ -1288,7 +1329,6 @@ extern int kill_pgrp(struct pid *pid, int sig, int priv); extern int kill_pid(struct pid *pid, int sig, int priv); extern int __kill_pg_info(int sig, struct siginfo *info, pid_t pgrp); extern int kill_pg_info(int, struct siginfo *, pid_t); -extern int kill_proc_info(int, struct siginfo *, pid_t); extern void do_notify_parent(struct task_struct *, int); extern void force_sig(int, struct task_struct *); extern void force_sig_specific(int, struct task_struct *); @@ -1365,7 +1405,6 @@ extern NORET_TYPE void do_group_exit(int); extern void daemonize(const char *, ...); extern int allow_signal(int); extern int disallow_signal(int); -extern struct task_struct *child_reaper; extern int do_execve(char *, char __user * __user *, char __user * __user *, struct pt_regs *); extern long do_fork(unsigned long, unsigned long, struct pt_regs *, unsigned long, int __user *, int __user *); @@ -1610,87 +1649,6 @@ extern int sched_create_sysfs_power_savings_entries(struct sysdev_class *cls); extern void normalize_rt_tasks(void); -#ifdef CONFIG_PM -/* - * Check if a process has been frozen - */ -static inline int frozen(struct task_struct *p) -{ - return p->flags & PF_FROZEN; -} - -/* - * Check if there is a request to freeze a process - */ -static inline int freezing(struct task_struct *p) -{ - return p->flags & PF_FREEZE; -} - -/* - * Request that a process be frozen - * FIXME: SMP problem. We may not modify other process' flags! - */ -static inline void freeze(struct task_struct *p) -{ - p->flags |= PF_FREEZE; -} - -/* - * Sometimes we may need to cancel the previous 'freeze' request - */ -static inline void do_not_freeze(struct task_struct *p) -{ - p->flags &= ~PF_FREEZE; -} - -/* - * Wake up a frozen process - */ -static inline int thaw_process(struct task_struct *p) -{ - if (frozen(p)) { - p->flags &= ~PF_FROZEN; - wake_up_process(p); - return 1; - } - return 0; -} - -/* - * freezing is complete, mark process as frozen - */ -static inline void frozen_process(struct task_struct *p) -{ - p->flags = (p->flags & ~PF_FREEZE) | PF_FROZEN; -} - -extern void refrigerator(void); -extern int freeze_processes(void); -extern void thaw_processes(void); - -static inline int try_to_freeze(void) -{ - if (freezing(current)) { - refrigerator(); - return 1; - } else - return 0; -} -#else -static inline int frozen(struct task_struct *p) { return 0; } -static inline int freezing(struct task_struct *p) { return 0; } -static inline void freeze(struct task_struct *p) { BUG(); } -static inline int thaw_process(struct task_struct *p) { return 1; } -static inline void frozen_process(struct task_struct *p) { BUG(); } - -static inline void refrigerator(void) {} -static inline int freeze_processes(void) { BUG(); return 0; } -static inline void thaw_processes(void) {} - -static inline int try_to_freeze(void) { return 0; } - -#endif /* CONFIG_PM */ #endif /* __KERNEL__ */ #endif diff --git a/include/linux/screen_info.h b/include/linux/screen_info.h index 2925e66a673..b02308ee766 100644 --- a/include/linux/screen_info.h +++ b/include/linux/screen_info.h @@ -42,7 +42,8 @@ struct screen_info { u16 pages; /* 0x32 */ u16 vesa_attributes; /* 0x34 */ u32 capabilities; /* 0x36 */ - /* 0x3a -- 0x3f reserved for future expansion */ + /* 0x3a -- 0x3b reserved for future expansion */ + /* 0x3c -- 0x3f micro stack for relocatable kernels */ }; extern struct screen_info screen_info; diff --git a/include/linux/sctp.h b/include/linux/sctp.h index 6ec66dec29f..d4f86560bff 100644 --- a/include/linux/sctp.h +++ b/include/linux/sctp.h @@ -57,17 +57,17 @@ /* Section 3.1. SCTP Common Header Format */ typedef struct sctphdr { - __u16 source; - __u16 dest; - __u32 vtag; - __u32 checksum; + __be16 source; + __be16 dest; + __be32 vtag; + __be32 checksum; } __attribute__((packed)) sctp_sctphdr_t; /* Section 3.2. Chunk Field Descriptions. */ typedef struct sctp_chunkhdr { __u8 type; __u8 flags; - __u16 length; + __be16 length; } __attribute__((packed)) sctp_chunkhdr_t; @@ -153,8 +153,8 @@ enum { SCTP_CHUNK_FLAG_T = 0x01 }; */ typedef struct sctp_paramhdr { - __u16 type; - __u16 length; + __be16 type; + __be16 length; } __attribute__((packed)) sctp_paramhdr_t; typedef enum { @@ -180,7 +180,7 @@ typedef enum { SCTP_PARAM_ERR_CAUSE = __constant_htons(0xc003), SCTP_PARAM_SET_PRIMARY = __constant_htons(0xc004), SCTP_PARAM_SUCCESS_REPORT = __constant_htons(0xc005), - SCTP_PARAM_ADAPTION_LAYER_IND = __constant_htons(0xc006), + SCTP_PARAM_ADAPTATION_LAYER_IND = __constant_htons(0xc006), } sctp_param_t; /* enum */ @@ -203,10 +203,10 @@ enum { SCTP_PARAM_ACTION_MASK = __constant_htons(0xc000), }; /* RFC 2960 Section 3.3.1 Payload Data (DATA) (0) */ typedef struct sctp_datahdr { - __u32 tsn; - __u16 stream; - __u16 ssn; - __u32 ppid; + __be32 tsn; + __be16 stream; + __be16 ssn; + __be32 ppid; __u8 payload[0]; } __attribute__((packed)) sctp_datahdr_t; @@ -232,11 +232,11 @@ enum { SCTP_DATA_FRAG_MASK = 0x03, }; * endpoints. */ typedef struct sctp_inithdr { - __u32 init_tag; - __u32 a_rwnd; - __u16 num_outbound_streams; - __u16 num_inbound_streams; - __u32 initial_tsn; + __be32 init_tag; + __be32 a_rwnd; + __be16 num_outbound_streams; + __be16 num_inbound_streams; + __be32 initial_tsn; __u8 params[0]; } __attribute__((packed)) sctp_inithdr_t; @@ -261,7 +261,7 @@ typedef struct sctp_ipv6addr_param { /* Section 3.3.2.1 Cookie Preservative (9) */ typedef struct sctp_cookie_preserve_param { sctp_paramhdr_t param_hdr; - uint32_t lifespan_increment; + __be32 lifespan_increment; } __attribute__((packed)) sctp_cookie_preserve_param_t; /* Section 3.3.2.1 Host Name Address (11) */ @@ -273,7 +273,7 @@ typedef struct sctp_hostname_param { /* Section 3.3.2.1 Supported Address Types (12) */ typedef struct sctp_supported_addrs_param { sctp_paramhdr_t param_hdr; - uint16_t types[0]; + __be16 types[0]; } __attribute__((packed)) sctp_supported_addrs_param_t; /* Appendix A. ECN Capable (32768) */ @@ -281,11 +281,11 @@ typedef struct sctp_ecn_capable_param { sctp_paramhdr_t param_hdr; } __attribute__((packed)) sctp_ecn_capable_param_t; -/* ADDIP Section 3.2.6 Adaption Layer Indication */ -typedef struct sctp_adaption_ind_param { +/* ADDIP Section 3.2.6 Adaptation Layer Indication */ +typedef struct sctp_adaptation_ind_param { struct sctp_paramhdr param_hdr; - __u32 adaption_ind; -} __attribute__((packed)) sctp_adaption_ind_param_t; + __be32 adaptation_ind; +} __attribute__((packed)) sctp_adaptation_ind_param_t; /* RFC 2960. Section 3.3.3 Initiation Acknowledgement (INIT ACK) (2): * The INIT ACK chunk is used to acknowledge the initiation of an SCTP @@ -316,11 +316,11 @@ typedef struct sctp_unrecognized_param { */ typedef struct sctp_gap_ack_block { - __u16 start; - __u16 end; + __be16 start; + __be16 end; } __attribute__((packed)) sctp_gap_ack_block_t; -typedef uint32_t sctp_dup_tsn_t; +typedef __be32 sctp_dup_tsn_t; typedef union { sctp_gap_ack_block_t gab; @@ -328,10 +328,10 @@ typedef union { } sctp_sack_variable_t; typedef struct sctp_sackhdr { - __u32 cum_tsn_ack; - __u32 a_rwnd; - __u16 num_gap_ack_blocks; - __u16 num_dup_tsns; + __be32 cum_tsn_ack; + __be32 a_rwnd; + __be16 num_gap_ack_blocks; + __be16 num_dup_tsns; sctp_sack_variable_t variable[0]; } __attribute__((packed)) sctp_sackhdr_t; @@ -371,7 +371,7 @@ typedef struct sctp_abort_chunk { * and the highest consecutive acking value. */ typedef struct sctp_shutdownhdr { - __u32 cum_tsn_ack; + __be32 cum_tsn_ack; } __attribute__((packed)) sctp_shutdownhdr_t; struct sctp_shutdown_chunk_t { @@ -382,8 +382,8 @@ struct sctp_shutdown_chunk_t { /* RFC 2960. Section 3.3.10 Operation Error (ERROR) (9) */ typedef struct sctp_errhdr { - __u16 cause; - __u16 length; + __be16 cause; + __be16 length; __u8 variable[0]; } __attribute__((packed)) sctp_errhdr_t; @@ -462,7 +462,7 @@ typedef enum { * Explicit Congestion Notification Echo (ECNE) (12) */ typedef struct sctp_ecnehdr { - __u32 lowest_tsn; + __be32 lowest_tsn; } sctp_ecnehdr_t; typedef struct sctp_ecne_chunk { @@ -474,7 +474,7 @@ typedef struct sctp_ecne_chunk { * Congestion Window Reduced (CWR) (13) */ typedef struct sctp_cwrhdr { - __u32 lowest_tsn; + __be32 lowest_tsn; } sctp_cwrhdr_t; typedef struct sctp_cwr_chunk { @@ -529,12 +529,12 @@ typedef struct sctp_cwr_chunk { * chunks this field MUST be filled in. */ struct sctp_fwdtsn_skip { - __u16 stream; - __u16 ssn; + __be16 stream; + __be16 ssn; } __attribute__((packed)); struct sctp_fwdtsn_hdr { - __u32 new_cum_tsn; + __be32 new_cum_tsn; struct sctp_fwdtsn_skip skip[0]; } __attribute((packed)); @@ -578,11 +578,11 @@ struct sctp_fwdtsn_chunk { */ typedef struct sctp_addip_param { sctp_paramhdr_t param_hdr; - __u32 crr_id; + __be32 crr_id; } __attribute__((packed)) sctp_addip_param_t; typedef struct sctp_addiphdr { - __u32 serial; + __be32 serial; __u8 params[0]; } __attribute__((packed)) sctp_addiphdr_t; diff --git a/include/linux/security.h b/include/linux/security.h index b200b9856f3..83cdefae993 100644 --- a/include/linux/security.h +++ b/include/linux/security.h @@ -826,6 +826,8 @@ struct request_sock; * Sets the openreq's sid to socket's sid with MLS portion taken from peer sid. * @inet_csk_clone: * Sets the new child socket's sid to the openreq sid. + * @inet_conn_established: + * Sets the connection's peersid to the secmark on skb. * @req_classify_flow: * Sets the flow's sid to the openreq sid. * @@ -836,10 +838,8 @@ struct request_sock; * used by the XFRM system. * @sec_ctx contains the security context information being provided by * the user-level policy update program (e.g., setkey). - * @sk refers to the sock from which to derive the security context. * Allocate a security structure to the xp->security field; the security - * field is initialized to NULL when the xfrm_policy is allocated. Only - * one of sec_ctx or sock can be specified. + * field is initialized to NULL when the xfrm_policy is allocated. * Return 0 if operation was successful (memory to allocate, legal context) * @xfrm_policy_clone_security: * @old contains an existing xfrm_policy in the SPD. @@ -858,9 +858,6 @@ struct request_sock; * Database by the XFRM system. * @sec_ctx contains the security context information being provided by * the user-level SA generation program (e.g., setkey or racoon). - * @polsec contains the security context information associated with a xfrm - * policy rule from which to take the base context. polsec must be NULL - * when sec_ctx is specified. * @secid contains the secid from which to take the mls portion of the context. * Allocate a security structure to the x->security field; the security * field is initialized to NULL when the xfrm_state is allocated. Set the @@ -889,11 +886,6 @@ struct request_sock; * @xp contains the policy to check for a match. * @fl contains the flow to check for a match. * Return 1 if there is a match. - * @xfrm_flow_state_match: - * @fl contains the flow key to match. - * @xfrm points to the xfrm_state to match. - * @xp points to the xfrm_policy to match. - * Return 1 if there is a match. * @xfrm_decode_session: * @skb points to skb to decode. * @secid points to the flow key secid to set. @@ -1373,25 +1365,24 @@ struct security_operations { int (*inet_conn_request)(struct sock *sk, struct sk_buff *skb, struct request_sock *req); void (*inet_csk_clone)(struct sock *newsk, const struct request_sock *req); + void (*inet_conn_established)(struct sock *sk, struct sk_buff *skb); void (*req_classify_flow)(const struct request_sock *req, struct flowi *fl); #endif /* CONFIG_SECURITY_NETWORK */ #ifdef CONFIG_SECURITY_NETWORK_XFRM int (*xfrm_policy_alloc_security) (struct xfrm_policy *xp, - struct xfrm_user_sec_ctx *sec_ctx, struct sock *sk); + struct xfrm_user_sec_ctx *sec_ctx); int (*xfrm_policy_clone_security) (struct xfrm_policy *old, struct xfrm_policy *new); void (*xfrm_policy_free_security) (struct xfrm_policy *xp); int (*xfrm_policy_delete_security) (struct xfrm_policy *xp); int (*xfrm_state_alloc_security) (struct xfrm_state *x, - struct xfrm_user_sec_ctx *sec_ctx, struct xfrm_sec_ctx *polsec, + struct xfrm_user_sec_ctx *sec_ctx, u32 secid); void (*xfrm_state_free_security) (struct xfrm_state *x); int (*xfrm_state_delete_security) (struct xfrm_state *x); int (*xfrm_policy_lookup)(struct xfrm_policy *xp, u32 fl_secid, u8 dir); int (*xfrm_state_pol_flow_match)(struct xfrm_state *x, struct xfrm_policy *xp, struct flowi *fl); - int (*xfrm_flow_state_match)(struct flowi *fl, struct xfrm_state *xfrm, - struct xfrm_policy *xp); int (*xfrm_decode_session)(struct sk_buff *skb, u32 *secid, int ckall); #endif /* CONFIG_SECURITY_NETWORK_XFRM */ @@ -2966,9 +2957,15 @@ static inline void security_inet_csk_clone(struct sock *newsk, { security_ops->inet_csk_clone(newsk, req); } + +static inline void security_inet_conn_established(struct sock *sk, + struct sk_buff *skb) +{ + security_ops->inet_conn_established(sk, skb); +} #else /* CONFIG_SECURITY_NETWORK */ static inline int security_unix_stream_connect(struct socket * sock, - struct socket * other, + struct socket * other, struct sock * newsk) { return 0; @@ -3115,12 +3112,17 @@ static inline void security_inet_csk_clone(struct sock *newsk, const struct request_sock *req) { } + +static inline void security_inet_conn_established(struct sock *sk, + struct sk_buff *skb) +{ +} #endif /* CONFIG_SECURITY_NETWORK */ #ifdef CONFIG_SECURITY_NETWORK_XFRM static inline int security_xfrm_policy_alloc(struct xfrm_policy *xp, struct xfrm_user_sec_ctx *sec_ctx) { - return security_ops->xfrm_policy_alloc_security(xp, sec_ctx, NULL); + return security_ops->xfrm_policy_alloc_security(xp, sec_ctx); } static inline int security_xfrm_policy_clone(struct xfrm_policy *old, struct xfrm_policy *new) @@ -3141,7 +3143,7 @@ static inline int security_xfrm_policy_delete(struct xfrm_policy *xp) static inline int security_xfrm_state_alloc(struct xfrm_state *x, struct xfrm_user_sec_ctx *sec_ctx) { - return security_ops->xfrm_state_alloc_security(x, sec_ctx, NULL, 0); + return security_ops->xfrm_state_alloc_security(x, sec_ctx, 0); } static inline int security_xfrm_state_alloc_acquire(struct xfrm_state *x, @@ -3149,7 +3151,11 @@ static inline int security_xfrm_state_alloc_acquire(struct xfrm_state *x, { if (!polsec) return 0; - return security_ops->xfrm_state_alloc_security(x, NULL, polsec, secid); + /* + * We want the context to be taken from secid which is usually + * from the sock. + */ + return security_ops->xfrm_state_alloc_security(x, NULL, secid); } static inline int security_xfrm_state_delete(struct xfrm_state *x) @@ -3173,12 +3179,6 @@ static inline int security_xfrm_state_pol_flow_match(struct xfrm_state *x, return security_ops->xfrm_state_pol_flow_match(x, xp, fl); } -static inline int security_xfrm_flow_state_match(struct flowi *fl, - struct xfrm_state *xfrm, struct xfrm_policy *xp) -{ - return security_ops->xfrm_flow_state_match(fl, xfrm, xp); -} - static inline int security_xfrm_decode_session(struct sk_buff *skb, u32 *secid) { return security_ops->xfrm_decode_session(skb, secid, 1); @@ -3242,12 +3242,6 @@ static inline int security_xfrm_state_pol_flow_match(struct xfrm_state *x, return 1; } -static inline int security_xfrm_flow_state_match(struct flowi *fl, - struct xfrm_state *xfrm, struct xfrm_policy *xp) -{ - return 1; -} - static inline int security_xfrm_decode_session(struct sk_buff *skb, u32 *secid) { return 0; diff --git a/include/linux/seq_file.h b/include/linux/seq_file.h index b95f6eb7254..3e3cccbb1ca 100644 --- a/include/linux/seq_file.h +++ b/include/linux/seq_file.h @@ -20,7 +20,7 @@ struct seq_file { loff_t index; loff_t version; struct mutex lock; - struct seq_operations *op; + const struct seq_operations *op; void *private; }; @@ -31,7 +31,7 @@ struct seq_operations { int (*show) (struct seq_file *m, void *v); }; -int seq_open(struct file *, struct seq_operations *); +int seq_open(struct file *, const struct seq_operations *); ssize_t seq_read(struct file *, char __user *, size_t, loff_t *); loff_t seq_lseek(struct file *, loff_t, int); int seq_release(struct inode *, struct file *); diff --git a/include/linux/seqlock.h b/include/linux/seqlock.h index 46000936f8f..6b0648cfdff 100644 --- a/include/linux/seqlock.h +++ b/include/linux/seqlock.h @@ -44,8 +44,11 @@ typedef struct { #define SEQLOCK_UNLOCKED \ __SEQLOCK_UNLOCKED(old_style_seqlock_init) -#define seqlock_init(x) \ - do { *(x) = (seqlock_t) __SEQLOCK_UNLOCKED(x); } while (0) +#define seqlock_init(x) \ + do { \ + (x)->sequence = 0; \ + spin_lock_init(&(x)->lock); \ + } while (0) #define DEFINE_SEQLOCK(x) \ seqlock_t x = __SEQLOCK_UNLOCKED(x) diff --git a/include/linux/serial_8250.h b/include/linux/serial_8250.h index 8e968141372..71310d80c09 100644 --- a/include/linux/serial_8250.h +++ b/include/linux/serial_8250.h @@ -41,6 +41,7 @@ enum { PLAT8250_DEV_FOURPORT, PLAT8250_DEV_ACCENT, PLAT8250_DEV_BOCA, + PLAT8250_DEV_EXAR_ST16C554, PLAT8250_DEV_HUB6, PLAT8250_DEV_MCA, PLAT8250_DEV_AU1X00, diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h index 463ab953b09..cf23813cbec 100644 --- a/include/linux/serial_core.h +++ b/include/linux/serial_core.h @@ -132,6 +132,8 @@ #define PORT_S3C2412 73 +/* Xilinx uartlite */ +#define PORT_UARTLITE 74 #ifdef __KERNEL__ @@ -164,8 +166,8 @@ struct uart_ops { void (*break_ctl)(struct uart_port *, int ctl); int (*startup)(struct uart_port *); void (*shutdown)(struct uart_port *); - void (*set_termios)(struct uart_port *, struct termios *new, - struct termios *old); + void (*set_termios)(struct uart_port *, struct ktermios *new, + struct ktermios *old); void (*pm)(struct uart_port *, unsigned int state, unsigned int oldstate); int (*set_wake)(struct uart_port *, unsigned int state); @@ -359,8 +361,8 @@ void uart_write_wakeup(struct uart_port *port); */ void uart_update_timeout(struct uart_port *port, unsigned int cflag, unsigned int baud); -unsigned int uart_get_baud_rate(struct uart_port *port, struct termios *termios, - struct termios *old, unsigned int min, +unsigned int uart_get_baud_rate(struct uart_port *port, struct ktermios *termios, + struct ktermios *old, unsigned int min, unsigned int max); unsigned int uart_get_divisor(struct uart_port *port, unsigned int baud); diff --git a/include/linux/serio.h b/include/linux/serio.h index b99c5ca9708..0f478a8791a 100644 --- a/include/linux/serio.h +++ b/include/linux/serio.h @@ -85,18 +85,8 @@ static inline void serio_register_port(struct serio *serio) void serio_unregister_port(struct serio *serio); void serio_unregister_child_port(struct serio *serio); -void __serio_unregister_port_delayed(struct serio *serio, struct module *owner); -static inline void serio_unregister_port_delayed(struct serio *serio) -{ - __serio_unregister_port_delayed(serio, THIS_MODULE); -} - -void __serio_register_driver(struct serio_driver *drv, struct module *owner); -static inline void serio_register_driver(struct serio_driver *drv) -{ - __serio_register_driver(drv, THIS_MODULE); -} +int serio_register_driver(struct serio_driver *drv); void serio_unregister_driver(struct serio_driver *drv); static inline int serio_write(struct serio *serio, unsigned char data) diff --git a/include/linux/signal.h b/include/linux/signal.h index 117135e33d6..14749056dd6 100644 --- a/include/linux/signal.h +++ b/include/linux/signal.h @@ -241,6 +241,8 @@ extern int sigprocmask(int, sigset_t *, sigset_t *); struct pt_regs; extern int get_signal_to_deliver(siginfo_t *info, struct k_sigaction *return_ka, struct pt_regs *regs, void *cookie); +extern struct kmem_cache *sighand_cachep; + #endif /* __KERNEL__ */ #endif /* _LINUX_SIGNAL_H */ diff --git a/include/linux/skbuff.h b/include/linux/skbuff.h index 85577a4ffa6..4ff3940210d 100644 --- a/include/linux/skbuff.h +++ b/include/linux/skbuff.h @@ -22,12 +22,10 @@ #include <asm/atomic.h> #include <asm/types.h> #include <linux/spinlock.h> -#include <linux/mm.h> -#include <linux/highmem.h> -#include <linux/poll.h> #include <linux/net.h> #include <linux/textsearch.h> #include <net/checksum.h> +#include <linux/rcupdate.h> #include <linux/dmaengine.h> #define HAVE_ALLOC_SKB /* For the drivers to know */ @@ -139,7 +137,7 @@ struct skb_shared_info { /* Warning: this field is not always filled in (UFO)! */ unsigned short gso_segs; unsigned short gso_type; - unsigned int ip6_frag_id; + __be32 ip6_frag_id; struct sk_buff *frag_list; skb_frag_t frags[MAX_SKB_FRAGS]; }; @@ -216,7 +214,7 @@ enum { * @tail: Tail pointer * @end: End pointer * @destructor: Destruct function - * @nfmark: Can be used for communication between hooks + * @mark: Generic packet mark * @nfct: Associated connection, if any * @ipvs_property: skbuff is owned by ipvs * @nfctinfo: Relationship of this skb to the connection @@ -273,8 +271,11 @@ struct sk_buff { unsigned int len, data_len, - mac_len, - csum; + mac_len; + union { + __wsum csum; + __u32 csum_offset; + }; __u32 priority; __u8 local_df:1, cloned:1, @@ -295,7 +296,6 @@ struct sk_buff { #ifdef CONFIG_BRIDGE_NETFILTER struct nf_bridge_info *nf_bridge; #endif - __u32 nfmark; #endif /* CONFIG_NETFILTER */ #ifdef CONFIG_NET_SCHED __u16 tc_index; /* traffic control index */ @@ -310,6 +310,7 @@ struct sk_buff { __u32 secmark; #endif + __u32 mark; /* These elements must be at the end, see alloc_skb() for details. */ unsigned int truesize; @@ -331,20 +332,20 @@ struct sk_buff { extern void kfree_skb(struct sk_buff *skb); extern void __kfree_skb(struct sk_buff *skb); extern struct sk_buff *__alloc_skb(unsigned int size, - gfp_t priority, int fclone); + gfp_t priority, int fclone, int node); static inline struct sk_buff *alloc_skb(unsigned int size, gfp_t priority) { - return __alloc_skb(size, priority, 0); + return __alloc_skb(size, priority, 0, -1); } static inline struct sk_buff *alloc_skb_fclone(unsigned int size, gfp_t priority) { - return __alloc_skb(size, priority, 1); + return __alloc_skb(size, priority, 1, -1); } -extern struct sk_buff *alloc_skb_from_cache(kmem_cache_t *cp, +extern struct sk_buff *alloc_skb_from_cache(struct kmem_cache *cp, unsigned int size, gfp_t priority); extern void kfree_skbmem(struct sk_buff *skb); @@ -1199,8 +1200,7 @@ static inline int skb_add_data(struct sk_buff *skb, if (skb->ip_summed == CHECKSUM_NONE) { int err = 0; - unsigned int csum = csum_and_copy_from_user(from, - skb_put(skb, copy), + __wsum csum = csum_and_copy_from_user(from, skb_put(skb, copy), copy, 0, &err); if (!err) { skb->csum = csum_block_add(skb->csum, csum, off); @@ -1293,24 +1293,6 @@ static inline int pskb_trim_rcsum(struct sk_buff *skb, unsigned int len) return __pskb_trim(skb, len); } -static inline void *kmap_skb_frag(const skb_frag_t *frag) -{ -#ifdef CONFIG_HIGHMEM - BUG_ON(in_irq()); - - local_bh_disable(); -#endif - return kmap_atomic(frag->page, KM_SKB_DATA_SOFTIRQ); -} - -static inline void kunmap_skb_frag(void *vaddr) -{ - kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ); -#ifdef CONFIG_HIGHMEM - local_bh_enable(); -#endif -} - #define skb_queue_walk(queue, skb) \ for (skb = (queue)->next; \ prefetch(skb->next), (skb != (struct sk_buff *)(queue)); \ @@ -1335,15 +1317,15 @@ extern int skb_copy_and_csum_datagram_iovec(struct sk_buff *skb, extern void skb_free_datagram(struct sock *sk, struct sk_buff *skb); extern void skb_kill_datagram(struct sock *sk, struct sk_buff *skb, unsigned int flags); -extern unsigned int skb_checksum(const struct sk_buff *skb, int offset, - int len, unsigned int csum); +extern __wsum skb_checksum(const struct sk_buff *skb, int offset, + int len, __wsum csum); extern int skb_copy_bits(const struct sk_buff *skb, int offset, void *to, int len); extern int skb_store_bits(const struct sk_buff *skb, int offset, void *from, int len); -extern unsigned int skb_copy_and_csum_bits(const struct sk_buff *skb, +extern __wsum skb_copy_and_csum_bits(const struct sk_buff *skb, int offset, u8 *to, int len, - unsigned int csum); + __wsum csum); extern void skb_copy_and_csum_dev(const struct sk_buff *skb, u8 *to); extern void skb_split(struct sk_buff *skb, struct sk_buff *skb1, const u32 len); @@ -1399,7 +1381,7 @@ static inline void skb_set_timestamp(struct sk_buff *skb, const struct timeval * extern void __net_timestamp(struct sk_buff *skb); -extern unsigned int __skb_checksum_complete(struct sk_buff *skb); +extern __sum16 __skb_checksum_complete(struct sk_buff *skb); /** * skb_checksum_complete - Calculate checksum of an entire packet diff --git a/include/linux/slab.h b/include/linux/slab.h index c4947b8a2c0..1ef822e31c7 100644 --- a/include/linux/slab.h +++ b/include/linux/slab.h @@ -1,82 +1,106 @@ /* - * linux/include/linux/slab.h - * Written by Mark Hemment, 1996. - * (markhe@nextd.demon.co.uk) + * Written by Mark Hemment, 1996 (markhe@nextd.demon.co.uk). + * + * (C) SGI 2006, Christoph Lameter <clameter@sgi.com> + * Cleaned up and restructured to ease the addition of alternative + * implementations of SLAB allocators. */ #ifndef _LINUX_SLAB_H #define _LINUX_SLAB_H -#if defined(__KERNEL__) - -typedef struct kmem_cache kmem_cache_t; +#ifdef __KERNEL__ -#include <linux/gfp.h> -#include <linux/init.h> -#include <linux/types.h> -#include <asm/page.h> /* kmalloc_sizes.h needs PAGE_SIZE */ -#include <asm/cache.h> /* kmalloc_sizes.h needs L1_CACHE_BYTES */ +#include <linux/gfp.h> +#include <linux/types.h> -/* flags for kmem_cache_alloc() */ -#define SLAB_NOFS GFP_NOFS -#define SLAB_NOIO GFP_NOIO -#define SLAB_ATOMIC GFP_ATOMIC -#define SLAB_USER GFP_USER -#define SLAB_KERNEL GFP_KERNEL -#define SLAB_DMA GFP_DMA +typedef struct kmem_cache kmem_cache_t __deprecated; -#define SLAB_LEVEL_MASK GFP_LEVEL_MASK +/* + * Flags to pass to kmem_cache_create(). + * The ones marked DEBUG are only valid if CONFIG_SLAB_DEBUG is set. + */ +#define SLAB_DEBUG_FREE 0x00000100UL /* DEBUG: Perform (expensive) checks on free */ +#define SLAB_DEBUG_INITIAL 0x00000200UL /* DEBUG: Call constructor (as verifier) */ +#define SLAB_RED_ZONE 0x00000400UL /* DEBUG: Red zone objs in a cache */ +#define SLAB_POISON 0x00000800UL /* DEBUG: Poison objects */ +#define SLAB_HWCACHE_ALIGN 0x00002000UL /* Align objs on cache lines */ +#define SLAB_CACHE_DMA 0x00004000UL /* Use GFP_DMA memory */ +#define SLAB_MUST_HWCACHE_ALIGN 0x00008000UL /* Force alignment even if debuggin is active */ +#define SLAB_STORE_USER 0x00010000UL /* DEBUG: Store the last owner for bug hunting */ +#define SLAB_RECLAIM_ACCOUNT 0x00020000UL /* Objects are reclaimable */ +#define SLAB_PANIC 0x00040000UL /* Panic if kmem_cache_create() fails */ +#define SLAB_DESTROY_BY_RCU 0x00080000UL /* Defer freeing slabs to RCU */ +#define SLAB_MEM_SPREAD 0x00100000UL /* Spread some memory over cpuset */ -#define SLAB_NO_GROW __GFP_NO_GROW /* don't grow a cache */ +/* Flags passed to a constructor functions */ +#define SLAB_CTOR_CONSTRUCTOR 0x001UL /* If not set, then deconstructor */ +#define SLAB_CTOR_ATOMIC 0x002UL /* Tell constructor it can't sleep */ +#define SLAB_CTOR_VERIFY 0x004UL /* Tell constructor it's a verify call */ -/* flags to pass to kmem_cache_create(). - * The first 3 are only valid when the allocator as been build - * SLAB_DEBUG_SUPPORT. +/* + * struct kmem_cache related prototypes */ -#define SLAB_DEBUG_FREE 0x00000100UL /* Peform (expensive) checks on free */ -#define SLAB_DEBUG_INITIAL 0x00000200UL /* Call constructor (as verifier) */ -#define SLAB_RED_ZONE 0x00000400UL /* Red zone objs in a cache */ -#define SLAB_POISON 0x00000800UL /* Poison objects */ -#define SLAB_HWCACHE_ALIGN 0x00002000UL /* align objs on a h/w cache lines */ -#define SLAB_CACHE_DMA 0x00004000UL /* use GFP_DMA memory */ -#define SLAB_MUST_HWCACHE_ALIGN 0x00008000UL /* force alignment */ -#define SLAB_STORE_USER 0x00010000UL /* store the last owner for bug hunting */ -#define SLAB_RECLAIM_ACCOUNT 0x00020000UL /* track pages allocated to indicate - what is reclaimable later*/ -#define SLAB_PANIC 0x00040000UL /* panic if kmem_cache_create() fails */ -#define SLAB_DESTROY_BY_RCU 0x00080000UL /* defer freeing pages to RCU */ -#define SLAB_MEM_SPREAD 0x00100000UL /* Spread some memory over cpuset */ +void __init kmem_cache_init(void); +extern int slab_is_available(void); -/* flags passed to a constructor func */ -#define SLAB_CTOR_CONSTRUCTOR 0x001UL /* if not set, then deconstructor */ -#define SLAB_CTOR_ATOMIC 0x002UL /* tell constructor it can't sleep */ -#define SLAB_CTOR_VERIFY 0x004UL /* tell constructor it's a verify call */ +struct kmem_cache *kmem_cache_create(const char *, size_t, size_t, + unsigned long, + void (*)(void *, struct kmem_cache *, unsigned long), + void (*)(void *, struct kmem_cache *, unsigned long)); +void kmem_cache_destroy(struct kmem_cache *); +int kmem_cache_shrink(struct kmem_cache *); +void *kmem_cache_alloc(struct kmem_cache *, gfp_t); +void *kmem_cache_zalloc(struct kmem_cache *, gfp_t); +void kmem_cache_free(struct kmem_cache *, void *); +unsigned int kmem_cache_size(struct kmem_cache *); +const char *kmem_cache_name(struct kmem_cache *); +int kmem_ptr_validate(struct kmem_cache *cachep, const void *ptr); -#ifndef CONFIG_SLOB +#ifdef CONFIG_NUMA +extern void *kmem_cache_alloc_node(struct kmem_cache *, gfp_t flags, int node); +#else +static inline void *kmem_cache_alloc_node(struct kmem_cache *cachep, + gfp_t flags, int node) +{ + return kmem_cache_alloc(cachep, flags); +} +#endif -/* prototypes */ -extern void __init kmem_cache_init(void); +/* + * Common kmalloc functions provided by all allocators + */ +void *__kmalloc(size_t, gfp_t); +void *__kzalloc(size_t, gfp_t); +void kfree(const void *); +unsigned int ksize(const void *); -extern kmem_cache_t *kmem_cache_create(const char *, size_t, size_t, unsigned long, - void (*)(void *, kmem_cache_t *, unsigned long), - void (*)(void *, kmem_cache_t *, unsigned long)); -extern void kmem_cache_destroy(kmem_cache_t *); -extern int kmem_cache_shrink(kmem_cache_t *); -extern void *kmem_cache_alloc(kmem_cache_t *, gfp_t); -extern void *kmem_cache_zalloc(struct kmem_cache *, gfp_t); -extern void kmem_cache_free(kmem_cache_t *, void *); -extern unsigned int kmem_cache_size(kmem_cache_t *); -extern const char *kmem_cache_name(kmem_cache_t *); +/** + * kcalloc - allocate memory for an array. The memory is set to zero. + * @n: number of elements. + * @size: element size. + * @flags: the type of memory to allocate. + */ +static inline void *kcalloc(size_t n, size_t size, gfp_t flags) +{ + if (n != 0 && size > ULONG_MAX / n) + return NULL; + return __kzalloc(n * size, flags); +} -/* Size description struct for general caches. */ -struct cache_sizes { - size_t cs_size; - kmem_cache_t *cs_cachep; - kmem_cache_t *cs_dmacachep; -}; -extern struct cache_sizes malloc_sizes[]; +/* + * Allocator specific definitions. These are mainly used to establish optimized + * ways to convert kmalloc() calls to kmem_cache_alloc() invocations by selecting + * the appropriate general cache at compile time. + */ -extern void *__kmalloc(size_t, gfp_t); +#ifdef CONFIG_SLAB +#include <linux/slab_def.h> +#else +/* + * Fallback definitions for an allocator not wanting to provide + * its own optimized kmalloc definitions (like SLOB). + */ /** * kmalloc - allocate memory @@ -125,46 +149,9 @@ extern void *__kmalloc(size_t, gfp_t); */ static inline void *kmalloc(size_t size, gfp_t flags) { - if (__builtin_constant_p(size)) { - int i = 0; -#define CACHE(x) \ - if (size <= x) \ - goto found; \ - else \ - i++; -#include "kmalloc_sizes.h" -#undef CACHE - { - extern void __you_cannot_kmalloc_that_much(void); - __you_cannot_kmalloc_that_much(); - } -found: - return kmem_cache_alloc((flags & GFP_DMA) ? - malloc_sizes[i].cs_dmacachep : - malloc_sizes[i].cs_cachep, flags); - } return __kmalloc(size, flags); } -/* - * kmalloc_track_caller is a special version of kmalloc that records the - * calling function of the routine calling it for slab leak tracking instead - * of just the calling function (confusing, eh?). - * It's useful when the call to kmalloc comes from a widely-used standard - * allocator where we care about the real place the memory allocation - * request comes from. - */ -#ifndef CONFIG_DEBUG_SLAB -#define kmalloc_track_caller(size, flags) \ - __kmalloc(size, flags) -#else -extern void *__kmalloc_track_caller(size_t, gfp_t, void*); -#define kmalloc_track_caller(size, flags) \ - __kmalloc_track_caller(size, flags, __builtin_return_address(0)) -#endif - -extern void *__kzalloc(size_t, gfp_t); - /** * kzalloc - allocate memory. The memory is set to zero. * @size: how many bytes of memory are required. @@ -172,128 +159,65 @@ extern void *__kzalloc(size_t, gfp_t); */ static inline void *kzalloc(size_t size, gfp_t flags) { - if (__builtin_constant_p(size)) { - int i = 0; -#define CACHE(x) \ - if (size <= x) \ - goto found; \ - else \ - i++; -#include "kmalloc_sizes.h" -#undef CACHE - { - extern void __you_cannot_kzalloc_that_much(void); - __you_cannot_kzalloc_that_much(); - } -found: - return kmem_cache_zalloc((flags & GFP_DMA) ? - malloc_sizes[i].cs_dmacachep : - malloc_sizes[i].cs_cachep, flags); - } return __kzalloc(size, flags); } +#endif -/** - * kcalloc - allocate memory for an array. The memory is set to zero. - * @n: number of elements. - * @size: element size. - * @flags: the type of memory to allocate. - */ -static inline void *kcalloc(size_t n, size_t size, gfp_t flags) -{ - if (n != 0 && size > ULONG_MAX / n) - return NULL; - return kzalloc(n * size, flags); -} - -extern void kfree(const void *); -extern unsigned int ksize(const void *); -extern int slab_is_available(void); - -#ifdef CONFIG_NUMA -extern void *kmem_cache_alloc_node(kmem_cache_t *, gfp_t flags, int node); -extern void *__kmalloc_node(size_t size, gfp_t flags, int node); - -static inline void *kmalloc_node(size_t size, gfp_t flags, int node) -{ - if (__builtin_constant_p(size)) { - int i = 0; -#define CACHE(x) \ - if (size <= x) \ - goto found; \ - else \ - i++; -#include "kmalloc_sizes.h" -#undef CACHE - { - extern void __you_cannot_kmalloc_that_much(void); - __you_cannot_kmalloc_that_much(); - } -found: - return kmem_cache_alloc_node((flags & GFP_DMA) ? - malloc_sizes[i].cs_dmacachep : - malloc_sizes[i].cs_cachep, flags, node); - } - return __kmalloc_node(size, flags, node); -} -#else -static inline void *kmem_cache_alloc_node(kmem_cache_t *cachep, gfp_t flags, int node) -{ - return kmem_cache_alloc(cachep, flags); -} +#ifndef CONFIG_NUMA static inline void *kmalloc_node(size_t size, gfp_t flags, int node) { return kmalloc(size, flags); } -#endif - -extern int FASTCALL(kmem_cache_reap(int)); -extern int FASTCALL(kmem_ptr_validate(kmem_cache_t *cachep, void *ptr)); - -#else /* CONFIG_SLOB */ - -/* SLOB allocator routines */ - -void kmem_cache_init(void); -struct kmem_cache *kmem_cache_create(const char *c, size_t, size_t, - unsigned long, - void (*)(void *, struct kmem_cache *, unsigned long), - void (*)(void *, struct kmem_cache *, unsigned long)); -void kmem_cache_destroy(struct kmem_cache *c); -void *kmem_cache_alloc(struct kmem_cache *c, gfp_t flags); -void *kmem_cache_zalloc(struct kmem_cache *, gfp_t); -void kmem_cache_free(struct kmem_cache *c, void *b); -const char *kmem_cache_name(struct kmem_cache *); -void *kmalloc(size_t size, gfp_t flags); -void *__kzalloc(size_t size, gfp_t flags); -void kfree(const void *m); -unsigned int ksize(const void *m); -unsigned int kmem_cache_size(struct kmem_cache *c); -static inline void *kcalloc(size_t n, size_t size, gfp_t flags) +static inline void *__kmalloc_node(size_t size, gfp_t flags, int node) { - return __kzalloc(n * size, flags); + return __kmalloc(size, flags); } +#endif /* !CONFIG_NUMA */ -#define kmem_cache_shrink(d) (0) -#define kmem_cache_reap(a) -#define kmem_ptr_validate(a, b) (0) -#define kmem_cache_alloc_node(c, f, n) kmem_cache_alloc(c, f) -#define kmalloc_node(s, f, n) kmalloc(s, f) -#define kzalloc(s, f) __kzalloc(s, f) -#define kmalloc_track_caller kmalloc +/* + * kmalloc_track_caller is a special version of kmalloc that records the + * calling function of the routine calling it for slab leak tracking instead + * of just the calling function (confusing, eh?). + * It's useful when the call to kmalloc comes from a widely-used standard + * allocator where we care about the real place the memory allocation + * request comes from. + */ +#ifdef CONFIG_DEBUG_SLAB +extern void *__kmalloc_track_caller(size_t, gfp_t, void*); +#define kmalloc_track_caller(size, flags) \ + __kmalloc_track_caller(size, flags, __builtin_return_address(0)) +#else +#define kmalloc_track_caller(size, flags) \ + __kmalloc(size, flags) +#endif /* DEBUG_SLAB */ -#endif /* CONFIG_SLOB */ +#ifdef CONFIG_NUMA +/* + * kmalloc_node_track_caller is a special version of kmalloc_node that + * records the calling function of the routine calling it for slab leak + * tracking instead of just the calling function (confusing, eh?). + * It's useful when the call to kmalloc_node comes from a widely-used + * standard allocator where we care about the real place the memory + * allocation request comes from. + */ +#ifdef CONFIG_DEBUG_SLAB +extern void *__kmalloc_node_track_caller(size_t, gfp_t, int, void *); +#define kmalloc_node_track_caller(size, flags, node) \ + __kmalloc_node_track_caller(size, flags, node, \ + __builtin_return_address(0)) +#else +#define kmalloc_node_track_caller(size, flags, node) \ + __kmalloc_node(size, flags, node) +#endif -/* System wide caches */ -extern kmem_cache_t *vm_area_cachep; -extern kmem_cache_t *names_cachep; -extern kmem_cache_t *files_cachep; -extern kmem_cache_t *filp_cachep; -extern kmem_cache_t *fs_cachep; -extern kmem_cache_t *sighand_cachep; -extern kmem_cache_t *bio_cachep; +#else /* CONFIG_NUMA */ -#endif /* __KERNEL__ */ +#define kmalloc_node_track_caller(size, flags, node) \ + kmalloc_track_caller(size, flags) +#endif /* DEBUG_SLAB */ + +#endif /* __KERNEL__ */ #endif /* _LINUX_SLAB_H */ + diff --git a/include/linux/slab_def.h b/include/linux/slab_def.h new file mode 100644 index 00000000000..4b463e66dde --- /dev/null +++ b/include/linux/slab_def.h @@ -0,0 +1,100 @@ +#ifndef _LINUX_SLAB_DEF_H +#define _LINUX_SLAB_DEF_H + +/* + * Definitions unique to the original Linux SLAB allocator. + * + * What we provide here is a way to optimize the frequent kmalloc + * calls in the kernel by selecting the appropriate general cache + * if kmalloc was called with a size that can be established at + * compile time. + */ + +#include <linux/init.h> +#include <asm/page.h> /* kmalloc_sizes.h needs PAGE_SIZE */ +#include <asm/cache.h> /* kmalloc_sizes.h needs L1_CACHE_BYTES */ +#include <linux/compiler.h> + +/* Size description struct for general caches. */ +struct cache_sizes { + size_t cs_size; + struct kmem_cache *cs_cachep; + struct kmem_cache *cs_dmacachep; +}; +extern struct cache_sizes malloc_sizes[]; + +static inline void *kmalloc(size_t size, gfp_t flags) +{ + if (__builtin_constant_p(size)) { + int i = 0; +#define CACHE(x) \ + if (size <= x) \ + goto found; \ + else \ + i++; +#include "kmalloc_sizes.h" +#undef CACHE + { + extern void __you_cannot_kmalloc_that_much(void); + __you_cannot_kmalloc_that_much(); + } +found: + return kmem_cache_alloc((flags & GFP_DMA) ? + malloc_sizes[i].cs_dmacachep : + malloc_sizes[i].cs_cachep, flags); + } + return __kmalloc(size, flags); +} + +static inline void *kzalloc(size_t size, gfp_t flags) +{ + if (__builtin_constant_p(size)) { + int i = 0; +#define CACHE(x) \ + if (size <= x) \ + goto found; \ + else \ + i++; +#include "kmalloc_sizes.h" +#undef CACHE + { + extern void __you_cannot_kzalloc_that_much(void); + __you_cannot_kzalloc_that_much(); + } +found: + return kmem_cache_zalloc((flags & GFP_DMA) ? + malloc_sizes[i].cs_dmacachep : + malloc_sizes[i].cs_cachep, flags); + } + return __kzalloc(size, flags); +} + +#ifdef CONFIG_NUMA +extern void *__kmalloc_node(size_t size, gfp_t flags, int node); + +static inline void *kmalloc_node(size_t size, gfp_t flags, int node) +{ + if (__builtin_constant_p(size)) { + int i = 0; +#define CACHE(x) \ + if (size <= x) \ + goto found; \ + else \ + i++; +#include "kmalloc_sizes.h" +#undef CACHE + { + extern void __you_cannot_kmalloc_that_much(void); + __you_cannot_kmalloc_that_much(); + } +found: + return kmem_cache_alloc_node((flags & GFP_DMA) ? + malloc_sizes[i].cs_dmacachep : + malloc_sizes[i].cs_cachep, flags, node); + } + return __kmalloc_node(size, flags, node); +} + +#endif /* CONFIG_NUMA */ + +#endif /* _LINUX_SLAB_DEF_H */ diff --git a/include/linux/smb_fs_sb.h b/include/linux/smb_fs_sb.h index 5b4ae2cc445..3aa97aa4277 100644 --- a/include/linux/smb_fs_sb.h +++ b/include/linux/smb_fs_sb.h @@ -55,7 +55,7 @@ struct smb_sb_info { * generation is incremented. */ unsigned int generation; - pid_t conn_pid; + struct pid *conn_pid; struct smb_conn_opt opt; wait_queue_head_t conn_wq; int conn_complete; diff --git a/include/linux/smp.h b/include/linux/smp.h index 51649987f69..7ba23ec8211 100644 --- a/include/linux/smp.h +++ b/include/linux/smp.h @@ -99,6 +99,13 @@ static inline int up_smp_call_function(void) static inline void smp_send_reschedule(int cpu) { } #define num_booting_cpus() 1 #define smp_prepare_boot_cpu() do {} while (0) +static inline int smp_call_function_single(int cpuid, void (*func) (void *info), + void *info, int retry, int wait) +{ + /* Disable interrupts here? */ + func(info); + return 0; +} #endif /* !SMP */ diff --git a/include/linux/socket.h b/include/linux/socket.h index 36140909464..92cd38efad7 100644 --- a/include/linux/socket.h +++ b/include/linux/socket.h @@ -264,6 +264,7 @@ struct ucred { #define SOL_IPV6 41 #define SOL_ICMPV6 58 #define SOL_SCTP 132 +#define SOL_UDPLITE 136 /* UDP-Lite (RFC 3828) */ #define SOL_RAW 255 #define SOL_IPX 256 #define SOL_AX25 257 @@ -292,7 +293,7 @@ extern int memcpy_fromiovecend(unsigned char *kdata, struct iovec *iov, extern int csum_partial_copy_fromiovecend(unsigned char *kdata, struct iovec *iov, int offset, - unsigned int len, int *csump); + unsigned int len, __wsum *csump); extern int verify_iovec(struct msghdr *m, struct iovec *iov, char *address, int mode); extern int memcpy_toiovec(struct iovec *v, unsigned char *kdata, int len); diff --git a/include/linux/sockios.h b/include/linux/sockios.h index e6b9d1d36ea..abef7596655 100644 --- a/include/linux/sockios.h +++ b/include/linux/sockios.h @@ -72,8 +72,8 @@ #define SIOCGIFTXQLEN 0x8942 /* Get the tx queue length */ #define SIOCSIFTXQLEN 0x8943 /* Set the tx queue length */ -#define SIOCGIFDIVERT 0x8944 /* Frame diversion support */ -#define SIOCSIFDIVERT 0x8945 /* Set frame diversion options */ +/* SIOCGIFDIVERT was: 0x8944 Frame diversion support */ +/* SIOCSIFDIVERT was: 0x8945 Set frame diversion options */ #define SIOCETHTOOL 0x8946 /* Ethtool interface */ diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h index c8bb68099eb..176f6e36dbf 100644 --- a/include/linux/spi/spi.h +++ b/include/linux/spi/spi.h @@ -289,7 +289,7 @@ extern struct spi_master *spi_busnum_to_master(u16 busnum); * the data being transferred; that may reduce overhead, when the * underlying driver uses dma. * - * If the transmit buffer is null, undefined data will be shifted out + * If the transmit buffer is null, zeroes will be shifted out * while filling rx_buf. If the receive buffer is null, the data * shifted in will be discarded. Only "len" bytes shift out (or in). * It's an error to try to shift out a partial word. (For example, by diff --git a/include/linux/spinlock.h b/include/linux/spinlock.h index 8451052ca66..94b767d6427 100644 --- a/include/linux/spinlock.h +++ b/include/linux/spinlock.h @@ -52,6 +52,7 @@ #include <linux/thread_info.h> #include <linux/kernel.h> #include <linux/stringify.h> +#include <linux/bottom_half.h> #include <asm/system.h> diff --git a/include/linux/stallion.h b/include/linux/stallion.h index 13a37f137ea..4a0a329beaf 100644 --- a/include/linux/stallion.h +++ b/include/linux/stallion.h @@ -52,11 +52,11 @@ * protection - since "write" code only needs to change the head, and * interrupt code only needs to change the tail. */ -typedef struct { +struct stlrq { char *buf; char *head; char *tail; -} stlrq_t; +}; /* * Port, panel and board structures to hold status info about each. @@ -67,14 +67,14 @@ typedef struct { * is associated with, this makes it (fairly) easy to get back to the * board/panel info for a port. */ -typedef struct stlport { +struct stlport { unsigned long magic; - int portnr; - int panelnr; - int brdnr; + unsigned int portnr; + unsigned int panelnr; + unsigned int brdnr; int ioaddr; int uartaddr; - int pagenr; + unsigned int pagenr; long istate; int flags; int baud_base; @@ -97,31 +97,31 @@ typedef struct stlport { wait_queue_head_t close_wait; struct work_struct tqueue; comstats_t stats; - stlrq_t tx; -} stlport_t; + struct stlrq tx; +}; -typedef struct stlpanel { +struct stlpanel { unsigned long magic; - int panelnr; - int brdnr; - int pagenr; - int nrports; + unsigned int panelnr; + unsigned int brdnr; + unsigned int pagenr; + unsigned int nrports; int iobase; void *uartp; void (*isr)(struct stlpanel *panelp, unsigned int iobase); unsigned int hwid; unsigned int ackmask; - stlport_t *ports[STL_PORTSPERPANEL]; -} stlpanel_t; + struct stlport *ports[STL_PORTSPERPANEL]; +}; -typedef struct stlbrd { +struct stlbrd { unsigned long magic; - int brdnr; - int brdtype; - int state; - int nrpanels; - int nrports; - int nrbnks; + unsigned int brdnr; + unsigned int brdtype; + unsigned int state; + unsigned int nrpanels; + unsigned int nrports; + unsigned int nrbnks; int irq; int irqtype; int (*isr)(struct stlbrd *brdp); @@ -136,9 +136,9 @@ typedef struct stlbrd { unsigned long clk; unsigned int bnkpageaddr[STL_MAXBANKS]; unsigned int bnkstataddr[STL_MAXBANKS]; - stlpanel_t *bnk2panel[STL_MAXBANKS]; - stlpanel_t *panels[STL_MAXPANELS]; -} stlbrd_t; + struct stlpanel *bnk2panel[STL_MAXBANKS]; + struct stlpanel *panels[STL_MAXPANELS]; +}; /* diff --git a/include/linux/start_kernel.h b/include/linux/start_kernel.h new file mode 100644 index 00000000000..d3e5f275654 --- /dev/null +++ b/include/linux/start_kernel.h @@ -0,0 +1,12 @@ +#ifndef _LINUX_START_KERNEL_H +#define _LINUX_START_KERNEL_H + +#include <linux/linkage.h> +#include <linux/init.h> + +/* Define the prototype for start_kernel here, rather than cluttering + up something else. */ + +extern asmlinkage void __init start_kernel(void); + +#endif /* _LINUX_START_KERNEL_H */ diff --git a/include/linux/sunrpc/auth_gss.h b/include/linux/sunrpc/auth_gss.h index 97b62e97dd8..2db2fbf3494 100644 --- a/include/linux/sunrpc/auth_gss.h +++ b/include/linux/sunrpc/auth_gss.h @@ -90,8 +90,6 @@ struct gss_cred { #define gc_flags gc_base.cr_flags #define gc_expire gc_base.cr_expire -void print_hexl(u32 *p, u_int length, u_int offset); - #endif /* __KERNEL__ */ #endif /* _LINUX_SUNRPC_AUTH_GSS_H */ diff --git a/include/linux/sunrpc/clnt.h b/include/linux/sunrpc/clnt.h index f6d1d646ce0..a1be89deb3a 100644 --- a/include/linux/sunrpc/clnt.h +++ b/include/linux/sunrpc/clnt.h @@ -53,6 +53,7 @@ struct rpc_clnt { struct dentry * cl_dentry; /* inode */ struct rpc_clnt * cl_parent; /* Points to parent of clones */ struct rpc_rtt cl_rtt_default; + struct rpc_program * cl_program; char cl_inline_name[32]; }; diff --git a/include/linux/sunrpc/debug.h b/include/linux/sunrpc/debug.h index e4729aa6765..60fce3c9285 100644 --- a/include/linux/sunrpc/debug.h +++ b/include/linux/sunrpc/debug.h @@ -62,12 +62,6 @@ extern unsigned int nlm_debug; # define RPC_IFDEBUG(x) #endif -#ifdef RPC_PROFILE -# define pprintk(args...) printk(## args) -#else -# define pprintk(args...) do ; while (0) -#endif - /* * Sysctl interface for RPC debugging */ diff --git a/include/linux/sunrpc/gss_krb5.h b/include/linux/sunrpc/gss_krb5.h index e30ba201910..5a4b1e0206e 100644 --- a/include/linux/sunrpc/gss_krb5.h +++ b/include/linux/sunrpc/gss_krb5.h @@ -42,10 +42,6 @@ struct krb5_ctx { int initiate; /* 1 = initiating, 0 = accepting */ - int seed_init; - unsigned char seed[16]; - int signalg; - int sealalg; struct crypto_blkcipher *enc; struct crypto_blkcipher *seq; s32 endtime; @@ -117,7 +113,7 @@ enum seal_alg { #define ENCTYPE_UNKNOWN 0x01ff s32 -make_checksum(s32 cksumtype, char *header, int hdrlen, struct xdr_buf *body, +make_checksum(char *, char *header, int hdrlen, struct xdr_buf *body, int body_offset, struct xdr_netobj *cksum); u32 gss_get_mic_kerberos(struct gss_ctx *, struct xdr_buf *, diff --git a/include/linux/sunrpc/gss_spkm3.h b/include/linux/sunrpc/gss_spkm3.h index 2cf3fbb40b4..e3e6a3437f8 100644 --- a/include/linux/sunrpc/gss_spkm3.h +++ b/include/linux/sunrpc/gss_spkm3.h @@ -12,27 +12,19 @@ #include <linux/sunrpc/gss_asn1.h> struct spkm3_ctx { - struct xdr_netobj ctx_id; /* per message context id */ - int qop; /* negotiated qop */ + struct xdr_netobj ctx_id; /* per message context id */ + int endtime; /* endtime of the context */ struct xdr_netobj mech_used; unsigned int ret_flags ; - unsigned int req_flags ; - struct xdr_netobj share_key; - int conf_alg; - struct crypto_blkcipher *derived_conf_key; - int intg_alg; - struct crypto_blkcipher *derived_integ_key; - int keyestb_alg; /* alg used to get share_key */ - int owf_alg; /* one way function */ + struct xdr_netobj conf_alg; + struct xdr_netobj derived_conf_key; + struct xdr_netobj intg_alg; + struct xdr_netobj derived_integ_key; }; -/* from openssl/objects.h */ -/* XXX need SEAL_ALG_NONE */ -#define NID_md5 4 -#define NID_dhKeyAgreement 28 -#define NID_des_cbc 31 -#define NID_sha1 64 -#define NID_cast5_cbc 108 +/* OIDs declarations for K-ALG, I-ALG, C-ALG, and OWF-ALG */ +extern const struct xdr_netobj hmac_md5_oid; +extern const struct xdr_netobj cast5_cbc_oid; /* SPKM InnerContext Token types */ @@ -46,11 +38,13 @@ u32 spkm3_make_token(struct spkm3_ctx *ctx, struct xdr_buf * text, struct xdr_ne u32 spkm3_read_token(struct spkm3_ctx *ctx, struct xdr_netobj *read_token, struct xdr_buf *message_buffer, int toktype); #define CKSUMTYPE_RSA_MD5 0x0007 +#define CKSUMTYPE_HMAC_MD5 0x0008 -s32 make_checksum(s32 cksumtype, char *header, int hdrlen, struct xdr_buf *body, - int body_offset, struct xdr_netobj *cksum); +s32 make_spkm3_checksum(s32 cksumtype, struct xdr_netobj *key, char *header, + unsigned int hdrlen, struct xdr_buf *body, + unsigned int body_offset, struct xdr_netobj *cksum); void asn1_bitstring_len(struct xdr_netobj *in, int *enclen, int *zerobits); -int decode_asn1_bitstring(struct xdr_netobj *out, char *in, int enclen, +int decode_asn1_bitstring(struct xdr_netobj *out, char *in, int enclen, int explen); void spkm3_mic_header(unsigned char **hdrbuf, unsigned int *hdrlen, unsigned char *ctxhdr, int elen, int zbit); diff --git a/include/linux/sunrpc/rpc_pipe_fs.h b/include/linux/sunrpc/rpc_pipe_fs.h index a2eb9b4a9de..4a68125b6de 100644 --- a/include/linux/sunrpc/rpc_pipe_fs.h +++ b/include/linux/sunrpc/rpc_pipe_fs.h @@ -30,7 +30,7 @@ struct rpc_inode { #define RPC_PIPE_WAIT_FOR_OPEN 1 int flags; struct rpc_pipe_ops *ops; - struct work_struct queue_timeout; + struct delayed_work queue_timeout; }; static inline struct rpc_inode * diff --git a/include/linux/sunrpc/sched.h b/include/linux/sunrpc/sched.h index f399c138f79..97c76165258 100644 --- a/include/linux/sunrpc/sched.h +++ b/include/linux/sunrpc/sched.h @@ -11,6 +11,7 @@ #include <linux/timer.h> #include <linux/sunrpc/types.h> +#include <linux/rcupdate.h> #include <linux/spinlock.h> #include <linux/wait.h> #include <linux/workqueue.h> @@ -85,6 +86,7 @@ struct rpc_task { union { struct work_struct tk_work; /* Async task work queue */ struct rpc_wait tk_wait; /* RPC wait */ + struct rcu_head tk_rcu; /* for task deletion */ } u; unsigned short tk_timeouts; /* maj timeouts */ @@ -178,13 +180,6 @@ struct rpc_call_ops { } while (0) #define RPC_IS_ACTIVATED(t) (test_bit(RPC_TASK_ACTIVE, &(t)->tk_runstate)) -#define rpc_set_active(t) (set_bit(RPC_TASK_ACTIVE, &(t)->tk_runstate)) -#define rpc_clear_active(t) \ - do { \ - smp_mb__before_clear_bit(); \ - clear_bit(RPC_TASK_ACTIVE, &(t)->tk_runstate); \ - smp_mb__after_clear_bit(); \ - } while(0) /* * Task priorities. @@ -222,7 +217,7 @@ struct rpc_wait_queue { #ifndef RPC_DEBUG # define RPC_WAITQ_INIT(var,qname) { \ - .lock = SPIN_LOCK_UNLOCKED, \ + .lock = __SPIN_LOCK_UNLOCKED(var.lock), \ .tasks = { \ [0] = LIST_HEAD_INIT(var.tasks[0]), \ [1] = LIST_HEAD_INIT(var.tasks[1]), \ @@ -231,7 +226,7 @@ struct rpc_wait_queue { } #else # define RPC_WAITQ_INIT(var,qname) { \ - .lock = SPIN_LOCK_UNLOCKED, \ + .lock = __SPIN_LOCK_UNLOCKED(var.lock), \ .tasks = { \ [0] = LIST_HEAD_INIT(var.tasks[0]), \ [1] = LIST_HEAD_INIT(var.tasks[1]), \ @@ -254,8 +249,10 @@ struct rpc_task *rpc_run_task(struct rpc_clnt *clnt, int flags, void rpc_init_task(struct rpc_task *task, struct rpc_clnt *clnt, int flags, const struct rpc_call_ops *ops, void *data); +void rpc_put_task(struct rpc_task *); void rpc_release_task(struct rpc_task *); void rpc_exit_task(struct rpc_task *); +void rpc_release_calldata(const struct rpc_call_ops *, void *); void rpc_killall_tasks(struct rpc_clnt *); int rpc_execute(struct rpc_task *); void rpc_init_priority_wait_queue(struct rpc_wait_queue *, const char *); diff --git a/include/linux/sunrpc/xdr.h b/include/linux/sunrpc/xdr.h index ac69e551160..9e340fa23c0 100644 --- a/include/linux/sunrpc/xdr.h +++ b/include/linux/sunrpc/xdr.h @@ -11,6 +11,7 @@ #include <linux/uio.h> #include <asm/byteorder.h> +#include <linux/scatterlist.h> /* * Buffer adjustment @@ -139,29 +140,30 @@ xdr_adjust_iovec(struct kvec *iov, __be32 *p) */ extern void xdr_shift_buf(struct xdr_buf *, size_t); extern void xdr_buf_from_iov(struct kvec *, struct xdr_buf *); -extern int xdr_buf_subsegment(struct xdr_buf *, struct xdr_buf *, int, int); -extern int xdr_buf_read_netobj(struct xdr_buf *, struct xdr_netobj *, int); -extern int read_bytes_from_xdr_buf(struct xdr_buf *, int, void *, int); -extern int write_bytes_to_xdr_buf(struct xdr_buf *, int, void *, int); +extern int xdr_buf_subsegment(struct xdr_buf *, struct xdr_buf *, unsigned int, unsigned int); +extern int xdr_buf_read_netobj(struct xdr_buf *, struct xdr_netobj *, unsigned int); +extern int read_bytes_from_xdr_buf(struct xdr_buf *, unsigned int, void *, unsigned int); +extern int write_bytes_to_xdr_buf(struct xdr_buf *, unsigned int, void *, unsigned int); /* * Helper structure for copying from an sk_buff. */ -typedef struct { +struct xdr_skb_reader { struct sk_buff *skb; unsigned int offset; size_t count; - unsigned int csum; -} skb_reader_t; + __wsum csum; +}; -typedef size_t (*skb_read_actor_t)(skb_reader_t *desc, void *to, size_t len); +typedef size_t (*xdr_skb_read_actor)(struct xdr_skb_reader *desc, void *to, size_t len); +size_t xdr_skb_read_bits(struct xdr_skb_reader *desc, void *to, size_t len); extern int csum_partial_copy_to_xdr(struct xdr_buf *, struct sk_buff *); extern ssize_t xdr_partial_copy_from_skb(struct xdr_buf *, unsigned int, - skb_reader_t *, skb_read_actor_t); + struct xdr_skb_reader *, xdr_skb_read_actor); -extern int xdr_encode_word(struct xdr_buf *, int, u32); -extern int xdr_decode_word(struct xdr_buf *, int, u32 *); +extern int xdr_encode_word(struct xdr_buf *, unsigned int, u32); +extern int xdr_decode_word(struct xdr_buf *, unsigned int, u32 *); struct xdr_array2_desc; typedef int (*xdr_xcode_elem_t)(struct xdr_array2_desc *desc, void *elem); @@ -196,6 +198,7 @@ extern void xdr_init_decode(struct xdr_stream *xdr, struct xdr_buf *buf, __be32 extern __be32 *xdr_inline_decode(struct xdr_stream *xdr, size_t nbytes); extern void xdr_read_pages(struct xdr_stream *xdr, unsigned int len); extern void xdr_enter_page(struct xdr_stream *xdr, unsigned int len); +extern int xdr_process_buf(struct xdr_buf *buf, unsigned int offset, unsigned int len, int (*actor)(struct scatterlist *, void *), void *data); #endif /* __KERNEL__ */ diff --git a/include/linux/sunrpc/xprt.h b/include/linux/sunrpc/xprt.h index 60394fbc4c7..f780e72fc41 100644 --- a/include/linux/sunrpc/xprt.h +++ b/include/linux/sunrpc/xprt.h @@ -106,7 +106,6 @@ struct rpc_rqst { struct rpc_xprt_ops { void (*set_buffer_size)(struct rpc_xprt *xprt, size_t sndsize, size_t rcvsize); - char * (*print_addr)(struct rpc_xprt *xprt, enum rpc_display_format_t format); int (*reserve_xprt)(struct rpc_task *task); void (*release_xprt)(struct rpc_xprt *xprt, struct rpc_task *task); void (*rpcbind)(struct rpc_task *task); @@ -126,8 +125,6 @@ struct rpc_xprt_ops { struct rpc_xprt { struct kref kref; /* Reference count */ struct rpc_xprt_ops * ops; /* transport methods */ - struct socket * sock; /* BSD socket layer */ - struct sock * inet; /* INET layer */ struct rpc_timeout timeout; /* timeout parms */ struct sockaddr_storage addr; /* server address */ @@ -137,9 +134,6 @@ struct rpc_xprt { unsigned long cong; /* current congestion */ unsigned long cwnd; /* congestion window */ - size_t rcvsize, /* transport rcv buffer size */ - sndsize; /* transport send buffer size */ - size_t max_payload; /* largest RPC payload size, in bytes */ unsigned int tsh_size; /* size of transport specific @@ -158,27 +152,11 @@ struct rpc_xprt { resvport : 1; /* use a reserved port */ /* - * XID - */ - __u32 xid; /* Next XID value to use */ - - /* - * State of TCP reply receive stuff - */ - __be32 tcp_recm, /* Fragment header */ - tcp_xid; /* Current XID */ - u32 tcp_reclen, /* fragment length */ - tcp_offset; /* fragment offset */ - unsigned long tcp_copied, /* copied to request */ - tcp_flags; - /* * Connection of transports */ unsigned long connect_timeout, bind_timeout, reestablish_timeout; - struct work_struct connect_worker; - unsigned short port; /* * Disconnection of idle transports @@ -193,8 +171,8 @@ struct rpc_xprt { */ spinlock_t transport_lock; /* lock transport info */ spinlock_t reserve_lock; /* lock slot table */ + u32 xid; /* Next XID value to use */ struct rpc_task * snd_task; /* Task blocked in send */ - struct list_head recv; struct { @@ -210,18 +188,9 @@ struct rpc_xprt { bklog_u; /* backlog queue utilization */ } stat; - void (*old_data_ready)(struct sock *, int); - void (*old_state_change)(struct sock *); - void (*old_write_space)(struct sock *); - char * address_strings[RPC_DISPLAY_MAX]; }; -#define XPRT_LAST_FRAG (1 << 0) -#define XPRT_COPY_RECM (1 << 1) -#define XPRT_COPY_XID (1 << 2) -#define XPRT_COPY_DATA (1 << 3) - #ifdef __KERNEL__ /* @@ -270,8 +239,8 @@ void xprt_disconnect(struct rpc_xprt *xprt); /* * Socket transport setup operations */ -int xs_setup_udp(struct rpc_xprt *xprt, struct rpc_timeout *to); -int xs_setup_tcp(struct rpc_xprt *xprt, struct rpc_timeout *to); +struct rpc_xprt * xs_setup_udp(struct sockaddr *addr, size_t addrlen, struct rpc_timeout *to); +struct rpc_xprt * xs_setup_tcp(struct sockaddr *addr, size_t addrlen, struct rpc_timeout *to); /* * Reserved bit positions in xprt->state diff --git a/include/linux/suspend.h b/include/linux/suspend.h index b1237f16ecd..bf99bd49f8e 100644 --- a/include/linux/suspend.h +++ b/include/linux/suspend.h @@ -9,10 +9,13 @@ #include <linux/init.h> #include <linux/pm.h> -/* page backup entry */ +/* struct pbe is used for creating lists of pages that should be restored + * atomically during the resume from disk, because the page frames they have + * occupied before the suspend are in use. + */ struct pbe { - unsigned long address; /* address of the copy */ - unsigned long orig_address; /* original address of page */ + void *address; /* address of the copy */ + void *orig_address; /* original address of a page */ struct pbe *next; }; diff --git a/include/linux/swap.h b/include/linux/swap.h index e7c36ba2a2d..5423559a44a 100644 --- a/include/linux/swap.h +++ b/include/linux/swap.h @@ -218,8 +218,6 @@ extern void swap_unplug_io_fn(struct backing_dev_info *, struct page *); /* linux/mm/page_io.c */ extern int swap_readpage(struct file *, struct page *); extern int swap_writepage(struct page *page, struct writeback_control *wbc); -extern int rw_swap_page_sync(int rw, swp_entry_t entry, struct page *page, - struct bio **bio_chain); extern int end_swap_bio_read(struct bio *bio, unsigned int bytes_done, int err); /* linux/mm/swap_state.c */ @@ -247,9 +245,10 @@ extern int swap_duplicate(swp_entry_t); extern int valid_swaphandles(swp_entry_t, unsigned long *); extern void swap_free(swp_entry_t); extern void free_swap_and_cache(swp_entry_t); -extern int swap_type_of(dev_t); +extern int swap_type_of(dev_t, sector_t, struct block_device **); extern unsigned int count_swap_pages(int, int); extern sector_t map_swap_page(struct swap_info_struct *, pgoff_t); +extern sector_t swapdev_block(int, pgoff_t); extern struct swap_info_struct *get_swap_info_struct(unsigned); extern int can_share_swap_page(struct page *); extern int remove_exclusive_swap_page(struct page *); @@ -259,7 +258,6 @@ extern spinlock_t swap_lock; /* linux/mm/thrash.c */ extern struct mm_struct * swap_token_mm; -extern unsigned long swap_token_default_timeout; extern void grab_swap_token(void); extern void __put_swap_token(struct mm_struct *); diff --git a/include/linux/sysctl.h b/include/linux/sysctl.h index d98562f1df7..81480e61346 100644 --- a/include/linux/sysctl.h +++ b/include/linux/sysctl.h @@ -11,7 +11,7 @@ ** the sysctl() binary interface. Do *NOT* change the ** numbering of any existing values here, and do not change ** any numbers within any one set of values. If you have to - ** have to redefine an existing interface, use a new number for it. + ** redefine an existing interface, use a new number for it. ** The kernel will then return -ENOTDIR to any application using ** the old binary interface. ** @@ -426,6 +426,8 @@ enum NET_CIPSOV4_CACHE_BUCKET_SIZE=119, NET_CIPSOV4_RBM_OPTFMT=120, NET_CIPSOV4_RBM_STRICTVALID=121, + NET_TCP_AVAIL_CONG_CONTROL=122, + NET_TCP_ALLOWED_CONG_CONTROL=123, }; enum { @@ -604,16 +606,6 @@ enum { NET_DCCP_DEFAULT=1, }; -/* /proc/sys/net/dccp/default */ -enum { - NET_DCCP_DEFAULT_SEQ_WINDOW = 1, - NET_DCCP_DEFAULT_RX_CCID = 2, - NET_DCCP_DEFAULT_TX_CCID = 3, - NET_DCCP_DEFAULT_ACK_RATIO = 4, - NET_DCCP_DEFAULT_SEND_ACKVEC = 5, - NET_DCCP_DEFAULT_SEND_NDP = 6, -}; - /* /proc/sys/net/ipx */ enum { NET_IPX_PPROP_BROADCASTING=1, @@ -926,8 +918,7 @@ typedef struct ctl_table ctl_table; typedef int ctl_handler (ctl_table *table, int __user *name, int nlen, void __user *oldval, size_t __user *oldlenp, - void __user *newval, size_t newlen, - void **context); + void __user *newval, size_t newlen); typedef int proc_handler (ctl_table *ctl, int write, struct file * filp, void __user *buffer, size_t *lenp, loff_t *ppos); @@ -958,7 +949,7 @@ extern int do_sysctl (int __user *name, int nlen, extern int do_sysctl_strategy (ctl_table *table, int __user *name, int nlen, void __user *oldval, size_t __user *oldlenp, - void __user *newval, size_t newlen, void ** context); + void __user *newval, size_t newlen); extern ctl_handler sysctl_string; extern ctl_handler sysctl_intvec; diff --git a/include/linux/sysfs.h b/include/linux/sysfs.h index 6d5c43d31de..2129d1b6c87 100644 --- a/include/linux/sysfs.h +++ b/include/linux/sysfs.h @@ -97,6 +97,9 @@ extern int __must_check sysfs_rename_dir(struct kobject *, const char *new_name); extern int __must_check +sysfs_move_dir(struct kobject *, struct kobject *); + +extern int __must_check sysfs_create_file(struct kobject *, const struct attribute *); extern int __must_check @@ -142,6 +145,11 @@ static inline int sysfs_rename_dir(struct kobject * k, const char *new_name) return 0; } +static inline int sysfs_move_dir(struct kobject * k, struct kobject * new_parent) +{ + return 0; +} + static inline int sysfs_create_file(struct kobject * k, const struct attribute * a) { return 0; diff --git a/include/linux/sysrq.h b/include/linux/sysrq.h index 9df8833670c..98a1d8cfb73 100644 --- a/include/linux/sysrq.h +++ b/include/linux/sysrq.h @@ -37,23 +37,37 @@ struct sysrq_key_op { #ifdef CONFIG_MAGIC_SYSRQ +extern int sysrq_on(void); + +/* + * Do not use this one directly: + */ +extern int __sysrq_enabled; + /* Generic SysRq interface -- you may call it from any device driver, supplying * ASCII code of the key, pointer to registers and kbd/tty structs (if they * are available -- else NULL's). */ -void handle_sysrq(int, struct tty_struct *); -void __handle_sysrq(int, struct tty_struct *, int check_mask); -int register_sysrq_key(int, struct sysrq_key_op *); -int unregister_sysrq_key(int, struct sysrq_key_op *); +void handle_sysrq(int key, struct tty_struct *tty); +void __handle_sysrq(int key, struct tty_struct *tty, int check_mask); +int register_sysrq_key(int key, struct sysrq_key_op *op); +int unregister_sysrq_key(int key, struct sysrq_key_op *op); struct sysrq_key_op *__sysrq_get_key_op(int key); #else +static inline int sysrq_on(void) +{ + return 0; +} static inline int __reterr(void) { return -EINVAL; } +static inline void handle_sysrq(int key, struct tty_struct *tty) +{ +} #define register_sysrq_key(ig,nore) __reterr() #define unregister_sysrq_key(ig,nore) __reterr() diff --git a/include/linux/task_io_accounting.h b/include/linux/task_io_accounting.h new file mode 100644 index 00000000000..44d00e9ccee --- /dev/null +++ b/include/linux/task_io_accounting.h @@ -0,0 +1,37 @@ +/* + * task_io_accounting: a structure which is used for recording a single task's + * IO statistics. + * + * Don't include this header file directly - it is designed to be dragged in via + * sched.h. + * + * Blame akpm@osdl.org for all this. + */ + +#ifdef CONFIG_TASK_IO_ACCOUNTING +struct task_io_accounting { + /* + * The number of bytes which this task has caused to be read from + * storage. + */ + u64 read_bytes; + + /* + * The number of bytes which this task has caused, or shall cause to be + * written to disk. + */ + u64 write_bytes; + + /* + * A task can cause "negative" IO too. If this task truncates some + * dirty pagecache, some IO which another task has been accounted for + * (in its write_bytes) will not be happening. We _could_ just + * subtract that from the truncating task's write_bytes, but there is + * information loss in doing that. + */ + u64 cancelled_write_bytes; +}; +#else +struct task_io_accounting { +}; +#endif diff --git a/include/linux/task_io_accounting_ops.h b/include/linux/task_io_accounting_ops.h new file mode 100644 index 00000000000..df2a319106b --- /dev/null +++ b/include/linux/task_io_accounting_ops.h @@ -0,0 +1,47 @@ +/* + * Task I/O accounting operations + */ +#ifndef __TASK_IO_ACCOUNTING_OPS_INCLUDED +#define __TASK_IO_ACCOUNTING_OPS_INCLUDED + +#ifdef CONFIG_TASK_IO_ACCOUNTING +static inline void task_io_account_read(size_t bytes) +{ + current->ioac.read_bytes += bytes; +} + +static inline void task_io_account_write(size_t bytes) +{ + current->ioac.write_bytes += bytes; +} + +static inline void task_io_account_cancelled_write(size_t bytes) +{ + current->ioac.cancelled_write_bytes += bytes; +} + +static inline void task_io_accounting_init(struct task_struct *tsk) +{ + memset(&tsk->ioac, 0, sizeof(tsk->ioac)); +} + +#else + +static inline void task_io_account_read(size_t bytes) +{ +} + +static inline void task_io_account_write(size_t bytes) +{ +} + +static inline void task_io_account_cancelled_write(size_t bytes) +{ +} + +static inline void task_io_accounting_init(struct task_struct *tsk) +{ +} + +#endif /* CONFIG_TASK_IO_ACCOUNTING */ +#endif /* __TASK_IO_ACCOUNTING_OPS_INCLUDED */ diff --git a/include/linux/taskstats.h b/include/linux/taskstats.h index 45248806ae9..3fced479825 100644 --- a/include/linux/taskstats.h +++ b/include/linux/taskstats.h @@ -31,7 +31,7 @@ */ -#define TASKSTATS_VERSION 2 +#define TASKSTATS_VERSION 3 #define TS_COMM_LEN 32 /* should be >= TASK_COMM_LEN * in linux/sched.h */ @@ -115,31 +115,37 @@ struct taskstats { __u64 ac_majflt; /* Major Page Fault Count */ /* Basic Accounting Fields end */ - /* Extended accounting fields start */ + /* Extended accounting fields start */ /* Accumulated RSS usage in duration of a task, in MBytes-usecs. * The current rss usage is added to this counter every time * a tick is charged to a task's system time. So, at the end we * will have memory usage multiplied by system time. Thus an * average usage per system time unit can be calculated. */ - __u64 coremem; /* accumulated RSS usage in MB-usec */ + __u64 coremem; /* accumulated RSS usage in MB-usec */ /* Accumulated virtual memory usage in duration of a task. * Same as acct_rss_mem1 above except that we keep track of VM usage. */ - __u64 virtmem; /* accumulated VM usage in MB-usec */ + __u64 virtmem; /* accumulated VM usage in MB-usec */ /* High watermark of RSS and virtual memory usage in duration of * a task, in KBytes. */ - __u64 hiwater_rss; /* High-watermark of RSS usage, in KB */ - __u64 hiwater_vm; /* High-water VM usage, in KB */ + __u64 hiwater_rss; /* High-watermark of RSS usage, in KB */ + __u64 hiwater_vm; /* High-water VM usage, in KB */ /* The following four fields are I/O statistics of a task. */ - __u64 read_char; /* bytes read */ - __u64 write_char; /* bytes written */ - __u64 read_syscalls; /* read syscalls */ - __u64 write_syscalls; /* write syscalls */ - /* Extended accounting fields end */ + __u64 read_char; /* bytes read */ + __u64 write_char; /* bytes written */ + __u64 read_syscalls; /* read syscalls */ + __u64 write_syscalls; /* write syscalls */ + /* Extended accounting fields end */ + +#define TASKSTATS_HAS_IO_ACCOUNTING + /* Per-task storage I/O accounting starts */ + __u64 read_bytes; /* bytes of read I/O */ + __u64 write_bytes; /* bytes of write I/O */ + __u64 cancelled_write_bytes; /* bytes of cancelled write I/O */ }; diff --git a/include/linux/taskstats_kern.h b/include/linux/taskstats_kern.h index 6562a2050a2..7e9680f4afd 100644 --- a/include/linux/taskstats_kern.h +++ b/include/linux/taskstats_kern.h @@ -12,64 +12,27 @@ #include <net/genetlink.h> #ifdef CONFIG_TASKSTATS -extern kmem_cache_t *taskstats_cache; +extern struct kmem_cache *taskstats_cache; extern struct mutex taskstats_exit_mutex; -static inline void taskstats_exit_free(struct taskstats *tidstats) -{ - if (tidstats) - kmem_cache_free(taskstats_cache, tidstats); -} - static inline void taskstats_tgid_init(struct signal_struct *sig) { sig->stats = NULL; } -static inline void taskstats_tgid_alloc(struct task_struct *tsk) -{ - struct signal_struct *sig = tsk->signal; - struct taskstats *stats; - - if (sig->stats != NULL) - return; - - /* No problem if kmem_cache_zalloc() fails */ - stats = kmem_cache_zalloc(taskstats_cache, SLAB_KERNEL); - - spin_lock_irq(&tsk->sighand->siglock); - if (!sig->stats) { - sig->stats = stats; - stats = NULL; - } - spin_unlock_irq(&tsk->sighand->siglock); - - if (stats) - kmem_cache_free(taskstats_cache, stats); -} - static inline void taskstats_tgid_free(struct signal_struct *sig) { if (sig->stats) kmem_cache_free(taskstats_cache, sig->stats); } -extern void taskstats_exit_alloc(struct taskstats **, unsigned int *); -extern void taskstats_exit_send(struct task_struct *, struct taskstats *, int, unsigned int); +extern void taskstats_exit(struct task_struct *, int group_dead); extern void taskstats_init_early(void); #else -static inline void taskstats_exit_alloc(struct taskstats **ptidstats, unsigned int *mycpu) -{} -static inline void taskstats_exit_free(struct taskstats *ptidstats) -{} -static inline void taskstats_exit_send(struct task_struct *tsk, - struct taskstats *tidstats, - int group_dead, unsigned int cpu) +static inline void taskstats_exit(struct task_struct *tsk, int group_dead) {} static inline void taskstats_tgid_init(struct signal_struct *sig) {} -static inline void taskstats_tgid_alloc(struct task_struct *tsk) -{} static inline void taskstats_tgid_free(struct signal_struct *sig) {} static inline void taskstats_init_early(void) diff --git a/include/linux/tcp.h b/include/linux/tcp.h index 2d36f6db370..3cc70d1a350 100644 --- a/include/linux/tcp.h +++ b/include/linux/tcp.h @@ -19,6 +19,7 @@ #include <linux/types.h> #include <asm/byteorder.h> +#include <linux/socket.h> struct tcphdr { __be16 source; @@ -51,7 +52,7 @@ struct tcphdr { #error "Adjust your <asm/byteorder.h> defines" #endif __be16 window; - __be16 check; + __sum16 check; __be16 urg_ptr; }; @@ -94,6 +95,7 @@ enum { #define TCP_INFO 11 /* Information about this connection. */ #define TCP_QUICKACK 12 /* Block/reenable quick acks */ #define TCP_CONGESTION 13 /* Congestion control algorithm */ +#define TCP_MD5SIG 14 /* TCP MD5 Signature (RFC2385) */ #define TCPI_OPT_TIMESTAMPS 1 #define TCPI_OPT_SACK 2 @@ -157,6 +159,17 @@ struct tcp_info __u32 tcpi_total_retrans; }; +/* for TCP_MD5SIG socket option */ +#define TCP_MD5SIG_MAXKEYLEN 80 + +struct tcp_md5sig { + struct __kernel_sockaddr_storage tcpm_addr; /* address associated */ + __u16 __tcpm_pad1; /* zero */ + __u16 tcpm_keylen; /* key length */ + __u32 __tcpm_pad2; /* zero */ + __u8 tcpm_key[TCP_MD5SIG_MAXKEYLEN]; /* key (binary) */ +}; + #ifdef __KERNEL__ #include <linux/skbuff.h> @@ -172,17 +185,17 @@ struct tcp_sack_block_wire { }; struct tcp_sack_block { - __u32 start_seq; - __u32 end_seq; + u32 start_seq; + u32 end_seq; }; struct tcp_options_received { /* PAWS/RTTM data */ long ts_recent_stamp;/* Time we stored ts_recent (for aging) */ - __u32 ts_recent; /* Time stamp to echo next */ - __u32 rcv_tsval; /* Time stamp value */ - __u32 rcv_tsecr; /* Time stamp echo reply */ - __u16 saw_tstamp : 1, /* Saw TIMESTAMP on last packet */ + u32 ts_recent; /* Time stamp to echo next */ + u32 rcv_tsval; /* Time stamp value */ + u32 rcv_tsecr; /* Time stamp echo reply */ + u16 saw_tstamp : 1, /* Saw TIMESTAMP on last packet */ tstamp_ok : 1, /* TIMESTAMP seen on SYN packet */ dsack : 1, /* D-SACK is scheduled */ wscale_ok : 1, /* Wscale seen on SYN packet */ @@ -190,16 +203,20 @@ struct tcp_options_received { snd_wscale : 4, /* Window scaling received from sender */ rcv_wscale : 4; /* Window scaling to send to receiver */ /* SACKs data */ - __u8 eff_sacks; /* Size of SACK array to send with next packet */ - __u8 num_sacks; /* Number of SACK blocks */ - __u16 user_mss; /* mss requested by user in ioctl */ - __u16 mss_clamp; /* Maximal mss, negotiated at connection setup */ + u8 eff_sacks; /* Size of SACK array to send with next packet */ + u8 num_sacks; /* Number of SACK blocks */ + u16 user_mss; /* mss requested by user in ioctl */ + u16 mss_clamp; /* Maximal mss, negotiated at connection setup */ }; struct tcp_request_sock { - struct inet_request_sock req; - __u32 rcv_isn; - __u32 snt_isn; + struct inet_request_sock req; +#ifdef CONFIG_TCP_MD5SIG + /* Only used by TCP MD5 Signature so far. */ + struct tcp_request_sock_ops *af_specific; +#endif + u32 rcv_isn; + u32 snt_isn; }; static inline struct tcp_request_sock *tcp_rsk(const struct request_sock *req) @@ -210,7 +227,8 @@ static inline struct tcp_request_sock *tcp_rsk(const struct request_sock *req) struct tcp_sock { /* inet_connection_sock has to be the first member of tcp_sock */ struct inet_connection_sock inet_conn; - int tcp_header_len; /* Bytes of tcp header to send */ + u16 tcp_header_len; /* Bytes of tcp header to send */ + u16 xmit_size_goal; /* Goal for segmenting output packets */ /* * Header prediction flags @@ -223,13 +241,13 @@ struct tcp_sock { * read the code and the spec side by side (and laugh ...) * See RFC793 and RFC1122. The RFC writes these in capitals. */ - __u32 rcv_nxt; /* What we want to receive next */ - __u32 snd_nxt; /* Next sequence we send */ + u32 rcv_nxt; /* What we want to receive next */ + u32 snd_nxt; /* Next sequence we send */ - __u32 snd_una; /* First byte we want an ack for */ - __u32 snd_sml; /* Last byte of the most recently transmitted small packet */ - __u32 rcv_tstamp; /* timestamp of last received ACK (for keepalives) */ - __u32 lsndtime; /* timestamp of last sent data packet (for restart window) */ + u32 snd_una; /* First byte we want an ack for */ + u32 snd_sml; /* Last byte of the most recently transmitted small packet */ + u32 rcv_tstamp; /* timestamp of last received ACK (for keepalives) */ + u32 lsndtime; /* timestamp of last sent data packet (for restart window) */ /* Data for direct copy to user */ struct { @@ -247,32 +265,30 @@ struct tcp_sock { #endif } ucopy; - __u32 snd_wl1; /* Sequence for window update */ - __u32 snd_wnd; /* The window we expect to receive */ - __u32 max_window; /* Maximal window ever seen from peer */ - __u32 mss_cache; /* Cached effective mss, not including SACKS */ - __u16 xmit_size_goal; /* Goal for segmenting output packets */ - /* XXX Two bytes hole, try to pack */ + u32 snd_wl1; /* Sequence for window update */ + u32 snd_wnd; /* The window we expect to receive */ + u32 max_window; /* Maximal window ever seen from peer */ + u32 mss_cache; /* Cached effective mss, not including SACKS */ - __u32 window_clamp; /* Maximal window to advertise */ - __u32 rcv_ssthresh; /* Current window clamp */ + u32 window_clamp; /* Maximal window to advertise */ + u32 rcv_ssthresh; /* Current window clamp */ - __u32 frto_highmark; /* snd_nxt when RTO occurred */ - __u8 reordering; /* Packet reordering metric. */ - __u8 frto_counter; /* Number of new acks after RTO */ - __u8 nonagle; /* Disable Nagle algorithm? */ - __u8 keepalive_probes; /* num of allowed keep alive probes */ + u32 frto_highmark; /* snd_nxt when RTO occurred */ + u8 reordering; /* Packet reordering metric. */ + u8 frto_counter; /* Number of new acks after RTO */ + u8 nonagle; /* Disable Nagle algorithm? */ + u8 keepalive_probes; /* num of allowed keep alive probes */ /* RTT measurement */ - __u32 srtt; /* smoothed round trip time << 3 */ - __u32 mdev; /* medium deviation */ - __u32 mdev_max; /* maximal mdev for the last rtt period */ - __u32 rttvar; /* smoothed mdev_max */ - __u32 rtt_seq; /* sequence number to update rttvar */ - - __u32 packets_out; /* Packets which are "in flight" */ - __u32 left_out; /* Packets which leaved network */ - __u32 retrans_out; /* Retransmitted packets out */ + u32 srtt; /* smoothed round trip time << 3 */ + u32 mdev; /* medium deviation */ + u32 mdev_max; /* maximal mdev for the last rtt period */ + u32 rttvar; /* smoothed mdev_max */ + u32 rtt_seq; /* sequence number to update rttvar */ + + u32 packets_out; /* Packets which are "in flight" */ + u32 left_out; /* Packets which leaved network */ + u32 retrans_out; /* Retransmitted packets out */ /* * Options received (usually on last packet, some only on SYN packets). */ @@ -281,20 +297,20 @@ struct tcp_sock { /* * Slow start and congestion control (see also Nagle, and Karn & Partridge) */ - __u32 snd_ssthresh; /* Slow start size threshold */ - __u32 snd_cwnd; /* Sending congestion window */ - __u16 snd_cwnd_cnt; /* Linear increase counter */ - __u16 snd_cwnd_clamp; /* Do not allow snd_cwnd to grow above this */ - __u32 snd_cwnd_used; - __u32 snd_cwnd_stamp; + u32 snd_ssthresh; /* Slow start size threshold */ + u32 snd_cwnd; /* Sending congestion window */ + u16 snd_cwnd_cnt; /* Linear increase counter */ + u16 snd_cwnd_clamp; /* Do not allow snd_cwnd to grow above this */ + u32 snd_cwnd_used; + u32 snd_cwnd_stamp; struct sk_buff_head out_of_order_queue; /* Out of order segments go here */ - __u32 rcv_wnd; /* Current receiver window */ - __u32 rcv_wup; /* rcv_nxt on last window update sent */ - __u32 write_seq; /* Tail(+1) of data held in tcp send buffer */ - __u32 pushed_seq; /* Last pushed seq, required to talk to windows */ - __u32 copied_seq; /* Head of yet unread data */ + u32 rcv_wnd; /* Current receiver window */ + u32 rcv_wup; /* rcv_nxt on last window update sent */ + u32 write_seq; /* Tail(+1) of data held in tcp send buffer */ + u32 pushed_seq; /* Last pushed seq, required to talk to windows */ + u32 copied_seq; /* Head of yet unread data */ /* SACKs data */ struct tcp_sack_block duplicate_sack[1]; /* D-SACK block */ @@ -315,26 +331,26 @@ struct tcp_sock { int retransmit_cnt_hint; int forward_cnt_hint; - __u16 advmss; /* Advertised MSS */ - __u16 prior_ssthresh; /* ssthresh saved at recovery start */ - __u32 lost_out; /* Lost packets */ - __u32 sacked_out; /* SACK'd packets */ - __u32 fackets_out; /* FACK'd packets */ - __u32 high_seq; /* snd_nxt at onset of congestion */ + u16 advmss; /* Advertised MSS */ + u16 prior_ssthresh; /* ssthresh saved at recovery start */ + u32 lost_out; /* Lost packets */ + u32 sacked_out; /* SACK'd packets */ + u32 fackets_out; /* FACK'd packets */ + u32 high_seq; /* snd_nxt at onset of congestion */ - __u32 retrans_stamp; /* Timestamp of the last retransmit, + u32 retrans_stamp; /* Timestamp of the last retransmit, * also used in SYN-SENT to remember stamp of * the first SYN. */ - __u32 undo_marker; /* tracking retrans started here. */ + u32 undo_marker; /* tracking retrans started here. */ int undo_retrans; /* number of undoable retransmissions. */ - __u32 urg_seq; /* Seq of received urgent pointer */ - __u16 urg_data; /* Saved octet of OOB data and control flags */ - __u8 urg_mode; /* In urgent mode */ - __u8 ecn_flags; /* ECN status bits. */ - __u32 snd_up; /* Urgent pointer */ + u32 urg_seq; /* Seq of received urgent pointer */ + u16 urg_data; /* Saved octet of OOB data and control flags */ + u8 urg_mode; /* In urgent mode */ + u8 ecn_flags; /* ECN status bits. */ + u32 snd_up; /* Urgent pointer */ - __u32 total_retrans; /* Total retransmits for entire connection */ - __u32 bytes_acked; /* Appropriate Byte Counting - RFC3465 */ + u32 total_retrans; /* Total retransmits for entire connection */ + u32 bytes_acked; /* Appropriate Byte Counting - RFC3465 */ unsigned int keepalive_time; /* time before keep alive takes place */ unsigned int keepalive_intvl; /* time interval between keep alive probes */ @@ -342,27 +358,35 @@ struct tcp_sock { unsigned long last_synq_overflow; - __u32 tso_deferred; + u32 tso_deferred; /* Receiver side RTT estimation */ struct { - __u32 rtt; - __u32 seq; - __u32 time; + u32 rtt; + u32 seq; + u32 time; } rcv_rtt_est; /* Receiver queue space */ struct { int space; - __u32 seq; - __u32 time; + u32 seq; + u32 time; } rcvq_space; /* TCP-specific MTU probe information. */ struct { - __u32 probe_seq_start; - __u32 probe_seq_end; + u32 probe_seq_start; + u32 probe_seq_end; } mtu_probe; + +#ifdef CONFIG_TCP_MD5SIG +/* TCP AF-Specific parts; only used by MD5 Signature support so far */ + struct tcp_sock_af_ops *af_specific; + +/* TCP MD5 Signagure Option information */ + struct tcp_md5sig_info *md5sig_info; +#endif }; static inline struct tcp_sock *tcp_sk(const struct sock *sk) @@ -372,11 +396,15 @@ static inline struct tcp_sock *tcp_sk(const struct sock *sk) struct tcp_timewait_sock { struct inet_timewait_sock tw_sk; - __u32 tw_rcv_nxt; - __u32 tw_snd_nxt; - __u32 tw_rcv_wnd; - __u32 tw_ts_recent; + u32 tw_rcv_nxt; + u32 tw_snd_nxt; + u32 tw_rcv_wnd; + u32 tw_ts_recent; long tw_ts_recent_stamp; +#ifdef CONFIG_TCP_MD5SIG + u16 tw_md5_keylen; + u8 tw_md5_key[TCP_MD5SIG_MAXKEYLEN]; +#endif }; static inline struct tcp_timewait_sock *tcp_twsk(const struct sock *sk) diff --git a/include/linux/textsearch.h b/include/linux/textsearch.h index 7dac8f04d28..004808a6df1 100644 --- a/include/linux/textsearch.h +++ b/include/linux/textsearch.h @@ -20,7 +20,7 @@ struct ts_config; /** * struct ts_state - search state * @offset: offset for next match - * @cb: control buffer, for persistant variables of get_next_block() + * @cb: control buffer, for persistent variables of get_next_block() */ struct ts_state { @@ -71,7 +71,7 @@ struct ts_config * Called repeatedly until 0 is returned. Must assign the * head of the next block of data to &*dst and return the length * of the block or 0 if at the end. consumed == 0 indicates - * a new search. May store/read persistant values in state->cb. + * a new search. May store/read persistent values in state->cb. */ unsigned int (*get_next_block)(unsigned int consumed, const u8 **dst, diff --git a/include/linux/tfrc.h b/include/linux/tfrc.h index 7dab7831c3c..8a8462b4a4d 100644 --- a/include/linux/tfrc.h +++ b/include/linux/tfrc.h @@ -1,7 +1,8 @@ #ifndef _LINUX_TFRC_H_ #define _LINUX_TFRC_H_ /* - * include/linux/tfrc.h + * TFRC - Data Structures for the TCP-Friendly Rate Control congestion + * control mechanism as specified in RFC 3448. * * Copyright (c) 2005 The University of Waikato, Hamilton, New Zealand. * Copyright (c) 2005 Ian McDonald <iam4@cs.waikato.ac.nz> @@ -13,18 +14,37 @@ * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. */ - #include <linux/types.h> +/** tfrc_rx_info - TFRC Receiver Data Structure + * + * @tfrcrx_x_recv: receiver estimate of sending rate (3.2.2) + * @tfrcrx_rtt: round-trip-time (communicated by sender) + * @tfrcrx_p: current estimate of loss event rate (3.2.2) + */ struct tfrc_rx_info { __u32 tfrcrx_x_recv; __u32 tfrcrx_rtt; __u32 tfrcrx_p; }; +/** tfrc_tx_info - TFRC Sender Data Structure + * + * @tfrctx_x: computed transmit rate (4.3 (4)) + * @tfrctx_x_recv: receiver estimate of send rate (4.3) + * @tfrctx_x_calc: return value of throughput equation (3.1) + * @tfrctx_rtt: (moving average) estimate of RTT (4.3) + * @tfrctx_p: current loss event rate (5.4) + * @tfrctx_rto: estimate of RTO, equals 4*RTT (4.3) + * @tfrctx_ipi: inter-packet interval (4.6) + * + * Note: X and X_recv are both maintained in units of 64 * bytes/second. This + * enables a finer resolution of sending rates and avoids problems with + * integer arithmetic; u32 is not sufficient as scaling consumes 6 bits. + */ struct tfrc_tx_info { - __u32 tfrctx_x; - __u32 tfrctx_x_recv; + __u64 tfrctx_x; + __u64 tfrctx_x_recv; __u32 tfrctx_x_calc; __u32 tfrctx_rtt; __u32 tfrctx_p; diff --git a/include/linux/timer.h b/include/linux/timer.h index c982304dbaf..eeef6643d4c 100644 --- a/include/linux/timer.h +++ b/include/linux/timer.h @@ -98,4 +98,10 @@ extern void run_local_timers(void); struct hrtimer; extern int it_real_fn(struct hrtimer *); +unsigned long __round_jiffies(unsigned long j, int cpu); +unsigned long __round_jiffies_relative(unsigned long j, int cpu); +unsigned long round_jiffies(unsigned long j); +unsigned long round_jiffies_relative(unsigned long j); + + #endif diff --git a/include/linux/tipc_config.h b/include/linux/tipc_config.h index 33a653913d9..b0c916d1f37 100644 --- a/include/linux/tipc_config.h +++ b/include/linux/tipc_config.h @@ -194,34 +194,34 @@ struct tipc_node_info { - __u32 addr; /* network address of node */ - __u32 up; /* 0=down, 1= up */ + __be32 addr; /* network address of node */ + __be32 up; /* 0=down, 1= up */ }; struct tipc_link_info { - __u32 dest; /* network address of peer node */ - __u32 up; /* 0=down, 1=up */ + __be32 dest; /* network address of peer node */ + __be32 up; /* 0=down, 1=up */ char str[TIPC_MAX_LINK_NAME]; /* link name */ }; struct tipc_bearer_config { - __u32 priority; /* Range [1,31]. Override per link */ - __u32 detect_scope; + __be32 priority; /* Range [1,31]. Override per link */ + __be32 detect_scope; char name[TIPC_MAX_BEARER_NAME]; }; struct tipc_link_config { - __u32 value; + __be32 value; char name[TIPC_MAX_LINK_NAME]; }; #define TIPC_NTQ_ALLTYPES 0x80000000 struct tipc_name_table_query { - __u32 depth; /* 1:type, 2:+name info, 3:+port info, 4+:+debug info */ - __u32 type; /* {t,l,u} info ignored if high bit of "depth" is set */ - __u32 lowbound; /* (i.e. displays all entries of name table) */ - __u32 upbound; + __be32 depth; /* 1:type, 2:+name info, 3:+port info, 4+:+debug info */ + __be32 type; /* {t,l,u} info ignored if high bit of "depth" is set */ + __be32 lowbound; /* (i.e. displays all entries of name table) */ + __be32 upbound; }; /* @@ -262,8 +262,8 @@ struct tipc_route_info { */ struct tlv_desc { - __u16 tlv_len; /* TLV length (descriptor + value) */ - __u16 tlv_type; /* TLV identifier */ + __be16 tlv_len; /* TLV length (descriptor + value) */ + __be16 tlv_type; /* TLV identifier */ }; #define TLV_ALIGNTO 4 @@ -377,9 +377,9 @@ struct tipc_genlmsghdr { struct tipc_cfg_msg_hdr { - __u32 tcm_len; /* Message length (including header) */ - __u16 tcm_type; /* Command type */ - __u16 tcm_flags; /* Additional flags */ + __be32 tcm_len; /* Message length (including header) */ + __be16 tcm_type; /* Command type */ + __be16 tcm_flags; /* Additional flags */ char tcm_reserved[8]; /* Unused */ }; diff --git a/include/linux/topology.h b/include/linux/topology.h index da508d1998e..6c5a6e6e813 100644 --- a/include/linux/topology.h +++ b/include/linux/topology.h @@ -93,7 +93,7 @@ .groups = NULL, \ .min_interval = 1, \ .max_interval = 2, \ - .busy_factor = 8, \ + .busy_factor = 64, \ .imbalance_pct = 110, \ .cache_nice_tries = 0, \ .per_cpu_gain = 25, \ @@ -194,7 +194,8 @@ .wake_idx = 0, /* unused */ \ .forkexec_idx = 0, /* unused */ \ .per_cpu_gain = 100, \ - .flags = SD_LOAD_BALANCE, \ + .flags = SD_LOAD_BALANCE \ + | SD_SERIALIZE, \ .last_balance = jiffies, \ .balance_interval = 64, \ .nr_balance_failed = 0, \ diff --git a/include/linux/tty.h b/include/linux/tty.h index 44091c0db0b..65cbcf22c31 100644 --- a/include/linux/tty.h +++ b/include/linux/tty.h @@ -53,7 +53,7 @@ struct tty_buffer { }; struct tty_bufhead { - struct work_struct work; + struct delayed_work work; struct semaphore pty_sem; spinlock_t lock; struct tty_buffer *head; /* Queue head */ @@ -175,7 +175,7 @@ struct tty_struct { int index; struct tty_ldisc ldisc; struct mutex termios_mutex; - struct termios *termios, *termios_locked; + struct ktermios *termios, *termios_locked; char name[64]; int pgrp; int session; @@ -258,7 +258,7 @@ struct tty_struct { extern void tty_write_flush(struct tty_struct *); -extern struct termios tty_std_termios; +extern struct ktermios tty_std_termios; extern int kmsg_redirect; @@ -276,9 +276,8 @@ extern int tty_register_ldisc(int disc, struct tty_ldisc *new_ldisc); extern int tty_unregister_ldisc(int disc); extern int tty_register_driver(struct tty_driver *driver); extern int tty_unregister_driver(struct tty_driver *driver); -extern struct class_device *tty_register_device(struct tty_driver *driver, - unsigned index, - struct device *dev); +extern struct device *tty_register_device(struct tty_driver *driver, + unsigned index, struct device *dev); extern void tty_unregister_device(struct tty_driver *driver, unsigned index); extern int tty_read_raw_data(struct tty_struct *tty, unsigned char *bufp, int buflen); @@ -294,8 +293,9 @@ extern int tty_hung_up_p(struct file * filp); extern void do_SAK(struct tty_struct *tty); extern void disassociate_ctty(int priv); extern void tty_flip_buffer_push(struct tty_struct *tty); -extern int tty_get_baud_rate(struct tty_struct *tty); -extern int tty_termios_baud_rate(struct termios *termios); +extern speed_t tty_get_baud_rate(struct tty_struct *tty); +extern speed_t tty_termios_baud_rate(struct ktermios *termios); +extern speed_t tty_termios_input_baud_rate(struct ktermios *termios); extern struct tty_ldisc *tty_ldisc_ref(struct tty_struct *); extern void tty_ldisc_deref(struct tty_ldisc *); @@ -310,6 +310,12 @@ extern void tty_ldisc_flush(struct tty_struct *tty); extern int tty_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg); +extern dev_t tty_devnum(struct tty_struct *tty); +extern void proc_clear_tty(struct task_struct *p); +extern void __proc_set_tty(struct task_struct *tsk, struct tty_struct *tty); +extern void proc_set_tty(struct task_struct *tsk, struct tty_struct *tty); +extern struct tty_struct *get_current_tty(void); + extern struct mutex tty_mutex; /* n_tty.c */ @@ -336,10 +342,5 @@ extern void console_print(const char *); extern int vt_ioctl(struct tty_struct *tty, struct file * file, unsigned int cmd, unsigned long arg); -static inline dev_t tty_devnum(struct tty_struct *tty) -{ - return MKDEV(tty->driver->major, tty->driver->minor_start) + tty->index; -} - #endif /* __KERNEL__ */ #endif diff --git a/include/linux/tty_driver.h b/include/linux/tty_driver.h index 5c8473bb688..659487e3ebe 100644 --- a/include/linux/tty_driver.h +++ b/include/linux/tty_driver.h @@ -53,7 +53,7 @@ * device-specific ioctl's. If the ioctl number passed in cmd * is not recognized by the driver, it should return ENOIOCTLCMD. * - * void (*set_termios)(struct tty_struct *tty, struct termios * old); + * void (*set_termios)(struct tty_struct *tty, struct ktermios * old); * * This routine allows the tty driver to be notified when * device's termios settings have changed. Note that a @@ -132,7 +132,7 @@ struct tty_operations { int (*chars_in_buffer)(struct tty_struct *tty); int (*ioctl)(struct tty_struct *tty, struct file * file, unsigned int cmd, unsigned long arg); - void (*set_termios)(struct tty_struct *tty, struct termios * old); + void (*set_termios)(struct tty_struct *tty, struct ktermios * old); void (*throttle)(struct tty_struct * tty); void (*unthrottle)(struct tty_struct * tty); void (*stop)(struct tty_struct *tty); @@ -165,7 +165,7 @@ struct tty_driver { int num; /* number of devices allocated */ short type; /* type of tty driver */ short subtype; /* subtype of tty driver */ - struct termios init_termios; /* Initial termios */ + struct ktermios init_termios; /* Initial termios */ int flags; /* tty driver flags */ int refcount; /* for loadable tty drivers */ struct proc_dir_entry *proc_entry; /* /proc fs entry */ @@ -175,8 +175,8 @@ struct tty_driver { * Pointer to the tty data structures */ struct tty_struct **ttys; - struct termios **termios; - struct termios **termios_locked; + struct ktermios **termios; + struct ktermios **termios_locked; void *driver_state; /* only used for the PTY driver */ /* @@ -193,7 +193,7 @@ struct tty_driver { int (*chars_in_buffer)(struct tty_struct *tty); int (*ioctl)(struct tty_struct *tty, struct file * file, unsigned int cmd, unsigned long arg); - void (*set_termios)(struct tty_struct *tty, struct termios * old); + void (*set_termios)(struct tty_struct *tty, struct ktermios * old); void (*throttle)(struct tty_struct * tty); void (*unthrottle)(struct tty_struct * tty); void (*stop)(struct tty_struct *tty); diff --git a/include/linux/tty_ldisc.h b/include/linux/tty_ldisc.h index 83c6e6c10eb..d75932e2771 100644 --- a/include/linux/tty_ldisc.h +++ b/include/linux/tty_ldisc.h @@ -59,7 +59,7 @@ * low-level driver can "grab" an ioctl request before the line * discpline has a chance to see it. * - * void (*set_termios)(struct tty_struct *tty, struct termios * old); + * void (*set_termios)(struct tty_struct *tty, struct ktermios * old); * * This function notifies the line discpline that a change has * been made to the termios structure. @@ -118,7 +118,7 @@ struct tty_ldisc { const unsigned char * buf, size_t nr); int (*ioctl)(struct tty_struct * tty, struct file * file, unsigned int cmd, unsigned long arg); - void (*set_termios)(struct tty_struct *tty, struct termios * old); + void (*set_termios)(struct tty_struct *tty, struct ktermios * old); unsigned int (*poll)(struct tty_struct *, struct file *, struct poll_table_struct *); int (*hangup)(struct tty_struct *tty); diff --git a/include/linux/types.h b/include/linux/types.h index 750f085fa56..0351bf2fac8 100644 --- a/include/linux/types.h +++ b/include/linux/types.h @@ -128,21 +128,27 @@ typedef __s64 int64_t; /* this is a special 64bit data type that is 8-byte aligned */ #define aligned_u64 unsigned long long __attribute__((aligned(8))) +#define aligned_be64 __be64 __attribute__((aligned(8))) +#define aligned_le64 __le64 __attribute__((aligned(8))) /** * The type used for indexing onto a disc or disc partition. * * Linux always considers sectors to be 512 bytes long independently * of the devices real block size. - * - * If required, asm/types.h can override it and define - * HAVE_SECTOR_T */ -#ifndef HAVE_SECTOR_T +#ifdef CONFIG_LBD +typedef u64 sector_t; +#else typedef unsigned long sector_t; #endif -#ifndef HAVE_BLKCNT_T +/* + * The type of the inode's block count. + */ +#ifdef CONFIG_LSF +typedef u64 blkcnt_t; +#else typedef unsigned long blkcnt_t; #endif @@ -180,6 +186,8 @@ typedef __u32 __bitwise __be32; typedef __u64 __bitwise __le64; typedef __u64 __bitwise __be64; #endif +typedef __u16 __bitwise __sum16; +typedef __u32 __bitwise __wsum; #ifdef __KERNEL__ typedef unsigned __bitwise__ gfp_t; diff --git a/include/linux/uaccess.h b/include/linux/uaccess.h index a48d7f11c7b..975c963e578 100644 --- a/include/linux/uaccess.h +++ b/include/linux/uaccess.h @@ -1,8 +1,43 @@ #ifndef __LINUX_UACCESS_H__ #define __LINUX_UACCESS_H__ +#include <linux/preempt.h> #include <asm/uaccess.h> +/* + * These routines enable/disable the pagefault handler in that + * it will not take any locks and go straight to the fixup table. + * + * They have great resemblance to the preempt_disable/enable calls + * and in fact they are identical; this is because currently there is + * no other way to make the pagefault handlers do this. So we do + * disable preemption but we don't necessarily care about that. + */ +static inline void pagefault_disable(void) +{ + inc_preempt_count(); + /* + * make sure to have issued the store before a pagefault + * can hit. + */ + barrier(); +} + +static inline void pagefault_enable(void) +{ + /* + * make sure to issue those last loads/stores before enabling + * the pagefault handler again. + */ + barrier(); + dec_preempt_count(); + /* + * make sure we do.. + */ + barrier(); + preempt_check_resched(); +} + #ifndef ARCH_HAS_NOCACHE_UACCESS static inline unsigned long __copy_from_user_inatomic_nocache(void *to, @@ -30,14 +65,22 @@ static inline unsigned long __copy_from_user_nocache(void *to, * do_page_fault() doesn't attempt to take mmap_sem. This makes * probe_kernel_address() suitable for use within regions where the caller * already holds mmap_sem, or other locks which nest inside mmap_sem. + * This must be a macro because __get_user() needs to know the types of the + * args. + * + * We don't include enough header files to be able to do the set_fs(). We + * require that the probe_kernel_address() caller will do that. */ #define probe_kernel_address(addr, retval) \ ({ \ long ret; \ + mm_segment_t old_fs = get_fs(); \ \ - inc_preempt_count(); \ - ret = __get_user(retval, addr); \ - dec_preempt_count(); \ + set_fs(KERNEL_DS); \ + pagefault_disable(); \ + ret = __get_user(retval, (__force typeof(retval) __user *)(addr)); \ + pagefault_enable(); \ + set_fs(old_fs); \ ret; \ }) diff --git a/include/linux/udp.h b/include/linux/udp.h index 014b41d1e30..7e08c07efe0 100644 --- a/include/linux/udp.h +++ b/include/linux/udp.h @@ -23,7 +23,7 @@ struct udphdr { __be16 source; __be16 dest; __be16 len; - __be16 check; + __sum16 check; }; /* UDP socket options */ @@ -38,6 +38,7 @@ struct udphdr { #include <linux/types.h> #include <net/inet_sock.h> +#define UDP_HTABLE_SIZE 128 struct udp_sock { /* inet_sock has to be the first member */ @@ -50,12 +51,23 @@ struct udp_sock { * when the socket is uncorked. */ __u16 len; /* total length of pending frames */ + /* + * Fields specific to UDP-Lite. + */ + __u16 pcslen; + __u16 pcrlen; +/* indicator bits used by pcflag: */ +#define UDPLITE_BIT 0x1 /* set by udplite proto init function */ +#define UDPLITE_SEND_CC 0x2 /* set via udplite setsockopt */ +#define UDPLITE_RECV_CC 0x4 /* set via udplite setsocktopt */ + __u8 pcflag; /* marks socket as UDP-Lite if > 0 */ }; static inline struct udp_sock *udp_sk(const struct sock *sk) { return (struct udp_sock *)sk; } +#define IS_UDPLITE(__sk) (udp_sk(__sk)->pcflag) #endif diff --git a/include/linux/unwind.h b/include/linux/unwind.h index 749928c161f..7760860fa17 100644 --- a/include/linux/unwind.h +++ b/include/linux/unwind.h @@ -14,63 +14,6 @@ struct module; -#ifdef CONFIG_STACK_UNWIND - -#include <asm/unwind.h> - -#ifndef ARCH_UNWIND_SECTION_NAME -#define ARCH_UNWIND_SECTION_NAME ".eh_frame" -#endif - -/* - * Initialize unwind support. - */ -extern void unwind_init(void); -extern void unwind_setup(void); - -#ifdef CONFIG_MODULES - -extern void *unwind_add_table(struct module *, - const void *table_start, - unsigned long table_size); - -extern void unwind_remove_table(void *handle, int init_only); - -#endif - -extern int unwind_init_frame_info(struct unwind_frame_info *, - struct task_struct *, - /*const*/ struct pt_regs *); - -/* - * Prepare to unwind a blocked task. - */ -extern int unwind_init_blocked(struct unwind_frame_info *, - struct task_struct *); - -/* - * Prepare to unwind the currently running thread. - */ -extern int unwind_init_running(struct unwind_frame_info *, - asmlinkage int (*callback)(struct unwind_frame_info *, - void *arg), - void *arg); - -/* - * Unwind to previous to frame. Returns 0 if successful, negative - * number in case of an error. - */ -extern int unwind(struct unwind_frame_info *); - -/* - * Unwind until the return pointer is in user-land (or until an error - * occurs). Returns 0 if successful, negative number in case of - * error. - */ -extern int unwind_to_user(struct unwind_frame_info *); - -#else - struct unwind_frame_info {}; static inline void unwind_init(void) {} @@ -85,12 +28,12 @@ static inline void *unwind_add_table(struct module *mod, return NULL; } -#endif - static inline void unwind_remove_table(void *handle, int init_only) { } +#endif + static inline int unwind_init_frame_info(struct unwind_frame_info *info, struct task_struct *tsk, const struct pt_regs *regs) @@ -122,6 +65,4 @@ static inline int unwind_to_user(struct unwind_frame_info *info) return -ENOSYS; } -#endif - #endif /* _LINUX_UNWIND_H */ diff --git a/include/linux/usb.h b/include/linux/usb.h index 5482bfb3303..aab5b1b7202 100644 --- a/include/linux/usb.h +++ b/include/linux/usb.h @@ -313,8 +313,13 @@ struct usb_bus { /* This is arbitrary. * From USB 2.0 spec Table 11-13, offset 7, a hub can * have up to 255 ports. The most yet reported is 10. + * + * Current Wireless USB host hardware (Intel i1480 for example) allows + * up to 22 devices to connect. Upcoming hardware might raise that + * limit. Because the arrays need to add a bit for hub status data, we + * do 31, so plus one evens out to four bytes. */ -#define USB_MAXCHILDREN (16) +#define USB_MAXCHILDREN (31) struct usb_tt; @@ -357,7 +362,8 @@ struct usb_device { u8 portnum; /* Parent port number (origin 1) */ u8 level; /* Number of USB hub ancestors */ - int have_langid; /* whether string_langid is valid */ + unsigned discon_suspended:1; /* Disconnected while suspended */ + unsigned have_langid:1; /* whether string_langid is valid */ int string_langid; /* language ID for strings */ /* static strings from the device */ @@ -382,7 +388,7 @@ struct usb_device { int pm_usage_cnt; /* usage counter for autosuspend */ #ifdef CONFIG_PM - struct work_struct autosuspend; /* for delayed autosuspends */ + struct delayed_work autosuspend; /* for delayed autosuspends */ struct mutex pm_mutex; /* protects PM operations */ unsigned auto_pm:1; /* autosuspend/resume in progress */ @@ -410,14 +416,37 @@ extern struct usb_device *usb_find_device(u16 vendor_id, u16 product_id); /* USB autosuspend and autoresume */ #ifdef CONFIG_USB_SUSPEND +extern int usb_autopm_set_interface(struct usb_interface *intf); extern int usb_autopm_get_interface(struct usb_interface *intf); extern void usb_autopm_put_interface(struct usb_interface *intf); +static inline void usb_autopm_enable(struct usb_interface *intf) +{ + intf->pm_usage_cnt = 0; + usb_autopm_set_interface(intf); +} + +static inline void usb_autopm_disable(struct usb_interface *intf) +{ + intf->pm_usage_cnt = 1; + usb_autopm_set_interface(intf); +} + #else -#define usb_autopm_get_interface(intf) 0 -#define usb_autopm_put_interface(intf) do {} while (0) -#endif +static inline int usb_autopm_set_interface(struct usb_interface *intf) +{ return 0; } + +static inline int usb_autopm_get_interface(struct usb_interface *intf) +{ return 0; } + +static inline void usb_autopm_put_interface(struct usb_interface *intf) +{ } +static inline void usb_autopm_enable(struct usb_interface *intf) +{ } +static inline void usb_autopm_disable(struct usb_interface *intf) +{ } +#endif /*-------------------------------------------------------------------------*/ @@ -490,17 +519,137 @@ static inline int usb_make_path (struct usb_device *dev, char *buf, /*-------------------------------------------------------------------------*/ -extern int usb_endpoint_dir_in(const struct usb_endpoint_descriptor *epd); -extern int usb_endpoint_dir_out(const struct usb_endpoint_descriptor *epd); -extern int usb_endpoint_xfer_bulk(const struct usb_endpoint_descriptor *epd); -extern int usb_endpoint_xfer_int(const struct usb_endpoint_descriptor *epd); -extern int usb_endpoint_xfer_isoc(const struct usb_endpoint_descriptor *epd); -extern int usb_endpoint_is_bulk_in(const struct usb_endpoint_descriptor *epd); -extern int usb_endpoint_is_bulk_out(const struct usb_endpoint_descriptor *epd); -extern int usb_endpoint_is_int_in(const struct usb_endpoint_descriptor *epd); -extern int usb_endpoint_is_int_out(const struct usb_endpoint_descriptor *epd); -extern int usb_endpoint_is_isoc_in(const struct usb_endpoint_descriptor *epd); -extern int usb_endpoint_is_isoc_out(const struct usb_endpoint_descriptor *epd); +/** + * usb_endpoint_dir_in - check if the endpoint has IN direction + * @epd: endpoint to be checked + * + * Returns true if the endpoint is of type IN, otherwise it returns false. + */ +static inline int usb_endpoint_dir_in(const struct usb_endpoint_descriptor *epd) +{ + return ((epd->bEndpointAddress & USB_ENDPOINT_DIR_MASK) == USB_DIR_IN); +} + +/** + * usb_endpoint_dir_out - check if the endpoint has OUT direction + * @epd: endpoint to be checked + * + * Returns true if the endpoint is of type OUT, otherwise it returns false. + */ +static inline int usb_endpoint_dir_out(const struct usb_endpoint_descriptor *epd) +{ + return ((epd->bEndpointAddress & USB_ENDPOINT_DIR_MASK) == USB_DIR_OUT); +} + +/** + * usb_endpoint_xfer_bulk - check if the endpoint has bulk transfer type + * @epd: endpoint to be checked + * + * Returns true if the endpoint is of type bulk, otherwise it returns false. + */ +static inline int usb_endpoint_xfer_bulk(const struct usb_endpoint_descriptor *epd) +{ + return ((epd->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) == + USB_ENDPOINT_XFER_BULK); +} + +/** + * usb_endpoint_xfer_int - check if the endpoint has interrupt transfer type + * @epd: endpoint to be checked + * + * Returns true if the endpoint is of type interrupt, otherwise it returns + * false. + */ +static inline int usb_endpoint_xfer_int(const struct usb_endpoint_descriptor *epd) +{ + return ((epd->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) == + USB_ENDPOINT_XFER_INT); +} + +/** + * usb_endpoint_xfer_isoc - check if the endpoint has isochronous transfer type + * @epd: endpoint to be checked + * + * Returns true if the endpoint is of type isochronous, otherwise it returns + * false. + */ +static inline int usb_endpoint_xfer_isoc(const struct usb_endpoint_descriptor *epd) +{ + return ((epd->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) == + USB_ENDPOINT_XFER_ISOC); +} + +/** + * usb_endpoint_is_bulk_in - check if the endpoint is bulk IN + * @epd: endpoint to be checked + * + * Returns true if the endpoint has bulk transfer type and IN direction, + * otherwise it returns false. + */ +static inline int usb_endpoint_is_bulk_in(const struct usb_endpoint_descriptor *epd) +{ + return (usb_endpoint_xfer_bulk(epd) && usb_endpoint_dir_in(epd)); +} + +/** + * usb_endpoint_is_bulk_out - check if the endpoint is bulk OUT + * @epd: endpoint to be checked + * + * Returns true if the endpoint has bulk transfer type and OUT direction, + * otherwise it returns false. + */ +static inline int usb_endpoint_is_bulk_out(const struct usb_endpoint_descriptor *epd) +{ + return (usb_endpoint_xfer_bulk(epd) && usb_endpoint_dir_out(epd)); +} + +/** + * usb_endpoint_is_int_in - check if the endpoint is interrupt IN + * @epd: endpoint to be checked + * + * Returns true if the endpoint has interrupt transfer type and IN direction, + * otherwise it returns false. + */ +static inline int usb_endpoint_is_int_in(const struct usb_endpoint_descriptor *epd) +{ + return (usb_endpoint_xfer_int(epd) && usb_endpoint_dir_in(epd)); +} + +/** + * usb_endpoint_is_int_out - check if the endpoint is interrupt OUT + * @epd: endpoint to be checked + * + * Returns true if the endpoint has interrupt transfer type and OUT direction, + * otherwise it returns false. + */ +static inline int usb_endpoint_is_int_out(const struct usb_endpoint_descriptor *epd) +{ + return (usb_endpoint_xfer_int(epd) && usb_endpoint_dir_out(epd)); +} + +/** + * usb_endpoint_is_isoc_in - check if the endpoint is isochronous IN + * @epd: endpoint to be checked + * + * Returns true if the endpoint has isochronous transfer type and IN direction, + * otherwise it returns false. + */ +static inline int usb_endpoint_is_isoc_in(const struct usb_endpoint_descriptor *epd) +{ + return (usb_endpoint_xfer_isoc(epd) && usb_endpoint_dir_in(epd)); +} + +/** + * usb_endpoint_is_isoc_out - check if the endpoint is isochronous OUT + * @epd: endpoint to be checked + * + * Returns true if the endpoint has isochronous transfer type and OUT direction, + * otherwise it returns false. + */ +static inline int usb_endpoint_is_isoc_out(const struct usb_endpoint_descriptor *epd) +{ + return (usb_endpoint_xfer_isoc(epd) && usb_endpoint_dir_out(epd)); +} /*-------------------------------------------------------------------------*/ diff --git a/include/linux/usb/serial.h b/include/linux/usb/serial.h index 91b3ea2bbb1..10f99e5f1a9 100644 --- a/include/linux/usb/serial.h +++ b/include/linux/usb/serial.h @@ -218,7 +218,7 @@ struct usb_serial_driver { int (*write) (struct usb_serial_port *port, const unsigned char *buf, int count); int (*write_room) (struct usb_serial_port *port); int (*ioctl) (struct usb_serial_port *port, struct file * file, unsigned int cmd, unsigned long arg); - void (*set_termios) (struct usb_serial_port *port, struct termios * old); + void (*set_termios) (struct usb_serial_port *port, struct ktermios * old); void (*break_ctl) (struct usb_serial_port *port, int break_state); int (*chars_in_buffer) (struct usb_serial_port *port); void (*throttle) (struct usb_serial_port *port); diff --git a/include/linux/videodev2.h b/include/linux/videodev2.h index df5c4654360..5cb380a559f 100644 --- a/include/linux/videodev2.h +++ b/include/linux/videodev2.h @@ -244,6 +244,7 @@ struct v4l2_pix_format #define V4L2_PIX_FMT_YYUV v4l2_fourcc('Y','Y','U','V') /* 16 YUV 4:2:2 */ #define V4L2_PIX_FMT_HI240 v4l2_fourcc('H','I','2','4') /* 8 8-bit color */ #define V4L2_PIX_FMT_HM12 v4l2_fourcc('H','M','1','2') /* 8 YUV 4:2:0 16x16 macroblocks */ +#define V4L2_PIX_FMT_RGB444 v4l2_fourcc('R','4','4','4') /* 16 xxxxrrrr ggggbbbb */ /* see http://www.siliconimaging.com/RGB%20Bayer.htm */ #define V4L2_PIX_FMT_SBGGR8 v4l2_fourcc('B','A','8','1') /* 8 BGBG.. GRGR.. */ diff --git a/include/linux/vmstat.h b/include/linux/vmstat.h index c89df55f6e0..5e9803ed17f 100644 --- a/include/linux/vmstat.h +++ b/include/linux/vmstat.h @@ -10,8 +10,9 @@ /* * Light weight per cpu counter implementation. * - * Counters should only be incremented and no critical kernel component - * should rely on the counter values. + * Counters should only be incremented. You need to set EMBEDDED + * to disable VM_EVENT_COUNTERS. Things like procps (vmstat, + * top, etc) use /proc/vmstat and depend on these counters. * * Counters are handled completely inline. On many platforms the code * generated will simply be the increment of a global address. @@ -73,7 +74,13 @@ static inline void count_vm_events(enum vm_event_item item, long delta) } extern void all_vm_events(unsigned long *); +#ifdef CONFIG_HOTPLUG extern void vm_events_fold_cpu(int cpu); +#else +static inline void vm_events_fold_cpu(int cpu) +{ +} +#endif #else diff --git a/include/linux/wireless.h b/include/linux/wireless.h index a50a0130fd9..7c269f4992e 100644 --- a/include/linux/wireless.h +++ b/include/linux/wireless.h @@ -546,6 +546,8 @@ /* MLME requests (SIOCSIWMLME / struct iw_mlme) */ #define IW_MLME_DEAUTH 0 #define IW_MLME_DISASSOC 1 +#define IW_MLME_AUTH 2 +#define IW_MLME_ASSOC 3 /* SIOCSIWAUTH/SIOCGIWAUTH struct iw_param flags */ #define IW_AUTH_INDEX 0x0FFF diff --git a/include/linux/workqueue.h b/include/linux/workqueue.h index 9bca3539a1e..2a7b38d8701 100644 --- a/include/linux/workqueue.h +++ b/include/linux/workqueue.h @@ -8,15 +8,34 @@ #include <linux/timer.h> #include <linux/linkage.h> #include <linux/bitops.h> +#include <asm/atomic.h> struct workqueue_struct; +struct work_struct; +typedef void (*work_func_t)(struct work_struct *work); + +/* + * The first word is the work queue pointer and the flags rolled into + * one + */ +#define work_data_bits(work) ((unsigned long *)(&(work)->data)) + struct work_struct { - unsigned long pending; + atomic_long_t data; +#define WORK_STRUCT_PENDING 0 /* T if work item pending execution */ +#define WORK_STRUCT_NOAUTOREL 1 /* F if work item automatically released on exec */ +#define WORK_STRUCT_FLAG_MASK (3UL) +#define WORK_STRUCT_WQ_DATA_MASK (~WORK_STRUCT_FLAG_MASK) struct list_head entry; - void (*func)(void *); - void *data; - void *wq_data; + work_func_t func; +}; + +#define WORK_DATA_INIT(autorelease) \ + ATOMIC_LONG_INIT((autorelease) << WORK_STRUCT_NOAUTOREL) + +struct delayed_work { + struct work_struct work; struct timer_list timer; }; @@ -24,77 +43,164 @@ struct execute_work { struct work_struct work; }; -#define __WORK_INITIALIZER(n, f, d) { \ +#define __WORK_INITIALIZER(n, f) { \ + .data = WORK_DATA_INIT(0), \ + .entry = { &(n).entry, &(n).entry }, \ + .func = (f), \ + } + +#define __WORK_INITIALIZER_NAR(n, f) { \ + .data = WORK_DATA_INIT(1), \ .entry = { &(n).entry, &(n).entry }, \ .func = (f), \ - .data = (d), \ + } + +#define __DELAYED_WORK_INITIALIZER(n, f) { \ + .work = __WORK_INITIALIZER((n).work, (f)), \ .timer = TIMER_INITIALIZER(NULL, 0, 0), \ } -#define DECLARE_WORK(n, f, d) \ - struct work_struct n = __WORK_INITIALIZER(n, f, d) +#define __DELAYED_WORK_INITIALIZER_NAR(n, f) { \ + .work = __WORK_INITIALIZER_NAR((n).work, (f)), \ + .timer = TIMER_INITIALIZER(NULL, 0, 0), \ + } + +#define DECLARE_WORK(n, f) \ + struct work_struct n = __WORK_INITIALIZER(n, f) + +#define DECLARE_WORK_NAR(n, f) \ + struct work_struct n = __WORK_INITIALIZER_NAR(n, f) + +#define DECLARE_DELAYED_WORK(n, f) \ + struct delayed_work n = __DELAYED_WORK_INITIALIZER(n, f) + +#define DECLARE_DELAYED_WORK_NAR(n, f) \ + struct dwork_struct n = __DELAYED_WORK_INITIALIZER_NAR(n, f) /* - * initialize a work-struct's func and data pointers: + * initialize a work item's function pointer */ -#define PREPARE_WORK(_work, _func, _data) \ +#define PREPARE_WORK(_work, _func) \ do { \ - (_work)->func = _func; \ - (_work)->data = _data; \ + (_work)->func = (_func); \ } while (0) +#define PREPARE_DELAYED_WORK(_work, _func) \ + PREPARE_WORK(&(_work)->work, (_func)) + /* - * initialize all of a work-struct: + * initialize all of a work item in one go + * + * NOTE! No point in using "atomic_long_set()": useing a direct + * assignment of the work data initializer allows the compiler + * to generate better code. */ -#define INIT_WORK(_work, _func, _data) \ +#define INIT_WORK(_work, _func) \ do { \ + (_work)->data = (atomic_long_t) WORK_DATA_INIT(0); \ INIT_LIST_HEAD(&(_work)->entry); \ - (_work)->pending = 0; \ - PREPARE_WORK((_work), (_func), (_data)); \ + PREPARE_WORK((_work), (_func)); \ + } while (0) + +#define INIT_WORK_NAR(_work, _func) \ + do { \ + (_work)->data = (atomic_long_t) WORK_DATA_INIT(1); \ + INIT_LIST_HEAD(&(_work)->entry); \ + PREPARE_WORK((_work), (_func)); \ + } while (0) + +#define INIT_DELAYED_WORK(_work, _func) \ + do { \ + INIT_WORK(&(_work)->work, (_func)); \ + init_timer(&(_work)->timer); \ + } while (0) + +#define INIT_DELAYED_WORK_NAR(_work, _func) \ + do { \ + INIT_WORK_NAR(&(_work)->work, (_func)); \ init_timer(&(_work)->timer); \ } while (0) +/** + * work_pending - Find out whether a work item is currently pending + * @work: The work item in question + */ +#define work_pending(work) \ + test_bit(WORK_STRUCT_PENDING, work_data_bits(work)) + +/** + * delayed_work_pending - Find out whether a delayable work item is currently + * pending + * @work: The work item in question + */ +#define delayed_work_pending(w) \ + work_pending(&(w)->work) + +/** + * work_release - Release a work item under execution + * @work: The work item to release + * + * This is used to release a work item that has been initialised with automatic + * release mode disabled (WORK_STRUCT_NOAUTOREL is set). This gives the work + * function the opportunity to grab auxiliary data from the container of the + * work_struct before clearing the pending bit as the work_struct may be + * subject to deallocation the moment the pending bit is cleared. + * + * In such a case, this should be called in the work function after it has + * fetched any data it may require from the containter of the work_struct. + * After this function has been called, the work_struct may be scheduled for + * further execution or it may be deallocated unless other precautions are + * taken. + * + * This should also be used to release a delayed work item. + */ +#define work_release(work) \ + clear_bit(WORK_STRUCT_PENDING, work_data_bits(work)) + + extern struct workqueue_struct *__create_workqueue(const char *name, - int singlethread); -#define create_workqueue(name) __create_workqueue((name), 0) -#define create_singlethread_workqueue(name) __create_workqueue((name), 1) + int singlethread, + int freezeable); +#define create_workqueue(name) __create_workqueue((name), 0, 0) +#define create_freezeable_workqueue(name) __create_workqueue((name), 0, 1) +#define create_singlethread_workqueue(name) __create_workqueue((name), 1, 0) extern void destroy_workqueue(struct workqueue_struct *wq); extern int FASTCALL(queue_work(struct workqueue_struct *wq, struct work_struct *work)); -extern int FASTCALL(queue_delayed_work(struct workqueue_struct *wq, struct work_struct *work, unsigned long delay)); +extern int FASTCALL(queue_delayed_work(struct workqueue_struct *wq, struct delayed_work *work, unsigned long delay)); extern int queue_delayed_work_on(int cpu, struct workqueue_struct *wq, - struct work_struct *work, unsigned long delay); + struct delayed_work *work, unsigned long delay); extern void FASTCALL(flush_workqueue(struct workqueue_struct *wq)); extern int FASTCALL(schedule_work(struct work_struct *work)); -extern int FASTCALL(schedule_delayed_work(struct work_struct *work, unsigned long delay)); +extern int FASTCALL(run_scheduled_work(struct work_struct *work)); +extern int FASTCALL(schedule_delayed_work(struct delayed_work *work, unsigned long delay)); -extern int schedule_delayed_work_on(int cpu, struct work_struct *work, unsigned long delay); -extern int schedule_on_each_cpu(void (*func)(void *info), void *info); +extern int schedule_delayed_work_on(int cpu, struct delayed_work *work, unsigned long delay); +extern int schedule_on_each_cpu(work_func_t func); extern void flush_scheduled_work(void); extern int current_is_keventd(void); extern int keventd_up(void); extern void init_workqueues(void); -void cancel_rearming_delayed_work(struct work_struct *work); +void cancel_rearming_delayed_work(struct delayed_work *work); void cancel_rearming_delayed_workqueue(struct workqueue_struct *, - struct work_struct *); -int execute_in_process_context(void (*fn)(void *), void *, - struct execute_work *); + struct delayed_work *); +int execute_in_process_context(work_func_t fn, struct execute_work *); /* * Kill off a pending schedule_delayed_work(). Note that the work callback * function may still be running on return from cancel_delayed_work(). Run * flush_scheduled_work() to wait on it. */ -static inline int cancel_delayed_work(struct work_struct *work) +static inline int cancel_delayed_work(struct delayed_work *work) { int ret; ret = del_timer_sync(&work->timer); if (ret) - clear_bit(0, &work->pending); + work_release(&work->work); return ret; } diff --git a/include/linux/xfrm.h b/include/linux/xfrm.h index 8ae7f744917..9529ea1ae39 100644 --- a/include/linux/xfrm.h +++ b/include/linux/xfrm.h @@ -211,8 +211,8 @@ struct xfrm_user_tmpl { struct xfrm_encap_tmpl { __u16 encap_type; - __u16 encap_sport; - __u16 encap_dport; + __be16 encap_sport; + __be16 encap_dport; xfrm_address_t encap_oa; }; @@ -289,7 +289,9 @@ struct xfrm_usersa_id { struct xfrm_aevent_id { struct xfrm_usersa_id sa_id; + xfrm_address_t saddr; __u32 flags; + __u32 reqid; }; struct xfrm_userspi_info { @@ -355,7 +357,7 @@ struct xfrm_user_report { #define XFRMGRP_EXPIRE 2 #define XFRMGRP_SA 4 #define XFRMGRP_POLICY 8 -#define XFRMGRP_REPORT 0x10 +#define XFRMGRP_REPORT 0x20 #endif enum xfrm_nlgroups { diff --git a/include/linux/zftape.h b/include/linux/zftape.h deleted file mode 100644 index b057c65366c..00000000000 --- a/include/linux/zftape.h +++ /dev/null @@ -1,87 +0,0 @@ -#ifndef _ZFTAPE_H -#define _ZFTAPE_H - -/* - * Copyright (C) 1996, 1997 Claus-Justus Heine. - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2, or (at your option) - any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; see the file COPYING. If not, write to - the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. - - * - * $Source: /homes/cvs/ftape-stacked/include/linux/zftape.h,v $ - * $Revision: 1.12 $ - * $Date: 1997/10/21 11:02:37 $ - * - * Special ioctl and other global info for the zftape VFS - * interface for the QIC-40/80/3010/3020 floppy-tape driver for - * Linux. - */ - -#define ZFTAPE_VERSION "zftape for " FTAPE_VERSION - -#include <linux/ftape.h> - -#define ZFTAPE_LABEL "Ftape - The Linux Floppy Tape Project!" - -/* Bits of the minor device number that control the operation mode */ -#define ZFT_Q80_MODE (1 << 3) -#define ZFT_ZIP_MODE (1 << 4) -#define ZFT_RAW_MODE (1 << 5) -#define ZFT_MINOR_OP_MASK (ZFT_Q80_MODE | \ - ZFT_ZIP_MODE | \ - ZFT_RAW_MODE) -#define ZFT_MINOR_MASK (FTAPE_SEL_MASK | \ - ZFT_MINOR_OP_MASK | \ - FTAPE_NO_REWIND) - -#ifdef ZFT_OBSOLETE -struct mtblksz { - unsigned int mt_blksz; -}; -#define MTIOC_ZFTAPE_GETBLKSZ _IOR('m', 104, struct mtblksz) -#endif - -#ifdef __KERNEL__ - -extern int zft_init(void); - -static inline __s64 zft_div_blksz(__s64 value, __u32 blk_sz) -{ - if (blk_sz == 1) { - return value; - } else { - return (__s64)(((__u32)(value >> 10) + (blk_sz >> 10) - 1) - / (blk_sz >> 10)); - } -} - -static inline __s64 zft_mul_blksz(__s64 value, __u32 blk_sz) -{ - if (blk_sz == 1) { - return value; - } else { - /* if blk_sz != 1, then it is a multiple of 1024. In - * this case, `value' will also fit into 32 bits. - * - * Actually, this limits the capacity to 42 - * bits. This is (2^32)*1024, roughly a thousand - * times 2GB, or 3 Terabytes. Hopefully this is enough - */ - return(__s64)(((__u32)(value)*(blk_sz>>10))<<10); - } -} - -#endif - -#endif diff --git a/include/media/cx2341x.h b/include/media/cx2341x.h index d91d88f93c8..ecad55bf016 100644 --- a/include/media/cx2341x.h +++ b/include/media/cx2341x.h @@ -49,7 +49,7 @@ struct cx2341x_mpeg_params { enum v4l2_mpeg_audio_mode_extension audio_mode_extension; enum v4l2_mpeg_audio_emphasis audio_emphasis; enum v4l2_mpeg_audio_crc audio_crc; - u8 audio_properties; + u16 audio_properties; /* video */ enum v4l2_mpeg_video_encoding video_encoding; diff --git a/include/media/ir-common.h b/include/media/ir-common.h index 8f58406533c..4bb0ad81017 100644 --- a/include/media/ir-common.h +++ b/include/media/ir-common.h @@ -24,6 +24,7 @@ #define _IR_COMMON #include <linux/input.h> +#include <linux/workqueue.h> #define IR_TYPE_RC5 1 #define IR_TYPE_PD 2 /* Pulse distance encoded IR */ @@ -92,6 +93,7 @@ extern IR_KEYTAB_TYPE ir_codes_hauppauge_new[IR_KEYTAB_SIZE]; extern IR_KEYTAB_TYPE ir_codes_npgtech[IR_KEYTAB_SIZE]; extern IR_KEYTAB_TYPE ir_codes_norwood[IR_KEYTAB_SIZE]; extern IR_KEYTAB_TYPE ir_codes_proteus_2309[IR_KEYTAB_SIZE]; +extern IR_KEYTAB_TYPE ir_codes_budget_ci_old[IR_KEYTAB_SIZE]; #endif diff --git a/include/media/saa7146.h b/include/media/saa7146.h index fee579f10b3..796bcf151a3 100644 --- a/include/media/saa7146.h +++ b/include/media/saa7146.h @@ -42,10 +42,6 @@ extern unsigned int saa7146_debug; #define DEB_INT(x) if (0!=(DEBUG_VARIABLE&0x20)) { DEBUG_PROLOG; printk x; } /* interrupt debug messages */ #define DEB_CAP(x) if (0!=(DEBUG_VARIABLE&0x40)) { DEBUG_PROLOG; printk x; } /* capture debug messages */ -#define SAA7146_IER_DISABLE(x,y) \ - saa7146_write(x, IER, saa7146_read(x, IER) & ~(y)); -#define SAA7146_IER_ENABLE(x,y) \ - saa7146_write(x, IER, saa7146_read(x, IER) | (y)); #define SAA7146_ISR_CLEAR(x,y) \ saa7146_write(x, ISR, (y)); @@ -441,4 +437,20 @@ int saa7146_wait_for_debi_done(struct saa7146_dev *dev, int nobusyloop); #define SAA7146_I2C_BUS_BIT_RATE_80 (0x200) #define SAA7146_I2C_BUS_BIT_RATE_60 (0x300) +static inline void SAA7146_IER_DISABLE(struct saa7146_dev *x, unsigned y) +{ + unsigned long flags; + spin_lock_irqsave(&x->int_slock, flags); + saa7146_write(x, IER, saa7146_read(x, IER) & ~y); + spin_unlock_irqrestore(&x->int_slock, flags); +} + +static inline void SAA7146_IER_ENABLE(struct saa7146_dev *x, unsigned y) +{ + unsigned long flags; + spin_lock_irqsave(&x->int_slock, flags); + saa7146_write(x, IER, saa7146_read(x, IER) | y); + spin_unlock_irqrestore(&x->int_slock, flags); +} + #endif diff --git a/include/media/tuner-types.h b/include/media/tuner-types.h index 37dad07a843..e5ad3fcfe98 100644 --- a/include/media/tuner-types.h +++ b/include/media/tuner-types.h @@ -50,6 +50,10 @@ struct tuner_params { sensitivity. If this setting is 1, then set PORT2 to 1 to get proper FM reception. */ unsigned int port2_fm_high_sensitivity:1; + /* Some Philips tuners use tda9887 cGainNormal to select the FM radio + sensitivity. If this setting is 1, e register will use cGainNormal + instead of cGainLow. */ + unsigned int fm_gain_normal:1; /* Most tuners with a tda9887 use QSS mode. Some (cheaper) tuners use Intercarrier mode. If this setting is 1, then the tuner needs to be set to intercarrier mode. */ diff --git a/include/media/tuner.h b/include/media/tuner.h index 3116e750132..99acf847365 100644 --- a/include/media/tuner.h +++ b/include/media/tuner.h @@ -145,6 +145,7 @@ extern int tuner_debug; #define TDA9887_DEEMPHASIS_75 (3<<16) #define TDA9887_AUTOMUTE (1<<18) #define TDA9887_GATING_18 (1<<19) +#define TDA9887_GAIN_NORMAL (1<<20) #ifdef __KERNEL__ diff --git a/include/media/tveeprom.h b/include/media/tveeprom.h index e9fc1a78549..5660ea24996 100644 --- a/include/media/tveeprom.h +++ b/include/media/tveeprom.h @@ -3,7 +3,7 @@ struct tveeprom { u32 has_radio; - u32 has_ir; /* 0: no IR, 1: IR present, 2: unknown */ + u32 has_ir; /* bit 0: IR receiver present, bit 1: IR transmitter (blaster) present. -1 == unknown */ u32 has_MAC_address; /* 0: no MAC, 1: MAC present, 2: unknown */ u32 tuner_type; diff --git a/include/media/v4l2-common.h b/include/media/v4l2-common.h index aecc946980a..91b19921f95 100644 --- a/include/media/v4l2-common.h +++ b/include/media/v4l2-common.h @@ -144,6 +144,9 @@ enum v4l2_chip_ident { V4L2_IDENT_CX25841 = 241, V4L2_IDENT_CX25842 = 242, V4L2_IDENT_CX25843 = 243, + + /* OmniVision sensors - range 250-299 */ + V4L2_IDENT_OV7670 = 250, }; /* audio ioctls */ @@ -251,4 +254,8 @@ struct v4l2_crystal_freq { If the frequency is not supported, then -EINVAL is returned. */ #define VIDIOC_INT_S_CRYSTAL_FREQ _IOW ('d', 113, struct v4l2_crystal_freq) +/* Initialize the sensor registors to some sort of reasonable + default values. */ +#define VIDIOC_INT_INIT _IOW ('d', 114, u32) + #endif /* V4L2_COMMON_H_ */ diff --git a/include/media/v4l2-dev.h b/include/media/v4l2-dev.h index 6a11d772700..fb96472a1bd 100644 --- a/include/media/v4l2-dev.h +++ b/include/media/v4l2-dev.h @@ -43,6 +43,7 @@ /* Video standard functions */ extern unsigned int v4l2_video_std_fps(struct v4l2_standard *vs); +extern char *v4l2_norm_to_name(v4l2_std_id id); extern int v4l2_video_std_construct(struct v4l2_standard *vs, int id, char *name); @@ -81,12 +82,6 @@ extern long v4l_compat_ioctl32(struct file *file, unsigned int cmd, * This version moves redundant code from video device code to * the common handler */ -struct v4l2_tvnorm { - char *name; - v4l2_std_id id; - - void *priv_data; -}; struct video_device { @@ -104,9 +99,8 @@ struct video_device int debug; /* Activates debug level*/ /* Video standard vars */ - int tvnormsize; /* Size of tvnorm array */ - v4l2_std_id current_norm; /* Current tvnorm */ - struct v4l2_tvnorm *tvnorms; + v4l2_std_id tvnorms; /* Supported tv norms */ + v4l2_std_id current_norm; /* Current tvnorm */ /* callbacks */ void (*release)(struct video_device *vfd); @@ -211,7 +205,7 @@ struct video_device /* Standard handling G_STD and ENUMSTD are handled by videodev.c */ - int (*vidioc_s_std) (struct file *file, void *fh, v4l2_std_id a); + int (*vidioc_s_std) (struct file *file, void *fh, v4l2_std_id *norm); int (*vidioc_querystd) (struct file *file, void *fh, v4l2_std_id *a); /* Input handling */ diff --git a/include/net/addrconf.h b/include/net/addrconf.h index 44f1b673f91..88df8fc814e 100644 --- a/include/net/addrconf.h +++ b/include/net/addrconf.h @@ -35,9 +35,9 @@ struct prefix_info { #else #error "Please fix <asm/byteorder.h>" #endif - __u32 valid; - __u32 prefered; - __u32 reserved2; + __be32 valid; + __be32 prefered; + __be32 reserved2; struct in6_addr prefix; }; @@ -183,7 +183,7 @@ static __inline__ u8 ipv6_addr_hash(const struct in6_addr *addr) * This will include the IEEE address token on links that support it. */ - word = addr->s6_addr32[2] ^ addr->s6_addr32[3]; + word = (__force u32)(addr->s6_addr32[2] ^ addr->s6_addr32[3]); word ^= (word >> 16); word ^= (word >> 8); diff --git a/include/net/arp.h b/include/net/arp.h index 6a3d9a7d302..f0266456860 100644 --- a/include/net/arp.h +++ b/include/net/arp.h @@ -16,7 +16,7 @@ extern void arp_send(int type, int ptype, __be32 dest_ip, struct net_device *dev, __be32 src_ip, unsigned char *dest_hw, unsigned char *src_hw, unsigned char *th); extern int arp_bind_neighbour(struct dst_entry *dst); -extern int arp_mc_map(u32 addr, u8 *haddr, struct net_device *dev, int dir); +extern int arp_mc_map(__be32 addr, u8 *haddr, struct net_device *dev, int dir); extern void arp_ifdown(struct net_device *dev); extern struct sk_buff *arp_create(int type, int ptype, __be32 dest_ip, diff --git a/include/net/atmclip.h b/include/net/atmclip.h index 90fcc98e676..b5a51a7bb36 100644 --- a/include/net/atmclip.h +++ b/include/net/atmclip.h @@ -36,7 +36,7 @@ struct clip_vcc { struct atmarp_entry { - u32 ip; /* IP address */ + __be32 ip; /* IP address */ struct clip_vcc *vccs; /* active VCCs; NULL if resolution is pending */ unsigned long expires; /* entry expiration time */ diff --git a/include/net/ax25.h b/include/net/ax25.h index 69374cd1a85..5ae10dd2e32 100644 --- a/include/net/ax25.h +++ b/include/net/ax25.h @@ -277,20 +277,24 @@ struct sock *ax25_get_socket(ax25_address *, ax25_address *, int); extern ax25_cb *ax25_find_cb(ax25_address *, ax25_address *, ax25_digi *, struct net_device *); extern void ax25_send_to_raw(ax25_address *, struct sk_buff *, int); extern void ax25_destroy_socket(ax25_cb *); -extern ax25_cb *ax25_create_cb(void); +extern ax25_cb * __must_check ax25_create_cb(void); extern void ax25_fillin_cb(ax25_cb *, ax25_dev *); extern struct sock *ax25_make_new(struct sock *, struct ax25_dev *); /* ax25_addr.c */ -extern ax25_address null_ax25_address; -extern char *ax2asc(char *buf, ax25_address *); -extern void asc2ax(ax25_address *addr, char *callsign); -extern int ax25cmp(ax25_address *, ax25_address *); -extern int ax25digicmp(ax25_digi *, ax25_digi *); -extern unsigned char *ax25_addr_parse(unsigned char *, int, ax25_address *, ax25_address *, ax25_digi *, int *, int *); -extern int ax25_addr_build(unsigned char *, ax25_address *, ax25_address *, ax25_digi *, int, int); -extern int ax25_addr_size(ax25_digi *); -extern void ax25_digi_invert(ax25_digi *, ax25_digi *); +extern const ax25_address ax25_bcast; +extern const ax25_address ax25_defaddr; +extern const ax25_address null_ax25_address; +extern char *ax2asc(char *buf, const ax25_address *); +extern void asc2ax(ax25_address *addr, const char *callsign); +extern int ax25cmp(const ax25_address *, const ax25_address *); +extern int ax25digicmp(const ax25_digi *, const ax25_digi *); +extern const unsigned char *ax25_addr_parse(const unsigned char *, int, + ax25_address *, ax25_address *, ax25_digi *, int *, int *); +extern int ax25_addr_build(unsigned char *, const ax25_address *, + const ax25_address *, const ax25_digi *, int, int); +extern int ax25_addr_size(const ax25_digi *); +extern void ax25_digi_invert(const ax25_digi *, ax25_digi *); /* ax25_dev.c */ extern ax25_dev *ax25_dev_list; @@ -329,11 +333,25 @@ extern void ax25_ds_t3timer_expiry(ax25_cb *); extern void ax25_ds_idletimer_expiry(ax25_cb *); /* ax25_iface.c */ -extern int ax25_protocol_register(unsigned int, int (*)(struct sk_buff *, ax25_cb *)); + +struct ax25_protocol { + struct ax25_protocol *next; + unsigned int pid; + int (*func)(struct sk_buff *, ax25_cb *); +}; + +extern void ax25_register_pid(struct ax25_protocol *ap); extern void ax25_protocol_release(unsigned int); -extern int ax25_linkfail_register(void (*)(ax25_cb *, int)); -extern void ax25_linkfail_release(void (*)(ax25_cb *, int)); -extern int ax25_listen_register(ax25_address *, struct net_device *); + +struct ax25_linkfail { + struct hlist_node lf_node; + void (*func)(ax25_cb *, int); +}; + +extern void ax25_linkfail_register(struct ax25_linkfail *lf); +extern void ax25_linkfail_release(struct ax25_linkfail *lf); +extern int __must_check ax25_listen_register(ax25_address *, + struct net_device *); extern void ax25_listen_release(ax25_address *, struct net_device *); extern int (*ax25_protocol_function(unsigned int))(struct sk_buff *, ax25_cb *); extern int ax25_listen_mine(ax25_address *, struct net_device *); @@ -411,7 +429,7 @@ extern unsigned long ax25_display_timer(struct timer_list *); /* ax25_uid.c */ extern int ax25_uid_policy; extern ax25_uid_assoc *ax25_findbyuid(uid_t); -extern int ax25_uid_ioctl(int, struct sockaddr_ax25 *); +extern int __must_check ax25_uid_ioctl(int, struct sockaddr_ax25 *); extern struct file_operations ax25_uid_fops; extern void ax25_uid_free(void); diff --git a/include/net/bluetooth/hci.h b/include/net/bluetooth/hci.h index 10a3eec191f..41456c14884 100644 --- a/include/net/bluetooth/hci.h +++ b/include/net/bluetooth/hci.h @@ -739,13 +739,13 @@ struct sockaddr_hci { struct hci_filter { unsigned long type_mask; unsigned long event_mask[2]; - __u16 opcode; + __le16 opcode; }; struct hci_ufilter { __u32 type_mask; __u32 event_mask[2]; - __u16 opcode; + __le16 opcode; }; #define HCI_FLT_TYPE_BITS 31 diff --git a/include/net/bluetooth/rfcomm.h b/include/net/bluetooth/rfcomm.h index 89d743cfdfd..3c563f02907 100644 --- a/include/net/bluetooth/rfcomm.h +++ b/include/net/bluetooth/rfcomm.h @@ -124,7 +124,7 @@ struct rfcomm_pn { u8 flow_ctrl; u8 priority; u8 ack_timer; - u16 mtu; + __le16 mtu; u8 max_retrans; u8 credits; } __attribute__ ((packed)); @@ -136,7 +136,7 @@ struct rfcomm_rpn { u8 flow_ctrl; u8 xon_char; u8 xoff_char; - u16 param_mask; + __le16 param_mask; } __attribute__ ((packed)); struct rfcomm_rls { diff --git a/include/net/checksum.h b/include/net/checksum.h index e3ea7cc2c72..124246172a8 100644 --- a/include/net/checksum.h +++ b/include/net/checksum.h @@ -27,8 +27,8 @@ #ifndef _HAVE_ARCH_COPY_AND_CSUM_FROM_USER static inline -unsigned int csum_and_copy_from_user (const unsigned char __user *src, unsigned char *dst, - int len, int sum, int *err_ptr) +__wsum csum_and_copy_from_user (const void __user *src, void *dst, + int len, __wsum sum, int *err_ptr) { if (access_ok(VERIFY_READ, src, len)) return csum_partial_copy_from_user(src, dst, len, sum, err_ptr); @@ -41,8 +41,8 @@ unsigned int csum_and_copy_from_user (const unsigned char __user *src, unsigned #endif #ifndef HAVE_CSUM_COPY_USER -static __inline__ unsigned int csum_and_copy_to_user -(const unsigned char *src, unsigned char __user *dst, int len, unsigned int sum, int *err_ptr) +static __inline__ __wsum csum_and_copy_to_user +(const void *src, void __user *dst, int len, __wsum sum, int *err_ptr) { sum = csum_partial(src, len, sum); @@ -53,35 +53,44 @@ static __inline__ unsigned int csum_and_copy_to_user if (len) *err_ptr = -EFAULT; - return -1; /* invalid checksum */ + return (__force __wsum)-1; /* invalid checksum */ } #endif -static inline unsigned int csum_add(unsigned int csum, unsigned int addend) +static inline __wsum csum_add(__wsum csum, __wsum addend) { - csum += addend; - return csum + (csum < addend); + u32 res = (__force u32)csum; + res += (__force u32)addend; + return (__force __wsum)(res + (res < (__force u32)addend)); } -static inline unsigned int csum_sub(unsigned int csum, unsigned int addend) +static inline __wsum csum_sub(__wsum csum, __wsum addend) { return csum_add(csum, ~addend); } -static inline unsigned int -csum_block_add(unsigned int csum, unsigned int csum2, int offset) +static inline __wsum +csum_block_add(__wsum csum, __wsum csum2, int offset) { + u32 sum = (__force u32)csum2; if (offset&1) - csum2 = ((csum2&0xFF00FF)<<8)+((csum2>>8)&0xFF00FF); - return csum_add(csum, csum2); + sum = ((sum&0xFF00FF)<<8)+((sum>>8)&0xFF00FF); + return csum_add(csum, (__force __wsum)sum); } -static inline unsigned int -csum_block_sub(unsigned int csum, unsigned int csum2, int offset) +static inline __wsum +csum_block_sub(__wsum csum, __wsum csum2, int offset) { + u32 sum = (__force u32)csum2; if (offset&1) - csum2 = ((csum2&0xFF00FF)<<8)+((csum2>>8)&0xFF00FF); - return csum_sub(csum, csum2); + sum = ((sum&0xFF00FF)<<8)+((sum>>8)&0xFF00FF); + return csum_sub(csum, (__force __wsum)sum); } +static inline __wsum csum_unfold(__sum16 n) +{ + return (__force __wsum)n; +} + +#define CSUM_MANGLED_0 ((__force __sum16)0xffff) #endif diff --git a/include/net/cipso_ipv4.h b/include/net/cipso_ipv4.h index 718b4d9c891..4c9522c5178 100644 --- a/include/net/cipso_ipv4.h +++ b/include/net/cipso_ipv4.h @@ -58,10 +58,10 @@ #define CIPSO_V4_MAP_PASS 2 /* limits */ -#define CIPSO_V4_MAX_REM_LVLS 256 +#define CIPSO_V4_MAX_REM_LVLS 255 #define CIPSO_V4_INV_LVL 0x80000000 #define CIPSO_V4_MAX_LOC_LVLS (CIPSO_V4_INV_LVL - 1) -#define CIPSO_V4_MAX_REM_CATS 65536 +#define CIPSO_V4_MAX_REM_CATS 65534 #define CIPSO_V4_INV_CAT 0x80000000 #define CIPSO_V4_MAX_LOC_CATS (CIPSO_V4_INV_CAT - 1) diff --git a/include/net/dsfield.h b/include/net/dsfield.h index a79c9e075f7..eb65bf2e250 100644 --- a/include/net/dsfield.h +++ b/include/net/dsfield.h @@ -20,14 +20,14 @@ static inline __u8 ipv4_get_dsfield(struct iphdr *iph) static inline __u8 ipv6_get_dsfield(struct ipv6hdr *ipv6h) { - return ntohs(*(__u16 *) ipv6h) >> 4; + return ntohs(*(__be16 *) ipv6h) >> 4; } static inline void ipv4_change_dsfield(struct iphdr *iph,__u8 mask, __u8 value) { - __u32 check = ntohs(iph->check); + __u32 check = ntohs((__force __be16)iph->check); __u8 dsfield; dsfield = (iph->tos & mask) | value; @@ -35,7 +35,7 @@ static inline void ipv4_change_dsfield(struct iphdr *iph,__u8 mask, if ((check+1) >> 16) check = (check+1) & 0xffff; check -= dsfield; check += check >> 16; /* adjust carry */ - iph->check = htons(check); + iph->check = (__force __sum16)htons(check); iph->tos = dsfield; } @@ -45,9 +45,9 @@ static inline void ipv6_change_dsfield(struct ipv6hdr *ipv6h,__u8 mask, { __u16 tmp; - tmp = ntohs(*(__u16 *) ipv6h); + tmp = ntohs(*(__be16 *) ipv6h); tmp = (tmp & ((mask << 4) | 0xf00f)) | (value << 4); - *(__u16 *) ipv6h = htons(tmp); + *(__be16 *) ipv6h = htons(tmp); } diff --git a/include/net/dst.h b/include/net/dst.h index e156e38e4ac..62b7e7598e9 100644 --- a/include/net/dst.h +++ b/include/net/dst.h @@ -98,7 +98,7 @@ struct dst_ops int entry_size; atomic_t entries; - kmem_cache_t *kmem_cachep; + struct kmem_cache *kmem_cachep; }; #ifdef __KERNEL__ diff --git a/include/net/fib_rules.h b/include/net/fib_rules.h index 8e2f473d3e8..bc3c26494c3 100644 --- a/include/net/fib_rules.h +++ b/include/net/fib_rules.h @@ -13,6 +13,8 @@ struct fib_rule atomic_t refcnt; int ifindex; char ifname[IFNAMSIZ]; + u32 mark; + u32 mark_mask; u32 pref; u32 flags; u32 table; @@ -50,6 +52,7 @@ struct fib_rules_ops struct nlmsghdr *, struct fib_rule_hdr *); u32 (*default_pref)(void); + size_t (*nlmsg_payload)(struct fib_rule *); int nlgroup; struct nla_policy *policy; @@ -57,6 +60,13 @@ struct fib_rules_ops struct module *owner; }; +#define FRA_GENERIC_POLICY \ + [FRA_IFNAME] = { .type = NLA_STRING, .len = IFNAMSIZ - 1 }, \ + [FRA_PRIORITY] = { .type = NLA_U32 }, \ + [FRA_FWMARK] = { .type = NLA_U32 }, \ + [FRA_FWMASK] = { .type = NLA_U32 }, \ + [FRA_TABLE] = { .type = NLA_U32 } + static inline void fib_rule_get(struct fib_rule *rule) { atomic_inc(&rule->refcnt); diff --git a/include/net/flow.h b/include/net/flow.h index 5cda27cd9de..ce4b10d8b41 100644 --- a/include/net/flow.h +++ b/include/net/flow.h @@ -13,12 +13,12 @@ struct flowi { int oif; int iif; + __u32 mark; union { struct { __be32 daddr; __be32 saddr; - __u32 fwmark; __u8 tos; __u8 scope; } ip4_u; @@ -26,28 +26,23 @@ struct flowi { struct { struct in6_addr daddr; struct in6_addr saddr; - __u32 fwmark; - __u32 flowlabel; + __be32 flowlabel; } ip6_u; struct { __le16 daddr; __le16 saddr; - __u32 fwmark; __u8 scope; } dn_u; } nl_u; #define fld_dst nl_u.dn_u.daddr #define fld_src nl_u.dn_u.saddr -#define fld_fwmark nl_u.dn_u.fwmark #define fld_scope nl_u.dn_u.scope #define fl6_dst nl_u.ip6_u.daddr #define fl6_src nl_u.ip6_u.saddr -#define fl6_fwmark nl_u.ip6_u.fwmark #define fl6_flowlabel nl_u.ip6_u.flowlabel #define fl4_dst nl_u.ip4_u.daddr #define fl4_src nl_u.ip4_u.saddr -#define fl4_fwmark nl_u.ip4_u.fwmark #define fl4_tos nl_u.ip4_u.tos #define fl4_scope nl_u.ip4_u.scope diff --git a/include/net/genetlink.h b/include/net/genetlink.h index b619314218a..adff4c898d5 100644 --- a/include/net/genetlink.h +++ b/include/net/genetlink.h @@ -53,6 +53,7 @@ struct genl_info * @policy: attribute validation policy * @doit: standard command callback * @dumpit: callback for dumpers + * @done: completion callback for dumps * @ops_list: operations list */ struct genl_ops @@ -64,6 +65,7 @@ struct genl_ops struct genl_info *info); int (*dumpit)(struct sk_buff *skb, struct netlink_callback *cb); + int (*done)(struct netlink_callback *cb); struct list_head ops_list; }; @@ -79,34 +81,51 @@ extern struct sock *genl_sock; * @skb: socket buffer holding the message * @pid: netlink pid the message is addressed to * @seq: sequence number (usually the one of the sender) - * @type: netlink message type - * @hdrlen: length of the user specific header + * @family: generic netlink family * @flags netlink message flags * @cmd: generic netlink command - * @version: version * * Returns pointer to user specific header */ static inline void *genlmsg_put(struct sk_buff *skb, u32 pid, u32 seq, - int type, int hdrlen, int flags, - u8 cmd, u8 version) + struct genl_family *family, int flags, u8 cmd) { struct nlmsghdr *nlh; struct genlmsghdr *hdr; - nlh = nlmsg_put(skb, pid, seq, type, GENL_HDRLEN + hdrlen, flags); + nlh = nlmsg_put(skb, pid, seq, family->id, GENL_HDRLEN + + family->hdrsize, flags); if (nlh == NULL) return NULL; hdr = nlmsg_data(nlh); hdr->cmd = cmd; - hdr->version = version; + hdr->version = family->version; hdr->reserved = 0; return (char *) hdr + GENL_HDRLEN; } /** + * genlmsg_put_reply - Add generic netlink header to a reply message + * @skb: socket buffer holding the message + * @info: receiver info + * @family: generic netlink family + * @flags: netlink message flags + * @cmd: generic netlink command + * + * Returns pointer to user specific header + */ +static inline void *genlmsg_put_reply(struct sk_buff *skb, + struct genl_info *info, + struct genl_family *family, + int flags, u8 cmd) +{ + return genlmsg_put(skb, info->snd_pid, info->snd_seq, family, + flags, cmd); +} + +/** * genlmsg_end - Finalize a generic netlink message * @skb: socket buffer the message is stored in * @hdr: user specific header @@ -150,6 +169,16 @@ static inline int genlmsg_unicast(struct sk_buff *skb, u32 pid) } /** + * genlmsg_reply - reply to a request + * @skb: netlink message to be sent back + * @info: receiver information + */ +static inline int genlmsg_reply(struct sk_buff *skb, struct genl_info *info) +{ + return genlmsg_unicast(skb, info->snd_pid); +} + +/** * gennlmsg_data - head of message payload * @gnlh: genetlink messsage header */ @@ -187,4 +216,15 @@ static inline int genlmsg_total_size(int payload) return NLMSG_ALIGN(genlmsg_msg_size(payload)); } +/** + * genlmsg_new - Allocate a new generic netlink message + * @payload: size of the message payload + * @flags: the type of memory to allocate. + */ +static inline struct sk_buff *genlmsg_new(size_t payload, gfp_t flags) +{ + return nlmsg_new(genlmsg_total_size(payload), flags); +} + + #endif /* __NET_GENERIC_NETLINK_H */ diff --git a/include/net/ieee80211.h b/include/net/ieee80211.h index b174ebb277a..e02d85f56e6 100644 --- a/include/net/ieee80211.h +++ b/include/net/ieee80211.h @@ -218,7 +218,7 @@ struct ieee80211_snap_hdr { #define WLAN_FC_GET_STYPE(fc) ((fc) & IEEE80211_FCTL_STYPE) #define WLAN_GET_SEQ_FRAG(seq) ((seq) & IEEE80211_SCTL_FRAG) -#define WLAN_GET_SEQ_SEQ(seq) ((seq) & IEEE80211_SCTL_SEQ) +#define WLAN_GET_SEQ_SEQ(seq) (((seq) & IEEE80211_SCTL_SEQ) >> 4) /* Authentication algorithms */ #define WLAN_AUTH_OPEN 0 @@ -1037,6 +1037,10 @@ struct ieee80211_device { /* host performs multicast decryption */ int host_mc_decrypt; + /* host should strip IV and ICV from protected frames */ + /* meaningful only when hardware decryption is being used */ + int host_strip_iv_icv; + int host_open_frag; int host_build_iv; int ieee802_1x; /* is IEEE 802.1X used */ @@ -1076,6 +1080,8 @@ struct ieee80211_device { int perfect_rssi; int worst_rssi; + u16 prev_seq_ctl; /* used to drop duplicate frames */ + /* Callback functions */ void (*set_security) (struct net_device * dev, struct ieee80211_security * sec); diff --git a/include/net/ieee80211softmac.h b/include/net/ieee80211softmac.h index 617b672b113..89119277553 100644 --- a/include/net/ieee80211softmac.h +++ b/include/net/ieee80211softmac.h @@ -108,8 +108,8 @@ struct ieee80211softmac_assoc_info { /* Scan retries remaining */ int scan_retry; - struct work_struct work; - struct work_struct timeout; + struct delayed_work work; + struct delayed_work timeout; }; struct ieee80211softmac_bss_info { diff --git a/include/net/if_inet6.h b/include/net/if_inet6.h index 34489c13c11..3ec7d07346d 100644 --- a/include/net/if_inet6.h +++ b/include/net/if_inet6.h @@ -152,6 +152,7 @@ struct ifacaddr6 struct ipv6_devstat { struct proc_dir_entry *proc_dir_entry; + DEFINE_SNMP_STAT(struct ipstats_mib, ipv6); DEFINE_SNMP_STAT(struct icmpv6_mib, icmpv6); }; diff --git a/include/net/inet6_connection_sock.h b/include/net/inet6_connection_sock.h index b33b438bffc..16aa96a6a53 100644 --- a/include/net/inet6_connection_sock.h +++ b/include/net/inet6_connection_sock.h @@ -27,7 +27,7 @@ extern int inet6_csk_bind_conflict(const struct sock *sk, extern struct request_sock *inet6_csk_search_req(const struct sock *sk, struct request_sock ***prevp, - const __u16 rport, + const __be16 rport, const struct in6_addr *raddr, const struct in6_addr *laddr, const int iif); @@ -38,5 +38,5 @@ extern void inet6_csk_reqsk_queue_hash_add(struct sock *sk, extern void inet6_csk_addr2sockaddr(struct sock *sk, struct sockaddr *uaddr); -extern int inet6_csk_xmit(struct sk_buff *skb, int ipfragok); +extern int inet6_csk_xmit(struct sk_buff *skb, struct sock *sk, int ipfragok); #endif /* _INET6_CONNECTION_SOCK_H */ diff --git a/include/net/inet6_hashtables.h b/include/net/inet6_hashtables.h index bc6a71dce98..c28e424f53d 100644 --- a/include/net/inet6_hashtables.h +++ b/include/net/inet6_hashtables.h @@ -26,11 +26,11 @@ struct inet_hashinfo; /* I have no idea if this is a good hash for v6 or not. -DaveM */ static inline unsigned int inet6_ehashfn(const struct in6_addr *laddr, const u16 lport, - const struct in6_addr *faddr, const u16 fport) + const struct in6_addr *faddr, const __be16 fport) { - unsigned int hashent = (lport ^ fport); + unsigned int hashent = (lport ^ (__force u16)fport); - hashent ^= (laddr->s6_addr32[3] ^ faddr->s6_addr32[3]); + hashent ^= (__force u32)(laddr->s6_addr32[3] ^ faddr->s6_addr32[3]); hashent ^= hashent >> 16; hashent ^= hashent >> 8; return hashent; @@ -43,7 +43,7 @@ static inline int inet6_sk_ehashfn(const struct sock *sk) const struct in6_addr *laddr = &np->rcv_saddr; const struct in6_addr *faddr = &np->daddr; const __u16 lport = inet->num; - const __u16 fport = inet->dport; + const __be16 fport = inet->dport; return inet6_ehashfn(laddr, lport, faddr, fport); } @@ -57,7 +57,7 @@ extern void __inet6_hash(struct inet_hashinfo *hashinfo, struct sock *sk); */ extern struct sock *__inet6_lookup_established(struct inet_hashinfo *hashinfo, const struct in6_addr *saddr, - const u16 sport, + const __be16 sport, const struct in6_addr *daddr, const u16 hnum, const int dif); @@ -69,7 +69,7 @@ extern struct sock *inet6_lookup_listener(struct inet_hashinfo *hashinfo, static inline struct sock *__inet6_lookup(struct inet_hashinfo *hashinfo, const struct in6_addr *saddr, - const u16 sport, + const __be16 sport, const struct in6_addr *daddr, const u16 hnum, const int dif) @@ -83,8 +83,8 @@ static inline struct sock *__inet6_lookup(struct inet_hashinfo *hashinfo, } extern struct sock *inet6_lookup(struct inet_hashinfo *hashinfo, - const struct in6_addr *saddr, const u16 sport, - const struct in6_addr *daddr, const u16 dport, + const struct in6_addr *saddr, const __be16 sport, + const struct in6_addr *daddr, const __be16 dport, const int dif); #endif /* defined(CONFIG_IPV6) || defined (CONFIG_IPV6_MODULE) */ #endif /* _INET6_HASHTABLES_H */ diff --git a/include/net/inet_connection_sock.h b/include/net/inet_connection_sock.h index 0bcf9f237e1..bf16d98d372 100644 --- a/include/net/inet_connection_sock.h +++ b/include/net/inet_connection_sock.h @@ -18,6 +18,7 @@ #include <linux/compiler.h> #include <linux/string.h> #include <linux/timer.h> +#include <linux/poll.h> #include <net/inet_sock.h> #include <net/request_sock.h> @@ -36,7 +37,8 @@ struct tcp_congestion_ops; * (i.e. things that depend on the address family) */ struct inet_connection_sock_af_ops { - int (*queue_xmit)(struct sk_buff *skb, int ipfragok); + int (*queue_xmit)(struct sk_buff *skb, struct sock *sk, + int ipfragok); void (*send_check)(struct sock *sk, int len, struct sk_buff *skb); int (*rebuild_header)(struct sock *sk); @@ -45,7 +47,8 @@ struct inet_connection_sock_af_ops { struct request_sock *req, struct dst_entry *dst); int (*remember_stamp)(struct sock *sk); - __u16 net_header_len; + u16 net_header_len; + u16 sockaddr_len; int (*setsockopt)(struct sock *sk, int level, int optname, char __user *optval, int optlen); int (*getsockopt)(struct sock *sk, int level, int optname, @@ -57,7 +60,6 @@ struct inet_connection_sock_af_ops { int level, int optname, char __user *optval, int __user *optlen); void (*addr2sockaddr)(struct sock *sk, struct sockaddr *); - int sockaddr_len; }; /** inet_connection_sock - INET connection oriented sock diff --git a/include/net/inet_ecn.h b/include/net/inet_ecn.h index 7849844a491..10117c8503e 100644 --- a/include/net/inet_ecn.h +++ b/include/net/inet_ecn.h @@ -53,7 +53,7 @@ static inline __u8 INET_ECN_encapsulate(__u8 outer, __u8 inner) static inline int IP_ECN_set_ce(struct iphdr *iph) { - u32 check = iph->check; + u32 check = (__force u32)iph->check; u32 ecn = (iph->tos + 1) & INET_ECN_MASK; /* @@ -71,9 +71,9 @@ static inline int IP_ECN_set_ce(struct iphdr *iph) * INET_ECN_ECT_1 => check += htons(0xFFFD) * INET_ECN_ECT_0 => check += htons(0xFFFE) */ - check += htons(0xFFFB) + htons(ecn); + check += (__force u16)htons(0xFFFB) + (__force u16)htons(ecn); - iph->check = check + (check>=0xFFFF); + iph->check = (__force __sum16)(check + (check>=0xFFFF)); iph->tos |= INET_ECN_CE; return 1; } @@ -95,13 +95,13 @@ static inline int IP6_ECN_set_ce(struct ipv6hdr *iph) { if (INET_ECN_is_not_ect(ipv6_get_dsfield(iph))) return 0; - *(u32*)iph |= htonl(INET_ECN_CE << 20); + *(__be32*)iph |= htonl(INET_ECN_CE << 20); return 1; } static inline void IP6_ECN_clear(struct ipv6hdr *iph) { - *(u32*)iph &= ~htonl(INET_ECN_MASK << 20); + *(__be32*)iph &= ~htonl(INET_ECN_MASK << 20); } static inline void ipv6_copy_dscp(struct ipv6hdr *outer, struct ipv6hdr *inner) diff --git a/include/net/inet_hashtables.h b/include/net/inet_hashtables.h index a9eb2eaf094..34cc76e3ddb 100644 --- a/include/net/inet_hashtables.h +++ b/include/net/inet_hashtables.h @@ -125,7 +125,7 @@ struct inet_hashinfo { rwlock_t lhash_lock ____cacheline_aligned; atomic_t lhash_users; wait_queue_head_t lhash_wait; - kmem_cache_t *bind_bucket_cachep; + struct kmem_cache *bind_bucket_cachep; }; static inline struct inet_ehash_bucket *inet_ehash_bucket( @@ -136,10 +136,10 @@ static inline struct inet_ehash_bucket *inet_ehash_bucket( } extern struct inet_bind_bucket * - inet_bind_bucket_create(kmem_cache_t *cachep, + inet_bind_bucket_create(struct kmem_cache *cachep, struct inet_bind_hashbucket *head, const unsigned short snum); -extern void inet_bind_bucket_destroy(kmem_cache_t *cachep, +extern void inet_bind_bucket_destroy(struct kmem_cache *cachep, struct inet_bind_bucket *tb); static inline int inet_bhashfn(const __u16 lport, const int bhash_size) diff --git a/include/net/inet_timewait_sock.h b/include/net/inet_timewait_sock.h index 5f48748fe01..f7be1ac7360 100644 --- a/include/net/inet_timewait_sock.h +++ b/include/net/inet_timewait_sock.h @@ -84,7 +84,7 @@ struct inet_timewait_death_row { }; extern void inet_twdr_hangman(unsigned long data); -extern void inet_twdr_twkill_work(void *data); +extern void inet_twdr_twkill_work(struct work_struct *work); extern void inet_twdr_twcal_tick(unsigned long data); #if (BITS_PER_LONG == 64) diff --git a/include/net/ip.h b/include/net/ip.h index b6d95e55340..053f02b5cb8 100644 --- a/include/net/ip.h +++ b/include/net/ip.h @@ -97,7 +97,7 @@ extern int ip_mc_output(struct sk_buff *skb); extern int ip_fragment(struct sk_buff *skb, int (*output)(struct sk_buff *)); extern int ip_do_nat(struct sk_buff *skb); extern void ip_send_check(struct iphdr *ip); -extern int ip_queue_xmit(struct sk_buff *skb, int ipfragok); +extern int ip_queue_xmit(struct sk_buff *skb, struct sock *sk, int ipfragok); extern void ip_init(void); extern int ip_append_data(struct sock *sk, int getfrag(void *from, char *to, int offset, int len, @@ -123,7 +123,7 @@ extern int ip4_datagram_connect(struct sock *sk, * multicast packets. */ -static inline void ip_tr_mc_map(u32 addr, char *buf) +static inline void ip_tr_mc_map(__be32 addr, char *buf) { buf[0]=0xC0; buf[1]=0x00; @@ -135,7 +135,7 @@ static inline void ip_tr_mc_map(u32 addr, char *buf) struct ip_reply_arg { struct kvec iov[1]; - u32 csum; + __wsum csum; int csumoffset; /* u16 offset of csum in iov[0].iov_base */ /* -1 if not needed */ }; @@ -192,9 +192,9 @@ extern void ipfrag_init(void); static inline int ip_decrease_ttl(struct iphdr *iph) { - u32 check = iph->check; - check += htons(0x0100); - iph->check = check + (check>=0xFFFF); + u32 check = (__force u32)iph->check; + check += (__force u32)htons(0x0100); + iph->check = (__force __sum16)(check + (check>=0xFFFF)); return --iph->ttl; } @@ -238,9 +238,9 @@ static inline void ip_select_ident_more(struct iphdr *iph, struct dst_entry *dst * Map a multicast IP onto multicast MAC for type ethernet. */ -static inline void ip_eth_mc_map(u32 addr, char *buf) +static inline void ip_eth_mc_map(__be32 naddr, char *buf) { - addr=ntohl(addr); + __u32 addr=ntohl(naddr); buf[0]=0x01; buf[1]=0x00; buf[2]=0x5e; @@ -256,13 +256,14 @@ static inline void ip_eth_mc_map(u32 addr, char *buf) * Leave P_Key as 0 to be filled in by driver. */ -static inline void ip_ib_mc_map(u32 addr, char *buf) +static inline void ip_ib_mc_map(__be32 naddr, char *buf) { + __u32 addr; buf[0] = 0; /* Reserved */ buf[1] = 0xff; /* Multicast QPN */ buf[2] = 0xff; buf[3] = 0xff; - addr = ntohl(addr); + addr = ntohl(naddr); buf[4] = 0xff; buf[5] = 0x12; /* link local scope */ buf[6] = 0x40; /* IPv4 signature */ @@ -375,8 +376,7 @@ int ipv4_doint_and_flush(ctl_table *ctl, int write, size_t *lenp, loff_t *ppos); int ipv4_doint_and_flush_strategy(ctl_table *table, int __user *name, int nlen, void __user *oldval, size_t __user *oldlenp, - void __user *newval, size_t newlen, - void **context); + void __user *newval, size_t newlen); #ifdef CONFIG_PROC_FS extern int ip_misc_proc_init(void); #endif diff --git a/include/net/ip6_checksum.h b/include/net/ip6_checksum.h index 3dfc885bdf2..bc1b0fda2b0 100644 --- a/include/net/ip6_checksum.h +++ b/include/net/ip6_checksum.h @@ -34,60 +34,60 @@ #ifndef _HAVE_ARCH_IPV6_CSUM -static __inline__ unsigned short int csum_ipv6_magic(struct in6_addr *saddr, - struct in6_addr *daddr, - __u16 len, - unsigned short proto, - unsigned int csum) +static __inline__ __sum16 csum_ipv6_magic(const struct in6_addr *saddr, + const struct in6_addr *daddr, + __u32 len, unsigned short proto, + __wsum csum) { int carry; __u32 ulen; __u32 uproto; + __u32 sum = (__force u32)csum; - csum += saddr->s6_addr32[0]; - carry = (csum < saddr->s6_addr32[0]); - csum += carry; + sum += (__force u32)saddr->s6_addr32[0]; + carry = (sum < (__force u32)saddr->s6_addr32[0]); + sum += carry; - csum += saddr->s6_addr32[1]; - carry = (csum < saddr->s6_addr32[1]); - csum += carry; + sum += (__force u32)saddr->s6_addr32[1]; + carry = (sum < (__force u32)saddr->s6_addr32[1]); + sum += carry; - csum += saddr->s6_addr32[2]; - carry = (csum < saddr->s6_addr32[2]); - csum += carry; + sum += (__force u32)saddr->s6_addr32[2]; + carry = (sum < (__force u32)saddr->s6_addr32[2]); + sum += carry; - csum += saddr->s6_addr32[3]; - carry = (csum < saddr->s6_addr32[3]); - csum += carry; + sum += (__force u32)saddr->s6_addr32[3]; + carry = (sum < (__force u32)saddr->s6_addr32[3]); + sum += carry; - csum += daddr->s6_addr32[0]; - carry = (csum < daddr->s6_addr32[0]); - csum += carry; + sum += (__force u32)daddr->s6_addr32[0]; + carry = (sum < (__force u32)daddr->s6_addr32[0]); + sum += carry; - csum += daddr->s6_addr32[1]; - carry = (csum < daddr->s6_addr32[1]); - csum += carry; + sum += (__force u32)daddr->s6_addr32[1]; + carry = (sum < (__force u32)daddr->s6_addr32[1]); + sum += carry; - csum += daddr->s6_addr32[2]; - carry = (csum < daddr->s6_addr32[2]); - csum += carry; + sum += (__force u32)daddr->s6_addr32[2]; + carry = (sum < (__force u32)daddr->s6_addr32[2]); + sum += carry; - csum += daddr->s6_addr32[3]; - carry = (csum < daddr->s6_addr32[3]); - csum += carry; + sum += (__force u32)daddr->s6_addr32[3]; + carry = (sum < (__force u32)daddr->s6_addr32[3]); + sum += carry; - ulen = htonl((__u32) len); - csum += ulen; - carry = (csum < ulen); - csum += carry; + ulen = (__force u32)htonl((__u32) len); + sum += ulen; + carry = (sum < ulen); + sum += carry; - uproto = htonl(proto); - csum += uproto; - carry = (csum < uproto); - csum += carry; + uproto = (__force u32)htonl(proto); + sum += uproto; + carry = (sum < uproto); + sum += carry; - return csum_fold(csum); + return csum_fold((__force __wsum)sum); } #endif diff --git a/include/net/ip6_fib.h b/include/net/ip6_fib.h index e4438de3bd6..7be4f4e3a0f 100644 --- a/include/net/ip6_fib.h +++ b/include/net/ip6_fib.h @@ -50,9 +50,9 @@ struct fib6_node struct fib6_node *parent; struct fib6_node *left; struct fib6_node *right; - +#ifdef CONFIG_IPV6_SUBTREES struct fib6_node *subtree; - +#endif struct rt6_info *leaf; __u16 fn_bit; /* bit key */ @@ -107,6 +107,11 @@ struct rt6_info u8 rt6i_protocol; }; +static inline struct inet6_dev *ip6_dst_idev(struct dst_entry *dst) +{ + return ((struct rt6_info *)dst)->rt6i_idev; +} + struct fib6_walker_t { struct fib6_walker_t *prev, *next; diff --git a/include/net/ip6_route.h b/include/net/ip6_route.h index c14b70ed4c5..4e927ebd1cb 100644 --- a/include/net/ip6_route.h +++ b/include/net/ip6_route.h @@ -20,7 +20,7 @@ struct route_info { route_pref:2, reserved_h:3; #endif - __u32 lifetime; + __be32 lifetime; __u8 prefix[0]; /* 0,8 or 16 */ }; diff --git a/include/net/ip_fib.h b/include/net/ip_fib.h index 949b932d2f0..36c635ca1aa 100644 --- a/include/net/ip_fib.h +++ b/include/net/ip_fib.h @@ -115,7 +115,7 @@ struct fib_result { struct fib_result_nl { __be32 fl_addr; /* To be looked up*/ - u32 fl_fwmark; + u32 fl_mark; unsigned char fl_tos; unsigned char fl_scope; unsigned char tb_id_in; diff --git a/include/net/ip_mp_alg.h b/include/net/ip_mp_alg.h index beffdd66ad7..25b56571e54 100644 --- a/include/net/ip_mp_alg.h +++ b/include/net/ip_mp_alg.h @@ -88,9 +88,7 @@ static inline int multipath_comparekeys(const struct flowi *flp1, return flp1->fl4_dst == flp2->fl4_dst && flp1->fl4_src == flp2->fl4_src && flp1->oif == flp2->oif && -#ifdef CONFIG_IP_ROUTE_FWMARK - flp1->fl4_fwmark == flp2->fl4_fwmark && -#endif + flp1->mark == flp2->mark && !((flp1->fl4_tos ^ flp2->fl4_tos) & (IPTOS_RT_MASK | RTO_ONLINK)); } diff --git a/include/net/ip_vs.h b/include/net/ip_vs.h index 903108e583f..672564e5a81 100644 --- a/include/net/ip_vs.h +++ b/include/net/ip_vs.h @@ -988,14 +988,20 @@ extern int ip_vs_make_skb_writable(struct sk_buff **pskb, int len); extern void ip_vs_nat_icmp(struct sk_buff *skb, struct ip_vs_protocol *pp, struct ip_vs_conn *cp, int dir); -extern u16 ip_vs_checksum_complete(struct sk_buff *skb, int offset); +extern __sum16 ip_vs_checksum_complete(struct sk_buff *skb, int offset); -static inline u16 ip_vs_check_diff(u32 old, u32 new, u16 oldsum) +static inline __wsum ip_vs_check_diff4(__be32 old, __be32 new, __wsum oldsum) { - u32 diff[2] = { old, new }; + __be32 diff[2] = { ~old, new }; - return csum_fold(csum_partial((char *) diff, sizeof(diff), - oldsum ^ 0xFFFF)); + return csum_partial((char *) diff, sizeof(diff), oldsum); +} + +static inline __wsum ip_vs_check_diff2(__be16 old, __be16 new, __wsum oldsum) +{ + __be16 diff[2] = { ~old, new }; + + return csum_partial((char *) diff, sizeof(diff), oldsum); } #endif /* __KERNEL__ */ diff --git a/include/net/ipconfig.h b/include/net/ipconfig.h index 2a1fe996fbc..3924d7d2cb1 100644 --- a/include/net/ipconfig.h +++ b/include/net/ipconfig.h @@ -11,12 +11,12 @@ extern int ic_proto_enabled; /* Protocols enabled (see IC_xxx) */ extern int ic_set_manually; /* IPconfig parameters set manually */ -extern u32 ic_myaddr; /* My IP address */ -extern u32 ic_gateway; /* Gateway IP address */ +extern __be32 ic_myaddr; /* My IP address */ +extern __be32 ic_gateway; /* Gateway IP address */ -extern u32 ic_servaddr; /* Boot server IP address */ +extern __be32 ic_servaddr; /* Boot server IP address */ -extern u32 root_server_addr; /* Address of NFS server */ +extern __be32 root_server_addr; /* Address of NFS server */ extern u8 root_server_path[]; /* Path to mount as root */ diff --git a/include/net/ipip.h b/include/net/ipip.h index f490c3cbe37..7cdc914322f 100644 --- a/include/net/ipip.h +++ b/include/net/ipip.h @@ -35,7 +35,7 @@ struct ip_tunnel ip_send_check(iph); \ \ err = NF_HOOK(PF_INET, NF_IP_LOCAL_OUT, skb, NULL, rt->u.dst.dev, dst_output);\ - if (err == NET_XMIT_SUCCESS || err == NET_XMIT_CN) { \ + if (net_xmit_eval(err) == 0) { \ stats->tx_bytes += pkt_len; \ stats->tx_packets++; \ } else { \ @@ -44,8 +44,4 @@ struct ip_tunnel } \ } while (0) - -extern int sit_init(void); -extern void sit_cleanup(void); - #endif diff --git a/include/net/ipv6.h b/include/net/ipv6.h index 8223c4410b4..00328b71a08 100644 --- a/include/net/ipv6.h +++ b/include/net/ipv6.h @@ -95,10 +95,10 @@ */ struct frag_hdr { - unsigned char nexthdr; - unsigned char reserved; - unsigned short frag_off; - __u32 identification; + __u8 nexthdr; + __u8 reserved; + __be16 frag_off; + __be32 identification; }; #define IP6_MF 0x0001 @@ -113,9 +113,24 @@ extern int sysctl_mld_max_msf; /* MIBs */ DECLARE_SNMP_STAT(struct ipstats_mib, ipv6_statistics); -#define IP6_INC_STATS(field) SNMP_INC_STATS(ipv6_statistics, field) -#define IP6_INC_STATS_BH(field) SNMP_INC_STATS_BH(ipv6_statistics, field) -#define IP6_INC_STATS_USER(field) SNMP_INC_STATS_USER(ipv6_statistics, field) +#define IP6_INC_STATS(idev,field) ({ \ + struct inet6_dev *_idev = (idev); \ + if (likely(_idev != NULL)) \ + SNMP_INC_STATS(_idev->stats.ipv6, field); \ + SNMP_INC_STATS(ipv6_statistics, field); \ +}) +#define IP6_INC_STATS_BH(idev,field) ({ \ + struct inet6_dev *_idev = (idev); \ + if (likely(_idev != NULL)) \ + SNMP_INC_STATS_BH(_idev->stats.ipv6, field); \ + SNMP_INC_STATS_BH(ipv6_statistics, field); \ +}) +#define IP6_INC_STATS_USER(idev,field) ({ \ + struct inet6_dev *_idev = (idev); \ + if (likely(_idev != NULL)) \ + SNMP_INC_STATS_USER(_idev->stats.ipv6, field); \ + SNMP_INC_STATS_USER(ipv6_statistics, field); \ +}) DECLARE_SNMP_STAT(struct icmpv6_mib, icmpv6_statistics); #define ICMP6_INC_STATS(idev, field) ({ \ struct inet6_dev *_idev = (idev); \ @@ -143,9 +158,13 @@ DECLARE_SNMP_STAT(struct icmpv6_mib, icmpv6_statistics); SNMP_INC_STATS_OFFSET_BH(icmpv6_statistics, field, _offset); \ }) DECLARE_SNMP_STAT(struct udp_mib, udp_stats_in6); -#define UDP6_INC_STATS(field) SNMP_INC_STATS(udp_stats_in6, field) -#define UDP6_INC_STATS_BH(field) SNMP_INC_STATS_BH(udp_stats_in6, field) -#define UDP6_INC_STATS_USER(field) SNMP_INC_STATS_USER(udp_stats_in6, field) +DECLARE_SNMP_STAT(struct udp_mib, udplite_stats_in6); +#define UDP6_INC_STATS_BH(field, is_udplite) do { \ + if (is_udplite) SNMP_INC_STATS_BH(udplite_stats_in6, field); \ + else SNMP_INC_STATS_BH(udp_stats_in6, field); } while(0) +#define UDP6_INC_STATS_USER(field, is_udplite) do { \ + if (is_udplite) SNMP_INC_STATS_USER(udplite_stats_in6, field); \ + else SNMP_INC_STATS_USER(udp_stats_in6, field); } while(0) int snmp6_register_dev(struct inet6_dev *idev); int snmp6_unregister_dev(struct inet6_dev *idev); @@ -191,7 +210,7 @@ struct ipv6_txoptions struct ip6_flowlabel { struct ip6_flowlabel *next; - u32 label; + __be32 label; struct in6_addr dst; struct ipv6_txoptions *opt; atomic_t users; @@ -211,7 +230,7 @@ struct ipv6_fl_socklist struct ip6_flowlabel *fl; }; -extern struct ip6_flowlabel *fl6_sock_lookup(struct sock *sk, u32 label); +extern struct ip6_flowlabel *fl6_sock_lookup(struct sock *sk, __be32 label); extern struct ipv6_txoptions *fl6_merge_options(struct ipv6_txoptions * opt_space, struct ip6_flowlabel * fl, struct ipv6_txoptions * fopt); @@ -375,22 +394,15 @@ static inline int ipv6_addr_any(const struct in6_addr *a) */ static inline int __ipv6_addr_diff(const void *token1, const void *token2, int addrlen) { - const __u32 *a1 = token1, *a2 = token2; + const __be32 *a1 = token1, *a2 = token2; int i; addrlen >>= 2; for (i = 0; i < addrlen; i++) { - __u32 xb = a1[i] ^ a2[i]; - if (xb) { - int j = 31; - - xb = ntohl(xb); - while ((xb & (1 << j)) == 0) - j--; - - return (i * 32 + 31 - j); - } + __be32 xb = a1[i] ^ a2[i]; + if (xb) + return i * 32 + 32 - fls(ntohl(xb)); } /* @@ -544,7 +556,7 @@ extern int ip6_datagram_connect(struct sock *sk, struct sockaddr *addr, int addr_len); extern int ipv6_recv_error(struct sock *sk, struct msghdr *msg, int len); -extern void ipv6_icmp_error(struct sock *sk, struct sk_buff *skb, int err, u16 port, +extern void ipv6_icmp_error(struct sock *sk, struct sk_buff *skb, int err, __be16 port, u32 info, u8 *payload); extern void ipv6_local_error(struct sock *sk, int err, struct flowi *fl, u32 info); @@ -589,6 +601,8 @@ extern int tcp6_proc_init(void); extern void tcp6_proc_exit(void); extern int udp6_proc_init(void); extern void udp6_proc_exit(void); +extern int udplite6_proc_init(void); +extern void udplite6_proc_exit(void); extern int ipv6_misc_proc_init(void); extern void ipv6_misc_proc_exit(void); diff --git a/include/net/irda/ircomm_tty.h b/include/net/irda/ircomm_tty.h index 87699cb4ef8..8dabdd603fe 100644 --- a/include/net/irda/ircomm_tty.h +++ b/include/net/irda/ircomm_tty.h @@ -126,7 +126,7 @@ extern int ircomm_tty_tiocmset(struct tty_struct *tty, struct file *file, extern int ircomm_tty_ioctl(struct tty_struct *tty, struct file *file, unsigned int cmd, unsigned long arg); extern void ircomm_tty_set_termios(struct tty_struct *tty, - struct termios *old_termios); + struct ktermios *old_termios); extern hashbin_t *ircomm_tty; #endif diff --git a/include/net/irda/irlan_filter.h b/include/net/irda/irlan_filter.h index 492dedaa8ac..1720539ac2c 100644 --- a/include/net/irda/irlan_filter.h +++ b/include/net/irda/irlan_filter.h @@ -28,6 +28,8 @@ void irlan_check_command_param(struct irlan_cb *self, char *param, char *value); void irlan_filter_request(struct irlan_cb *self, struct sk_buff *skb); +#ifdef CONFIG_PROC_FS void irlan_print_filter(struct seq_file *seq, int filter_type); +#endif #endif /* IRLAN_FILTER_H */ diff --git a/include/net/irda/irlap_frame.h b/include/net/irda/irlap_frame.h index 9dd54a5002b..641f88e848b 100644 --- a/include/net/irda/irlap_frame.h +++ b/include/net/irda/irlap_frame.h @@ -91,8 +91,8 @@ struct xid_frame { __u8 caddr; /* Connection address */ __u8 control; __u8 ident; /* Should always be XID_FORMAT */ - __u32 saddr; /* Source device address */ - __u32 daddr; /* Destination device address */ + __le32 saddr; /* Source device address */ + __le32 daddr; /* Destination device address */ __u8 flags; /* Discovery flags */ __u8 slotnr; __u8 version; @@ -101,15 +101,15 @@ struct xid_frame { struct test_frame { __u8 caddr; /* Connection address */ __u8 control; - __u32 saddr; /* Source device address */ - __u32 daddr; /* Destination device address */ + __le32 saddr; /* Source device address */ + __le32 daddr; /* Destination device address */ } IRDA_PACK; struct ua_frame { __u8 caddr; __u8 control; - __u32 saddr; /* Source device address */ - __u32 daddr; /* Dest device address */ + __le32 saddr; /* Source device address */ + __le32 daddr; /* Dest device address */ } IRDA_PACK; struct dm_frame { @@ -135,8 +135,8 @@ struct i_frame { struct snrm_frame { __u8 caddr; __u8 control; - __u32 saddr; - __u32 daddr; + __le32 saddr; + __le32 daddr; __u8 ncaddr; } IRDA_PACK; diff --git a/include/net/irda/timer.h b/include/net/irda/timer.h index 2c5d8864ab7..cb61568547d 100644 --- a/include/net/irda/timer.h +++ b/include/net/irda/timer.h @@ -28,6 +28,7 @@ #define TIMER_H #include <linux/timer.h> +#include <linux/jiffies.h> #include <asm/param.h> /* for HZ */ diff --git a/include/net/llc_pdu.h b/include/net/llc_pdu.h index 8f6306581fa..aa33a477c3f 100644 --- a/include/net/llc_pdu.h +++ b/include/net/llc_pdu.h @@ -252,9 +252,9 @@ static inline void llc_pdu_header_init(struct sk_buff *skb, u8 type, */ static inline void llc_pdu_decode_sa(struct sk_buff *skb, u8 *sa) { - if (skb->protocol == ntohs(ETH_P_802_2)) + if (skb->protocol == htons(ETH_P_802_2)) memcpy(sa, eth_hdr(skb)->h_source, ETH_ALEN); - else if (skb->protocol == ntohs(ETH_P_TR_802_2)) { + else if (skb->protocol == htons(ETH_P_TR_802_2)) { memcpy(sa, tr_hdr(skb)->saddr, ETH_ALEN); *sa &= 0x7F; } @@ -269,9 +269,9 @@ static inline void llc_pdu_decode_sa(struct sk_buff *skb, u8 *sa) */ static inline void llc_pdu_decode_da(struct sk_buff *skb, u8 *da) { - if (skb->protocol == ntohs(ETH_P_802_2)) + if (skb->protocol == htons(ETH_P_802_2)) memcpy(da, eth_hdr(skb)->h_dest, ETH_ALEN); - else if (skb->protocol == ntohs(ETH_P_TR_802_2)) + else if (skb->protocol == htons(ETH_P_TR_802_2)) memcpy(da, tr_hdr(skb)->daddr, ETH_ALEN); } @@ -345,7 +345,7 @@ static inline void llc_pdu_init_as_test_rsp(struct sk_buff *skb, pdu->ctrl_1 = LLC_PDU_TYPE_U; pdu->ctrl_1 |= LLC_1_PDU_CMD_TEST; pdu->ctrl_1 |= LLC_U_PF_BIT_MASK; - if (ev_skb->protocol == ntohs(ETH_P_802_2)) { + if (ev_skb->protocol == htons(ETH_P_802_2)) { struct llc_pdu_un *ev_pdu = llc_pdu_un_hdr(ev_skb); int dsize; diff --git a/include/net/ndisc.h b/include/net/ndisc.h index d3915dabe6d..475b10c575b 100644 --- a/include/net/ndisc.h +++ b/include/net/ndisc.h @@ -66,8 +66,8 @@ struct rs_msg { struct ra_msg { struct icmp6hdr icmph; - __u32 reachable_time; - __u32 retrans_timer; + __be32 reachable_time; + __be32 retrans_timer; }; struct nd_opt_hdr { diff --git a/include/net/neighbour.h b/include/net/neighbour.h index c8aacbd2e33..3725b93c52f 100644 --- a/include/net/neighbour.h +++ b/include/net/neighbour.h @@ -160,7 +160,7 @@ struct neigh_table atomic_t entries; rwlock_t lock; unsigned long last_rand; - kmem_cache_t *kmem_cachep; + struct kmem_cache *kmem_cachep; struct neigh_statistics *stats; struct neighbour **hash_buckets; unsigned int hash_mask; @@ -309,6 +309,24 @@ static inline int neigh_event_send(struct neighbour *neigh, struct sk_buff *skb) return 0; } +static inline int neigh_hh_output(struct hh_cache *hh, struct sk_buff *skb) +{ + unsigned seq; + int hh_len; + + do { + int hh_alen; + + seq = read_seqbegin(&hh->hh_lock); + hh_len = hh->hh_len; + hh_alen = HH_DATA_ALIGN(hh_len); + memcpy(skb->data - hh_alen, hh->hh_data, hh_alen); + } while (read_seqretry(&hh->hh_lock, seq)); + + skb_push(skb, hh_len); + return hh->hh_output(skb); +} + static inline struct neighbour * __neigh_lookup(struct neigh_table *tbl, const void *pkey, struct net_device *dev, int creat) { diff --git a/include/net/netfilter/ipv4/nf_conntrack_ipv4.h b/include/net/netfilter/ipv4/nf_conntrack_ipv4.h index 91684436af8..1401ccc051c 100644 --- a/include/net/netfilter/ipv4/nf_conntrack_ipv4.h +++ b/include/net/netfilter/ipv4/nf_conntrack_ipv4.h @@ -9,32 +9,35 @@ #ifndef _NF_CONNTRACK_IPV4_H #define _NF_CONNTRACK_IPV4_H -#ifdef CONFIG_IP_NF_NAT_NEEDED -#include <linux/netfilter_ipv4/ip_nat.h> +#ifdef CONFIG_NF_NAT_NEEDED +#include <net/netfilter/nf_nat.h> +#include <linux/netfilter/nf_conntrack_pptp.h> /* per conntrack: nat application helper private data */ -union ip_conntrack_nat_help { +union nf_conntrack_nat_help { /* insert nat helper private data here */ + struct nf_nat_pptp nat_pptp_info; }; -struct nf_conntrack_ipv4_nat { - struct ip_nat_info info; - union ip_conntrack_nat_help help; +struct nf_conn_nat { + struct nf_nat_info info; + union nf_conntrack_nat_help help; #if defined(CONFIG_IP_NF_TARGET_MASQUERADE) || \ defined(CONFIG_IP_NF_TARGET_MASQUERADE_MODULE) int masq_index; #endif }; -#endif /* CONFIG_IP_NF_NAT_NEEDED */ - -struct nf_conntrack_ipv4 { -#ifdef CONFIG_IP_NF_NAT_NEEDED - struct nf_conntrack_ipv4_nat *nat; -#endif -}; +#endif /* CONFIG_NF_NAT_NEEDED */ /* Returns new sk_buff, or NULL */ struct sk_buff * nf_ct_ipv4_ct_gather_frags(struct sk_buff *skb); +extern struct nf_conntrack_l4proto nf_conntrack_l4proto_tcp4; +extern struct nf_conntrack_l4proto nf_conntrack_l4proto_udp4; +extern struct nf_conntrack_l4proto nf_conntrack_l4proto_icmp; + +extern int nf_conntrack_ipv4_compat_init(void); +extern void nf_conntrack_ipv4_compat_fini(void); + #endif /*_NF_CONNTRACK_IPV4_H*/ diff --git a/include/net/netfilter/ipv6/nf_conntrack_ipv6.h b/include/net/netfilter/ipv6/nf_conntrack_ipv6.h new file mode 100644 index 00000000000..b4b6049e01f --- /dev/null +++ b/include/net/netfilter/ipv6/nf_conntrack_ipv6.h @@ -0,0 +1,25 @@ +#ifndef _NF_CONNTRACK_IPV6_H +#define _NF_CONNTRACK_IPV6_H + +extern struct nf_conntrack_l3proto nf_conntrack_l3proto_ipv6; + +extern struct nf_conntrack_l4proto nf_conntrack_l4proto_tcp6; +extern struct nf_conntrack_l4proto nf_conntrack_l4proto_udp6; +extern struct nf_conntrack_l4proto nf_conntrack_l4proto_icmpv6; + +extern int nf_ct_ipv6_skip_exthdr(struct sk_buff *skb, int start, + u8 *nexthdrp, int len); + +extern int nf_ct_frag6_init(void); +extern void nf_ct_frag6_cleanup(void); +extern struct sk_buff *nf_ct_frag6_gather(struct sk_buff *skb); +extern void nf_ct_frag6_output(unsigned int hooknum, struct sk_buff *skb, + struct net_device *in, + struct net_device *out, + int (*okfn)(struct sk_buff *)); + +extern unsigned int nf_ct_frag6_timeout; +extern unsigned int nf_ct_frag6_low_thresh; +extern unsigned int nf_ct_frag6_high_thresh; + +#endif /* _NF_CONNTRACK_IPV6_H*/ diff --git a/include/net/netfilter/nf_conntrack.h b/include/net/netfilter/nf_conntrack.h index 1fbd8193d5f..bd01b4633ee 100644 --- a/include/net/netfilter/nf_conntrack.h +++ b/include/net/netfilter/nf_conntrack.h @@ -21,6 +21,7 @@ #include <linux/netfilter/nf_conntrack_tcp.h> #include <linux/netfilter/nf_conntrack_sctp.h> +#include <linux/netfilter/nf_conntrack_proto_gre.h> #include <net/netfilter/ipv4/nf_conntrack_icmp.h> #include <net/netfilter/ipv6/nf_conntrack_icmpv6.h> @@ -33,6 +34,7 @@ union nf_conntrack_proto { struct ip_ct_tcp tcp; struct ip_ct_icmp icmp; struct nf_ct_icmpv6 icmpv6; + struct nf_ct_gre gre; }; union nf_conntrack_expect_proto { @@ -41,15 +43,20 @@ union nf_conntrack_expect_proto { /* Add protocol helper include file here */ #include <linux/netfilter/nf_conntrack_ftp.h> +#include <linux/netfilter/nf_conntrack_pptp.h> +#include <linux/netfilter/nf_conntrack_h323.h> /* per conntrack: application helper private data */ union nf_conntrack_help { /* insert conntrack helper private data (master) here */ - struct ip_ct_ftp_master ct_ftp_info; + struct nf_ct_ftp_master ct_ftp_info; + struct nf_ct_pptp_master ct_pptp_info; + struct nf_ct_h323_master ct_h323_info; }; #include <linux/types.h> #include <linux/skbuff.h> +#include <linux/timer.h> #ifdef CONFIG_NETFILTER_DEBUG #define NF_CT_ASSERT(x) \ @@ -79,6 +86,8 @@ struct nf_conn_help { #include <net/netfilter/ipv4/nf_conntrack_ipv4.h> +#include <net/netfilter/ipv6/nf_conntrack_ipv6.h> + struct nf_conn { /* Usage count in here is 1 for hash table/destruct timer, 1 per skb, @@ -124,44 +133,6 @@ struct nf_conn char data[0]; }; -struct nf_conntrack_expect -{ - /* Internal linked list (global expectation list) */ - struct list_head list; - - /* We expect this tuple, with the following mask */ - struct nf_conntrack_tuple tuple, mask; - - /* Function to call after setup and insertion */ - void (*expectfn)(struct nf_conn *new, - struct nf_conntrack_expect *this); - - /* The conntrack of the master connection */ - struct nf_conn *master; - - /* Timer function; deletes the expectation. */ - struct timer_list timeout; - - /* Usage count. */ - atomic_t use; - - /* Unique ID */ - unsigned int id; - - /* Flags */ - unsigned int flags; - -#ifdef CONFIG_NF_NAT_NEEDED - /* This is the original per-proto part, used to map the - * expected connection the way the recipient expects. */ - union nf_conntrack_manip_proto saved_proto; - /* Direction relative to the master connection. */ - enum ip_conntrack_dir dir; -#endif -}; - -#define NF_CT_EXPECT_PERMANENT 0x1 - static inline struct nf_conn * nf_ct_tuplehash_to_ctrack(const struct nf_conntrack_tuple_hash *hash) { @@ -208,16 +179,6 @@ __nf_conntrack_find(const struct nf_conntrack_tuple *tuple, extern void nf_conntrack_hash_insert(struct nf_conn *ct); -extern struct nf_conntrack_expect * -__nf_conntrack_expect_find(const struct nf_conntrack_tuple *tuple); - -extern struct nf_conntrack_expect * -nf_conntrack_expect_find(const struct nf_conntrack_tuple *tuple); - -extern void nf_ct_unlink_expect(struct nf_conntrack_expect *exp); - -extern void nf_ct_remove_expectations(struct nf_conn *ct); - extern void nf_conntrack_flush(void); extern struct nf_conntrack_helper * @@ -289,89 +250,12 @@ static inline int nf_ct_is_dying(struct nf_conn *ct) extern unsigned int nf_conntrack_htable_size; extern int nf_conntrack_checksum; +extern atomic_t nf_conntrack_count; +extern int nf_conntrack_max; +DECLARE_PER_CPU(struct ip_conntrack_stat, nf_conntrack_stat); #define NF_CT_STAT_INC(count) (__get_cpu_var(nf_conntrack_stat).count++) -#ifdef CONFIG_NF_CONNTRACK_EVENTS -#include <linux/notifier.h> -#include <linux/interrupt.h> - -struct nf_conntrack_ecache { - struct nf_conn *ct; - unsigned int events; -}; -DECLARE_PER_CPU(struct nf_conntrack_ecache, nf_conntrack_ecache); - -#define CONNTRACK_ECACHE(x) (__get_cpu_var(nf_conntrack_ecache).x) - -extern struct atomic_notifier_head nf_conntrack_chain; -extern struct atomic_notifier_head nf_conntrack_expect_chain; - -static inline int nf_conntrack_register_notifier(struct notifier_block *nb) -{ - return atomic_notifier_chain_register(&nf_conntrack_chain, nb); -} - -static inline int nf_conntrack_unregister_notifier(struct notifier_block *nb) -{ - return atomic_notifier_chain_unregister(&nf_conntrack_chain, nb); -} - -static inline int -nf_conntrack_expect_register_notifier(struct notifier_block *nb) -{ - return atomic_notifier_chain_register(&nf_conntrack_expect_chain, nb); -} - -static inline int -nf_conntrack_expect_unregister_notifier(struct notifier_block *nb) -{ - return atomic_notifier_chain_unregister(&nf_conntrack_expect_chain, - nb); -} - -extern void nf_ct_deliver_cached_events(const struct nf_conn *ct); -extern void __nf_ct_event_cache_init(struct nf_conn *ct); - -static inline void -nf_conntrack_event_cache(enum ip_conntrack_events event, - const struct sk_buff *skb) -{ - struct nf_conn *ct = (struct nf_conn *)skb->nfct; - struct nf_conntrack_ecache *ecache; - - local_bh_disable(); - ecache = &__get_cpu_var(nf_conntrack_ecache); - if (ct != ecache->ct) - __nf_ct_event_cache_init(ct); - ecache->events |= event; - local_bh_enable(); -} - -static inline void nf_conntrack_event(enum ip_conntrack_events event, - struct nf_conn *ct) -{ - if (nf_ct_is_confirmed(ct) && !nf_ct_is_dying(ct)) - atomic_notifier_call_chain(&nf_conntrack_chain, event, ct); -} - -static inline void -nf_conntrack_expect_event(enum ip_conntrack_expect_events event, - struct nf_conntrack_expect *exp) -{ - atomic_notifier_call_chain(&nf_conntrack_expect_chain, event, exp); -} -#else /* CONFIG_NF_CONNTRACK_EVENTS */ -static inline void nf_conntrack_event_cache(enum ip_conntrack_events event, - const struct sk_buff *skb) {} -static inline void nf_conntrack_event(enum ip_conntrack_events event, - struct nf_conn *ct) {} -static inline void nf_ct_deliver_cached_events(const struct nf_conn *ct) {} -static inline void -nf_conntrack_expect_event(enum ip_conntrack_expect_events event, - struct nf_conntrack_expect *exp) {} -#endif /* CONFIG_NF_CONNTRACK_EVENTS */ - /* no helper, no nat */ #define NF_CT_F_BASIC 0 /* for helper */ @@ -387,17 +271,45 @@ nf_conntrack_unregister_cache(u_int32_t features); /* valid combinations: * basic: nf_conn, nf_conn .. nf_conn_help - * nat: nf_conn .. nf_conn_nat, nf_conn .. nf_conn_nat, nf_conn help + * nat: nf_conn .. nf_conn_nat, nf_conn .. nf_conn_nat .. nf_conn help */ +#ifdef CONFIG_NF_NAT_NEEDED +static inline struct nf_conn_nat *nfct_nat(const struct nf_conn *ct) +{ + unsigned int offset = sizeof(struct nf_conn); + + if (!(ct->features & NF_CT_F_NAT)) + return NULL; + + offset = ALIGN(offset, __alignof__(struct nf_conn_nat)); + return (struct nf_conn_nat *) ((void *)ct + offset); +} + static inline struct nf_conn_help *nfct_help(const struct nf_conn *ct) { unsigned int offset = sizeof(struct nf_conn); if (!(ct->features & NF_CT_F_HELP)) return NULL; + if (ct->features & NF_CT_F_NAT) { + offset = ALIGN(offset, __alignof__(struct nf_conn_nat)); + offset += sizeof(struct nf_conn_nat); + } + offset = ALIGN(offset, __alignof__(struct nf_conn_help)); return (struct nf_conn_help *) ((void *)ct + offset); } +#else /* No NAT */ +static inline struct nf_conn_help *nfct_help(const struct nf_conn *ct) +{ + unsigned int offset = sizeof(struct nf_conn); + + if (!(ct->features & NF_CT_F_HELP)) + return NULL; + offset = ALIGN(offset, __alignof__(struct nf_conn_help)); + return (struct nf_conn_help *) ((void *)ct + offset); +} +#endif /* CONFIG_NF_NAT_NEEDED */ #endif /* __KERNEL__ */ #endif /* _NF_CONNTRACK_H */ diff --git a/include/net/netfilter/nf_conntrack_compat.h b/include/net/netfilter/nf_conntrack_compat.h index f1b1482d720..b9ce5c80d9d 100644 --- a/include/net/netfilter/nf_conntrack_compat.h +++ b/include/net/netfilter/nf_conntrack_compat.h @@ -64,6 +64,16 @@ static inline int nf_ct_get_ctinfo(const struct sk_buff *skb, return (ct != NULL); } +static inline int nf_ct_l3proto_try_module_get(unsigned short l3proto) +{ + need_conntrack(); + return l3proto == PF_INET ? 0 : -1; +} + +static inline void nf_ct_l3proto_module_put(unsigned short l3proto) +{ +} + #else /* CONFIG_IP_NF_CONNTRACK */ #include <net/netfilter/ipv4/nf_conntrack_ipv4.h> diff --git a/include/net/netfilter/nf_conntrack_core.h b/include/net/netfilter/nf_conntrack_core.h index da254525a4c..7fdc72c0135 100644 --- a/include/net/netfilter/nf_conntrack_core.h +++ b/include/net/netfilter/nf_conntrack_core.h @@ -13,6 +13,9 @@ #define _NF_CONNTRACK_CORE_H #include <linux/netfilter.h> +#include <net/netfilter/nf_conntrack_l3proto.h> +#include <net/netfilter/nf_conntrack_l4proto.h> +#include <net/netfilter/nf_conntrack_ecache.h> /* This header is used to share core functionality between the standalone connection tracking module, and the compatibility layer's use @@ -29,7 +32,7 @@ extern struct nf_conntrack_l3proto *nf_ct_find_l3proto(u_int16_t pf); /* Like above, but you already have conntrack read lock. */ extern struct nf_conntrack_l3proto *__nf_ct_find_l3proto(u_int16_t l3proto); -struct nf_conntrack_protocol; +struct nf_conntrack_l4proto; extern int nf_ct_get_tuple(const struct sk_buff *skb, @@ -39,13 +42,13 @@ nf_ct_get_tuple(const struct sk_buff *skb, u_int8_t protonum, struct nf_conntrack_tuple *tuple, const struct nf_conntrack_l3proto *l3proto, - const struct nf_conntrack_protocol *protocol); + const struct nf_conntrack_l4proto *l4proto); extern int nf_ct_invert_tuple(struct nf_conntrack_tuple *inverse, const struct nf_conntrack_tuple *orig, const struct nf_conntrack_l3proto *l3proto, - const struct nf_conntrack_protocol *protocol); + const struct nf_conntrack_l4proto *l4proto); /* Find a connection corresponding to a tuple. */ extern struct nf_conntrack_tuple_hash * @@ -70,7 +73,14 @@ static inline int nf_conntrack_confirm(struct sk_buff **pskb) extern void __nf_conntrack_attach(struct sk_buff *nskb, struct sk_buff *skb); +int +print_tuple(struct seq_file *s, const struct nf_conntrack_tuple *tuple, + struct nf_conntrack_l3proto *l3proto, + struct nf_conntrack_l4proto *proto); + extern struct list_head *nf_conntrack_hash; extern struct list_head nf_conntrack_expect_list; extern rwlock_t nf_conntrack_lock ; +extern struct list_head unconfirmed; + #endif /* _NF_CONNTRACK_CORE_H */ diff --git a/include/net/netfilter/nf_conntrack_ecache.h b/include/net/netfilter/nf_conntrack_ecache.h new file mode 100644 index 00000000000..b62a8a9ec9d --- /dev/null +++ b/include/net/netfilter/nf_conntrack_ecache.h @@ -0,0 +1,95 @@ +/* + * connection tracking event cache. + */ + +#ifndef _NF_CONNTRACK_ECACHE_H +#define _NF_CONNTRACK_ECACHE_H +#include <net/netfilter/nf_conntrack.h> + +#include <linux/notifier.h> +#include <linux/interrupt.h> +#include <net/netfilter/nf_conntrack_expect.h> + +#ifdef CONFIG_NF_CONNTRACK_EVENTS +struct nf_conntrack_ecache { + struct nf_conn *ct; + unsigned int events; +}; +DECLARE_PER_CPU(struct nf_conntrack_ecache, nf_conntrack_ecache); + +#define CONNTRACK_ECACHE(x) (__get_cpu_var(nf_conntrack_ecache).x) + +extern struct atomic_notifier_head nf_conntrack_chain; +extern struct atomic_notifier_head nf_conntrack_expect_chain; + +static inline int nf_conntrack_register_notifier(struct notifier_block *nb) +{ + return atomic_notifier_chain_register(&nf_conntrack_chain, nb); +} + +static inline int nf_conntrack_unregister_notifier(struct notifier_block *nb) +{ + return atomic_notifier_chain_unregister(&nf_conntrack_chain, nb); +} + +static inline int +nf_conntrack_expect_register_notifier(struct notifier_block *nb) +{ + return atomic_notifier_chain_register(&nf_conntrack_expect_chain, nb); +} + +static inline int +nf_conntrack_expect_unregister_notifier(struct notifier_block *nb) +{ + return atomic_notifier_chain_unregister(&nf_conntrack_expect_chain, + nb); +} + +extern void nf_ct_deliver_cached_events(const struct nf_conn *ct); +extern void __nf_ct_event_cache_init(struct nf_conn *ct); +extern void nf_ct_event_cache_flush(void); + +static inline void +nf_conntrack_event_cache(enum ip_conntrack_events event, + const struct sk_buff *skb) +{ + struct nf_conn *ct = (struct nf_conn *)skb->nfct; + struct nf_conntrack_ecache *ecache; + + local_bh_disable(); + ecache = &__get_cpu_var(nf_conntrack_ecache); + if (ct != ecache->ct) + __nf_ct_event_cache_init(ct); + ecache->events |= event; + local_bh_enable(); +} + +static inline void nf_conntrack_event(enum ip_conntrack_events event, + struct nf_conn *ct) +{ + if (nf_ct_is_confirmed(ct) && !nf_ct_is_dying(ct)) + atomic_notifier_call_chain(&nf_conntrack_chain, event, ct); +} + +static inline void +nf_conntrack_expect_event(enum ip_conntrack_expect_events event, + struct nf_conntrack_expect *exp) +{ + atomic_notifier_call_chain(&nf_conntrack_expect_chain, event, exp); +} + +#else /* CONFIG_NF_CONNTRACK_EVENTS */ + +static inline void nf_conntrack_event_cache(enum ip_conntrack_events event, + const struct sk_buff *skb) {} +static inline void nf_conntrack_event(enum ip_conntrack_events event, + struct nf_conn *ct) {} +static inline void nf_ct_deliver_cached_events(const struct nf_conn *ct) {} +static inline void +nf_conntrack_expect_event(enum ip_conntrack_expect_events event, + struct nf_conntrack_expect *exp) {} +static inline void nf_ct_event_cache_flush(void) {} +#endif /* CONFIG_NF_CONNTRACK_EVENTS */ + +#endif /*_NF_CONNTRACK_ECACHE_H*/ + diff --git a/include/net/netfilter/nf_conntrack_expect.h b/include/net/netfilter/nf_conntrack_expect.h new file mode 100644 index 00000000000..41bcc9eb420 --- /dev/null +++ b/include/net/netfilter/nf_conntrack_expect.h @@ -0,0 +1,80 @@ +/* + * connection tracking expectations. + */ + +#ifndef _NF_CONNTRACK_EXPECT_H +#define _NF_CONNTRACK_EXPECT_H +#include <net/netfilter/nf_conntrack.h> + +extern struct list_head nf_conntrack_expect_list; +extern struct kmem_cache *nf_conntrack_expect_cachep; +extern struct file_operations exp_file_ops; + +struct nf_conntrack_expect +{ + /* Internal linked list (global expectation list) */ + struct list_head list; + + /* We expect this tuple, with the following mask */ + struct nf_conntrack_tuple tuple, mask; + + /* Function to call after setup and insertion */ + void (*expectfn)(struct nf_conn *new, + struct nf_conntrack_expect *this); + + /* Helper to assign to new connection */ + struct nf_conntrack_helper *helper; + + /* The conntrack of the master connection */ + struct nf_conn *master; + + /* Timer function; deletes the expectation. */ + struct timer_list timeout; + + /* Usage count. */ + atomic_t use; + + /* Unique ID */ + unsigned int id; + + /* Flags */ + unsigned int flags; + +#ifdef CONFIG_NF_NAT_NEEDED + __be32 saved_ip; + /* This is the original per-proto part, used to map the + * expected connection the way the recipient expects. */ + union nf_conntrack_man_proto saved_proto; + /* Direction relative to the master connection. */ + enum ip_conntrack_dir dir; +#endif +}; + +#define NF_CT_EXPECT_PERMANENT 0x1 + + +struct nf_conntrack_expect * +__nf_conntrack_expect_find(const struct nf_conntrack_tuple *tuple); + +struct nf_conntrack_expect * +nf_conntrack_expect_find_get(const struct nf_conntrack_tuple *tuple); + +struct nf_conntrack_expect * +find_expectation(const struct nf_conntrack_tuple *tuple); + +void nf_ct_unlink_expect(struct nf_conntrack_expect *exp); +void nf_ct_remove_expectations(struct nf_conn *ct); +void nf_conntrack_unexpect_related(struct nf_conntrack_expect *exp); + +/* Allocate space for an expectation: this is mandatory before calling + nf_conntrack_expect_related. You will have to call put afterwards. */ +struct nf_conntrack_expect *nf_conntrack_expect_alloc(struct nf_conn *me); +void nf_conntrack_expect_init(struct nf_conntrack_expect *, int, + union nf_conntrack_address *, + union nf_conntrack_address *, + u_int8_t, __be16 *, __be16 *); +void nf_conntrack_expect_put(struct nf_conntrack_expect *exp); +int nf_conntrack_expect_related(struct nf_conntrack_expect *expect); + +#endif /*_NF_CONNTRACK_EXPECT_H*/ + diff --git a/include/net/netfilter/nf_conntrack_helper.h b/include/net/netfilter/nf_conntrack_helper.h index 86ec8174ad0..8c72ac9f0ab 100644 --- a/include/net/netfilter/nf_conntrack_helper.h +++ b/include/net/netfilter/nf_conntrack_helper.h @@ -34,20 +34,22 @@ struct nf_conntrack_helper struct nf_conn *ct, enum ip_conntrack_info conntrackinfo); + void (*destroy)(struct nf_conn *ct); + int (*to_nfattr)(struct sk_buff *skb, const struct nf_conn *ct); }; -extern int nf_conntrack_helper_register(struct nf_conntrack_helper *); -extern void nf_conntrack_helper_unregister(struct nf_conntrack_helper *); +extern struct nf_conntrack_helper * +__nf_ct_helper_find(const struct nf_conntrack_tuple *tuple); -/* Allocate space for an expectation: this is mandatory before calling - nf_conntrack_expect_related. You will have to call put afterwards. */ -extern struct nf_conntrack_expect * -nf_conntrack_expect_alloc(struct nf_conn *master); -extern void nf_conntrack_expect_put(struct nf_conntrack_expect *exp); +extern struct nf_conntrack_helper * +nf_ct_helper_find_get( const struct nf_conntrack_tuple *tuple); -/* Add an expected connection: can have more than one per connection */ -extern int nf_conntrack_expect_related(struct nf_conntrack_expect *exp); -extern void nf_conntrack_unexpect_related(struct nf_conntrack_expect *exp); +extern struct nf_conntrack_helper * +__nf_conntrack_helper_find_byname(const char *name); + +extern void nf_ct_helper_put(struct nf_conntrack_helper *helper); +extern int nf_conntrack_helper_register(struct nf_conntrack_helper *); +extern void nf_conntrack_helper_unregister(struct nf_conntrack_helper *); #endif /*_NF_CONNTRACK_HELPER_H*/ diff --git a/include/net/netfilter/nf_conntrack_l3proto.h b/include/net/netfilter/nf_conntrack_l3proto.h index dac43b15a5b..664ddcffe00 100644 --- a/include/net/netfilter/nf_conntrack_l3proto.h +++ b/include/net/netfilter/nf_conntrack_l3proto.h @@ -18,9 +18,6 @@ struct nfattr; struct nf_conntrack_l3proto { - /* Next pointer. */ - struct list_head list; - /* L3 Protocol Family number. ex) PF_INET */ u_int16_t l3proto; @@ -78,6 +75,12 @@ struct nf_conntrack_l3proto int (*nfattr_to_tuple)(struct nfattr *tb[], struct nf_conntrack_tuple *t); +#ifdef CONFIG_SYSCTL + struct ctl_table_header *ctl_table_header; + struct ctl_table *ctl_table_path; + struct ctl_table *ctl_table; +#endif /* CONFIG_SYSCTL */ + /* Module (if any) which this is connected to. */ struct module *me; }; @@ -86,7 +89,7 @@ extern struct nf_conntrack_l3proto *nf_ct_l3protos[AF_MAX]; /* Protocol registration. */ extern int nf_conntrack_l3proto_register(struct nf_conntrack_l3proto *proto); -extern void nf_conntrack_l3proto_unregister(struct nf_conntrack_l3proto *proto); +extern int nf_conntrack_l3proto_unregister(struct nf_conntrack_l3proto *proto); extern struct nf_conntrack_l3proto * nf_ct_l3proto_find_get(u_int16_t l3proto); @@ -96,13 +99,13 @@ extern void nf_ct_l3proto_put(struct nf_conntrack_l3proto *p); /* Existing built-in protocols */ extern struct nf_conntrack_l3proto nf_conntrack_l3proto_ipv4; extern struct nf_conntrack_l3proto nf_conntrack_l3proto_ipv6; -extern struct nf_conntrack_l3proto nf_conntrack_generic_l3proto; +extern struct nf_conntrack_l3proto nf_conntrack_l3proto_generic; static inline struct nf_conntrack_l3proto * __nf_ct_l3proto_find(u_int16_t l3proto) { if (unlikely(l3proto >= AF_MAX)) - return &nf_conntrack_generic_l3proto; + return &nf_conntrack_l3proto_generic; return nf_ct_l3protos[l3proto]; } diff --git a/include/net/netfilter/nf_conntrack_protocol.h b/include/net/netfilter/nf_conntrack_l4proto.h index 1f33737fcea..fc8af08ff54 100644 --- a/include/net/netfilter/nf_conntrack_protocol.h +++ b/include/net/netfilter/nf_conntrack_l4proto.h @@ -1,5 +1,5 @@ /* - * Header for use in defining a given protocol for connection tracking. + * Header for use in defining a given L4 protocol for connection tracking. * * 16 Dec 2003: Yasuyuki Kozakai @USAGI <yasuyuki.kozakai@toshiba.co.jp> * - generalized L3 protocol dependent part. @@ -7,23 +7,20 @@ * Derived from include/linux/netfiter_ipv4/ip_conntrack_protcol.h */ -#ifndef _NF_CONNTRACK_PROTOCOL_H -#define _NF_CONNTRACK_PROTOCOL_H +#ifndef _NF_CONNTRACK_L4PROTO_H +#define _NF_CONNTRACK_L4PROTO_H #include <net/netfilter/nf_conntrack.h> struct seq_file; struct nfattr; -struct nf_conntrack_protocol +struct nf_conntrack_l4proto { - /* Next pointer. */ - struct list_head list; - /* L3 Protocol number. */ u_int16_t l3proto; - /* Protocol number. */ - u_int8_t proto; + /* L4 Protocol number. */ + u_int8_t l4proto; /* Protocol name */ const char *name; @@ -79,30 +76,40 @@ struct nf_conntrack_protocol int (*nfattr_to_tuple)(struct nfattr *tb[], struct nf_conntrack_tuple *t); +#ifdef CONFIG_SYSCTL + struct ctl_table_header **ctl_table_header; + struct ctl_table *ctl_table; + unsigned int *ctl_table_users; +#ifdef CONFIG_NF_CONNTRACK_PROC_COMPAT + struct ctl_table_header *ctl_compat_table_header; + struct ctl_table *ctl_compat_table; +#endif +#endif + /* Module (if any) which this is connected to. */ struct module *me; }; /* Existing built-in protocols */ -extern struct nf_conntrack_protocol nf_conntrack_protocol_tcp6; -extern struct nf_conntrack_protocol nf_conntrack_protocol_udp4; -extern struct nf_conntrack_protocol nf_conntrack_protocol_udp6; -extern struct nf_conntrack_protocol nf_conntrack_generic_protocol; +extern struct nf_conntrack_l4proto nf_conntrack_l4proto_tcp6; +extern struct nf_conntrack_l4proto nf_conntrack_l4proto_udp4; +extern struct nf_conntrack_l4proto nf_conntrack_l4proto_udp6; +extern struct nf_conntrack_l4proto nf_conntrack_l4proto_generic; #define MAX_NF_CT_PROTO 256 -extern struct nf_conntrack_protocol **nf_ct_protos[PF_MAX]; +extern struct nf_conntrack_l4proto **nf_ct_protos[PF_MAX]; -extern struct nf_conntrack_protocol * -__nf_ct_proto_find(u_int16_t l3proto, u_int8_t protocol); +extern struct nf_conntrack_l4proto * +__nf_ct_l4proto_find(u_int16_t l3proto, u_int8_t l4proto); -extern struct nf_conntrack_protocol * -nf_ct_proto_find_get(u_int16_t l3proto, u_int8_t protocol); +extern struct nf_conntrack_l4proto * +nf_ct_l4proto_find_get(u_int16_t l3proto, u_int8_t protocol); -extern void nf_ct_proto_put(struct nf_conntrack_protocol *p); +extern void nf_ct_l4proto_put(struct nf_conntrack_l4proto *p); /* Protocol registration. */ -extern int nf_conntrack_protocol_register(struct nf_conntrack_protocol *proto); -extern void nf_conntrack_protocol_unregister(struct nf_conntrack_protocol *proto); +extern int nf_conntrack_l4proto_register(struct nf_conntrack_l4proto *proto); +extern int nf_conntrack_l4proto_unregister(struct nf_conntrack_l4proto *proto); /* Generic netlink helpers */ extern int nf_ct_port_tuple_to_nfattr(struct sk_buff *skb, diff --git a/include/net/netfilter/nf_conntrack_tuple.h b/include/net/netfilter/nf_conntrack_tuple.h index 530ef1f7528..5d72b16e876 100644 --- a/include/net/netfilter/nf_conntrack_tuple.h +++ b/include/net/netfilter/nf_conntrack_tuple.h @@ -24,10 +24,10 @@ /* The l3 protocol-specific manipulable parts of the tuple: always in network order! */ -union nf_conntrack_man_l3proto { +union nf_conntrack_address { u_int32_t all[NF_CT_TUPLE_L3SIZE]; - u_int32_t ip; - u_int32_t ip6[4]; + __be32 ip; + __be32 ip6[4]; }; /* The protocol-specific manipulable parts of the tuple: always in @@ -38,23 +38,26 @@ union nf_conntrack_man_proto u_int16_t all; struct { - u_int16_t port; + __be16 port; } tcp; struct { - u_int16_t port; + __be16 port; } udp; struct { - u_int16_t id; + __be16 id; } icmp; struct { - u_int16_t port; + __be16 port; } sctp; + struct { + __be16 key; /* GRE key is 32bit, PPtP only uses 16bit */ + } gre; }; /* The manipulable part of the tuple. */ struct nf_conntrack_man { - union nf_conntrack_man_l3proto u3; + union nf_conntrack_address u3; union nf_conntrack_man_proto u; /* Layer 3 protocol */ u_int16_t l3num; @@ -67,27 +70,26 @@ struct nf_conntrack_tuple /* These are the parts of the tuple which are fixed. */ struct { - union { - u_int32_t all[NF_CT_TUPLE_L3SIZE]; - u_int32_t ip; - u_int32_t ip6[4]; - } u3; + union nf_conntrack_address u3; union { /* Add other protocols here. */ u_int16_t all; struct { - u_int16_t port; + __be16 port; } tcp; struct { - u_int16_t port; + __be16 port; } udp; struct { u_int8_t type, code; } icmp; struct { - u_int16_t port; + __be16 port; } sctp; + struct { + __be16 key; + } gre; } u; /* The protocol. */ diff --git a/include/net/netfilter/nf_nat.h b/include/net/netfilter/nf_nat.h new file mode 100644 index 00000000000..61c62068ca6 --- /dev/null +++ b/include/net/netfilter/nf_nat.h @@ -0,0 +1,77 @@ +#ifndef _NF_NAT_H +#define _NF_NAT_H +#include <linux/netfilter_ipv4.h> +#include <net/netfilter/nf_conntrack_tuple.h> + +#define NF_NAT_MAPPING_TYPE_MAX_NAMELEN 16 + +enum nf_nat_manip_type +{ + IP_NAT_MANIP_SRC, + IP_NAT_MANIP_DST +}; + +/* SRC manip occurs POST_ROUTING or LOCAL_IN */ +#define HOOK2MANIP(hooknum) ((hooknum) != NF_IP_POST_ROUTING && (hooknum) != NF_IP_LOCAL_IN) + +#define IP_NAT_RANGE_MAP_IPS 1 +#define IP_NAT_RANGE_PROTO_SPECIFIED 2 + +/* NAT sequence number modifications */ +struct nf_nat_seq { + /* position of the last TCP sequence number modification (if any) */ + u_int32_t correction_pos; + + /* sequence number offset before and after last modification */ + int16_t offset_before, offset_after; +}; + +/* Single range specification. */ +struct nf_nat_range +{ + /* Set to OR of flags above. */ + unsigned int flags; + + /* Inclusive: network order. */ + __be32 min_ip, max_ip; + + /* Inclusive: network order */ + union nf_conntrack_man_proto min, max; +}; + +/* For backwards compat: don't use in modern code. */ +struct nf_nat_multi_range_compat +{ + unsigned int rangesize; /* Must be 1. */ + + /* hangs off end. */ + struct nf_nat_range range[1]; +}; + +#ifdef __KERNEL__ +#include <linux/list.h> + +/* The structure embedded in the conntrack structure. */ +struct nf_nat_info +{ + struct list_head bysource; + struct nf_nat_seq seq[IP_CT_DIR_MAX]; +}; + +struct nf_conn; + +/* Set up the info structure to map into this range. */ +extern unsigned int nf_nat_setup_info(struct nf_conn *ct, + const struct nf_nat_range *range, + unsigned int hooknum); + +/* Is this tuple already taken? (not by us)*/ +extern int nf_nat_used_tuple(const struct nf_conntrack_tuple *tuple, + const struct nf_conn *ignored_conntrack); + +extern int nf_nat_module_is_loaded; + +#else /* !__KERNEL__: iptables wants this to compile. */ +#define nf_nat_multi_range nf_nat_multi_range_compat +#endif /*__KERNEL__*/ +#endif diff --git a/include/net/netfilter/nf_nat_core.h b/include/net/netfilter/nf_nat_core.h new file mode 100644 index 00000000000..9778ffa9344 --- /dev/null +++ b/include/net/netfilter/nf_nat_core.h @@ -0,0 +1,27 @@ +#ifndef _NF_NAT_CORE_H +#define _NF_NAT_CORE_H +#include <linux/list.h> +#include <net/netfilter/nf_conntrack.h> + +/* This header used to share core functionality between the standalone + NAT module, and the compatibility layer's use of NAT for masquerading. */ + +extern unsigned int nf_nat_packet(struct nf_conn *ct, + enum ip_conntrack_info ctinfo, + unsigned int hooknum, + struct sk_buff **pskb); + +extern int nf_nat_icmp_reply_translation(struct nf_conn *ct, + enum ip_conntrack_info ctinfo, + unsigned int hooknum, + struct sk_buff **pskb); + +static inline int nf_nat_initialized(struct nf_conn *ct, + enum nf_nat_manip_type manip) +{ + if (manip == IP_NAT_MANIP_SRC) + return test_bit(IPS_SRC_NAT_DONE_BIT, &ct->status); + else + return test_bit(IPS_DST_NAT_DONE_BIT, &ct->status); +} +#endif /* _NF_NAT_CORE_H */ diff --git a/include/net/netfilter/nf_nat_helper.h b/include/net/netfilter/nf_nat_helper.h new file mode 100644 index 00000000000..ec98ecf95fc --- /dev/null +++ b/include/net/netfilter/nf_nat_helper.h @@ -0,0 +1,32 @@ +#ifndef _NF_NAT_HELPER_H +#define _NF_NAT_HELPER_H +/* NAT protocol helper routines. */ + +#include <net/netfilter/nf_conntrack.h> + +struct sk_buff; + +/* These return true or false. */ +extern int nf_nat_mangle_tcp_packet(struct sk_buff **skb, + struct nf_conn *ct, + enum ip_conntrack_info ctinfo, + unsigned int match_offset, + unsigned int match_len, + const char *rep_buffer, + unsigned int rep_len); +extern int nf_nat_mangle_udp_packet(struct sk_buff **skb, + struct nf_conn *ct, + enum ip_conntrack_info ctinfo, + unsigned int match_offset, + unsigned int match_len, + const char *rep_buffer, + unsigned int rep_len); +extern int nf_nat_seq_adjust(struct sk_buff **pskb, + struct nf_conn *ct, + enum ip_conntrack_info ctinfo); + +/* Setup NAT on this expected conntrack so it follows master, but goes + * to port ct->master->saved_proto. */ +extern void nf_nat_follow_master(struct nf_conn *ct, + struct nf_conntrack_expect *this); +#endif diff --git a/include/net/netfilter/nf_nat_protocol.h b/include/net/netfilter/nf_nat_protocol.h new file mode 100644 index 00000000000..a9ec5ef6146 --- /dev/null +++ b/include/net/netfilter/nf_nat_protocol.h @@ -0,0 +1,70 @@ +/* Header for use in defining a given protocol. */ +#ifndef _NF_NAT_PROTOCOL_H +#define _NF_NAT_PROTOCOL_H +#include <net/netfilter/nf_nat.h> +#include <linux/netfilter/nfnetlink_conntrack.h> + +struct nf_nat_range; + +struct nf_nat_protocol +{ + /* Protocol name */ + const char *name; + + /* Protocol number. */ + unsigned int protonum; + + struct module *me; + + /* Translate a packet to the target according to manip type. + Return true if succeeded. */ + int (*manip_pkt)(struct sk_buff **pskb, + unsigned int iphdroff, + const struct nf_conntrack_tuple *tuple, + enum nf_nat_manip_type maniptype); + + /* Is the manipable part of the tuple between min and max incl? */ + int (*in_range)(const struct nf_conntrack_tuple *tuple, + enum nf_nat_manip_type maniptype, + const union nf_conntrack_man_proto *min, + const union nf_conntrack_man_proto *max); + + /* Alter the per-proto part of the tuple (depending on + maniptype), to give a unique tuple in the given range if + possible; return false if not. Per-protocol part of tuple + is initialized to the incoming packet. */ + int (*unique_tuple)(struct nf_conntrack_tuple *tuple, + const struct nf_nat_range *range, + enum nf_nat_manip_type maniptype, + const struct nf_conn *ct); + + int (*range_to_nfattr)(struct sk_buff *skb, + const struct nf_nat_range *range); + + int (*nfattr_to_range)(struct nfattr *tb[], + struct nf_nat_range *range); +}; + +/* Protocol registration. */ +extern int nf_nat_protocol_register(struct nf_nat_protocol *proto); +extern void nf_nat_protocol_unregister(struct nf_nat_protocol *proto); + +extern struct nf_nat_protocol *nf_nat_proto_find_get(u_int8_t protocol); +extern void nf_nat_proto_put(struct nf_nat_protocol *proto); + +/* Built-in protocols. */ +extern struct nf_nat_protocol nf_nat_protocol_tcp; +extern struct nf_nat_protocol nf_nat_protocol_udp; +extern struct nf_nat_protocol nf_nat_protocol_icmp; +extern struct nf_nat_protocol nf_nat_unknown_protocol; + +extern int init_protocols(void) __init; +extern void cleanup_protocols(void); +extern struct nf_nat_protocol *find_nat_proto(u_int16_t protonum); + +extern int nf_nat_port_range_to_nfattr(struct sk_buff *skb, + const struct nf_nat_range *range); +extern int nf_nat_port_nfattr_to_range(struct nfattr *tb[], + struct nf_nat_range *range); + +#endif /*_NF_NAT_PROTO_H*/ diff --git a/include/net/netfilter/nf_nat_rule.h b/include/net/netfilter/nf_nat_rule.h new file mode 100644 index 00000000000..f191c672bcc --- /dev/null +++ b/include/net/netfilter/nf_nat_rule.h @@ -0,0 +1,35 @@ +#ifndef _NF_NAT_RULE_H +#define _NF_NAT_RULE_H +#include <net/netfilter/nf_conntrack.h> +#include <net/netfilter/nf_nat.h> +#include <linux/netfilter_ipv4/ip_tables.h> + +/* Compatibility definitions for ipt_FOO modules */ +#define ip_nat_range nf_nat_range +#define ip_conntrack_tuple nf_conntrack_tuple +#define ip_conntrack_get nf_ct_get +#define ip_conntrack nf_conn +#define ip_nat_setup_info nf_nat_setup_info +#define ip_nat_multi_range_compat nf_nat_multi_range_compat +#define ip_ct_iterate_cleanup nf_ct_iterate_cleanup +#define IP_NF_ASSERT NF_CT_ASSERT + +extern int nf_nat_rule_init(void) __init; +extern void nf_nat_rule_cleanup(void); +extern int nf_nat_rule_find(struct sk_buff **pskb, + unsigned int hooknum, + const struct net_device *in, + const struct net_device *out, + struct nf_conn *ct, + struct nf_nat_info *info); + +extern unsigned int +alloc_null_binding(struct nf_conn *ct, + struct nf_nat_info *info, + unsigned int hooknum); + +extern unsigned int +alloc_null_binding_confirmed(struct nf_conn *ct, + struct nf_nat_info *info, + unsigned int hooknum); +#endif /* _NF_NAT_RULE_H */ diff --git a/include/net/netlabel.h b/include/net/netlabel.h index 12c214b9ead..83da7e1f0d3 100644 --- a/include/net/netlabel.h +++ b/include/net/netlabel.h @@ -111,13 +111,34 @@ struct netlbl_lsm_cache { void (*free) (const void *data); void *data; }; +/* The catmap bitmap field MUST be a power of two in length and large + * enough to hold at least 240 bits. Special care (i.e. check the code!) + * should be used when changing these values as the LSM implementation + * probably has functions which rely on the sizes of these types to speed + * processing. */ +#define NETLBL_CATMAP_MAPTYPE u64 +#define NETLBL_CATMAP_MAPCNT 4 +#define NETLBL_CATMAP_MAPSIZE (sizeof(NETLBL_CATMAP_MAPTYPE) * 8) +#define NETLBL_CATMAP_SIZE (NETLBL_CATMAP_MAPSIZE * \ + NETLBL_CATMAP_MAPCNT) +#define NETLBL_CATMAP_BIT (NETLBL_CATMAP_MAPTYPE)0x01 +struct netlbl_lsm_secattr_catmap { + u32 startbit; + NETLBL_CATMAP_MAPTYPE bitmap[NETLBL_CATMAP_MAPCNT]; + struct netlbl_lsm_secattr_catmap *next; +}; +#define NETLBL_SECATTR_NONE 0x00000000 +#define NETLBL_SECATTR_DOMAIN 0x00000001 +#define NETLBL_SECATTR_CACHE 0x00000002 +#define NETLBL_SECATTR_MLS_LVL 0x00000004 +#define NETLBL_SECATTR_MLS_CAT 0x00000008 struct netlbl_lsm_secattr { + u32 flags; + char *domain; u32 mls_lvl; - u32 mls_lvl_vld; - unsigned char *mls_cat; - size_t mls_cat_len; + struct netlbl_lsm_secattr_catmap *mls_cat; struct netlbl_lsm_cache *cache; }; @@ -165,18 +186,54 @@ static inline void netlbl_secattr_cache_free(struct netlbl_lsm_cache *cache) } /** + * netlbl_secattr_catmap_alloc - Allocate a LSM secattr catmap + * @flags: memory allocation flags + * + * Description: + * Allocate memory for a LSM secattr catmap, returns a pointer on success, NULL + * on failure. + * + */ +static inline struct netlbl_lsm_secattr_catmap *netlbl_secattr_catmap_alloc( + gfp_t flags) +{ + return kzalloc(sizeof(struct netlbl_lsm_secattr_catmap), flags); +} + +/** + * netlbl_secattr_catmap_free - Free a LSM secattr catmap + * @catmap: the category bitmap + * + * Description: + * Free a LSM secattr catmap. + * + */ +static inline void netlbl_secattr_catmap_free( + struct netlbl_lsm_secattr_catmap *catmap) +{ + struct netlbl_lsm_secattr_catmap *iter; + + do { + iter = catmap; + catmap = catmap->next; + kfree(iter); + } while (catmap); +} + +/** * netlbl_secattr_init - Initialize a netlbl_lsm_secattr struct * @secattr: the struct to initialize * * Description: - * Initialize an already allocated netlbl_lsm_secattr struct. Returns zero on - * success, negative values on error. + * Initialize an already allocated netlbl_lsm_secattr struct. * */ -static inline int netlbl_secattr_init(struct netlbl_lsm_secattr *secattr) +static inline void netlbl_secattr_init(struct netlbl_lsm_secattr *secattr) { - memset(secattr, 0, sizeof(*secattr)); - return 0; + secattr->flags = 0; + secattr->domain = NULL; + secattr->mls_cat = NULL; + secattr->cache = NULL; } /** @@ -193,7 +250,8 @@ static inline void netlbl_secattr_destroy(struct netlbl_lsm_secattr *secattr) if (secattr->cache) netlbl_secattr_cache_free(secattr->cache); kfree(secattr->domain); - kfree(secattr->mls_cat); + if (secattr->mls_cat) + netlbl_secattr_catmap_free(secattr->mls_cat); } /** @@ -205,7 +263,7 @@ static inline void netlbl_secattr_destroy(struct netlbl_lsm_secattr *secattr) * pointer on success, or NULL on failure. * */ -static inline struct netlbl_lsm_secattr *netlbl_secattr_alloc(int flags) +static inline struct netlbl_lsm_secattr *netlbl_secattr_alloc(gfp_t flags) { return kzalloc(sizeof(struct netlbl_lsm_secattr), flags); } @@ -224,6 +282,51 @@ static inline void netlbl_secattr_free(struct netlbl_lsm_secattr *secattr) kfree(secattr); } +#ifdef CONFIG_NETLABEL +int netlbl_secattr_catmap_walk(struct netlbl_lsm_secattr_catmap *catmap, + u32 offset); +int netlbl_secattr_catmap_walk_rng(struct netlbl_lsm_secattr_catmap *catmap, + u32 offset); +int netlbl_secattr_catmap_setbit(struct netlbl_lsm_secattr_catmap *catmap, + u32 bit, + gfp_t flags); +int netlbl_secattr_catmap_setrng(struct netlbl_lsm_secattr_catmap *catmap, + u32 start, + u32 end, + gfp_t flags); +#else +static inline int netlbl_secattr_catmap_walk( + struct netlbl_lsm_secattr_catmap *catmap, + u32 offset) +{ + return -ENOENT; +} + +static inline int netlbl_secattr_catmap_walk_rng( + struct netlbl_lsm_secattr_catmap *catmap, + u32 offset) +{ + return -ENOENT; +} + +static inline int netlbl_secattr_catmap_setbit( + struct netlbl_lsm_secattr_catmap *catmap, + u32 bit, + gfp_t flags) +{ + return 0; +} + +static inline int netlbl_secattr_catmap_setrng( + struct netlbl_lsm_secattr_catmap *catmap, + u32 start, + u32 end, + gfp_t flags) +{ + return 0; +} +#endif + /* * LSM protocol operations */ diff --git a/include/net/netlink.h b/include/net/netlink.h index ce5cba19c39..bcaf67b7a19 100644 --- a/include/net/netlink.h +++ b/include/net/netlink.h @@ -3,6 +3,7 @@ #include <linux/types.h> #include <linux/netlink.h> +#include <linux/jiffies.h> /* ======================================================================== * Netlink Messages and Attributes Interface (As Seen On TV) @@ -500,14 +501,15 @@ static inline struct nlmsghdr *nlmsg_put_answer(struct sk_buff *skb, /** * nlmsg_new - Allocate a new netlink message - * @size: maximum size of message + * @payload: size of the message payload * @flags: the type of memory to allocate. * - * Use NLMSG_GOODSIZE if size isn't know and you need a good default size. + * Use NLMSG_DEFAULT_SIZE if the size of the payload isn't known + * and a good default is needed. */ -static inline struct sk_buff *nlmsg_new(int size, gfp_t flags) +static inline struct sk_buff *nlmsg_new(size_t payload, gfp_t flags) { - return alloc_skb(size, flags); + return alloc_skb(nlmsg_total_size(payload), flags); } /** @@ -828,6 +830,9 @@ static inline int nla_put_msecs(struct sk_buff *skb, int attrtype, #define NLA_PUT_U16(skb, attrtype, value) \ NLA_PUT_TYPE(skb, u16, attrtype, value) +#define NLA_PUT_LE16(skb, attrtype, value) \ + NLA_PUT_TYPE(skb, __le16, attrtype, value) + #define NLA_PUT_U32(skb, attrtype, value) \ NLA_PUT_TYPE(skb, u32, attrtype, value) @@ -874,6 +879,15 @@ static inline u16 nla_get_u16(struct nlattr *nla) } /** + * nla_get_le16 - return payload of __le16 attribute + * @nla: __le16 netlink attribute + */ +static inline __le16 nla_get_le16(struct nlattr *nla) +{ + return *(__le16 *) nla_data(nla); +} + +/** * nla_get_u8 - return payload of u8 attribute * @nla: u8 netlink attribute */ diff --git a/include/net/protocol.h b/include/net/protocol.h index c643bce64e5..105bf12b0c7 100644 --- a/include/net/protocol.h +++ b/include/net/protocol.h @@ -50,7 +50,7 @@ struct inet6_protocol void (*err_handler)(struct sk_buff *skb, struct inet6_skb_parm *opt, int type, int code, int offset, - __u32 info); + __be32 info); int (*gso_send_check)(struct sk_buff *skb); struct sk_buff *(*gso_segment)(struct sk_buff *skb, @@ -71,7 +71,7 @@ struct inet_protosw { /* These two fields form the lookup key. */ unsigned short type; /* This is the 2nd argument to socket(2). */ - int protocol; /* This is the L4 protocol number. */ + unsigned short protocol; /* This is the L4 protocol number. */ struct proto *prot; const struct proto_ops *ops; diff --git a/include/net/rawv6.h b/include/net/rawv6.h index 14476a71725..af8960878ef 100644 --- a/include/net/rawv6.h +++ b/include/net/rawv6.h @@ -21,7 +21,7 @@ extern void rawv6_err(struct sock *sk, struct sk_buff *skb, struct inet6_skb_parm *opt, int type, int code, - int offset, u32 info); + int offset, __be32 info); #endif diff --git a/include/net/request_sock.h b/include/net/request_sock.h index 8e165ca16bd..7aed02ce2b6 100644 --- a/include/net/request_sock.h +++ b/include/net/request_sock.h @@ -28,14 +28,15 @@ struct proto; struct request_sock_ops { int family; - kmem_cache_t *slab; int obj_size; + struct kmem_cache *slab; int (*rtx_syn_ack)(struct sock *sk, struct request_sock *req, struct dst_entry *dst); void (*send_ack)(struct sk_buff *skb, struct request_sock *req); - void (*send_reset)(struct sk_buff *skb); + void (*send_reset)(struct sock *sk, + struct sk_buff *skb); void (*destructor)(struct request_sock *req); }; @@ -51,14 +52,15 @@ struct request_sock { u32 rcv_wnd; /* rcv_wnd offered first time */ u32 ts_recent; unsigned long expires; - struct request_sock_ops *rsk_ops; + const struct request_sock_ops *rsk_ops; struct sock *sk; u32 secid; + u32 peer_secid; }; -static inline struct request_sock *reqsk_alloc(struct request_sock_ops *ops) +static inline struct request_sock *reqsk_alloc(const struct request_sock_ops *ops) { - struct request_sock *req = kmem_cache_alloc(ops->slab, SLAB_ATOMIC); + struct request_sock *req = kmem_cache_alloc(ops->slab, GFP_ATOMIC); if (req != NULL) req->rsk_ops = ops; @@ -120,7 +122,7 @@ struct request_sock_queue { }; extern int reqsk_queue_alloc(struct request_sock_queue *queue, - const int nr_table_entries); + unsigned int nr_table_entries); static inline struct listen_sock *reqsk_queue_yank_listen_sk(struct request_sock_queue *queue) { diff --git a/include/net/rose.h b/include/net/rose.h index 012b09ed240..4c05a88b921 100644 --- a/include/net/rose.h +++ b/include/net/rose.h @@ -188,13 +188,13 @@ extern void rose_kick(struct sock *); extern void rose_enquiry_response(struct sock *); /* rose_route.c */ -extern struct rose_neigh *rose_loopback_neigh; +extern struct rose_neigh rose_loopback_neigh; extern struct file_operations rose_neigh_fops; extern struct file_operations rose_nodes_fops; extern struct file_operations rose_routes_fops; -extern int rose_add_loopback_neigh(void); -extern int rose_add_loopback_node(rose_address *); +extern void rose_add_loopback_neigh(void); +extern int __must_check rose_add_loopback_node(rose_address *); extern void rose_del_loopback_node(rose_address *); extern void rose_rt_device_down(struct net_device *); extern void rose_link_device_down(struct net_device *); diff --git a/include/net/sch_generic.h b/include/net/sch_generic.h index b0e9108a4e1..82086392735 100644 --- a/include/net/sch_generic.h +++ b/include/net/sch_generic.h @@ -60,6 +60,7 @@ struct Qdisc_class_ops int (*graft)(struct Qdisc *, unsigned long cl, struct Qdisc *, struct Qdisc **); struct Qdisc * (*leaf)(struct Qdisc *, unsigned long cl); + void (*qlen_notify)(struct Qdisc *, unsigned long); /* Class manipulation routines */ unsigned long (*get)(struct Qdisc *, u32 classid); @@ -144,7 +145,7 @@ struct tcf_proto void *root; int (*classify)(struct sk_buff*, struct tcf_proto*, struct tcf_result *); - u32 protocol; + __be16 protocol; /* All the rest */ u32 prio; @@ -172,9 +173,10 @@ extern void dev_activate(struct net_device *dev); extern void dev_deactivate(struct net_device *dev); extern void qdisc_reset(struct Qdisc *qdisc); extern void qdisc_destroy(struct Qdisc *qdisc); +extern void qdisc_tree_decrease_qlen(struct Qdisc *qdisc, unsigned int n); extern struct Qdisc *qdisc_alloc(struct net_device *dev, struct Qdisc_ops *ops); extern struct Qdisc *qdisc_create_dflt(struct net_device *dev, - struct Qdisc_ops *ops); + struct Qdisc_ops *ops, u32 parentid); static inline void tcf_destroy(struct tcf_proto *tp) diff --git a/include/net/sctp/command.h b/include/net/sctp/command.h index 807d6f1ef4b..6114c4f54b0 100644 --- a/include/net/sctp/command.h +++ b/include/net/sctp/command.h @@ -116,9 +116,11 @@ typedef enum { typedef union { __s32 i32; __u32 u32; + __be32 be32; __u16 u16; __u8 u8; int error; + __be16 err; sctp_state_t state; sctp_event_timeout_t to; unsigned long zero; @@ -164,9 +166,11 @@ SCTP_## name (type arg) \ SCTP_ARG_CONSTRUCTOR(I32, __s32, i32) SCTP_ARG_CONSTRUCTOR(U32, __u32, u32) +SCTP_ARG_CONSTRUCTOR(BE32, __be32, be32) SCTP_ARG_CONSTRUCTOR(U16, __u16, u16) SCTP_ARG_CONSTRUCTOR(U8, __u8, u8) SCTP_ARG_CONSTRUCTOR(ERROR, int, error) +SCTP_ARG_CONSTRUCTOR(PERR, __be16, err) /* protocol error */ SCTP_ARG_CONSTRUCTOR(STATE, sctp_state_t, state) SCTP_ARG_CONSTRUCTOR(TO, sctp_event_timeout_t, to) SCTP_ARG_CONSTRUCTOR(PTR, void *, ptr) diff --git a/include/net/sctp/constants.h b/include/net/sctp/constants.h index 6c632e26f72..5ddb8559986 100644 --- a/include/net/sctp/constants.h +++ b/include/net/sctp/constants.h @@ -356,7 +356,7 @@ typedef enum { * addresses. */ #define IS_IPV4_UNUSABLE_ADDRESS(a) \ - ((INADDR_BROADCAST == *a) || \ + ((htonl(INADDR_BROADCAST) == *a) || \ (MULTICAST(*a)) || \ (((unsigned char *)(a))[0] == 0) || \ ((((unsigned char *)(a))[0] == 198) && \ diff --git a/include/net/sctp/sctp.h b/include/net/sctp/sctp.h index 764e3af5be9..28af6805952 100644 --- a/include/net/sctp/sctp.h +++ b/include/net/sctp/sctp.h @@ -128,8 +128,6 @@ extern int sctp_copy_local_addr_list(struct sctp_bind_addr *, int flags); extern struct sctp_pf *sctp_get_pf_specific(sa_family_t family); extern int sctp_register_pf(struct sctp_pf *, sa_family_t); -int sctp_inetaddr_event(struct notifier_block *this, unsigned long ev, - void *ptr); /* * sctp/socket.c @@ -368,7 +366,7 @@ static inline void sctp_sysctl_register(void) { return; } static inline void sctp_sysctl_unregister(void) { return; } static inline int sctp_sysctl_jiffies_ms(ctl_table *table, int __user *name, int nlen, void __user *oldval, size_t __user *oldlenp, - void __user *newval, size_t newlen, void **context) { + void __user *newval, size_t newlen) { return -ENOSYS; } #endif @@ -585,7 +583,7 @@ static inline int ipver2af(__u8 ipver) } /* Convert from an address parameter type to an address family. */ -static inline int param_type2af(__u16 type) +static inline int param_type2af(__be16 type) { switch (type) { case SCTP_PARAM_IPV4_ADDRESS: diff --git a/include/net/sctp/sm.h b/include/net/sctp/sm.h index de313de4fef..3269ed1cc22 100644 --- a/include/net/sctp/sm.h +++ b/include/net/sctp/sm.h @@ -213,7 +213,7 @@ struct sctp_chunk *sctp_make_shutdown_ack(const struct sctp_association *asoc, const struct sctp_chunk *); struct sctp_chunk *sctp_make_shutdown_complete(const struct sctp_association *, const struct sctp_chunk *); -void sctp_init_cause(struct sctp_chunk *, __u16 cause, const void *, size_t); +void sctp_init_cause(struct sctp_chunk *, __be16 cause, const void *, size_t); struct sctp_chunk *sctp_make_abort(const struct sctp_association *, const struct sctp_chunk *, const size_t hint); @@ -236,14 +236,14 @@ struct sctp_chunk *sctp_make_heartbeat_ack(const struct sctp_association *, const size_t paylen); struct sctp_chunk *sctp_make_op_error(const struct sctp_association *, const struct sctp_chunk *chunk, - __u16 cause_code, + __be16 cause_code, const void *payload, size_t paylen); struct sctp_chunk *sctp_make_asconf_update_ip(struct sctp_association *, union sctp_addr *, struct sockaddr *, - int, __u16); + int, __be16); struct sctp_chunk *sctp_make_asconf_set_prim(struct sctp_association *asoc, union sctp_addr *addr); struct sctp_chunk *sctp_process_asconf(struct sctp_association *asoc, diff --git a/include/net/sctp/structs.h b/include/net/sctp/structs.h index c6d93bb0dcd..31a8e88f1a7 100644 --- a/include/net/sctp/structs.h +++ b/include/net/sctp/structs.h @@ -201,13 +201,12 @@ extern struct sctp_globals { struct sctp_bind_hashbucket *port_hashtable; /* This is the global local address list. - * We actively maintain this complete list of interfaces on - * the system by catching routing events. + * We actively maintain this complete list of addresses on + * the system by catching address add/delete events. * * It is a list of sctp_sockaddr_entry. */ struct list_head local_addr_list; - spinlock_t local_addr_lock; /* Flag to indicate if addip is enabled. */ int addip_enable; @@ -243,7 +242,6 @@ extern struct sctp_globals { #define sctp_port_alloc_lock (sctp_globals.port_alloc_lock) #define sctp_port_hashtable (sctp_globals.port_hashtable) #define sctp_local_addr_list (sctp_globals.local_addr_list) -#define sctp_local_addr_lock (sctp_globals.local_addr_lock) #define sctp_addip_enable (sctp_globals.addip_enable) #define sctp_prsctp_enable (sctp_globals.prsctp_enable) @@ -277,6 +275,7 @@ struct sctp_sock { __u16 default_flags; __u32 default_context; __u32 default_timetolive; + __u32 default_rcv_context; /* Heartbeat interval: The endpoint sends out a Heartbeat chunk to * the destination address every heartbeat interval. This value @@ -307,7 +306,7 @@ struct sctp_sock { __u8 disable_fragments; __u8 pd_mode; __u8 v4mapped; - __u32 adaption_ind; + __u32 adaptation_ind; /* Receive to here while partial delivery is in effect. */ struct sk_buff_head pd_lobby; @@ -389,7 +388,7 @@ struct sctp_cookie { /* Padding for future use */ __u8 padding; - __u32 adaption_ind; + __u32 adaptation_ind; /* This is a shim for my peer's INIT packet, followed by @@ -432,7 +431,7 @@ union sctp_params { struct sctp_ipv4addr_param *v4; struct sctp_ipv6addr_param *v6; union sctp_addr_param *addr; - struct sctp_adaption_ind_param *aind; + struct sctp_adaptation_ind_param *aind; }; /* RFC 2960. Section 3.3.5 Heartbeat. @@ -537,7 +536,7 @@ struct sctp_af { struct net_device *); void (*dst_saddr) (union sctp_addr *saddr, struct dst_entry *dst, - unsigned short port); + __be16 port); int (*cmp_addr) (const union sctp_addr *addr1, const union sctp_addr *addr2); void (*addr_copy) (union sctp_addr *dst, @@ -553,14 +552,14 @@ struct sctp_af { struct sock *sk); void (*from_addr_param) (union sctp_addr *, union sctp_addr_param *, - __u16 port, int iif); + __be16 port, int iif); int (*to_addr_param) (const union sctp_addr *, union sctp_addr_param *); int (*addr_valid) (union sctp_addr *, struct sctp_sock *, const struct sk_buff *); sctp_scope_t (*scope) (union sctp_addr *); - void (*inaddr_any) (union sctp_addr *, unsigned short); + void (*inaddr_any) (union sctp_addr *, __be16); int (*is_any) (const union sctp_addr *); int (*available) (union sctp_addr *, struct sctp_sock *); @@ -587,7 +586,7 @@ struct sctp_pf { struct sctp_sock *); int (*bind_verify) (struct sctp_sock *, union sctp_addr *); int (*send_verify) (struct sctp_sock *, union sctp_addr *); - int (*supported_addrs)(const struct sctp_sock *, __u16 *); + int (*supported_addrs)(const struct sctp_sock *, __be16 *); struct sock *(*create_accept_sk) (struct sock *sk, struct sctp_association *asoc); void (*addr_v4map) (struct sctp_sock *, union sctp_addr *); @@ -1030,7 +1029,7 @@ void sctp_inq_init(struct sctp_inq *); void sctp_inq_free(struct sctp_inq *); void sctp_inq_push(struct sctp_inq *, struct sctp_chunk *packet); struct sctp_chunk *sctp_inq_pop(struct sctp_inq *); -void sctp_inq_set_th_handler(struct sctp_inq *, void (*)(void *), void *); +void sctp_inq_set_th_handler(struct sctp_inq *, work_func_t); /* This is the structure we use to hold outbound chunks. You push * chunks in and they automatically pop out the other end as bundled @@ -1270,7 +1269,7 @@ struct sctp_endpoint { * this here so we pre-allocate this once and can re-use * on every receive. */ - __u8 digest[SCTP_SIGNATURE_SIZE]; + __u8 *digest; /* sendbuf acct. policy. */ __u32 sndbuf_policy; @@ -1314,6 +1313,13 @@ int sctp_process_init(struct sctp_association *, sctp_cid_t cid, __u32 sctp_generate_tag(const struct sctp_endpoint *); __u32 sctp_generate_tsn(const struct sctp_endpoint *); +struct sctp_inithdr_host { + __u32 init_tag; + __u32 a_rwnd; + __u16 num_outbound_streams; + __u16 num_inbound_streams; + __u32 initial_tsn; +}; /* RFC2960 * @@ -1477,14 +1483,14 @@ struct sctp_association { __u8 asconf_capable; /* Does peer support ADDIP? */ __u8 prsctp_capable; /* Can peer do PR-SCTP? */ - __u32 adaption_ind; /* Adaption Code point. */ + __u32 adaptation_ind; /* Adaptation Code point. */ /* This mask is used to disable sending the ASCONF chunk * with specified parameter to peer. */ - __u16 addip_disabled_mask; + __be16 addip_disabled_mask; - struct sctp_inithdr i; + struct sctp_inithdr_host i; int cookie_len; void *cookie; @@ -1652,6 +1658,9 @@ struct sctp_association { __u32 default_context; __u32 default_timetolive; + /* Default receive parameters */ + __u32 default_rcv_context; + /* This tracks outbound ssn for a given stream. */ struct sctp_ssnmap *ssnmap; diff --git a/include/net/sctp/tsnmap.h b/include/net/sctp/tsnmap.h index 021947da70e..70a824df6f6 100644 --- a/include/net/sctp/tsnmap.h +++ b/include/net/sctp/tsnmap.h @@ -105,7 +105,7 @@ struct sctp_tsnmap { * every SACK. Store up to SCTP_MAX_DUP_TSNS worth of * information. */ - __u32 dup_tsns[SCTP_MAX_DUP_TSNS]; + __be32 dup_tsns[SCTP_MAX_DUP_TSNS]; __u16 num_dup_tsns; /* Record gap ack block information here. */ @@ -162,7 +162,7 @@ static inline __u16 sctp_tsnmap_num_dups(struct sctp_tsnmap *map) } /* Return pointer to duplicate tsn array as needed by SACK. */ -static inline __u32 *sctp_tsnmap_get_dups(struct sctp_tsnmap *map) +static inline __be32 *sctp_tsnmap_get_dups(struct sctp_tsnmap *map) { map->num_dup_tsns = 0; return map->dup_tsns; diff --git a/include/net/sctp/ulpevent.h b/include/net/sctp/ulpevent.h index 1a4ddc1ec7d..2923e3d31a0 100644 --- a/include/net/sctp/ulpevent.h +++ b/include/net/sctp/ulpevent.h @@ -120,7 +120,7 @@ struct sctp_ulpevent *sctp_ulpevent_make_pdapi( const struct sctp_association *asoc, __u32 indication, gfp_t gfp); -struct sctp_ulpevent *sctp_ulpevent_make_adaption_indication( +struct sctp_ulpevent *sctp_ulpevent_make_adaptation_indication( const struct sctp_association *asoc, gfp_t gfp); struct sctp_ulpevent *sctp_ulpevent_make_rcvmsg(struct sctp_association *asoc, diff --git a/include/net/sctp/user.h b/include/net/sctp/user.h index 1b7aae6cdd8..67a30eb2b3a 100644 --- a/include/net/sctp/user.h +++ b/include/net/sctp/user.h @@ -75,8 +75,8 @@ enum sctp_optname { #define SCTP_SET_PEER_PRIMARY_ADDR SCTP_SET_PEER_PRIMARY_ADDR SCTP_PRIMARY_ADDR, #define SCTP_PRIMARY_ADDR SCTP_PRIMARY_ADDR - SCTP_ADAPTION_LAYER, -#define SCTP_ADAPTION_LAYER SCTP_ADAPTION_LAYER + SCTP_ADAPTATION_LAYER, +#define SCTP_ADAPTATION_LAYER SCTP_ADAPTATION_LAYER SCTP_DISABLE_FRAGMENTS, #define SCTP_DISABLE_FRAGMENTS SCTP_DISABLE_FRAGMENTS SCTP_PEER_ADDR_PARAMS, @@ -95,6 +95,8 @@ enum sctp_optname { #define SCTP_GET_PEER_ADDR_INFO SCTP_GET_PEER_ADDR_INFO SCTP_DELAYED_ACK_TIME, #define SCTP_DELAYED_ACK_TIME SCTP_DELAYED_ACK_TIME + SCTP_CONTEXT, /* Receive Context */ +#define SCTP_CONTEXT SCTP_CONTEXT /* Internal Socket Options. Some of the sctp library functions are * implemented using these socket options. @@ -329,17 +331,17 @@ struct sctp_shutdown_event { }; /* - * 5.3.1.6 SCTP_ADAPTION_INDICATION + * 5.3.1.6 SCTP_ADAPTATION_INDICATION * - * When a peer sends a Adaption Layer Indication parameter , SCTP + * When a peer sends a Adaptation Layer Indication parameter , SCTP * delivers this notification to inform the application - * that of the peers requested adaption layer. + * that of the peers requested adaptation layer. */ -struct sctp_adaption_event { +struct sctp_adaptation_event { __u16 sai_type; __u16 sai_flags; __u32 sai_length; - __u32 sai_adaption_ind; + __u32 sai_adaptation_ind; sctp_assoc_t sai_assoc_id; }; @@ -372,7 +374,7 @@ struct sctp_event_subscribe { __u8 sctp_peer_error_event; __u8 sctp_shutdown_event; __u8 sctp_partial_delivery_event; - __u8 sctp_adaption_layer_event; + __u8 sctp_adaptation_layer_event; }; /* @@ -393,7 +395,7 @@ union sctp_notification { struct sctp_remote_error sn_remote_error; struct sctp_send_failed sn_send_failed; struct sctp_shutdown_event sn_shutdown_event; - struct sctp_adaption_event sn_adaption_event; + struct sctp_adaptation_event sn_adaptation_event; struct sctp_pdapi_event sn_pdapi_event; }; @@ -410,7 +412,7 @@ enum sctp_sn_type { SCTP_REMOTE_ERROR, SCTP_SHUTDOWN_EVENT, SCTP_PARTIAL_DELIVERY_EVENT, - SCTP_ADAPTION_INDICATION, + SCTP_ADAPTATION_INDICATION, }; /* Notification error codes used to fill up the error fields in some @@ -486,13 +488,13 @@ struct sctp_prim { } __attribute__((packed, aligned(4))); /* - * 7.1.11 Set Adaption Layer Indicator (SCTP_ADAPTION_LAYER) + * 7.1.11 Set Adaptation Layer Indicator (SCTP_ADAPTATION_LAYER) * - * Requests that the local endpoint set the specified Adaption Layer + * Requests that the local endpoint set the specified Adaptation Layer * Indication parameter for all future INIT and INIT-ACK exchanges. */ -struct sctp_setadaption { - __u32 ssb_adaption_ind; +struct sctp_setadaptation { + __u32 ssb_adaptation_ind; }; /* diff --git a/include/net/sock.h b/include/net/sock.h index 9cdbae2a53a..03684e702d1 100644 --- a/include/net/sock.h +++ b/include/net/sock.h @@ -47,6 +47,7 @@ #include <linux/lockdep.h> #include <linux/netdevice.h> #include <linux/skbuff.h> /* struct sk_buff */ +#include <linux/mm.h> #include <linux/security.h> #include <linux/filter.h> @@ -570,7 +571,7 @@ struct proto { int *sysctl_rmem; int max_header; - kmem_cache_t *slab; + struct kmem_cache *slab; unsigned int obj_size; atomic_t *orphan_count; @@ -745,7 +746,32 @@ static inline int sk_stream_wmem_schedule(struct sock *sk, int size) */ #define sock_owned_by_user(sk) ((sk)->sk_lock.owner) -extern void FASTCALL(lock_sock(struct sock *sk)); +/* + * Macro so as to not evaluate some arguments when + * lockdep is not enabled. + * + * Mark both the sk_lock and the sk_lock.slock as a + * per-address-family lock class. + */ +#define sock_lock_init_class_and_name(sk, sname, skey, name, key) \ +do { \ + sk->sk_lock.owner = NULL; \ + init_waitqueue_head(&sk->sk_lock.wq); \ + spin_lock_init(&(sk)->sk_lock.slock); \ + debug_check_no_locks_freed((void *)&(sk)->sk_lock, \ + sizeof((sk)->sk_lock)); \ + lockdep_set_class_and_name(&(sk)->sk_lock.slock, \ + (skey), (sname)); \ + lockdep_init_map(&(sk)->sk_lock.dep_map, (name), (key), 0); \ +} while (0) + +extern void FASTCALL(lock_sock_nested(struct sock *sk, int subclass)); + +static inline void lock_sock(struct sock *sk) +{ + lock_sock_nested(sk, 0); +} + extern void FASTCALL(release_sock(struct sock *sk)); /* BH context may only use the following locking interface. */ @@ -948,7 +974,8 @@ static inline void sock_put(struct sock *sk) sk_free(sk); } -extern int sk_receive_skb(struct sock *sk, struct sk_buff *skb); +extern int sk_receive_skb(struct sock *sk, struct sk_buff *skb, + const int nested); /* Detach socket from process context. * Announce socket dead, detach it from wait queue and inode. @@ -1082,7 +1109,7 @@ static inline int skb_copy_to_page(struct sock *sk, char __user *from, { if (skb->ip_summed == CHECKSUM_NONE) { int err = 0; - unsigned int csum = csum_and_copy_from_user(from, + __wsum csum = csum_and_copy_from_user(from, page_address(page) + off, copy, 0, &err); if (err) diff --git a/include/net/tcp.h b/include/net/tcp.h index 7a093d0aa0f..cd8fa0c858a 100644 --- a/include/net/tcp.h +++ b/include/net/tcp.h @@ -28,6 +28,7 @@ #include <linux/percpu.h> #include <linux/skbuff.h> #include <linux/dmaengine.h> +#include <linux/crypto.h> #include <net/inet_connection_sock.h> #include <net/inet_timewait_sock.h> @@ -138,7 +139,6 @@ extern void tcp_time_wait(struct sock *sk, int state, int timeo); #define MAX_TCP_SYNCNT 127 #define TCP_SYNQ_INTERVAL (HZ/5) /* Period of SYNACK timer */ -#define TCP_SYNQ_HSIZE 512 /* Size of SYNACK hash table */ #define TCP_PAWS_24DAYS (60 * 60 * 24 * 24) #define TCP_PAWS_MSL 60 /* Per-host timestamps are invalidated @@ -162,6 +162,7 @@ extern void tcp_time_wait(struct sock *sk, int state, int timeo); #define TCPOPT_SACK_PERM 4 /* SACK Permitted */ #define TCPOPT_SACK 5 /* SACK Block */ #define TCPOPT_TIMESTAMP 8 /* Better RTT estimations/PAWS */ +#define TCPOPT_MD5SIG 19 /* MD5 Signature (RFC2385) */ /* * TCP option lengths @@ -171,6 +172,7 @@ extern void tcp_time_wait(struct sock *sk, int state, int timeo); #define TCPOLEN_WINDOW 3 #define TCPOLEN_SACK_PERM 2 #define TCPOLEN_TIMESTAMP 10 +#define TCPOLEN_MD5SIG 18 /* But this is what stacks really send out. */ #define TCPOLEN_TSTAMP_ALIGNED 12 @@ -179,6 +181,7 @@ extern void tcp_time_wait(struct sock *sk, int state, int timeo); #define TCPOLEN_SACK_BASE 2 #define TCPOLEN_SACK_BASE_ALIGNED 4 #define TCPOLEN_SACK_PERBLOCK 8 +#define TCPOLEN_MD5SIG_ALIGNED 20 /* Flags in tp->nonagle */ #define TCP_NAGLE_OFF 1 /* Nagle's algo is disabled */ @@ -241,12 +244,7 @@ static inline int before(__u32 seq1, __u32 seq2) { return (__s32)(seq1-seq2) < 0; } - -static inline int after(__u32 seq1, __u32 seq2) -{ - return (__s32)(seq2-seq1) < 0; -} - +#define after(seq2, seq1) before(seq1, seq2) /* is s2<=s1<=s3 ? */ static inline int between(__u32 seq1, __u32 seq2, __u32 seq3) @@ -300,6 +298,8 @@ extern void tcp_cleanup_rbuf(struct sock *sk, int copied); extern int tcp_twsk_unique(struct sock *sk, struct sock *sktw, void *twp); +extern void tcp_twsk_destructor(struct sock *sk); + static inline void tcp_dec_quickack_mode(struct sock *sk, const unsigned int pkts) { @@ -621,8 +621,12 @@ enum tcp_ca_event { * Interface for adding new TCP congestion control handlers */ #define TCP_CA_NAME_MAX 16 +#define TCP_CA_MAX 128 +#define TCP_CA_BUF_MAX (TCP_CA_NAME_MAX*TCP_CA_MAX) + struct tcp_congestion_ops { struct list_head list; + int non_restricted; /* initialize private data (optional) */ void (*init)(struct sock *sk); @@ -660,6 +664,9 @@ extern void tcp_init_congestion_control(struct sock *sk); extern void tcp_cleanup_congestion_control(struct sock *sk); extern int tcp_set_default_congestion_control(const char *name); extern void tcp_get_default_congestion_control(char *name); +extern void tcp_get_available_congestion_control(char *buf, size_t len); +extern void tcp_get_allowed_congestion_control(char *buf, size_t len); +extern int tcp_set_allowed_congestion_control(char *allowed); extern int tcp_set_congestion_control(struct sock *sk, const char *name); extern void tcp_slow_start(struct tcp_sock *tp); @@ -795,14 +802,14 @@ static inline void tcp_update_wl(struct tcp_sock *tp, u32 ack, u32 seq) /* * Calculate(/check) TCP checksum */ -static inline u16 tcp_v4_check(struct tcphdr *th, int len, - unsigned long saddr, unsigned long daddr, - unsigned long base) +static inline __sum16 tcp_v4_check(struct tcphdr *th, int len, + __be32 saddr, __be32 daddr, + __wsum base) { return csum_tcpudp_magic(saddr,daddr,len,IPPROTO_TCP,base); } -static inline int __tcp_checksum_complete(struct sk_buff *skb) +static inline __sum16 __tcp_checksum_complete(struct sk_buff *skb) { return __skb_checksum_complete(skb); } @@ -1058,6 +1065,114 @@ static inline void clear_all_retrans_hints(struct tcp_sock *tp){ tp->fastpath_skb_hint = NULL; } +/* MD5 Signature */ +struct crypto_hash; + +/* - key database */ +struct tcp_md5sig_key { + u8 *key; + u8 keylen; +}; + +struct tcp4_md5sig_key { + u8 *key; + u16 keylen; + __be32 addr; +}; + +struct tcp6_md5sig_key { + u8 *key; + u16 keylen; +#if 0 + u32 scope_id; /* XXX */ +#endif + struct in6_addr addr; +}; + +/* - sock block */ +struct tcp_md5sig_info { + struct tcp4_md5sig_key *keys4; +#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE) + struct tcp6_md5sig_key *keys6; + u32 entries6; + u32 alloced6; +#endif + u32 entries4; + u32 alloced4; +}; + +/* - pseudo header */ +struct tcp4_pseudohdr { + __be32 saddr; + __be32 daddr; + __u8 pad; + __u8 protocol; + __be16 len; +}; + +struct tcp6_pseudohdr { + struct in6_addr saddr; + struct in6_addr daddr; + __be32 len; + __be32 protocol; /* including padding */ +}; + +union tcp_md5sum_block { + struct tcp4_pseudohdr ip4; +#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE) + struct tcp6_pseudohdr ip6; +#endif +}; + +/* - pool: digest algorithm, hash description and scratch buffer */ +struct tcp_md5sig_pool { + struct hash_desc md5_desc; + union tcp_md5sum_block md5_blk; +}; + +#define TCP_MD5SIG_MAXKEYS (~(u32)0) /* really?! */ + +/* - functions */ +extern int tcp_v4_calc_md5_hash(char *md5_hash, + struct tcp_md5sig_key *key, + struct sock *sk, + struct dst_entry *dst, + struct request_sock *req, + struct tcphdr *th, + int protocol, int tcplen); +extern struct tcp_md5sig_key *tcp_v4_md5_lookup(struct sock *sk, + struct sock *addr_sk); + +extern int tcp_v4_md5_do_add(struct sock *sk, + __be32 addr, + u8 *newkey, + u8 newkeylen); + +extern int tcp_v4_md5_do_del(struct sock *sk, + __be32 addr); + +extern struct tcp_md5sig_pool **tcp_alloc_md5sig_pool(void); +extern void tcp_free_md5sig_pool(void); + +extern struct tcp_md5sig_pool *__tcp_get_md5sig_pool(int cpu); +extern void __tcp_put_md5sig_pool(void); + +static inline +struct tcp_md5sig_pool *tcp_get_md5sig_pool(void) +{ + int cpu = get_cpu(); + struct tcp_md5sig_pool *ret = __tcp_get_md5sig_pool(cpu); + if (!ret) + put_cpu(); + return ret; +} + +static inline void tcp_put_md5sig_pool(void) +{ + __tcp_put_md5sig_pool(); + put_cpu(); +} + /* /proc */ enum tcp_seq_states { TCP_SEQ_STATE_LISTENING, @@ -1097,6 +1212,35 @@ extern int tcp4_proc_init(void); extern void tcp4_proc_exit(void); #endif +/* TCP af-specific functions */ +struct tcp_sock_af_ops { +#ifdef CONFIG_TCP_MD5SIG + struct tcp_md5sig_key *(*md5_lookup) (struct sock *sk, + struct sock *addr_sk); + int (*calc_md5_hash) (char *location, + struct tcp_md5sig_key *md5, + struct sock *sk, + struct dst_entry *dst, + struct request_sock *req, + struct tcphdr *th, + int protocol, int len); + int (*md5_add) (struct sock *sk, + struct sock *addr_sk, + u8 *newkey, + u8 len); + int (*md5_parse) (struct sock *sk, + char __user *optval, + int optlen); +#endif +}; + +struct tcp_request_sock_ops { +#ifdef CONFIG_TCP_MD5SIG + struct tcp_md5sig_key *(*md5_lookup) (struct sock *sk, + struct request_sock *req); +#endif +}; + extern void tcp_v4_init(struct net_proto_family *ops); extern void tcp_init(void); diff --git a/include/net/timewait_sock.h b/include/net/timewait_sock.h index be293d795e3..1e1ee3253fd 100644 --- a/include/net/timewait_sock.h +++ b/include/net/timewait_sock.h @@ -15,7 +15,7 @@ #include <net/sock.h> struct timewait_sock_ops { - kmem_cache_t *twsk_slab; + struct kmem_cache *twsk_slab; unsigned int twsk_obj_size; int (*twsk_unique)(struct sock *sk, struct sock *sktw, void *twp); @@ -31,6 +31,9 @@ static inline int twsk_unique(struct sock *sk, struct sock *sktw, void *twp) static inline void twsk_destructor(struct sock *sk) { + BUG_ON(sk == NULL); + BUG_ON(sk->sk_prot == NULL); + BUG_ON(sk->sk_prot->twsk_prot == NULL); if (sk->sk_prot->twsk_prot->twsk_destructor != NULL) sk->sk_prot->twsk_prot->twsk_destructor(sk); } diff --git a/include/net/tipc/tipc_bearer.h b/include/net/tipc/tipc_bearer.h index e07136d74c2..2151a80cdf3 100644 --- a/include/net/tipc/tipc_bearer.h +++ b/include/net/tipc/tipc_bearer.h @@ -58,7 +58,7 @@ */ struct tipc_media_addr { - __u32 type; /* bearer type (network byte order) */ + __be32 type; /* bearer type (network byte order) */ union { __u8 eth_addr[6]; /* 48 bit Ethernet addr (byte array) */ #if 0 diff --git a/include/net/tipc/tipc_msg.h b/include/net/tipc/tipc_msg.h index 4d096eebc93..fb42eb7a86a 100644 --- a/include/net/tipc/tipc_msg.h +++ b/include/net/tipc/tipc_msg.h @@ -40,7 +40,7 @@ #ifdef __KERNEL__ struct tipc_msg { - u32 hdr[15]; + __be32 hdr[15]; }; diff --git a/include/net/transp_v6.h b/include/net/transp_v6.h index 61f724c1036..409da3a9a45 100644 --- a/include/net/transp_v6.h +++ b/include/net/transp_v6.h @@ -11,6 +11,7 @@ extern struct proto rawv6_prot; extern struct proto udpv6_prot; +extern struct proto udplitev6_prot; extern struct proto tcpv6_prot; struct flowi; @@ -24,6 +25,7 @@ extern void ipv6_destopt_init(void); /* transport protocols */ extern void rawv6_init(void); extern void udpv6_init(void); +extern void udplitev6_init(void); extern void tcpv6_init(void); extern int udpv6_connect(struct sock *sk, diff --git a/include/net/udp.h b/include/net/udp.h index db0c05f6754..1b921fa8147 100644 --- a/include/net/udp.h +++ b/include/net/udp.h @@ -26,9 +26,29 @@ #include <net/inet_sock.h> #include <net/sock.h> #include <net/snmp.h> +#include <net/ip.h> +#include <linux/ipv6.h> #include <linux/seq_file.h> +#include <linux/poll.h> -#define UDP_HTABLE_SIZE 128 +/** + * struct udp_skb_cb - UDP(-Lite) private variables + * + * @header: private variables used by IPv4/IPv6 + * @cscov: checksum coverage length (UDP-Lite only) + * @partial_cov: if set indicates partial csum coverage + */ +struct udp_skb_cb { + union { + struct inet_skb_parm h4; +#if defined(CONFIG_IPV6) || defined (CONFIG_IPV6_MODULE) + struct inet6_skb_parm h6; +#endif + } header; + __u16 cscov; + __u8 partial_cov; +}; +#define UDP_SKB_CB(__skb) ((struct udp_skb_cb *)((__skb)->cb)) extern struct hlist_head udp_hash[UDP_HTABLE_SIZE]; extern rwlock_t udp_hash_lock; @@ -47,6 +67,62 @@ extern struct proto udp_prot; struct sk_buff; +/* + * Generic checksumming routines for UDP(-Lite) v4 and v6 + */ +static inline __sum16 __udp_lib_checksum_complete(struct sk_buff *skb) +{ + if (! UDP_SKB_CB(skb)->partial_cov) + return __skb_checksum_complete(skb); + return csum_fold(skb_checksum(skb, 0, UDP_SKB_CB(skb)->cscov, + skb->csum)); +} + +static inline int udp_lib_checksum_complete(struct sk_buff *skb) +{ + return skb->ip_summed != CHECKSUM_UNNECESSARY && + __udp_lib_checksum_complete(skb); +} + +/** + * udp_csum_outgoing - compute UDPv4/v6 checksum over fragments + * @sk: socket we are writing to + * @skb: sk_buff containing the filled-in UDP header + * (checksum field must be zeroed out) + */ +static inline __wsum udp_csum_outgoing(struct sock *sk, struct sk_buff *skb) +{ + __wsum csum = csum_partial(skb->h.raw, sizeof(struct udphdr), 0); + + skb_queue_walk(&sk->sk_write_queue, skb) { + csum = csum_add(csum, skb->csum); + } + return csum; +} + +/* hash routines shared between UDPv4/6 and UDP-Litev4/6 */ +static inline void udp_lib_hash(struct sock *sk) +{ + BUG(); +} + +static inline void udp_lib_unhash(struct sock *sk) +{ + write_lock_bh(&udp_hash_lock); + if (sk_del_node_init(sk)) { + inet_sk(sk)->num = 0; + sock_prot_dec_use(sk->sk_prot); + } + write_unlock_bh(&udp_hash_lock); +} + +static inline void udp_lib_close(struct sock *sk, long timeout) +{ + sk_common_release(sk); +} + + +/* net/ipv4/udp.c */ extern int udp_get_port(struct sock *sk, unsigned short snum, int (*saddr_cmp)(const struct sock *, const struct sock *)); extern void udp_err(struct sk_buff *, u32); @@ -59,23 +135,36 @@ extern int udp_ioctl(struct sock *sk, int cmd, unsigned long arg); extern int udp_disconnect(struct sock *sk, int flags); extern unsigned int udp_poll(struct file *file, struct socket *sock, poll_table *wait); +extern int udp_lib_getsockopt(struct sock *sk, int level, int optname, + char __user *optval, int __user *optlen); +extern int udp_lib_setsockopt(struct sock *sk, int level, int optname, + char __user *optval, int optlen, + int (*push_pending_frames)(struct sock *)); DECLARE_SNMP_STAT(struct udp_mib, udp_statistics); -#define UDP_INC_STATS(field) SNMP_INC_STATS(udp_statistics, field) -#define UDP_INC_STATS_BH(field) SNMP_INC_STATS_BH(udp_statistics, field) -#define UDP_INC_STATS_USER(field) SNMP_INC_STATS_USER(udp_statistics, field) +/* + * SNMP statistics for UDP and UDP-Lite + */ +#define UDP_INC_STATS_USER(field, is_udplite) do { \ + if (is_udplite) SNMP_INC_STATS_USER(udplite_statistics, field); \ + else SNMP_INC_STATS_USER(udp_statistics, field); } while(0) +#define UDP_INC_STATS_BH(field, is_udplite) do { \ + if (is_udplite) SNMP_INC_STATS_BH(udplite_statistics, field); \ + else SNMP_INC_STATS_BH(udp_statistics, field); } while(0) /* /proc */ struct udp_seq_afinfo { struct module *owner; char *name; sa_family_t family; + struct hlist_head *hashtable; int (*seq_show) (struct seq_file *m, void *v); struct file_operations *seq_fops; }; struct udp_iter_state { sa_family_t family; + struct hlist_head *hashtable; int bucket; struct seq_operations seq_ops; }; diff --git a/include/net/udplite.h b/include/net/udplite.h new file mode 100644 index 00000000000..67ac5142430 --- /dev/null +++ b/include/net/udplite.h @@ -0,0 +1,151 @@ +/* + * Definitions for the UDP-Lite (RFC 3828) code. + */ +#ifndef _UDPLITE_H +#define _UDPLITE_H + +#include <net/ip6_checksum.h> + +/* UDP-Lite socket options */ +#define UDPLITE_SEND_CSCOV 10 /* sender partial coverage (as sent) */ +#define UDPLITE_RECV_CSCOV 11 /* receiver partial coverage (threshold ) */ + +extern struct proto udplite_prot; +extern struct hlist_head udplite_hash[UDP_HTABLE_SIZE]; + +/* UDP-Lite does not have a standardized MIB yet, so we inherit from UDP */ +DECLARE_SNMP_STAT(struct udp_mib, udplite_statistics); + +/* + * Checksum computation is all in software, hence simpler getfrag. + */ +static __inline__ int udplite_getfrag(void *from, char *to, int offset, + int len, int odd, struct sk_buff *skb) +{ + return memcpy_fromiovecend(to, (struct iovec *) from, offset, len); +} + +/* Designate sk as UDP-Lite socket */ +static inline int udplite_sk_init(struct sock *sk) +{ + udp_sk(sk)->pcflag = UDPLITE_BIT; + return 0; +} + +/* + * Checksumming routines + */ +static inline int udplite_checksum_init(struct sk_buff *skb, struct udphdr *uh) +{ + u16 cscov; + + /* In UDPv4 a zero checksum means that the transmitter generated no + * checksum. UDP-Lite (like IPv6) mandates checksums, hence packets + * with a zero checksum field are illegal. */ + if (uh->check == 0) { + LIMIT_NETDEBUG(KERN_DEBUG "UDPLITE: zeroed checksum field\n"); + return 1; + } + + UDP_SKB_CB(skb)->partial_cov = 0; + cscov = ntohs(uh->len); + + if (cscov == 0) /* Indicates that full coverage is required. */ + cscov = skb->len; + else if (cscov < 8 || cscov > skb->len) { + /* + * Coverage length violates RFC 3828: log and discard silently. + */ + LIMIT_NETDEBUG(KERN_DEBUG "UDPLITE: bad csum coverage %d/%d\n", + cscov, skb->len); + return 1; + + } else if (cscov < skb->len) + UDP_SKB_CB(skb)->partial_cov = 1; + + UDP_SKB_CB(skb)->cscov = cscov; + + /* + * There is no known NIC manufacturer supporting UDP-Lite yet, + * hence ip_summed is always (re-)set to CHECKSUM_NONE. + */ + skb->ip_summed = CHECKSUM_NONE; + + return 0; +} + +static __inline__ int udplite4_csum_init(struct sk_buff *skb, struct udphdr *uh) +{ + int rc = udplite_checksum_init(skb, uh); + + if (!rc) + skb->csum = csum_tcpudp_nofold(skb->nh.iph->saddr, + skb->nh.iph->daddr, + skb->len, IPPROTO_UDPLITE, 0); + return rc; +} + +static __inline__ int udplite6_csum_init(struct sk_buff *skb, struct udphdr *uh) +{ + int rc = udplite_checksum_init(skb, uh); + + if (!rc) + skb->csum = ~csum_unfold(csum_ipv6_magic(&skb->nh.ipv6h->saddr, + &skb->nh.ipv6h->daddr, + skb->len, IPPROTO_UDPLITE, 0)); + return rc; +} + +static inline int udplite_sender_cscov(struct udp_sock *up, struct udphdr *uh) +{ + int cscov = up->len; + + /* + * Sender has set `partial coverage' option on UDP-Lite socket + */ + if (up->pcflag & UDPLITE_SEND_CC) { + if (up->pcslen < up->len) { + /* up->pcslen == 0 means that full coverage is required, + * partial coverage only if 0 < up->pcslen < up->len */ + if (0 < up->pcslen) { + cscov = up->pcslen; + } + uh->len = htons(up->pcslen); + } + /* + * NOTE: Causes for the error case `up->pcslen > up->len': + * (i) Application error (will not be penalized). + * (ii) Payload too big for send buffer: data is split + * into several packets, each with its own header. + * In this case (e.g. last segment), coverage may + * exceed packet length. + * Since packets with coverage length > packet length are + * illegal, we fall back to the defaults here. + */ + } + return cscov; +} + +static inline __wsum udplite_csum_outgoing(struct sock *sk, struct sk_buff *skb) +{ + int off, len, cscov = udplite_sender_cscov(udp_sk(sk), skb->h.uh); + __wsum csum = 0; + + skb->ip_summed = CHECKSUM_NONE; /* no HW support for checksumming */ + + skb_queue_walk(&sk->sk_write_queue, skb) { + off = skb->h.raw - skb->data; + len = skb->len - off; + + csum = skb_checksum(skb, off, (cscov > len)? len : cscov, csum); + + if ((cscov -= len) <= 0) + break; + } + return csum; +} + +extern void udplite4_register(void); +extern int udplite_get_port(struct sock *sk, unsigned short snum, + int (*scmp)(const struct sock *, const struct sock *)); +#endif /* _UDPLITE_H */ diff --git a/include/net/x25.h b/include/net/x25.h index 0ad90ebcf86..e47fe440d9d 100644 --- a/include/net/x25.h +++ b/include/net/x25.h @@ -259,6 +259,7 @@ extern int x25_decode(struct sock *, struct sk_buff *, int *, int *, int *, int extern void x25_disconnect(struct sock *, int, unsigned char, unsigned char); /* x25_timer.c */ +extern void x25_init_timers(struct sock *sk); extern void x25_start_heartbeat(struct sock *); extern void x25_start_t2timer(struct sock *); extern void x25_start_t21timer(struct sock *); diff --git a/include/net/xfrm.h b/include/net/xfrm.h index 737fdb2ee8a..e4765413cf8 100644 --- a/include/net/xfrm.h +++ b/include/net/xfrm.h @@ -310,6 +310,8 @@ struct xfrm_tmpl /* Source address of tunnel. Ignored, if it is not a tunnel. */ xfrm_address_t saddr; + unsigned short encap_family; + __u32 reqid; /* Mode: transport, tunnel etc. */ @@ -340,18 +342,19 @@ struct xfrm_policy atomic_t refcnt; struct timer_list timer; - u8 type; u32 priority; u32 index; struct xfrm_selector selector; struct xfrm_lifetime_cfg lft; struct xfrm_lifetime_cur curlft; struct dst_entry *bundles; - __u16 family; - __u8 action; - __u8 flags; - __u8 dead; - __u8 xfrm_nr; + u16 family; + u8 type; + u8 action; + u8 flags; + u8 dead; + u8 xfrm_nr; + /* XXX 1 byte hole, try to pack */ struct xfrm_sec_ctx *security; struct xfrm_tmpl xfrm_vec[XFRM_MAX_DEPTH]; }; @@ -379,7 +382,7 @@ struct xfrm_mgr int (*notify)(struct xfrm_state *x, struct km_event *c); int (*acquire)(struct xfrm_state *x, struct xfrm_tmpl *, struct xfrm_policy *xp, int dir); struct xfrm_policy *(*compile_policy)(struct sock *sk, int opt, u8 *data, int len, int *dir); - int (*new_mapping)(struct xfrm_state *x, xfrm_address_t *ipaddr, u16 sport); + int (*new_mapping)(struct xfrm_state *x, xfrm_address_t *ipaddr, __be16 sport); int (*notify_policy)(struct xfrm_policy *x, int dir, struct km_event *c); int (*report)(u8 proto, struct xfrm_selector *sel, xfrm_address_t *addr); }; @@ -389,6 +392,20 @@ extern int xfrm_unregister_km(struct xfrm_mgr *km); extern unsigned int xfrm_policy_count[XFRM_POLICY_MAX*2]; +/* Audit Information */ +struct xfrm_audit +{ + uid_t loginuid; + u32 secid; +}; + +#ifdef CONFIG_AUDITSYSCALL +extern void xfrm_audit_log(uid_t auid, u32 secid, int type, int result, + struct xfrm_policy *xp, struct xfrm_state *x); +#else +#define xfrm_audit_log(a,s,t,r,p,x) do { ; } while (0) +#endif /* CONFIG_AUDITSYSCALL */ + static inline void xfrm_pol_hold(struct xfrm_policy *policy) { if (likely(policy != NULL)) @@ -468,6 +485,7 @@ __be16 xfrm_flowi_sport(struct flowi *fl) switch(fl->proto) { case IPPROTO_TCP: case IPPROTO_UDP: + case IPPROTO_UDPLITE: case IPPROTO_SCTP: port = fl->fl_ip_sport; break; @@ -493,6 +511,7 @@ __be16 xfrm_flowi_dport(struct flowi *fl) switch(fl->proto) { case IPPROTO_TCP: case IPPROTO_UDP: + case IPPROTO_UDPLITE: case IPPROTO_SCTP: port = fl->fl_ip_dport; break; @@ -506,40 +525,8 @@ __be16 xfrm_flowi_dport(struct flowi *fl) return port; } -static inline int -__xfrm4_selector_match(struct xfrm_selector *sel, struct flowi *fl) -{ - return addr_match(&fl->fl4_dst, &sel->daddr, sel->prefixlen_d) && - addr_match(&fl->fl4_src, &sel->saddr, sel->prefixlen_s) && - !((xfrm_flowi_dport(fl) ^ sel->dport) & sel->dport_mask) && - !((xfrm_flowi_sport(fl) ^ sel->sport) & sel->sport_mask) && - (fl->proto == sel->proto || !sel->proto) && - (fl->oif == sel->ifindex || !sel->ifindex); -} - -static inline int -__xfrm6_selector_match(struct xfrm_selector *sel, struct flowi *fl) -{ - return addr_match(&fl->fl6_dst, &sel->daddr, sel->prefixlen_d) && - addr_match(&fl->fl6_src, &sel->saddr, sel->prefixlen_s) && - !((xfrm_flowi_dport(fl) ^ sel->dport) & sel->dport_mask) && - !((xfrm_flowi_sport(fl) ^ sel->sport) & sel->sport_mask) && - (fl->proto == sel->proto || !sel->proto) && - (fl->oif == sel->ifindex || !sel->ifindex); -} - -static inline int -xfrm_selector_match(struct xfrm_selector *sel, struct flowi *fl, - unsigned short family) -{ - switch (family) { - case AF_INET: - return __xfrm4_selector_match(sel, fl); - case AF_INET6: - return __xfrm6_selector_match(sel, fl); - } - return 0; -} +extern int xfrm_selector_match(struct xfrm_selector *sel, struct flowi *fl, + unsigned short family); #ifdef CONFIG_SECURITY_NETWORK_XFRM /* If neither has a context --> match @@ -887,8 +874,7 @@ struct xfrm_tunnel { struct xfrm6_tunnel { int (*handler)(struct sk_buff *skb); int (*err_handler)(struct sk_buff *skb, struct inet6_skb_parm *opt, - int type, int code, int offset, __u32 info); - + int type, int code, int offset, __be32 info); struct xfrm6_tunnel *next; int priority; }; @@ -934,7 +920,7 @@ static inline int xfrm_state_sort(struct xfrm_state **dst, struct xfrm_state **s #endif extern struct xfrm_state *xfrm_find_acq_byseq(u32 seq); extern int xfrm_state_delete(struct xfrm_state *x); -extern void xfrm_state_flush(u8 proto); +extern void xfrm_state_flush(u8 proto, struct xfrm_audit *audit_info); extern int xfrm_replay_check(struct xfrm_state *x, __be32 seq); extern void xfrm_replay_advance(struct xfrm_state *x, __be32 seq); extern void xfrm_replay_notify(struct xfrm_state *x, int event); @@ -951,9 +937,9 @@ extern int xfrm6_input_addr(struct sk_buff *skb, xfrm_address_t *daddr, xfrm_address_t *saddr, u8 proto); extern int xfrm6_tunnel_register(struct xfrm6_tunnel *handler); extern int xfrm6_tunnel_deregister(struct xfrm6_tunnel *handler); -extern u32 xfrm6_tunnel_alloc_spi(xfrm_address_t *saddr); +extern __be32 xfrm6_tunnel_alloc_spi(xfrm_address_t *saddr); extern void xfrm6_tunnel_free_spi(xfrm_address_t *saddr); -extern u32 xfrm6_tunnel_spi_lookup(xfrm_address_t *saddr); +extern __be32 xfrm6_tunnel_spi_lookup(xfrm_address_t *saddr); extern int xfrm6_output(struct sk_buff *skb); extern int xfrm6_find_1stfragopt(struct xfrm_state *x, struct sk_buff *skb, u8 **prevhdr); @@ -987,20 +973,20 @@ struct xfrm_policy *xfrm_policy_bysel_ctx(u8 type, int dir, struct xfrm_selector *sel, struct xfrm_sec_ctx *ctx, int delete); struct xfrm_policy *xfrm_policy_byid(u8, int dir, u32 id, int delete); -void xfrm_policy_flush(u8 type); +void xfrm_policy_flush(u8 type, struct xfrm_audit *audit_info); u32 xfrm_get_acqseq(void); void xfrm_alloc_spi(struct xfrm_state *x, __be32 minspi, __be32 maxspi); -struct xfrm_state * xfrm_find_acq(u8 mode, u32 reqid, u8 proto, - xfrm_address_t *daddr, xfrm_address_t *saddr, +struct xfrm_state * xfrm_find_acq(u8 mode, u32 reqid, u8 proto, + xfrm_address_t *daddr, xfrm_address_t *saddr, int create, unsigned short family); -extern void xfrm_policy_flush(u8 type); +extern void xfrm_policy_flush(u8 type, struct xfrm_audit *audit_info); extern int xfrm_sk_policy_insert(struct sock *sk, int dir, struct xfrm_policy *pol); extern int xfrm_bundle_ok(struct xfrm_policy *pol, struct xfrm_dst *xdst, struct flowi *fl, int family, int strict); extern void xfrm_init_pmtu(struct dst_entry *dst); extern wait_queue_head_t km_waitq; -extern int km_new_mapping(struct xfrm_state *x, xfrm_address_t *ipaddr, u16 sport); +extern int km_new_mapping(struct xfrm_state *x, xfrm_address_t *ipaddr, __be16 sport); extern void km_policy_expired(struct xfrm_policy *pol, int dir, int hard, u32 pid); extern int km_report(u8 proto, struct xfrm_selector *sel, xfrm_address_t *addr); @@ -1033,7 +1019,7 @@ static inline int xfrm_addr_cmp(xfrm_address_t *a, xfrm_address_t *b, switch (family) { default: case AF_INET: - return a->a4 - b->a4; + return (__force __u32)a->a4 - (__force __u32)b->a4; case AF_INET6: return ipv6_addr_cmp((struct in6_addr *)a, (struct in6_addr *)b); diff --git a/include/pcmcia/ss.h b/include/pcmcia/ss.h index ede639812f8..623a0fc0dae 100644 --- a/include/pcmcia/ss.h +++ b/include/pcmcia/ss.h @@ -262,9 +262,10 @@ struct pcmcia_socket { u8 present:1, /* PCMCIA card is present in socket */ busy:1, /* "master" ioctl is used */ dead:1, /* pcmcia module is being unloaded */ - device_add_pending:1, /* a pseudo-multifunction-device + device_add_pending:1, /* a multifunction-device * add event is pending */ - reserved:4; + mfc_pfc:1, /* the pending event adds a mfc (1) or pfc (0) */ + reserved:3; } pcmcia_state; struct work_struct device_add; /* for adding further pseudo-multifunction diff --git a/include/rdma/ib_cm.h b/include/rdma/ib_cm.h index c9b4738be9d..5c070176d9a 100644 --- a/include/rdma/ib_cm.h +++ b/include/rdma/ib_cm.h @@ -60,6 +60,7 @@ enum ib_cm_state { }; enum ib_cm_lap_state { + IB_CM_LAP_UNINIT, IB_CM_LAP_IDLE, IB_CM_LAP_SENT, IB_CM_LAP_RCVD, @@ -443,13 +444,20 @@ int ib_send_cm_drep(struct ib_cm_id *cm_id, u8 private_data_len); /** - * ib_cm_establish - Forces a connection state to established. + * ib_cm_notify - Notifies the CM of an event reported to the consumer. * @cm_id: Connection identifier to transition to established. + * @event: Type of event. * - * This routine should be invoked by users who receive messages on a - * connected QP before an RTU has been received. + * This routine should be invoked by users to notify the CM of relevant + * communication events. Events that should be reported to the CM and + * when to report them are: + * + * IB_EVENT_COMM_EST - Used when a message is received on a connected + * QP before an RTU has been received. + * IB_EVENT_PATH_MIG - Notifies the CM that the connection has failed over + * to the alternate path. */ -int ib_cm_establish(struct ib_cm_id *cm_id); +int ib_cm_notify(struct ib_cm_id *cm_id, enum ib_event_type event); /** * ib_send_cm_rej - Sends a connection rejection message to the diff --git a/include/rdma/ib_marshall.h b/include/rdma/ib_marshall.h index 66bf4d7d0df..db037205c9e 100644 --- a/include/rdma/ib_marshall.h +++ b/include/rdma/ib_marshall.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2005 Intel Corporation. All rights reserved. + * Copyright (c) 2005-2006 Intel Corporation. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU @@ -41,6 +41,9 @@ void ib_copy_qp_attr_to_user(struct ib_uverbs_qp_attr *dst, struct ib_qp_attr *src); +void ib_copy_ah_attr_to_user(struct ib_uverbs_ah_attr *dst, + struct ib_ah_attr *src); + void ib_copy_path_rec_to_user(struct ib_user_path_rec *dst, struct ib_sa_path_rec *src); diff --git a/include/rdma/ib_user_cm.h b/include/rdma/ib_user_cm.h index 066c20b7cdf..37650afb982 100644 --- a/include/rdma/ib_user_cm.h +++ b/include/rdma/ib_user_cm.h @@ -38,7 +38,7 @@ #include <rdma/ib_user_sa.h> -#define IB_USER_CM_ABI_VERSION 4 +#define IB_USER_CM_ABI_VERSION 5 enum { IB_USER_CM_CMD_CREATE_ID, @@ -46,7 +46,7 @@ enum { IB_USER_CM_CMD_ATTR_ID, IB_USER_CM_CMD_LISTEN, - IB_USER_CM_CMD_ESTABLISH, + IB_USER_CM_CMD_NOTIFY, IB_USER_CM_CMD_SEND_REQ, IB_USER_CM_CMD_SEND_REP, @@ -117,8 +117,9 @@ struct ib_ucm_listen { __u32 reserved; }; -struct ib_ucm_establish { +struct ib_ucm_notify { __u32 id; + __u32 event; }; struct ib_ucm_private_data { diff --git a/include/rdma/ib_verbs.h b/include/rdma/ib_verbs.h index 8eacc351099..0bfa3328d68 100644 --- a/include/rdma/ib_verbs.h +++ b/include/rdma/ib_verbs.h @@ -43,6 +43,8 @@ #include <linux/types.h> #include <linux/device.h> +#include <linux/mm.h> +#include <linux/dma-mapping.h> #include <asm/atomic.h> #include <asm/scatterlist.h> @@ -848,6 +850,49 @@ struct ib_cache { u8 *lmc_cache; }; +struct ib_dma_mapping_ops { + int (*mapping_error)(struct ib_device *dev, + u64 dma_addr); + u64 (*map_single)(struct ib_device *dev, + void *ptr, size_t size, + enum dma_data_direction direction); + void (*unmap_single)(struct ib_device *dev, + u64 addr, size_t size, + enum dma_data_direction direction); + u64 (*map_page)(struct ib_device *dev, + struct page *page, unsigned long offset, + size_t size, + enum dma_data_direction direction); + void (*unmap_page)(struct ib_device *dev, + u64 addr, size_t size, + enum dma_data_direction direction); + int (*map_sg)(struct ib_device *dev, + struct scatterlist *sg, int nents, + enum dma_data_direction direction); + void (*unmap_sg)(struct ib_device *dev, + struct scatterlist *sg, int nents, + enum dma_data_direction direction); + u64 (*dma_address)(struct ib_device *dev, + struct scatterlist *sg); + unsigned int (*dma_len)(struct ib_device *dev, + struct scatterlist *sg); + void (*sync_single_for_cpu)(struct ib_device *dev, + u64 dma_handle, + size_t size, + enum dma_data_direction dir); + void (*sync_single_for_device)(struct ib_device *dev, + u64 dma_handle, + size_t size, + enum dma_data_direction dir); + void *(*alloc_coherent)(struct ib_device *dev, + size_t size, + u64 *dma_handle, + gfp_t flag); + void (*free_coherent)(struct ib_device *dev, + size_t size, void *cpu_addr, + u64 dma_handle); +}; + struct iw_cm_verbs; struct ib_device { @@ -992,6 +1037,8 @@ struct ib_device { struct ib_mad *in_mad, struct ib_mad *out_mad); + struct ib_dma_mapping_ops *dma_ops; + struct module *owner; struct class_device class_dev; struct kobject ports_parent; @@ -1395,10 +1442,231 @@ static inline int ib_req_ncomp_notif(struct ib_cq *cq, int wc_cnt) * usable for DMA. * @pd: The protection domain associated with the memory region. * @mr_access_flags: Specifies the memory access rights. + * + * Note that the ib_dma_*() functions defined below must be used + * to create/destroy addresses used with the Lkey or Rkey returned + * by ib_get_dma_mr(). */ struct ib_mr *ib_get_dma_mr(struct ib_pd *pd, int mr_access_flags); /** + * ib_dma_mapping_error - check a DMA addr for error + * @dev: The device for which the dma_addr was created + * @dma_addr: The DMA address to check + */ +static inline int ib_dma_mapping_error(struct ib_device *dev, u64 dma_addr) +{ + if (dev->dma_ops) + return dev->dma_ops->mapping_error(dev, dma_addr); + return dma_mapping_error(dma_addr); +} + +/** + * ib_dma_map_single - Map a kernel virtual address to DMA address + * @dev: The device for which the dma_addr is to be created + * @cpu_addr: The kernel virtual address + * @size: The size of the region in bytes + * @direction: The direction of the DMA + */ +static inline u64 ib_dma_map_single(struct ib_device *dev, + void *cpu_addr, size_t size, + enum dma_data_direction direction) +{ + if (dev->dma_ops) + return dev->dma_ops->map_single(dev, cpu_addr, size, direction); + return dma_map_single(dev->dma_device, cpu_addr, size, direction); +} + +/** + * ib_dma_unmap_single - Destroy a mapping created by ib_dma_map_single() + * @dev: The device for which the DMA address was created + * @addr: The DMA address + * @size: The size of the region in bytes + * @direction: The direction of the DMA + */ +static inline void ib_dma_unmap_single(struct ib_device *dev, + u64 addr, size_t size, + enum dma_data_direction direction) +{ + if (dev->dma_ops) + dev->dma_ops->unmap_single(dev, addr, size, direction); + else + dma_unmap_single(dev->dma_device, addr, size, direction); +} + +/** + * ib_dma_map_page - Map a physical page to DMA address + * @dev: The device for which the dma_addr is to be created + * @page: The page to be mapped + * @offset: The offset within the page + * @size: The size of the region in bytes + * @direction: The direction of the DMA + */ +static inline u64 ib_dma_map_page(struct ib_device *dev, + struct page *page, + unsigned long offset, + size_t size, + enum dma_data_direction direction) +{ + if (dev->dma_ops) + return dev->dma_ops->map_page(dev, page, offset, size, direction); + return dma_map_page(dev->dma_device, page, offset, size, direction); +} + +/** + * ib_dma_unmap_page - Destroy a mapping created by ib_dma_map_page() + * @dev: The device for which the DMA address was created + * @addr: The DMA address + * @size: The size of the region in bytes + * @direction: The direction of the DMA + */ +static inline void ib_dma_unmap_page(struct ib_device *dev, + u64 addr, size_t size, + enum dma_data_direction direction) +{ + if (dev->dma_ops) + dev->dma_ops->unmap_page(dev, addr, size, direction); + else + dma_unmap_page(dev->dma_device, addr, size, direction); +} + +/** + * ib_dma_map_sg - Map a scatter/gather list to DMA addresses + * @dev: The device for which the DMA addresses are to be created + * @sg: The array of scatter/gather entries + * @nents: The number of scatter/gather entries + * @direction: The direction of the DMA + */ +static inline int ib_dma_map_sg(struct ib_device *dev, + struct scatterlist *sg, int nents, + enum dma_data_direction direction) +{ + if (dev->dma_ops) + return dev->dma_ops->map_sg(dev, sg, nents, direction); + return dma_map_sg(dev->dma_device, sg, nents, direction); +} + +/** + * ib_dma_unmap_sg - Unmap a scatter/gather list of DMA addresses + * @dev: The device for which the DMA addresses were created + * @sg: The array of scatter/gather entries + * @nents: The number of scatter/gather entries + * @direction: The direction of the DMA + */ +static inline void ib_dma_unmap_sg(struct ib_device *dev, + struct scatterlist *sg, int nents, + enum dma_data_direction direction) +{ + if (dev->dma_ops) + dev->dma_ops->unmap_sg(dev, sg, nents, direction); + else + dma_unmap_sg(dev->dma_device, sg, nents, direction); +} + +/** + * ib_sg_dma_address - Return the DMA address from a scatter/gather entry + * @dev: The device for which the DMA addresses were created + * @sg: The scatter/gather entry + */ +static inline u64 ib_sg_dma_address(struct ib_device *dev, + struct scatterlist *sg) +{ + if (dev->dma_ops) + return dev->dma_ops->dma_address(dev, sg); + return sg_dma_address(sg); +} + +/** + * ib_sg_dma_len - Return the DMA length from a scatter/gather entry + * @dev: The device for which the DMA addresses were created + * @sg: The scatter/gather entry + */ +static inline unsigned int ib_sg_dma_len(struct ib_device *dev, + struct scatterlist *sg) +{ + if (dev->dma_ops) + return dev->dma_ops->dma_len(dev, sg); + return sg_dma_len(sg); +} + +/** + * ib_dma_sync_single_for_cpu - Prepare DMA region to be accessed by CPU + * @dev: The device for which the DMA address was created + * @addr: The DMA address + * @size: The size of the region in bytes + * @dir: The direction of the DMA + */ +static inline void ib_dma_sync_single_for_cpu(struct ib_device *dev, + u64 addr, + size_t size, + enum dma_data_direction dir) +{ + if (dev->dma_ops) + dev->dma_ops->sync_single_for_cpu(dev, addr, size, dir); + else + dma_sync_single_for_cpu(dev->dma_device, addr, size, dir); +} + +/** + * ib_dma_sync_single_for_device - Prepare DMA region to be accessed by device + * @dev: The device for which the DMA address was created + * @addr: The DMA address + * @size: The size of the region in bytes + * @dir: The direction of the DMA + */ +static inline void ib_dma_sync_single_for_device(struct ib_device *dev, + u64 addr, + size_t size, + enum dma_data_direction dir) +{ + if (dev->dma_ops) + dev->dma_ops->sync_single_for_device(dev, addr, size, dir); + else + dma_sync_single_for_device(dev->dma_device, addr, size, dir); +} + +/** + * ib_dma_alloc_coherent - Allocate memory and map it for DMA + * @dev: The device for which the DMA address is requested + * @size: The size of the region to allocate in bytes + * @dma_handle: A pointer for returning the DMA address of the region + * @flag: memory allocator flags + */ +static inline void *ib_dma_alloc_coherent(struct ib_device *dev, + size_t size, + u64 *dma_handle, + gfp_t flag) +{ + if (dev->dma_ops) + return dev->dma_ops->alloc_coherent(dev, size, dma_handle, flag); + else { + dma_addr_t handle; + void *ret; + + ret = dma_alloc_coherent(dev->dma_device, size, &handle, flag); + *dma_handle = handle; + return ret; + } +} + +/** + * ib_dma_free_coherent - Free memory allocated by ib_dma_alloc_coherent() + * @dev: The device for which the DMA addresses were allocated + * @size: The size of the region + * @cpu_addr: the address returned by ib_dma_alloc_coherent() + * @dma_handle: the DMA address returned by ib_dma_alloc_coherent() + */ +static inline void ib_dma_free_coherent(struct ib_device *dev, + size_t size, void *cpu_addr, + u64 dma_handle) +{ + if (dev->dma_ops) + dev->dma_ops->free_coherent(dev, size, cpu_addr, dma_handle); + else + dma_free_coherent(dev->dma_device, size, cpu_addr, dma_handle); +} + +/** * ib_reg_phys_mr - Prepares a virtually addressed memory region for use * by an HCA. * @pd: The protection domain associated assigned to the registered region. diff --git a/include/rdma/rdma_cm.h b/include/rdma/rdma_cm.h index deb5a0a4cee..36cd8a8526a 100644 --- a/include/rdma/rdma_cm.h +++ b/include/rdma/rdma_cm.h @@ -77,11 +77,34 @@ struct rdma_route { int num_paths; }; +struct rdma_conn_param { + const void *private_data; + u8 private_data_len; + u8 responder_resources; + u8 initiator_depth; + u8 flow_control; + u8 retry_count; /* ignored when accepting */ + u8 rnr_retry_count; + /* Fields below ignored if a QP is created on the rdma_cm_id. */ + u8 srq; + u32 qp_num; +}; + +struct rdma_ud_param { + const void *private_data; + u8 private_data_len; + struct ib_ah_attr ah_attr; + u32 qp_num; + u32 qkey; +}; + struct rdma_cm_event { enum rdma_cm_event_type event; int status; - void *private_data; - u8 private_data_len; + union { + struct rdma_conn_param conn; + struct rdma_ud_param ud; + } param; }; struct rdma_cm_id; @@ -204,25 +227,17 @@ void rdma_destroy_qp(struct rdma_cm_id *id); int rdma_init_qp_attr(struct rdma_cm_id *id, struct ib_qp_attr *qp_attr, int *qp_attr_mask); -struct rdma_conn_param { - const void *private_data; - u8 private_data_len; - u8 responder_resources; - u8 initiator_depth; - u8 flow_control; - u8 retry_count; /* ignored when accepting */ - u8 rnr_retry_count; - /* Fields below ignored if a QP is created on the rdma_cm_id. */ - u8 srq; - u32 qp_num; - enum ib_qp_type qp_type; -}; - /** * rdma_connect - Initiate an active connection request. + * @id: Connection identifier to connect. + * @conn_param: Connection information used for connected QPs. * * Users must have resolved a route for the rdma_cm_id to connect with * by having called rdma_resolve_route before calling this routine. + * + * This call will either connect to a remote QP or obtain remote QP + * information for unconnected rdma_cm_id's. The actual operation is + * based on the rdma_cm_id's port space. */ int rdma_connect(struct rdma_cm_id *id, struct rdma_conn_param *conn_param); @@ -253,6 +268,21 @@ int rdma_listen(struct rdma_cm_id *id, int backlog); int rdma_accept(struct rdma_cm_id *id, struct rdma_conn_param *conn_param); /** + * rdma_notify - Notifies the RDMA CM of an asynchronous event that has + * occurred on the connection. + * @id: Connection identifier to transition to established. + * @event: Asynchronous event. + * + * This routine should be invoked by users to notify the CM of relevant + * communication events. Events that should be reported to the CM and + * when to report them are: + * + * IB_EVENT_COMM_EST - Used when a message is received on a connected + * QP before an RTU has been received. + */ +int rdma_notify(struct rdma_cm_id *id, enum ib_event_type event); + +/** * rdma_reject - Called to reject a connection request or response. */ int rdma_reject(struct rdma_cm_id *id, const void *private_data, diff --git a/include/rdma/rdma_cm_ib.h b/include/rdma/rdma_cm_ib.h index e8c3af1804d..9b176df1d66 100644 --- a/include/rdma/rdma_cm_ib.h +++ b/include/rdma/rdma_cm_ib.h @@ -44,4 +44,7 @@ int rdma_set_ib_paths(struct rdma_cm_id *id, struct ib_sa_path_rec *path_rec, int num_paths); +/* Global qkey for UD QPs and multicast groups. */ +#define RDMA_UD_QKEY 0x01234567 + #endif /* RDMA_CM_IB_H */ diff --git a/include/rdma/rdma_user_cm.h b/include/rdma/rdma_user_cm.h new file mode 100644 index 00000000000..9572ab8eeac --- /dev/null +++ b/include/rdma/rdma_user_cm.h @@ -0,0 +1,206 @@ +/* + * Copyright (c) 2005-2006 Intel Corporation. All rights reserved. + * + * This software is available to you under a choice of one of two + * licenses. You may choose to be licensed under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree, or the + * OpenIB.org BSD license below: + * + * Redistribution and use in source and binary forms, with or + * without modification, are permitted provided that the following + * conditions are met: + * + * - Redistributions of source code must retain the above + * copyright notice, this list of conditions and the following + * disclaimer. + * + * - Redistributions in binary form must reproduce the above + * copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials + * provided with the distribution. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS + * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN + * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ + +#ifndef RDMA_USER_CM_H +#define RDMA_USER_CM_H + +#include <linux/types.h> +#include <linux/in6.h> +#include <rdma/ib_user_verbs.h> +#include <rdma/ib_user_sa.h> + +#define RDMA_USER_CM_ABI_VERSION 3 + +#define RDMA_MAX_PRIVATE_DATA 256 + +enum { + RDMA_USER_CM_CMD_CREATE_ID, + RDMA_USER_CM_CMD_DESTROY_ID, + RDMA_USER_CM_CMD_BIND_ADDR, + RDMA_USER_CM_CMD_RESOLVE_ADDR, + RDMA_USER_CM_CMD_RESOLVE_ROUTE, + RDMA_USER_CM_CMD_QUERY_ROUTE, + RDMA_USER_CM_CMD_CONNECT, + RDMA_USER_CM_CMD_LISTEN, + RDMA_USER_CM_CMD_ACCEPT, + RDMA_USER_CM_CMD_REJECT, + RDMA_USER_CM_CMD_DISCONNECT, + RDMA_USER_CM_CMD_INIT_QP_ATTR, + RDMA_USER_CM_CMD_GET_EVENT, + RDMA_USER_CM_CMD_GET_OPTION, + RDMA_USER_CM_CMD_SET_OPTION, + RDMA_USER_CM_CMD_NOTIFY +}; + +/* + * command ABI structures. + */ +struct rdma_ucm_cmd_hdr { + __u32 cmd; + __u16 in; + __u16 out; +}; + +struct rdma_ucm_create_id { + __u64 uid; + __u64 response; + __u16 ps; + __u8 reserved[6]; +}; + +struct rdma_ucm_create_id_resp { + __u32 id; +}; + +struct rdma_ucm_destroy_id { + __u64 response; + __u32 id; + __u32 reserved; +}; + +struct rdma_ucm_destroy_id_resp { + __u32 events_reported; +}; + +struct rdma_ucm_bind_addr { + __u64 response; + struct sockaddr_in6 addr; + __u32 id; +}; + +struct rdma_ucm_resolve_addr { + struct sockaddr_in6 src_addr; + struct sockaddr_in6 dst_addr; + __u32 id; + __u32 timeout_ms; +}; + +struct rdma_ucm_resolve_route { + __u32 id; + __u32 timeout_ms; +}; + +struct rdma_ucm_query_route { + __u64 response; + __u32 id; + __u32 reserved; +}; + +struct rdma_ucm_query_route_resp { + __u64 node_guid; + struct ib_user_path_rec ib_route[2]; + struct sockaddr_in6 src_addr; + struct sockaddr_in6 dst_addr; + __u32 num_paths; + __u8 port_num; + __u8 reserved[3]; +}; + +struct rdma_ucm_conn_param { + __u32 qp_num; + __u32 reserved; + __u8 private_data[RDMA_MAX_PRIVATE_DATA]; + __u8 private_data_len; + __u8 srq; + __u8 responder_resources; + __u8 initiator_depth; + __u8 flow_control; + __u8 retry_count; + __u8 rnr_retry_count; + __u8 valid; +}; + +struct rdma_ucm_ud_param { + __u32 qp_num; + __u32 qkey; + struct ib_uverbs_ah_attr ah_attr; + __u8 private_data[RDMA_MAX_PRIVATE_DATA]; + __u8 private_data_len; + __u8 reserved[7]; +}; + +struct rdma_ucm_connect { + struct rdma_ucm_conn_param conn_param; + __u32 id; + __u32 reserved; +}; + +struct rdma_ucm_listen { + __u32 id; + __u32 backlog; +}; + +struct rdma_ucm_accept { + __u64 uid; + struct rdma_ucm_conn_param conn_param; + __u32 id; + __u32 reserved; +}; + +struct rdma_ucm_reject { + __u32 id; + __u8 private_data_len; + __u8 reserved[3]; + __u8 private_data[RDMA_MAX_PRIVATE_DATA]; +}; + +struct rdma_ucm_disconnect { + __u32 id; +}; + +struct rdma_ucm_init_qp_attr { + __u64 response; + __u32 id; + __u32 qp_state; +}; + +struct rdma_ucm_notify { + __u32 id; + __u32 event; +}; + +struct rdma_ucm_get_event { + __u64 response; +}; + +struct rdma_ucm_event_resp { + __u64 uid; + __u32 id; + __u32 event; + __u32 status; + union { + struct rdma_ucm_conn_param conn; + struct rdma_ucm_ud_param ud; + } param; +}; + +#endif /* RDMA_USER_CM_H */ diff --git a/include/scsi/libiscsi.h b/include/scsi/libiscsi.h index 61eebec00a7..ea0816d4904 100644 --- a/include/scsi/libiscsi.h +++ b/include/scsi/libiscsi.h @@ -25,6 +25,8 @@ #include <linux/types.h> #include <linux/mutex.h> +#include <linux/timer.h> +#include <linux/workqueue.h> #include <scsi/iscsi_proto.h> #include <scsi/iscsi_if.h> diff --git a/include/scsi/libsas.h b/include/scsi/libsas.h index 1d77b63c5ea..0c775fceb67 100644 --- a/include/scsi/libsas.h +++ b/include/scsi/libsas.h @@ -201,9 +201,14 @@ struct domain_device { void *lldd_dev; }; +struct sas_discovery_event { + struct work_struct work; + struct asd_sas_port *port; +}; + struct sas_discovery { spinlock_t disc_event_lock; - struct work_struct disc_work[DISC_NUM_EVENTS]; + struct sas_discovery_event disc_work[DISC_NUM_EVENTS]; unsigned long pending; u8 fanout_sas_addr[8]; u8 eeds_a[8]; @@ -249,14 +254,19 @@ struct asd_sas_port { void *lldd_port; /* not touched by the sas class code */ }; +struct asd_sas_event { + struct work_struct work; + struct asd_sas_phy *phy; +}; + /* The phy pretty much is controlled by the LLDD. * The class only reads those fields. */ struct asd_sas_phy { /* private: */ /* protected by ha->event_lock */ - struct work_struct port_events[PORT_NUM_EVENTS]; - struct work_struct phy_events[PHY_NUM_EVENTS]; + struct asd_sas_event port_events[PORT_NUM_EVENTS]; + struct asd_sas_event phy_events[PHY_NUM_EVENTS]; unsigned long port_events_pending; unsigned long phy_events_pending; @@ -308,10 +318,15 @@ struct scsi_core { int queue_thread_kill; }; +struct sas_ha_event { + struct work_struct work; + struct sas_ha_struct *ha; +}; + struct sas_ha_struct { /* private: */ spinlock_t event_lock; - struct work_struct ha_events[HA_NUM_EVENTS]; + struct sas_ha_event ha_events[HA_NUM_EVENTS]; unsigned long pending; struct scsi_core core; @@ -339,6 +354,8 @@ struct sas_ha_struct { void (*notify_phy_event)(struct asd_sas_phy *, enum phy_event); void *lldd_ha; /* not touched by sas class code */ + + struct list_head eh_done_q; }; #define SHOST_TO_SAS_HA(_shost) (*(struct sas_ha_struct **)(_shost)->hostdata) @@ -527,17 +544,20 @@ struct sas_task { void *lldd_task; /* for use by LLDDs */ void *uldd_task; + + struct work_struct abort_work; }; -#define SAS_TASK_STATE_PENDING 1 -#define SAS_TASK_STATE_DONE 2 -#define SAS_TASK_STATE_ABORTED 4 +#define SAS_TASK_STATE_PENDING 1 +#define SAS_TASK_STATE_DONE 2 +#define SAS_TASK_STATE_ABORTED 4 +#define SAS_TASK_INITIATOR_ABORTED 8 static inline struct sas_task *sas_alloc_task(gfp_t flags) { - extern kmem_cache_t *sas_task_cache; + extern struct kmem_cache *sas_task_cache; struct sas_task *task = kmem_cache_alloc(sas_task_cache, flags); if (task) { @@ -555,7 +575,7 @@ static inline struct sas_task *sas_alloc_task(gfp_t flags) static inline void sas_free_task(struct sas_task *task) { if (task) { - extern kmem_cache_t *sas_task_cache; + extern struct kmem_cache *sas_task_cache; BUG_ON(!list_empty(&task->list)); kmem_cache_free(sas_task_cache, task); } @@ -593,6 +613,7 @@ struct sas_domain_function_template { extern int sas_register_ha(struct sas_ha_struct *); extern int sas_unregister_ha(struct sas_ha_struct *); +int sas_phy_reset(struct sas_phy *phy, int hard_reset); extern int sas_queuecommand(struct scsi_cmnd *, void (*scsi_done)(struct scsi_cmnd *)); extern int sas_target_alloc(struct scsi_target *); @@ -625,4 +646,6 @@ void sas_unregister_dev(struct domain_device *); void sas_init_dev(struct domain_device *); +void sas_task_abort(struct work_struct *); + #endif /* _SASLIB_H_ */ diff --git a/include/scsi/libsrp.h b/include/scsi/libsrp.h new file mode 100644 index 00000000000..d143171896a --- /dev/null +++ b/include/scsi/libsrp.h @@ -0,0 +1,77 @@ +#ifndef __LIBSRP_H__ +#define __LIBSRP_H__ + +#include <linux/list.h> +#include <scsi/scsi_cmnd.h> +#include <scsi/scsi_host.h> +#include <scsi/srp.h> + +enum iue_flags { + V_DIOVER, + V_WRITE, + V_LINKED, + V_FLYING, +}; + +struct srp_buf { + dma_addr_t dma; + void *buf; +}; + +struct srp_queue { + void *pool; + void *items; + struct kfifo *queue; + spinlock_t lock; +}; + +struct srp_target { + struct Scsi_Host *shost; + struct device *dev; + + spinlock_t lock; + struct list_head cmd_queue; + + size_t srp_iu_size; + struct srp_queue iu_queue; + size_t rx_ring_size; + struct srp_buf **rx_ring; + + void *ldata; +}; + +struct iu_entry { + struct srp_target *target; + + struct list_head ilist; + dma_addr_t remote_token; + unsigned long flags; + + struct srp_buf *sbuf; +}; + +typedef int (srp_rdma_t)(struct scsi_cmnd *, struct scatterlist *, int, + struct srp_direct_buf *, int, + enum dma_data_direction, unsigned int); +extern int srp_target_alloc(struct srp_target *, struct device *, size_t, size_t); +extern void srp_target_free(struct srp_target *); + +extern struct iu_entry *srp_iu_get(struct srp_target *); +extern void srp_iu_put(struct iu_entry *); + +extern int srp_cmd_queue(struct Scsi_Host *, struct srp_cmd *, void *, u64); +extern int srp_transfer_data(struct scsi_cmnd *, struct srp_cmd *, + srp_rdma_t, int, int); + + +static inline struct srp_target *host_to_srp_target(struct Scsi_Host *host) +{ + return (struct srp_target *) host->hostdata; +} + +static inline int srp_cmd_direction(struct srp_cmd *cmd) +{ + return (cmd->buf_fmt >> 4) ? DMA_TO_DEVICE : DMA_FROM_DEVICE; +} + +#endif diff --git a/include/scsi/scsi_cmnd.h b/include/scsi/scsi_cmnd.h index be117f812de..d6948d0e8cd 100644 --- a/include/scsi/scsi_cmnd.h +++ b/include/scsi/scsi_cmnd.h @@ -8,6 +8,7 @@ struct request; struct scatterlist; +struct Scsi_Host; struct scsi_device; @@ -72,6 +73,9 @@ struct scsi_cmnd { unsigned short use_sg; /* Number of pieces of scatter-gather */ unsigned short sglist_len; /* size of malloc'd scatter-gather list */ + /* offset in cmd we are at (for multi-transfer tgt cmds) */ + unsigned offset; + unsigned underflow; /* Return error if less than this amount is transferred */ @@ -119,7 +123,10 @@ struct scsi_cmnd { }; extern struct scsi_cmnd *scsi_get_command(struct scsi_device *, gfp_t); +extern struct scsi_cmnd *__scsi_get_command(struct Scsi_Host *, gfp_t); extern void scsi_put_command(struct scsi_cmnd *); +extern void __scsi_put_command(struct Scsi_Host *, struct scsi_cmnd *, + struct device *); extern void scsi_io_completion(struct scsi_cmnd *, unsigned int); extern void scsi_finish_command(struct scsi_cmnd *cmd); extern void scsi_req_abort_cmd(struct scsi_cmnd *cmd); @@ -128,4 +135,7 @@ extern void *scsi_kmap_atomic_sg(struct scatterlist *sg, int sg_count, size_t *offset, size_t *len); extern void scsi_kunmap_atomic_sg(void *virt); +extern struct scatterlist *scsi_alloc_sgtable(struct scsi_cmnd *, gfp_t); +extern void scsi_free_sgtable(struct scatterlist *, int); + #endif /* _SCSI_SCSI_CMND_H */ diff --git a/include/scsi/scsi_device.h b/include/scsi/scsi_device.h index b401c82036b..ebf31b16dc4 100644 --- a/include/scsi/scsi_device.h +++ b/include/scsi/scsi_device.h @@ -223,13 +223,13 @@ extern struct scsi_device *__scsi_iterate_devices(struct Scsi_Host *, struct scsi_device *); /** - * shost_for_each_device - iterate over all devices of a host - * @sdev: iterator - * @host: host whiches devices we want to iterate over + * shost_for_each_device - iterate over all devices of a host + * @sdev: the &struct scsi_device to use as a cursor + * @shost: the &struct scsi_host to iterate over * - * This traverses over each devices of @shost. The devices have - * a reference that must be released by scsi_host_put when breaking - * out of the loop. + * Iterator that returns each device attached to @shost. This loop + * takes a reference on each device and releases it at the end. If + * you break out of the loop, you must call scsi_device_put(sdev). */ #define shost_for_each_device(sdev, shost) \ for ((sdev) = __scsi_iterate_devices((shost), NULL); \ @@ -237,17 +237,17 @@ extern struct scsi_device *__scsi_iterate_devices(struct Scsi_Host *, (sdev) = __scsi_iterate_devices((shost), (sdev))) /** - * __shost_for_each_device - iterate over all devices of a host (UNLOCKED) - * @sdev: iterator - * @host: host whiches devices we want to iterate over + * __shost_for_each_device - iterate over all devices of a host (UNLOCKED) + * @sdev: the &struct scsi_device to use as a cursor + * @shost: the &struct scsi_host to iterate over * - * This traverses over each devices of @shost. It does _not_ take a - * reference on the scsi_device, thus it the whole loop must be protected - * by shost->host_lock. + * Iterator that returns each device attached to @shost. It does _not_ + * take a reference on the scsi_device, so the whole loop must be + * protected by shost->host_lock. * - * Note: The only reason why drivers would want to use this is because - * they're need to access the device list in irq context. Otherwise you - * really want to use shost_for_each_device instead. + * Note: The only reason to use this is because you need to access the + * device list in interrupt context. Otherwise you really want to use + * shost_for_each_device instead. */ #define __shost_for_each_device(sdev, shost) \ list_for_each_entry((sdev), &((shost)->__devices), siblings) diff --git a/include/scsi/scsi_host.h b/include/scsi/scsi_host.h index 39c6f8cc20c..7f1f411d07a 100644 --- a/include/scsi/scsi_host.h +++ b/include/scsi/scsi_host.h @@ -7,6 +7,7 @@ #include <linux/workqueue.h> #include <linux/mutex.h> +struct request_queue; struct block_device; struct completion; struct module; @@ -124,6 +125,39 @@ struct scsi_host_template { void (*done)(struct scsi_cmnd *)); /* + * The transfer functions are used to queue a scsi command to + * the LLD. When the driver is finished processing the command + * the done callback is invoked. + * + * return values: see queuecommand + * + * If the LLD accepts the cmd, it should set the result to an + * appropriate value when completed before calling the done function. + * + * STATUS: REQUIRED FOR TARGET DRIVERS + */ + /* TODO: rename */ + int (* transfer_response)(struct scsi_cmnd *, + void (*done)(struct scsi_cmnd *)); + /* + * This is called to inform the LLD to transfer cmd->request_bufflen + * bytes of the cmd at cmd->offset in the cmd. The cmd->use_sg + * speciefies the number of scatterlist entried in the command + * and cmd->request_buffer contains the scatterlist. + * + * If the command cannot be processed in one transfer_data call + * becuase a scatterlist within the LLD's limits cannot be + * created then transfer_data will be called multiple times. + * It is initially called from process context, and later + * calls are from the interrup context. + */ + int (* transfer_data)(struct scsi_cmnd *, + void (*done)(struct scsi_cmnd *)); + + /* Used as callback for the completion of task management request. */ + int (* tsk_mgmt_response)(u64 mid, int result); + + /* * This is an error handling strategy routine. You don't need to * define one of these if you don't want to - there is a default * routine that is present that should work in most cases. For those @@ -241,6 +275,24 @@ struct scsi_host_template { void (* target_destroy)(struct scsi_target *); /* + * If a host has the ability to discover targets on its own instead + * of scanning the entire bus, it can fill in this function and + * call scsi_scan_host(). This function will be called periodically + * until it returns 1 with the scsi_host and the elapsed time of + * the scan in jiffies. + * + * Status: OPTIONAL + */ + int (* scan_finished)(struct Scsi_Host *, unsigned long); + + /* + * If the host wants to be called before the scan starts, but + * after the midlayer has set up ready for the scan, it can fill + * in this function. + */ + void (* scan_start)(struct Scsi_Host *); + + /* * fill in this function to allow the queue depth of this host * to be changeable (on a per device basis). returns either * the current queue depth setting (may be different from what @@ -552,6 +604,9 @@ struct Scsi_Host { /* task mgmt function in progress */ unsigned tmf_in_progress:1; + /* Asynchronous scan in progress */ + unsigned async_scan:1; + /* * Optional work queue to be utilized by the transport */ @@ -568,6 +623,12 @@ struct Scsi_Host { */ unsigned int max_host_blocked; + /* + * q used for scsi_tgt msgs, async events or any other requests that + * need to be processed in userspace + */ + struct request_queue *uspace_req_q; + /* legacy crap */ unsigned long base; unsigned long io_port; @@ -648,11 +709,6 @@ extern const char *scsi_host_state_name(enum scsi_host_state); extern u64 scsi_calculate_bounce_limit(struct Scsi_Host *); -static inline void scsi_assign_lock(struct Scsi_Host *shost, spinlock_t *lock) -{ - shost->host_lock = lock; -} - static inline struct device *scsi_get_device(struct Scsi_Host *shost) { return shost->shost_gendev.parent; @@ -671,6 +727,9 @@ extern void scsi_unblock_requests(struct Scsi_Host *); extern void scsi_block_requests(struct Scsi_Host *); struct class_container; + +extern struct request_queue *__scsi_alloc_queue(struct Scsi_Host *shost, + void (*) (struct request_queue *)); /* * These two functions are used to allocate and free a pseudo device * which will connect to the host adapter itself rather than any diff --git a/include/scsi/scsi_tgt.h b/include/scsi/scsi_tgt.h new file mode 100644 index 00000000000..4f4427937af --- /dev/null +++ b/include/scsi/scsi_tgt.h @@ -0,0 +1,19 @@ +/* + * SCSI target definitions + */ + +#include <linux/dma-mapping.h> + +struct Scsi_Host; +struct scsi_cmnd; +struct scsi_lun; + +extern struct Scsi_Host *scsi_tgt_cmd_to_host(struct scsi_cmnd *); +extern int scsi_tgt_alloc_queue(struct Scsi_Host *); +extern void scsi_tgt_free_queue(struct Scsi_Host *); +extern int scsi_tgt_queue_command(struct scsi_cmnd *, struct scsi_lun *, u64); +extern int scsi_tgt_tsk_mgmt_request(struct Scsi_Host *, int, u64, struct scsi_lun *, + void *); +extern struct scsi_cmnd *scsi_host_get_command(struct Scsi_Host *, + enum dma_data_direction, gfp_t); +extern void scsi_host_put_command(struct Scsi_Host *, struct scsi_cmnd *); diff --git a/include/scsi/scsi_tgt_if.h b/include/scsi/scsi_tgt_if.h new file mode 100644 index 00000000000..46d5e70d721 --- /dev/null +++ b/include/scsi/scsi_tgt_if.h @@ -0,0 +1,90 @@ +/* + * SCSI target kernel/user interface + * + * Copyright (C) 2005 FUJITA Tomonori <tomof@acm.org> + * Copyright (C) 2005 Mike Christie <michaelc@cs.wisc.edu> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA + * 02110-1301 USA + */ +#ifndef __SCSI_TARGET_IF_H +#define __SCSI_TARGET_IF_H + +/* user -> kernel */ +#define TGT_UEVENT_CMD_RSP 0x0001 +#define TGT_UEVENT_TSK_MGMT_RSP 0x0002 + +/* kernel -> user */ +#define TGT_KEVENT_CMD_REQ 0x1001 +#define TGT_KEVENT_CMD_DONE 0x1002 +#define TGT_KEVENT_TSK_MGMT_REQ 0x1003 + +struct tgt_event_hdr { + uint16_t version; + uint16_t status; + uint16_t type; + uint16_t len; +} __attribute__ ((aligned (sizeof(uint64_t)))); + +struct tgt_event { + struct tgt_event_hdr hdr; + + union { + /* user-> kernel */ + struct { + int host_no; + uint32_t len; + int result; + aligned_u64 uaddr; + uint8_t rw; + aligned_u64 tag; + } cmd_rsp; + struct { + int host_no; + aligned_u64 mid; + int result; + } tsk_mgmt_rsp; + + + /* kernel -> user */ + struct { + int host_no; + uint32_t data_len; + uint8_t scb[16]; + uint8_t lun[8]; + int attribute; + aligned_u64 tag; + } cmd_req; + struct { + int host_no; + aligned_u64 tag; + int result; + } cmd_done; + struct { + int host_no; + int function; + aligned_u64 tag; + uint8_t lun[8]; + aligned_u64 mid; + } tsk_mgmt_req; + } p; +} __attribute__ ((aligned (sizeof(uint64_t)))); + +#define TGT_RING_SIZE (1UL << 16) +#define TGT_RING_PAGES (TGT_RING_SIZE >> PAGE_SHIFT) +#define TGT_EVENT_PER_PAGE (PAGE_SIZE / sizeof(struct tgt_event)) +#define TGT_MAX_EVENTS (TGT_EVENT_PER_PAGE * TGT_RING_PAGES) + +#endif diff --git a/include/scsi/scsi_transport_fc.h b/include/scsi/scsi_transport_fc.h index fd352323378..798f7c7ee42 100644 --- a/include/scsi/scsi_transport_fc.h +++ b/include/scsi/scsi_transport_fc.h @@ -206,9 +206,9 @@ struct fc_rport { /* aka fc_starget_attrs */ u8 flags; struct list_head peers; struct device dev; - struct work_struct dev_loss_work; + struct delayed_work dev_loss_work; struct work_struct scan_work; - struct work_struct fail_io_work; + struct delayed_work fail_io_work; struct work_struct stgt_delete_work; struct work_struct rport_delete_work; } __attribute__((aligned(sizeof(unsigned long)))); diff --git a/include/scsi/scsi_transport_iscsi.h b/include/scsi/scsi_transport_iscsi.h index 4b95c89c95c..d5c218ddc52 100644 --- a/include/scsi/scsi_transport_iscsi.h +++ b/include/scsi/scsi_transport_iscsi.h @@ -176,7 +176,7 @@ struct iscsi_cls_session { /* recovery fields */ int recovery_tmo; - struct work_struct recovery_work; + struct delayed_work recovery_work; int target_id; diff --git a/include/scsi/scsi_transport_sas.h b/include/scsi/scsi_transport_sas.h index 53024377f3b..59633a82de4 100644 --- a/include/scsi/scsi_transport_sas.h +++ b/include/scsi/scsi_transport_sas.h @@ -73,6 +73,8 @@ struct sas_phy { /* for the list of phys belonging to a port */ struct list_head port_siblings; + + struct work_struct reset_work; }; #define dev_to_phy(d) \ diff --git a/include/sound/ac97_codec.h b/include/sound/ac97_codec.h index 4c43521cc49..33720397a90 100644 --- a/include/sound/ac97_codec.h +++ b/include/sound/ac97_codec.h @@ -511,7 +511,7 @@ struct snd_ac97 { #ifdef CONFIG_SND_AC97_POWER_SAVE unsigned int power_up; /* power states */ struct workqueue_struct *power_workq; - struct work_struct power_work; + struct delayed_work power_work; #endif struct device dev; }; diff --git a/include/sound/ak4114.h b/include/sound/ak4114.h index 11702aa0bea..2ee061625fd 100644 --- a/include/sound/ak4114.h +++ b/include/sound/ak4114.h @@ -182,7 +182,7 @@ struct ak4114 { unsigned char rcs0; unsigned char rcs1; struct workqueue_struct *workqueue; - struct work_struct work; + struct delayed_work work; void *change_callback_private; void (*change_callback)(struct ak4114 *ak4114, unsigned char c0, unsigned char c1); }; diff --git a/include/sound/core.h b/include/sound/core.h index fa1ca0127ba..a994bea09cd 100644 --- a/include/sound/core.h +++ b/include/sound/core.h @@ -132,6 +132,7 @@ struct snd_card { int shutdown; /* this card is going down */ int free_on_last_close; /* free in context of file_release */ wait_queue_head_t shutdown_sleep; + struct device *parent; struct device *dev; #ifdef CONFIG_PM @@ -187,13 +188,14 @@ struct snd_minor { int device; /* device number */ const struct file_operations *f_ops; /* file operations */ void *private_data; /* private data for f_ops->open */ - struct class_device *class_dev; /* class device for sysfs */ + struct device *dev; /* device for sysfs */ }; /* sound.c */ extern int snd_major; extern int snd_ecards_limit; +extern struct class *sound_class; void snd_request_card(int card); @@ -203,7 +205,7 @@ int snd_register_device(int type, struct snd_card *card, int dev, int snd_unregister_device(int type, struct snd_card *card, int dev); void *snd_lookup_minor_data(unsigned int minor, int type); int snd_add_device_sysfs_file(int type, struct snd_card *card, int dev, - const struct class_device_attribute *attr); + struct device_attribute *attr); #ifdef CONFIG_SND_OSSEMUL int snd_register_oss_device(int type, struct snd_card *card, int dev, @@ -255,7 +257,7 @@ int snd_card_file_add(struct snd_card *card, struct file *file); int snd_card_file_remove(struct snd_card *card, struct file *file); #ifndef snd_card_set_dev -#define snd_card_set_dev(card,devptr) ((card)->dev = (devptr)) +#define snd_card_set_dev(card,devptr) ((card)->parent = (devptr)) #endif /* device.c */ diff --git a/include/sound/pcm.h b/include/sound/pcm.h index afaf3e88e08..2f645dfd7f7 100644 --- a/include/sound/pcm.h +++ b/include/sound/pcm.h @@ -26,6 +26,7 @@ #include <sound/asound.h> #include <sound/memalloc.h> #include <linux/poll.h> +#include <linux/mm.h> #include <linux/bitops.h> #define snd_pcm_substream_chip(substream) ((substream)->private_data) diff --git a/include/sound/pcm_oss.h b/include/sound/pcm_oss.h index c854647b6f3..1cd4f64cdf3 100644 --- a/include/sound/pcm_oss.h +++ b/include/sound/pcm_oss.h @@ -56,6 +56,7 @@ struct snd_pcm_oss_runtime { size_t mmap_bytes; char *buffer; /* vmallocated period */ size_t buffer_used; /* used length from period buffer */ + struct mutex params_lock; #ifdef CONFIG_SND_PCM_OSS_PLUGINS struct snd_pcm_plugin *plugin_first; struct snd_pcm_plugin *plugin_last; diff --git a/include/sound/version.h b/include/sound/version.h index 17137f3a3b6..20f7babad51 100644 --- a/include/sound/version.h +++ b/include/sound/version.h @@ -1,3 +1,3 @@ /* include/version.h. Generated by alsa/ksync script. */ -#define CONFIG_SND_VERSION "1.0.13" -#define CONFIG_SND_DATE " (Tue Nov 28 14:07:24 2006 UTC)" +#define CONFIG_SND_VERSION "1.0.14rc1" +#define CONFIG_SND_DATE " (Tue Jan 09 09:56:17 2007 UTC)" diff --git a/include/sound/ymfpci.h b/include/sound/ymfpci.h index d41cda97e95..f3514ee96bd 100644 --- a/include/sound/ymfpci.h +++ b/include/sound/ymfpci.h @@ -286,7 +286,7 @@ struct snd_ymfpci { int irq; unsigned int device_id; /* PCI device ID */ - unsigned int rev; /* PCI revision */ + unsigned char rev; /* PCI revision */ unsigned long reg_area_phys; void __iomem *reg_area_virt; struct resource *res_reg_area; @@ -345,7 +345,6 @@ struct snd_ymfpci { struct snd_kcontrol *spdif_pcm_ctl; int mode_dup4ch; int rear_opened; - int rear_swap; int spdif_opened; struct { u16 left; @@ -378,7 +377,7 @@ int snd_ymfpci_pcm(struct snd_ymfpci *chip, int device, struct snd_pcm **rpcm); int snd_ymfpci_pcm2(struct snd_ymfpci *chip, int device, struct snd_pcm **rpcm); int snd_ymfpci_pcm_spdif(struct snd_ymfpci *chip, int device, struct snd_pcm **rpcm); int snd_ymfpci_pcm_4ch(struct snd_ymfpci *chip, int device, struct snd_pcm **rpcm); -int snd_ymfpci_mixer(struct snd_ymfpci *chip, int rear_switch, int rear_swap); +int snd_ymfpci_mixer(struct snd_ymfpci *chip, int rear_switch); int snd_ymfpci_timer(struct snd_ymfpci *chip, int device); #endif /* __SOUND_YMFPCI_H */ diff --git a/include/video/mbxfb.h b/include/video/mbxfb.h index 3bde0f5cd55..20b9002712e 100644 --- a/include/video/mbxfb.h +++ b/include/video/mbxfb.h @@ -1,6 +1,9 @@ #ifndef __MBX_FB_H #define __MBX_FB_H +#include <asm/ioctl.h> +#include <asm/types.h> + struct mbxfb_val { unsigned int defval; unsigned int min; @@ -25,4 +28,32 @@ struct mbxfb_platform_data { int (*remove)(struct fb_info *fb); }; +/* planar */ +#define MBXFB_FMT_YUV12 0 + +/* packed */ +#define MBXFB_FMT_UY0VY1 1 +#define MBXFB_FMT_VY0UY1 2 +#define MBXFB_FMT_Y0UY1V 3 +#define MBXFB_FMT_Y0VY1U 4 +struct mbxfb_overlaySetup { + __u32 enable; + __u32 x, y; + __u32 width, height; + __u32 alpha; + __u32 fmt; + __u32 mem_offset; + __u32 scaled_width; + __u32 scaled_height; + + /* Filled by the driver */ + __u32 U_offset; + __u32 V_offset; + + __u16 Y_stride; + __u16 UV_stride; +}; + +#define MBXFB_IOCX_OVERLAY _IOWR(0xF4, 0x00,struct mbxfb_overlaySetup) + #endif /* __MBX_FB_H */ diff --git a/include/video/pm3fb.h b/include/video/pm3fb.h index ac021379ac4..94c7d2da90e 100644 --- a/include/video/pm3fb.h +++ b/include/video/pm3fb.h @@ -607,16 +607,16 @@ #define PM3FBDestReadModeOr 0xac98 #define PM3FBDestReadMode_ReadDisable 0<<0 #define PM3FBDestReadMode_ReadEnable 1<<0 - #define PM3FBDestReadMode_StripePitch(sp) (((sp)&0x7)<<2 - #define PM3FBDestReadMode_StripeHeight(sh) (((sh)&0x7)<<7 + #define PM3FBDestReadMode_StripePitch(sp) (((sp)&0x7)<<2) + #define PM3FBDestReadMode_StripeHeight(sh) (((sh)&0x7)<<7) #define PM3FBDestReadMode_Enable0 1<<8 #define PM3FBDestReadMode_Enable1 1<<9 #define PM3FBDestReadMode_Enable2 1<<10 #define PM3FBDestReadMode_Enable3 1<<11 - #define PM3FBDestReadMode_Layout0(l) (((l)&0x3)<<12 - #define PM3FBDestReadMode_Layout1(l) (((l)&0x3)<<14 - #define PM3FBDestReadMode_Layout2(l) (((l)&0x3)<<16 - #define PM3FBDestReadMode_Layout3(l) (((l)&0x3)<<18 + #define PM3FBDestReadMode_Layout0(l) (((l)&0x3)<<12) + #define PM3FBDestReadMode_Layout1(l) (((l)&0x3)<<14) + #define PM3FBDestReadMode_Layout2(l) (((l)&0x3)<<16) + #define PM3FBDestReadMode_Layout3(l) (((l)&0x3)<<18) #define PM3FBDestReadMode_Origin0 1<<20 #define PM3FBDestReadMode_Origin1 1<<21 #define PM3FBDestReadMode_Origin2 1<<22 @@ -640,16 +640,16 @@ #define PM3FBSourceReadModeOr 0xaca8 #define PM3FBSourceReadMode_ReadDisable (0<<0) #define PM3FBSourceReadMode_ReadEnable (1<<0) - #define PM3FBSourceReadMode_StripePitch(sp) (((sp)&0x7)<<2 - #define PM3FBSourceReadMode_StripeHeight(sh) (((sh)&0x7)<<7 - #define PM3FBSourceReadMode_Layout(l) (((l)&0x3)<<8 + #define PM3FBSourceReadMode_StripePitch(sp) (((sp)&0x7)<<2) + #define PM3FBSourceReadMode_StripeHeight(sh) (((sh)&0x7)<<7) + #define PM3FBSourceReadMode_Layout(l) (((l)&0x3)<<8) #define PM3FBSourceReadMode_Origin 1<<10 #define PM3FBSourceReadMode_Blocking 1<<11 #define PM3FBSourceReadMode_UserTexelCoord 1<<13 #define PM3FBSourceReadMode_WrapXEnable 1<<14 #define PM3FBSourceReadMode_WrapYEnable 1<<15 - #define PM3FBSourceReadMode_WrapX(w) (((w)&0xf)<<16 - #define PM3FBSourceReadMode_WrapY(w) (((w)&0xf)<<20 + #define PM3FBSourceReadMode_WrapX(w) (((w)&0xf)<<16) + #define PM3FBSourceReadMode_WrapY(w) (((w)&0xf)<<20) #define PM3FBSourceReadMode_ExternalSourceData 1<<24 #define PM3FBWriteBufferAddr0 0xb000 #define PM3FBWriteBufferAddr1 0xb008 @@ -942,7 +942,7 @@ #define PM3Window 0x8980 #define PM3Window_ForceLBUpdate 1<<3 #define PM3Window_LBUpdateSource 1<<4 - #define PM3Window_FrameCount(c) (((c)&0xff)<<9 + #define PM3Window_FrameCount(c) (((c)&0xff)<<9) #define PM3Window_StencilFCP 1<<17 #define PM3Window_DepthFCP 1<<18 #define PM3Window_OverrideWriteFiltering 1<<19 diff --git a/include/video/sstfb.h b/include/video/sstfb.h index 5dbf5e7e50a..baa163f770a 100644 --- a/include/video/sstfb.h +++ b/include/video/sstfb.h @@ -119,7 +119,7 @@ #define BACKPORCH 0x0208 #define VIDEODIMENSIONS 0x020c #define FBIINIT0 0x0210 /* misc+fifo controls */ -# define EN_VGA_PASSTHROUGH BIT(0) +# define DIS_VGA_PASSTHROUGH BIT(0) # define FBI_RESET BIT(1) # define FIFO_RESET BIT(2) #define FBIINIT1 0x0214 /* PCI + video controls */ @@ -251,7 +251,7 @@ # define DACREG_ICS_CLK1_A 0 /* bit4 */ /* sst default init registers */ -#define FBIINIT0_DEFAULT EN_VGA_PASSTHROUGH +#define FBIINIT0_DEFAULT DIS_VGA_PASSTHROUGH #define FBIINIT1_DEFAULT \ ( \ @@ -296,6 +296,11 @@ * */ +/* ioctl to enable/disable VGA passthrough */ +#define SSTFB_SET_VGAPASS _IOW('F', 0xdd, __u32) +#define SSTFB_GET_VGAPASS _IOR('F', 0xdd, __u32) + + /* used to know witch clock to set */ enum { VID_CLOCK=0, @@ -317,7 +322,7 @@ struct pll_timing { }; struct dac_switch { - char * name; + const char *name; int (*detect) (struct fb_info *info); int (*set_pll) (struct fb_info *info, const struct pll_timing *t, const int clock); void (*set_vidmod) (struct fb_info *info, const int bpp); @@ -345,7 +350,7 @@ struct sstfb_par { struct pci_dev *dev; int type; u8 revision; - int gfx_clock; /* status */ + u8 vgapass; /* VGA pass through: 1=enabled, 0=disabled */ }; #endif /* _SSTFB_H_ */ |