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authorLinus Torvalds <torvalds@g5.osdl.org>2006-07-13 16:57:04 -0700
committerLinus Torvalds <torvalds@g5.osdl.org>2006-07-13 16:57:04 -0700
commitab6cf0d0cb96417ef65cc2c2120c0e879edf7a4a (patch)
tree97e85188397967013783aba57907fd85bc63cbf2 /include
parent0d10e47f9635ecafe5a9dc6e10cb056a87a4daa2 (diff)
parentf4dee85e2c6a7d7adf7ea4d6d3053a41c78175b7 (diff)
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (53 commits) [MIPS] sparsemem: fix crash in show_mem [MIPS] vr41xx: Update workpad setup function [MIPS] vr41xx: Update e55 setup function [MIPS] vr41xx: Removed old v2.4 VRC4173 driver [MIPS] vr41xx: Move IRQ numbers to asm-mips/vr41xx/irq.h [MIPS] MIPSsim: Build fix, rename sim_timer_setup -> plat_timer_setup. [MIPS] Remove unused code. [MIPS] IP22 Fix brown paper bag in RTC code. [MIPS] Atlas, Malta, SEAD: Don't disable interrupts in mips_time_init(). [MIPS] Replace board_timer_setup function pointer by plat_timer_setup. [MIPS] Nuke redeclarations of board_time_init. [MIPS] Remove redeclarations of setup_irq(). [MIPS] Nuke redeclarations of board_timer_setup. [MIPS] Print out TLB handler assembly for debugging. [MIPS] SMTC: Reformat to Linux style. [MIPS] MIPSsim: Delete redeclaration of ll_local_timer_interrupt. [MIPS] IP27: Reformatting. [MIPS] IP27: Invoke setup_irq for timer interrupt so proc stats will be shown. [MIPS] IP27: irq_chip startup method returns unsigned int. [MIPS] IP27: struct irq_desc member handler was renamed to chip. ...
Diffstat (limited to 'include')
-rw-r--r--include/asm-mips/apm.h1
-rw-r--r--include/asm-mips/atomic.h2
-rw-r--r--include/asm-mips/bitops.h2
-rw-r--r--include/asm-mips/cpu-features.h10
-rw-r--r--include/asm-mips/cpu.h2
-rw-r--r--include/asm-mips/inst.h2
-rw-r--r--include/asm-mips/irqflags.h (renamed from include/asm-mips/interrupt.h)70
-rw-r--r--include/asm-mips/mach-cobalt/cpu-feature-overrides.h2
-rw-r--r--include/asm-mips/mach-excite/cpu-feature-overrides.h2
-rw-r--r--include/asm-mips/mach-excite/excite.h1
-rw-r--r--include/asm-mips/mach-ip27/cpu-feature-overrides.h2
-rw-r--r--include/asm-mips/mach-ja/cpu-feature-overrides.h2
-rw-r--r--include/asm-mips/mach-mips/cpu-feature-overrides.h4
-rw-r--r--include/asm-mips/mach-ocelot3/cpu-feature-overrides.h2
-rw-r--r--include/asm-mips/mach-sibyte/cpu-feature-overrides.h2
-rw-r--r--include/asm-mips/mach-sim/cpu-feature-overrides.h4
-rw-r--r--include/asm-mips/mach-yosemite/cpu-feature-overrides.h2
-rw-r--r--include/asm-mips/mipsregs.h4
-rw-r--r--include/asm-mips/page.h12
-rw-r--r--include/asm-mips/system.h2
-rw-r--r--include/asm-mips/time.h4
-rw-r--r--include/asm-mips/unistd.h18
-rw-r--r--include/asm-mips/vr41xx/capcella.h2
-rw-r--r--include/asm-mips/vr41xx/cmbvr4133.h6
-rw-r--r--include/asm-mips/vr41xx/e55.h43
-rw-r--r--include/asm-mips/vr41xx/irq.h101
-rw-r--r--include/asm-mips/vr41xx/mpc30x.h2
-rw-r--r--include/asm-mips/vr41xx/tb0219.h2
-rw-r--r--include/asm-mips/vr41xx/tb0226.h2
-rw-r--r--include/asm-mips/vr41xx/tb0287.h2
-rw-r--r--include/asm-mips/vr41xx/vr41xx.h53
-rw-r--r--include/asm-mips/vr41xx/vrc4173.h221
-rw-r--r--include/asm-mips/vr41xx/workpad.h43
33 files changed, 184 insertions, 445 deletions
diff --git a/include/asm-mips/apm.h b/include/asm-mips/apm.h
index e8c69208f63..4b99ffc1152 100644
--- a/include/asm-mips/apm.h
+++ b/include/asm-mips/apm.h
@@ -13,7 +13,6 @@
#ifndef MIPS_ASM_SA1100_APM_H
#define MIPS_ASM_SA1100_APM_H
-#include <linux/config.h>
#include <linux/apm_bios.h>
/*
diff --git a/include/asm-mips/atomic.h b/include/asm-mips/atomic.h
index 13d44e14025..e64abc0d822 100644
--- a/include/asm-mips/atomic.h
+++ b/include/asm-mips/atomic.h
@@ -22,8 +22,8 @@
#ifndef _ASM_ATOMIC_H
#define _ASM_ATOMIC_H
+#include <linux/irqflags.h>
#include <asm/cpu-features.h>
-#include <asm/interrupt.h>
#include <asm/war.h>
typedef struct { volatile int counter; } atomic_t;
diff --git a/include/asm-mips/bitops.h b/include/asm-mips/bitops.h
index 098cec26368..1bb89c5a10e 100644
--- a/include/asm-mips/bitops.h
+++ b/include/asm-mips/bitops.h
@@ -31,7 +31,7 @@
#ifdef __KERNEL__
-#include <asm/interrupt.h>
+#include <linux/irqflags.h>
#include <asm/sgidefs.h>
#include <asm/war.h>
diff --git a/include/asm-mips/cpu-features.h b/include/asm-mips/cpu-features.h
index 44285a9d552..eadca266f15 100644
--- a/include/asm-mips/cpu-features.h
+++ b/include/asm-mips/cpu-features.h
@@ -143,12 +143,8 @@
#define cpu_has_dsp (cpu_data[0].ases & MIPS_ASE_DSP)
#endif
-#ifdef CONFIG_MIPS_MT
#ifndef cpu_has_mipsmt
-# define cpu_has_mipsmt (cpu_data[0].ases & MIPS_ASE_MIPSMT)
-#endif
-#else
-# define cpu_has_mipsmt 0
+#define cpu_has_mipsmt (cpu_data[0].ases & MIPS_ASE_MIPSMT)
#endif
#ifdef CONFIG_32BIT
@@ -199,8 +195,8 @@
# define cpu_has_veic 0
#endif
-#ifndef cpu_has_subset_pcaches
-#define cpu_has_subset_pcaches (cpu_data[0].options & MIPS_CPU_SUBSET_CACHES)
+#ifndef cpu_has_inclusive_pcaches
+#define cpu_has_inclusive_pcaches (cpu_data[0].options & MIPS_CPU_INCLUSIVE_CACHES)
#endif
#ifndef cpu_dcache_line_size
diff --git a/include/asm-mips/cpu.h b/include/asm-mips/cpu.h
index dff2a0a52f8..d38fdbf845b 100644
--- a/include/asm-mips/cpu.h
+++ b/include/asm-mips/cpu.h
@@ -242,7 +242,7 @@
#define MIPS_CPU_EJTAG 0x00008000 /* EJTAG exception */
#define MIPS_CPU_NOFPUEX 0x00010000 /* no FPU exception */
#define MIPS_CPU_LLSC 0x00020000 /* CPU has ll/sc instructions */
-#define MIPS_CPU_SUBSET_CACHES 0x00040000 /* P-cache subset enforced */
+#define MIPS_CPU_INCLUSIVE_CACHES 0x00040000 /* P-cache subset enforced */
#define MIPS_CPU_PREFETCH 0x00080000 /* CPU has usable prefetch */
#define MIPS_CPU_VINT 0x00100000 /* CPU supports MIPSR2 vectored interrupts */
#define MIPS_CPU_VEIC 0x00200000 /* CPU supports MIPSR2 external interrupt controller mode */
diff --git a/include/asm-mips/inst.h b/include/asm-mips/inst.h
index 1ed8d0f6257..6489f00731c 100644
--- a/include/asm-mips/inst.h
+++ b/include/asm-mips/inst.h
@@ -74,7 +74,7 @@ enum spec3_op {
ins_op, dinsm_op, dinsu_op, dins_op,
bshfl_op = 0x20,
dbshfl_op = 0x24,
- rdhwr_op = 0x3f
+ rdhwr_op = 0x3b
};
/*
diff --git a/include/asm-mips/interrupt.h b/include/asm-mips/irqflags.h
index a99d6867510..43ca09a3a3d 100644
--- a/include/asm-mips/interrupt.h
+++ b/include/asm-mips/irqflags.h
@@ -8,13 +8,15 @@
* Copyright (C) 1999 Silicon Graphics
* Copyright (C) 2000 MIPS Technologies, Inc.
*/
-#ifndef _ASM_INTERRUPT_H
-#define _ASM_INTERRUPT_H
+#ifndef _ASM_IRQFLAGS_H
+#define _ASM_IRQFLAGS_H
+
+#ifndef __ASSEMBLY__
#include <asm/hazards.h>
__asm__ (
- " .macro local_irq_enable \n"
+ " .macro raw_local_irq_enable \n"
" .set push \n"
" .set reorder \n"
" .set noat \n"
@@ -35,10 +37,10 @@ __asm__ (
" .set pop \n"
" .endm");
-static inline void local_irq_enable(void)
+static inline void raw_local_irq_enable(void)
{
__asm__ __volatile__(
- "local_irq_enable"
+ "raw_local_irq_enable"
: /* no outputs */
: /* no inputs */
: "memory");
@@ -63,7 +65,7 @@ static inline void local_irq_enable(void)
* Workaround: mask EXL bit of the result or place a nop before mfc0.
*/
__asm__ (
- " .macro local_irq_disable\n"
+ " .macro raw_local_irq_disable\n"
" .set push \n"
" .set noat \n"
#ifdef CONFIG_MIPS_MT_SMTC
@@ -84,17 +86,17 @@ __asm__ (
" .set pop \n"
" .endm \n");
-static inline void local_irq_disable(void)
+static inline void raw_local_irq_disable(void)
{
__asm__ __volatile__(
- "local_irq_disable"
+ "raw_local_irq_disable"
: /* no outputs */
: /* no inputs */
: "memory");
}
__asm__ (
- " .macro local_save_flags flags \n"
+ " .macro raw_local_save_flags flags \n"
" .set push \n"
" .set reorder \n"
#ifdef CONFIG_MIPS_MT_SMTC
@@ -105,13 +107,13 @@ __asm__ (
" .set pop \n"
" .endm \n");
-#define local_save_flags(x) \
+#define raw_local_save_flags(x) \
__asm__ __volatile__( \
- "local_save_flags %0" \
+ "raw_local_save_flags %0" \
: "=r" (x))
__asm__ (
- " .macro local_irq_save result \n"
+ " .macro raw_local_irq_save result \n"
" .set push \n"
" .set reorder \n"
" .set noat \n"
@@ -135,15 +137,15 @@ __asm__ (
" .set pop \n"
" .endm \n");
-#define local_irq_save(x) \
+#define raw_local_irq_save(x) \
__asm__ __volatile__( \
- "local_irq_save\t%0" \
+ "raw_local_irq_save\t%0" \
: "=r" (x) \
: /* no inputs */ \
: "memory")
__asm__ (
- " .macro local_irq_restore flags \n"
+ " .macro raw_local_irq_restore flags \n"
" .set push \n"
" .set noreorder \n"
" .set noat \n"
@@ -182,40 +184,42 @@ __asm__ (
" .set pop \n"
" .endm \n");
-#define local_irq_restore(flags) \
+#define raw_local_irq_restore(flags) \
do { \
unsigned long __tmp1; \
\
__asm__ __volatile__( \
- "local_irq_restore\t%0" \
+ "raw_local_irq_restore\t%0" \
: "=r" (__tmp1) \
: "0" (flags) \
: "memory"); \
} while(0)
-static inline int irqs_disabled(void)
+static inline int raw_irqs_disabled_flags(unsigned long flags)
{
#ifdef CONFIG_MIPS_MT_SMTC
/*
* SMTC model uses TCStatus.IXMT to disable interrupts for a thread/CPU
*/
- unsigned long __result;
-
- __asm__ __volatile__(
- " .set noreorder \n"
- " mfc0 %0, $2, 1 \n"
- " andi %0, 0x400 \n"
- " slt %0, $0, %0 \n"
- " .set reorder \n"
- : "=r" (__result));
-
- return __result;
+ return flags & 0x400;
#else
- unsigned long flags;
- local_save_flags(flags);
-
return !(flags & 1);
#endif
}
-#endif /* _ASM_INTERRUPT_H */
+#endif
+
+/*
+ * Do the CPU's IRQ-state tracing from assembly code.
+ */
+#ifdef CONFIG_TRACE_IRQFLAGS
+# define TRACE_IRQS_ON \
+ jal trace_hardirqs_on
+# define TRACE_IRQS_OFF \
+ jal trace_hardirqs_off
+#else
+# define TRACE_IRQS_ON
+# define TRACE_IRQS_OFF
+#endif
+
+#endif /* _ASM_IRQFLAGS_H */
diff --git a/include/asm-mips/mach-cobalt/cpu-feature-overrides.h b/include/asm-mips/mach-cobalt/cpu-feature-overrides.h
index e0e08fc5d7f..c6dfa59d198 100644
--- a/include/asm-mips/mach-cobalt/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-cobalt/cpu-feature-overrides.h
@@ -27,7 +27,7 @@
#define cpu_has_mcheck 0
#define cpu_has_ejtag 0
-#define cpu_has_subset_pcaches 0
+#define cpu_has_inclusive_pcaches 0
#define cpu_dcache_line_size() 32
#define cpu_icache_line_size() 32
#define cpu_scache_line_size() 0
diff --git a/include/asm-mips/mach-excite/cpu-feature-overrides.h b/include/asm-mips/mach-excite/cpu-feature-overrides.h
index abb76b2fd86..0d31854222f 100644
--- a/include/asm-mips/mach-excite/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-excite/cpu-feature-overrides.h
@@ -31,7 +31,7 @@
#define cpu_has_nofpuex 0
#define cpu_has_64bits 1
-#define cpu_has_subset_pcaches 0
+#define cpu_has_inclusive_pcaches 0
#define cpu_dcache_line_size() 32
#define cpu_icache_line_size() 32
diff --git a/include/asm-mips/mach-excite/excite.h b/include/asm-mips/mach-excite/excite.h
index c52610de2b3..130bd4b8edc 100644
--- a/include/asm-mips/mach-excite/excite.h
+++ b/include/asm-mips/mach-excite/excite.h
@@ -1,7 +1,6 @@
#ifndef __EXCITE_H__
#define __EXCITE_H__
-#include <linux/config.h>
#include <linux/init.h>
#include <asm/addrspace.h>
#include <asm/types.h>
diff --git a/include/asm-mips/mach-ip27/cpu-feature-overrides.h b/include/asm-mips/mach-ip27/cpu-feature-overrides.h
index 19c2d135985..a071974b67b 100644
--- a/include/asm-mips/mach-ip27/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-ip27/cpu-feature-overrides.h
@@ -34,7 +34,7 @@
#define cpu_has_4kex 1
#define cpu_has_4k_cache 1
-#define cpu_has_subset_pcaches 1
+#define cpu_has_inclusive_pcaches 1
#define cpu_dcache_line_size() 32
#define cpu_icache_line_size() 64
diff --git a/include/asm-mips/mach-ja/cpu-feature-overrides.h b/include/asm-mips/mach-ja/cpu-feature-overrides.h
index 90ff087083b..84b6dead0e8 100644
--- a/include/asm-mips/mach-ja/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-ja/cpu-feature-overrides.h
@@ -31,7 +31,7 @@
#define cpu_has_nofpuex 0
#define cpu_has_64bits 1
-#define cpu_has_subset_pcaches 0
+#define cpu_has_inclusive_pcaches 0
#define cpu_dcache_line_size() 32
#define cpu_icache_line_size() 32
diff --git a/include/asm-mips/mach-mips/cpu-feature-overrides.h b/include/asm-mips/mach-mips/cpu-feature-overrides.h
index e960679f54b..7f3e3f9bd23 100644
--- a/include/asm-mips/mach-mips/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-mips/cpu-feature-overrides.h
@@ -39,7 +39,7 @@
#define cpu_has_nofpuex 0
/* #define cpu_has_64bits ? */
/* #define cpu_has_64bit_zero_reg ? */
-/* #define cpu_has_subset_pcaches ? */
+/* #define cpu_has_inclusive_pcaches ? */
#define cpu_icache_snoops_remote_store 1
#endif
@@ -65,7 +65,7 @@
#define cpu_has_nofpuex 0
/* #define cpu_has_64bits ? */
/* #define cpu_has_64bit_zero_reg ? */
-/* #define cpu_has_subset_pcaches ? */
+/* #define cpu_has_inclusive_pcaches ? */
#define cpu_icache_snoops_remote_store 1
#endif
diff --git a/include/asm-mips/mach-ocelot3/cpu-feature-overrides.h b/include/asm-mips/mach-ocelot3/cpu-feature-overrides.h
index 782b986241d..57a12ded061 100644
--- a/include/asm-mips/mach-ocelot3/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-ocelot3/cpu-feature-overrides.h
@@ -34,7 +34,7 @@
#define cpu_has_nofpuex 0
#define cpu_has_64bits 1
-#define cpu_has_subset_pcaches 0
+#define cpu_has_inclusive_pcaches 0
#define cpu_dcache_line_size() 32
#define cpu_icache_line_size() 32
diff --git a/include/asm-mips/mach-sibyte/cpu-feature-overrides.h b/include/asm-mips/mach-sibyte/cpu-feature-overrides.h
index 193a666cd13..a25968f277a 100644
--- a/include/asm-mips/mach-sibyte/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-sibyte/cpu-feature-overrides.h
@@ -31,7 +31,7 @@
#define cpu_has_nofpuex 0
#define cpu_has_64bits 1
-#define cpu_has_subset_pcaches 0
+#define cpu_has_inclusive_pcaches 0
#define cpu_dcache_line_size() 32
#define cpu_icache_line_size() 32
diff --git a/include/asm-mips/mach-sim/cpu-feature-overrides.h b/include/asm-mips/mach-sim/cpu-feature-overrides.h
index d736bdadb6d..779b0220573 100644
--- a/include/asm-mips/mach-sim/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-sim/cpu-feature-overrides.h
@@ -34,7 +34,7 @@
#define cpu_has_nofpuex 0
/* #define cpu_has_64bits ? */
/* #define cpu_has_64bit_zero_reg ? */
-/* #define cpu_has_subset_pcaches ? */
+/* #define cpu_has_inclusive_pcaches ? */
#endif
#ifdef CONFIG_CPU_MIPS64
@@ -59,7 +59,7 @@
#define cpu_has_nofpuex 0
/* #define cpu_has_64bits ? */
/* #define cpu_has_64bit_zero_reg ? */
-/* #define cpu_has_subset_pcaches ? */
+/* #define cpu_has_inclusive_pcaches ? */
#endif
#endif /* __ASM_MACH_MIPS_CPU_FEATURE_OVERRIDES_H */
diff --git a/include/asm-mips/mach-yosemite/cpu-feature-overrides.h b/include/asm-mips/mach-yosemite/cpu-feature-overrides.h
index 3073542c93c..42cebb7ce7a 100644
--- a/include/asm-mips/mach-yosemite/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-yosemite/cpu-feature-overrides.h
@@ -31,7 +31,7 @@
#define cpu_has_nofpuex 0
#define cpu_has_64bits 1
-#define cpu_has_subset_pcaches 0
+#define cpu_has_inclusive_pcaches 0
#define cpu_dcache_line_size() 32
#define cpu_icache_line_size() 32
diff --git a/include/asm-mips/mipsregs.h b/include/asm-mips/mipsregs.h
index 9192d76c133..1f318d70799 100644
--- a/include/asm-mips/mipsregs.h
+++ b/include/asm-mips/mipsregs.h
@@ -470,6 +470,8 @@
/* Bits specific to the VR41xx. */
#define VR41_CONF_CS (_ULCAST_(1) << 12)
+#define VR41_CONF_P4K (_ULCAST_(1) << 13)
+#define VR41_CONF_BP (_ULCAST_(1) << 16)
#define VR41_CONF_M16 (_ULCAST_(1) << 20)
#define VR41_CONF_AD (_ULCAST_(1) << 23)
@@ -1416,7 +1418,7 @@ change_c0_##name(unsigned int change, unsigned int new) \
#else /* SMTC versions that manage MT scheduling */
-#include <asm/interrupt.h>
+#include <linux/irqflags.h>
/*
* This is a duplicate of dmt() in mipsmtregs.h to avoid problems with
diff --git a/include/asm-mips/page.h b/include/asm-mips/page.h
index 6b97744f00c..6ed1151a05a 100644
--- a/include/asm-mips/page.h
+++ b/include/asm-mips/page.h
@@ -138,16 +138,14 @@ typedef struct { unsigned long pgprot; } pgprot_t;
#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
-#ifndef CONFIG_SPARSEMEM
-#ifndef CONFIG_NEED_MULTIPLE_NODES
-#define pfn_valid(pfn) ((pfn) < max_mapnr)
-#endif
-#endif
-
#ifdef CONFIG_FLATMEM
#define pfn_valid(pfn) ((pfn) < max_mapnr)
+#elif defined(CONFIG_SPARSEMEM)
+
+/* pfn_valid is defined in linux/mmzone.h */
+
#elif defined(CONFIG_NEED_MULTIPLE_NODES)
#define pfn_valid(pfn) \
@@ -159,8 +157,6 @@ typedef struct { unsigned long pgprot; } pgprot_t;
: 0); \
})
-#else
-#error Provide a definition of pfn_valid
#endif
#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
diff --git a/include/asm-mips/system.h b/include/asm-mips/system.h
index 130333d7c4e..13c98dde82d 100644
--- a/include/asm-mips/system.h
+++ b/include/asm-mips/system.h
@@ -13,13 +13,13 @@
#define _ASM_SYSTEM_H
#include <linux/types.h>
+#include <linux/irqflags.h>
#include <asm/addrspace.h>
#include <asm/cpu-features.h>
#include <asm/dsp.h>
#include <asm/ptrace.h>
#include <asm/war.h>
-#include <asm/interrupt.h>
/*
* read_barrier_depends - Flush all pending reads that subsequents reads
diff --git a/include/asm-mips/time.h b/include/asm-mips/time.h
index d897c8bb554..2d543735668 100644
--- a/include/asm-mips/time.h
+++ b/include/asm-mips/time.h
@@ -83,11 +83,11 @@ extern asmlinkage void ll_local_timer_interrupt(int irq, struct pt_regs *regs);
/*
* board specific routines required by time_init().
* board_time_init is defaulted to NULL and can remain so.
- * board_timer_setup must be setup properly in machine setup routine.
+ * plat_timer_setup must be setup properly in machine setup routine.
*/
struct irqaction;
extern void (*board_time_init)(void);
-extern void (*board_timer_setup)(struct irqaction *irq);
+extern void plat_timer_setup(struct irqaction *irq);
/*
* mips_hpt_frequency - must be set if you intend to use an R4k-compatible
diff --git a/include/asm-mips/unistd.h b/include/asm-mips/unistd.h
index 809f9f55bac..610ccb8a50b 100644
--- a/include/asm-mips/unistd.h
+++ b/include/asm-mips/unistd.h
@@ -327,16 +327,18 @@
#define __NR_splice (__NR_Linux + 304)
#define __NR_sync_file_range (__NR_Linux + 305)
#define __NR_tee (__NR_Linux + 306)
+#define __NR_vmsplice (__NR_Linux + 307)
+#define __NR_move_pages (__NR_Linux + 308)
/*
* Offset of the last Linux o32 flavoured syscall
*/
-#define __NR_Linux_syscalls 306
+#define __NR_Linux_syscalls 308
#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
#define __NR_O32_Linux 4000
-#define __NR_O32_Linux_syscalls 306
+#define __NR_O32_Linux_syscalls 308
#if _MIPS_SIM == _MIPS_SIM_ABI64
@@ -610,16 +612,18 @@
#define __NR_splice (__NR_Linux + 263)
#define __NR_sync_file_range (__NR_Linux + 264)
#define __NR_tee (__NR_Linux + 265)
+#define __NR_vmsplice (__NR_Linux + 266)
+#define __NR_move_pages (__NR_Linux + 267)
/*
* Offset of the last Linux 64-bit flavoured syscall
*/
-#define __NR_Linux_syscalls 265
+#define __NR_Linux_syscalls 267
#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */
#define __NR_64_Linux 5000
-#define __NR_64_Linux_syscalls 265
+#define __NR_64_Linux_syscalls 267
#if _MIPS_SIM == _MIPS_SIM_NABI32
@@ -897,16 +901,18 @@
#define __NR_splice (__NR_Linux + 267)
#define __NR_sync_file_range (__NR_Linux + 268)
#define __NR_tee (__NR_Linux + 269)
+#define __NR_vmsplice (__NR_Linux + 270)
+#define __NR_move_pages (__NR_Linux + 271)
/*
* Offset of the last N32 flavoured syscall
*/
-#define __NR_Linux_syscalls 269
+#define __NR_Linux_syscalls 271
#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */
#define __NR_N32_Linux 6000
-#define __NR_N32_Linux_syscalls 269
+#define __NR_N32_Linux_syscalls 271
#ifdef __KERNEL__
diff --git a/include/asm-mips/vr41xx/capcella.h b/include/asm-mips/vr41xx/capcella.h
index d10ffda50de..e0ee05a3dfc 100644
--- a/include/asm-mips/vr41xx/capcella.h
+++ b/include/asm-mips/vr41xx/capcella.h
@@ -20,7 +20,7 @@
#ifndef __ZAO_CAPCELLA_H
#define __ZAO_CAPCELLA_H
-#include <asm/vr41xx/vr41xx.h>
+#include <asm/vr41xx/irq.h>
/*
* General-Purpose I/O Pin Number
diff --git a/include/asm-mips/vr41xx/cmbvr4133.h b/include/asm-mips/vr41xx/cmbvr4133.h
index 42af389019e..9490ade58b4 100644
--- a/include/asm-mips/vr41xx/cmbvr4133.h
+++ b/include/asm-mips/vr41xx/cmbvr4133.h
@@ -15,8 +15,7 @@
#ifndef __NEC_CMBVR4133_H
#define __NEC_CMBVR4133_H
-#include <asm/addrspace.h>
-#include <asm/vr41xx/vr41xx.h>
+#include <asm/vr41xx/irq.h>
/*
* General-Purpose I/O Pin Number
@@ -55,7 +54,4 @@
#define IDE_SECONDARY_IRQ I8259_IRQ(15)
#define I8259_IRQ_LAST IDE_SECONDARY_IRQ
-#define RTC_PORT(x) (0xaf000100 + (x))
-#define RTC_IO_EXTENT 0x140
-
#endif /* __NEC_CMBVR4133_H */
diff --git a/include/asm-mips/vr41xx/e55.h b/include/asm-mips/vr41xx/e55.h
deleted file mode 100644
index 558f2269bf3..00000000000
--- a/include/asm-mips/vr41xx/e55.h
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * e55.h, Include file for CASIO CASSIOPEIA E-10/15/55/65.
- *
- * Copyright (C) 2002-2004 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#ifndef __CASIO_E55_H
-#define __CASIO_E55_H
-
-#include <asm/addrspace.h>
-#include <asm/vr41xx/vr41xx.h>
-
-/*
- * Board specific address mapping
- */
-#define VR41XX_ISA_MEM_BASE 0x10000000
-#define VR41XX_ISA_MEM_SIZE 0x04000000
-
-/* VR41XX_ISA_IO_BASE includes offset from real base. */
-#define VR41XX_ISA_IO_BASE 0x1400c000
-#define VR41XX_ISA_IO_SIZE 0x03ff4000
-
-#define ISA_BUS_IO_BASE 0
-#define ISA_BUS_IO_SIZE VR41XX_ISA_IO_SIZE
-
-#define IO_PORT_BASE KSEG1ADDR(VR41XX_ISA_IO_BASE)
-#define IO_PORT_RESOURCE_START ISA_BUS_IO_BASE
-#define IO_PORT_RESOURCE_END (ISA_BUS_IO_BASE + ISA_BUS_IO_SIZE - 1)
-
-#endif /* __CASIO_E55_H */
diff --git a/include/asm-mips/vr41xx/irq.h b/include/asm-mips/vr41xx/irq.h
new file mode 100644
index 00000000000..d315dfbc08f
--- /dev/null
+++ b/include/asm-mips/vr41xx/irq.h
@@ -0,0 +1,101 @@
+/*
+ * include/asm-mips/vr41xx/irq.h
+ *
+ * Interrupt numbers for NEC VR4100 series.
+ *
+ * Copyright (C) 1999 Michael Klar
+ * Copyright (C) 2001, 2002 Paul Mundt
+ * Copyright (C) 2002 MontaVista Software, Inc.
+ * Copyright (C) 2002 TimeSys Corp.
+ * Copyright (C) 2003-2006 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+#ifndef __NEC_VR41XX_IRQ_H
+#define __NEC_VR41XX_IRQ_H
+
+/*
+ * CPU core Interrupt Numbers
+ */
+#define MIPS_CPU_IRQ_BASE 0
+#define MIPS_CPU_IRQ(x) (MIPS_CPU_IRQ_BASE + (x))
+#define MIPS_SOFTINT0_IRQ MIPS_CPU_IRQ(0)
+#define MIPS_SOFTINT1_IRQ MIPS_CPU_IRQ(1)
+#define INT0_IRQ MIPS_CPU_IRQ(2)
+#define INT1_IRQ MIPS_CPU_IRQ(3)
+#define INT2_IRQ MIPS_CPU_IRQ(4)
+#define INT3_IRQ MIPS_CPU_IRQ(5)
+#define INT4_IRQ MIPS_CPU_IRQ(6)
+#define TIMER_IRQ MIPS_CPU_IRQ(7)
+
+/*
+ * SYINT1 Interrupt Numbers
+ */
+#define SYSINT1_IRQ_BASE 8
+#define SYSINT1_IRQ(x) (SYSINT1_IRQ_BASE + (x))
+#define BATTRY_IRQ SYSINT1_IRQ(0)
+#define POWER_IRQ SYSINT1_IRQ(1)
+#define RTCLONG1_IRQ SYSINT1_IRQ(2)
+#define ELAPSEDTIME_IRQ SYSINT1_IRQ(3)
+/* RFU */
+#define PIU_IRQ SYSINT1_IRQ(5)
+#define AIU_IRQ SYSINT1_IRQ(6)
+#define KIU_IRQ SYSINT1_IRQ(7)
+#define GIUINT_IRQ SYSINT1_IRQ(8)
+#define SIU_IRQ SYSINT1_IRQ(9)
+#define BUSERR_IRQ SYSINT1_IRQ(10)
+#define SOFTINT_IRQ SYSINT1_IRQ(11)
+#define CLKRUN_IRQ SYSINT1_IRQ(12)
+#define DOZEPIU_IRQ SYSINT1_IRQ(13)
+#define SYSINT1_IRQ_LAST DOZEPIU_IRQ
+
+/*
+ * SYSINT2 Interrupt Numbers
+ */
+#define SYSINT2_IRQ_BASE 24
+#define SYSINT2_IRQ(x) (SYSINT2_IRQ_BASE + (x))
+#define RTCLONG2_IRQ SYSINT2_IRQ(0)
+#define LED_IRQ SYSINT2_IRQ(1)
+#define HSP_IRQ SYSINT2_IRQ(2)
+#define TCLOCK_IRQ SYSINT2_IRQ(3)
+#define FIR_IRQ SYSINT2_IRQ(4)
+#define CEU_IRQ SYSINT2_IRQ(4) /* same number as FIR_IRQ */
+#define DSIU_IRQ SYSINT2_IRQ(5)
+#define PCI_IRQ SYSINT2_IRQ(6)
+#define SCU_IRQ SYSINT2_IRQ(7)
+#define CSI_IRQ SYSINT2_IRQ(8)
+#define BCU_IRQ SYSINT2_IRQ(9)
+#define ETHERNET_IRQ SYSINT2_IRQ(10)
+#define SYSINT2_IRQ_LAST ETHERNET_IRQ
+
+/*
+ * GIU Interrupt Numbers
+ */
+#define GIU_IRQ_BASE 40
+#define GIU_IRQ(x) (GIU_IRQ_BASE + (x)) /* IRQ 40-71 */
+#define GIU_IRQ_LAST GIU_IRQ(31)
+
+/*
+ * VRC4173 Interrupt Numbers
+ */
+#define VRC4173_IRQ_BASE 72
+#define VRC4173_IRQ(x) (VRC4173_IRQ_BASE + (x))
+#define VRC4173_USB_IRQ VRC4173_IRQ(0)
+#define VRC4173_PCMCIA2_IRQ VRC4173_IRQ(1)
+#define VRC4173_PCMCIA1_IRQ VRC4173_IRQ(2)
+#define VRC4173_PS2CH2_IRQ VRC4173_IRQ(3)
+#define VRC4173_PS2CH1_IRQ VRC4173_IRQ(4)
+#define VRC4173_PIU_IRQ VRC4173_IRQ(5)
+#define VRC4173_AIU_IRQ VRC4173_IRQ(6)
+#define VRC4173_KIU_IRQ VRC4173_IRQ(7)
+#define VRC4173_GIU_IRQ VRC4173_IRQ(8)
+#define VRC4173_AC97_IRQ VRC4173_IRQ(9)
+#define VRC4173_AC97INT1_IRQ VRC4173_IRQ(10)
+/* RFU */
+#define VRC4173_DOZEPIU_IRQ VRC4173_IRQ(13)
+#define VRC4173_IRQ_LAST VRC4173_DOZEPIU_IRQ
+
+#endif /* __NEC_VR41XX_IRQ_H */
diff --git a/include/asm-mips/vr41xx/mpc30x.h b/include/asm-mips/vr41xx/mpc30x.h
index a6cbe4da666..1d67df843dc 100644
--- a/include/asm-mips/vr41xx/mpc30x.h
+++ b/include/asm-mips/vr41xx/mpc30x.h
@@ -20,7 +20,7 @@
#ifndef __VICTOR_MPC30X_H
#define __VICTOR_MPC30X_H
-#include <asm/vr41xx/vr41xx.h>
+#include <asm/vr41xx/irq.h>
/*
* General-Purpose I/O Pin Number
diff --git a/include/asm-mips/vr41xx/tb0219.h b/include/asm-mips/vr41xx/tb0219.h
index b318b9612a8..dc981b4be0a 100644
--- a/include/asm-mips/vr41xx/tb0219.h
+++ b/include/asm-mips/vr41xx/tb0219.h
@@ -23,7 +23,7 @@
#ifndef __TANBAC_TB0219_H
#define __TANBAC_TB0219_H
-#include <asm/vr41xx/vr41xx.h>
+#include <asm/vr41xx/irq.h>
/*
* General-Purpose I/O Pin Number
diff --git a/include/asm-mips/vr41xx/tb0226.h b/include/asm-mips/vr41xx/tb0226.h
index 2513f450e2d..de527dcfa5f 100644
--- a/include/asm-mips/vr41xx/tb0226.h
+++ b/include/asm-mips/vr41xx/tb0226.h
@@ -20,7 +20,7 @@
#ifndef __TANBAC_TB0226_H
#define __TANBAC_TB0226_H
-#include <asm/vr41xx/vr41xx.h>
+#include <asm/vr41xx/irq.h>
/*
* General-Purpose I/O Pin Number
diff --git a/include/asm-mips/vr41xx/tb0287.h b/include/asm-mips/vr41xx/tb0287.h
index dd9832313af..61bead68abf 100644
--- a/include/asm-mips/vr41xx/tb0287.h
+++ b/include/asm-mips/vr41xx/tb0287.h
@@ -22,7 +22,7 @@
#ifndef __TANBAC_TB0287_H
#define __TANBAC_TB0287_H
-#include <asm/vr41xx/vr41xx.h>
+#include <asm/vr41xx/irq.h>
/*
* General-Purpose I/O Pin Number
diff --git a/include/asm-mips/vr41xx/vr41xx.h b/include/asm-mips/vr41xx/vr41xx.h
index 70828d5fae9..dd3eb3dc588 100644
--- a/include/asm-mips/vr41xx/vr41xx.h
+++ b/include/asm-mips/vr41xx/vr41xx.h
@@ -74,59 +74,6 @@ extern void vr41xx_mask_clock(vr41xx_clock_t clock);
/*
* Interrupt Control Unit
*/
-/* CPU core Interrupt Numbers */
-#define MIPS_CPU_IRQ_BASE 0
-#define MIPS_CPU_IRQ(x) (MIPS_CPU_IRQ_BASE + (x))
-#define MIPS_SOFTINT0_IRQ MIPS_CPU_IRQ(0)
-#define MIPS_SOFTINT1_IRQ MIPS_CPU_IRQ(1)
-#define INT0_IRQ MIPS_CPU_IRQ(2)
-#define INT1_IRQ MIPS_CPU_IRQ(3)
-#define INT2_IRQ MIPS_CPU_IRQ(4)
-#define INT3_IRQ MIPS_CPU_IRQ(5)
-#define INT4_IRQ MIPS_CPU_IRQ(6)
-#define TIMER_IRQ MIPS_CPU_IRQ(7)
-
-/* SYINT1 Interrupt Numbers */
-#define SYSINT1_IRQ_BASE 8
-#define SYSINT1_IRQ(x) (SYSINT1_IRQ_BASE + (x))
-#define BATTRY_IRQ SYSINT1_IRQ(0)
-#define POWER_IRQ SYSINT1_IRQ(1)
-#define RTCLONG1_IRQ SYSINT1_IRQ(2)
-#define ELAPSEDTIME_IRQ SYSINT1_IRQ(3)
-/* RFU */
-#define PIU_IRQ SYSINT1_IRQ(5)
-#define AIU_IRQ SYSINT1_IRQ(6)
-#define KIU_IRQ SYSINT1_IRQ(7)
-#define GIUINT_IRQ SYSINT1_IRQ(8)
-#define SIU_IRQ SYSINT1_IRQ(9)
-#define BUSERR_IRQ SYSINT1_IRQ(10)
-#define SOFTINT_IRQ SYSINT1_IRQ(11)
-#define CLKRUN_IRQ SYSINT1_IRQ(12)
-#define DOZEPIU_IRQ SYSINT1_IRQ(13)
-#define SYSINT1_IRQ_LAST DOZEPIU_IRQ
-
-/* SYSINT2 Interrupt Numbers */
-#define SYSINT2_IRQ_BASE 24
-#define SYSINT2_IRQ(x) (SYSINT2_IRQ_BASE + (x))
-#define RTCLONG2_IRQ SYSINT2_IRQ(0)
-#define LED_IRQ SYSINT2_IRQ(1)
-#define HSP_IRQ SYSINT2_IRQ(2)
-#define TCLOCK_IRQ SYSINT2_IRQ(3)
-#define FIR_IRQ SYSINT2_IRQ(4)
-#define CEU_IRQ SYSINT2_IRQ(4) /* same number as FIR_IRQ */
-#define DSIU_IRQ SYSINT2_IRQ(5)
-#define PCI_IRQ SYSINT2_IRQ(6)
-#define SCU_IRQ SYSINT2_IRQ(7)
-#define CSI_IRQ SYSINT2_IRQ(8)
-#define BCU_IRQ SYSINT2_IRQ(9)
-#define ETHERNET_IRQ SYSINT2_IRQ(10)
-#define SYSINT2_IRQ_LAST ETHERNET_IRQ
-
-/* GIU Interrupt Numbers */
-#define GIU_IRQ_BASE 40
-#define GIU_IRQ(x) (GIU_IRQ_BASE + (x)) /* IRQ 40-71 */
-#define GIU_IRQ_LAST GIU_IRQ(31)
-
extern int vr41xx_set_intassign(unsigned int irq, unsigned char intassign);
extern int cascade_irq(unsigned int irq, int (*get_irq)(unsigned int, struct pt_regs *));
diff --git a/include/asm-mips/vr41xx/vrc4173.h b/include/asm-mips/vr41xx/vrc4173.h
deleted file mode 100644
index 96fdcd54cec..00000000000
--- a/include/asm-mips/vr41xx/vrc4173.h
+++ /dev/null
@@ -1,221 +0,0 @@
-/*
- * vrc4173.h, Include file for NEC VRC4173.
- *
- * Copyright (C) 2000 Michael R. McDonald
- * Copyright (C) 2001-2003 Montavista Software Inc.
- * Author: Yoichi Yuasa <yyuasa@mvista.com, or source@mvista.com>
- * Copyright (C) 2004 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
- * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#ifndef __NEC_VRC4173_H
-#define __NEC_VRC4173_H
-
-#include <asm/io.h>
-
-/*
- * Interrupt Number
- */
-#define VRC4173_IRQ_BASE 72
-#define VRC4173_IRQ(x) (VRC4173_IRQ_BASE + (x))
-#define VRC4173_USB_IRQ VRC4173_IRQ(0)
-#define VRC4173_PCMCIA2_IRQ VRC4173_IRQ(1)
-#define VRC4173_PCMCIA1_IRQ VRC4173_IRQ(2)
-#define VRC4173_PS2CH2_IRQ VRC4173_IRQ(3)
-#define VRC4173_PS2CH1_IRQ VRC4173_IRQ(4)
-#define VRC4173_PIU_IRQ VRC4173_IRQ(5)
-#define VRC4173_AIU_IRQ VRC4173_IRQ(6)
-#define VRC4173_KIU_IRQ VRC4173_IRQ(7)
-#define VRC4173_GIU_IRQ VRC4173_IRQ(8)
-#define VRC4173_AC97_IRQ VRC4173_IRQ(9)
-#define VRC4173_AC97INT1_IRQ VRC4173_IRQ(10)
-/* RFU */
-#define VRC4173_DOZEPIU_IRQ VRC4173_IRQ(13)
-#define VRC4173_IRQ_LAST VRC4173_DOZEPIU_IRQ
-
-/*
- * PCI I/O accesses
- */
-#ifdef CONFIG_VRC4173
-
-extern unsigned long vrc4173_io_offset;
-
-#define set_vrc4173_io_offset(offset) do { vrc4173_io_offset = (offset); } while (0)
-
-#define vrc4173_outb(val,port) outb((val), vrc4173_io_offset+(port))
-#define vrc4173_outw(val,port) outw((val), vrc4173_io_offset+(port))
-#define vrc4173_outl(val,port) outl((val), vrc4173_io_offset+(port))
-#define vrc4173_outb_p(val,port) outb_p((val), vrc4173_io_offset+(port))
-#define vrc4173_outw_p(val,port) outw_p((val), vrc4173_io_offset+(port))
-#define vrc4173_outl_p(val,port) outl_p((val), vrc4173_io_offset+(port))
-
-#define vrc4173_inb(port) inb(vrc4173_io_offset+(port))
-#define vrc4173_inw(port) inw(vrc4173_io_offset+(port))
-#define vrc4173_inl(port) inl(vrc4173_io_offset+(port))
-#define vrc4173_inb_p(port) inb_p(vrc4173_io_offset+(port))
-#define vrc4173_inw_p(port) inw_p(vrc4173_io_offset+(port))
-#define vrc4173_inl_p(port) inl_p(vrc4173_io_offset+(port))
-
-#define vrc4173_outsb(port,addr,count) outsb(vrc4173_io_offset+(port),(addr),(count))
-#define vrc4173_outsw(port,addr,count) outsw(vrc4173_io_offset+(port),(addr),(count))
-#define vrc4173_outsl(port,addr,count) outsl(vrc4173_io_offset+(port),(addr),(count))
-
-#define vrc4173_insb(port,addr,count) insb(vrc4173_io_offset+(port),(addr),(count))
-#define vrc4173_insw(port,addr,count) insw(vrc4173_io_offset+(port),(addr),(count))
-#define vrc4173_insl(port,addr,count) insl(vrc4173_io_offset+(port),(addr),(count))
-
-#else
-
-#define set_vrc4173_io_offset(offset) do {} while (0)
-
-#define vrc4173_outb(val,port) do {} while (0)
-#define vrc4173_outw(val,port) do {} while (0)
-#define vrc4173_outl(val,port) do {} while (0)
-#define vrc4173_outb_p(val,port) do {} while (0)
-#define vrc4173_outw_p(val,port) do {} while (0)
-#define vrc4173_outl_p(val,port) do {} while (0)
-
-#define vrc4173_inb(port) 0
-#define vrc4173_inw(port) 0
-#define vrc4173_inl(port) 0
-#define vrc4173_inb_p(port) 0
-#define vrc4173_inw_p(port) 0
-#define vrc4173_inl_p(port) 0
-
-#define vrc4173_outsb(port,addr,count) do {} while (0)
-#define vrc4173_outsw(port,addr,count) do {} while (0)
-#define vrc4173_outsl(port,addr,count) do {} while (0)
-
-#define vrc4173_insb(port,addr,count) do {} while (0)
-#define vrc4173_insw(port,addr,count) do {} while (0)
-#define vrc4173_insl(port,addr,count) do {} while (0)
-
-#endif
-
-/*
- * Clock Mask Unit
- */
-typedef enum vrc4173_clock {
- VRC4173_PIU_CLOCK,
- VRC4173_KIU_CLOCK,
- VRC4173_AIU_CLOCK,
- VRC4173_PS2_CH1_CLOCK,
- VRC4173_PS2_CH2_CLOCK,
- VRC4173_USBU_PCI_CLOCK,
- VRC4173_CARDU1_PCI_CLOCK,
- VRC4173_CARDU2_PCI_CLOCK,
- VRC4173_AC97U_PCI_CLOCK,
- VRC4173_USBU_48MHz_CLOCK,
- VRC4173_EXT_48MHz_CLOCK,
- VRC4173_48MHz_CLOCK,
-} vrc4173_clock_t;
-
-#ifdef CONFIG_VRC4173
-
-extern void vrc4173_supply_clock(vrc4173_clock_t clock);
-extern void vrc4173_mask_clock(vrc4173_clock_t clock);
-
-#else
-
-static inline void vrc4173_supply_clock(vrc4173_clock_t clock) {}
-static inline void vrc4173_mask_clock(vrc4173_clock_t clock) {}
-
-#endif
-
-/*
- * Interupt Control Unit
- */
-
-#define VRC4173_PIUINT_COMMAND 0x0040
-#define VRC4173_PIUINT_DATA 0x0020
-#define VRC4173_PIUINT_PAGE1 0x0010
-#define VRC4173_PIUINT_PAGE0 0x0008
-#define VRC4173_PIUINT_DATALOST 0x0004
-#define VRC4173_PIUINT_STATUSCHANGE 0x0001
-
-#ifdef CONFIG_VRC4173
-
-extern void vrc4173_enable_piuint(uint16_t mask);
-extern void vrc4173_disable_piuint(uint16_t mask);
-
-#else
-
-static inline void vrc4173_enable_piuint(uint16_t mask) {}
-static inline void vrc4173_disable_piuint(uint16_t mask) {}
-
-#endif
-
-#define VRC4173_AIUINT_INPUT_DMAEND 0x0800
-#define VRC4173_AIUINT_INPUT_DMAHALT 0x0400
-#define VRC4173_AIUINT_INPUT_DATALOST 0x0200
-#define VRC4173_AIUINT_INPUT_DATA 0x0100
-#define VRC4173_AIUINT_OUTPUT_DMAEND 0x0008
-#define VRC4173_AIUINT_OUTPUT_DMAHALT 0x0004
-#define VRC4173_AIUINT_OUTPUT_NODATA 0x0002
-
-#ifdef CONFIG_VRC4173
-
-extern void vrc4173_enable_aiuint(uint16_t mask);
-extern void vrc4173_disable_aiuint(uint16_t mask);
-
-#else
-
-static inline void vrc4173_enable_aiuint(uint16_t mask) {}
-static inline void vrc4173_disable_aiuint(uint16_t mask) {}
-
-#endif
-
-#define VRC4173_KIUINT_DATALOST 0x0004
-#define VRC4173_KIUINT_DATAREADY 0x0002
-#define VRC4173_KIUINT_SCAN 0x0001
-
-#ifdef CONFIG_VRC4173
-
-extern void vrc4173_enable_kiuint(uint16_t mask);
-extern void vrc4173_disable_kiuint(uint16_t mask);
-
-#else
-
-static inline void vrc4173_enable_kiuint(uint16_t mask) {}
-static inline void vrc4173_disable_kiuint(uint16_t mask) {}
-
-#endif
-
-/*
- * General-Purpose I/O Unit
- */
-typedef enum vrc4173_function {
- PS2_CHANNEL1,
- PS2_CHANNEL2,
- TOUCHPANEL,
- KEYBOARD_8SCANLINES,
- KEYBOARD_10SCANLINES,
- KEYBOARD_12SCANLINES,
- GPIO_0_15PINS,
- GPIO_16_20PINS,
-} vrc4173_function_t;
-
-#ifdef CONFIG_VRC4173
-
-extern void vrc4173_select_function(vrc4173_function_t function);
-
-#else
-
-static inline void vrc4173_select_function(vrc4173_function_t function) {}
-
-#endif
-
-#endif /* __NEC_VRC4173_H */
diff --git a/include/asm-mips/vr41xx/workpad.h b/include/asm-mips/vr41xx/workpad.h
deleted file mode 100644
index 6bfa9c009a9..00000000000
--- a/include/asm-mips/vr41xx/workpad.h
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * workpad.h, Include file for IBM WorkPad z50.
- *
- * Copyright (C) 2002-2004 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#ifndef __IBM_WORKPAD_H
-#define __IBM_WORKPAD_H
-
-#include <asm/addrspace.h>
-#include <asm/vr41xx/vr41xx.h>
-
-/*
- * Board specific address mapping
- */
-#define VR41XX_ISA_MEM_BASE 0x10000000
-#define VR41XX_ISA_MEM_SIZE 0x04000000
-
-/* VR41XX_ISA_IO_BASE includes offset from real base. */
-#define VR41XX_ISA_IO_BASE 0x15000000
-#define VR41XX_ISA_IO_SIZE 0x03000000
-
-#define ISA_BUS_IO_BASE 0
-#define ISA_BUS_IO_SIZE VR41XX_ISA_IO_SIZE
-
-#define IO_PORT_BASE KSEG1ADDR(VR41XX_ISA_IO_BASE)
-#define IO_PORT_RESOURCE_START ISA_BUS_IO_BASE
-#define IO_PORT_RESOURCE_END (ISA_BUS_IO_BASE + ISA_BUS_IO_SIZE - 1)
-
-#endif /* __IBM_WORKPAD_H */